Commit 9ea4ebdc authored by Sakthivel Velumani's avatar Sakthivel Velumani

more updates on samples_per_slot

parent bc38ec6b
develop 1 128-ues 256_QAM_demod LTE_TRX_on_single_port NCTU_OpinConnect_LDPC NR-PHY-MAC-IF-multi-UE NR_10MHz NR_CSI_reporting NR_DCI_01 NR_DL_sched_fixes NR_DL_scheduler NR_FAPI_beamindex_SSB_RO NR_FR2_RA NR_FR2_RRC_SSB NR_MAC_CE_GlobalEdge NR_MAC_Multi_Rach_GlobalEdge NR_MAC_SSB_RO_GlobalEdge NR_MAC_SSB_RO_UE_IDCC NR_MAC_SSB_RO_merge NR_MAC_TCI_UCI_GlobalEdge NR_NGAP NR_PDCP_noS1 NR_PUCCH_MultiUE NR_RA_updates NR_RRCConfiguration NR_RRCConfiguration_FR2 NR_RRCConfiguration_S1U NR_RRCConfiguration_sync_source NR_RRCConfiguration_trx_thread NR_RRC_CP_bugfix NR_RRC_PDCP NR_RRC_PRACH_procedures NR_RRC_PRACH_procedures_todevelop NR_RRC_X2AP_AMBR_Change_Global_edge NR_RRC_X2AP_RemoveHardcodings_GlobalEdge NR_RRC_config_simplified NR_RRC_harq NR_RRC_harq_b NR_RRC_harq_hacks NR_RRC_harq_newdcipdu NR_SA_NGAP_RRC NR_SA_NGAP_RRC_wk42 NR_SA_itti_sim_wk48 NR_SCHED NR_SRB_Config NR_TRX_on_single_port NR_TRX_on_single_port2 NR_UE_MAC_scheduler NR_UE_RA_fixes NR_UE_UL_DCI_improvements NR_UE_enable_parallelization NR_UE_stability_fixes NR_UL_FAPI_programming NR_UL_scheduler NR_UL_scheduler_rebased NR_UL_scheduling NR_gNB_SCF_Indication NR_ipaccess_testing NR_mac_uci_functions_rework NR_msg2_phytest NR_scheduling_CSIRS NR_scheduling_request NR_test_S1U_RRC_PRACH_procedures NR_ue_dlsch_dmrs_cdm PUSCH_TA_update RA_CI_test UE_DL_DCI_hotfix bch-fixes-bitmap benetel_5g_prach_fix benetel_phase_rotation benetel_phase_rotation_old bugfix-minor-remove-wrong-log bugfix-nr-bands bugfix-nr-ldpc-post-processing bugfix-nr-ldpc-size-typo bugfix-nr-pdcp-sn-size bugfix-nr-rate-matching-assertion cce_indexing_fix cce_indexing_fix2 ci-deploy-docker-compose ci-rd-july-improvements ci-ul-iperf-from-trf-container clean-5G-scope-round2 cleanup_softmodem_main constant_power debug_branch_init_sync develop-oriecpriupdates develop-sib1 develop_inria_ci_deployment develop_inria_ci_deployment_gp develop_integration_2020_w15 develop_integration_2020_w19 dfts_alternatives dlsch-all-dlslots dlsch_encode_mthread dlsch_parallel dongzhanyi-zte-develop dongzhanyi-zte-develop2 extend_sharedlibusage2 fapi_for_dmrs_and_ptrs feature-4g-sched feature/make-s1-mme-port-configurable feature/make-s1-mme-port-configurable-with-astyle-fixes fembms-enb-ue finalize-oaicn-integration firas fix-ci-tun fix-itti-segv fix-softmodem-restart fix-warnings fix_do_ra_data fix_pdsch_low_prb fix_rfsim_mimo fix_rrc_x2_ticking fixes-mac-sched-nfapi fixes-mac-sched-tun fixes-tun flexran-apps flexran-repair-mme-mgmt fujitsu_lte_contribution fujitsu_lte_contribution-128 harq-hotfix hotfix-minor-remove-nr-rlc-cppcheck-error hotfix-nr-rlc-tick hotfix-ocp-executable hotfix-ue-musim-compilation improve_nr_modulation improve_ue_stability integration_2020_wk40 integration_2020_wk41 integration_2020_wk42_2 integration_2020_wk45 integration_2020_wk45_2 integration_2020_wk46 integration_2020_wk46_2 integration_2020_wk47 integration_2020_wk48 integration_2020_wk48_2 integration_2020_wk49 integration_2020_wk50 integration_2020_wk50_1 inter-RRU-final inter-RRU-oairu inter-rru-UE l2-fixes ldpc-decoder-codegen ldpc-decoder-codegen2 ldpc-offload ldpc_short_codeword_fixes load_gnb lte_uplink_improvement mac-fixes-wk45_2 mosaic5g-oai-ran mosaic5g-oai-sim new_rlc_2020 nfapi-bugfix nfapi_nr_develop ngap-dlul ngap-support ngap-w48-merge2 ngap-wf ngap-wf-1120 ngap-wf-1120-srb ngap-wf-1120-srb-gtp ngap-wf-1120-srb-gtp-hs ngap-wf-1120-srb-gtp-hs1 ngap-wf-1120-srb-gtp-hs2 ngap-wf-1203-yunsdr ngap-wf-liuyu ngap_lfq_1120 ngap_merge noCore nr-mac-pdu-wireshark nr-mac-remove-ue-list nr-rlc-am-bugfix-w44 nr-rlc-bugfix-w44 nrUE nrUE-hs nrUE-upper-layer nr_bsr nr_dl_dmrs_type2 nr_dl_pf nr_dl_pf2 nr_dl_ul_ptrs nr_fdd_if_fix nr_polar_decoder_improvement nr_prach_fr2 nr_pucch nr_pucch2 nr_ue_msg3 nr_ue_tti_cleanup nrue-multi-thread nrue_msg2_reception nsa-ue nsa_remove_band_hardcodings oai-sim oairu oc-docker-october-improvements openxg/develop pdcp-benchmark polar8 ptrs_rrc_config pusch-mthread-scaling-fix ra-dl-ul remove_nos1_hack_pdcp remove_x2_gnb_hardcoding repair-TA revert_memcpy rh_ci_fix_autoterminate rh_ci_fr1_update rh_ci_oc rh_ci_py rh_ci_rfsim_ra rh_doc_update_3 rh_fr1_newjenkins rh_fr1_update rh_gnb_compile_fix rh_wk50_debug rlc-v2-bugfix-status-reporting rlc-v2-tick rlc_v2_coverity_fixes rrc-enb-phy-testmode s1_subnormal s1ap-bugfix-rab_setup small-bugfixes-w40 smallcleanup split73 testing_2symb_pdcch testing_with_external_txdata tp-ota-test trx_thread_param ue-csi ue-fixes-ota ue_nfapi_mch ul_dl_dci_same_slot ul_harq ulsch_decode_mthread ulsim_changes usrp_fix_adc_shift_and_pps_sync x2-endc-processing yihongzheng_srb zzs
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......@@ -394,7 +394,7 @@ void fh_if4p5_south_in(RU_t *ru,
//caculate timestamp_rx, timestamp_tx based on frame and subframe
proc->tti_rx = sl;
proc->frame_rx = f;
proc->timestamp_rx = (proc->frame_rx * fp->samples_per_subframe * 10) + fp->get_samples_slot_timestamp(proc->tti_rx, fp);
proc->timestamp_rx = (proc->frame_rx * fp->samples_per_subframe * 10) + fp->get_samples_slot_timestamp(proc->tti_rx, fp, 0);
// proc->timestamp_tx = proc->timestamp_rx + (4*fp->samples_per_subframe);
proc->tti_tx = (sl+(fp->slots_per_subframe*sf_ahead))%fp->slots_per_frame;
proc->frame_tx = (sl>(fp->slots_per_frame-1-(fp->slots_per_subframe*sf_ahead))) ? (f+1)&1023 : f;
......@@ -564,7 +564,7 @@ void fh_if4p5_north_asynch_in(RU_t *ru,int *frame,int *slot) {
if ((frame_tx == 0)&&(slot_tx == 0)) proc->frame_tx_unwrap += 1024;
proc->timestamp_tx = (((uint64_t)frame_tx + (uint64_t)proc->frame_tx_unwrap) * fp->samples_per_subframe * 10) + fp->get_samples_slot_timestamp(slot_tx, fp);
proc->timestamp_tx = (((uint64_t)frame_tx + (uint64_t)proc->frame_tx_unwrap) * fp->samples_per_subframe * 10) + fp->get_samples_slot_timestamp(slot_tx, fp, 0);
LOG_D(PHY,"RU %d/%d TST %llu, frame %d, subframe %d\n",ru->idx,0,(long long unsigned int)proc->timestamp_tx,frame_tx,slot_tx);
// dump VCD output for first RU in list
......@@ -636,7 +636,7 @@ void rx_rf(RU_t *ru,int *frame,int *slot) {
AssertFatal(*slot<fp->slots_per_frame && *slot>=0, "slot %d is illegal (%d)\n",*slot,fp->slots_per_frame);
for (i=0; i<ru->nb_rx; i++)
rxp[i] = (void *)&ru->common.rxdata[i][fp->get_samples_slot_timestamp(*slot,fp)];
rxp[i] = (void *)&ru->common.rxdata[i][fp->get_samples_slot_timestamp(*slot,fp,0)];
VCD_SIGNAL_DUMPER_DUMP_FUNCTION_BY_NAME( VCD_SIGNAL_DUMPER_FUNCTIONS_TRX_READ, 1 );
old_ts = proc->timestamp_rx;
......@@ -724,7 +724,7 @@ void tx_rf(RU_t *ru,int frame,int slot, uint64_t timestamp) {
unsigned int txs;
int i,txsymb;
T(T_ENB_PHY_OUTPUT_SIGNAL, T_INT(0), T_INT(0), T_INT(frame), T_INT(slot),
T_INT(0), T_BUFFER(&ru->common.txdata[0][fp->get_samples_slot_timestamp(slot,fp)], fp->samples_per_subframe));
T_INT(0), T_BUFFER(&ru->common.txdata[0][fp->get_samples_slot_timestamp(slot,fp,0)], fp->samples_per_subframe));
int slot_type = nr_slot_select(cfg,frame,slot%fp->slots_per_frame);
int prevslot_type = nr_slot_select(cfg,frame,(slot+(fp->slots_per_frame-1))%fp->slots_per_frame);
......@@ -767,7 +767,7 @@ void tx_rf(RU_t *ru,int frame,int slot, uint64_t timestamp) {
VCD_SIGNAL_DUMPER_DUMP_VARIABLE_BY_NAME( VCD_SIGNAL_DUMPER_VARIABLES_FRAME_NUMBER_TX0_RU, frame );
VCD_SIGNAL_DUMPER_DUMP_VARIABLE_BY_NAME( VCD_SIGNAL_DUMPER_VARIABLES_TTI_NUMBER_TX0_RU, slot );
for (i=0; i<ru->nb_tx; i++)
txp[i] = (void *)&ru->common.txdata[i][fp->get_samples_slot_timestamp(slot,fp)-sf_extension];
txp[i] = (void *)&ru->common.txdata[i][fp->get_samples_slot_timestamp(slot,fp,0)-sf_extension];
VCD_SIGNAL_DUMPER_DUMP_VARIABLE_BY_NAME( VCD_SIGNAL_DUMPER_VARIABLES_TRX_TST, (timestamp-ru->openair0_cfg.tx_sample_advance)&0xffffffff );
VCD_SIGNAL_DUMPER_DUMP_FUNCTION_BY_NAME( VCD_SIGNAL_DUMPER_FUNCTIONS_TRX_WRITE, 1 );
......
......@@ -239,7 +239,8 @@ static void UE_synch(void *arg) {
if (nr_initial_sync( &syncD->proc, UE, UE->mode,2) == 0) {
freq_offset = UE->common_vars.freq_offset; // frequency offset computed with pss in initial sync
hw_slot_offset = (UE->rx_offset<<1) / UE->frame_parms.samples_per_slot;
hw_slot_offset = ((UE->rx_offset<<1) / UE->frame_parms.samples_per_subframe * UE->frame_parms.slots_per_subframe) +
round(((UE->rx_offset<<1) % UE->frame_parms.samples_per_subframe)/UE->frame_parms.samples_per_slot0);
LOG_I(PHY,"Got synch: hw_slot_offset %d, carrier off %d Hz, rxgain %d (DL %lu, UL %lu), UE_scan_carrier %d\n",
hw_slot_offset,
freq_offset,
......@@ -719,24 +720,25 @@ void *UE_thread(void *arg) {
for (int i=0; i<UE->frame_parms.nb_antennas_rx; i++)
rxp[i] = (void *)&UE->common_vars.rxdata[i][UE->frame_parms.ofdm_symbol_size+
UE->frame_parms.nb_prefix_samples0+
slot_nr*UE->frame_parms.samples_per_slot];
- UE->frame_parms.nb_prefix_samples0+UE->frame_parms.
get_samples_slot_timestamp(slot_nr,&UE->frame_parms,0)];
for (int i=0; i<UE->frame_parms.nb_antennas_tx; i++)
txp[i] = (void *)&UE->common_vars.txdata[i][((curMsg->proc.nr_tti_rx + DURATION_RX_TO_TX)%nb_slot_frame)*UE->frame_parms.samples_per_slot];
txp[i] = (void *)&UE->common_vars.txdata[i][UE->frame_parms.get_samples_slot_timestamp(
((curMsg->proc.nr_tti_rx + DURATION_RX_TO_TX)%nb_slot_frame),&UE->frame_parms,0)];
int readBlockSize, writeBlockSize;
if (slot_nr<(nb_slot_frame - 1)) {
readBlockSize=UE->frame_parms.samples_per_slot;
writeBlockSize=UE->frame_parms.samples_per_slot;
readBlockSize=UE->frame_parms.get_samples_per_slot(slot_nr,&UE->frame_parms);
writeBlockSize=UE->frame_parms.get_samples_per_slot(slot_nr,&UE->frame_parms);
} else {
UE->rx_offset_diff = computeSamplesShift(UE);
readBlockSize=UE->frame_parms.samples_per_slot -
readBlockSize=UE->frame_parms.get_samples_per_slot(slot_nr,&UE->frame_parms) -
UE->frame_parms.ofdm_symbol_size -
UE->frame_parms.nb_prefix_samples0 -
UE->rx_offset_diff;
writeBlockSize=UE->frame_parms.samples_per_slot -
writeBlockSize=UE->frame_parms.get_samples_per_slot(slot_nr,&UE->frame_parms) -
UE->rx_offset_diff;
}
......@@ -750,7 +752,8 @@ void *UE_thread(void *arg) {
AssertFatal( writeBlockSize ==
UE->rfdevice.trx_write_func(&UE->rfdevice,
timestamp+
(DURATION_RX_TO_TX*UE->frame_parms.samples_per_slot) -
UE->frame_parms.get_samples_slot_timestamp(slot_nr,
&UE->frame_parms,DURATION_RX_TO_TX) -
UE->frame_parms.ofdm_symbol_size-UE->frame_parms.nb_prefix_samples0 -
openair0_cfg[0].tx_sample_advance,
txp,
......@@ -774,7 +777,8 @@ void *UE_thread(void *arg) {
}
curMsg->proc.timestamp_tx = timestamp+
(DURATION_RX_TO_TX*UE->frame_parms.samples_per_slot)-
UE->frame_parms.get_samples_slot_timestamp(slot_nr,
&UE->frame_parms,DURATION_RX_TO_TX) -
UE->frame_parms.ofdm_symbol_size-UE->frame_parms.nb_prefix_samples0;
notifiedFIFO_elt_t *res;
......
......@@ -229,13 +229,17 @@ uint32_t get_samples_per_slot(int slot, NR_DL_FRAME_PARMS* fp)
return fp->samples_per_slot0;
}
uint32_t get_samples_slot_timestamp(int slot, NR_DL_FRAME_PARMS* fp)
uint32_t get_samples_slot_timestamp(int slot, NR_DL_FRAME_PARMS* fp, uint8_t sl_ahead)
{
uint32_t samp_count = 0;
for(uint8_t idx_slot = 0; idx_slot < slot; idx_slot++)
samp_count += fp->get_samples_per_slot(idx_slot, fp);
if(!sl_ahead) {
for(uint8_t idx_slot = 0; idx_slot < slot; idx_slot++)
samp_count += fp->get_samples_per_slot(idx_slot, fp);
} else {
for(uint8_t idx_slot = slot; idx_slot < slot+sl_ahead; idx_slot++)
samp_count += fp->get_samples_per_slot(idx_slot, fp);
}
return samp_count;
}
......
......@@ -364,7 +364,7 @@ uint8_t nr_ue_pusch_common_procedures(PHY_VARS_NR_UE *UE,
timing_advance = 0;
#endif
tx_offset = frame_parms->get_samples_slot_timestamp(slot,frame_parms) - timing_advance;
tx_offset = frame_parms->get_samples_slot_timestamp(slot,frame_parms,0) - timing_advance;
if (tx_offset < 0)
tx_offset += frame_parms->samples_per_frame;
......
......@@ -227,7 +227,7 @@ typedef struct NR_DL_FRAME_PARMS NR_DL_FRAME_PARMS;
typedef uint32_t (*get_samples_per_slot_t)(int slot, NR_DL_FRAME_PARMS* fp);
typedef uint32_t (*get_samples_slot_timestamp_t)(int slot, NR_DL_FRAME_PARMS* fp);
typedef uint32_t (*get_samples_slot_timestamp_t)(int slot, NR_DL_FRAME_PARMS* fp, uint8_t sl_ahead);
struct NR_DL_FRAME_PARMS {
/// frequency range
......
......@@ -66,7 +66,7 @@ void nr_feptx0(RU_t *ru,int tti_tx,int first_symbol, int num_symbols, int aa) {
//VCD_SIGNAL_DUMPER_DUMP_FUNCTION_BY_NAME(VCD_SIGNAL_DUMPER_FUNCTIONS_PHY_PROCEDURES_RU_FEPTX_OFDM+(first_symbol!=0?1:0) , 1 );
slot_offset = fp->get_samples_slot_timestamp(slot,fp);
slot_offset = fp->get_samples_slot_timestamp(slot,fp,0);
slot_offsetF = first_symbol*fp->ofdm_symbol_size;
......@@ -370,7 +370,7 @@ void nr_feptx_ofdm(RU_t *ru,int frame_tx,int tti_tx) {
int slot_sizeF = (fp->ofdm_symbol_size)*
((cyclic_prefix_type == 1) ? 12 : 14);
int slot = tti_tx;
int *txdata = &ru->common.txdata[aa][fp->get_samples_slot_timestamp(slot,fp)];
int *txdata = &ru->common.txdata[aa][fp->get_samples_slot_timestamp(slot,fp,0)];
if (nr_slot_select(cfg,frame_tx,slot) == NR_UPLINK_SLOT) return;
......
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