Skip to content
Projects
Groups
Snippets
Help
Loading...
Help
Support
Keyboard shortcuts
?
Submit feedback
Contribute to GitLab
Sign in / Register
Toggle navigation
O
OpenXG-RAN
Project overview
Project overview
Details
Activity
Releases
Repository
Repository
Files
Commits
Branches
Tags
Contributors
Graph
Compare
Issues
0
Issues
0
List
Boards
Labels
Milestones
Merge Requests
0
Merge Requests
0
CI / CD
CI / CD
Pipelines
Jobs
Schedules
Analytics
Analytics
CI / CD
Repository
Value Stream
Wiki
Wiki
Snippets
Snippets
Members
Members
Collapse sidebar
Close sidebar
Activity
Graph
Create a new issue
Jobs
Commits
Issue Boards
Open sidebar
canghaiwuhen
OpenXG-RAN
Commits
c0e5a180
Commit
c0e5a180
authored
4 years ago
by
Robert Schmidt
Browse files
Options
Browse Files
Download
Email Patches
Plain Diff
Separate CCE allocation, MCS, RB Alloc in UL sched
parent
5244da26
develop
NR_FR2_RA
NR_PUCCH_MultiUE
NR_UL_scheduler
develop-sib1
fix_do_ra_data
integration_2020_wk50
integration_2020_wk50_1
openxg/develop
rh_wk50_debug
No related merge requests found
Changes
1
Hide whitespace changes
Inline
Side-by-side
Showing
1 changed file
with
30 additions
and
31 deletions
+30
-31
openair2/LAYER2/NR_MAC_gNB/gNB_scheduler_ulsch.c
openair2/LAYER2/NR_MAC_gNB/gNB_scheduler_ulsch.c
+30
-31
No files found.
openair2/LAYER2/NR_MAC_gNB/gNB_scheduler_ulsch.c
View file @
c0e5a180
...
...
@@ -502,6 +502,33 @@ void nr_schedule_ulsch(module_id_t module_id,
const
int
slot_idx
=
(
slot
+
K2
)
%
num_slots_per_tdd
;
if
(
is_xlsch_in_slot
(
ulsch_in_slot_bitmap
,
slot_idx
)
&&
(
!
get_softmodem_params
()
->
phy_test
||
slot_idx
==
8
))
{
const
int
target_ss
=
NR_SearchSpace__searchSpaceType_PR_ue_Specific
;
NR_SearchSpace_t
*
ss
=
get_searchspace
(
bwp
,
target_ss
);
uint8_t
nr_of_candidates
,
aggregation_level
;
find_aggregation_candidates
(
&
aggregation_level
,
&
nr_of_candidates
,
ss
);
NR_ControlResourceSet_t
*
coreset
=
get_coreset
(
bwp
,
ss
,
1
/* dedicated */
);
const
int
cid
=
coreset
->
controlResourceSetId
;
const
uint16_t
Y
=
UE_info
->
Y
[
UE_id
][
cid
][
nr_mac
->
current_slot
];
const
int
m
=
UE_info
->
num_pdcch_cand
[
UE_id
][
cid
];
int
CCEIndex
=
allocate_nr_CCEs
(
nr_mac
,
bwp
,
coreset
,
aggregation_level
,
Y
,
m
,
nr_of_candidates
);
if
(
CCEIndex
<
0
)
{
LOG_E
(
MAC
,
"%s(): CCE list not empty, couldn't schedule PUSCH
\n
"
,
__func__
);
return
;
}
UE_info
->
num_pdcch_cand
[
UE_id
][
cid
]
++
;
const
uint8_t
mcs
=
9
;
const
uint16_t
rbStart
=
0
;
const
uint16_t
rbSize
=
get_softmodem_params
()
->
phy_test
?
50
:
NRRIV2BW
(
ubwp
->
bwp_Common
->
genericParameters
.
locationAndBandwidth
,
275
);
nfapi_nr_ul_dci_request_t
*
UL_dci_req
=
&
RC
.
nrmac
[
module_id
]
->
UL_dci_req
[
0
];
UL_dci_req
->
SFN
=
frame
;
UL_dci_req
->
Slot
=
slot
;
...
...
@@ -519,9 +546,6 @@ void nr_schedule_ulsch(module_id_t module_id,
//UL_tti_req = &nr_mac->UL_tti_req[CC_id];
const
int
target_ss
=
NR_SearchSpace__searchSpaceType_PR_ue_Specific
;
NR_SearchSpace_t
*
ss
=
get_searchspace
(
bwp
,
target_ss
);
int
dci_formats
[
2
];
if
(
ss
->
searchSpaceType
->
choice
.
ue_Specific
->
dci_Formats
)
dci_formats
[
0
]
=
NR_UL_DCI_FORMAT_0_1
;
...
...
@@ -560,7 +584,7 @@ void nr_schedule_ulsch(module_id_t module_id,
else
pusch_pdu
->
data_scrambling_id
=
*
scc
->
physCellId
;
pusch_pdu
->
mcs_index
=
9
;
pusch_pdu
->
mcs_index
=
mcs
;
if
(
pusch_pdu
->
transform_precoding
)
pusch_pdu
->
mcs_table
=
get_pusch_mcs_table
(
pusch_Config
->
mcs_Table
,
0
,
...
...
@@ -592,12 +616,8 @@ void nr_schedule_ulsch(module_id_t module_id,
AssertFatal
(
pusch_Config
->
resourceAllocation
==
NR_PUSCH_Config__resourceAllocation_resourceAllocationType1
,
"Only frequency resource allocation type 1 is currently supported
\n
"
);
pusch_pdu
->
resource_alloc
=
1
;
//type 1
pusch_pdu
->
rb_start
=
0
;
if
(
get_softmodem_params
()
->
phy_test
)
pusch_pdu
->
rb_size
=
50
;
else
pusch_pdu
->
rb_size
=
pusch_pdu
->
bwp_size
;
pusch_pdu
->
rb_start
=
rbStart
;
pusch_pdu
->
rb_size
=
rbSize
;
pusch_pdu
->
vrb_to_prb_mapping
=
0
;
if
(
pusch_Config
->
frequencyHopping
==
NULL
)
...
...
@@ -738,29 +758,8 @@ void nr_schedule_ulsch(module_id_t module_id,
nfapi_nr_dl_tti_pdcch_pdu_rel15_t
*
pdcch_pdu_rel15
=
&
ul_dci_request_pdu
->
pdcch_pdu
.
pdcch_pdu_rel15
;
UL_dci_req
->
numPdus
+=
1
;
LOG_D
(
MAC
,
"Configuring ULDCI/PDCCH in %d.%d
\n
"
,
frame
,
slot
);
uint8_t
nr_of_candidates
,
aggregation_level
;
find_aggregation_candidates
(
&
aggregation_level
,
&
nr_of_candidates
,
ss
);
NR_ControlResourceSet_t
*
coreset
=
get_coreset
(
bwp
,
ss
,
1
/* dedicated */
);
int
cid
=
coreset
->
controlResourceSetId
;
const
uint16_t
Y
=
UE_info
->
Y
[
UE_id
][
cid
][
slot
];
const
int
m
=
UE_info
->
num_pdcch_cand
[
UE_id
][
cid
];
int
CCEIndex
=
allocate_nr_CCEs
(
nr_mac
,
bwp
,
coreset
,
aggregation_level
,
Y
,
m
,
nr_of_candidates
);
if
(
CCEIndex
<
0
)
{
LOG_E
(
MAC
,
"%s(): CCE list not empty, couldn't schedule PUSCH
\n
"
,
__func__
);
pusch_sched
->
active
=
false
;
return
;
}
UE_info
->
num_pdcch_cand
[
UE_id
][
cid
]
++
;
nr_configure_pdcch
(
nr_mac
,
pdcch_pdu_rel15
,
UE_info
->
rnti
[
UE_id
],
...
...
This diff is collapsed.
Click to expand it.
Write
Preview
Markdown
is supported
0%
Try again
or
attach a new file
Attach a file
Cancel
You are about to add
0
people
to the discussion. Proceed with caution.
Finish editing this message first!
Cancel
Please
register
or
sign in
to comment