Commit 12e0f738 authored by hardy's avatar hardy

Merge remote-tracking branch 'origin/fix_pdsch_low_prb' into integration_2020_wk46_2

parents 4b3a67b3 cc2cc95f
dev 1 256_QAM_demod 512-dataplane-bug-in-l2nfapi_nos1 FR2_NSA Fix_SA_SIB1 NR-PHY-MAC-IF-multi-UE NRPRACH_highSpeed_saankhya NRUE_usedlschparallel NR_10MHz NR_2port_CSIRS NR_CSIRS_tomerge NR_DLUL_PF NR_DLUL_PF_4UL NR_DLUL_PF_rebased NR_DL_MIMO NR_F1C_F1U_extensions NR_FAPI_beamindex_SSB_RO NR_FAPI_beamindex_SSB_RO_SEMPROJ NR_FDD_FIX NR_FR2_RA NR_FR2_RRC_SSB NR_FR2_initsync_fixes NR_MAC_Multi_Rach_GlobalEdge NR_MAC_Multi_Rach_GlobalEdge-old NR_MAC_SSB NR_MAC_TCI_UCI_GlobalEdge NR_MCS_BLER NR_PUCCH_MultiUE NR_RA_cleanup NR_RRCReconfiguration_BWP NR_SA_F1AP_5GRECORDS NR_SA_F1AP_5GRECORDS-USIM NR_SA_F1AP_5GRECORDS-wf-0623 NR_SA_F1AP_5GRECORDS_lts NR_SA_F1AP_RFSIMULATOR NR_SA_F1AP_RFSIMULATOR2 NR_SA_F1AP_RFSIMULATOR2_SRB NR_SA_F1AP_RFSIMULATOR3 NR_SA_F1AP_RFSIMULATOR3_tmp NR_SA_F1AP_RFSIMULATOR3_wf NR_SA_F1AP_RFSIMULATOR_w5GCN NR_SA_F1AP_dev NR_SA_itti_sim_wk48 NR_SA_itti_sim_wk48_hs NR_SA_itti_sim_wk48_hs1 NR_SA_w5GCN_new_gtpu NR_SCHED_HARQ NR_SCHED_PDCCH_PUCCH_HARQ NR_SCHED_PDCCH_PUCCH_HARQ_rebased NR_SCHED_fixes NR_UE_CONFIG_REQ_FIXES NR_UE_PUCCH_bugfixes NR_UE_SA NR_UE_SSB_meas NR_UE_dlsch_bugfix NR_UE_rework_test NR_UE_reworking_UCI_procedures NR_UE_stability_fixes NR_UL_SCFDMA_100MHz NR_UL_scheduler NR_UL_scheduler_rebased NR_Wireshark NR_beam_simulation NR_cleanup_PUCCH_resources NR_gNB_initial_MIB_fix NR_mac_uci_functions_rework NR_multiplexing_HARQ_CSI_PUCCH NR_new_ul_antennaports NR_phytest_bugfixes NR_reworking_UL_antennaports NR_scheduling_CSIRS NR_scheduling_request NR_scheduling_request2 NR_scheduling_request3 PBCHNRTCFIX RFquality Saankhya_NRPRACH_HighSpeed Test_SA_5GREC add-dmrs-test add-ru-docker-image avxllr bandwidth-testing benetel_config_file_fix benetel_dpdk20 benetel_driver_uldl_pf_merge benetel_driver_update benetel_fixes bsr-fix bugfix-free-ra-process bugfix-nr-ldpc-post-processing bugfix-nr-ldpc-size-typo bugfix-nr-pdcp-sn-size bugfix-nr-t-reordering bugfix-x2-SgNBAdditionRequest bugfix_gnb_rt_stats_html bupt-sa-merge ci-add-sabox-support ci-deploy-asterix ci-deploy-docker-compose ci-fix-module-ul-iperf ci-new-docker-pipeline ci-reduce-nb-vms ci-test ci_benetel_longrun_limits ci_benetel_test ci_fix_iperf_for_module ci_hotfix_module_ue_ip_address ci_improve_module_ctl ci_nsa_2x2_implem ci_nsa_benetel ci_nsa_fixes ci_nsa_pipes_improve ci_nsa_test_integration_2021_wk19 ci_nsa_traces ci_nsa_uplink ci_phytest ci_quectel_support ci_sa_rfsim_test ci_solve_ul_for_module ci_test_5GREC ci_test_nsa_2x2 ci_test_nsa_fix_quectel_nic ci_test_nsa_on_develop ci_test_ra_fr2 ci_testinfra_as_code ci_update_build_nasmesh ci_vm_resource_fix cleanup_softmodem_main code-cleanup-20210716 constant_power debug-UL-5GRECORDS debug_UL_signal detached-w16-test develop develop-CBRA-v3 develop-CCE develop-NR_SA_F1AP_5GRECORDS develop-NR_SA_F1AP_5GRECORDS-abs develop-NR_SA_F1AP_5GRECORDS-hs develop-NR_SA_F1AP_5GRECORDS-hs1 develop-NR_SA_F1AP_5GRECORDS-lts develop-NR_SA_F1AP_5GRECORDS-lts-wf develop-NR_SA_F1AP_5GRECORDS-v3 develop-NR_SA_F1AP_5GRECORDS_100M develop-NR_SA_F1AP_5GRECORDS_LDPC_FPGA develop-NR_SA_F1AP_5GRECORDS_lfq_0607 develop-NSA_SA_fixes develop-SA-CBRA develop-SA-CBRA-CUDU develop-SA-CBRA-Msg5 develop-SA-CBRA-lts develop-SA-CBRA-ulsch-lts develop-SA-RA develop-SnT develop-aw2sori develop-oriecpriupdates develop-sib1 develop-sib1-local develop-sib1-lts develop-sib1-update develop-sib1-update-test1 develop-sib1-update-ue develop-wf-du develop_fpga_ldpc develop_stable disable_CSI_measrep dlsch_parallel docker-improvements-2021-april docker-no-cache-option dongzhanyi-zte-develop1 enhance-rfsim episys-merge episys/nsa_baseline episys/nsa_development fedora-gen-kernel-fix fft_bench_hotfix fix-check fix-compile fix-itti-segv fix-lte-ue-modem-in-docker-container fix-nr-pdcp-timer fix-nr-rlc-range-nack fix-physim-deploy fix-physim-run-script-on-cluster fix-quectel fix-realtime fix-retransmission-rbg fix-x2-without-gnb fix_NR_DLUL_PF fix_NR_DLUL_PF_benchmark fix_coreset_dmrs_idx fix_do_ra_data fix_nr_ulsim fix_rb_corruption fix_reestablishment fixes-CE-RLC-PDU-size fixgtpu flexran-repair-mme-mgmt flexran-rtc-repo-is-public git-dashboard gnb-freerun-txru gnb-n300-fixes gnb-only-test gnb-realtime-hotfix gnb-realtime-quickfix gnb-threadpool hack-bch-no-sched-sf-0 hack-exit-gnb-when-no-enb-nsa integ-w13-test-rt-issue integration_2020_wk15 integration_2020_wk46_2 integration_2020_wk47 integration_2020_wk48 integration_2020_wk48_2 integration_2020_wk49 integration_2020_wk50 integration_2020_wk50_1 integration_2020_wk51 integration_2020_wk51_2 integration_2021_wk02 integration_2021_wk02_wMR988 integration_2021_wk04 integration_2021_wk05 integration_2021_wk06 integration_2021_wk06_MR978 integration_2021_wk06_b integration_2021_wk06_c integration_2021_wk08 integration_2021_wk08_2 integration_2021_wk08_MR963 integration_2021_wk09 integration_2021_wk09_b integration_2021_wk10 integration_2021_wk10_b integration_2021_wk11 integration_2021_wk12 integration_2021_wk12_b integration_2021_wk13_a integration_2021_wk13_b integration_2021_wk13_b_fix_tdas integration_2021_wk13_b_fixed integration_2021_wk13_c integration_2021_wk14_a integration_2021_wk15_a integration_2021_wk16 integration_2021_wk17_a integration_2021_wk17_b integration_2021_wk18_a integration_2021_wk18_b integration_2021_wk19 integration_2021_wk20_a integration_2021_wk22 integration_2021_wk23 integration_2021_wk27 integration_2021_wk28 integration_2021_wk30 integration_2021_wk30_b integration_w5GC_CBRA_test inter-RRU-final itti-enhancement ldpc_offload_t1 ldpc_short_codeword_fixes lte-ulsch-bugfix lte_uplink_improvement migrate-cpp-check-container migrate-vm-pipeline-to-bionic minor-fix-doc-basic-sim mosaic5g-oai-ran mosaic5g-oai-sim msg4_phy_0303_lfq multiple_ssb_sib1_bugfix nasmesh_kernel_5.8 new-gtpu nfapi_nr_arch_mod nfapi_nr_develop nfapi_nr_develop_new nr-bsr-fix nr-dl-mimo-2layer nr-dmrs-fixes nr-pdcp-benchmarking nr-pdcp-improvements nr-pdcp-nea2-security nr-pdcp-nia2-integrity nr-pdcp-small-bugfixes nr-pdcp-srb-integrity nr-ra-fix nr-stats-print nrPBCHTCFix nrPbchTcFix nr_bsr nr_dl_pf nr_dl_ul_ptrs nr_improve_chanest nr_power_measurement_fixes nr_prach_fr2 nr_ue_pdcp_fix nr_ue_remove_high_speed_flag nr_ue_tti_cleanup nr_ul_pf nr_ul_scfdma oai-sim oairu oairu-dockerfile-support openxg/develop phy-asan-fixes physim-build-deploy physim-deploy-handle-error-cases prb_based_dl_channel_estimation ptrs_rrc_config pusch-mthread-scaling-fix pusch-retrans-fix-ue recursive-cmake remove_nos1_hack_pdcp repair-TA rh-ci-add-ue-parallelization rh_ci_add_runtime_stats rh_ci_add_uldlharq_stats rh_ci_fix_autoterminate rh_ci_gsheet_rt_monitoring rh_ci_nsa2jenkins rh_ci_nsa_test_n310 rh_ci_phy_test_improve rh_ci_ra_fr2 rh_ci_test_benetel rh_ci_test_nsa rh_ci_test_nsa_wk16 rh_ci_test_nsa_wk17_b rh_ci_test_nsa_wk17b rh_ci_test_rfsim_sa rh_ci_ue_parallel rh_fr1_newjenkins rh_fr1_update rh_gnb_compile_fix rh_wk50_debug rlc-v2-bugfix-status-reporting rlc-v2-tick rohan_ulsim2RxFix rrc-enb-phy-testmode s1-subnormal_rewrite s1_subnormal s1_subnormal-robert sa-merge-rrc-srb sa-msg4 sa-msg4-rrc sa-msg4-rrc-yihz sa-msg4-rrc-yihz-hs sa_rrc_yihz sanitize-address sanitize-v1 sanitize-v1-tmp sarma_pvnp_oai scs_60_iisc sim-channels small-config-change small_nr_bugfixes t-gnb-tracer test-5GREC test-nsa-benetel test-panos test_nsa_gtpu_fix test_rt-fix_phy-test ue-dci-false-detection ue-fixes ue-pdsch-pusch-parallel ue-race-fix ue_beam_selection ul-freq-iq-samps-to-file usrp_stop_cleanly usrp_x400 wf-sa-rrc wf_testc wireshark-T-hack-ueid wireshark-log-scheduling-requests wk11-with-phytest x2_handle_sctp_shutdown xiangwab xiangwan xw2 yihongzheng_srb 2021.wk14_a 2021.wk13_d 2021.wk13_c 2021.w30 2021.w29 2021.w28 2021.w27 2021.w26 2021.w25 2021.w24 2021.w23 2021.w22 2021.w20 2021.w19 2021.w18_b 2021.w18_a 2021.w17_b 2021.w16 2021.w15 2021.w14 2021.w13_a 2021.w12 2021.w11 2021.w10 2021.w09 2021.w08 2021.w06 2021.w05 2021.w04 2021.w02 2020.w51_2 2020.w51 2020.w50 2020.w49 2020.w48_2 2020.w48 2020.w47 2020.w46_2 benetel_gnb_rel_2.0 benetel_gnb_rel_1.0 benetel_enb_rel_2.0 benetel_enb_rel_1.0
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......@@ -758,6 +758,9 @@ void init_nr_ue_transport(PHY_VARS_NR_UE *ue,
//ue->frame_parms.pucch_config_common.deltaPUCCH_Shift = 1;
ue->dlsch_MCH[0] = new_nr_ue_dlsch(1,NR_MAX_DLSCH_HARQ_PROCESSES,NSOFT,MAX_LDPC_ITERATIONS_MBSFN,ue->frame_parms.N_RB_DL,0);
for(int i=0; i<5; i++)
ue->dl_stats[i] = 0;
}
......
......@@ -333,7 +333,6 @@ int nr_dlsch_encoding(PHY_VARS_gNB *gNB,
uint8_t mod_order = rel15->qamModOrder[0];
uint16_t Kr=0,r;
uint32_t r_offset=0;
uint8_t BG=1;
uint32_t E;
uint8_t Ilbrm = 1;
uint32_t Tbslbrm = 950984; //max tbs
......@@ -431,9 +430,9 @@ int nr_dlsch_encoding(PHY_VARS_gNB *gNB,
Coderate = (float) R /(float) 2048;
if ((A <=292) || ((A<=3824) && (Coderate <= 0.6667)) || Coderate <= 0.25)
BG = 2;
dlsch->harq_processes[harq_pid]->BG = 2;
else
BG = 1;
dlsch->harq_processes[harq_pid]->BG = 1;
start_meas(dlsch_segmentation_stats);
Kb = nr_segmentation(dlsch->harq_processes[harq_pid]->b,
......@@ -443,7 +442,7 @@ int nr_dlsch_encoding(PHY_VARS_gNB *gNB,
&dlsch->harq_processes[harq_pid]->K,
Zc,
&dlsch->harq_processes[harq_pid]->F,
BG);
dlsch->harq_processes[harq_pid]->BG);
stop_meas(dlsch_segmentation_stats);
F = dlsch->harq_processes[harq_pid]->F;
......@@ -480,7 +479,7 @@ int nr_dlsch_encoding(PHY_VARS_gNB *gNB,
for(int j=0;j<(dlsch->harq_processes[harq_pid]->C/8+1);j++) {
impp.macro_num=j;
nrLDPC_encoder(dlsch->harq_processes[harq_pid]->c,dlsch->harq_processes[harq_pid]->d,*Zc,Kb,Kr,BG,&impp);
nrLDPC_encoder(dlsch->harq_processes[harq_pid]->c,dlsch->harq_processes[harq_pid]->d,*Zc,Kb,Kr,dlsch->harq_processes[harq_pid]->BG,&impp);
}
......@@ -532,7 +531,7 @@ int nr_dlsch_encoding(PHY_VARS_gNB *gNB,
start_meas(dlsch_rate_matching_stats);
nr_rate_matching_ldpc(Ilbrm,
Tbslbrm,
BG,
dlsch->harq_processes[harq_pid]->BG,
*Zc,
dlsch->harq_processes[harq_pid]->d[r],
dlsch->harq_processes[harq_pid]->e+r_offset,
......
......@@ -253,13 +253,15 @@ uint32_t nr_dlsch_decoding(PHY_VARS_NR_UE *phy_vars_ue,
}
t_nrLDPC_procBuf** p_nrLDPC_procBuf = harq_process->p_nrLDPC_procBuf;
// HARQ stats
phy_vars_ue->dl_stats[harq_process->round]++;
int16_t z [68*384];
int8_t l [68*384];
//__m128i l;
//int16_t inv_d [68*384];
uint8_t kc;
uint8_t Ilbrm = 0;
uint8_t Ilbrm = 1;
uint32_t Tbslbrm;// = 950984;
uint16_t nb_rb;// = 30;
......@@ -663,6 +665,7 @@ uint32_t nr_dlsch_decoding(PHY_VARS_NR_UE *phy_vars_ue,
if (harq_process->round >= dlsch->Mlimit) {
harq_process->status = SCH_IDLE;
harq_process->round = 0;
phy_vars_ue->dl_stats[4]++;
}
if(is_crnti)
......
......@@ -139,6 +139,8 @@ typedef struct {
uint32_t num_of_mod_symbols;
// decode phich
uint8_t decode_phich;
// Encoder BG
uint8_t BG;
} NR_UL_UE_HARQ_t;
typedef struct {
......
......@@ -232,7 +232,6 @@ int nr_ulsch_encoding(NR_UE_ULSCH_t *ulsch,
uint8_t mod_order;
uint16_t Kr,r;
uint32_t r_offset;
uint8_t BG;
uint32_t E,Kb;
uint8_t Ilbrm;
uint32_t Tbslbrm;
......@@ -255,7 +254,6 @@ int nr_ulsch_encoding(NR_UE_ULSCH_t *ulsch,
R = nr_get_code_rate_ul(harq_process->pusch_pdu.mcs_index, harq_process->pusch_pdu.mcs_table);
Kr=0;
r_offset=0;
BG = 1;
F=0;
Ilbrm = 0;
Tbslbrm = 950984; //max tbs
......@@ -327,10 +325,10 @@ int nr_ulsch_encoding(NR_UE_ULSCH_t *ulsch,
Coderate = (float) R /(float) 2048;
if ((A <=292) || ((A<=3824) && (Coderate <= 0.6667)) || Coderate <= 0.25){
BG = 2;
harq_process->BG = 2;
}
else{
BG = 1;
harq_process->BG = 1;
}
VCD_SIGNAL_DUMPER_DUMP_FUNCTION_BY_NAME(VCD_SIGNAL_DUMPER_FUNCTIONS_NR_SEGMENTATION, VCD_FUNCTION_IN);
......@@ -341,7 +339,7 @@ int nr_ulsch_encoding(NR_UE_ULSCH_t *ulsch,
&harq_process->K,
pz,
&harq_process->F,
BG);
harq_process->BG);
VCD_SIGNAL_DUMPER_DUMP_FUNCTION_BY_NAME(VCD_SIGNAL_DUMPER_FUNCTIONS_NR_SEGMENTATION, VCD_FUNCTION_OUT);
F = harq_process->F;
......@@ -401,7 +399,7 @@ int nr_ulsch_encoding(NR_UE_ULSCH_t *ulsch,
for(int j = 0; j < (harq_process->C/8 + 1); j++)
{
impp.macro_num = j;
nrLDPC_encoder(harq_process->c,harq_process->d,*pz,Kb,Kr,BG,&impp);
nrLDPC_encoder(harq_process->c,harq_process->d,*pz,Kb,Kr,harq_process->BG,&impp);
}
VCD_SIGNAL_DUMPER_DUMP_FUNCTION_BY_NAME(VCD_SIGNAL_DUMPER_FUNCTIONS_LDPC_ENCODER_OPTIM, VCD_FUNCTION_OUT);
......@@ -451,7 +449,7 @@ int nr_ulsch_encoding(NR_UE_ULSCH_t *ulsch,
VCD_SIGNAL_DUMPER_DUMP_FUNCTION_BY_NAME(VCD_SIGNAL_DUMPER_FUNCTIONS_NR_RATE_MATCHING_LDPC, VCD_FUNCTION_IN);
nr_rate_matching_ldpc(Ilbrm,
Tbslbrm,
BG,
harq_process->BG,
*pz,
harq_process->d[r],
harq_process->e+r_offset,
......
......@@ -110,6 +110,8 @@ typedef struct {
uint32_t K;
/// Number of "Filler" bits
uint32_t F;
/// Encoder BG
uint8_t BG;
} NR_DL_gNB_HARQ_t;
typedef struct {
......
......@@ -1121,6 +1121,8 @@ typedef struct {
SLIST_HEAD(ral_thresholds_gen_poll_s, ral_threshold_phy_t) ral_thresholds_gen_polled[RAL_LINK_PARAM_GEN_MAX];
SLIST_HEAD(ral_thresholds_lte_poll_s, ral_threshold_phy_t) ral_thresholds_lte_polled[RAL_LINK_PARAM_LTE_MAX];
#endif
int dl_stats[5];
} PHY_VARS_NR_UE;
......
......@@ -93,7 +93,6 @@ int8_t nr_ue_scheduled_response(nr_scheduled_response_t *scheduled_response){
if (dlsch0_harq){
dlsch0_harq->status = ACTIVE;
dlsch0_harq->BWPStart = dlsch_config_pdu->BWPStart;
dlsch0_harq->BWPSize = dlsch_config_pdu->BWPSize;
dlsch0_harq->nb_rb = dlsch_config_pdu->number_rbs;
......
......@@ -491,6 +491,8 @@ harq_result_t downlink_harq_process(NR_DL_UE_HARQ_t *dl_harq, int harq_pid, int
dl_harq->round++;
if (dl_harq->harq_ack.ack) dl_harq->status = SCH_IDLE;
result_harq = RETRANSMISSION_HARQ;
NR_TST_PHY_PRINTF("[HARQ-DL-PDSCH harqId : %d] reception of a retransmission \n", harq_pid);
......
......@@ -1776,6 +1776,12 @@ int phy_procedures_nrUE_RX(PHY_VARS_NR_UE *ue,
}
}
if ((frame_rx%64 == 0) && (nr_tti_rx==0)) {
printf("============================================\n");
LOG_I(PHY,"Harq round stats for Downlink: %d/%d/%d/%d DLSCH errors: %d\n",ue->dl_stats[0],ue->dl_stats[1],ue->dl_stats[2],ue->dl_stats[3],ue->dl_stats[4]);
printf("============================================\n");
}
#ifdef NR_PDCCH_SCHED
nr_gold_pdcch(ue, 0, 2);
......
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