Commit 818c9b2c authored by Laurent THOMAS's avatar Laurent THOMAS

first pass

parent b28ac6d9
......@@ -45,6 +45,8 @@ include_directories(${CONFIG_INCLUDE_DIRS})
pkg_search_module(CRYPTO libcrypto REQUIRED)
include_directories(${CRYPTO_INCLUDE_DIRS})
#uhd 4.0 and iris installs by default in /usr/local
include_directories("/usr/local/include/")
#use native cmake method as this package is not in pkg-config
if (${RF_BOARD} STREQUAL "OAI_USRP")
find_package(Boost REQUIRED)
......@@ -52,7 +54,7 @@ if (${RF_BOARD} STREQUAL "OAI_USRP")
elseif (${RF_BOARD} STREQUAL "OAI_IRIS")
include_directories("${OPENAIR_TARGETS}/ARCH/IRIS/USERSPACE/LIB/")
include_directories("/usr/local/include/")
set(HW_SOURCE ${HW_SOURCE}
${OPENAIR_TARGETS}/ARCH/IRIS/USERSPACE/LIB/iris_lib.cpp)
LINK_DIRECTORIES("/usr/local/lib")
......@@ -336,11 +338,11 @@ endif ()
add_definitions("-DASN_DISABLE_OER_SUPPORT")
#########################
set(CMAKE_EXE_LINKER_FLAGS "${CMAKE_EXE_LINKER_FLAGS} -Wl,-rpath -Wl,${CMAKE_CURRENT_BINARY_DIR}")
set(CMAKE_EXE_LINKER_FLAGS "${CMAKE_EXE_LINKER_FLAGS} --sanitize=address -Wl,-rpath -Wl,${CMAKE_CURRENT_BINARY_DIR}")
#########################
# set a flag for changes in the source code
# these changes are related to hardcoded path to include .h files
set(CMAKE_C_FLAGS_DEBUG "${CMAKE_C_FLAGS} -g3 -O0 -DMALLOC_CHECK_=3")
set(CMAKE_C_FLAGS_DEBUG "${CMAKE_C_FLAGS} -g3 -O0 --sanitize=address -DMALLOC_CHECK_=3")
set(CMAKE_C_FLAGS_RELWITHDEBINFO "${CMAKE_C_FLAGS} -g3 -DMALLOC_CHECK_=3 -O2 -fno-delete-null-pointer-checks")
set(CMAKE_C_FLAGS_RELEASE "${CMAKE_C_FLAGS} -O3")
......@@ -3088,6 +3090,7 @@ add_executable(ocp-gnb
${OPENAIR_DIR}/common/utils/nr/nr_common.c
${OPENAIR_DIR}/common/utils/utils.c
${OPENAIR_DIR}/common/utils/system.c
${OPENAIR3_DIR}/GTPV1-U/gtpv1u_gNB.c
${GTPU_need_ITTI}
${XFORMS_SOURCE_NR}
${T_SOURCE}
......
......@@ -77,7 +77,6 @@ int config_sync_var=-1;
pthread_mutex_t nfapi_sync_mutex;
pthread_cond_t nfapi_sync_cond;
int nfapi_sync_var=-1;
uint8_t nfapi_mode = NFAPI_MONOLITHIC; // Default to monolithic mode
double cpuf;
......@@ -95,6 +94,7 @@ time_stats_t nfapi_meas; // total tx time
time_stats_t softmodem_stats_rx_sf; // total rx time
// not used but needed for link
openair0_config_t openair0_cfg[MAX_CARDS];
uint16_t slot_ahead=6;
AGENT_RRC_xface *agent_rrc_xface[NUM_MAX_ENB];
AGENT_MAC_xface *agent_mac_xface[NUM_MAX_ENB];
......
......@@ -798,11 +798,11 @@ uint8_t phy_threegpplte_turbo_decoder8(int16_t *y,
n is the size in bits of the coded block, with the tail */
int n2;
llr_t y8[3*(n+16)] __attribute__((aligned(16)));
llr_t systematic0[n+16] __attribute__ ((aligned(16)));
llr_t systematic1[n+16] __attribute__ ((aligned(16)));
llr_t systematic2[n+16] __attribute__ ((aligned(16)));
llr_t yparity1[n+16] __attribute__ ((aligned(16)));
llr_t yparity2[n+16] __attribute__ ((aligned(16)));
llr_t systematic0[n+32] __attribute__ ((aligned(16)));
llr_t systematic1[n+32] __attribute__ ((aligned(16)));
llr_t systematic2[n+32] __attribute__ ((aligned(16)));
llr_t yparity1[n+32] __attribute__ ((aligned(16)));
llr_t yparity2[n+32] __attribute__ ((aligned(16)));
llr_t ext[n+128] __attribute__((aligned(16)));
llr_t ext2[n+128] __attribute__((aligned(16)));
llr_t alpha[(n+16)*8] __attribute__ ((aligned(16)));
......@@ -811,7 +811,7 @@ uint8_t phy_threegpplte_turbo_decoder8(int16_t *y,
llr_t m10[n+16] __attribute__ ((aligned(16)));
// int *pi2_p,*pi4_p,*pi5_p,*pi6_p;
int *pi4_p,*pi5_p,*pi6_p;
llr_t *s,*s1,*s2,*yp1,*yp2,*yp;
llr_t *s1,*s2,*yp1,*yp2,*yp;
unsigned int i,j,iind;//,pi;
unsigned char iteration_cnt=0;
unsigned int crc,oldcrc,crc_len;
......@@ -927,7 +927,6 @@ uint8_t phy_threegpplte_turbo_decoder8(int16_t *y,
yp128 = (int8x16_t *)y8;
#endif
s = systematic0;
s1 = systematic1;
s2 = systematic2;
yp1 = yparity1;
......@@ -938,7 +937,7 @@ uint8_t phy_threegpplte_turbo_decoder8(int16_t *y,
for (i=0; i<16 ; i++ )
for (j=0; j<n2; j+=16) {
int k=i+j;
s[k]=*yp++;
systematic0[k]=*yp++;
yp1[k]=*yp++;
yp2[k]=*yp++;
}
......@@ -948,8 +947,8 @@ uint8_t phy_threegpplte_turbo_decoder8(int16_t *y,
if (n2>n) {
/*
s[n]=0;s[n+1]=0;s[n+2]=0;s[n+3]=0;
s[n+4]=0;s[n+5]=0;s[n+6]=0;s[n+7]=0;
systematic0[n]=0;systematic0[n+1]=0;systematic0[n+2]=0;systematic0[n+3]=0;
systematic0[n+4]=0;s[n+5]=0;s[n+6]=0;s[n+7]=0;
s1[n]=0;s1[n+1]=0;s1[n+2]=0;s1[n+3]=0;
s1[n+4]=0;s1[n+5]=0;s1[n+6]=0;s1[n+7]=0;
s2[n]=0;s2[n+1]=0;s2[n+2]=0;s2[n+3]=0;
......@@ -961,26 +960,26 @@ uint8_t phy_threegpplte_turbo_decoder8(int16_t *y,
// Termination
for (i=n2; i<n2+3; i++) {
s[i]= *yp;
s1[i] = s[i] ;
s2[i] = s[i];
systematic0[i]= *yp;
s1[i] = systematic0[i] ;
s2[i] = systematic0[i];
yp++;
yp1[i] = *yp;
yp++;
#ifdef DEBUG_LOGMAP
printf("Term 1 (%u): %d %d\n",i,s[i],yp1[i]);
printf("Term 1 (%u): %d %d\n",i,systematic0[i],yp1[i]);
#endif //DEBUG_LOGMAP
}
for (i=n2+16; i<n2+19; i++) {
s[i]= *yp;
s1[i] = s[i] ;
s2[i] = s[i];
systematic0[i]= *yp;
s1[i] = systematic0[i] ;
s2[i] = systematic0[i];
yp++;
yp2[i-16] = *yp;
yp++;
#ifdef DEBUG_LOGMAP
printf("Term 2 (%u): %d %d\n",i-16,s[i],yp2[i-16]);
printf("Term 2 (%u): %d %d\n",i-16,systematic0[i],yp2[i-16]);
#endif //DEBUG_LOGMAP
}
......
This diff is collapsed.
......@@ -18,7 +18,6 @@
* For more information about the OpenAirInterface (OAI) Software Alliance:
* contact@openairinterface.org
*/
short primary_synch0[144] = {0,0,0,0,0,0,0,0,0,0,32767,0,-26120,-19785,11971,-30502,-24020,-22288,32117,6492,31311,9658,-16384,-28378,25100,-21063,-7292,-31946,20429,25618,14948,29158,11971,-30502,31311,9658,25100,-21063,-16384,28377,-24020,22287,32117,6492,-7292,31945,20429,25618,-26120,-19785,-16384,-28378,-16384,28377,-26120,-19785,-32402,4883,31311,-9659,32117,6492,-7292,-31946,32767,-1,25100,-21063,-24020,22287,-32402,4883,-32402,4883,-24020,22287,25100,-21063,32767,-1,-7292,-31946,32117,6492,31311,-9659,-32402,4883,-26120,-19785,-16384,28377,-16384,-28378,-26120,-19785,20429,25618,-7292,31945,32117,6492,-24020,22287,-16384,28377,25100,-21063,31311,9658,11971,-30502,14948,29158,20429,25618,-7292,-31946,25100,-21063,-16384,-28378,31311,9658,32117,6492,-24020,-22288,11971,-30502,-26120,-19785,32767,0,0,0,0,0,0,0,0,0,0,0};
short primary_synch1[144] = {0,0,0,0,0,0,0,0,0,0,32767,0,-31754,-8086,-24020,-22288,2448,32675,-26120,19784,27073,18458,-16384,28377,25100,21062,-29523,14217,-7292,31945,-13477,-29868,-24020,-22288,27073,18458,25100,21062,-16384,-28378,2448,-32676,-26120,19784,-29523,-14218,-7292,31945,-31754,-8086,-16384,28377,-16384,-28378,-31754,-8086,31311,-9659,27073,-18459,-26120,19784,-29523,14217,32767,-1,25100,21062,2448,-32676,31311,-9659,31311,-9659,2448,-32676,25100,21062,32767,0,-29523,14217,-26120,19784,27073,-18459,31311,-9659,-31754,-8086,-16384,-28378,-16384,28377,-31754,-8086,-7292,31945,-29523,-14218,-26120,19784,2448,-32676,-16384,-28378,25100,21062,27073,18458,-24020,-22288,-13477,-29868,-7292,31945,-29523,14217,25100,21062,-16384,28377,27073,18458,-26120,19784,2448,32675,-24020,-22288,-31754,-8086,32767,0,0,0,0,0,0,0,0,0,0,0};
short primary_synch2[144] = {0,0,0,0,0,0,0,0,0,0,32767,0,-31754,8085,-24020,22287,2448,-32676,-26120,-19785,27073,-18459,-16384,-28378,25100,-21063,-29523,-14218,-7292,-31946,-13477,29867,-24020,22287,27073,-18459,25100,-21063,-16384,28377,2448,32675,-26120,-19785,-29523,14217,-7292,-31946,-31754,8085,-16384,-28378,-16384,28377,-31754,8085,31311,9658,27073,18458,-26120,-19785,-29523,-14218,32767,0,25100,-21063,2448,32675,31311,9658,31311,9658,2448,32675,25100,-21063,32767,0,-29523,-14218,-26120,-19785,27073,18458,31311,9658,-31754,8085,-16384,28377,-16384,-28378,-31754,8085,-7292,-31946,-29523,14217,-26120,-19785,2448,32675,-16384,28377,25100,-21063,27073,-18459,-24020,22287,-13477,29867,-7292,-31946,-29523,-14218,25100,-21063,-16384,-28378,27073,-18459,-26120,-19785,2448,-32676,-24020,22287,-31754,8085,32767,-1,0,0,0,0,0,0,0,0,0,0};
......
......@@ -153,7 +153,6 @@ void phy_scope_eNB(FD_lte_phy_scope_enb *form,
int16_t **chest_t;
int16_t **chest_f;
int16_t *pusch_llr;
int32_t *pusch_comp;
int32_t *pucch1_comp;
int32_t *pucch1_thres;
int32_t *pucch1ab_comp;
......@@ -189,7 +188,7 @@ void phy_scope_eNB(FD_lte_phy_scope_enb *form,
chest_t = (int16_t **) phy_vars_enb->srs_vars[UE_id].srs_ch_estimates;
chest_f = (int16_t **) phy_vars_enb->pusch_vars[UE_id]->drs_ch_estimates;
pusch_llr = (int16_t *) phy_vars_enb->pusch_vars[UE_id]->llr;
pusch_comp = (int32_t *) phy_vars_enb->pusch_vars[UE_id]->rxdataF_comp[0];
int16_t *pusch_comp= (int16_t *) phy_vars_enb->pusch_vars[UE_id]->rxdataF_comp[0];
pucch1_comp = (int32_t *) phy_vars_enb->pucch1_stats[UE_id];
pucch1_thres = (int32_t *) phy_vars_enb->pucch1_stats_thres[UE_id];
pucch1ab_comp = (int32_t *) phy_vars_enb->pucch1ab_stats[UE_id];
......@@ -684,7 +683,7 @@ void phy_scope_UE(FD_lte_phy_scope_ue *form,
if (frame_parms->N_RB_DL != 100) {
fl_set_xyplot_data(form->pdcch_llr,bit_pdcch,llr_pdcch,12*frame_parms->N_RB_DL*2*num_pdcch_symbols,"","","");
} else {
LOG_D(PHY,"UE PDCCH LLR plot is bugged in 20 MHz BW, to be fixed !!!\n");
LOG_D(HW,"UE PDCCH LLR plot is bugged in 20 MHz BW, to be fixed !!!\n");
}
}
......@@ -698,7 +697,7 @@ void phy_scope_UE(FD_lte_phy_scope_ue *form,
if (frame_parms->N_RB_DL != 100) {
fl_set_xyplot_data(form->pdcch_comp,I,Q,12*frame_parms->N_RB_DL*num_pdcch_symbols,"","","");
} else {
LOG_D(PHY,"UE PDCCH COMP plot is bugged in 20 MHz BW, to be fixed !!!\n");
LOG_D(HW,"UE PDCCH COMP plot is bugged in 20 MHz BW, to be fixed !!!\n");
}
}
......@@ -714,7 +713,7 @@ void phy_scope_UE(FD_lte_phy_scope_ue *form,
if (frame_parms->N_RB_DL != 100) {
fl_set_xyplot_data(form->pdsch_llr,bit,llr,coded_bits_per_codeword,"","","");
} else {
LOG_D(PHY,"UE PDSCH LLR plot is bugged in 20 MHz BW, to be fixed !!!\n");
LOG_D(HW,"UE PDSCH LLR plot is bugged in 20 MHz BW, to be fixed !!!\n");
}
}
......
......@@ -44,6 +44,11 @@ struct complex {
double y;
};
struct complexd {
double r;
double i;
};
struct complexf {
float r;
float i;
......
......@@ -48,12 +48,6 @@ extern short primary_synch2[144];
extern unsigned char primary_synch0_tab[72];
extern unsigned char primary_synch1_tab[72];
extern unsigned char primary_synch2_tab[72];
extern int16_t *primary_synch0_time; //!< index: [0..ofdm_symbol_size*2[
extern int16_t *primary_synch1_time; //!< index: [0..ofdm_symbol_size*2[
extern int16_t *primary_synch2_time; //!< index: [0..ofdm_symbol_size*2[
extern int *sync_corr_ue0; //!< index [0..10*samples_per_tti[
extern int *sync_corr_ue1; //!< index [0..10*samples_per_tti[
extern int *sync_corr_ue2; //!< index [0..10*samples_per_tti[
extern int flagMag;
//extern short **txdataF_rep_tmp;
......
......@@ -55,9 +55,6 @@ extern unsigned char primary_synch2_tab[72];
extern int16_t *primary_synch0_time; //!< index: [0..ofdm_symbol_size*2[
extern int16_t *primary_synch1_time; //!< index: [0..ofdm_symbol_size*2[
extern int16_t *primary_synch2_time; //!< index: [0..ofdm_symbol_size*2[
extern int *sync_corr_ue0; //!< index [0..10*samples_per_tti[
extern int *sync_corr_ue1; //!< index [0..10*samples_per_tti[
extern int *sync_corr_ue2; //!< index [0..10*samples_per_tti[
extern int flagMag;
//extern short **txdataF_rep_tmp;
......
......@@ -47,12 +47,6 @@ extern short primary_synch2[144];
extern unsigned char primary_synch0_tab[72];
extern unsigned char primary_synch1_tab[72];
extern unsigned char primary_synch2_tab[72];
extern int16_t *primary_synch0_time; //!< index: [0..ofdm_symbol_size*2[
extern int16_t *primary_synch1_time; //!< index: [0..ofdm_symbol_size*2[
extern int16_t *primary_synch2_time; //!< index: [0..ofdm_symbol_size*2[
extern int *sync_corr_ue0; //!< index [0..10*samples_per_tti[
extern int *sync_corr_ue1; //!< index [0..10*samples_per_tti[
extern int *sync_corr_ue2; //!< index [0..10*samples_per_tti[
extern int flagMag;
//extern short **txdataF_rep_tmp;
......
......@@ -33,9 +33,6 @@ char* namepointer_log2;
#include "PHY/LTE_REFSIG/primary_synch.h"
int16_t *primary_synch0_time;
int16_t *primary_synch1_time;
int16_t *primary_synch2_time;
#include "PHY/LTE_TRANSPORT/transport_vars.h"
......
......@@ -33,9 +33,6 @@ char *namepointer_log2;
#include "PHY/LTE_REFSIG/primary_synch.h"
int16_t *primary_synch0_time;
int16_t *primary_synch1_time;
int16_t *primary_synch2_time;
PHY_VARS_UE ***PHY_vars_UE_g;
......
......@@ -175,7 +175,7 @@ void prepare_scc(NR_ServingCellConfigCommon_t *scc) {
scc->uplinkConfigCommon->initialUplinkBWP->pusch_ConfigCommon->choice.setup->msg3_DeltaPreamble = CALLOC(1,sizeof(long));
scc->uplinkConfigCommon->initialUplinkBWP->pusch_ConfigCommon->choice.setup->p0_NominalWithGrant = CALLOC(1,sizeof(long));
scc->uplinkConfigCommon->initialUplinkBWP->pucch_ConfigCommon = CALLOC(1,sizeof(struct NR_SetupRelease_PUCCH_ConfigCommon));
scc->uplinkConfigCommon->initialUplinkBWP->pucch_ConfigCommon = CALLOC(1,sizeof(*scc->uplinkConfigCommon->initialUplinkBWP->pucch_ConfigCommon));
scc->uplinkConfigCommon->initialUplinkBWP->pucch_ConfigCommon->present= NR_SetupRelease_PUCCH_ConfigCommon_PR_setup;
scc->uplinkConfigCommon->initialUplinkBWP->pucch_ConfigCommon->choice.setup = CALLOC(1,sizeof(struct NR_PUCCH_ConfigCommon));
scc->uplinkConfigCommon->initialUplinkBWP->pucch_ConfigCommon->choice.setup->p0_nominal = CALLOC(1,sizeof(long));
......@@ -297,7 +297,7 @@ void fix_scc(NR_ServingCellConfigCommon_t *scc,uint64_t ssbmap) {
void prepare_scd(NR_ServingCellConfig_t *scd) {
// Allocate downlink structures
scd->downlinkBWP_ToAddModList = CALLOC(1, sizeof(scd->downlinkBWP_ToAddModList));
scd->downlinkBWP_ToAddModList = CALLOC(1, sizeof(*scd->downlinkBWP_ToAddModList));
// Downlink bandwidth part
NR_BWP_Downlink_t *bwp = calloc(1, sizeof(*bwp));
......@@ -318,14 +318,14 @@ void prepare_scd(NR_ServingCellConfig_t *scd) {
NR_DMRS_DownlinkCfg->phaseTrackingRS->present = NR_SetupRelease_PTRS_DownlinkConfig_PR_setup;
NR_DMRS_DownlinkCfg->phaseTrackingRS->choice.setup = CALLOC(1, sizeof(*NR_DMRS_DownlinkCfg->phaseTrackingRS->choice.setup));
NR_PTRS_DownlinkConfig_t *NR_PTRS_DownlinkCfg = NR_DMRS_DownlinkCfg->phaseTrackingRS->choice.setup;
NR_PTRS_DownlinkCfg->frequencyDensity = CALLOC(1, sizeof(NR_PTRS_DownlinkCfg->frequencyDensity));
AssertFatal( NULL!= (NR_PTRS_DownlinkCfg->frequencyDensity = CALLOC(1, sizeof(*NR_PTRS_DownlinkCfg->frequencyDensity))), "");
int *dl_rbs[2];
for (int i=0;i<2;i++) {
dl_rbs[i] = CALLOC(1, sizeof(*dl_rbs[i]));
*dl_rbs[i] = 0;
ASN_SEQUENCE_ADD(&NR_PTRS_DownlinkCfg->frequencyDensity->list, dl_rbs[i]);
}
NR_PTRS_DownlinkCfg->timeDensity = CALLOC(1, sizeof(NR_PTRS_DownlinkCfg->timeDensity));
NR_PTRS_DownlinkCfg->timeDensity = CALLOC(1, sizeof(*NR_PTRS_DownlinkCfg->timeDensity));
int *dl_mcs[3];
for (int i=0;i<3;i++) {
dl_mcs[i] = CALLOC(1, sizeof(*dl_mcs[i]));
......
......@@ -337,7 +337,8 @@ config_sib2(int Mod_idP,
LTE_ARFCN_ValueEUTRA_t *ul_CArrierFreqP,
long *ul_BandwidthP,
LTE_AdditionalSpectrumEmission_t *additionalSpectrumEmissionP,
struct LTE_MBSFN_SubframeConfigList *mbsfn_SubframeConfigListP) {
struct LTE_MBSFN_SubframeConfigList *mbsfn_SubframeConfigListP,
int dl_Bandwidth) {
nfapi_config_request_t *cfg = &RC.mac[Mod_idP]->config[CC_idP];
cfg->subframe_config.pb.value = radioResourceConfigCommonP->pdsch_ConfigCommon.p_b;
cfg->subframe_config.pb.tl.tag = NFAPI_SUBFRAME_CONFIG_PB_TAG;
......@@ -345,7 +346,7 @@ config_sib2(int Mod_idP,
cfg->rf_config.reference_signal_power.value = radioResourceConfigCommonP->pdsch_ConfigCommon.referenceSignalPower;
cfg->rf_config.reference_signal_power.tl.tag = NFAPI_RF_CONFIG_REFERENCE_SIGNAL_POWER_TAG;
cfg->num_tlv++;
cfg->nfapi_config.max_transmit_power.value = cfg->rf_config.reference_signal_power.value + power_off_dB[cfg->rf_config.dl_channel_bandwidth.value];
cfg->nfapi_config.max_transmit_power.value = cfg->rf_config.reference_signal_power.value + power_off_dB[dl_Bandwidth];
cfg->nfapi_config.max_transmit_power.tl.tag = NFAPI_NFAPI_MAXIMUM_TRANSMIT_POWER_TAG;
cfg->num_tlv++;
cfg->prach_config.configuration_index.value = radioResourceConfigCommonP->prach_Config.prach_ConfigInfo.prach_ConfigIndex;
......@@ -870,7 +871,8 @@ int rrc_mac_config_req_eNB(module_id_t Mod_idP,
config_sib2(Mod_idP, CC_idP, radioResourceConfigCommon,
radioResourceConfigCommon_BR,
NULL, ul_Bandwidth, additionalSpectrumEmission,
mbsfn_SubframeConfigList);
mbsfn_SubframeConfigList,
mib->message.dl_Bandwidth);
} // mib != NULL
if (mobilityControlInfo !=NULL) {
......
......@@ -84,7 +84,7 @@ get_mbsfn_sf_alloction(module_id_t module_idP, uint8_t CC_id,
static uint32_t bytes_in_buffer=0;
static uint32_t msi_pmch_stop=0;
uint16_t mbms_rab_id=2047;//[8] = {2047,2047,2047,2047,2047,2047,2047,2047};
rb_id_t mbms_rab_id=2047;//[8] = {2047,2047,2047,2047,2047,2047,2047,2047};
static uint32_t msi_sfs=0;
......
......@@ -65,6 +65,7 @@ extern const int cqi_to_mcs[16];
extern uint32_t RRC_CONNECTION_FLAG;
extern uint8_t rb_table[34];
extern rb_id_t mbms_rab_id;
#if defined(PRE_SCD_THREAD)
......
......@@ -72,7 +72,7 @@ extern UL_IND_t *UL_INFO;
extern int next_ra_frame;
extern module_id_t next_Mod_id;
int mbms_rab_id=2047;//[8] = {2047,2047,2047,2047,2047,2047,2047,2047};
rb_id_t mbms_rab_id=2047;//[8] = {2047,2047,2047,2047,2047,2047,2047,2047};
static int mbms_mch_i=0;
//static int num_msi_per_CSA[28];
......
......@@ -78,7 +78,6 @@ extern int nas_sock_fd[MAX_MOBILES_PER_ENB];
extern int nas_sock_mbms_fd;
extern int mbms_rab_id;
extern struct msghdr nas_msg_tx;
......@@ -113,8 +112,6 @@ int pdcp_fifo_flush_sdus(const protocol_ctxt_t *const ctxt_pP) {
* PDCP packet to pick the right socket below */
int rb_id = pdcpHead->rb_id;
int sizeToWrite= sizeof (pdcp_data_ind_header_t) +
pdcpHead->data_size;
void * pdcpData=(void*)(pdcpHead+1);
if (rb_id == 10) { //hardcoded for PC5-Signaling
if( LOG_DEBUGFLAG(DEBUG_PDCP) ) {
......@@ -128,24 +125,25 @@ int pdcp_fifo_flush_sdus(const protocol_ctxt_t *const ctxt_pP) {
} else if (UE_NAS_USE_TUN) {
//ret = write(nas_sock_fd[pdcpHead->inst], &(sdu_p->data[sizeof(pdcp_data_ind_header_t)]),sizeToWrite );
if(rb_id == mbms_rab_id){
ret = write(nas_sock_mbms_fd, pdcpData,sizeToWrite );
ret = write(nas_sock_mbms_fd, pdcpData, pdcpHead->data_size );
LOG_I(PDCP,"[PDCP_FIFOS] ret %d TRIED TO PUSH MBMS DATA TO rb_id %d handle %d sizeToWrite %d\n",
ret,rb_id,nas_sock_fd[pdcpHead->inst],sizeToWrite);
ret,rb_id,nas_sock_fd[pdcpHead->inst],pdcpHead->data_size);
}
else
{
if( LOG_DEBUGFLAG(DEBUG_PDCP) )
log_dump(PDCP, pdcpData, sizeToWrite, LOG_DUMP_CHAR,"PDCP output to be sent to TUN interface: \n");
ret = write(nas_sock_fd[pdcpHead->inst], pdcpData,sizeToWrite );
log_dump(PDCP, pdcpData, pdcpHead->data_size, LOG_DUMP_CHAR,"PDCP output to be sent to TUN interface: \n");
ret = write(nas_sock_fd[pdcpHead->inst], pdcpData,pdcpHead->data_size );
LOG_T(PDCP,"[UE PDCP_FIFOS] ret %d TRIED TO PUSH DATA TO rb_id %d handle %d sizeToWrite %d\n",
ret,rb_id,nas_sock_fd[pdcpHead->inst],sizeToWrite);
ret,rb_id,nas_sock_fd[pdcpHead->inst],pdcpHead->data_size);
}
} else if (ENB_NAS_USE_TUN) {
if( LOG_DEBUGFLAG(DEBUG_PDCP) )
log_dump(PDCP, pdcpData, sizeToWrite, LOG_DUMP_CHAR,"PDCP output to be sent to TUN interface: \n");
ret = write(nas_sock_fd[0], pdcpData, sizeToWrite);
LOG_T(PDCP,"[NB PDCP_FIFOS] ret %d TRIED TO PUSH DATA TO rb_id %d handle %d sizeToWrite %d\n",ret,rb_id,nas_sock_fd[0],sizeToWrite);
log_dump(PDCP, pdcpData, pdcpHead->data_size, LOG_DUMP_CHAR,"PDCP output to be sent to TUN interface: \n");
ret = write(nas_sock_fd[0], pdcpData, pdcpHead->data_size);
LOG_T(PDCP,"[NB PDCP_FIFOS] ret %d TRIED TO PUSH DATA TO rb_id %d handle %d sizeToWrite %d\n",ret,rb_id,nas_sock_fd[0],pdcpHead->data_size);
} else if (PDCP_USE_NETLINK) {
int sizeToWrite= sizeof (pdcp_data_ind_header_t) + pdcpHead->data_size;
memcpy(NLMSG_DATA(nas_nlh_tx), (uint8_t *) pdcpHead, sizeToWrite);
nas_nlh_tx->nlmsg_len = sizeToWrite;
ret = sendmsg(nas_sock_fd[0],&nas_msg_tx,0);
......@@ -154,7 +152,7 @@ int pdcp_fifo_flush_sdus(const protocol_ctxt_t *const ctxt_pP) {
AssertFatal(ret >= 0,"[PDCP_FIFOS] pdcp_fifo_flush_sdus (errno: %d %s), nas_sock_fd[0]: %d\n", errno, strerror(errno), nas_sock_fd[0]);
if( LOG_DEBUGFLAG(DEBUG_PDCP) )
log_dump(PDCP, pdcpData, min(sizeToWrite,30) , LOG_DUMP_CHAR,
log_dump(PDCP, pdcpData, min(pdcpHead->data_size,30) , LOG_DUMP_CHAR,
"Printing first bytes of PDCP SDU before removing it from the list: \n");
delNotifiedFIFO_elt (sdu_p);
pdcp_nb_sdu_sent ++;
......@@ -384,6 +382,7 @@ int pdcp_fifo_read_input_sdus_fromnetlinksock (const protocol_ctxt_t *const ctx
VCD_SIGNAL_DUMPER_DUMP_FUNCTION_BY_NAME( VCD_SIGNAL_DUMPER_FUNCTIONS_PDCP_FIFO_READ, 1 );
VCD_SIGNAL_DUMPER_DUMP_FUNCTION_BY_NAME( VCD_SIGNAL_DUMPER_FUNCTIONS_PDCP_FIFO_READ_BUFFER, 1 );
len = recvmsg(nas_sock_fd[0], &nas_msg_rx, 0);
printf("recev: %d\n", len);
VCD_SIGNAL_DUMPER_DUMP_FUNCTION_BY_NAME( VCD_SIGNAL_DUMPER_FUNCTIONS_PDCP_FIFO_READ_BUFFER, 0 );
if (len > 0) {
......
......@@ -2231,7 +2231,7 @@ static const plmn_data_t plmn_data[] = {
/*
310 900 Mid-Rivers Communications Mid-Rivers Wireless Operational
*/
{310, 910, "Verizon Wireless", "Verizon USA"}
{310, 910, "Verizon Wireless", "Verizon USA"},
/*
310 920 Get Mobile Inactive
310 930 Copper Valley Wireless Inactive
......@@ -2295,6 +2295,7 @@ static const plmn_data_t plmn_data[] = {
648 4 Econet Wireless Econet Operational
*/
{0,0,"",""}
};
......
......@@ -56,6 +56,8 @@
//#undef FRAME_LENGTH_COMPLEX_SAMPLES //there are two conflicting definitions, so we better make sure we don't use it at all
#include <openair1/PHY/phy_extern_ue.h>
#include "PHY/phy_vars.h"
#include "SCHED/sched_common_vars.h"
#include "LAYER2/MAC/mac_vars.h"
......
......@@ -181,8 +181,7 @@ PHY_VARS_UE *init_ue_vars(LTE_DL_FRAME_PARMS *frame_parms,
uint8_t abstraction_flag)
{
PHY_VARS_UE *ue = (PHY_VARS_UE *)malloc(sizeof(PHY_VARS_UE));
memset(ue,0,sizeof(PHY_VARS_UE));
PHY_VARS_UE *ue = (PHY_VARS_UE *)calloc(1,sizeof(PHY_VARS_UE));
if (frame_parms!=(LTE_DL_FRAME_PARMS *)NULL) { // if we want to give initial frame parms, allocate the PHY_VARS_UE structure and put them in
memcpy(&(ue->frame_parms), frame_parms, sizeof(LTE_DL_FRAME_PARMS));
......
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