Commit 9ca626b3 authored by Robert Schmidt's avatar Robert Schmidt

Avoid copy from UL_tti_req_ahead into Ul_tti_req

parent c219edfe
dev 512-dataplane-bug-in-l2nfapi_nos1 FR2_NSA Fix_SA_SIB1 NRPRACH_highSpeed_saankhya NRUE_usedlschparallel NR_10MHz NR_2port_CSIRS NR_CSIRS_tomerge NR_DLUL_PF NR_DLUL_PF_4UL NR_DLUL_PF_rebased NR_DL_MIMO NR_F1C_F1U_extensions NR_FAPI_beamindex_SSB_RO NR_FAPI_beamindex_SSB_RO_SEMPROJ NR_FDD_FIX NR_FR2_RA NR_FR2_initsync_fixes NR_MAC_Multi_Rach_GlobalEdge NR_MAC_Multi_Rach_GlobalEdge-old NR_MAC_SSB NR_MAC_TCI_UCI_GlobalEdge NR_MCS_BLER NR_PUCCH_MultiUE NR_RA_cleanup NR_RRCReconfiguration_BWP NR_SA_F1AP_5GRECORDS NR_SA_F1AP_5GRECORDS-USIM NR_SA_F1AP_5GRECORDS-wf-0623 NR_SA_F1AP_5GRECORDS_lts NR_SA_F1AP_RFSIMULATOR NR_SA_F1AP_RFSIMULATOR2 NR_SA_F1AP_RFSIMULATOR2_SRB NR_SA_F1AP_RFSIMULATOR3 NR_SA_F1AP_RFSIMULATOR3_tmp NR_SA_F1AP_RFSIMULATOR3_wf NR_SA_F1AP_RFSIMULATOR_w5GCN NR_SA_F1AP_dev NR_SA_itti_sim_wk48 NR_SA_itti_sim_wk48_hs1 NR_SA_w5GCN_new_gtpu NR_SCHED_HARQ NR_SCHED_PDCCH_PUCCH_HARQ NR_SCHED_PDCCH_PUCCH_HARQ_rebased NR_SCHED_fixes NR_UE_CONFIG_REQ_FIXES NR_UE_PUCCH_bugfixes NR_UE_SA NR_UE_SSB_meas NR_UE_dlsch_bugfix NR_UE_rework_test NR_UE_reworking_UCI_procedures NR_UL_SCFDMA_100MHz NR_UL_scheduler NR_Wireshark NR_beam_simulation NR_cleanup_PUCCH_resources NR_gNB_initial_MIB_fix NR_multiplexing_HARQ_CSI_PUCCH NR_new_ul_antennaports NR_phytest_bugfixes NR_reworking_UL_antennaports NR_scheduling_CSIRS NR_scheduling_request NR_scheduling_request2 NR_scheduling_request3 PBCHNRTCFIX RFquality Saankhya_NRPRACH_HighSpeed Test_SA_5GREC add-dmrs-test add-ru-docker-image avxllr bandwidth-testing benetel_config_file_fix benetel_dpdk20 benetel_driver_uldl_pf_merge benetel_driver_update benetel_fixes bsr-fix bugfix-free-ra-process bugfix-nr-t-reordering bugfix-x2-SgNBAdditionRequest bugfix_gnb_rt_stats_html bupt-sa-merge ci-add-sabox-support ci-fix-module-ul-iperf ci-new-docker-pipeline ci-reduce-nb-vms ci-test ci_benetel_longrun_limits ci_benetel_test ci_fix_iperf_for_module ci_hotfix_module_ue_ip_address ci_improve_module_ctl ci_nsa_2x2_implem ci_nsa_benetel ci_nsa_fixes ci_nsa_pipes_improve ci_nsa_test_integration_2021_wk19 ci_nsa_traces ci_nsa_uplink ci_phytest ci_quectel_support ci_sa_rfsim_test ci_solve_ul_for_module ci_test_5GREC ci_test_nsa_2x2 ci_test_nsa_fix_quectel_nic ci_test_nsa_on_develop ci_test_ra_fr2 ci_testinfra_as_code ci_update_build_nasmesh ci_vm_resource_fix cleanup_softmodem_main code-cleanup-20210716 debug-UL-5GRECORDS debug_UL_signal detached-w16-test develop develop-CBRA-v3 develop-CCE develop-NR_SA_F1AP_5GRECORDS develop-NR_SA_F1AP_5GRECORDS-abs develop-NR_SA_F1AP_5GRECORDS-hs develop-NR_SA_F1AP_5GRECORDS-hs1 develop-NR_SA_F1AP_5GRECORDS-lts develop-NR_SA_F1AP_5GRECORDS-lts-wf develop-NR_SA_F1AP_5GRECORDS-v3 develop-NR_SA_F1AP_5GRECORDS_100M develop-NR_SA_F1AP_5GRECORDS_LDPC_FPGA develop-NR_SA_F1AP_5GRECORDS_lfq_0607 develop-NSA_SA_fixes develop-SA-CBRA develop-SA-CBRA-CUDU develop-SA-CBRA-Msg5 develop-SA-CBRA-lts develop-SA-CBRA-ulsch-lts develop-SA-RA develop-SnT develop-aw2sori develop-sib1 develop-sib1-local develop-sib1-lts develop-sib1-update develop-sib1-update-test1 develop-sib1-update-ue develop-wf-du develop_fpga_ldpc develop_stable disable_CSI_measrep docker-improvements-2021-april docker-no-cache-option dongzhanyi-zte-develop1 enhance-rfsim episys-merge episys/nsa_baseline episys/nsa_development fedora-gen-kernel-fix fft_bench_hotfix fix-check fix-compile fix-lte-ue-modem-in-docker-container fix-nr-pdcp-timer fix-nr-rlc-range-nack fix-physim-deploy fix-physim-run-script-on-cluster fix-quectel fix-realtime fix-retransmission-rbg fix-x2-without-gnb fix_NR_DLUL_PF fix_NR_DLUL_PF_benchmark fix_coreset_dmrs_idx fix_do_ra_data fix_nr_ulsim fix_rb_corruption fix_reestablishment fixes-CE-RLC-PDU-size fixgtpu flexran-rtc-repo-is-public git-dashboard gnb-freerun-txru gnb-n300-fixes gnb-only-test gnb-realtime-hotfix gnb-realtime-quickfix gnb-threadpool hack-bch-no-sched-sf-0 hack-exit-gnb-when-no-enb-nsa integ-w13-test-rt-issue integration_2020_wk15 integration_2020_wk50 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integration_w5GC_CBRA_test inter-RRU-final itti-enhancement ldpc_offload_t1 lte-ulsch-bugfix lte_uplink_improvement migrate-cpp-check-container migrate-vm-pipeline-to-bionic minor-fix-doc-basic-sim msg4_phy_0303_lfq multiple_ssb_sib1_bugfix nasmesh_kernel_5.8 new-gtpu nfapi_nr_arch_mod nfapi_nr_develop nfapi_nr_develop_new nr-bsr-fix nr-dl-mimo-2layer nr-dmrs-fixes nr-pdcp-benchmarking nr-pdcp-improvements nr-pdcp-nea2-security nr-pdcp-nia2-integrity nr-pdcp-small-bugfixes nr-pdcp-srb-integrity nr-ra-fix nr-stats-print nrPBCHTCFix nrPbchTcFix nr_improve_chanest nr_power_measurement_fixes nr_ue_pdcp_fix nr_ue_remove_high_speed_flag nr_ul_pf nr_ul_scfdma oairu oairu-dockerfile-support openxg/develop phy-asan-fixes physim-build-deploy physim-deploy-handle-error-cases prb_based_dl_channel_estimation ptrs_rrc_config pusch-retrans-fix-ue recursive-cmake rh-ci-add-ue-parallelization rh_ci_add_runtime_stats rh_ci_add_uldlharq_stats rh_ci_gsheet_rt_monitoring rh_ci_nsa2jenkins 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......@@ -96,7 +96,6 @@ void clear_nr_nfapi_information(gNB_MAC_INST * gNB,
const int num_slots = slots_per_frame[*scc->ssbSubcarrierSpacing];
nfapi_nr_dl_tti_request_t *DL_req = &gNB->DL_req[0];
nfapi_nr_ul_tti_request_t *UL_tti_req = &gNB->UL_tti_req[0];
nfapi_nr_ul_tti_request_t *future_ul_tti_req =
&gNB->UL_tti_req_ahead[CC_idP][(slotP + num_slots - 1) % num_slots];
nfapi_nr_ul_dci_request_t *UL_dci_req = &gNB->UL_dci_req[0];
......@@ -116,13 +115,6 @@ void clear_nr_nfapi_information(gNB_MAC_INST * gNB,
UL_dci_req[CC_idP].Slot = slotP;
UL_dci_req[CC_idP].numPdus = 0;
UL_tti_req[CC_idP].SFN = frameP;
UL_tti_req[CC_idP].Slot = slotP;
UL_tti_req[CC_idP].n_pdus = 0;
UL_tti_req[CC_idP].n_ulsch = 0;
UL_tti_req[CC_idP].n_ulcch = 0;
UL_tti_req[CC_idP].n_group = 0;
/* advance last round's future UL_tti_req to be ahead of current frame/slot */
future_ul_tti_req->SFN = (slotP == 0 ? frameP : frameP + 1) % 1024;
/* future_ul_tti_req->Slot is fixed! */
......@@ -131,6 +123,10 @@ void clear_nr_nfapi_information(gNB_MAC_INST * gNB,
future_ul_tti_req->n_ulcch = 0;
future_ul_tti_req->n_group = 0;
/* UL_tti_req is a simple pointer into the current UL_tti_req_ahead, i.e.,
* it walks over UL_tti_req_ahead in a circular fashion */
gNB->UL_tti_req = &gNB->UL_tti_req_ahead[CC_idP][slotP];
TX_req[CC_idP].Number_of_PDUs = 0;
}
......@@ -297,37 +293,6 @@ void schedule_nr_SRS(module_id_t module_idP, frame_t frameP, sub_frame_t subfram
*/
void nr_schedule_pusch(int mod_id, frame_t frame, sub_frame_t slot) {
nfapi_nr_ul_tti_request_t *ul_tti_req = &RC.nrmac[mod_id]->UL_tti_req[0];
nfapi_nr_ul_tti_request_t *future_ul_tti_req =
&RC.nrmac[mod_id]->UL_tti_req_ahead[0][slot];
if (future_ul_tti_req->Slot == slot
&& future_ul_tti_req->SFN == frame
&& future_ul_tti_req->n_pdus > 0) {
LOG_D(MAC, "%4d.%2d copy %d PDUs from future_ul_tti_req\n", frame, slot, future_ul_tti_req->n_pdus);
/* the future_UL_tti_req_has data for the current frame/slot pair, copy
* everything into the "real" UL_tti_req */
ul_tti_req->SFN = future_ul_tti_req->SFN;
ul_tti_req->Slot = future_ul_tti_req->Slot;
ul_tti_req->n_pdus = future_ul_tti_req->n_pdus;
ul_tti_req->rach_present = future_ul_tti_req->rach_present;
ul_tti_req->n_ulsch = future_ul_tti_req->n_ulsch;
ul_tti_req->n_ulcch = future_ul_tti_req->n_ulcch;
ul_tti_req->n_group = future_ul_tti_req->n_group;
memcpy(ul_tti_req->pdus_list,
future_ul_tti_req->pdus_list,
ul_tti_req->n_pdus * sizeof(nfapi_nr_ul_tti_request_number_of_pdus_t));
memcpy(ul_tti_req->groups_list,
future_ul_tti_req->groups_list,
ul_tti_req->n_group * sizeof(nfapi_nr_ul_tti_request_number_of_groups_t));
future_ul_tti_req->n_pdus = 0;
future_ul_tti_req->n_ulsch = 0;
future_ul_tti_req->n_ulcch = 0;
future_ul_tti_req->n_group = 0;
}
}
bool is_xlsch_in_slot(uint64_t bitmap, sub_frame_t slot) {
return (bitmap >> slot) & 0x01;
}
......@@ -469,8 +434,6 @@ void gNB_dlsch_ulsch_scheduler(module_id_t module_idP,
if (UE_info->active[UE_id])
nr_schedule_pucch(module_idP, UE_id, nr_ulmix_slots, frame, slot);
nr_schedule_pusch(module_idP, frame, slot);
stop_meas(&RC.nrmac[module_idP]->eNB_scheduler);
VCD_SIGNAL_DUMPER_DUMP_FUNCTION_BY_NAME(VCD_SIGNAL_DUMPER_FUNCTIONS_gNB_DLSCH_ULSCH_SCHEDULER,VCD_FUNCTION_OUT);
......
......@@ -200,7 +200,7 @@ void schedule_nr_prach(module_id_t module_idP, frame_t frameP, sub_frame_t slotP
gNB_MAC_INST *gNB = RC.nrmac[module_idP];
NR_COMMON_channels_t *cc = gNB->common_channels;
NR_ServingCellConfigCommon_t *scc = cc->ServingCellConfigCommon;
nfapi_nr_ul_tti_request_t *UL_tti_req = &RC.nrmac[module_idP]->UL_tti_req[0];
nfapi_nr_ul_tti_request_t *UL_tti_req = RC.nrmac[module_idP]->UL_tti_req;
nfapi_nr_config_request_scf_t *cfg = &RC.nrmac[module_idP]->config[0];
if (is_nr_UL_slot(scc,slotP)) {
......@@ -247,8 +247,12 @@ void schedule_nr_prach(module_id_t module_idP, frame_t frameP, sub_frame_t slotP
}
UL_tti_req->SFN = frameP;
UL_tti_req->Slot = slotP;
AssertFatal(UL_tti_req->SFN == frameP && UL_tti_req->Slot == slotP,
"%d.%d UL_tti_req frame.slot %d.%d does not match PRACH %d.%d\n",
frameP, slotP,
UL_tti_req->SFN,
UL_tti_req->Slot,
frameP, slotP);
for (int fdm_index=0; fdm_index < fdm; fdm_index++) { // one structure per frequency domain occasion
for (int td_index=0; td_index<N_t_slot; td_index++) {
......
......@@ -193,8 +193,6 @@ void config_uldci(NR_BWP_Uplink_t *ubwp,
int time_domain_assignment, uint8_t tpc,
int n_ubwp, int bwp_id);
void nr_schedule_pusch(int Mod_idP, frame_t frameP, sub_frame_t slotP);
void nr_schedule_pucch(int Mod_idP,
int UE_id,
int nr_ulmix_slots,
......
......@@ -484,8 +484,9 @@ typedef struct gNB_MAC_INST_s {
nfapi_nr_config_request_scf_t config[NFAPI_CC_MAX];
/// NFAPI DL Config Request Structure
nfapi_nr_dl_tti_request_t DL_req[NFAPI_CC_MAX];
/// NFAPI UL TTI Request Structure (this is from the new SCF specs)
nfapi_nr_ul_tti_request_t UL_tti_req[NFAPI_CC_MAX];
/// NFAPI UL TTI Request Structure, simple pointer into structure
/// UL_tti_req_ahead for current frame/slot
nfapi_nr_ul_tti_request_t *UL_tti_req;
/// NFAPI UL TTI Request Structure for future TTIs, dynamically allocated
/// because length depends on number of slots
nfapi_nr_ul_tti_request_t *UL_tti_req_ahead[NFAPI_CC_MAX];
......
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