Skip to content
Projects
Groups
Snippets
Help
Loading...
Help
Support
Keyboard shortcuts
?
Submit feedback
Contribute to GitLab
Sign in / Register
Toggle navigation
O
OpenXG-RAN
Project overview
Project overview
Details
Activity
Releases
Repository
Repository
Files
Commits
Branches
Tags
Contributors
Graph
Compare
Issues
0
Issues
0
List
Boards
Labels
Milestones
Merge Requests
0
Merge Requests
0
CI / CD
CI / CD
Pipelines
Jobs
Schedules
Analytics
Analytics
CI / CD
Repository
Value Stream
Wiki
Wiki
Snippets
Snippets
Members
Members
Collapse sidebar
Close sidebar
Activity
Graph
Create a new issue
Jobs
Commits
Issue Boards
Open sidebar
wangjie
OpenXG-RAN
Commits
cceab3e8
Commit
cceab3e8
authored
6 years ago
by
Florian Kaltenberger
Browse files
Options
Browse Files
Download
Email Patches
Plain Diff
cleaning up PBCH procedures
parent
d2df2f00
dev
1
128-ues
256_QAM_demod
408-reworked
408-ue-main-threads
445-LDPC-implementation-on-GPU
459-pusch-based-ta-updates
464-ru_beamforming_in_gpu
464-ru_beamforming_in_gpu-CPUsubfunction
472-add-pusch-dmrs-modes
481-ldpc-decoder-on-gpu
512-dataplane-bug-in-l2nfapi_nos1
5g_fapi_scf
FR2_NSA
Fix_SA_SIB1
LTE_TRX_on_single_port
NCTU_CS_ISIP
NCTU_CS_ISIP_CPU
NCTU_CS_ISIP_GPU
NCTU_OpinConnect_Beamforming_ISIP
NCTU_OpinConnect_LDPC
NR-PHY-MAC-IF-multi-UE
NRPRACH_highSpeed_saankhya
NRUE_usedlschparallel
NR_10MHz
NR_2port_CSIRS
NR_CSIRS_tomerge
NR_CSI_reporting
NR_DCI_01
NR_DLUL_PF
NR_DLUL_PF_4UL
NR_DLUL_PF_rebased
NR_DL_MIMO
NR_DL_sched_fixes
NR_DL_scheduler
NR_F1C_F1U_extensions
NR_FAPI_beamindex_SSB_RO
NR_FAPI_beamindex_SSB_RO_SEMPROJ
NR_FDD_FIX
NR_FR2_RA
NR_FR2_RRC_SSB
NR_FR2_initsync_fixes
NR_MAC_CE_GlobalEdge
NR_MAC_Multi_Rach_GlobalEdge
NR_MAC_Multi_Rach_GlobalEdge-old
NR_MAC_SSB
NR_MAC_SSB_RO_GlobalEdge
NR_MAC_SSB_RO_UE_IDCC
NR_MAC_SSB_RO_merge
NR_MAC_TCI_UCI_GlobalEdge
NR_MCS_BLER
NR_NGAP
NR_PDCP_noS1
NR_PUCCH_MultiUE
NR_RA_cleanup
NR_RA_updates
NR_RRCConfiguragion_FR2
NR_RRCConfiguration
NR_RRCConfiguration_FR2
NR_RRCConfiguration_S1U
NR_RRCConfiguration_merge_develop
NR_RRCConfiguration_sync_source
NR_RRCConfiguration_trx_thread
NR_RRCReconfiguration_BWP
NR_RRC_CP_bugfix
NR_RRC_PDCP
NR_RRC_PRACH_procedures
NR_RRC_PRACH_procedures_todevelop
NR_RRC_PUSCH
NR_RRC_TA
NR_RRC_X2AP_AMBR_Change_Global_edge
NR_RRC_X2AP_RemoveHardcodings_GlobalEdge
NR_RRC_config_simplified
NR_RRC_harq
NR_RRC_harq_b
NR_RRC_harq_hacks
NR_RRC_harq_newdcipdu
NR_SA_F1AP_5GRECORDS
NR_SA_F1AP_5GRECORDS-USIM
NR_SA_F1AP_5GRECORDS-wf-0623
NR_SA_F1AP_5GRECORDS_lts
NR_SA_F1AP_RFSIMULATOR
NR_SA_F1AP_RFSIMULATOR2
NR_SA_F1AP_RFSIMULATOR2_SRB
NR_SA_F1AP_RFSIMULATOR3
NR_SA_F1AP_RFSIMULATOR3_tmp
NR_SA_F1AP_RFSIMULATOR3_wf
NR_SA_F1AP_RFSIMULATOR_w5GCN
NR_SA_F1AP_dev
NR_SA_NGAP_RRC
NR_SA_NGAP_RRC_wk42
NR_SA_itti_sim_wk48
NR_SA_itti_sim_wk48_hs
NR_SA_itti_sim_wk48_hs1
NR_SA_w5GCN_new_gtpu
NR_SCHED
NR_SCHED_HARQ
NR_SCHED_PDCCH_PUCCH_HARQ
NR_SCHED_PDCCH_PUCCH_HARQ_rebased
NR_SCHED_fixes
NR_SRB_Config
NR_TRX_on_single_port
NR_TRX_on_single_port2
NR_UE_CONFIG_REQ_FIXES
NR_UE_MAC_scheduler
NR_UE_PUCCH_bugfixes
NR_UE_RA_fixes
NR_UE_SA
NR_UE_SSB_meas
NR_UE_UL_DCI_improvements
NR_UE_dlsch_bugfix
NR_UE_enable_parallelization
NR_UE_rework_test
NR_UE_reworking_UCI_procedures
NR_UE_stability_fixes
NR_UL_FAPI_programming
NR_UL_SCFDMA_100MHz
NR_UL_scheduler
NR_UL_scheduler_rebased
NR_UL_scheduling
NR_Wireshark
NR_beam_simulation
NR_beamforming_test
NR_cleanup_PUCCH_resources
NR_gNB_SCF_Indication
NR_gNB_initial_MIB_fix
NR_ipaccess_testing
NR_mac_uci_functions_rework
NR_msg2_phytest
NR_multiplexing_HARQ_CSI_PUCCH
NR_new_ul_antennaports
NR_phytest_bugfixes
NR_reworking_UL_antennaports
NR_scheduling_CSIRS
NR_scheduling_request
NR_scheduling_request2
NR_scheduling_request3
NR_test_S1U_RRC_PRACH_procedures
NR_ue_dlsch_dmrs_cdm
OpInConnect_ISIP
PBCHNRTCFIX
PUSCH_TA_update
RA_CI_test
RFquality
Saankhya_NRPRACH_HighSpeed
Test_SA_5GREC
UE_DL_DCI_hotfix
add-dmrs-test
add-ru-docker-image
addoptions_nr_USRPdevice
avxllr
bandwidth-testing
bch-fixes-bitmap
benetel_5g_prach_fix
benetel_config_file_fix
benetel_dpdk20
benetel_driver_uldl_pf_merge
benetel_driver_update
benetel_fixes
benetel_phase_rotation
benetel_phase_rotation_old
bsr-fix
bugfix-free-ra-process
bugfix-minor-remove-wrong-log
bugfix-nr-bands
bugfix-nr-ldpc-post-processing
bugfix-nr-ldpc-size-typo
bugfix-nr-pdcp-sn-size
bugfix-nr-rate-matching-assertion
bugfix-nr-t-reordering
bugfix-x2-SgNBAdditionRequest
bugfix_gnb_rt_stats_html
bupt-sa-merge
cce_indexing_fix
cce_indexing_fix2
ci-add-sabox-support
ci-deploy-asterix
ci-deploy-docker-compose
ci-fix-module-ul-iperf
ci-new-docker-pipeline
ci-rd-july-improvements
ci-reduce-nb-vms
ci-test
ci-ul-iperf-from-trf-container
ci_benetel_longrun_limits
ci_benetel_test
ci_fix_iperf_for_module
ci_hotfix_module_ue_ip_address
ci_improve_module_ctl
ci_nsa_2x2_implem
ci_nsa_benetel
ci_nsa_fixes
ci_nsa_pipes_improve
ci_nsa_test_integration_2021_wk19
ci_nsa_traces
ci_nsa_uplink
ci_phytest
ci_quectel_support
ci_sa_rfsim_test
ci_solve_ul_for_module
ci_test_5GREC
ci_test_nsa_2x2
ci_test_nsa_fix_quectel_nic
ci_test_nsa_on_develop
ci_test_ra_fr2
ci_testinfra_as_code
ci_update_build_nasmesh
ci_vm_resource_fix
clean-5G-scope-round2
cleanup_softmodem_main
code-cleanup-20210716
constant_power
debug-UL-5GRECORDS
debug_UL_signal
debug_branch_init_sync
detached-w16-test
develop
develop-CBRA-v3
develop-CCE
develop-NR_SA_F1AP_5GRECORDS
develop-NR_SA_F1AP_5GRECORDS-abs
develop-NR_SA_F1AP_5GRECORDS-hs
develop-NR_SA_F1AP_5GRECORDS-hs1
develop-NR_SA_F1AP_5GRECORDS-lts
develop-NR_SA_F1AP_5GRECORDS-lts-wf
develop-NR_SA_F1AP_5GRECORDS-v3
develop-NR_SA_F1AP_5GRECORDS_100M
develop-NR_SA_F1AP_5GRECORDS_LDPC_FPGA
develop-NR_SA_F1AP_5GRECORDS_lfq_0607
develop-NSA_SA_fixes
develop-SA-CBRA
develop-SA-CBRA-CUDU
develop-SA-CBRA-Msg5
develop-SA-CBRA-lts
develop-SA-CBRA-ulsch-lts
develop-SA-RA
develop-SnT
develop-aw2sori
develop-ci
develop-nr
develop-nr-fr2
develop-nr-fr2-rework
develop-nr_cppcheck
develop-oriecpriupdates
develop-sib1
develop-sib1-local
develop-sib1-lts
develop-sib1-update
develop-sib1-update-test1
develop-sib1-update-ue
develop-wf-du
develop_fpga_ldpc
develop_inria_ci_deployment
develop_inria_ci_deployment_gp
develop_integration_2020_w15
develop_integration_2020_w19
develop_integration_w08
develop_stable
dfts_alternatives
disable_CSI_measrep
dlsch-all-dlslots
dlsch_encode_mthread
dlsch_parallel
docker-improvements-2021-april
docker-no-cache-option
docupdate_tools
dongzhanyi-zte-develop
dongzhanyi-zte-develop1
dongzhanyi-zte-develop2
dreibh/apt-auth-fix
dreibh/device-load-fix
dreibh/device-load-fix-develop-branch
dual-connectivity
edrx
enhance-rfsim
episys-merge
episys/nsa_baseline
episys/nsa_development
extend_sharedlibusage
extend_sharedlibusage2
fapi_for_dmrs_and_ptrs
feat-mac-sock
feature-4g-sched
feature-nr-4g-nfapi-modifications
feature-support-clang-format
feature/make-s1-mme-port-configurable
feature/make-s1-mme-port-configurable-with-astyle-fixes
fedora-gen-kernel-fix
fembms-enb-ue
fft_bench_hotfix
finalize-oaicn-integration
firas
fix-check
fix-ci-tun
fix-clock-source
fix-compile
fix-itti-segv
fix-l2-sim
fix-limeSDR-compile
fix-lte-ue-modem-in-docker-container
fix-nr-pdcp-timer
fix-nr-rlc-range-nack
fix-physim-deploy
fix-physim-run-script-on-cluster
fix-quectel
fix-realtime
fix-retransmission-rbg
fix-softmodem-restart
fix-warnings
fix-x2-without-gnb
fix_NR_DLUL_PF
fix_NR_DLUL_PF_benchmark
fix_coreset_dmrs_idx
fix_do_ra_data
fix_nr_ulsim
fix_pdsch_low_prb
fix_rb_corruption
fix_reestablishment
fix_rfsim_mimo
fix_rrc_x2_ticking
fixes-CE-RLC-PDU-size
fixes-mac-sched-nfapi
fixes-mac-sched-tun
fixes-tun
fixgtpu
flexran-apps
flexran-improvements
flexran-repair-mme-mgmt
flexran-rtc-repo-is-public
fr2-hw-test
fujitsu_lte_contribution
fujitsu_lte_contribution-128
gNB-nrUE-USRP
generate_push_ptrs
git-dashboard
gnb-freerun-txru
gnb-n300-fixes
gnb-only-test
gnb-realtime-hotfix
gnb-realtime-quickfix
gnb-threadpool
hack-bch-no-sched-sf-0
hack-exit-gnb-when-no-enb-nsa
harq-hotfix
hotfix-minor-remove-nr-rlc-cppcheck-error
hotfix-nr-rlc-tick
hotfix-ocp-executable
hotfix-ue-musim-compilation
hotfix_usrp_lib
improve_build_nr_lte_merge
improve_nr_modulation
improve_ue_stability
integ-w13-test-rt-issue
integration-develop-nr-2019w45
integration_2020_wk15
integration_2020_wk40
integration_2020_wk41
integration_2020_wk42_2
integration_2020_wk45
integration_2020_wk45_2
integration_2020_wk46
integration_2020_wk46_2
integration_2020_wk47
integration_2020_wk48
integration_2020_wk48_2
integration_2020_wk49
integration_2020_wk50
integration_2020_wk50_1
integration_2020_wk51
integration_2020_wk51_2
integration_2021_wk02
integration_2021_wk02_wMR988
integration_2021_wk04
integration_2021_wk05
integration_2021_wk06
integration_2021_wk06_MR978
integration_2021_wk06_b
integration_2021_wk06_c
integration_2021_wk08
integration_2021_wk08_2
integration_2021_wk08_MR963
integration_2021_wk09
integration_2021_wk09_b
integration_2021_wk10
integration_2021_wk10_b
integration_2021_wk11
integration_2021_wk12
integration_2021_wk12_b
integration_2021_wk13_a
integration_2021_wk13_b
integration_2021_wk13_b_fix_tdas
integration_2021_wk13_b_fixed
integration_2021_wk13_c
integration_2021_wk14_a
integration_2021_wk15_a
integration_2021_wk16
integration_2021_wk17_a
integration_2021_wk17_b
integration_2021_wk18_a
integration_2021_wk18_b
integration_2021_wk19
integration_2021_wk20_a
integration_2021_wk22
integration_2021_wk23
integration_2021_wk27
integration_2021_wk28
integration_2021_wk30
integration_2021_wk30_b
integration_w5GC_CBRA_test
inter-RRU-final
inter-RRU-nr
inter-RRU-oairu
inter-rru-UE
interoperability-test
isip_nr
itti-enhancement
l2-fixes
ldpc-dec-layering
ldpc-decoder-codegen
ldpc-decoder-codegen2
ldpc-decoder-improvements
ldpc-offload
ldpc_offload_t1
ldpc_short_codeword_fixes
load_gnb
lte-ulsch-bugfix
lte_uplink_improvement
mac-fixes-wk45_2
mbms-fix-develop-nr
merging-2019-w51-to-develop-nr
migrate-cpp-check-container
migrate-vm-pipeline-to-bionic
minor-fix-doc-basic-sim
mosaic5g-oai-ran
mosaic5g-oai-sim
msg4_phy_0303_lfq
multiple_ssb_sib1_bugfix
nasmesh_kernel_5.8
new-gtpu
new_rlc_2020
nfapi-bugfix
nfapi_nr_arch_mod
nfapi_nr_develop
nfapi_nr_develop_new
ngap-dlul
ngap-support
ngap-w48-merge2
ngap-wf
ngap-wf-1120
ngap-wf-1120-srb
ngap-wf-1120-srb-gtp
ngap-wf-1120-srb-gtp-hs
ngap-wf-1120-srb-gtp-hs1
ngap-wf-1120-srb-gtp-hs2
ngap-wf-1120-srb-gtp-yhz
ngap-wf-1203-yunsdr
ngap-wf-liuyu
ngap_lfq_1120
ngap_merge
noCore
nr-bsr-fix
nr-coreset-bug-fix
nr-dl-mimo-2layer
nr-dlsch-multi-thread
nr-dlsch-thread
nr-dmrs-fixes
nr-dual-connectivity
nr-interdigital-test
nr-ip-uplink-noS1
nr-mac-pdu-wireshark
nr-mac-remove-ue-list
nr-multiple-ssb
nr-pdcp
nr-pdcp-benchmarking
nr-pdcp-improvements
nr-pdcp-nea2-security
nr-pdcp-nia2-integrity
nr-pdcp-small-bugfixes
nr-pdcp-srb-integrity
nr-pdsch-extraction-bugfix
nr-physim-update
nr-ra-fix
nr-rlc-am-bugfix-w44
nr-rlc-bugfix-w44
nr-ssb-measurements
nr-stats-print
nr-timing-measurement
nr-timing-measurement-merge
nr-ue-buffer-status
nr-ue-slot-based
nr-uldci
nrPBCHTCFix
nrPbchTcFix
nrUE
nrUE-hs
nrUE-upper-layer
nr_beamforming
nr_bsr
nr_ci_dlsim
nr_csi_newbranch
nr_demo_wsa2019
nr_dl_dmrs_type2
nr_dl_pf
nr_dl_pf2
nr_dl_ul_ptrs
nr_dlsch_parallel_measurements
nr_dlsim_plot
nr_fapi_for_push_tmp
nr_fdd_if_fix
nr_fix_easycppcheck
nr_flexible_NRBDL
nr_improve_build_procedures
nr_improve_chanest
nr_increase_tp
nr_pdcch_testing
nr_pdcch_updates
nr_pdsch_integration
nr_polar_decoder_improvement
nr_power_measurement_fixes
nr_prach
nr_prach_fr2
nr_pucch
nr_pucch2
nr_segmentation_fixes
nr_sim_fix
nr_tdd_configuration
nr_ue_msg3
nr_ue_pdcp_fix
nr_ue_remove_high_speed_flag
nr_ue_tti_cleanup
nr_ul_pf
nr_ul_scfdma
nr_vcd
nrue-multi-thread
nrue_msg2_reception
nsa-ue
nsa_remove_band_hardcodings
oai-sim
oai-ubuntu-docker
oai-ubuntu-docker-for-lmssdr
oairu
oairu-dockerfile-support
oc-docker-october-improvements
openxg/develop
pdcp-benchmark
pdsch-ch-est
phy-asan-fixes
physim-build-deploy
physim-deploy-handle-error-cases
polar8
prb_based_dl_channel_estimation
ptrs_rrc_config
pusch-mthread-scaling-fix
pusch-retrans-fix-ue
ra-dl-ul
recursive-cmake
reduce_memory_footprint
remove-ci-workaround
remove_nos1_hack_pdcp
remove_x2_gnb_hardcoding
repair-TA
revert-f5c94279
revert_memcpy
rh-ci-add-ue-parallelization
rh_ci_add_runtime_stats
rh_ci_add_uldlharq_stats
rh_ci_fix_autoterminate
rh_ci_fr1_update
rh_ci_gsheet_rt_monitoring
rh_ci_nsa2jenkins
rh_ci_nsa_test_n310
rh_ci_oc
rh_ci_phy_test_improve
rh_ci_py
rh_ci_ra_fr2
rh_ci_rfsim_ra
rh_ci_test_benetel
rh_ci_test_nsa
rh_ci_test_nsa_wk16
rh_ci_test_nsa_wk17_b
rh_ci_test_nsa_wk17b
rh_ci_test_rfsim_sa
rh_ci_ue_parallel
rh_doc_update_3
rh_fr1_newjenkins
rh_fr1_update
rh_gnb_compile_fix
rh_wk50_debug
rlc-v2-bugfix-status-reporting
rlc-v2-tick
rlc_v2_coverity_fixes
rohan_ulsim2RxFix
rrc-enb-phy-testmode
ru-parallel-beamforming
runel
runel-reverse-test
s1-subnormal_rewrite
s1_subnormal
s1_subnormal-robert
s1ap-bugfix-rab_setup
sa-demo
sa-demo-hs
sa-merge-rrc-srb
sa-msg4
sa-msg4-rrc
sa-msg4-rrc-yihz
sa-msg4-rrc-yihz-hs
sa_rrc_yihz
sanitize-address
sanitize-v1
sanitize-v1-tmp
sarma_pvnp_oai
scs_60_iisc
sim-channels
small-bugfixes-w40
small-config-change
small_nr_bugfixes
smallcleanup
softmodem_cleanup
split73
t-gnb-tracer
test-5GREC
test-nsa-benetel
test-panos
test-x310-perf
test_nsa_gtpu_fix
test_rt-fix_phy-test
testing_2symb_pdcch
testing_with_external_txdata
thread-pool
tools_5Gadapt
tp-ota-test
trx_thread_param
trx_write_thread
ue-csi
ue-dci-false-detection
ue-fixes
ue-fixes-ota
ue-pdsch-pusch-parallel
ue-race-fix
ue-updates-runel-test
ue_adjust_gain
ue_beam_selection
ue_dlsch-multi-threading
ue_dlsch_decoding_ldpc_offload
ue_nfapi_mch
uhd_priority_set_cleanup
ul-freq-iq-samps-to-file
ul_dl_dci_same_slot
ul_harq
ulsch_decode_mthread
ulsim_changes
update-to-2019-march-june-release
usrp_fix_adc_shift_and_pps_sync
usrp_gpio_test
usrp_stop_cleanly
usrp_x400
wf-sa-rrc
wf_testc
wireshark-T-hack-ueid
wireshark-log-scheduling-requests
wk11-with-phytest
x2-endc-processing
x2_handle_sctp_shutdown
xiangwab
xiangwan
xw2
yihongzheng_srb
zzs
2021.wk14_a
2021.wk13_d
2021.wk13_c
2021.w30
2021.w29
2021.w28
2021.w27
2021.w26
2021.w25
2021.w24
2021.w23
2021.w22
2021.w20
2021.w19
2021.w18_b
2021.w18_a
2021.w17_b
2021.w16
2021.w15
2021.w14
2021.w13_a
2021.w12
2021.w11
2021.w10
2021.w09
2021.w08
2021.w06
2021.w05
2021.w04
2021.w02
2020.w51_2
2020.w51
2020.w50
2020.w49
2020.w48_2
2020.w48
2020.w47
2020.w46_2
2020.w46
2020.w45_2
2020.w45
2020.w44
2020.w42_2
2020.w42
2020.w41
2020.w39
2020.w38
2020.w37
2020.w36
2020.w34
2020.w33
2020.w31
2020.w30
2020.w29
2020.w28
2020.w26
2020.w25
2020.w24
2020.w23
2020.w22
2020.w19
2020.w17
2020.w16
2020.w15
2020.w11
2020.w09
2020.w06
2020.w05
2020.w04
2020.w03
osa-etsi-ws-ue
osa-etsi-ws-try2
osa-etsi-ws-try1
osa-etsi-ws-gNB
nr-ip-over-lte
nr-ip-over-lte-v.1.5
nr-ip-over-lte-v.1.4
nr-ip-over-lte-v.1.3
nr-ip-over-lte-v.1.2
nr-ip-over-lte-v.1.1
nr-ip-over-lte-v.1.0
develop-nr-pdcch
develop-nr-2020w03
develop-nr-2020w02
develop-nr-2019w51
develop-nr-2019w50
develop-nr-2019w48
develop-nr-2019w47
develop-nr-2019w45
develop-nr-2019w43
develop-nr-2019w42
develop-nr-2019w40
develop-nr-2019w28
develop-nr-2019w23
benetel_phase_rotation
benetel_gnb_rel_2.0
benetel_gnb_rel_1.0
benetel_enb_rel_2.0
benetel_enb_rel_1.0
No related merge requests found
Changes
1
Hide whitespace changes
Inline
Side-by-side
Showing
1 changed file
with
20 additions
and
175 deletions
+20
-175
openair1/SCHED_NR_UE/phy_procedures_nr_ue.c
openair1/SCHED_NR_UE/phy_procedures_nr_ue.c
+20
-175
No files found.
openair1/SCHED_NR_UE/phy_procedures_nr_ue.c
View file @
cceab3e8
...
...
@@ -2927,105 +2927,16 @@ void nr_ue_pbch_procedures(uint8_t eNB_id,PHY_VARS_NR_UE *ue,UE_nr_rxtx_proc_t *
VCD_SIGNAL_DUMPER_DUMP_FUNCTION_BY_NAME
(
VCD_SIGNAL_DUMPER_FUNCTIONS_UE_PBCH_PROCEDURES
,
VCD_FUNCTION_IN
);
/*pbch_phase=(frame_rx%4);
if (pbch_phase>=4)
pbch_phase=0;*/
for
(
pbch_trials
=
0
;
pbch_trials
<
4
;
pbch_trials
++
)
{
//for (pbch_phase=0;pbch_phase<4;pbch_phase++) {
//LOG_I(PHY,"[UE %d] Frame %d, Trying PBCH %d (NidCell %d, eNB_id %d)\n",ue->Mod_id,frame_rx,pbch_phase,ue->frame_parms.Nid_cell,eNB_id);
if
(
abstraction_flag
==
0
)
{
ret
=
nr_rx_pbch
(
ue
,
proc
,
ue
->
pbch_vars
[
eNB_id
],
&
ue
->
frame_parms
,
eNB_id
,
SISO
,
ue
->
high_speed_flag
);
}
if
(
ret
==
0
)
{
break
;
}
/*pbch_phase++;
if (pbch_phase>=4)
pbch_phase=0;*/
}
//LOG_I(PHY,"[UE %d] Frame %d, Trying PBCH %d (NidCell %d, eNB_id %d)\n",ue->Mod_id,frame_rx,pbch_phase,ue->frame_parms.Nid_cell,eNB_id);
ret
=
nr_rx_pbch
(
ue
,
proc
,
ue
->
pbch_vars
[
eNB_id
],
&
ue
->
frame_parms
,
eNB_id
,
SISO
,
ue
->
high_speed_flag
);
if
(
ret
==
0
)
{
if
(
opt_enabled
)
{
static
uint8_t
dummy
[
3
];
dummy
[
0
]
=
ue
->
pbch_vars
[
eNB_id
]
->
decoded_output
[
2
];
dummy
[
1
]
=
ue
->
pbch_vars
[
eNB_id
]
->
decoded_output
[
1
];
dummy
[
2
]
=
ue
->
pbch_vars
[
eNB_id
]
->
decoded_output
[
0
];
trace_pdu
(
1
,
dummy
,
3
,
ue
->
Mod_id
,
0
,
0
,
frame_rx
,
nr_tti_rx
,
0
,
0
);
LOG_D
(
OPT
,
"[UE %d][PBCH] Frame %d trace pdu for PBCH
\n
"
,
ue
->
Mod_id
,
nr_tti_rx
);
}
ue
->
pbch_vars
[
eNB_id
]
->
pdu_errors_conseq
=
0
;
/*frame_tx = (((int)(ue->pbch_vars[eNB_id]->decoded_output[2]&0x03))<<8);
frame_tx += ((int)(ue->pbch_vars[eNB_id]->decoded_output[1]&0xfc));
frame_tx += pbch_phase;*/
//if (ue->mac_enabled==1) {
//mac_xface->dl_phy_sync_success(ue->Mod_id,frame_rx,eNB_id,first_run);
//}
#ifdef EMOS
//emos_dump_UE.frame_tx = frame_tx;
//emos_dump_UE.mimo_mode = ue->pbch_vars[eNB_id]->decoded_output[1];
#endif
if
(
first_run
)
{
first_run
=
0
;
proc
->
frame_rx
=
(
proc
->
frame_rx
&
0xFFFFFC00
)
|
(
frame_tx
&
0x000003FF
);
proc
->
frame_tx
=
proc
->
frame_rx
;
for
(
int
th_id
=
0
;
th_id
<
RX_NB_TH
;
th_id
++
)
{
ue
->
proc
.
proc_rxtx
[
th_id
].
frame_rx
=
proc
->
frame_rx
;
ue
->
proc
.
proc_rxtx
[
th_id
].
frame_tx
=
proc
->
frame_tx
;
printf
(
"[UE %d] frame %d, nr_tti_rx %d: Adjusting frame counter (PBCH frame_tx=%d, rx_offset %d) => new frame %d
\n
"
,
ue
->
Mod_id
,
ue
->
proc
.
proc_rxtx
[
th_id
].
frame_rx
,
nr_tti_rx
,
frame_tx
,
ue
->
rx_offset
,
proc
->
frame_rx
);
}
frame_rx
=
proc
->
frame_rx
;
}
else
if
(((
frame_tx
&
0x03FF
)
!=
(
proc
->
frame_rx
&
0x03FF
)))
{
//(pbch_tx_ant != ue->frame_parms.nb_antennas_tx)) {
LOG_D
(
PHY
,
"[UE %d] frame %d, nr_tti_rx %d: Re-adjusting frame counter (PBCH frame_rx=%d, frame%%1024=%d).
\n
"
,
ue
->
Mod_id
,
proc
->
frame_rx
,
nr_tti_rx
,
frame_tx
,
frame_rx
&
0x03FF
);
proc
->
frame_rx
=
(
proc
->
frame_rx
&
0xFFFFFC00
)
|
(
frame_tx
&
0x000003FF
);
proc
->
frame_tx
=
proc
->
frame_rx
;
frame_rx
=
proc
->
frame_rx
;
for
(
int
th_id
=
0
;
th_id
<
RX_NB_TH
;
th_id
++
)
{
ue
->
proc
.
proc_rxtx
[
th_id
].
frame_rx
=
(
proc
->
frame_rx
&
0xFFFFFC00
)
|
(
frame_tx
&
0x000003FF
);
ue
->
proc
.
proc_rxtx
[
th_id
].
frame_tx
=
proc
->
frame_rx
;
}
}
#ifdef DEBUG_PHY_PROC
LOG_D
(
PHY
,
"[UE %d] frame %d, nr_tti_rx %d, Received PBCH (MIB): frame_tx %d. N_RB_DL %d
\n
"
,
ue
->
Mod_id
,
...
...
@@ -3036,13 +2947,10 @@ void nr_ue_pbch_procedures(uint8_t eNB_id,PHY_VARS_NR_UE *ue,UE_nr_rxtx_proc_t *
#endif
}
else
{
/*
LOG_E
(
PHY
,
"[UE %d] frame %d, nr_tti_rx %d, Error decoding PBCH!
\n
"
,
ue->Mod_id,frame_rx, nr_tti_rx);
LOG_I(PHY,"[UE %d] rx_offset %d\n",ue->Mod_id,ue->rx_offset);
ue
->
Mod_id
,
frame_rx
,
nr_tti_rx
);
/*
write_output("rxsig0.m","rxs0", ue->common_vars.rxdata[0],ue->frame_parms.samples_per_subframe,1,1);
write_output("H00.m","h00",&(ue->common_vars.dl_ch_estimates[0][0][0]),((ue->frame_parms.Ncp==0)?7:6)*(ue->frame_parms.ofdm_symbol_size),1,1);
...
...
@@ -3062,8 +2970,8 @@ void nr_ue_pbch_procedures(uint8_t eNB_id,PHY_VARS_NR_UE *ue,UE_nr_rxtx_proc_t *
}
else
{
if
(
ue
->
pbch_vars
[
eNB_id
]
->
pdu_errors_conseq
>=
100
)
{
LOG_E
(
PHY
,
"More that 100 consecutive PBCH errors! Exiting!
\n
"
);
//mac_xface->macphy_exit("More that 100 consecutive PBCH errors!
");
LOG_E
(
PHY
,
"More that 100 consecutive PBCH errors! Exiting!
\n
"
);
exit_fun
(
"More that 100 consecutive PBCH errors! Exiting!
\n
"
);
}
}
}
...
...
@@ -3646,7 +3554,7 @@ void nr_ue_pdsch_procedures(PHY_VARS_NR_UE *ue, UE_nr_rxtx_proc_t *proc, int eNB
if
(
dlsch0
&&
(
!
dlsch1
))
{
harq_pid
=
dlsch0
->
current_harq_pid
;
LOG_D
(
PHY
,
"[UE %d] PDSCH
active in nr_tti_rx %d, harq_pid %d Symbol %d
\n
"
,
ue
->
Mod_id
,
nr_tti_rx
,
harq_pid
,
m
);
LOG_D
(
PHY
,
"[UE %d] PDSCH
type %d active in nr_tti_rx %d, harq_pid %d Symbol %d
\n
"
,
ue
->
Mod_id
,
pdsch
,
nr_tti_rx
,
harq_pid
,
m
);
if
((
pdsch
==
PDSCH
)
&&
(
ue
->
transmission_mode
[
eNB_id
]
==
5
)
&&
...
...
@@ -4199,15 +4107,16 @@ void nr_ue_dlsch_procedures(PHY_VARS_NR_UE *ue,
}
}
#ifdef DEBUG_PHY_PROC
LOG_
D
(
PHY
,
"[UE %d][PDSCH %x/%d] Frame %d nr_tti_rx %d: PDSCH/DLSCH decoding iter
%d (mcs %d, rv %d, TBS %d)
\n
"
,
//
#ifdef DEBUG_PHY_PROC
LOG_
I
(
PHY
,
"[UE %d][PDSCH %x/%d] Frame %d nr_tti_rx %d: PDSCH/DLSCH decoding iter %d/
%d (mcs %d, rv %d, TBS %d)
\n
"
,
ue
->
Mod_id
,
dlsch0
->
rnti
,
harq_pid
,
frame_rx
,
nr_tti_rx
,
ret
,
frame_rx
,
nr_tti_rx
,
ret
,
dlsch0
->
max_ldpc_iterations
,
dlsch0
->
harq_processes
[
harq_pid
]
->
mcs
,
dlsch0
->
harq_processes
[
harq_pid
]
->
rvidx
,
dlsch0
->
harq_processes
[
harq_pid
]
->
TBS
);
#ifdef DEBUG_PHY_PROC
if
(
frame_rx
%
100
==
0
)
{
LOG_D
(
PHY
,
"[UE %d][PDSCH %x] Frame %d nr_tti_rx %d dlsch_errors %d, dlsch_received %d, dlsch_fer %d, current_dlsch_cqi %d
\n
"
,
ue
->
Mod_id
,
dlsch0
->
rnti
,
...
...
@@ -5141,6 +5050,7 @@ int phy_procedures_nrUE_RX(PHY_VARS_NR_UE *ue,UE_nr_rxtx_proc_t *proc,uint8_t eN
LOG_D(PHY," ------ --> FFT/ChannelEst/PDCCH slot 0: AbsSubframe %d.%d ------ \n", frame_rx%1024, nr_tti_rx);
#endif
#ifdef NR_PDCCH_SCHED
//nr_gold_pdcch(ue,0, 2);
if
(
nr_tti_rx
==
1
){
for
(
uint16_t
l
=
0
;
l
<
nb_symb_pdcch
;
l
++
)
{
...
...
@@ -5166,80 +5076,13 @@ int phy_procedures_nrUE_RX(PHY_VARS_NR_UE *ue,UE_nr_rxtx_proc_t *proc,uint8_t eN
}
}
//write_output("rxdataF.m","rxF",ue->common_vars.common_vars_rx_data_per_thread[ue->current_thread_id[nr_tti_rx>>1]].rxdataF[0],ue->frame_parms.ofdm_symbol_size*2,1,1);
//ue_measurement_procedures(l-1,ue,proc,eNB_id,(nr_tti_rx<<1),abstraction_flag,mode);
//if (do_pdcch_flag) {
// if ((l==pilot1) || ((pmch_flag==1)&(l==l2))) {
// LOG_D(PHY,"[UE %d] Frame %d: Calling pdcch procedures (eNB %d)\n",ue->Mod_id,frame_rx,eNB_id);
//start_meas(&ue->rx_pdcch_stats[ue->current_thread_id[nr_tti_rx]]);
//printf(">>> at phy_procedures_nrUE_RX, nr_ue_pdcch_procedures init, dlsch->active=%d\n",
// ue->dlsch[ue->current_thread_id[nr_tti_rx]][eNB_id][0]->active);
if
(
nr_ue_pdcch_procedures
(
eNB_id
,
ue
,
proc
,
abstraction_flag
)
==
-
1
)
{
LOG_E
(
PHY
,
"[UE %d] Frame %d, nr_tti_rx %d: Error in pdcch procedures
\n
"
,
ue
->
Mod_id
,
frame_rx
,
nr_tti_rx
);
return
(
-
1
);
}
}
//for (int m=0;m<1000;m++) printf("%d",m);
//printf("\n>>> at phy_procedures_nrUE_RX, nr_ue_pdcch_procedures end, dlsch->active=%d\n",
// ue->dlsch[ue->current_thread_id[nr_tti_rx]][eNB_id][0]->active);
// preparing for PDSCH procedures
// if (ue->dlsch[ue->current_thread_id[nr_tti_rx]][eNB_id][0]->active == 1) {
// ue_pdsch_procedures(ue,
// proc,
// eNB_id,
// PDSCH,
// ue->dlsch[ue->current_thread_id[nr_tti_rx]][eNB_id][0],
// NULL,
// ue->pdcch_vars[ue->current_thread_id[nr_tti_rx]][eNB_id]->num_pdcch_symbols,
// ue->frame_parms.symbols_per_tti>>1,
// abstraction_flag);
// }
#if 0
//stop_meas(&ue->rx_pdcch_stats[ue->current_thread_id[nr_tti_rx]]);
//printf("nr_tti_rx %d n_pdcch_sym %d pdcch procedures %5.3f \n",
// nr_tti_rx, ue->pdcch_vars[ue->current_thread_id[nr_tti_rx]][eNB_id]->num_pdcch_symbols,
// (ue->rx_pdcch_stats[ue->current_thread_id[nr_tti_rx]].p_time)/(cpuf*1000.0));
LOG_D(PHY,"num_pdcch_symbols %d\n",ue->pdcch_vars[ue->current_thread_id[nr_tti_rx]][eNB_id]->num_pdcch_symbols);
// }
//}
// } // for l=1..l2
ue_measurement_procedures(l-1,ue,proc,eNB_id,(nr_tti_rx<<1),abstraction_flag,mode);
LOG_D(PHY," ------ end FFT/ChannelEst/PDCCH slot 0: AbsSubframe %d.%d ------ \n", frame_rx%1024, nr_tti_rx);
// If this is PMCH, call procedures and return
if (pmch_flag == 1) {
ue_pmch_procedures(ue,proc,eNB_id,abstraction_flag);
return 0;
}
nr_slot_fep(ue,
0,
1+(nr_tti_rx<<1),
0,
0,
0,
NR_PDSCH_EST);
#endif
// first slot has been processed (FFTs + Channel Estimation, PCFICH/PHICH/PDCCH)
#if UE_TIMING_TRACE
stop_meas
(
&
ue
->
generic_stat
);
#if DISABLE_LOG_X
printf
(
"[SFN %d] Slot0: FFT + Channel Estimate + PCFICH/PHICH/PDCCH %5.2f
\n
"
,
nr_tti_rx
,
ue
->
generic_stat
.
p_time
/
(
cpuf
*
1000
.
0
));
#else
LOG_D
(
PHY
,
"[SFN %d] Slot0: FFT + Channel Estimate + PCFICH/PHICH/PDCCH %5.2f
\n
"
,
nr_tti_rx
,
ue
->
generic_stat
.
p_time
/
(
cpuf
*
1000
.
0
));
#endif
#endif //NR_PDCCH_SCHED
#endif
//#if 0
LOG_D
(
PHY
,
" ------ --> PDSCH ChannelComp/LLR slot 0: AbsSubframe %d.%d ------
\n
"
,
frame_rx
%
1024
,
nr_tti_rx
);
if
(
nr_tti_rx
==
1
){
...
...
@@ -5262,6 +5105,8 @@ int phy_procedures_nrUE_RX(PHY_VARS_NR_UE *ue,UE_nr_rxtx_proc_t *proc,uint8_t eN
//set active for testing, to be removed
ue
->
dlsch
[
ue
->
current_thread_id
[
nr_tti_rx
]][
eNB_id
][
0
]
->
active
=
1
;
}
else
ue
->
dlsch
[
ue
->
current_thread_id
[
nr_tti_rx
]][
eNB_id
][
0
]
->
active
=
0
;
#if UE_TIMING_TRACE
start_meas
(
&
ue
->
generic_stat
);
...
...
This diff is collapsed.
Click to expand it.
Write
Preview
Markdown
is supported
0%
Try again
or
attach a new file
Attach a file
Cancel
You are about to add
0
people
to the discussion. Proceed with caution.
Finish editing this message first!
Cancel
Please
register
or
sign in
to comment