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wangjie
OpenXG-RAN
Commits
e6435cf7
Commit
e6435cf7
authored
4 years ago
by
Robert Schmidt
Browse files
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Plain Diff
Create separate phytest UL preprocessor
parent
cfc6044a
dev
512-dataplane-bug-in-l2nfapi_nos1
FR2_NSA
Fix_SA_SIB1
NRPRACH_highSpeed_saankhya
NRUE_usedlschparallel
NR_10MHz
NR_2port_CSIRS
NR_CSIRS_tomerge
NR_DLUL_PF
NR_DLUL_PF_4UL
NR_DLUL_PF_rebased
NR_DL_MIMO
NR_F1C_F1U_extensions
NR_FAPI_beamindex_SSB_RO
NR_FAPI_beamindex_SSB_RO_SEMPROJ
NR_FDD_FIX
NR_FR2_RA
NR_FR2_initsync_fixes
NR_MAC_Multi_Rach_GlobalEdge
NR_MAC_Multi_Rach_GlobalEdge-old
NR_MAC_SSB
NR_MAC_TCI_UCI_GlobalEdge
NR_MCS_BLER
NR_PUCCH_MultiUE
NR_RA_cleanup
NR_RRCReconfiguration_BWP
NR_SA_F1AP_5GRECORDS
NR_SA_F1AP_5GRECORDS-USIM
NR_SA_F1AP_5GRECORDS-wf-0623
NR_SA_F1AP_5GRECORDS_lts
NR_SA_F1AP_RFSIMULATOR
NR_SA_F1AP_RFSIMULATOR2
NR_SA_F1AP_RFSIMULATOR2_SRB
NR_SA_F1AP_RFSIMULATOR3
NR_SA_F1AP_RFSIMULATOR3_tmp
NR_SA_F1AP_RFSIMULATOR3_wf
NR_SA_F1AP_RFSIMULATOR_w5GCN
NR_SA_F1AP_dev
NR_SA_itti_sim_wk48
NR_SA_itti_sim_wk48_hs1
NR_SA_w5GCN_new_gtpu
NR_SCHED_HARQ
NR_SCHED_PDCCH_PUCCH_HARQ
NR_SCHED_PDCCH_PUCCH_HARQ_rebased
NR_SCHED_fixes
NR_UE_CONFIG_REQ_FIXES
NR_UE_PUCCH_bugfixes
NR_UE_SA
NR_UE_SSB_meas
NR_UE_dlsch_bugfix
NR_UE_rework_test
NR_UE_reworking_UCI_procedures
NR_UL_SCFDMA_100MHz
NR_UL_scheduler
NR_Wireshark
NR_beam_simulation
NR_cleanup_PUCCH_resources
NR_gNB_initial_MIB_fix
NR_multiplexing_HARQ_CSI_PUCCH
NR_new_ul_antennaports
NR_phytest_bugfixes
NR_reworking_UL_antennaports
NR_scheduling_CSIRS
NR_scheduling_request
NR_scheduling_request2
NR_scheduling_request3
PBCHNRTCFIX
RFquality
Saankhya_NRPRACH_HighSpeed
Test_SA_5GREC
add-dmrs-test
add-ru-docker-image
avxllr
bandwidth-testing
benetel_config_file_fix
benetel_dpdk20
benetel_driver_uldl_pf_merge
benetel_driver_update
benetel_fixes
bsr-fix
bugfix-free-ra-process
bugfix-nr-t-reordering
bugfix-x2-SgNBAdditionRequest
bugfix_gnb_rt_stats_html
bupt-sa-merge
ci-add-sabox-support
ci-fix-module-ul-iperf
ci-new-docker-pipeline
ci-reduce-nb-vms
ci-test
ci_benetel_longrun_limits
ci_benetel_test
ci_fix_iperf_for_module
ci_hotfix_module_ue_ip_address
ci_improve_module_ctl
ci_nsa_2x2_implem
ci_nsa_benetel
ci_nsa_fixes
ci_nsa_pipes_improve
ci_nsa_test_integration_2021_wk19
ci_nsa_traces
ci_nsa_uplink
ci_phytest
ci_quectel_support
ci_sa_rfsim_test
ci_solve_ul_for_module
ci_test_5GREC
ci_test_nsa_2x2
ci_test_nsa_fix_quectel_nic
ci_test_nsa_on_develop
ci_test_ra_fr2
ci_testinfra_as_code
ci_update_build_nasmesh
ci_vm_resource_fix
cleanup_softmodem_main
code-cleanup-20210716
debug-UL-5GRECORDS
debug_UL_signal
detached-w16-test
develop
develop-CBRA-v3
develop-CCE
develop-NR_SA_F1AP_5GRECORDS
develop-NR_SA_F1AP_5GRECORDS-abs
develop-NR_SA_F1AP_5GRECORDS-hs
develop-NR_SA_F1AP_5GRECORDS-hs1
develop-NR_SA_F1AP_5GRECORDS-lts
develop-NR_SA_F1AP_5GRECORDS-lts-wf
develop-NR_SA_F1AP_5GRECORDS-v3
develop-NR_SA_F1AP_5GRECORDS_100M
develop-NR_SA_F1AP_5GRECORDS_LDPC_FPGA
develop-NR_SA_F1AP_5GRECORDS_lfq_0607
develop-NSA_SA_fixes
develop-SA-CBRA
develop-SA-CBRA-CUDU
develop-SA-CBRA-Msg5
develop-SA-CBRA-lts
develop-SA-CBRA-ulsch-lts
develop-SA-RA
develop-SnT
develop-aw2sori
develop-sib1
develop-sib1-local
develop-sib1-lts
develop-sib1-update
develop-sib1-update-test1
develop-sib1-update-ue
develop-wf-du
develop_fpga_ldpc
develop_stable
disable_CSI_measrep
docker-improvements-2021-april
docker-no-cache-option
dongzhanyi-zte-develop1
enhance-rfsim
episys-merge
episys/nsa_baseline
episys/nsa_development
fedora-gen-kernel-fix
fft_bench_hotfix
fix-check
fix-compile
fix-lte-ue-modem-in-docker-container
fix-nr-pdcp-timer
fix-nr-rlc-range-nack
fix-physim-deploy
fix-physim-run-script-on-cluster
fix-quectel
fix-realtime
fix-retransmission-rbg
fix-x2-without-gnb
fix_NR_DLUL_PF
fix_NR_DLUL_PF_benchmark
fix_coreset_dmrs_idx
fix_do_ra_data
fix_nr_ulsim
fix_rb_corruption
fix_reestablishment
fixes-CE-RLC-PDU-size
fixgtpu
flexran-rtc-repo-is-public
git-dashboard
gnb-freerun-txru
gnb-n300-fixes
gnb-only-test
gnb-realtime-hotfix
gnb-realtime-quickfix
gnb-threadpool
hack-bch-no-sched-sf-0
hack-exit-gnb-when-no-enb-nsa
integ-w13-test-rt-issue
integration_2020_wk15
integration_2020_wk50
integration_2020_wk50_1
integration_2020_wk51
integration_2020_wk51_2
integration_2021_wk02
integration_2021_wk02_wMR988
integration_2021_wk04
integration_2021_wk05
integration_2021_wk06
integration_2021_wk06_MR978
integration_2021_wk06_b
integration_2021_wk06_c
integration_2021_wk08
integration_2021_wk08_2
integration_2021_wk08_MR963
integration_2021_wk09
integration_2021_wk09_b
integration_2021_wk10
integration_2021_wk10_b
integration_2021_wk11
integration_2021_wk12
integration_2021_wk12_b
integration_2021_wk13_a
integration_2021_wk13_b
integration_2021_wk13_b_fix_tdas
integration_2021_wk13_b_fixed
integration_2021_wk13_c
integration_2021_wk14_a
integration_2021_wk15_a
integration_2021_wk16
integration_2021_wk17_a
integration_2021_wk17_b
integration_2021_wk18_a
integration_2021_wk18_b
integration_2021_wk19
integration_2021_wk20_a
integration_2021_wk22
integration_2021_wk23
integration_2021_wk27
integration_2021_wk28
integration_2021_wk30
integration_2021_wk30_b
integration_w5GC_CBRA_test
inter-RRU-final
itti-enhancement
ldpc_offload_t1
lte-ulsch-bugfix
lte_uplink_improvement
migrate-cpp-check-container
migrate-vm-pipeline-to-bionic
minor-fix-doc-basic-sim
msg4_phy_0303_lfq
multiple_ssb_sib1_bugfix
nasmesh_kernel_5.8
new-gtpu
nfapi_nr_arch_mod
nfapi_nr_develop
nfapi_nr_develop_new
nr-bsr-fix
nr-dl-mimo-2layer
nr-dmrs-fixes
nr-pdcp-benchmarking
nr-pdcp-improvements
nr-pdcp-nea2-security
nr-pdcp-nia2-integrity
nr-pdcp-small-bugfixes
nr-pdcp-srb-integrity
nr-ra-fix
nr-stats-print
nrPBCHTCFix
nrPbchTcFix
nr_improve_chanest
nr_power_measurement_fixes
nr_ue_pdcp_fix
nr_ue_remove_high_speed_flag
nr_ul_pf
nr_ul_scfdma
oairu
oairu-dockerfile-support
openxg/develop
phy-asan-fixes
physim-build-deploy
physim-deploy-handle-error-cases
prb_based_dl_channel_estimation
ptrs_rrc_config
pusch-retrans-fix-ue
recursive-cmake
rh-ci-add-ue-parallelization
rh_ci_add_runtime_stats
rh_ci_add_uldlharq_stats
rh_ci_gsheet_rt_monitoring
rh_ci_nsa2jenkins
rh_ci_nsa_test_n310
rh_ci_phy_test_improve
rh_ci_ra_fr2
rh_ci_test_benetel
rh_ci_test_nsa
rh_ci_test_nsa_wk16
rh_ci_test_nsa_wk17_b
rh_ci_test_nsa_wk17b
rh_ci_test_rfsim_sa
rh_ci_ue_parallel
rh_wk50_debug
rohan_ulsim2RxFix
s1-subnormal_rewrite
s1_subnormal
s1_subnormal-robert
sa-merge-rrc-srb
sa-msg4
sa-msg4-rrc
sa-msg4-rrc-yihz
sa-msg4-rrc-yihz-hs
sa_rrc_yihz
sanitize-address
sanitize-v1
sanitize-v1-tmp
sarma_pvnp_oai
scs_60_iisc
sim-channels
small-config-change
small_nr_bugfixes
t-gnb-tracer
test-5GREC
test-nsa-benetel
test-panos
test_nsa_gtpu_fix
test_rt-fix_phy-test
ue-dci-false-detection
ue-fixes
ue-pdsch-pusch-parallel
ue-race-fix
ue_beam_selection
usrp_stop_cleanly
usrp_x400
wf-sa-rrc
wf_testc
wireshark-T-hack-ueid
wireshark-log-scheduling-requests
wk11-with-phytest
x2_handle_sctp_shutdown
xiangwab
xiangwan
xw2
2021.wk14_a
2021.wk13_d
2021.wk13_c
2021.w30
2021.w29
2021.w28
2021.w27
2021.w26
2021.w25
2021.w24
2021.w23
2021.w22
2021.w20
2021.w19
2021.w18_b
2021.w18_a
2021.w17_b
2021.w16
2021.w15
2021.w14
2021.w13_a
2021.w12
2021.w11
2021.w10
2021.w09
2021.w08
2021.w06
2021.w05
2021.w04
2021.w02
2020.w51_2
2020.w51
2020.w50
benetel_gnb_rel_2.0
benetel_gnb_rel_1.0
benetel_enb_rel_2.0
benetel_enb_rel_1.0
Changes
4
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4 changed files
with
119 additions
and
18 deletions
+119
-18
openair2/LAYER2/NR_MAC_gNB/gNB_scheduler_phytest.c
openair2/LAYER2/NR_MAC_gNB/gNB_scheduler_phytest.c
+92
-0
openair2/LAYER2/NR_MAC_gNB/gNB_scheduler_ulsch.c
openair2/LAYER2/NR_MAC_gNB/gNB_scheduler_ulsch.c
+13
-14
openair2/LAYER2/NR_MAC_gNB/mac_proto.h
openair2/LAYER2/NR_MAC_gNB/mac_proto.h
+9
-0
openair2/LAYER2/NR_MAC_gNB/main.c
openair2/LAYER2/NR_MAC_gNB/main.c
+5
-4
No files found.
openair2/LAYER2/NR_MAC_gNB/gNB_scheduler_phytest.c
View file @
e6435cf7
...
...
@@ -427,3 +427,95 @@ void config_uldci(NR_BWP_Uplink_t *ubwp,
dci_pdu_rel15
->
rv
);
}
void
nr_ul_preprocessor_phytest
(
module_id_t
module_id
,
frame_t
frame
,
sub_frame_t
slot
,
int
num_slots_per_tdd
,
uint64_t
ulsch_in_slot_bitmap
)
{
gNB_MAC_INST
*
nr_mac
=
RC
.
nrmac
[
module_id
];
NR_COMMON_channels_t
*
cc
=
nr_mac
->
common_channels
;
NR_ServingCellConfigCommon_t
*
scc
=
cc
->
ServingCellConfigCommon
;
const
int
mu
=
scc
->
uplinkConfigCommon
->
initialUplinkBWP
->
genericParameters
.
subcarrierSpacing
;
NR_UE_info_t
*
UE_info
=
&
nr_mac
->
UE_info
;
AssertFatal
(
UE_info
->
num_UEs
<=
1
,
"%s() cannot handle more than one UE, but found %d
\n
"
,
__func__
,
UE_info
->
num_UEs
);
if
(
UE_info
->
num_UEs
==
0
)
return
;
const
int
UE_id
=
0
;
const
int
CC_id
=
0
;
NR_UE_sched_ctrl_t
*
sched_ctrl
=
&
UE_info
->
UE_sched_ctrl
[
UE_id
];
const
int
tda
=
1
;
const
struct
NR_PUSCH_TimeDomainResourceAllocationList
*
tdaList
=
sched_ctrl
->
active_ubwp
->
bwp_Common
->
pusch_ConfigCommon
->
choice
.
setup
->
pusch_TimeDomainAllocationList
;
AssertFatal
(
tda
<
tdaList
->
list
.
count
,
"time domain assignment %d >= %d
\n
"
,
tda
,
tdaList
->
list
.
count
);
int
K2
=
get_K2
(
sched_ctrl
->
active_ubwp
,
tda
,
mu
);
const
int
sched_frame
=
frame
+
(
slot
+
K2
>=
num_slots_per_tdd
);
const
int
sched_slot
=
(
slot
+
K2
)
%
num_slots_per_tdd
;
/* check if slot is UL, and that slot is 8 (assuming K2=6 because of UE
* limitations). Note that if K2 or the TDD configuration is changed, below
* conditions might exclude each other and never be true */
if
(
!
(
is_xlsch_in_slot
(
ulsch_in_slot_bitmap
,
sched_slot
)
&&
sched_slot
==
8
))
return
;
const
uint16_t
rbStart
=
0
;
const
uint16_t
rbSize
=
50
;
/* due to OAI UE limitations */
uint16_t
*
vrb_map_UL
=
&
RC
.
nrmac
[
module_id
]
->
common_channels
[
CC_id
].
vrb_map_UL
[
sched_slot
*
275
];
for
(
int
i
=
rbStart
;
i
<
rbStart
+
rbSize
;
++
i
)
{
if
(
vrb_map_UL
[
i
])
{
LOG_E
(
MAC
,
"%s(): %4d.%2d RB %d is already reserved, cannot schedule UE
\n
"
,
__func__
,
frame
,
slot
,
i
);
return
;
}
}
sched_ctrl
->
sched_pusch
->
time_domain_allocation
=
tda
;
sched_ctrl
->
sched_pusch
->
slot
=
sched_slot
;
sched_ctrl
->
sched_pusch
->
frame
=
sched_frame
;
const
int
target_ss
=
NR_SearchSpace__searchSpaceType_PR_ue_Specific
;
sched_ctrl
->
search_space
=
get_searchspace
(
sched_ctrl
->
active_bwp
,
target_ss
);
uint8_t
nr_of_candidates
;
find_aggregation_candidates
(
&
sched_ctrl
->
aggregation_level
,
&
nr_of_candidates
,
sched_ctrl
->
search_space
);
sched_ctrl
->
coreset
=
get_coreset
(
sched_ctrl
->
active_bwp
,
sched_ctrl
->
search_space
,
1
/* dedicated */
);
const
int
cid
=
sched_ctrl
->
coreset
->
controlResourceSetId
;
const
uint16_t
Y
=
UE_info
->
Y
[
UE_id
][
cid
][
slot
];
const
int
m
=
UE_info
->
num_pdcch_cand
[
UE_id
][
cid
];
sched_ctrl
->
cce_index
=
allocate_nr_CCEs
(
RC
.
nrmac
[
module_id
],
sched_ctrl
->
active_bwp
,
sched_ctrl
->
coreset
,
sched_ctrl
->
aggregation_level
,
Y
,
m
,
nr_of_candidates
);
if
(
sched_ctrl
->
cce_index
<
0
)
{
LOG_E
(
MAC
,
"%s(): CCE list not empty, couldn't schedule PUSCH
\n
"
,
__func__
);
return
;
}
UE_info
->
num_pdcch_cand
[
UE_id
][
cid
]
++
;
sched_ctrl
->
sched_pusch
->
mcs
=
9
;
sched_ctrl
->
sched_pusch
->
rbStart
=
rbStart
;
sched_ctrl
->
sched_pusch
->
rbSize
=
rbSize
;
/* mark the corresponding RBs as used */
for
(
int
rb
=
rbStart
;
rb
<
rbStart
+
rbSize
;
rb
++
)
vrb_map_UL
[
rb
]
=
1
;
}
This diff is collapsed.
Click to expand it.
openair2/LAYER2/NR_MAC_gNB/gNB_scheduler_ulsch.c
View file @
e6435cf7
...
...
@@ -481,7 +481,6 @@ void nr_simple_ulsch_preprocessor(module_id_t module_id,
const
int
UE_id
=
0
;
const
int
CC_id
=
0
;
NR_UE_sched_ctrl_t
*
sched_ctrl
=
&
UE_info
->
UE_sched_ctrl
[
UE_id
];
const
int
tda
=
1
;
...
...
@@ -494,16 +493,19 @@ void nr_simple_ulsch_preprocessor(module_id_t module_id,
int
K2
=
get_K2
(
sched_ctrl
->
active_ubwp
,
tda
,
mu
);
const
int
sched_frame
=
frame
+
(
slot
+
K2
>=
num_slots_per_tdd
);
const
int
sched_slot
=
(
slot
+
K2
)
%
num_slots_per_tdd
;
/* check if slot is UL, and for phy test verify that it is in first TDD
* period, slot 8 (for K2=6, this is at slot 2 in the gNB; because of UE
* limitations). Note that if K2 or the TDD configuration is changed, below
* conditions might exclude each other and never be true */
const
bool
transmit
=
is_xlsch_in_slot
(
ulsch_in_slot_bitmap
,
sched_slot
)
&&
(
!
get_softmodem_params
()
->
phy_test
||
sched_slot
==
8
);
if
(
!
transmit
)
if
(
!
is_xlsch_in_slot
(
ulsch_in_slot_bitmap
,
sched_slot
))
return
;
/* get first, largest unallocated region */
uint16_t
*
vrb_map_UL
=
&
RC
.
nrmac
[
module_id
]
->
common_channels
[
CC_id
].
vrb_map_UL
[
sched_slot
*
275
];
uint16_t
rbStart
=
0
;
while
(
vrb_map_UL
[
rbStart
])
rbStart
++
;
const
uint16_t
bwpSize
=
NRRIV2BW
(
sched_ctrl
->
active_ubwp
->
bwp_Common
->
genericParameters
.
locationAndBandwidth
,
275
);
uint16_t
rbSize
=
1
;
while
(
rbStart
+
rbSize
<
bwpSize
&&
!
vrb_map_UL
[
rbStart
+
rbSize
])
rbSize
++
;
sched_ctrl
->
sched_pusch
->
time_domain_allocation
=
tda
;
sched_ctrl
->
sched_pusch
->
slot
=
sched_slot
;
sched_ctrl
->
sched_pusch
->
frame
=
sched_frame
;
...
...
@@ -533,12 +535,9 @@ void nr_simple_ulsch_preprocessor(module_id_t module_id,
UE_info
->
num_pdcch_cand
[
UE_id
][
cid
]
++
;
sched_ctrl
->
sched_pusch
->
mcs
=
9
;
sched_ctrl
->
sched_pusch
->
rbStart
=
0
;
sched_ctrl
->
sched_pusch
->
rbSize
=
get_softmodem_params
()
->
phy_test
?
50
:
NRRIV2BW
(
sched_ctrl
->
active_ubwp
->
bwp_Common
->
genericParameters
.
locationAndBandwidth
,
275
);
sched_ctrl
->
sched_pusch
->
rbStart
=
rbStart
;
sched_ctrl
->
sched_pusch
->
rbSize
=
rbSize
;
uint16_t
*
vrb_map_UL
=
&
RC
.
nrmac
[
module_id
]
->
common_channels
[
CC_id
].
vrb_map_UL
[
sched_slot
*
275
];
/* mark the corresponding RBs as used */
for
(
int
rb
=
0
;
rb
<
sched_ctrl
->
sched_pusch
->
rbSize
;
rb
++
)
vrb_map_UL
[
rb
+
sched_ctrl
->
sched_pusch
->
rbStart
]
=
1
;
...
...
This diff is collapsed.
Click to expand it.
openair2/LAYER2/NR_MAC_gNB/mac_proto.h
View file @
e6435cf7
...
...
@@ -152,6 +152,13 @@ void nr_preprocessor_phytest(module_id_t module_id,
frame_t
frame
,
sub_frame_t
slot
,
int
num_slots_per_tdd
);
/* \brief UL preprocessor for phytest: schedules UE_id 0 with fixed MCS on a
* fixed set of resources */
void
nr_ul_preprocessor_phytest
(
module_id_t
module_id
,
frame_t
frame
,
sub_frame_t
slot
,
int
num_slots_per_tdd
,
uint64_t
ulsch_in_slot_bitmap
);
void
nr_schedule_css_dlsch_phytest
(
module_id_t
module_idP
,
frame_t
frameP
,
...
...
@@ -290,6 +297,8 @@ void find_aggregation_candidates(uint8_t *aggregation_level,
uint8_t
*
nr_of_candidates
,
NR_SearchSpace_t
*
ss
);
long
get_K2
(
NR_BWP_Uplink_t
*
ubwp
,
int
time_domain_assignment
,
int
mu
);
uint8_t
nr_get_tpc
(
int
target
,
uint8_t
cqi
,
int
incr
);
int
get_spf
(
nfapi_nr_config_request_scf_t
*
cfg
);
...
...
This diff is collapsed.
Click to expand it.
openair2/LAYER2/NR_MAC_gNB/main.c
View file @
e6435cf7
...
...
@@ -82,12 +82,13 @@ void mac_top_init_gNB(void)
RC
.
nrmac
[
i
]
->
ul_handle
=
0
;
if
(
get_softmodem_params
()
->
phy_test
)
if
(
get_softmodem_params
()
->
phy_test
)
{
RC
.
nrmac
[
i
]
->
pre_processor_dl
=
nr_preprocessor_phytest
;
else
RC
.
nrmac
[
i
]
->
pre_processor_ul
=
nr_ul_preprocessor_phytest
;
}
else
{
RC
.
nrmac
[
i
]
->
pre_processor_dl
=
nr_simple_dlsch_preprocessor
;
RC
.
nrmac
[
i
]
->
pre_processor_ul
=
nr_simple_ulsch_preprocessor
;
RC
.
nrmac
[
i
]
->
pre_processor_ul
=
nr_simple_ulsch_preprocessor
;
}
}
//END for (i = 0; i < RC.nb_nr_macrlc_inst; i++)
...
...
This diff is collapsed.
Click to expand it.
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