Commit 22d85b1c authored by Evan Nemerson's avatar Evan Nemerson

avx512: work around several bugs in older versions of clang

parent 1d3e007d
...@@ -852,6 +852,21 @@ HEDLEY_DIAGNOSTIC_POP ...@@ -852,6 +852,21 @@ HEDLEY_DIAGNOSTIC_POP
# define SIMDE_BUG_CLANG_POWER9_16x4_BAD_SHIFT # define SIMDE_BUG_CLANG_POWER9_16x4_BAD_SHIFT
# endif # endif
# if defined(SIMDE_ARCH_X86) || defined(SIMDE_ARCH_AMD64) # if defined(SIMDE_ARCH_X86) || defined(SIMDE_ARCH_AMD64)
# if SIMDE_DETECT_CLANG_VERSION_NOT(5,0,0)
# define SIMDE_BUG_CLANG_REV_298042 /* 6afc436a7817a52e78ae7bcdc3faafd460124cac */
# endif
# if SIMDE_DETECT_CLANG_VERSION_NOT(3,7,0)
# define SIMDE_BUG_CLANG_REV_234560 /* b929ad7b1726a32650a8051f69a747fb6836c540 */
# endif
# if SIMDE_DETECT_CLANG_VERSION_CHECK(3,8,0) && SIMDE_DETECT_CLANG_VERSION_NOT(5,0,0)
# define SIMDE_BUG_CLANG_BAD_MADD
# endif
# if SIMDE_DETECT_CLANG_VERSION_CHECK(4,0,0) && SIMDE_DETECT_CLANG_VERSION_NOT(5,0,0)
# define SIMDE_BUG_CLANG_REV_299346 /* ac9959eb533a58482ea4da6c4db1e635a98de384 */
# endif
# if SIMDE_DETECT_CLANG_VERSION_NOT(8,0,0)
# define SIMDE_BUG_CLANG_REV_344862 /* eae26bf73715994c2bd145f9b6dc3836aa4ffd4f */
# endif
# if HEDLEY_HAS_WARNING("-Wsign-conversion") && SIMDE_DETECT_CLANG_VERSION_NOT(11,0,0) # if HEDLEY_HAS_WARNING("-Wsign-conversion") && SIMDE_DETECT_CLANG_VERSION_NOT(11,0,0)
# define SIMDE_BUG_CLANG_45931 # define SIMDE_BUG_CLANG_45931
# endif # endif
......
...@@ -331,8 +331,11 @@ ...@@ -331,8 +331,11 @@
#if HEDLEY_HAS_WARNING("-Wvector-conversion") #if HEDLEY_HAS_WARNING("-Wvector-conversion")
#define SIMDE_DIAGNOSTIC_DISABLE_VECTOR_CONVERSION_ _Pragma("clang diagnostic ignored \"-Wvector-conversion\"") #define SIMDE_DIAGNOSTIC_DISABLE_VECTOR_CONVERSION_ _Pragma("clang diagnostic ignored \"-Wvector-conversion\"")
/* For NEON, the situation with -Wvector-conversion in clang < 10 is /* For NEON, the situation with -Wvector-conversion in clang < 10 is
* bad enough that we just disable the warning altogether. */ * bad enough that we just disable the warning altogether. On x86,
#if defined(SIMDE_ARCH_ARM) && SIMDE_DETECT_CLANG_VERSION_NOT(10,0,0) * clang has similar issues on several sse4.2+ intrinsics before 3.8. */
#if \
(defined(SIMDE_ARCH_ARM) && SIMDE_DETECT_CLANG_VERSION_NOT(10,0,0)) || \
SIMDE_DETECT_CLANG_VERSION_NOT(3,8,0)
#define SIMDE_DIAGNOSTIC_DISABLE_BUGGY_VECTOR_CONVERSION_ SIMDE_DIAGNOSTIC_DISABLE_VECTOR_CONVERSION_ #define SIMDE_DIAGNOSTIC_DISABLE_BUGGY_VECTOR_CONVERSION_ SIMDE_DIAGNOSTIC_DISABLE_VECTOR_CONVERSION_
#endif #endif
#else #else
......
...@@ -3843,7 +3843,7 @@ simde_mm256_loadu_ps (const float a[HEDLEY_ARRAY_PARAM(8)]) { ...@@ -3843,7 +3843,7 @@ simde_mm256_loadu_ps (const float a[HEDLEY_ARRAY_PARAM(8)]) {
SIMDE_FUNCTION_ATTRIBUTES SIMDE_FUNCTION_ATTRIBUTES
simde__m256i simde__m256i
simde_mm256_loadu_epi8(void const * mem_addr) { simde_mm256_loadu_epi8(void const * mem_addr) {
#if defined(SIMDE_X86_AVX512VL_NATIVE) && defined(SIMDE_X86_AVX512BW_NATIVE) && !defined(SIMDE_BUG_GCC_95483) #if defined(SIMDE_X86_AVX512VL_NATIVE) && defined(SIMDE_X86_AVX512BW_NATIVE) && !defined(SIMDE_BUG_GCC_95483) && !defined(SIMDE_BUG_CLANG_REV_344862)
return _mm256_loadu_epi8(mem_addr); return _mm256_loadu_epi8(mem_addr);
#elif defined(SIMDE_X86_AVX_NATIVE) #elif defined(SIMDE_X86_AVX_NATIVE)
return _mm256_loadu_si256(SIMDE_ALIGN_CAST(__m256i const *, mem_addr)); return _mm256_loadu_si256(SIMDE_ALIGN_CAST(__m256i const *, mem_addr));
...@@ -3854,7 +3854,7 @@ simde_mm256_loadu_epi8(void const * mem_addr) { ...@@ -3854,7 +3854,7 @@ simde_mm256_loadu_epi8(void const * mem_addr) {
#endif #endif
} }
#define simde_x_mm256_loadu_epi8(mem_addr) simde_mm256_loadu_epi8(mem_addr) #define simde_x_mm256_loadu_epi8(mem_addr) simde_mm256_loadu_epi8(mem_addr)
#if defined(SIMDE_X86_AVX512VL_ENABLE_NATIVE_ALIASES) || defined(SIMDE_X86_AVX512BW_ENABLE_NATIVE_ALIASES) || (defined(SIMDE_ENABLE_NATIVE_ALIASES) && defined(SIMDE_BUG_GCC_95483)) #if defined(SIMDE_X86_AVX512VL_ENABLE_NATIVE_ALIASES) || defined(SIMDE_X86_AVX512BW_ENABLE_NATIVE_ALIASES) || (defined(SIMDE_ENABLE_NATIVE_ALIASES) && (defined(SIMDE_BUG_GCC_95483) || defined(SIMDE_BUG_CLANG_REV_344862)))
#undef _mm256_loadu_epi8 #undef _mm256_loadu_epi8
#define _mm256_loadu_epi8(a) simde_mm256_loadu_epi8(a) #define _mm256_loadu_epi8(a) simde_mm256_loadu_epi8(a)
#endif #endif
...@@ -3862,7 +3862,7 @@ simde_mm256_loadu_epi8(void const * mem_addr) { ...@@ -3862,7 +3862,7 @@ simde_mm256_loadu_epi8(void const * mem_addr) {
SIMDE_FUNCTION_ATTRIBUTES SIMDE_FUNCTION_ATTRIBUTES
simde__m256i simde__m256i
simde_mm256_loadu_epi16(void const * mem_addr) { simde_mm256_loadu_epi16(void const * mem_addr) {
#if defined(SIMDE_X86_AVX512VL_NATIVE) && defined(SIMDE_X86_AVX512BW_NATIVE) && !defined(SIMDE_BUG_GCC_95483) #if defined(SIMDE_X86_AVX512VL_NATIVE) && defined(SIMDE_X86_AVX512BW_NATIVE) && !defined(SIMDE_BUG_GCC_95483) && !defined(SIMDE_BUG_CLANG_REV_344862)
return _mm256_loadu_epi16(mem_addr); return _mm256_loadu_epi16(mem_addr);
#elif defined(SIMDE_X86_AVX_NATIVE) #elif defined(SIMDE_X86_AVX_NATIVE)
return _mm256_loadu_si256(SIMDE_ALIGN_CAST(__m256i const *, mem_addr)); return _mm256_loadu_si256(SIMDE_ALIGN_CAST(__m256i const *, mem_addr));
...@@ -3873,7 +3873,7 @@ simde_mm256_loadu_epi16(void const * mem_addr) { ...@@ -3873,7 +3873,7 @@ simde_mm256_loadu_epi16(void const * mem_addr) {
#endif #endif
} }
#define simde_x_mm256_loadu_epi16(mem_addr) simde_mm256_loadu_epi16(mem_addr) #define simde_x_mm256_loadu_epi16(mem_addr) simde_mm256_loadu_epi16(mem_addr)
#if defined(SIMDE_X86_AVX512VL_ENABLE_NATIVE_ALIASES) || defined(SIMDE_X86_AVX512BW_ENABLE_NATIVE_ALIASES) || (defined(SIMDE_ENABLE_NATIVE_ALIASES) && defined(SIMDE_BUG_GCC_95483)) #if defined(SIMDE_X86_AVX512VL_ENABLE_NATIVE_ALIASES) || defined(SIMDE_X86_AVX512BW_ENABLE_NATIVE_ALIASES) || (defined(SIMDE_ENABLE_NATIVE_ALIASES) && (defined(SIMDE_BUG_GCC_95483) || defined(SIMDE_BUG_CLANG_REV_344862)))
#undef _mm256_loadu_epi16 #undef _mm256_loadu_epi16
#define _mm256_loadu_epi16(a) simde_mm256_loadu_epi16(a) #define _mm256_loadu_epi16(a) simde_mm256_loadu_epi16(a)
#endif #endif
...@@ -3881,7 +3881,7 @@ simde_mm256_loadu_epi16(void const * mem_addr) { ...@@ -3881,7 +3881,7 @@ simde_mm256_loadu_epi16(void const * mem_addr) {
SIMDE_FUNCTION_ATTRIBUTES SIMDE_FUNCTION_ATTRIBUTES
simde__m256i simde__m256i
simde_mm256_loadu_epi32(void const * mem_addr) { simde_mm256_loadu_epi32(void const * mem_addr) {
#if defined(SIMDE_X86_AVX512VL_NATIVE) && !defined(SIMDE_BUG_GCC_95483) #if defined(SIMDE_X86_AVX512VL_NATIVE) && !defined(SIMDE_BUG_GCC_95483) && !defined(SIMDE_BUG_CLANG_REV_344862)
return _mm256_loadu_epi32(mem_addr); return _mm256_loadu_epi32(mem_addr);
#elif defined(SIMDE_X86_AVX_NATIVE) #elif defined(SIMDE_X86_AVX_NATIVE)
return _mm256_loadu_si256(SIMDE_ALIGN_CAST(__m256i const *, mem_addr)); return _mm256_loadu_si256(SIMDE_ALIGN_CAST(__m256i const *, mem_addr));
...@@ -3892,7 +3892,7 @@ simde_mm256_loadu_epi32(void const * mem_addr) { ...@@ -3892,7 +3892,7 @@ simde_mm256_loadu_epi32(void const * mem_addr) {
#endif #endif
} }
#define simde_x_mm256_loadu_epi32(mem_addr) simde_mm256_loadu_epi32(mem_addr) #define simde_x_mm256_loadu_epi32(mem_addr) simde_mm256_loadu_epi32(mem_addr)
#if defined(SIMDE_X86_AVX512VL_ENABLE_NATIVE_ALIASES) || (defined(SIMDE_ENABLE_NATIVE_ALIASES) && defined(SIMDE_BUG_GCC_95483)) #if defined(SIMDE_X86_AVX512VL_ENABLE_NATIVE_ALIASES) || (defined(SIMDE_ENABLE_NATIVE_ALIASES) && (defined(SIMDE_BUG_GCC_95483) || defined(SIMDE_BUG_CLANG_REV_344862)))
#undef _mm256_loadu_epi32 #undef _mm256_loadu_epi32
#define _mm256_loadu_epi32(a) simde_mm256_loadu_epi32(a) #define _mm256_loadu_epi32(a) simde_mm256_loadu_epi32(a)
#endif #endif
...@@ -3900,7 +3900,7 @@ simde_mm256_loadu_epi32(void const * mem_addr) { ...@@ -3900,7 +3900,7 @@ simde_mm256_loadu_epi32(void const * mem_addr) {
SIMDE_FUNCTION_ATTRIBUTES SIMDE_FUNCTION_ATTRIBUTES
simde__m256i simde__m256i
simde_mm256_loadu_epi64(void const * mem_addr) { simde_mm256_loadu_epi64(void const * mem_addr) {
#if defined(SIMDE_X86_AVX512VL_NATIVE) && !defined(SIMDE_BUG_GCC_95483) #if defined(SIMDE_X86_AVX512VL_NATIVE) && !defined(SIMDE_BUG_GCC_95483) && !defined(SIMDE_BUG_CLANG_REV_344862)
return _mm256_loadu_epi64(mem_addr); return _mm256_loadu_epi64(mem_addr);
#elif defined(SIMDE_X86_AVX_NATIVE) #elif defined(SIMDE_X86_AVX_NATIVE)
return _mm256_loadu_si256(SIMDE_ALIGN_CAST(__m256i const *, mem_addr)); return _mm256_loadu_si256(SIMDE_ALIGN_CAST(__m256i const *, mem_addr));
...@@ -3911,7 +3911,7 @@ simde_mm256_loadu_epi64(void const * mem_addr) { ...@@ -3911,7 +3911,7 @@ simde_mm256_loadu_epi64(void const * mem_addr) {
#endif #endif
} }
#define simde_x_mm256_loadu_epi64(mem_addr) simde_mm256_loadu_epi64(mem_addr) #define simde_x_mm256_loadu_epi64(mem_addr) simde_mm256_loadu_epi64(mem_addr)
#if defined(SIMDE_X86_AVX512VL_ENABLE_NATIVE_ALIASES) || (defined(SIMDE_ENABLE_NATIVE_ALIASES) && defined(SIMDE_BUG_GCC_95483)) #if defined(SIMDE_X86_AVX512VL_ENABLE_NATIVE_ALIASES) || (defined(SIMDE_ENABLE_NATIVE_ALIASES) && (defined(SIMDE_BUG_GCC_95483) || defined(SIMDE_BUG_CLANG_REV_344862)))
#undef _mm256_loadu_epi64 #undef _mm256_loadu_epi64
#define _mm256_loadu_epi64(a) simde_mm256_loadu_epi64(a) #define _mm256_loadu_epi64(a) simde_mm256_loadu_epi64(a)
#endif #endif
......
...@@ -594,7 +594,9 @@ simde_mm256_blend_epi16(simde__m256i a, simde__m256i b, const int imm8) ...@@ -594,7 +594,9 @@ simde_mm256_blend_epi16(simde__m256i a, simde__m256i b, const int imm8)
return simde__m256i_from_private(r_); return simde__m256i_from_private(r_);
} }
#if defined(SIMDE_X86_AVX2_NATIVE) #if defined(SIMDE_X86_AVX2_NATIVE) && defined(SIMDE_BUG_CLANG_REV_234560)
# define simde_mm256_blend_epi16(a, b, imm8) _mm256_castpd_si256(_mm256_blend_epi16(a, b, imm8))
#elif defined(SIMDE_X86_AVX2_NATIVE)
# define simde_mm256_blend_epi16(a, b, imm8) _mm256_blend_epi16(a, b, imm8) # define simde_mm256_blend_epi16(a, b, imm8) _mm256_blend_epi16(a, b, imm8)
#elif SIMDE_NATURAL_VECTOR_SIZE_LE(128) #elif SIMDE_NATURAL_VECTOR_SIZE_LE(128)
# define simde_mm256_blend_epi16(a, b, imm8) \ # define simde_mm256_blend_epi16(a, b, imm8) \
......
...@@ -128,7 +128,7 @@ simde_mm512_extracti32x4_epi32 (simde__m512i a, int imm8) ...@@ -128,7 +128,7 @@ simde_mm512_extracti32x4_epi32 (simde__m512i a, int imm8)
return a_.m128i[imm8 & 3]; return a_.m128i[imm8 & 3];
} }
#if defined(SIMDE_X86_AVX512F_NATIVE) && (!defined(HEDLEY_GCC_VERSION) || HEDLEY_GCC_VERSION_CHECK(7,0,0)) #if defined(SIMDE_X86_AVX512F_NATIVE) && (!defined(HEDLEY_GCC_VERSION) || HEDLEY_GCC_VERSION_CHECK(7,0,0)) && !defined(SIMDE_BUG_CLANG_REV_299346)
#define simde_mm512_extracti32x4_epi32(a, imm8) _mm512_extracti32x4_epi32(a, imm8) #define simde_mm512_extracti32x4_epi32(a, imm8) _mm512_extracti32x4_epi32(a, imm8)
#endif #endif
#if defined(SIMDE_X86_AVX512F_ENABLE_NATIVE_ALIASES) #if defined(SIMDE_X86_AVX512F_ENABLE_NATIVE_ALIASES)
...@@ -136,7 +136,7 @@ simde_mm512_extracti32x4_epi32 (simde__m512i a, int imm8) ...@@ -136,7 +136,7 @@ simde_mm512_extracti32x4_epi32 (simde__m512i a, int imm8)
#define _mm512_extracti32x4_epi32(a, imm8) simde_mm512_extracti32x4_epi32(a, imm8) #define _mm512_extracti32x4_epi32(a, imm8) simde_mm512_extracti32x4_epi32(a, imm8)
#endif #endif
#if defined(SIMDE_X86_AVX512F_NATIVE) && (!defined(HEDLEY_GCC_VERSION) || HEDLEY_GCC_VERSION_CHECK(7,0,0)) #if defined(SIMDE_X86_AVX512F_NATIVE) && (!defined(HEDLEY_GCC_VERSION) || HEDLEY_GCC_VERSION_CHECK(7,0,0)) && !defined(SIMDE_BUG_CLANG_REV_299346)
#define simde_mm512_mask_extracti32x4_epi32(src, k, a, imm8) _mm512_mask_extracti32x4_epi32(src, k, a, imm8) #define simde_mm512_mask_extracti32x4_epi32(src, k, a, imm8) _mm512_mask_extracti32x4_epi32(src, k, a, imm8)
#else #else
#define simde_mm512_mask_extracti32x4_epi32(src, k, a, imm8) simde_mm_mask_mov_epi32(src, k, simde_mm512_extracti32x4_epi32(a, imm8)) #define simde_mm512_mask_extracti32x4_epi32(src, k, a, imm8) simde_mm_mask_mov_epi32(src, k, simde_mm512_extracti32x4_epi32(a, imm8))
...@@ -146,7 +146,7 @@ simde_mm512_extracti32x4_epi32 (simde__m512i a, int imm8) ...@@ -146,7 +146,7 @@ simde_mm512_extracti32x4_epi32 (simde__m512i a, int imm8)
#define _mm512_mask_extracti32x4_epi32(src, k, a, imm8) simde_mm512_mask_extracti32x4_epi32(src, k, a, imm8) #define _mm512_mask_extracti32x4_epi32(src, k, a, imm8) simde_mm512_mask_extracti32x4_epi32(src, k, a, imm8)
#endif #endif
#if defined(SIMDE_X86_AVX512F_NATIVE) && (!defined(HEDLEY_GCC_VERSION) || HEDLEY_GCC_VERSION_CHECK(7,0,0)) #if defined(SIMDE_X86_AVX512F_NATIVE) && (!defined(HEDLEY_GCC_VERSION) || HEDLEY_GCC_VERSION_CHECK(7,0,0)) && !defined(SIMDE_BUG_CLANG_REV_299346)
#define simde_mm512_maskz_extracti32x4_epi32(k, a, imm8) _mm512_maskz_extracti32x4_epi32(k, a, imm8) #define simde_mm512_maskz_extracti32x4_epi32(k, a, imm8) _mm512_maskz_extracti32x4_epi32(k, a, imm8)
#else #else
#define simde_mm512_maskz_extracti32x4_epi32(k, a, imm8) simde_mm_maskz_mov_epi32(k, simde_mm512_extracti32x4_epi32(a, imm8)) #define simde_mm512_maskz_extracti32x4_epi32(k, a, imm8) simde_mm_maskz_mov_epi32(k, simde_mm512_extracti32x4_epi32(a, imm8))
...@@ -164,7 +164,7 @@ simde_mm512_extracti64x4_epi64 (simde__m512i a, int imm8) ...@@ -164,7 +164,7 @@ simde_mm512_extracti64x4_epi64 (simde__m512i a, int imm8)
return a_.m256i[imm8 & 1]; return a_.m256i[imm8 & 1];
} }
#if defined(SIMDE_X86_AVX512F_NATIVE) && (!defined(HEDLEY_GCC_VERSION) || HEDLEY_GCC_VERSION_CHECK(7,0,0)) #if defined(SIMDE_X86_AVX512F_NATIVE) && (!defined(HEDLEY_GCC_VERSION) || HEDLEY_GCC_VERSION_CHECK(7,0,0)) && !defined(SIMDE_BUG_CLANG_REV_299346)
#define simde_mm512_extracti64x4_epi64(a, imm8) _mm512_extracti64x4_epi64(a, imm8) #define simde_mm512_extracti64x4_epi64(a, imm8) _mm512_extracti64x4_epi64(a, imm8)
#endif #endif
#if defined(SIMDE_X86_AVX512F_ENABLE_NATIVE_ALIASES) #if defined(SIMDE_X86_AVX512F_ENABLE_NATIVE_ALIASES)
...@@ -172,7 +172,7 @@ simde_mm512_extracti64x4_epi64 (simde__m512i a, int imm8) ...@@ -172,7 +172,7 @@ simde_mm512_extracti64x4_epi64 (simde__m512i a, int imm8)
#define _mm512_extracti64x4_epi64(a, imm8) simde_mm512_extracti64x4_epi64(a, imm8) #define _mm512_extracti64x4_epi64(a, imm8) simde_mm512_extracti64x4_epi64(a, imm8)
#endif #endif
#if defined(SIMDE_X86_AVX512F_NATIVE) && (!defined(HEDLEY_GCC_VERSION) || HEDLEY_GCC_VERSION_CHECK(7,0,0)) #if defined(SIMDE_X86_AVX512F_NATIVE) && (!defined(HEDLEY_GCC_VERSION) || HEDLEY_GCC_VERSION_CHECK(7,0,0)) && !defined(SIMDE_BUG_CLANG_REV_299346)
#define simde_mm512_mask_extracti64x4_epi64(src, k, a, imm8) _mm512_mask_extracti64x4_epi64(src, k, a, imm8) #define simde_mm512_mask_extracti64x4_epi64(src, k, a, imm8) _mm512_mask_extracti64x4_epi64(src, k, a, imm8)
#else #else
#define simde_mm512_mask_extracti64x4_epi64(src, k, a, imm8) simde_mm256_mask_mov_epi64(src, k, simde_mm512_extracti64x4_epi64(a, imm8)) #define simde_mm512_mask_extracti64x4_epi64(src, k, a, imm8) simde_mm256_mask_mov_epi64(src, k, simde_mm512_extracti64x4_epi64(a, imm8))
...@@ -182,7 +182,7 @@ simde_mm512_extracti64x4_epi64 (simde__m512i a, int imm8) ...@@ -182,7 +182,7 @@ simde_mm512_extracti64x4_epi64 (simde__m512i a, int imm8)
#define _mm512_mask_extracti64x4_epi64(src, k, a, imm8) simde_mm512_mask_extracti64x4_epi64(src, k, a, imm8) #define _mm512_mask_extracti64x4_epi64(src, k, a, imm8) simde_mm512_mask_extracti64x4_epi64(src, k, a, imm8)
#endif #endif
#if defined(SIMDE_X86_AVX512F_NATIVE) && (!defined(HEDLEY_GCC_VERSION) || HEDLEY_GCC_VERSION_CHECK(7,0,0)) #if defined(SIMDE_X86_AVX512F_NATIVE) && (!defined(HEDLEY_GCC_VERSION) || HEDLEY_GCC_VERSION_CHECK(7,0,0)) && !defined(SIMDE_BUG_CLANG_REV_299346)
#define simde_mm512_maskz_extracti64x4_epi64(k, a, imm8) _mm512_maskz_extracti64x4_epi64(k, a, imm8) #define simde_mm512_maskz_extracti64x4_epi64(k, a, imm8) _mm512_maskz_extracti64x4_epi64(k, a, imm8)
#else #else
#define simde_mm512_maskz_extracti64x4_epi64(k, a, imm8) simde_mm256_maskz_mov_epi64(k, simde_mm512_extracti64x4_epi64(a, imm8)) #define simde_mm512_maskz_extracti64x4_epi64(k, a, imm8) simde_mm256_maskz_mov_epi64(k, simde_mm512_extracti64x4_epi64(a, imm8))
......
...@@ -40,7 +40,7 @@ simde_kshiftli_mask16 (simde__mmask16 a, unsigned int count) ...@@ -40,7 +40,7 @@ simde_kshiftli_mask16 (simde__mmask16 a, unsigned int count)
SIMDE_REQUIRE_CONSTANT_RANGE(count, 0, 255) { SIMDE_REQUIRE_CONSTANT_RANGE(count, 0, 255) {
return HEDLEY_STATIC_CAST(simde__mmask16, (count <= 15) ? (a << count) : 0); return HEDLEY_STATIC_CAST(simde__mmask16, (count <= 15) ? (a << count) : 0);
} }
#if defined(SIMDE_X86_AVX512F_NATIVE) && (!defined(HEDLEY_GCC_VERSION) || HEDLEY_GCC_VERSION_CHECK(7,0,0)) #if defined(SIMDE_X86_AVX512F_NATIVE) && (!defined(HEDLEY_GCC_VERSION) || HEDLEY_GCC_VERSION_CHECK(7,0,0)) && (!defined(SIMDE_DETECT_CLANG_VERSION) && SIMDE_DETECT_CLANG_VERSION_CHECK(8,0,0))
#define simde_kshiftli_mask16(a, count) _kshiftli_mask16(a, count) #define simde_kshiftli_mask16(a, count) _kshiftli_mask16(a, count)
#endif #endif
#if defined(SIMDE_X86_AVX512F_ENABLE_NATIVE_ALIASES) #if defined(SIMDE_X86_AVX512F_ENABLE_NATIVE_ALIASES)
...@@ -54,7 +54,7 @@ simde_kshiftli_mask32 (simde__mmask32 a, unsigned int count) ...@@ -54,7 +54,7 @@ simde_kshiftli_mask32 (simde__mmask32 a, unsigned int count)
SIMDE_REQUIRE_CONSTANT_RANGE(count, 0, 255) { SIMDE_REQUIRE_CONSTANT_RANGE(count, 0, 255) {
return (count <= 31) ? (a << count) : 0; return (count <= 31) ? (a << count) : 0;
} }
#if defined(SIMDE_X86_AVX512BW_NATIVE) && (!defined(HEDLEY_GCC_VERSION) || HEDLEY_GCC_VERSION_CHECK(7,0,0)) #if defined(SIMDE_X86_AVX512BW_NATIVE) && (!defined(HEDLEY_GCC_VERSION) || HEDLEY_GCC_VERSION_CHECK(7,0,0)) && (!defined(SIMDE_DETECT_CLANG_VERSION) && SIMDE_DETECT_CLANG_VERSION_CHECK(8,0,0))
#define simde_kshiftli_mask32(a, count) _kshiftli_mask32(a, count) #define simde_kshiftli_mask32(a, count) _kshiftli_mask32(a, count)
#endif #endif
#if defined(SIMDE_X86_AVX512BW_ENABLE_NATIVE_ALIASES) #if defined(SIMDE_X86_AVX512BW_ENABLE_NATIVE_ALIASES)
...@@ -68,7 +68,7 @@ simde_kshiftli_mask64 (simde__mmask64 a, unsigned int count) ...@@ -68,7 +68,7 @@ simde_kshiftli_mask64 (simde__mmask64 a, unsigned int count)
SIMDE_REQUIRE_CONSTANT_RANGE(count, 0, 255) { SIMDE_REQUIRE_CONSTANT_RANGE(count, 0, 255) {
return (count <= 63) ? (a << count) : 0; return (count <= 63) ? (a << count) : 0;
} }
#if defined(SIMDE_X86_AVX512BW_NATIVE) && (!defined(HEDLEY_GCC_VERSION) || HEDLEY_GCC_VERSION_CHECK(7,0,0)) #if defined(SIMDE_X86_AVX512BW_NATIVE) && (!defined(HEDLEY_GCC_VERSION) || HEDLEY_GCC_VERSION_CHECK(7,0,0)) && (!defined(SIMDE_DETECT_CLANG_VERSION) && SIMDE_DETECT_CLANG_VERSION_CHECK(8,0,0))
#define simde_kshiftli_mask64(a, count) _kshiftli_mask64(a, count) #define simde_kshiftli_mask64(a, count) _kshiftli_mask64(a, count)
#endif #endif
#if defined(SIMDE_X86_AVX512BW_ENABLE_NATIVE_ALIASES) #if defined(SIMDE_X86_AVX512BW_ENABLE_NATIVE_ALIASES)
...@@ -82,7 +82,7 @@ simde_kshiftli_mask8 (simde__mmask8 a, unsigned int count) ...@@ -82,7 +82,7 @@ simde_kshiftli_mask8 (simde__mmask8 a, unsigned int count)
SIMDE_REQUIRE_CONSTANT_RANGE(count, 0, 255) { SIMDE_REQUIRE_CONSTANT_RANGE(count, 0, 255) {
return HEDLEY_STATIC_CAST(simde__mmask8, (count <= 7) ? (a << count) : 0); return HEDLEY_STATIC_CAST(simde__mmask8, (count <= 7) ? (a << count) : 0);
} }
#if defined(SIMDE_X86_AVX512DQ_NATIVE) && (!defined(HEDLEY_GCC_VERSION) || HEDLEY_GCC_VERSION_CHECK(7,0,0)) #if defined(SIMDE_X86_AVX512DQ_NATIVE) && (!defined(HEDLEY_GCC_VERSION) || HEDLEY_GCC_VERSION_CHECK(7,0,0)) && (!defined(SIMDE_DETECT_CLANG_VERSION) && SIMDE_DETECT_CLANG_VERSION_CHECK(8,0,0))
#define simde_kshiftli_mask8(a, count) _kshiftli_mask8(a, count) #define simde_kshiftli_mask8(a, count) _kshiftli_mask8(a, count)
#endif #endif
#if defined(SIMDE_X86_AVX512DQ_ENABLE_NATIVE_ALIASES) #if defined(SIMDE_X86_AVX512DQ_ENABLE_NATIVE_ALIASES)
...@@ -96,7 +96,7 @@ simde_kshiftri_mask16 (simde__mmask16 a, unsigned int count) ...@@ -96,7 +96,7 @@ simde_kshiftri_mask16 (simde__mmask16 a, unsigned int count)
SIMDE_REQUIRE_CONSTANT_RANGE(count, 0, 255) { SIMDE_REQUIRE_CONSTANT_RANGE(count, 0, 255) {
return HEDLEY_STATIC_CAST(simde__mmask16, (count <= 15) ? (a >> count) : 0); return HEDLEY_STATIC_CAST(simde__mmask16, (count <= 15) ? (a >> count) : 0);
} }
#if defined(SIMDE_X86_AVX512F_NATIVE) && (!defined(HEDLEY_GCC_VERSION) || HEDLEY_GCC_VERSION_CHECK(7,0,0)) #if defined(SIMDE_X86_AVX512F_NATIVE) && (!defined(HEDLEY_GCC_VERSION) || HEDLEY_GCC_VERSION_CHECK(7,0,0)) && (!defined(SIMDE_DETECT_CLANG_VERSION) && SIMDE_DETECT_CLANG_VERSION_CHECK(8,0,0))
#define simde_kshiftri_mask16(a, count) _kshiftri_mask16(a, count) #define simde_kshiftri_mask16(a, count) _kshiftri_mask16(a, count)
#endif #endif
#if defined(SIMDE_X86_AVX512F_ENABLE_NATIVE_ALIASES) #if defined(SIMDE_X86_AVX512F_ENABLE_NATIVE_ALIASES)
...@@ -110,7 +110,7 @@ simde_kshiftri_mask32 (simde__mmask32 a, unsigned int count) ...@@ -110,7 +110,7 @@ simde_kshiftri_mask32 (simde__mmask32 a, unsigned int count)
SIMDE_REQUIRE_CONSTANT_RANGE(count, 0, 255) { SIMDE_REQUIRE_CONSTANT_RANGE(count, 0, 255) {
return (count <= 31) ? (a >> count) : 0; return (count <= 31) ? (a >> count) : 0;
} }
#if defined(SIMDE_X86_AVX512BW_NATIVE) && (!defined(HEDLEY_GCC_VERSION) || HEDLEY_GCC_VERSION_CHECK(7,0,0)) #if defined(SIMDE_X86_AVX512BW_NATIVE) && (!defined(HEDLEY_GCC_VERSION) || HEDLEY_GCC_VERSION_CHECK(7,0,0)) && (!defined(SIMDE_DETECT_CLANG_VERSION) && SIMDE_DETECT_CLANG_VERSION_CHECK(8,0,0))
#define simde_kshiftri_mask32(a, count) _kshiftri_mask32(a, count) #define simde_kshiftri_mask32(a, count) _kshiftri_mask32(a, count)
#endif #endif
#if defined(SIMDE_X86_AVX512BW_ENABLE_NATIVE_ALIASES) #if defined(SIMDE_X86_AVX512BW_ENABLE_NATIVE_ALIASES)
...@@ -124,7 +124,7 @@ simde_kshiftri_mask64 (simde__mmask64 a, unsigned int count) ...@@ -124,7 +124,7 @@ simde_kshiftri_mask64 (simde__mmask64 a, unsigned int count)
SIMDE_REQUIRE_CONSTANT_RANGE(count, 0, 255) { SIMDE_REQUIRE_CONSTANT_RANGE(count, 0, 255) {
return (count <= 63) ? (a >> count) : 0; return (count <= 63) ? (a >> count) : 0;
} }
#if defined(SIMDE_X86_AVX512BW_NATIVE) && (!defined(HEDLEY_GCC_VERSION) || HEDLEY_GCC_VERSION_CHECK(7,0,0)) #if defined(SIMDE_X86_AVX512BW_NATIVE) && (!defined(HEDLEY_GCC_VERSION) || HEDLEY_GCC_VERSION_CHECK(7,0,0)) && (!defined(SIMDE_DETECT_CLANG_VERSION) && SIMDE_DETECT_CLANG_VERSION_CHECK(8,0,0))
#define simde_kshiftri_mask64(a, count) _kshiftri_mask64(a, count) #define simde_kshiftri_mask64(a, count) _kshiftri_mask64(a, count)
#endif #endif
#if defined(SIMDE_X86_AVX512BW_ENABLE_NATIVE_ALIASES) #if defined(SIMDE_X86_AVX512BW_ENABLE_NATIVE_ALIASES)
...@@ -138,7 +138,7 @@ simde_kshiftri_mask8 (simde__mmask8 a, unsigned int count) ...@@ -138,7 +138,7 @@ simde_kshiftri_mask8 (simde__mmask8 a, unsigned int count)
SIMDE_REQUIRE_CONSTANT_RANGE(count, 0, 255) { SIMDE_REQUIRE_CONSTANT_RANGE(count, 0, 255) {
return HEDLEY_STATIC_CAST(simde__mmask8, (count <= 7) ? (a >> count) : 0); return HEDLEY_STATIC_CAST(simde__mmask8, (count <= 7) ? (a >> count) : 0);
} }
#if defined(SIMDE_X86_AVX512DQ_NATIVE) && (!defined(HEDLEY_GCC_VERSION) || HEDLEY_GCC_VERSION_CHECK(7,0,0)) #if defined(SIMDE_X86_AVX512DQ_NATIVE) && (!defined(HEDLEY_GCC_VERSION) || HEDLEY_GCC_VERSION_CHECK(7,0,0)) && (!defined(SIMDE_DETECT_CLANG_VERSION) && SIMDE_DETECT_CLANG_VERSION_CHECK(8,0,0))
#define simde_kshiftri_mask8(a, count) _kshiftri_mask8(a, count) #define simde_kshiftri_mask8(a, count) _kshiftri_mask8(a, count)
#endif #endif
#if defined(SIMDE_X86_AVX512DQ_ENABLE_NATIVE_ALIASES) #if defined(SIMDE_X86_AVX512DQ_ENABLE_NATIVE_ALIASES)
......
...@@ -37,7 +37,11 @@ SIMDE_FUNCTION_ATTRIBUTES ...@@ -37,7 +37,11 @@ SIMDE_FUNCTION_ATTRIBUTES
simde__m512 simde__m512
simde_mm512_loadu_ps (void const * mem_addr) { simde_mm512_loadu_ps (void const * mem_addr) {
#if defined(SIMDE_X86_AVX512F_NATIVE) #if defined(SIMDE_X86_AVX512F_NATIVE)
return _mm512_loadu_ps(mem_addr); #if defined(SIMDE_BUG_CLANG_REV_298042)
return _mm512_loadu_ps(SIMDE_ALIGN_CAST(const float *, mem_addr));
#else
return _mm512_loadu_ps(mem_addr);
#endif
#else #else
simde__m512 r; simde__m512 r;
simde_memcpy(&r, mem_addr, sizeof(r)); simde_memcpy(&r, mem_addr, sizeof(r));
...@@ -53,7 +57,11 @@ SIMDE_FUNCTION_ATTRIBUTES ...@@ -53,7 +57,11 @@ SIMDE_FUNCTION_ATTRIBUTES
simde__m512d simde__m512d
simde_mm512_loadu_pd (void const * mem_addr) { simde_mm512_loadu_pd (void const * mem_addr) {
#if defined(SIMDE_X86_AVX512F_NATIVE) #if defined(SIMDE_X86_AVX512F_NATIVE)
return _mm512_loadu_pd(mem_addr); #if defined(SIMDE_BUG_CLANG_REV_298042)
return _mm512_loadu_pd(SIMDE_ALIGN_CAST(const double *, mem_addr));
#else
return _mm512_loadu_pd(mem_addr);
#endif
#else #else
simde__m512d r; simde__m512d r;
simde_memcpy(&r, mem_addr, sizeof(r)); simde_memcpy(&r, mem_addr, sizeof(r));
......
...@@ -102,7 +102,7 @@ simde_mm512_madd_epi16 (simde__m512i a, simde__m512i b) { ...@@ -102,7 +102,7 @@ simde_mm512_madd_epi16 (simde__m512i a, simde__m512i b) {
a_ = simde__m512i_to_private(a), a_ = simde__m512i_to_private(a),
b_ = simde__m512i_to_private(b); b_ = simde__m512i_to_private(b);
#if SIMDE_NATURAL_VECTOR_SIZE_LE(256) #if SIMDE_NATURAL_VECTOR_SIZE_LE(256) || defined(SIMDE_BUG_CLANG_BAD_MADD)
for (size_t i = 0 ; i < (sizeof(r_.m256i) / sizeof(r_.m256i[0])) ; i++) { for (size_t i = 0 ; i < (sizeof(r_.m256i) / sizeof(r_.m256i[0])) ; i++) {
r_.m256i[i] = simde_mm256_madd_epi16(a_.m256i[i], b_.m256i[i]); r_.m256i[i] = simde_mm256_madd_epi16(a_.m256i[i], b_.m256i[i]);
} }
......
...@@ -103,7 +103,7 @@ simde_mm512_maddubs_epi16 (simde__m512i a, simde__m512i b) { ...@@ -103,7 +103,7 @@ simde_mm512_maddubs_epi16 (simde__m512i a, simde__m512i b) {
a_ = simde__m512i_to_private(a), a_ = simde__m512i_to_private(a),
b_ = simde__m512i_to_private(b); b_ = simde__m512i_to_private(b);
#if SIMDE_NATURAL_VECTOR_SIZE_LE(256) #if SIMDE_NATURAL_VECTOR_SIZE_LE(256) || defined(SIMDE_BUG_CLANG_BAD_MADD)
for (size_t i = 0 ; i < (sizeof(r_.m256i) / sizeof(r_.m256i[0])) ; i++) { for (size_t i = 0 ; i < (sizeof(r_.m256i) / sizeof(r_.m256i[0])) ; i++) {
r_.m256i[i] = simde_mm256_maddubs_epi16(a_.m256i[i], b_.m256i[i]); r_.m256i[i] = simde_mm256_maddubs_epi16(a_.m256i[i], b_.m256i[i]);
} }
......
...@@ -3417,7 +3417,7 @@ simde_mm_loadu_pd (simde_float64 const mem_addr[HEDLEY_ARRAY_PARAM(2)]) { ...@@ -3417,7 +3417,7 @@ simde_mm_loadu_pd (simde_float64 const mem_addr[HEDLEY_ARRAY_PARAM(2)]) {
SIMDE_FUNCTION_ATTRIBUTES SIMDE_FUNCTION_ATTRIBUTES
simde__m128i simde__m128i
simde_mm_loadu_epi8(void const * mem_addr) { simde_mm_loadu_epi8(void const * mem_addr) {
#if defined(SIMDE_X86_AVX512VL_NATIVE) && defined(SIMDE_X86_AVX512BW_NATIVE) && !defined(SIMDE_BUG_GCC_95483) #if defined(SIMDE_X86_AVX512VL_NATIVE) && defined(SIMDE_X86_AVX512BW_NATIVE) && !defined(SIMDE_BUG_GCC_95483) && !defined(SIMDE_BUG_CLANG_REV_344862)
return _mm_loadu_epi8(mem_addr); return _mm_loadu_epi8(mem_addr);
#elif defined(SIMDE_X86_SSE2_NATIVE) #elif defined(SIMDE_X86_SSE2_NATIVE)
return _mm_loadu_si128(SIMDE_ALIGN_CAST(__m128i const *, mem_addr)); return _mm_loadu_si128(SIMDE_ALIGN_CAST(__m128i const *, mem_addr));
...@@ -3434,7 +3434,7 @@ simde_mm_loadu_epi8(void const * mem_addr) { ...@@ -3434,7 +3434,7 @@ simde_mm_loadu_epi8(void const * mem_addr) {
#endif #endif
} }
#define simde_x_mm_loadu_epi8(mem_addr) simde_mm_loadu_epi8(mem_addr) #define simde_x_mm_loadu_epi8(mem_addr) simde_mm_loadu_epi8(mem_addr)
#if defined(SIMDE_X86_AVX512VL_ENABLE_NATIVE_ALIASES) || defined(SIMDE_X86_AVX512BW_ENABLE_NATIVE_ALIASES) || (defined(SIMDE_ENABLE_NATIVE_ALIASES) && defined(SIMDE_BUG_GCC_95483)) #if defined(SIMDE_X86_AVX512VL_ENABLE_NATIVE_ALIASES) || defined(SIMDE_X86_AVX512BW_ENABLE_NATIVE_ALIASES) || (defined(SIMDE_ENABLE_NATIVE_ALIASES) && (defined(SIMDE_BUG_GCC_95483) || defined(SIMDE_BUG_CLANG_REV_344862)))
#undef _mm_loadu_epi8 #undef _mm_loadu_epi8
#define _mm_loadu_epi8(a) simde_mm_loadu_epi8(a) #define _mm_loadu_epi8(a) simde_mm_loadu_epi8(a)
#endif #endif
...@@ -3442,7 +3442,7 @@ simde_mm_loadu_epi8(void const * mem_addr) { ...@@ -3442,7 +3442,7 @@ simde_mm_loadu_epi8(void const * mem_addr) {
SIMDE_FUNCTION_ATTRIBUTES SIMDE_FUNCTION_ATTRIBUTES
simde__m128i simde__m128i
simde_mm_loadu_epi16(void const * mem_addr) { simde_mm_loadu_epi16(void const * mem_addr) {
#if defined(SIMDE_X86_AVX512VL_NATIVE) && defined(SIMDE_X86_AVX512BW_NATIVE) && !defined(SIMDE_BUG_GCC_95483) #if defined(SIMDE_X86_AVX512VL_NATIVE) && defined(SIMDE_X86_AVX512BW_NATIVE) && !defined(SIMDE_BUG_GCC_95483) && !defined(SIMDE_BUG_CLANG_REV_344862)
return _mm_loadu_epi16(mem_addr); return _mm_loadu_epi16(mem_addr);
#elif defined(SIMDE_X86_SSE2_NATIVE) #elif defined(SIMDE_X86_SSE2_NATIVE)
return _mm_loadu_si128(SIMDE_ALIGN_CAST(__m128i const *, mem_addr)); return _mm_loadu_si128(SIMDE_ALIGN_CAST(__m128i const *, mem_addr));
...@@ -3459,7 +3459,7 @@ simde_mm_loadu_epi16(void const * mem_addr) { ...@@ -3459,7 +3459,7 @@ simde_mm_loadu_epi16(void const * mem_addr) {
#endif #endif
} }
#define simde_x_mm_loadu_epi16(mem_addr) simde_mm_loadu_epi16(mem_addr) #define simde_x_mm_loadu_epi16(mem_addr) simde_mm_loadu_epi16(mem_addr)
#if defined(SIMDE_X86_AVX512VL_ENABLE_NATIVE_ALIASES) || defined(SIMDE_X86_AVX512BW_ENABLE_NATIVE_ALIASES) || (defined(SIMDE_ENABLE_NATIVE_ALIASES) && defined(SIMDE_BUG_GCC_95483)) #if defined(SIMDE_X86_AVX512VL_ENABLE_NATIVE_ALIASES) || defined(SIMDE_X86_AVX512BW_ENABLE_NATIVE_ALIASES) || (defined(SIMDE_ENABLE_NATIVE_ALIASES) && (defined(SIMDE_BUG_GCC_95483) || defined(SIMDE_BUG_CLANG_REV_344862)))
#undef _mm_loadu_epi16 #undef _mm_loadu_epi16
#define _mm_loadu_epi16(a) simde_mm_loadu_epi16(a) #define _mm_loadu_epi16(a) simde_mm_loadu_epi16(a)
#endif #endif
...@@ -3467,7 +3467,7 @@ simde_mm_loadu_epi16(void const * mem_addr) { ...@@ -3467,7 +3467,7 @@ simde_mm_loadu_epi16(void const * mem_addr) {
SIMDE_FUNCTION_ATTRIBUTES SIMDE_FUNCTION_ATTRIBUTES
simde__m128i simde__m128i
simde_mm_loadu_epi32(void const * mem_addr) { simde_mm_loadu_epi32(void const * mem_addr) {
#if defined(SIMDE_X86_AVX512VL_NATIVE) && !defined(SIMDE_BUG_GCC_95483) #if defined(SIMDE_X86_AVX512VL_NATIVE) && !defined(SIMDE_BUG_GCC_95483) && !defined(SIMDE_BUG_CLANG_REV_344862)
return _mm_loadu_epi32(mem_addr); return _mm_loadu_epi32(mem_addr);
#elif defined(SIMDE_X86_SSE2_NATIVE) #elif defined(SIMDE_X86_SSE2_NATIVE)
return _mm_loadu_si128(SIMDE_ALIGN_CAST(__m128i const *, mem_addr)); return _mm_loadu_si128(SIMDE_ALIGN_CAST(__m128i const *, mem_addr));
...@@ -3484,7 +3484,7 @@ simde_mm_loadu_epi32(void const * mem_addr) { ...@@ -3484,7 +3484,7 @@ simde_mm_loadu_epi32(void const * mem_addr) {
#endif #endif
} }
#define simde_x_mm_loadu_epi32(mem_addr) simde_mm_loadu_epi32(mem_addr) #define simde_x_mm_loadu_epi32(mem_addr) simde_mm_loadu_epi32(mem_addr)
#if defined(SIMDE_X86_AVX512VL_ENABLE_NATIVE_ALIASES) || (defined(SIMDE_ENABLE_NATIVE_ALIASES) && defined(SIMDE_BUG_GCC_95483)) #if defined(SIMDE_X86_AVX512VL_ENABLE_NATIVE_ALIASES) || (defined(SIMDE_ENABLE_NATIVE_ALIASES) && (defined(SIMDE_BUG_GCC_95483) || defined(SIMDE_BUG_CLANG_REV_344862)))
#undef _mm_loadu_epi32 #undef _mm_loadu_epi32
#define _mm_loadu_epi32(a) simde_mm_loadu_epi32(a) #define _mm_loadu_epi32(a) simde_mm_loadu_epi32(a)
#endif #endif
...@@ -3492,7 +3492,7 @@ simde_mm_loadu_epi32(void const * mem_addr) { ...@@ -3492,7 +3492,7 @@ simde_mm_loadu_epi32(void const * mem_addr) {
SIMDE_FUNCTION_ATTRIBUTES SIMDE_FUNCTION_ATTRIBUTES
simde__m128i simde__m128i
simde_mm_loadu_epi64(void const * mem_addr) { simde_mm_loadu_epi64(void const * mem_addr) {
#if defined(SIMDE_X86_AVX512VL_NATIVE) && !defined(SIMDE_BUG_GCC_95483) #if defined(SIMDE_X86_AVX512VL_NATIVE) && !defined(SIMDE_BUG_GCC_95483) && !defined(SIMDE_BUG_CLANG_REV_344862)
return _mm_loadu_epi64(mem_addr); return _mm_loadu_epi64(mem_addr);
#elif defined(SIMDE_X86_SSE2_NATIVE) #elif defined(SIMDE_X86_SSE2_NATIVE)
return _mm_loadu_si128(SIMDE_ALIGN_CAST(__m128i const *, mem_addr)); return _mm_loadu_si128(SIMDE_ALIGN_CAST(__m128i const *, mem_addr));
...@@ -3509,7 +3509,7 @@ simde_mm_loadu_epi64(void const * mem_addr) { ...@@ -3509,7 +3509,7 @@ simde_mm_loadu_epi64(void const * mem_addr) {
#endif #endif
} }
#define simde_x_mm_loadu_epi64(mem_addr) simde_mm_loadu_epi64(mem_addr) #define simde_x_mm_loadu_epi64(mem_addr) simde_mm_loadu_epi64(mem_addr)
#if defined(SIMDE_X86_AVX512VL_ENABLE_NATIVE_ALIASES) || (defined(SIMDE_ENABLE_NATIVE_ALIASES) && defined(SIMDE_BUG_GCC_95483)) #if defined(SIMDE_X86_AVX512VL_ENABLE_NATIVE_ALIASES) || (defined(SIMDE_ENABLE_NATIVE_ALIASES) && (defined(SIMDE_BUG_GCC_95483) || defined(SIMDE_BUG_CLANG_REV_344862)))
#undef _mm_loadu_epi64 #undef _mm_loadu_epi64
#define _mm_loadu_epi64(a) simde_mm_loadu_epi64(a) #define _mm_loadu_epi64(a) simde_mm_loadu_epi64(a)
#endif #endif
......
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