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Libraries
simde
Commits
32650204
Commit
32650204
authored
Jul 21, 2024
by
Dimo Markov
Committed by
Michael R. Crusoe
Aug 12, 2024
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Plain Diff
msvc: add simde_MemoryBarrier to avoid including <windows.h>
parent
7ca5a3e0
Changes
2
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2 changed files
with
52 additions
and
7 deletions
+52
-7
x86/sse.h
x86/sse.h
+51
-6
x86/sse2.h
x86/sse2.h
+1
-1
No files found.
x86/sse.h
View file @
32650204
...
@@ -33,15 +33,60 @@
...
@@ -33,15 +33,60 @@
#include "mmx.h"
#include "mmx.h"
#include "../simde-f16.h"
#include "../simde-f16.h"
#if defined(_WIN32) && !defined(SIMDE_X86_SSE_NATIVE) && defined(_MSC_VER)
#define NOMINMAX
#include <windows.h>
#endif
#if defined(__ARM_ACLE)
#if defined(__ARM_ACLE)
#include <arm_acle.h>
#include <arm_acle.h>
#endif
#endif
#ifdef _MSC_VER
#if defined(SIMDE_ARCH_AARCH64)
#include <intrin.h>
typedef
enum
simde_tag_ARM64INTR_BARRIER_TYPE
{
SIMDE_ARM64_BARRIER_SY
=
0xF
,
}
SIMDE_ARM64INTR_BARRIER_TYPE
;
HEDLEY_ALWAYS_INLINE
void
simde_MemoryBarrier
(
void
)
{
__dmb
(
SIMDE_ARM64_BARRIER_SY
);
}
#elif defined(SIMDE_ARCH_ARM)
#include <intrin.h>
typedef
enum
simde_tag_ARMINTR_BARRIER_TYPE
{
SIMDE_ARM_BARRIER_SY
=
0xF
,
}
SIMDE_ARMINTR_BARRIER_TYPE
;
HEDLEY_ALWAYS_INLINE
void
simde_MemoryBarrier
(
void
)
{
__dmb
(
SIMDE_ARM_BARRIER_SY
);
}
#elif defined(SIMDE_ARCH_X86) || defined(SIMDE_ARCH_AMD64) || defined(SIMDE_ARCH_E2K)
#if !defined(SIMDE_X86_SSE_NO_NATIVE)
#include <intrin.h>
#endif
HEDLEY_ALWAYS_INLINE
void
simde_MemoryBarrier
(
void
)
{
#if defined(SIMDE_X86_SSE_NO_NATIVE)
((
void
)
0
);
// intentionally no-op
#elif defined(SIMDE_ARCH_AMD64)
__faststorefence
();
#elif defined(SIMDE_ARCH_IA64)
__mf
();
#else
long
Barrier
;
__asm
{
xchg
Barrier
,
eax
}
#endif
}
#else
#error "Missing implementation"
#endif
#endif
HEDLEY_DIAGNOSTIC_PUSH
HEDLEY_DIAGNOSTIC_PUSH
SIMDE_DISABLE_UNWANTED_DIAGNOSTICS
SIMDE_DISABLE_UNWANTED_DIAGNOSTICS
SIMDE_BEGIN_DECLS_
SIMDE_BEGIN_DECLS_
...
@@ -4007,7 +4052,7 @@ simde_mm_sfence (void) {
...
@@ -4007,7 +4052,7 @@ simde_mm_sfence (void) {
atomic_thread_fence
(
memory_order_seq_cst
);
atomic_thread_fence
(
memory_order_seq_cst
);
#endif
#endif
#elif defined(_MSC_VER)
#elif defined(_MSC_VER)
MemoryBarrier
();
simde_
MemoryBarrier
();
#elif HEDLEY_HAS_EXTENSION(c_atomic)
#elif HEDLEY_HAS_EXTENSION(c_atomic)
__c11_atomic_thread_fence
(
__ATOMIC_SEQ_CST
);
__c11_atomic_thread_fence
(
__ATOMIC_SEQ_CST
);
#elif defined(__GNUC__) && ((__GNUC__ > 4) || (__GNUC__ == 4 && __GNUC_MINOR__ >= 1))
#elif defined(__GNUC__) && ((__GNUC__ > 4) || (__GNUC__ == 4 && __GNUC_MINOR__ >= 1))
...
...
x86/sse2.h
View file @
32650204
...
@@ -4776,7 +4776,7 @@ simde_mm_pause (void) {
...
@@ -4776,7 +4776,7 @@ simde_mm_pause (void) {
#endif
#endif
#elif defined(SIMDE_ARCH_ARM_NEON)
#elif defined(SIMDE_ARCH_ARM_NEON)
#if defined(_MSC_VER)
#if defined(_MSC_VER)
__isb
(
_ARM64_BARRIER_SY
);
__isb
(
SIMDE
_ARM64_BARRIER_SY
);
#else
#else
__asm__
__volatile__
(
"isb
\n
"
);
__asm__
__volatile__
(
"isb
\n
"
);
#endif
#endif
...
...
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