remove extraneous semicolons from many macro-defined functions

438ddcff · Michael R. Crusoe · Michael R. Crusoe · 9f73373f · 438ddcff · 438ddcff
Commit 438ddcff authored Jan 24, 2025 by Michael R. Crusoe Committed by Michael R. Crusoe Jan 25, 2025
7 changed files
--- a/arm/neon/cmla_lane.h
+++ b/arm/neon/cmla_lane.h
@@ -305,7 +305,7 @@ simde_float32x4_t simde_vcmlaq_lane_f32(simde_float32x4_t r, simde_float32x4_t a
 #if defined(SIMDE_ARM_NEON_A32V8_NATIVE) && SIMDE_ARCH_ARM_CHECK(8, 3) &&                                                   \
    (!defined(HEDLEY_GCC_VERSION) || HEDLEY_GCC_VERSION_CHECK(9, 0, 0)) &&                                                  \
    (!defined(__clang__) || SIMDE_DETECT_CLANG_VERSION_CHECK(12, 0, 0))
-  #define simde_vcmlaq_lane_f32(r, a, b, lane) vcmlaq_lane_f32(r, a, b, 0);
+  #define simde_vcmlaq_lane_f32(r, a, b, lane) vcmlaq_lane_f32(r, a, b, 0)
 #endif
 #if defined(SIMDE_ARM_NEON_A32V8_ENABLE_NATIVE_ALIASES) || (defined(SIMDE_ENABLE_NATIVE_ALIASES) && \
    !(SIMDE_ARCH_ARM_CHECK(8,3) && \

--- a/arm/neon/fmlal.h
+++ b/arm/neon/fmlal.h
@@ -171,13 +171,13 @@ simde_vfmlal_lane_low_f16(simde_float32x2_t r, simde_float16x4_t a, simde_float1
 }
 #if defined(SIMDE_ARM_NEON_A32V8_NATIVE) && defined(SIMDE_ARM_NEON_FP16) && \
    defined(SIMDE_ARCH_ARM_FP16_FML)
-  #define simde_vfmlal_lane_low_f16(r, a, b, lane) vfmlal_lane_low_f16((r), (a), (b), (lane));
+  #define simde_vfmlal_lane_low_f16(r, a, b, lane) vfmlal_lane_low_f16((r), (a), (b), (lane))
 #endif
 #if defined(SIMDE_ARM_NEON_A32V8_ENABLE_NATIVE_ALIASES) || (defined(SIMDE_ENABLE_NATIVE_ALIASES) && \
  !(defined(SIMDE_ARM_NEON_FP16) && \
      defined(SIMDE_ARCH_ARM_FP16_FML)))
  #undef vfmlal_lane_low_f16
-  #define vfmlal_lane_low_f16(r, a, b, lane) simde_vfmlal_lane_low_f16((r), (a), (b), (lane));
+  #define vfmlal_lane_low_f16(r, a, b, lane) simde_vfmlal_lane_low_f16((r), (a), (b), (lane))
 #endif

 SIMDE_FUNCTION_ATTRIBUTES
@@ -201,13 +201,13 @@ simde_vfmlal_laneq_low_f16(simde_float32x2_t r, simde_float16x4_t a, simde_float
 }
 #if defined(SIMDE_ARM_NEON_A32V8_NATIVE) && defined(SIMDE_ARM_NEON_FP16) && \
    defined(SIMDE_ARCH_ARM_FP16_FML)
-  #define simde_vfmlal_laneq_low_f16(r, a, b, lane) vfmlal_laneq_low_f16((r), (a), (b), (lane));
+  #define simde_vfmlal_laneq_low_f16(r, a, b, lane) vfmlal_laneq_low_f16((r), (a), (b), (lane))
 #endif
 #if defined(SIMDE_ARM_NEON_A32V8_ENABLE_NATIVE_ALIASES) || (defined(SIMDE_ENABLE_NATIVE_ALIASES) && \
  !(defined(SIMDE_ARM_NEON_FP16) && \
      defined(SIMDE_ARCH_ARM_FP16_FML)))
  #undef vfmlal_laneq_low_f16
-  #define vfmlal_laneq_low_f16(r, a, b, lane) simde_vfmlal_laneq_low_f16((r), (a), (b), (lane));
+  #define vfmlal_laneq_low_f16(r, a, b, lane) simde_vfmlal_laneq_low_f16((r), (a), (b), (lane))
 #endif

 SIMDE_FUNCTION_ATTRIBUTES
@@ -231,13 +231,13 @@ simde_vfmlalq_lane_low_f16(simde_float32x4_t r, simde_float16x8_t a, simde_float
 }
 #if defined(SIMDE_ARM_NEON_A32V8_NATIVE) && defined(SIMDE_ARM_NEON_FP16) && \
    defined(SIMDE_ARCH_ARM_FP16_FML)
-  #define simde_vfmlalq_lane_low_f16(r, a, b, lane) vfmlalq_lane_low_f16((r), (a), (b), (lane));
+  #define simde_vfmlalq_lane_low_f16(r, a, b, lane) vfmlalq_lane_low_f16((r), (a), (b), (lane))
 #endif
 #if defined(SIMDE_ARM_NEON_A32V8_ENABLE_NATIVE_ALIASES) || (defined(SIMDE_ENABLE_NATIVE_ALIASES) && \
  !(defined(SIMDE_ARM_NEON_FP16) && \
      defined(SIMDE_ARCH_ARM_FP16_FML)))
  #undef vfmlalq_lane_low_f16
-  #define vfmlalq_lane_low_f16(r, a, b, lane) simde_vfmlalq_lane_low_f16((r), (a), (b), (lane));
+  #define vfmlalq_lane_low_f16(r, a, b, lane) simde_vfmlalq_lane_low_f16((r), (a), (b), (lane))
 #endif

 SIMDE_FUNCTION_ATTRIBUTES
@@ -260,13 +260,13 @@ simde_vfmlalq_laneq_low_f16(simde_float32x4_t r, simde_float16x8_t a, simde_floa
 }
 #if defined(SIMDE_ARM_NEON_A32V8_NATIVE) && defined(SIMDE_ARM_NEON_FP16) && \
    defined(SIMDE_ARCH_ARM_FP16_FML)
-  #define simde_vfmlalq_laneq_low_f16(r, a, b, lane) vfmlalq_laneq_low_f16((r), (a), (b), (lane));
+  #define simde_vfmlalq_laneq_low_f16(r, a, b, lane) vfmlalq_laneq_low_f16((r), (a), (b), (lane))
 #endif
 #if defined(SIMDE_ARM_NEON_A32V8_ENABLE_NATIVE_ALIASES) || (defined(SIMDE_ENABLE_NATIVE_ALIASES) && \
  !(defined(SIMDE_ARM_NEON_FP16) && \
      defined(SIMDE_ARCH_ARM_FP16_FML)))
  #undef vfmlalq_laneq_low_f16
-  #define vfmlalq_laneq_low_f16(r, a, b, lane) simde_vfmlalq_laneq_low_f16((r), (a), (b), (lane));
+  #define vfmlalq_laneq_low_f16(r, a, b, lane) simde_vfmlalq_laneq_low_f16((r), (a), (b), (lane))
 #endif

 SIMDE_FUNCTION_ATTRIBUTES
@@ -290,13 +290,13 @@ simde_vfmlal_lane_high_f16(simde_float32x2_t r, simde_float16x4_t a, simde_float
 }
 #if defined(SIMDE_ARM_NEON_A32V8_NATIVE) && defined(SIMDE_ARM_NEON_FP16) && \
    defined(SIMDE_ARCH_ARM_FP16_FML)
-  #define simde_vfmlal_lane_high_f16(r, a, b, lane) vfmlal_lane_high_f16((r), (a), (b), (lane));
+  #define simde_vfmlal_lane_high_f16(r, a, b, lane) vfmlal_lane_high_f16((r), (a), (b), (lane))
 #endif
 #if defined(SIMDE_ARM_NEON_A32V8_ENABLE_NATIVE_ALIASES) || (defined(SIMDE_ENABLE_NATIVE_ALIASES) && \
  !(defined(SIMDE_ARM_NEON_FP16) && \
      defined(SIMDE_ARCH_ARM_FP16_FML)))
  #undef vfmlal_lane_high_f16
-  #define vfmlal_lane_high_f16(r, a, b, lane) simde_vfmlal_lane_high_f16((r), (a), (b), (lane));
+  #define vfmlal_lane_high_f16(r, a, b, lane) simde_vfmlal_lane_high_f16((r), (a), (b), (lane))
 #endif

 SIMDE_FUNCTION_ATTRIBUTES
@@ -321,13 +321,13 @@ simde_vfmlal_laneq_high_f16(simde_float32x2_t r, simde_float16x4_t a, simde_floa
 }
 #if defined(SIMDE_ARM_NEON_A32V8_NATIVE) && defined(SIMDE_ARM_NEON_FP16) && \
    defined(SIMDE_ARCH_ARM_FP16_FML)
-  #define simde_vfmlal_laneq_high_f16(r, a, b, lane) vfmlal_laneq_high_f16((r), (a), (b), (lane));
+  #define simde_vfmlal_laneq_high_f16(r, a, b, lane) vfmlal_laneq_high_f16((r), (a), (b), (lane))
 #endif
 #if defined(SIMDE_ARM_NEON_A32V8_ENABLE_NATIVE_ALIASES) || (defined(SIMDE_ENABLE_NATIVE_ALIASES) && \
  !(defined(SIMDE_ARM_NEON_FP16) && \
      defined(SIMDE_ARCH_ARM_FP16_FML)))
  #undef vfmlal_laneq_high_f16
-  #define vfmlal_laneq_high_f16(r, a, b, lane) simde_vfmlal_laneq_high_f16((r), (a), (b), (lane));
+  #define vfmlal_laneq_high_f16(r, a, b, lane) simde_vfmlal_laneq_high_f16((r), (a), (b), (lane))
 #endif

 SIMDE_FUNCTION_ATTRIBUTES
@@ -352,13 +352,13 @@ simde_vfmlalq_lane_high_f16(simde_float32x4_t r, simde_float16x8_t a, simde_floa
 }
 #if defined(SIMDE_ARM_NEON_A32V8_NATIVE) && defined(SIMDE_ARM_NEON_FP16) && \
    defined(SIMDE_ARCH_ARM_FP16_FML)
-  #define simde_vfmlalq_lane_high_f16(r, a, b, lane) vfmlalq_lane_high_f16((r), (a), (b), (lane));
+  #define simde_vfmlalq_lane_high_f16(r, a, b, lane) vfmlalq_lane_high_f16((r), (a), (b), (lane))
 #endif
 #if defined(SIMDE_ARM_NEON_A32V8_ENABLE_NATIVE_ALIASES) || (defined(SIMDE_ENABLE_NATIVE_ALIASES) && \
  !(defined(SIMDE_ARM_NEON_FP16) && \
      defined(SIMDE_ARCH_ARM_FP16_FML)))
  #undef vfmlalq_lane_high_f16
-  #define vfmlalq_lane_high_f16(r, a, b, lane) simde_vfmlalq_lane_high_f16((r), (a), (b), (lane));
+  #define vfmlalq_lane_high_f16(r, a, b, lane) simde_vfmlalq_lane_high_f16((r), (a), (b), (lane))
 #endif

 SIMDE_FUNCTION_ATTRIBUTES
@@ -382,13 +382,13 @@ simde_vfmlalq_laneq_high_f16(simde_float32x4_t r, simde_float16x8_t a, simde_flo
 }
 #if defined(SIMDE_ARM_NEON_A32V8_NATIVE) && defined(SIMDE_ARM_NEON_FP16) && \
    defined(SIMDE_ARCH_ARM_FP16_FML)
-  #define simde_vfmlalq_laneq_high_f16(r, a, b, lane) vfmlalq_laneq_high_f16((r), (a), (b), (lane));
+  #define simde_vfmlalq_laneq_high_f16(r, a, b, lane) vfmlalq_laneq_high_f16((r), (a), (b), (lane))
 #endif
 #if defined(SIMDE_ARM_NEON_A32V8_ENABLE_NATIVE_ALIASES) || (defined(SIMDE_ENABLE_NATIVE_ALIASES) && \
  !(defined(SIMDE_ARM_NEON_FP16) && \
      defined(SIMDE_ARCH_ARM_FP16_FML)))
  #undef vfmlalq_laneq_high_f16
-  #define vfmlalq_laneq_high_f16(r, a, b, lane) simde_vfmlalq_laneq_high_f16((r), (a), (b), (lane));
+  #define vfmlalq_laneq_high_f16(r, a, b, lane) simde_vfmlalq_laneq_high_f16((r), (a), (b), (lane))
 #endif

 SIMDE_FUNCTION_ATTRIBUTES

--- a/arm/neon/fmlsl.h
+++ b/arm/neon/fmlsl.h
@@ -171,13 +171,13 @@ simde_vfmlsl_lane_low_f16(simde_float32x2_t r, simde_float16x4_t a, simde_float1
 }
 #if defined(SIMDE_ARM_NEON_A32V8_NATIVE) && defined(SIMDE_ARM_NEON_FP16) && \
    defined(SIMDE_ARCH_ARM_FP16_FML)
-  #define simde_vfmlsl_lane_low_f16(r, a, b, lane) vfmlsl_lane_low_f16((r), (a), (b), (lane));
+  #define simde_vfmlsl_lane_low_f16(r, a, b, lane) vfmlsl_lane_low_f16((r), (a), (b), (lane))
 #endif
 #if defined(SIMDE_ARM_NEON_A32V8_ENABLE_NATIVE_ALIASES) || (defined(SIMDE_ENABLE_NATIVE_ALIASES) && \
  !(defined(SIMDE_ARM_NEON_FP16) && \
      defined(SIMDE_ARCH_ARM_FP16_FML)))
  #undef vfmlsl_lane_low_f16
-  #define vfmlsl_lane_low_f16(r, a, b, lane) simde_vfmlsl_lane_low_f16((r), (a), (b), (lane));
+  #define vfmlsl_lane_low_f16(r, a, b, lane) simde_vfmlsl_lane_low_f16((r), (a), (b), (lane))
 #endif

 SIMDE_FUNCTION_ATTRIBUTES
@@ -201,13 +201,13 @@ simde_vfmlsl_laneq_low_f16(simde_float32x2_t r, simde_float16x4_t a, simde_float
 }
 #if defined(SIMDE_ARM_NEON_A32V8_NATIVE) && defined(SIMDE_ARM_NEON_FP16) && \
    defined(SIMDE_ARCH_ARM_FP16_FML)
-  #define simde_vfmlsl_laneq_low_f16(r, a, b, lane) vfmlsl_laneq_low_f16((r), (a), (b), (lane));
+  #define simde_vfmlsl_laneq_low_f16(r, a, b, lane) vfmlsl_laneq_low_f16((r), (a), (b), (lane))
 #endif
 #if defined(SIMDE_ARM_NEON_A32V8_ENABLE_NATIVE_ALIASES) || (defined(SIMDE_ENABLE_NATIVE_ALIASES) && \
  !(defined(SIMDE_ARM_NEON_FP16) && \
      defined(SIMDE_ARCH_ARM_FP16_FML)))
  #undef vfmlsl_laneq_low_f16
-  #define vfmlsl_laneq_low_f16(r, a, b, lane) simde_vfmlsl_laneq_low_f16((r), (a), (b), (lane));
+  #define vfmlsl_laneq_low_f16(r, a, b, lane) simde_vfmlsl_laneq_low_f16((r), (a), (b), (lane))
 #endif

 SIMDE_FUNCTION_ATTRIBUTES
@@ -231,13 +231,13 @@ simde_vfmlslq_lane_low_f16(simde_float32x4_t r, simde_float16x8_t a, simde_float
 }
 #if defined(SIMDE_ARM_NEON_A32V8_NATIVE) && defined(SIMDE_ARM_NEON_FP16) && \
    defined(SIMDE_ARCH_ARM_FP16_FML)
-  #define simde_vfmlslq_lane_low_f16(r, a, b, lane) vfmlslq_lane_low_f16((r), (a), (b), (lane));
+  #define simde_vfmlslq_lane_low_f16(r, a, b, lane) vfmlslq_lane_low_f16((r), (a), (b), (lane))
 #endif
 #if defined(SIMDE_ARM_NEON_A32V8_ENABLE_NATIVE_ALIASES) || (defined(SIMDE_ENABLE_NATIVE_ALIASES) && \
  !(defined(SIMDE_ARM_NEON_FP16) && \
      defined(SIMDE_ARCH_ARM_FP16_FML)))
  #undef vfmlslq_lane_low_f16
-  #define vfmlslq_lane_low_f16(r, a, b, lane) simde_vfmlslq_lane_low_f16((r), (a), (b), (lane));
+  #define vfmlslq_lane_low_f16(r, a, b, lane) simde_vfmlslq_lane_low_f16((r), (a), (b), (lane))
 #endif

 SIMDE_FUNCTION_ATTRIBUTES
@@ -260,13 +260,13 @@ simde_vfmlslq_laneq_low_f16(simde_float32x4_t r, simde_float16x8_t a, simde_floa
 }
 #if defined(SIMDE_ARM_NEON_A32V8_NATIVE) && defined(SIMDE_ARM_NEON_FP16) && \
    defined(SIMDE_ARCH_ARM_FP16_FML)
-  #define simde_vfmlslq_laneq_low_f16(r, a, b, lane) vfmlslq_laneq_low_f16((r), (a), (b), (lane));
+  #define simde_vfmlslq_laneq_low_f16(r, a, b, lane) vfmlslq_laneq_low_f16((r), (a), (b), (lane))
 #endif
 #if defined(SIMDE_ARM_NEON_A32V8_ENABLE_NATIVE_ALIASES) || (defined(SIMDE_ENABLE_NATIVE_ALIASES) && \
  !(defined(SIMDE_ARM_NEON_FP16) && \
      defined(SIMDE_ARCH_ARM_FP16_FML)))
  #undef vfmlslq_laneq_low_f16
-  #define vfmlslq_laneq_low_f16(r, a, b, lane) simde_vfmlslq_laneq_low_f16((r), (a), (b), (lane));
+  #define vfmlslq_laneq_low_f16(r, a, b, lane) simde_vfmlslq_laneq_low_f16((r), (a), (b), (lane))
 #endif

 SIMDE_FUNCTION_ATTRIBUTES
@@ -290,13 +290,13 @@ simde_vfmlsl_lane_high_f16(simde_float32x2_t r, simde_float16x4_t a, simde_float
 }
 #if defined(SIMDE_ARM_NEON_A32V8_NATIVE) && defined(SIMDE_ARM_NEON_FP16) && \
    defined(SIMDE_ARCH_ARM_FP16_FML)
-  #define simde_vfmlsl_lane_high_f16(r, a, b, lane) vfmlsl_lane_high_f16((r), (a), (b), (lane));
+  #define simde_vfmlsl_lane_high_f16(r, a, b, lane) vfmlsl_lane_high_f16((r), (a), (b), (lane))
 #endif
 #if defined(SIMDE_ARM_NEON_A32V8_ENABLE_NATIVE_ALIASES) || (defined(SIMDE_ENABLE_NATIVE_ALIASES) && \
  !(defined(SIMDE_ARM_NEON_FP16) && \
      defined(SIMDE_ARCH_ARM_FP16_FML)))
  #undef vfmlsl_lane_high_f16
-  #define vfmlsl_lane_high_f16(r, a, b, lane) simde_vfmlsl_lane_high_f16((r), (a), (b), (lane));
+  #define vfmlsl_lane_high_f16(r, a, b, lane) simde_vfmlsl_lane_high_f16((r), (a), (b), (lane))
 #endif

 SIMDE_FUNCTION_ATTRIBUTES
@@ -321,13 +321,13 @@ simde_vfmlsl_laneq_high_f16(simde_float32x2_t r, simde_float16x4_t a, simde_floa
 }
 #if defined(SIMDE_ARM_NEON_A32V8_NATIVE) && defined(SIMDE_ARM_NEON_FP16) && \
    defined(SIMDE_ARCH_ARM_FP16_FML)
-  #define simde_vfmlsl_laneq_high_f16(r, a, b, lane) vfmlsl_laneq_high_f16((r), (a), (b), (lane));
+  #define simde_vfmlsl_laneq_high_f16(r, a, b, lane) vfmlsl_laneq_high_f16((r), (a), (b), (lane))
 #endif
 #if defined(SIMDE_ARM_NEON_A32V8_ENABLE_NATIVE_ALIASES) || (defined(SIMDE_ENABLE_NATIVE_ALIASES) && \
  !(defined(SIMDE_ARM_NEON_FP16) && \
      defined(SIMDE_ARCH_ARM_FP16_FML)))
  #undef vfmlsl_laneq_high_f16
-  #define vfmlsl_laneq_high_f16(r, a, b, lane) simde_vfmlsl_laneq_high_f16((r), (a), (b), (lane));
+  #define vfmlsl_laneq_high_f16(r, a, b, lane) simde_vfmlsl_laneq_high_f16((r), (a), (b), (lane))
 #endif

 SIMDE_FUNCTION_ATTRIBUTES
@@ -352,13 +352,13 @@ simde_vfmlslq_lane_high_f16(simde_float32x4_t r, simde_float16x8_t a, simde_floa
 }
 #if defined(SIMDE_ARM_NEON_A32V8_NATIVE) && defined(SIMDE_ARM_NEON_FP16) && \
    defined(SIMDE_ARCH_ARM_FP16_FML)
-  #define simde_vfmlslq_lane_high_f16(r, a, b, lane) vfmlslq_lane_high_f16((r), (a), (b), (lane));
+  #define simde_vfmlslq_lane_high_f16(r, a, b, lane) vfmlslq_lane_high_f16((r), (a), (b), (lane))
 #endif
 #if defined(SIMDE_ARM_NEON_A32V8_ENABLE_NATIVE_ALIASES) || (defined(SIMDE_ENABLE_NATIVE_ALIASES) && \
  !(defined(SIMDE_ARM_NEON_FP16) && \
      defined(SIMDE_ARCH_ARM_FP16_FML)))
  #undef vfmlslq_lane_high_f16
-  #define vfmlslq_lane_high_f16(r, a, b, lane) simde_vfmlslq_lane_high_f16((r), (a), (b), (lane));
+  #define vfmlslq_lane_high_f16(r, a, b, lane) simde_vfmlslq_lane_high_f16((r), (a), (b), (lane))
 #endif

 SIMDE_FUNCTION_ATTRIBUTES
@@ -382,13 +382,13 @@ simde_vfmlslq_laneq_high_f16(simde_float32x4_t r, simde_float16x8_t a, simde_flo
 }
 #if defined(SIMDE_ARM_NEON_A32V8_NATIVE) && defined(SIMDE_ARM_NEON_FP16) && \
    defined(SIMDE_ARCH_ARM_FP16_FML)
-  #define simde_vfmlslq_laneq_high_f16(r, a, b, lane) vfmlslq_laneq_high_f16((r), (a), (b), (lane));
+  #define simde_vfmlslq_laneq_high_f16(r, a, b, lane) vfmlslq_laneq_high_f16((r), (a), (b), (lane))
 #endif
 #if defined(SIMDE_ARM_NEON_A32V8_ENABLE_NATIVE_ALIASES) || (defined(SIMDE_ENABLE_NATIVE_ALIASES) && \
  !(defined(SIMDE_ARM_NEON_FP16) && \
      defined(SIMDE_ARCH_ARM_FP16_FML)))
  #undef vfmlslq_laneq_high_f16
-  #define vfmlslq_laneq_high_f16(r, a, b, lane) simde_vfmlslq_laneq_high_f16((r), (a), (b), (lane));
+  #define vfmlslq_laneq_high_f16(r, a, b, lane) simde_vfmlslq_laneq_high_f16((r), (a), (b), (lane))
 #endif

 SIMDE_END_DECLS_

--- a/arm/neon/sm3.h
+++ b/arm/neon/sm3.h
@@ -90,7 +90,7 @@ simde_vsm3tt1aq_u32(simde_uint32x4_t a, simde_uint32x4_t b, simde_uint32x4_t c,
    return simde_uint32x4_from_private(r_);
 }
 #if defined(SIMDE_ARM_NEON_A64V8_NATIVE) && defined(SIMDE_ARCH_ARM_SM3)
-  #define simde_vsm3tt1aq_u32(a, b, c, imm2) vsm3tt1aq_u32((a), (b), (c), (imm2));
+  #define simde_vsm3tt1aq_u32(a, b, c, imm2) vsm3tt1aq_u32((a), (b), (c), (imm2))
 #endif
 #if defined(SIMDE_ARM_NEON_A64V8_ENABLE_NATIVE_ALIASES) || (defined(SIMDE_ENABLE_NATIVE_ALIASES) && \
    !defined(SIMDE_ARCH_ARM_SM3))
@@ -121,7 +121,7 @@ simde_vsm3tt1bq_u32(simde_uint32x4_t a, simde_uint32x4_t b, simde_uint32x4_t c,
    return simde_uint32x4_from_private(r_);
 }
 #if defined(SIMDE_ARM_NEON_A64V8_NATIVE) && defined(SIMDE_ARCH_ARM_SM3)
-  #define simde_vsm3tt1bq_u32(a, b, c, imm2) vsm3tt1bq_u32((a), (b), (c), (imm2));
+  #define simde_vsm3tt1bq_u32(a, b, c, imm2) vsm3tt1bq_u32((a), (b), (c), (imm2))
 #endif
 #if defined(SIMDE_ARM_NEON_A64V8_ENABLE_NATIVE_ALIASES) || (defined(SIMDE_ENABLE_NATIVE_ALIASES) && \
    !defined(SIMDE_ARCH_ARM_SM3))
@@ -151,7 +151,7 @@ simde_vsm3tt2aq_u32(simde_uint32x4_t a, simde_uint32x4_t b, simde_uint32x4_t c,
    return simde_uint32x4_from_private(r_);
 }
 #if defined(SIMDE_ARM_NEON_A64V8_NATIVE) && defined(SIMDE_ARCH_ARM_SM3)
-  #define simde_vsm3tt2aq_u32(a, b, c, imm2) vsm3tt2aq_u32((a), (b), (c), (imm2));
+  #define simde_vsm3tt2aq_u32(a, b, c, imm2) vsm3tt2aq_u32((a), (b), (c), (imm2))
 #endif
 #if defined(SIMDE_ARM_NEON_A64V8_ENABLE_NATIVE_ALIASES) || (defined(SIMDE_ENABLE_NATIVE_ALIASES) && \
    !defined(SIMDE_ARCH_ARM_SM3))
@@ -181,7 +181,7 @@ simde_vsm3tt2bq_u32(simde_uint32x4_t a, simde_uint32x4_t b, simde_uint32x4_t c,
    return simde_uint32x4_from_private(r_);
 }
 #if defined(SIMDE_ARM_NEON_A64V8_NATIVE) && defined(SIMDE_ARCH_ARM_SM3)
-  #define simde_vsm3tt2bq_u32(a, b, c, imm2) vsm3tt2bq_u32((a), (b), (c), (imm2));
+  #define simde_vsm3tt2bq_u32(a, b, c, imm2) vsm3tt2bq_u32((a), (b), (c), (imm2))
 #endif
 #if defined(SIMDE_ARM_NEON_A64V8_ENABLE_NATIVE_ALIASES) || (defined(SIMDE_ENABLE_NATIVE_ALIASES) && \
    !defined(SIMDE_ARCH_ARM_SM3))

--- a/mips/msa/st.h
+++ b/mips/msa/st.h
@@ -40,7 +40,7 @@ simde_msa_st_b(simde_v16i8 a, void * rs, const int s10)
  simde_memcpy(&(HEDLEY_REINTERPRET_CAST(int8_t*, rs)[s10]), &a, sizeof(a));
 }
 #if defined(SIMDE_MIPS_MSA_NATIVE)
-  #define simde_msa_st_b(a, rs, s10) __msa_st_b((a), (rs), (s10));
+  #define simde_msa_st_b(a, rs, s10) __msa_st_b((a), (rs), (s10))
 #endif
 #if defined(SIMDE_MIPS_MSA_ENABLE_NATIVE_ALIASES)
  #undef __msa_st_b
@@ -55,7 +55,7 @@ simde_msa_st_h(simde_v8i16 a, void * rs, const int s10)
  simde_memcpy(&(HEDLEY_REINTERPRET_CAST(int8_t*, rs)[s10]), &a, sizeof(a));
 }
 #if defined(SIMDE_MIPS_MSA_NATIVE)
-  #define simde_msa_st_h(a, rs, s10) __msa_st_h((a), (rs), (s10));
+  #define simde_msa_st_h(a, rs, s10) __msa_st_h((a), (rs), (s10))
 #endif
 #if defined(SIMDE_MIPS_MSA_ENABLE_NATIVE_ALIASES)
  #undef __msa_st_h
@@ -70,7 +70,7 @@ simde_msa_st_w(simde_v4i32 a, void * rs, const int s10)
  simde_memcpy(&(HEDLEY_REINTERPRET_CAST(int8_t*, rs)[s10]), &a, sizeof(a));
 }
 #if defined(SIMDE_MIPS_MSA_NATIVE)
-  #define simde_msa_st_w(a, rs, s10) __msa_st_w((a), (rs), (s10));
+  #define simde_msa_st_w(a, rs, s10) __msa_st_w((a), (rs), (s10))
 #endif
 #if defined(SIMDE_MIPS_MSA_ENABLE_NATIVE_ALIASES)
  #undef __msa_st_w
@@ -85,7 +85,7 @@ simde_msa_st_d(simde_v2i64 a, void * rs, const int s10)
  simde_memcpy(&(HEDLEY_REINTERPRET_CAST(int8_t*, rs)[s10]), &a, sizeof(a));
 }
 #if defined(SIMDE_MIPS_MSA_NATIVE)
-  #define simde_msa_st_d(a, rs, s10) __msa_st_d((a), (rs), (s10));
+  #define simde_msa_st_d(a, rs, s10) __msa_st_d((a), (rs), (s10))
 #endif
 #if defined(SIMDE_MIPS_MSA_ENABLE_NATIVE_ALIASES)
  #undef __msa_st_d

--- a/wasm/simd128.h
+++ b/wasm/simd128.h
@@ -1050,7 +1050,7 @@ simde_wasm_u8x16_splat (uint8_t a) {
 #if defined(SIMDE_WASM_SIMD128_NATIVE)
  #define simde_wasm_i8x16_const_splat(a) wasm_i8x16_const_splat((a))
 #else
-  #define simde_wasm_i8x16_const_splat(a) simde_wasm_i8x16_splat(a);
+  #define simde_wasm_i8x16_const_splat(a) simde_wasm_i8x16_splat(a)
 #endif
 #if defined(SIMDE_WASM_SIMD128_ENABLE_NATIVE_ALIASES)
  #define wasm_i8x16_const_splat(a) simde_wasm_i8x16_const_splat((a))
@@ -1059,7 +1059,7 @@ simde_wasm_u8x16_splat (uint8_t a) {
 #if defined(SIMDE_WASM_SIMD128_NATIVE)
  #define simde_wasm_u8x16_const_splat(a) wasm_u8x16_const_splat((a))
 #else
-  #define simde_wasm_u8x16_const_splat(a) simde_wasm_u8x16_splat(a);
+  #define simde_wasm_u8x16_const_splat(a) simde_wasm_u8x16_splat(a)
 #endif
 #if defined(SIMDE_WASM_SIMD128_ENABLE_NATIVE_ALIASES)
  #define wasm_u8x16_const_splat(a) simde_wasm_u8x16_const_splat((a))
@@ -1124,7 +1124,7 @@ simde_wasm_u16x8_splat (uint16_t a) {
 #if defined(SIMDE_WASM_SIMD128_NATIVE)
  #define simde_wasm_i16x8_const_splat(a) wasm_i16x8_const_splat((a))
 #else
-  #define simde_wasm_i16x8_const_splat(a) simde_wasm_i16x8_splat(a);
+  #define simde_wasm_i16x8_const_splat(a) simde_wasm_i16x8_splat(a)
 #endif
 #if defined(SIMDE_WASM_SIMD128_ENABLE_NATIVE_ALIASES)
  #define wasm_i16x8_const_splat(a) simde_wasm_i16x8_const_splat((a))
@@ -1133,7 +1133,7 @@ simde_wasm_u16x8_splat (uint16_t a) {
 #if defined(SIMDE_WASM_SIMD128_NATIVE)
  #define simde_wasm_u16x8_const_splat(a) wasm_u16x8_const_splat((a))
 #else
-  #define simde_wasm_u16x8_const_splat(a) simde_wasm_u16x8_splat(a);
+  #define simde_wasm_u16x8_const_splat(a) simde_wasm_u16x8_splat(a)
 #endif
 #if defined(SIMDE_WASM_SIMD128_ENABLE_NATIVE_ALIASES)
  #define wasm_u16x8_const_splat(a) simde_wasm_u16x8_const_splat((a))
@@ -1198,7 +1198,7 @@ simde_wasm_u32x4_splat (uint32_t a) {
 #if defined(SIMDE_WASM_SIMD128_NATIVE)
  #define simde_wasm_i32x4_const_splat(a) wasm_i32x4_const_splat((a))
 #else
-  #define simde_wasm_i32x4_const_splat(a) simde_wasm_i32x4_splat(a);
+  #define simde_wasm_i32x4_const_splat(a) simde_wasm_i32x4_splat(a)
 #endif
 #if defined(SIMDE_WASM_SIMD128_ENABLE_NATIVE_ALIASES)
  #define wasm_i32x4_const_splat(a) simde_wasm_i32x4_const_splat((a))
@@ -1207,7 +1207,7 @@ simde_wasm_u32x4_splat (uint32_t a) {
 #if defined(SIMDE_WASM_SIMD128_NATIVE)
  #define simde_wasm_u32x4_const_splat(a) wasm_u32x4_const_splat((a))
 #else
-  #define simde_wasm_u32x4_const_splat(a) simde_wasm_u32x4_splat(a);
+  #define simde_wasm_u32x4_const_splat(a) simde_wasm_u32x4_splat(a)
 #endif
 #if defined(SIMDE_WASM_SIMD128_ENABLE_NATIVE_ALIASES)
  #define wasm_u32x4_const_splat(a) simde_wasm_u32x4_const_splat((a))
@@ -1272,7 +1272,7 @@ simde_wasm_u64x2_splat (uint64_t a) {
 #if defined(SIMDE_WASM_SIMD128_NATIVE)
  #define simde_wasm_i64x2_const_splat(a) wasm_i64x2_const_splat((a))
 #else
-  #define simde_wasm_i64x2_const_splat(a) simde_wasm_i64x2_splat(a);
+  #define simde_wasm_i64x2_const_splat(a) simde_wasm_i64x2_splat(a)
 #endif
 #if defined(SIMDE_WASM_SIMD128_ENABLE_NATIVE_ALIASES)
  #define wasm_i64x2_const_splat(a) simde_wasm_i64x2_const_splat((a))
@@ -1281,7 +1281,7 @@ simde_wasm_u64x2_splat (uint64_t a) {
 #if defined(SIMDE_WASM_SIMD128_NATIVE)
  #define simde_wasm_u64x2_const_splat(a) wasm_u64x2_const_splat((a))
 #else
-  #define simde_wasm_u64x2_const_splat(a) simde_wasm_u64x2_splat(a);
+  #define simde_wasm_u64x2_const_splat(a) simde_wasm_u64x2_splat(a)
 #endif
 #if defined(SIMDE_WASM_SIMD128_ENABLE_NATIVE_ALIASES)
  #define wasm_i64x2_const_splat(a) simde_wasm_i64x2_const_splat((a))

--- a/x86/avx512/types.h
+++ b/x86/avx512/types.h
@@ -595,14 +595,14 @@ typedef uint64_t simde__mmask64;
  #if !defined(HEDLEY_INTEL_VERSION)
    typedef uint16_t __mmask16;
  #else
-    #define __mmask16 uint16_t;
+    #define __mmask16 uint16_t
  #endif
 #endif
 #if !defined(__mmask32) && defined(SIMDE_ENABLE_NATIVE_ALIASES)
  #if !defined(HEDLEY_INTEL_VERSION)
    typedef uint32_t __mmask32;
  #else
-    #define __mmask32 uint32_t;
+    #define __mmask32 uint32_t
  #endif
 #endif
 #if !defined(__mmask64) && defined(SIMDE_ENABLE_NATIVE_ALIASES)
@@ -613,7 +613,7 @@ typedef uint64_t simde__mmask64;
      typedef uint64_t __mmask64;
    #endif
  #else
-    #define __mmask64 uint64_t;
+    #define __mmask64 uint64_t
  #endif
 #endif