avx512: start supporting AVX512FP16 / m512h

simde-arch.h

@@ -324,6 +324,9 @@
 #  if defined(__AVX512VL__)
 #    define SIMDE_ARCH_X86_AVX512VL 1
 #  endif
+#  if defined(__AVX512FP16__)
+#    define SIMDE_ARCH_X86_AVX512FP16 1
+#  endif
 #  if defined(__GFNI__)
 #    define SIMDE_ARCH_X86_GFNI 1
 #  endif

simde-f16.h

@@ -96,10 +96,11 @@ SIMDE_BEGIN_DECLS_
   #endif
 #elif SIMDE_FLOAT16_API == SIMDE_FLOAT16_API_FP16_NO_ABI
   typedef struct { __fp16 value; } simde_float16;
-  #if defined(SIMDE_STATEMENT_EXPR_)
+  #if defined(SIMDE_STATEMENT_EXPR_) && !defined(SIMDE_TESTS_H)
     #define SIMDE_FLOAT16_C(value) (__extension__({ ((simde_float16) { HEDLEY_DIAGNOSTIC_PUSH SIMDE_DIAGNOSTIC_DISABLE_C99_EXTENSIONS_ HEDLEY_STATIC_CAST(__fp16, (value)) }); HEDLEY_DIAGNOSTIC_POP }))
   #else
     #define SIMDE_FLOAT16_C(value) ((simde_float16) { HEDLEY_STATIC_CAST(__fp16, (value)) })
+    #define SIMDE_FLOAT16_IS_SCALAR 1
   #endif
 #elif SIMDE_FLOAT16_API == SIMDE_FLOAT16_API_FP16
   typedef __fp16 simde_float16;
@@ -126,7 +127,7 @@ SIMDE_DEFINE_CONVERSION_FUNCTION_(simde_float16_as_uint16,      uint16_t, simde_
 SIMDE_DEFINE_CONVERSION_FUNCTION_(simde_uint16_as_float16, simde_float16,      uint16_t)
 
 #if SIMDE_FLOAT16_API == SIMDE_FLOAT16_API_PORTABLE
-  #define SIMDE_NANHF simde_uint16_as_float16(0x7E00)
+  #define SIMDE_NANHF simde_uint16_as_float16(0x7E00) // a quiet Not-a-Number
   #define SIMDE_INFINITYHF simde_uint16_as_float16(0x7C00)
   #define SIMDE_NINFINITYHF simde_uint16_as_float16(0xFC00)
 #else
@@ -145,9 +146,9 @@ SIMDE_DEFINE_CONVERSION_FUNCTION_(simde_uint16_as_float16, simde_float16,      u
     #endif
   #else
     #if SIMDE_MATH_BUILTIN_LIBM(nanf16)
-      #define SIMDE_NANHF HEDLEY_STATIC_CAST(simde_float16, __builtin_nanf16(""))
+      #define SIMDE_NANHF  __builtin_nanf16("")
     #elif defined(SIMDE_MATH_NAN)
-      #define SIMDE_NANHF HEDLEY_STATIC_CAST(simde_float16, SIMDE_MATH_NAN)
+      #define SIMDE_NANHF SIMDE_MATH_NAN
     #endif
     #if SIMDE_MATH_BUILTIN_LIBM(inf16)
       #define SIMDE_INFINITYHF __builtin_inf16()
@@ -158,9 +159,9 @@ SIMDE_DEFINE_CONVERSION_FUNCTION_(simde_uint16_as_float16, simde_float16,      u
     #endif
   #endif
 #endif
+
 /* Conversion -- convert between single-precision and half-precision
  * floats. */
-
 static HEDLEY_ALWAYS_INLINE HEDLEY_CONST
 simde_float16
 simde_float16_from_float32 (simde_float32 value) {
@@ -258,6 +259,54 @@ simde_float16_to_float32 (simde_float16 value) {
   #define SIMDE_FLOAT16_VALUE(value) simde_float16_from_float32(SIMDE_FLOAT32_C(value))
 #endif
 
+#if !defined(simde_isinfhf) && defined(simde_math_isinff)
+  #define simde_isinfhf(a) simde_math_isinff(simde_float16_to_float32(a))
+#endif
+#if !defined(simde_isnanhf) && defined(simde_math_isnanf)
+  #define simde_isnanhf(a) simde_math_isnanf(simde_float16_to_float32(a))
+#endif
+#if !defined(simde_isnormalhf) && defined(simde_math_isnormalf)
+  #define simde_isnormalhf(a) simde_math_isnormalf(simde_float16_to_float32(a))
+#endif
+#if !defined(simde_issubnormalhf) && defined(simde_math_issubnormalf)
+  #define simde_issubnormalhf(a) simde_math_issubnormalf(simde_float16_to_float32(a))
+#endif
+
+#define simde_fpclassifyhf(a) simde_math_fpclassifyf(simde_float16_to_float32(a))
+
+static HEDLEY_INLINE
+uint8_t
+simde_fpclasshf(simde_float16 v, const int imm8) {
+  uint16_t bits = simde_float16_as_uint16(v);
+  uint8_t negative = (bits >> 15) & 1;
+  uint16_t const ExpMask = 0x7C00; // [14:10]
+  uint16_t const MantMask = 0x03FF; // [9:0]
+  uint8_t exponent_all_ones = ((bits & ExpMask) == ExpMask);
+  uint8_t exponent_all_zeros = ((bits & ExpMask) == 0);
+  uint8_t mantissa_all_zeros = ((bits & MantMask) == 0);
+  uint8_t zero = exponent_all_zeros & mantissa_all_zeros;
+  uint8_t signaling_bit = (bits >> 9) & 1;
+
+  uint8_t result = 0;
+  uint8_t snan = exponent_all_ones & (!mantissa_all_zeros) & (!signaling_bit);
+  uint8_t qnan = exponent_all_ones & (!mantissa_all_zeros) & signaling_bit;
+  uint8_t positive_zero = (!negative) & zero;
+  uint8_t negative_zero = negative & zero;
+  uint8_t positive_infinity = (!negative) & exponent_all_ones & mantissa_all_zeros;
+  uint8_t negative_infinity = negative & exponent_all_ones & mantissa_all_zeros;
+  uint8_t denormal = exponent_all_zeros & (!mantissa_all_zeros);
+  uint8_t finite_negative = negative & (!exponent_all_ones) & (!zero);
+  result = (((imm8 >> 0) & qnan)              | \
+            ((imm8 >> 1) & positive_zero)     | \
+            ((imm8 >> 2) & negative_zero)     | \
+            ((imm8 >> 3) & positive_infinity) | \
+            ((imm8 >> 4) & negative_infinity) | \
+            ((imm8 >> 5) & denormal)          | \
+            ((imm8 >> 6) & finite_negative)   | \
+            ((imm8 >> 7) & snan));
+  return result;
+}
+
 SIMDE_END_DECLS_
 HEDLEY_DIAGNOSTIC_POP
 

simde-features.h

@@ -142,6 +142,15 @@
   #define SIMDE_X86_AVX512F_NATIVE
 #endif
 
+#if !defined(SIMDE_X86_AVX512FP16_NATIVE) && !defined(SIMDE_X86_AVX512FP16_NO_NATIVE) && !defined(SIMDE_NO_NATIVE)
+  #if defined(SIMDE_ARCH_X86_AVX512FP16)
+    #define SIMDE_X86_AVX512FP16_NATIVE
+  #endif
+#endif
+#if defined(SIMDE_X86_AVX512BW_NATIVE) && !defined(SIMDE_X86_AVX512F_NATIVE)
+  #define SIMDE_X86_AVX512F_NATIVE
+#endif
+
 #if !defined(SIMDE_X86_AVX512BF16_NATIVE) && !defined(SIMDE_X86_AVX512BF16_NO_NATIVE) && !defined(SIMDE_NO_NATIVE)
   #if defined(SIMDE_ARCH_X86_AVX512BF16)
     #define SIMDE_X86_AVX512BF16_NATIVE
@@ -623,6 +632,9 @@
   #if !defined(SIMDE_X86_AVX512CD_NATIVE)
     #define SIMDE_X86_AVX512CD_ENABLE_NATIVE_ALIASES
   #endif
+  #if !defined(SIMDE_X86_AVX512FP16_NATIVE)
+    #define SIMDE_X86_AVX512FP16_ENABLE_NATIVE_ALIASES
+  #endif
   #if !defined(SIMDE_X86_GFNI_NATIVE)
     #define SIMDE_X86_GFNI_ENABLE_NATIVE_ALIASES
   #endif

x86/avx512.h

@@ -100,6 +100,7 @@
 #include "avx512/popcnt.h"
 #include "avx512/range.h"
 #include "avx512/range_round.h"
+#include "avx512/reduce.h"
 #include "avx512/rol.h"
 #include "avx512/rolv.h"
 #include "avx512/ror.h"

x86/avx512/cast.h

@@ -100,6 +100,39 @@ simde_mm512_castps_si512 (simde__m512 a) {
   #define _mm512_castps_si512(a) simde_mm512_castps_si512(a)
 #endif
 
+SIMDE_FUNCTION_ATTRIBUTES
+simde__m512i
+simde_mm512_castph_si512 (simde__m512h a) {
+  #if defined(SIMDE_X86_AVX512FP16_NATIVE)
+    return _mm512_castph_si512(a);
+  #else
+    simde__m512i r;
+    simde_memcpy(&r, &a, sizeof(r));
+    return r;
+  #endif
+}
+#if defined(SIMDE_X86_AVX512FP16_ENABLE_NATIVE_ALIASES)
+  #undef _mm512_castph_si512
+  #define _mm512_castph_si512(a) simde_mm512_castph_si512(a)
+#endif
+
+
+SIMDE_FUNCTION_ATTRIBUTES
+simde__m512h
+simde_mm512_castsi512_ph (simde__m512i a) {
+  #if defined(SIMDE_X86_AVX512FP16_NATIVE)
+    return _mm512_castsi512_ph(a);
+  #else
+    simde__m512h r;
+    simde_memcpy(&r, &a, sizeof(r));
+    return r;
+  #endif
+}
+#if defined(SIMDE_X86_AVX512FP16_ENABLE_NATIVE_ALIASES)
+  #undef _mm512_castsi512_ph
+  #define _mm512_castsi512_ph(a) simde_mm512_castsi512_ph(a)
+#endif
+
 SIMDE_FUNCTION_ATTRIBUTES
 simde__m512
 simde_mm512_castsi512_ps (simde__m512i a) {

x86/avx512/cmp.h

@@ -534,6 +534,235 @@ simde_mm512_cmp_pd_mask (simde__m512d a, simde__m512d b, const int imm8)
   #define _mm_cmp_pd_mask(a, b, imm8) simde_mm_cmp_pd_mask((a), (b), (imm8))
 #endif
 
+SIMDE_HUGE_FUNCTION_ATTRIBUTES
+simde__mmask32
+simde_mm512_cmp_ph_mask (simde__m512h a, simde__m512h b, const int imm8)
+    SIMDE_REQUIRE_CONSTANT_RANGE(imm8, 0, 31) {
+  simde__m512h_private
+    r_,
+    a_ = simde__m512h_to_private(a),
+    b_ = simde__m512h_to_private(b);
+
+  switch (imm8) {
+    case SIMDE_CMP_EQ_OQ:
+    case SIMDE_CMP_EQ_OS:
+      #if defined(SIMDE_VECTOR_SUBSCRIPT_OPS) && defined(SIMDE_FLOAT16_VECTOR)
+        r_.i16 = HEDLEY_REINTERPRET_CAST(__typeof__(r_.i16), (a_.f16 == b_.f16));
+      #else
+        SIMDE_VECTORIZE
+        for (size_t i = 0 ; i < (sizeof(r_.f16) / sizeof(r_.f16[0])) ; i++) {
+          r_.i16[i] = (
+              simde_float16_as_uint16(a_.f16[i]) == simde_float16_as_uint16(b_.f16[i])
+              && !simde_isnanhf(a_.f16[i]) && !simde_isnanhf(b_.f16[i])
+              ) ? ~INT16_C(0) : INT16_C(0);
+        }
+      #endif
+      break;
+
+    case SIMDE_CMP_LT_OQ:
+    case SIMDE_CMP_LT_OS:
+      #if defined(SIMDE_VECTOR_SUBSCRIPT_OPS) && defined(SIMDE_FLOAT16_VECTOR)
+        r_.i16 = HEDLEY_REINTERPRET_CAST(__typeof__(r_.i16), (a_.f16 < b_.f16));
+      #else
+        SIMDE_VECTORIZE
+        for (size_t i = 0 ; i < (sizeof(r_.f16) / sizeof(r_.f16[0])) ; i++) {
+          r_.i16[i] = (simde_float16_to_float32(a_.f16[i]) < simde_float16_to_float32(b_.f16[i])) ? ~INT16_C(0) : INT16_C(0);
+        }
+      #endif
+      break;
+
+    case SIMDE_CMP_LE_OQ:
+    case SIMDE_CMP_LE_OS:
+      #if defined(SIMDE_VECTOR_SUBSCRIPT_OPS) && defined(SIMDE_FLOAT16_VECTOR)
+        r_.i16 = HEDLEY_REINTERPRET_CAST(__typeof__(r_.i16), (a_.f16 <= b_.f16));
+      #else
+        SIMDE_VECTORIZE
+        for (size_t i = 0 ; i < (sizeof(r_.f16) / sizeof(r_.f16[0])) ; i++) {
+          r_.i16[i] = (simde_float16_to_float32(a_.f16[i]) <= simde_float16_to_float32(b_.f16[i])) ? ~INT16_C(0) : INT16_C(0);
+        }
+      #endif
+      break;
+
+    case SIMDE_CMP_UNORD_Q:
+    case SIMDE_CMP_UNORD_S:
+      #if defined(SIMDE_VECTOR_SUBSCRIPT_OPS) && defined(SIMDE_FLOAT16_VECTOR)
+        r_.i16 = HEDLEY_REINTERPRET_CAST(__typeof__(r_.i16), (a_.f16 != a_.f16) | (b_.f16 != b_.f16));
+      #else
+        SIMDE_VECTORIZE
+        for (size_t i = 0 ; i < (sizeof(r_.f16) / sizeof(r_.f16[0])) ; i++) {
+          r_.i16[i] = (
+            (simde_float16_to_float32(a_.f16[i]) != simde_float16_to_float32(a_.f16[i]))
+            || (simde_float16_to_float32(b_.f16[i]) != simde_float16_to_float32(b_.f16[i]))
+            ) ? ~INT16_C(0) : INT16_C(0);
+        }
+      #endif
+      break;
+
+    case SIMDE_CMP_NEQ_UQ:
+    case SIMDE_CMP_NEQ_US:
+      #if defined(SIMDE_VECTOR_SUBSCRIPT_OPS) && defined(SIMDE_FLOAT16_VECTOR)
+        r_.i16 = HEDLEY_REINTERPRET_CAST(__typeof__(r_.i16), (a_.f16 != b_.f16));
+      #else
+        SIMDE_VECTORIZE
+        for (size_t i = 0 ; i < (sizeof(r_.f16) / sizeof(r_.f16[0])) ; i++) {
+          r_.i16[i] = (
+            (simde_float16_as_uint16(a_.f16[i]) != simde_float16_as_uint16(b_.f16[i]))
+            || simde_isnanhf(a_.f16[i]) || simde_isnanhf(b_.f16[i])
+            ) ? ~INT16_C(0) : INT16_C(0);
+        }
+      #endif
+      break;
+
+    case SIMDE_CMP_NEQ_OQ:
+    case SIMDE_CMP_NEQ_OS:
+      #if defined(SIMDE_VECTOR_SUBSCRIPT_OPS) && defined(SIMDE_FLOAT16_VECTOR)
+        r_.i16 = HEDLEY_REINTERPRET_CAST(__typeof__(r_.i16), (a_.f16 == a_.f16) & (b_.f16 == b_.f16) & (a_.f16 != b_.f16));
+      #else
+        SIMDE_VECTORIZE
+        for (size_t i = 0 ; i < (sizeof(r_.f16) / sizeof(r_.f16[0])) ; i++) {
+          r_.i16[i] = (
+              !(simde_isnanhf(a_.f16[i]) || simde_isnanhf(b_.f16[i]))
+              && (simde_float16_as_uint16(a_.f16[i]) != simde_float16_as_uint16(b_.f16[i]))
+            ) ? ~INT16_C(0) : INT16_C(0);
+        }
+      #endif
+      break;
+
+    case SIMDE_CMP_NLT_UQ:
+    case SIMDE_CMP_NLT_US:
+      #if defined(SIMDE_VECTOR_SUBSCRIPT_OPS) && defined(SIMDE_FLOAT16_VECTOR)
+        r_.i16 = HEDLEY_REINTERPRET_CAST(__typeof__(r_.i16), ~(a_.f16 < b_.f16));
+      #else
+        SIMDE_VECTORIZE
+        for (size_t i = 0 ; i < (sizeof(r_.f16) / sizeof(r_.f16[0])) ; i++) {
+          r_.i16[i] = !(
+            simde_float16_to_float32(a_.f16[i]) < simde_float16_to_float32(b_.f16[i])
+            ) ? ~INT16_C(0) : INT16_C(0);
+        }
+      #endif
+      break;
+
+    case SIMDE_CMP_NLE_UQ:
+    case SIMDE_CMP_NLE_US:
+      #if defined(SIMDE_VECTOR_SUBSCRIPT_OPS) && defined(SIMDE_FLOAT16_VECTOR)
+        r_.i16 = HEDLEY_REINTERPRET_CAST(__typeof__(r_.i16), ~(a_.f16 <= b_.f16));
+      #else
+        SIMDE_VECTORIZE
+        for (size_t i = 0 ; i < (sizeof(r_.f16) / sizeof(r_.f16[0])) ; i++) {
+          r_.i16[i] = !(
+            simde_float16_to_float32(a_.f16[i]) <= simde_float16_to_float32(b_.f16[i])
+            ) ? ~INT16_C(0) : INT16_C(0);
+        }
+      #endif
+      break;
+
+    case SIMDE_CMP_ORD_Q:
+    case SIMDE_CMP_ORD_S:
+      #if defined(SIMDE_VECTOR_SUBSCRIPT_OPS) && defined(SIMDE_FLOAT16_VECTOR)
+        r_.i16 = HEDLEY_REINTERPRET_CAST(__typeof__(r_.i16), ((a_.f16 == a_.f16) & (b_.f16 == b_.f16)));
+      #else
+        SIMDE_VECTORIZE
+        for (size_t i = 0 ; i < (sizeof(r_.f16) / sizeof(r_.f16[0])) ; i++) {
+          r_.i16[i] = (simde_isnanhf(a_.f16[i]) || simde_isnanhf(b_.f16[i])) ? INT16_C(0) : ~INT16_C(0);
+        }
+      #endif
+      break;
+
+    case SIMDE_CMP_EQ_UQ:
+    case SIMDE_CMP_EQ_US:
+      #if defined(SIMDE_VECTOR_SUBSCRIPT_OPS) && defined(SIMDE_FLOAT16_VECTOR)
+        r_.i16 = HEDLEY_REINTERPRET_CAST(__typeof__(r_.i16), (a_.f16 != a_.f16) | (b_.f16 != b_.f16) | (a_.f16 == b_.f16));
+      #else
+        SIMDE_VECTORIZE
+        for (size_t i = 0 ; i < (sizeof(r_.f16) / sizeof(r_.f16[0])) ; i++) {
+          r_.i16[i] = (
+              (simde_isnanhf(a_.f16[i]) || simde_isnanhf(b_.f16[i]))
+              || (simde_float16_as_uint16(a_.f16[i]) == simde_float16_as_uint16(b_.f16[i]))
+            ) ? ~INT16_C(0) : INT16_C(0);
+        }
+      #endif
+      break;
+
+    case SIMDE_CMP_NGE_UQ:
+    case SIMDE_CMP_NGE_US:
+      #if defined(SIMDE_VECTOR_SUBSCRIPT_OPS) && defined(SIMDE_FLOAT16_VECTOR)
+        r_.i16 = HEDLEY_REINTERPRET_CAST(__typeof__(r_.i16), ~(a_.f16 >= b_.f16));
+      #else
+        SIMDE_VECTORIZE
+        for (size_t i = 0 ; i < (sizeof(r_.f16) / sizeof(r_.f16[0])) ; i++) {
+          r_.i16[i] = !(
+            simde_float16_to_float32(a_.f16[i]) >= simde_float16_to_float32(b_.f16[i])
+            ) ? ~INT16_C(0) : INT16_C(0);
+        }
+      #endif
+      break;
+
+    case SIMDE_CMP_NGT_UQ:
+    case SIMDE_CMP_NGT_US:
+      #if defined(SIMDE_VECTOR_SUBSCRIPT_OPS) && defined(SIMDE_FLOAT16_VECTOR)
+        r_.i16 = HEDLEY_REINTERPRET_CAST(__typeof__(r_.i16), ~(a_.f16 > b_.f16));
+      #else
+        SIMDE_VECTORIZE
+        for (size_t i = 0 ; i < (sizeof(r_.f16) / sizeof(r_.f16[0])) ; i++) {
+          r_.i16[i] = !(
+            simde_float16_to_float32(a_.f16[i]) > simde_float16_to_float32(b_.f16[i])
+            ) ? ~INT16_C(0) : INT16_C(0);
+        }
+      #endif
+      break;
+
+    case SIMDE_CMP_FALSE_OQ:
+    case SIMDE_CMP_FALSE_OS:
+      r_ = simde__m512h_to_private(simde_mm512_setzero_ph());
+      break;
+
+    case SIMDE_CMP_GE_OQ:
+    case SIMDE_CMP_GE_OS:
+      #if defined(SIMDE_VECTOR_SUBSCRIPT_OPS) && defined(SIMDE_FLOAT16_VECTOR)
+        r_.i16 = HEDLEY_REINTERPRET_CAST(__typeof__(r_.i16), (a_.f16 >= b_.f16));
+      #else
+        SIMDE_VECTORIZE
+        for (size_t i = 0 ; i < (sizeof(r_.f16) / sizeof(r_.f16[0])) ; i++) {
+          r_.i16[i] = (
+            simde_float16_to_float32(a_.f16[i]) >= simde_float16_to_float32(b_.f16[i])
+            ) ? ~INT16_C(0) : INT16_C(0);
+        }
+      #endif
+      break;
+
+    case SIMDE_CMP_GT_OQ:
+    case SIMDE_CMP_GT_OS:
+      #if defined(SIMDE_VECTOR_SUBSCRIPT_OPS) && defined(SIMDE_FLOAT16_VECTOR)
+        r_.i16 = HEDLEY_REINTERPRET_CAST(__typeof__(r_.i16), (a_.f16 > b_.f16));
+      #else
+        SIMDE_VECTORIZE
+        for (size_t i = 0 ; i < (sizeof(r_.f16) / sizeof(r_.f16[0])) ; i++) {
+          r_.i16[i] = (
+            simde_float16_to_float32(a_.f16[i]) > simde_float16_to_float32(b_.f16[i])
+            ) ? ~INT16_C(0) : INT16_C(0);
+        }
+      #endif
+      break;
+
+    case SIMDE_CMP_TRUE_UQ:
+    case SIMDE_CMP_TRUE_US:
+      r_ = simde__m512h_to_private(simde_x_mm512_setone_ph());
+      break;
+
+    default:
+      HEDLEY_UNREACHABLE();
+  }
+
+  return simde_mm512_movepi16_mask(simde_mm512_castph_si512(simde__m512h_from_private(r_)));
+}
+#if defined(SIMDE_X86_AVX512FP16_NATIVE)
+  #define simde_mm512_cmp_ph_mask(a, b, imm8) _mm512_cmp_ph_mask((a), (b), (imm8))
+#endif
+#if defined(SIMDE_X86_AVX512FP16_ENABLE_NATIVE_ALIASES)
+  #undef _mm512_cmp_ph_mask
+  #define _mm512_cmp_ph_mask(a, b, imm8) simde_mm512_cmp_ph_mask((a), (b), (imm8))
+#endif
+
 SIMDE_HUGE_FUNCTION_ATTRIBUTES
 simde__mmask32
 simde_mm512_cmp_epu16_mask (simde__m512i a, simde__m512i b, const int imm8)

x86/avx512/fpclass.h

@@ -53,6 +53,25 @@ simde_mm256_fpclass_ps_mask(simde__m256 a, int imm8)
 #  define _mm256_fpclass_ps_mask(a, imm8) simde_mm256_fpclass_ps_mask((a), (imm8))
 #endif
 
+SIMDE_FUNCTION_ATTRIBUTES
+simde__mmask32
+simde_mm512_fpclass_ph_mask(simde__m512h a, int imm8)
+  SIMDE_REQUIRE_CONSTANT_RANGE(imm8, 0, 0x88) {
+  simde__mmask32 r = 0;
+  simde__m512h_private a_ = simde__m512h_to_private(a);
+
+  for (size_t i = 0 ; i < (sizeof(a_.f16) / sizeof(a_.f16[0])) ; i++) {
+    r |= simde_fpclasshf(a_.f16[i], imm8) ? (UINT8_C(1) << i) : 0;
+  }
+  return r;
+}
+#if defined(SIMDE_X86_AVX512FP16_NATIVE)
+#  define simde_mm512_fpclass_ph_mask(a, imm8) _mm512_fpclass_ph_mask((a), (imm8))
+#endif
+#if defined(SIMDE_X86_AVX512FP16_ENABLE_NATIVE_ALIASES)
+#  undef _mm512_fpclass_ph_mask
+#  define _mm512_fpclass_ph_mask(a, imm8) simde_mm512_fpclass_ph_mask((a), (imm8))
+#endif
 
 SIMDE_FUNCTION_ATTRIBUTES
 simde__mmask8

x86/avx512/load.h

@@ -64,6 +64,23 @@ simde_mm512_load_ps (void const * mem_addr) {
   #undef _mm512_load_ps
   #define _mm512_load_ps(a) simde_mm512_load_ps(a)
 #endif
+
+SIMDE_FUNCTION_ATTRIBUTES
+simde__m512h
+simde_mm512_load_ph (void const * mem_addr) {
+  #if defined(SIMDE_X86_AVX512FP16_NATIVE)
+    return _mm512_load_ph(SIMDE_ALIGN_ASSUME_LIKE(mem_addr, simde__m512h));
+  #else
+    simde__m512h r;
+    simde_memcpy(&r, SIMDE_ALIGN_ASSUME_LIKE(mem_addr, simde__m512h), sizeof(r));
+    return r;
+  #endif
+}
+#if defined(SIMDE_X86_AVX512FP16_ENABLE_NATIVE_ALIASES)
+  #undef _mm512_load_ph
+  #define _mm512_load_ph(a) simde_mm512_load_ph(a)
+#endif
+
 SIMDE_FUNCTION_ATTRIBUTES
 simde__m512i
 simde_mm512_load_si512 (void const * mem_addr) {

x86/avx512/loadu.h

@@ -73,6 +73,22 @@ simde_mm512_loadu_pd (void const * mem_addr) {
   #define _mm512_loadu_pd(a) simde_mm512_loadu_pd(a)
 #endif
 
+SIMDE_FUNCTION_ATTRIBUTES
+simde__m512h
+simde_mm512_loadu_ph (void const * mem_addr) {
+  #if defined(SIMDE_X86_AVX512FP16_NATIVE)
+    return _mm512_loadu_ph(mem_addr);
+  #else
+    simde__m512h r;
+    simde_memcpy(&r, mem_addr, sizeof(r));
+    return r;
+  #endif
+}
+#if defined(SIMDE_X86_AVX512FP16_ENABLE_NATIVE_ALIASES)
+  #undef _mm512_loadu_ph
+  #define _mm512_loadu_ph(a) simde_mm512_loadu_ph(a)
+#endif
+
 SIMDE_FUNCTION_ATTRIBUTES
 simde__m512i
 simde_mm512_loadu_si512 (void const * mem_addr) {

x86/avx512/max.h

@@ -553,6 +553,30 @@ simde_mm512_max_pd (simde__m512d a, simde__m512d b) {
   #define _mm512_max_pd(a, b) simde_mm512_max_pd(a, b)
 #endif
 
+SIMDE_FUNCTION_ATTRIBUTES
+simde__m512h
+simde_mm512_max_ph (simde__m512h a, simde__m512h b) {
+  #if defined(SIMDE_X86_AVX512FP16_NATIVE)
+    return _mm512_max_ph(a, b);
+  #else
+    simde__m512h_private
+      r_,
+      a_ = simde__m512h_to_private(a),
+      b_ = simde__m512h_to_private(b);
+
+    SIMDE_VECTORIZE
+    for (size_t i = 0 ; i < (sizeof(r_.f16) / sizeof(r_.f16[0])) ; i++) {
+      r_.f16[i] = simde_float16_to_float32(a_.f16[i]) > simde_float16_to_float32(b_.f16[i]) ? a_.f16[i] : b_.f16[i];
+    }
+
+    return simde__m512h_from_private(r_);
+  #endif
+}
+#if defined(SIMDE_X86_AVX512FP16_ENABLE_NATIVE_ALIASES)
+  #undef _mm512_max_ph
+  #define _mm512_max_ph(a, b) simde_mm512_max_ph(a, b)
+#endif
+
 SIMDE_FUNCTION_ATTRIBUTES
 simde__m512d
 simde_mm512_mask_max_pd(simde__m512d src, simde__mmask8 k, simde__m512d a, simde__m512d b) {

x86/avx512/min.h

@@ -581,6 +581,30 @@ simde_mm512_maskz_min_pd(simde__mmask8 k, simde__m512d a, simde__m512d b) {
   #define _mm512_maskz_min_pd(k, a, b) simde_mm512_maskz_min_pd(k, a, b)
 #endif
 
+SIMDE_FUNCTION_ATTRIBUTES
+simde__m512h
+simde_mm512_min_ph (simde__m512h a, simde__m512h b) {
+  #if defined(SIMDE_X86_AVX512FP16_NATIVE)
+    return _mm512_min_ph(a, b);
+  #else
+    simde__m512h_private
+      r_,
+      a_ = simde__m512h_to_private(a),
+      b_ = simde__m512h_to_private(b);
+
+    SIMDE_VECTORIZE
+    for (size_t i = 0 ; i < (sizeof(r_.f16) / sizeof(r_.f16[0])) ; i++) {
+      r_.f16[i] = simde_float16_to_float32(a_.f16[i]) < simde_float16_to_float32(b_.f16[i]) ? a_.f16[i] : b_.f16[i];
+    }
+
+    return simde__m512h_from_private(r_);
+  #endif
+}
+#if defined(SIMDE_X86_AVX512FP16_ENABLE_NATIVE_ALIASES)
+  #undef _mm512_min_ph
+  #define _mm512_min_ph(a, b) simde_mm512_min_ph(a, b)
+#endif
+
 SIMDE_END_DECLS_
 HEDLEY_DIAGNOSTIC_POP
 

x86/avx512/mov.h

@@ -451,6 +451,12 @@ simde_mm512_mask_mov_ps (simde__m512 src, simde__mmask16 k, simde__m512 a) {
   #define _mm512_mask_mov_ps(src, k, a) simde_mm512_mask_mov_ps(src, k, a)
 #endif
 
+SIMDE_FUNCTION_ATTRIBUTES
+simde__m512h
+simde_x_mm512_mask_mov_ph (simde__m512h src, simde__mmask32 k, simde__m512h a) {
+  return simde_mm512_castsi512_ph(simde_mm512_mask_mov_epi16(simde_mm512_castph_si512(src), k, simde_mm512_castph_si512(a)));
+}
+
 SIMDE_FUNCTION_ATTRIBUTES
 simde__m128i
 simde_mm_maskz_mov_epi8 (simde__mmask16 k, simde__m128i a) {

x86/avx512/permutexvar.h

@@ -1146,6 +1146,20 @@ simde_mm512_permutexvar_ps (simde__m512i idx, simde__m512 a) {
   #define _mm512_permutexvar_ps(idx, a) simde_mm512_permutexvar_ps(idx, a)
 #endif
 
+SIMDE_FUNCTION_ATTRIBUTES
+simde__m512h
+simde_mm512_permutexvar_ph (simde__m512i idx, simde__m512h a) {
+  #if defined(SIMDE_X86_AVX512FP16_NATIVE)
+    return _mm512_permutexvar_ph(idx, a);
+  #else
+    return simde_mm512_castsi512_ph(simde_mm512_permutexvar_epi16(idx, simde_mm512_castph_si512(a)));
+  #endif
+}
+#if defined(SIMDE_X86_AVX512FP16_ENABLE_NATIVE_ALIASES)
+  #undef _mm512_permutexvar_ph
+  #define _mm512_permutexvar_ph(idx, a) simde_mm512_permutexvar_ph(idx, a)
+#endif
+
 SIMDE_FUNCTION_ATTRIBUTES
 simde__m512
 simde_mm512_mask_permutexvar_ps (simde__m512 src, simde__mmask16 k, simde__m512i idx, simde__m512 a) {

x86/avx512/reduce.h

+/* SPDX-License-Identifier: MIT
+ *
+ * Permission is hereby granted, free of charge, to any person
+ * obtaining a copy of this software and associated documentation
+ * files (the "Software"), to deal in the Software without
+ * restriction, including without limitation the rights to use, copy,
+ * modify, merge, publish, distribute, sublicense, and/or sell copies
+ * of the Software, and to permit persons to whom the Software is
+ * furnished to do so, subject to the following conditions:
+ *
+ * The above copyright notice and this permission notice shall be
+ * included in all copies or substantial portions of the Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
+ * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
+ * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
+ * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS
+ * BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN
+ * ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
+ * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
+ * SOFTWARE.
+ *
+ * Copyright:
+ *   2023      Michael R. Crusoe <crusoe@debian.org>
+ */
+
+#if !defined(SIMDE_X86_AVX512_REDUCE_H)
+#define SIMDE_X86_AVX512_REDUCE_H
+
+#include "types.h"
+
+HEDLEY_DIAGNOSTIC_PUSH
+SIMDE_DISABLE_UNWANTED_DIAGNOSTICS
+SIMDE_BEGIN_DECLS_
+
+SIMDE_FUNCTION_ATTRIBUTES
+simde_float16
+simde_mm512_reduce_max_ph(simde__m512h a) {
+  #if defined(SIMDE_X86_AVX512FP16_NATIVE)
+    return _mm512_reduce_max_ph(a);
+  #else
+    simde__m512h_private a_;
+    simde_float16 r;
+    a_ = simde__m512h_to_private(a);
+
+    r = SIMDE_NINFINITYHF;
+    #if defined(SIMDE_FLOAT16_VECTOR)
+    SIMDE_VECTORIZE_REDUCTION(max:r)
+    #endif
+    for (size_t i = 0 ; i < (sizeof(a_.f16) / sizeof(a_.f16[0])) ; i++) {
+      r = simde_float16_to_float32(a_.f16[i]) > simde_float16_to_float32(r) ? a_.f16[i] : r;
+    }
+    return r;
+  #endif
+}
+#if defined(SIMDE_X86_AVX512FP16_ENABLE_NATIVE_ALIASES)
+#  define _mm512_reduce_max_ph(a) simde_mm512_reduce_max_ph((a))
+#endif
+
+SIMDE_FUNCTION_ATTRIBUTES
+simde_float16
+simde_mm512_reduce_min_ph(simde__m512h a) {
+  #if defined(SIMDE_X86_AVX512FP16_NATIVE)
+    return _mm512_reduce_min_ph(a);
+  #else
+    simde__m512h_private a_;
+    simde_float16 r;
+    a_ = simde__m512h_to_private(a);
+
+    r = SIMDE_INFINITYHF;
+    #if defined(SIMDE_FLOAT16_VECTOR)
+    SIMDE_VECTORIZE_REDUCTION(min:r)
+    #endif
+    for (size_t i = 0 ; i < (sizeof(a_.f16) / sizeof(a_.f16[0])) ; i++) {
+      r = simde_float16_to_float32(a_.f16[i]) < simde_float16_to_float32(r) ? a_.f16[i] : r;
+    }
+    return r;
+  #endif
+}
+#if defined(SIMDE_X86_AVX512FP16_ENABLE_NATIVE_ALIASES)
+#  define _mm512_reduce_min_ph(a) simde_mm512_reduce_min_ph((a))
+#endif
+
+SIMDE_END_DECLS_
+HEDLEY_DIAGNOSTIC_POP
+
+#endif /* !defined(SIMDE_X86_AVX512_REDUCE_H) */

x86/avx512/set.h

@@ -484,6 +484,56 @@ simde_mm512_set_pd (simde_float64 e7, simde_float64 e6, simde_float64 e5, simde_
   #define _mm512_set_pd(e7, e6, e5, e4, e3, e2, e1, e0) simde_mm512_set_pd(e7, e6, e5, e4, e3, e2, e1, e0)
 #endif
 
+SIMDE_FUNCTION_ATTRIBUTES
+simde__m512h
+simde_mm512_set_ph (simde_float16 e31, simde_float16 e30, simde_float16 e29, simde_float16 e28, simde_float16 e27, simde_float16 e26, simde_float16 e25, simde_float16 e24,
+                    simde_float16 e23, simde_float16 e22, simde_float16 e21, simde_float16 e20, simde_float16 e19, simde_float16 e18, simde_float16 e17, simde_float16 e16,
+                    simde_float16 e15, simde_float16 e14, simde_float16 e13, simde_float16 e12, simde_float16 e11, simde_float16 e10, simde_float16  e9, simde_float16  e8,
+                    simde_float16  e7, simde_float16  e6, simde_float16  e5, simde_float16  e4, simde_float16  e3, simde_float16  e2, simde_float16  e1, simde_float16  e0) {
+  simde__m512h_private r_;
+
+  r_.f16[0] = e0;
+  r_.f16[1] = e1;
+  r_.f16[2] = e2;
+  r_.f16[3] = e3;
+  r_.f16[4] = e4;
+  r_.f16[5] = e5;
+  r_.f16[6] = e6;
+  r_.f16[7] = e7;
+  r_.f16[8] = e8;
+  r_.f16[9] = e9;
+  r_.f16[10] = e10;
+  r_.f16[11] = e11;
+  r_.f16[12] = e12;
+  r_.f16[13] = e13;
+  r_.f16[14] = e14;
+  r_.f16[15] = e15;
+  r_.f16[16] = e16;
+  r_.f16[17] = e17;
+  r_.f16[18] = e18;
+  r_.f16[19] = e19;
+  r_.f16[20] = e20;
+  r_.f16[21] = e21;
+  r_.f16[22] = e22;
+  r_.f16[23] = e23;
+  r_.f16[24] = e24;
+  r_.f16[25] = e25;
+  r_.f16[26] = e26;
+  r_.f16[27] = e27;
+  r_.f16[28] = e28;
+  r_.f16[29] = e29;
+  r_.f16[30] = e30;
+  r_.f16[31] = e31;
+
+  return simde__m512h_from_private(r_);
+}
+#if defined(SIMDE_X86_AVX512FP16_ENABLE_NATIVE_ALIASES)
+  #undef _mm512_set_ph
+  #define _mm512_set_ph(e31, e30, e29, e28, e27, e26, e25, e24, e23, e22, e21, e20, e19, e18, e17, e16, e15, e14, e13, e12, e11, e10, e9, e8, e7, e6, e5, e4, e3, e2, e1, e0) \
+    simde_mm512_set_ph(e31, e30, e29, e28, e27, e26, e25, e24, e23, e22, e21, e20, e19, e18, e17, e16, e15, e14, e13, e12, e11, e10, e9, e8, e7, e6, e5, e4, e3, e2, e1, e0)
+#endif
+
+
 SIMDE_END_DECLS_
 HEDLEY_DIAGNOSTIC_POP
 

x86/avx512/set1.h

@@ -325,6 +325,27 @@ simde_mm512_set1_pd (simde_float64 a) {
   #define _mm512_set1_pd(a) simde_mm512_set1_pd(a)
 #endif
 
+SIMDE_FUNCTION_ATTRIBUTES
+simde__m512h
+simde_mm512_set1_ph (simde_float16 a) {
+  #if defined(SIMDE_X86_AVX512FP16_NATIVE)
+    return _mm512_set1_ph(a);
+  #else
+    simde__m512h_private r_;
+
+    SIMDE_VECTORIZE
+    for (size_t i = 0 ; i < (sizeof(r_.f16) / sizeof(r_.f16[0])) ; i++) {
+      r_.f16[i] = a;
+    }
+
+    return simde__m512h_from_private(r_);
+  #endif
+}
+#if defined(SIMDE_X86_AVX512FP16_ENABLE_NATIVE_ALIASES)
+  #undef _mm512_set1_ph
+  #define _mm512_set1_ph(a) simde_mm512_set1_ph(a)
+#endif
+
 SIMDE_END_DECLS_
 HEDLEY_DIAGNOSTIC_POP
 

x86/avx512/setone.h

@@ -60,6 +60,12 @@ simde_x_mm512_setone_pd(void) {
   return simde_mm512_castsi512_pd(simde_x_mm512_setone_si512());
 }
 
+SIMDE_FUNCTION_ATTRIBUTES
+simde__m512h
+simde_x_mm512_setone_ph(void) {
+  return simde_mm512_castsi512_ph(simde_x_mm512_setone_si512());
+}
+
 SIMDE_END_DECLS_
 HEDLEY_DIAGNOSTIC_POP
 

x86/avx512/setzero.h

@@ -84,6 +84,21 @@ simde_mm512_setzero_pd(void) {
   #define _mm512_setzero_pd() simde_mm512_setzero_pd()
 #endif
 
+SIMDE_FUNCTION_ATTRIBUTES
+simde__m512h
+simde_mm512_setzero_ph(void) {
+  #if defined(SIMDE_X86_AVX512FP16_NATIVE)
+    return _mm512_setzero_ph();
+  #else
+    return simde_mm512_castsi512_ph(simde_mm512_setzero_si512());
+  #endif
+}
+#if defined(SIMDE_X86_AVX512FP16_ENABLE_NATIVE_ALIASES)
+  #undef _mm512_setzero_ph
+  #define _mm512_setzero_ph() simde_mm512_setzero_ph()
+#endif
+
+
 SIMDE_END_DECLS_
 HEDLEY_DIAGNOSTIC_POP
 

x86/avx512/storeu.h

@@ -95,6 +95,20 @@ simde_mm512_storeu_pd (void * mem_addr, simde__m512d a) {
   #define _mm512_storeu_pd(mem_addr, a) simde_mm512_storeu_pd(mem_addr, a)
 #endif
 
+SIMDE_FUNCTION_ATTRIBUTES
+void
+simde_mm512_storeu_ph (void * mem_addr, simde__m512h a) {
+  #if defined(SIMDE_X86_AVX512FP16_NATIVE)
+    _mm512_storeu_ph(mem_addr, a);
+  #else
+    simde_memcpy(mem_addr, &a, sizeof(a));
+  #endif
+}
+#if defined(SIMDE_X86_AVX512FP16_ENABLE_NATIVE_ALIASES)
+  #undef _mm512_storeu_ph
+  #define _mm512_storeu_ph(mem_addr, a) simde_mm512_storeu_ph(mem_addr, a)
+#endif
+
 SIMDE_FUNCTION_ATTRIBUTES
 void
 simde_mm512_storeu_si512 (void * mem_addr, simde__m512i a) {

x86/avx512/types.h

@@ -26,8 +26,8 @@
 
 #if !defined(SIMDE_X86_AVX512_TYPES_H)
 #define SIMDE_X86_AVX512_TYPES_H
-
 #include "../avx.h"
+#include "../../simde-f16.h"
 
 HEDLEY_DIAGNOSTIC_PUSH
 SIMDE_DISABLE_UNWANTED_DIAGNOSTICS
@@ -376,6 +376,73 @@ typedef union {
   #endif
 } simde__m512d_private;
 
+typedef union {
+  #if defined(SIMDE_VECTOR_SUBSCRIPT)
+    SIMDE_AVX512_ALIGN int8_t          i8 SIMDE_VECTOR(64) SIMDE_MAY_ALIAS;
+    SIMDE_AVX512_ALIGN int16_t        i16 SIMDE_VECTOR(64) SIMDE_MAY_ALIAS;
+    SIMDE_AVX512_ALIGN int32_t        i32 SIMDE_VECTOR(64) SIMDE_MAY_ALIAS;
+    SIMDE_AVX512_ALIGN int64_t        i64 SIMDE_VECTOR(64) SIMDE_MAY_ALIAS;
+    SIMDE_AVX512_ALIGN uint8_t         u8 SIMDE_VECTOR(64) SIMDE_MAY_ALIAS;
+    SIMDE_AVX512_ALIGN uint16_t       u16 SIMDE_VECTOR(64) SIMDE_MAY_ALIAS;
+    SIMDE_AVX512_ALIGN uint32_t       u32 SIMDE_VECTOR(64) SIMDE_MAY_ALIAS;
+    SIMDE_AVX512_ALIGN uint64_t       u64 SIMDE_VECTOR(64) SIMDE_MAY_ALIAS;
+    #if defined(SIMDE_HAVE_INT128_)
+    SIMDE_AVX512_ALIGN simde_int128  i128 SIMDE_VECTOR(64) SIMDE_MAY_ALIAS;
+    SIMDE_AVX512_ALIGN simde_uint128 u128 SIMDE_VECTOR(64) SIMDE_MAY_ALIAS;
+    #endif
+    #if defined(SIMDE_FLOAT16_VECTOR)
+      SIMDE_ALIGN_TO_16  simde_float16  f16 SIMDE_VECTOR(64) SIMDE_MAY_ALIAS;
+    #else
+      SIMDE_AVX512_ALIGN simde_float16  f16[32];
+    #endif
+    SIMDE_AVX512_ALIGN simde_float32  f32 SIMDE_VECTOR(64) SIMDE_MAY_ALIAS;
+    SIMDE_AVX512_ALIGN simde_float64  f64 SIMDE_VECTOR(64) SIMDE_MAY_ALIAS;
+    SIMDE_AVX512_ALIGN int_fast32_t  i32f SIMDE_VECTOR(64) SIMDE_MAY_ALIAS;
+    SIMDE_AVX512_ALIGN uint_fast32_t u32f SIMDE_VECTOR(64) SIMDE_MAY_ALIAS;
+  #else
+    SIMDE_AVX512_ALIGN int8_t          i8[64];
+    SIMDE_AVX512_ALIGN int16_t        i16[32];
+    SIMDE_AVX512_ALIGN int32_t        i32[16];
+    SIMDE_AVX512_ALIGN int64_t        i64[8];
+    SIMDE_AVX512_ALIGN uint8_t         u8[64];
+    SIMDE_AVX512_ALIGN uint16_t       u16[32];
+    SIMDE_AVX512_ALIGN uint32_t       u32[16];
+    SIMDE_AVX512_ALIGN uint64_t       u64[8];
+    #if defined(SIMDE_HAVE_INT128_)
+    SIMDE_AVX512_ALIGN simde_int128  i128[4];
+    SIMDE_AVX512_ALIGN simde_uint128 u128[4];
+    #endif
+    SIMDE_AVX512_ALIGN simde_float16  f16[32];
+    SIMDE_AVX512_ALIGN simde_float32  f32[16];
+    SIMDE_AVX512_ALIGN simde_float64  f64[8];
+    SIMDE_AVX512_ALIGN int_fast32_t  i32f[64 / sizeof(int_fast32_t)];
+    SIMDE_AVX512_ALIGN uint_fast32_t u32f[64 / sizeof(uint_fast32_t)];
+  #endif
+
+    SIMDE_AVX512_ALIGN simde__m128d_private m128d_private[4];
+    SIMDE_AVX512_ALIGN simde__m128d         m128d[4];
+    SIMDE_AVX512_ALIGN simde__m256d_private m256d_private[2];
+    SIMDE_AVX512_ALIGN simde__m256d         m256d[2];
+
+  #if defined(SIMDE_X86_AVX512FP16_NATIVE)
+    SIMDE_AVX512_ALIGN __m512h        n;
+  #elif defined(SIMDE_POWER_ALTIVEC_P6_NATIVE)
+    SIMDE_ALIGN_TO_16 SIMDE_POWER_ALTIVEC_VECTOR(unsigned char)      altivec_u8[4];
+    SIMDE_ALIGN_TO_16 SIMDE_POWER_ALTIVEC_VECTOR(unsigned short)     altivec_u16[4];
+    SIMDE_ALIGN_TO_16 SIMDE_POWER_ALTIVEC_VECTOR(unsigned int)       altivec_u32[4];
+    SIMDE_ALIGN_TO_16 SIMDE_POWER_ALTIVEC_VECTOR(signed char)        altivec_i8[4];
+    SIMDE_ALIGN_TO_16 SIMDE_POWER_ALTIVEC_VECTOR(signed short)       altivec_i16[4];
+    SIMDE_ALIGN_TO_16 SIMDE_POWER_ALTIVEC_VECTOR(signed int)         altivec_i32[4];
+    SIMDE_ALIGN_TO_16 SIMDE_POWER_ALTIVEC_VECTOR(float)              altivec_f32[4];
+    #if defined(SIMDE_POWER_ALTIVEC_P7_NATIVE)
+      SIMDE_ALIGN_TO_16 SIMDE_POWER_ALTIVEC_VECTOR(unsigned long long) altivec_u64[4];
+      SIMDE_ALIGN_TO_16 SIMDE_POWER_ALTIVEC_VECTOR(signed long long)   altivec_i64[4];
+      SIMDE_ALIGN_TO_16 SIMDE_POWER_ALTIVEC_VECTOR(double)             altivec_f64[4];
+    #endif
+  #endif
+} simde__m512h_private;
+
+
 typedef union {
   #if defined(SIMDE_VECTOR_SUBSCRIPT)
     SIMDE_AVX512_ALIGN int8_t          i8 SIMDE_VECTOR(64) SIMDE_MAY_ALIAS;
@@ -476,7 +543,7 @@ typedef union {
     typedef simde__m512_private  simde__m512;
     typedef simde__m512i_private simde__m512i;
     typedef simde__m512d_private simde__m512d;
-  #endif
+ #endif
 
   typedef uint8_t simde__mmask8;
   typedef uint16_t simde__mmask16;
@@ -498,6 +565,16 @@ typedef union {
   #endif
 #endif
 
+#if defined(SIMDE_X86_AVX512FP16_NATIVE)
+  typedef __m512h simde__m512h;
+#else
+  #if defined(SIMDE_VECTOR_SUBSCRIPT) && defined(SIMDE_FLOAT16_VECTOR)
+      typedef simde_float16 simde__m512h SIMDE_AVX512_ALIGN SIMDE_VECTOR(64) SIMDE_MAY_ALIAS;
+  #else
+    typedef simde__m512h_private simde__m512h;
+  #endif
+#endif
+
 /* These are really part of AVX-512VL / AVX-512BW (in GCC __mmask32 is
  * in avx512vlintrin.h and __mmask64 is in avx512bwintrin.h, in clang
  * both are in avx512bwintrin.h), not AVX-512F.  However, we don't have
@@ -555,6 +632,18 @@ typedef uint64_t simde__mmask64;
   #endif
 #endif
 
+#if !defined(SIMDE_X86_AVX512FP16_NATIVE) && defined(SIMDE_ENABLE_NATIVE_ALIASES)
+  #if !defined(HEDLEY_INTEL_VERSION)
+    //typedef simde__m128h __m128h;
+    //typedef simde__m256h __m256h;
+    typedef simde__m512h __m512h;
+  #else
+    //#define __m128h simde__m128h
+    //#define __m256h simde__m256h
+    #define __m512h simde__m512h
+  #endif
+#endif
+
 HEDLEY_STATIC_ASSERT(16 == sizeof(simde__m128bh), "simde__m128bh size incorrect");
 HEDLEY_STATIC_ASSERT(16 == sizeof(simde__m128bh_private), "simde__m128bh_private size incorrect");
 HEDLEY_STATIC_ASSERT(32 == sizeof(simde__m256bh), "simde__m256bh size incorrect");
@@ -567,6 +656,8 @@ HEDLEY_STATIC_ASSERT(64 == sizeof(simde__m512i), "simde__m512i size incorrect");
 HEDLEY_STATIC_ASSERT(64 == sizeof(simde__m512i_private), "simde__m512i_private size incorrect");
 HEDLEY_STATIC_ASSERT(64 == sizeof(simde__m512d), "simde__m512d size incorrect");
 HEDLEY_STATIC_ASSERT(64 == sizeof(simde__m512d_private), "simde__m512d_private size incorrect");
+HEDLEY_STATIC_ASSERT(64 == sizeof(simde__m512h), "simde__m512h size incorrect");
+HEDLEY_STATIC_ASSERT(64 == sizeof(simde__m512h_private), "simde__m512h_private size incorrect");
 #if defined(SIMDE_CHECK_ALIGNMENT) && defined(SIMDE_ALIGN_OF)
 HEDLEY_STATIC_ASSERT(SIMDE_ALIGN_OF(simde__m128bh) == 16, "simde__m128bh is not 16-byte aligned");
 HEDLEY_STATIC_ASSERT(SIMDE_ALIGN_OF(simde__m128bh_private) == 16, "simde__m128bh_private is not 16-byte aligned");
@@ -580,6 +671,8 @@ HEDLEY_STATIC_ASSERT(SIMDE_ALIGN_OF(simde__m512i) == 32, "simde__m512i is not 32
 HEDLEY_STATIC_ASSERT(SIMDE_ALIGN_OF(simde__m512i_private) == 32, "simde__m512i_private is not 32-byte aligned");
 HEDLEY_STATIC_ASSERT(SIMDE_ALIGN_OF(simde__m512d) == 32, "simde__m512d is not 32-byte aligned");
 HEDLEY_STATIC_ASSERT(SIMDE_ALIGN_OF(simde__m512d_private) == 32, "simde__m512d_private is not 32-byte aligned");
+HEDLEY_STATIC_ASSERT(SIMDE_ALIGN_OF(simde__m512h) == 32, "simde__m512h is not 32-byte aligned");
+HEDLEY_STATIC_ASSERT(SIMDE_ALIGN_OF(simde__m512h_private) == 32, "simde__m512h_private is not 32-byte aligned");
 #endif
 
 #define SIMDE_MM_CMPINT_EQ     0
@@ -697,6 +790,22 @@ simde__m512d_to_private(simde__m512d v) {
   return r;
 }
 
+SIMDE_FUNCTION_ATTRIBUTES
+simde__m512h
+simde__m512h_from_private(simde__m512h_private v) {
+  simde__m512h r;
+  simde_memcpy(&r, &v, sizeof(r));
+  return r;
+}
+
+SIMDE_FUNCTION_ATTRIBUTES
+simde__m512h_private
+simde__m512h_to_private(simde__m512h v) {
+  simde__m512h_private r;
+  simde_memcpy(&r, &v, sizeof(r));
+  return r;
+}
+
 SIMDE_END_DECLS_
 HEDLEY_DIAGNOSTIC_POP