Initial Support for the RISC-V Vector Extension in ARM NEON (#1130)

* feat : add ci test for RISC-V Vector
* feat : modify types.h for risc-v vector extension
* feat : modify simde utilities for rvv
* feat : modify load & store for risc-v v extension
* feat : modify load & store for risc-v vector
* feat : add and mul neon to rvv
* feat : add rvv CI without zvfh
* feat : add rvv implementation (mul_lane)
* feat : add mulx_lane neon2rvv

arm/neon/ld1_x2.h

@@ -25,6 +25,7 @@
  *   2021      Zhi An Ng <zhin@google.com> (Copyright owned by Google, LLC)
  *   2021      Décio Luiz Gazzoni Filho <decio@decpp.net>
  *   2023      Yi-Yen Chung <eric681@andestech.com> (Copyright owned by Andes Technology)
+ *   2023      Chi-Wei Chu <wewe5215@gapp.nthu.edu.tw> (Copyright owned by NTHU pllab)
  */
 
 #if !defined(SIMDE_ARM_NEON_LD1_X2_H)
@@ -51,9 +52,14 @@ simde_vld1_f16_x2(simde_float16_t const ptr[HEDLEY_ARRAY_PARAM(8)]) {
     return vld1_f16_x2(ptr);
   #else
     simde_float16x4_private a_[2];
-    for (size_t i = 0; i < 8; i++) {
-      a_[i / 4].values[i % 4] = ptr[i];
-    }
+    #if defined(SIMDE_RISCV_V_NATIVE) && SIMDE_ARCH_RISCV_ZVFH
+      a_[0].sv64 = __riscv_vle16_v_f16m1((_Float16 *)ptr , 4);
+      a_[1].sv64 = __riscv_vle16_v_f16m1((_Float16 *)(ptr+4) , 4);
+    #else
+      for (size_t i = 0; i < 8; i++) {
+        a_[i / 4].values[i % 4] = ptr[i];
+      }
+    #endif
     simde_float16x4x2_t s_ = { { simde_float16x4_from_private(a_[0]),
                                  simde_float16x4_from_private(a_[1]) } };
     return s_;
@@ -74,9 +80,14 @@ simde_vld1_f32_x2(simde_float32 const ptr[HEDLEY_ARRAY_PARAM(4)]) {
     return vld1_f32_x2(ptr);
   #else
     simde_float32x2_private a_[2];
-    for (size_t i = 0; i < 4; i++) {
-      a_[i / 2].values[i % 2] = ptr[i];
-    }
+    #if defined(SIMDE_RISCV_V_NATIVE)
+      a_[0].sv64 = __riscv_vle32_v_f32m1(ptr , 2);
+      a_[1].sv64 = __riscv_vle32_v_f32m1(ptr+2 , 2);
+    #else
+      for (size_t i = 0; i < 4; i++) {
+        a_[i / 2].values[i % 2] = ptr[i];
+      }
+    #endif
     simde_float32x2x2_t s_ = { { simde_float32x2_from_private(a_[0]),
                                  simde_float32x2_from_private(a_[1]) } };
     return s_;
@@ -97,9 +108,14 @@ simde_vld1_f64_x2(simde_float64 const ptr[HEDLEY_ARRAY_PARAM(2)]) {
     return vld1_f64_x2(ptr);
   #else
     simde_float64x1_private a_[2];
-    for (size_t i = 0; i < 2; i++) {
-      a_[i].values[0] = ptr[i];
-    }
+    #if defined(SIMDE_RISCV_V_NATIVE)
+      a_[0].sv64 = __riscv_vle64_v_f64m1(ptr , 1);
+      a_[1].sv64 = __riscv_vle64_v_f64m1(ptr+1 , 1);
+    #else
+      for (size_t i = 0; i < 2; i++) {
+        a_[i].values[0] = ptr[i];
+      }
+    #endif
     simde_float64x1x2_t s_ = { { simde_float64x1_from_private(a_[0]),
                                  simde_float64x1_from_private(a_[1]) } };
     return s_;
@@ -120,9 +136,14 @@ simde_vld1_s8_x2(int8_t const ptr[HEDLEY_ARRAY_PARAM(16)]) {
     return vld1_s8_x2(ptr);
   #else
     simde_int8x8_private a_[2];
-    for (size_t i = 0; i < 16; i++) {
-      a_[i / 8].values[i % 8] = ptr[i];
-    }
+    #if defined(SIMDE_RISCV_V_NATIVE)
+      a_[0].sv64 = __riscv_vle8_v_i8m1(ptr , 8);
+      a_[1].sv64 = __riscv_vle8_v_i8m1(ptr+8 , 8);
+    #else
+      for (size_t i = 0; i < 16; i++) {
+        a_[i / 8].values[i % 8] = ptr[i];
+      }
+    #endif
     simde_int8x8x2_t s_ = { { simde_int8x8_from_private(a_[0]),
                               simde_int8x8_from_private(a_[1]) } };
     return s_;
@@ -143,9 +164,14 @@ simde_vld1_s16_x2(int16_t const ptr[HEDLEY_ARRAY_PARAM(8)]) {
     return vld1_s16_x2(ptr);
   #else
     simde_int16x4_private a_[2];
-    for (size_t i = 0; i < 8; i++) {
-      a_[i / 4].values[i % 4] = ptr[i];
-    }
+    #if defined(SIMDE_RISCV_V_NATIVE)
+      a_[0].sv64 = __riscv_vle16_v_i16m1(ptr , 4);
+      a_[1].sv64 = __riscv_vle16_v_i16m1(ptr+4 , 4);
+    #else
+      for (size_t i = 0; i < 8; i++) {
+        a_[i / 4].values[i % 4] = ptr[i];
+      }
+    #endif
     simde_int16x4x2_t s_ = { { simde_int16x4_from_private(a_[0]),
                                simde_int16x4_from_private(a_[1]) } };
     return s_;
@@ -166,9 +192,14 @@ simde_vld1_s32_x2(int32_t const ptr[HEDLEY_ARRAY_PARAM(4)]) {
     return vld1_s32_x2(ptr);
   #else
     simde_int32x2_private a_[2];
-    for (size_t i = 0; i < 4; i++) {
-      a_[i / 2].values[i % 2] = ptr[i];
-    }
+    #if defined(SIMDE_RISCV_V_NATIVE)
+      a_[0].sv64 = __riscv_vle32_v_i32m1(ptr , 2);
+      a_[1].sv64 = __riscv_vle32_v_i32m1(ptr+2 , 2);
+    #else
+      for (size_t i = 0; i < 4; i++) {
+        a_[i / 2].values[i % 2] = ptr[i];
+      }
+    #endif
     simde_int32x2x2_t s_ = { { simde_int32x2_from_private(a_[0]),
                                simde_int32x2_from_private(a_[1]) } };
     return s_;
@@ -189,9 +220,14 @@ simde_vld1_s64_x2(int64_t const ptr[HEDLEY_ARRAY_PARAM(2)]) {
     return vld1_s64_x2(ptr);
   #else
     simde_int64x1_private a_[2];
-    for (size_t i = 0; i < 2; i++) {
-      a_[i].values[0] = ptr[i];
-    }
+    #if defined(SIMDE_RISCV_V_NATIVE)
+      a_[0].sv64 = __riscv_vle64_v_i64m1(ptr , 1);
+      a_[1].sv64 = __riscv_vle64_v_i64m1(ptr+1 , 1);
+    #else
+      for (size_t i = 0; i < 2; i++) {
+        a_[i].values[0] = ptr[i];
+      }
+    #endif
     simde_int64x1x2_t s_ = { { simde_int64x1_from_private(a_[0]),
                                simde_int64x1_from_private(a_[1]) } };
     return s_;
@@ -212,9 +248,14 @@ simde_vld1_u8_x2(uint8_t const ptr[HEDLEY_ARRAY_PARAM(16)]) {
     return vld1_u8_x2(ptr);
   #else
     simde_uint8x8_private a_[2];
-    for (size_t i = 0; i < 16; i++) {
-      a_[i / 8].values[i % 8] = ptr[i];
-    }
+    #if defined(SIMDE_RISCV_V_NATIVE)
+      a_[0].sv64 = __riscv_vle8_v_u8m1(ptr , 8);
+      a_[1].sv64 = __riscv_vle8_v_u8m1(ptr+8 , 8);
+    #else
+      for (size_t i = 0; i < 16; i++) {
+        a_[i / 8].values[i % 8] = ptr[i];
+      }
+    #endif
     simde_uint8x8x2_t s_ = { { simde_uint8x8_from_private(a_[0]),
                                simde_uint8x8_from_private(a_[1]) } };
     return s_;
@@ -235,9 +276,14 @@ simde_vld1_u16_x2(uint16_t const ptr[HEDLEY_ARRAY_PARAM(8)]) {
     return vld1_u16_x2(ptr);
   #else
     simde_uint16x4_private a_[2];
-    for (size_t i = 0; i < 8; i++) {
-      a_[i / 4].values[i % 4] = ptr[i];
-    }
+    #if defined(SIMDE_RISCV_V_NATIVE)
+      a_[0].sv64 = __riscv_vle16_v_u16m1(ptr , 4);
+      a_[1].sv64 = __riscv_vle16_v_u16m1(ptr+4 , 4);
+    #else
+      for (size_t i = 0; i < 8; i++) {
+        a_[i / 4].values[i % 4] = ptr[i];
+      }
+    #endif
     simde_uint16x4x2_t s_ = { { simde_uint16x4_from_private(a_[0]),
                                 simde_uint16x4_from_private(a_[1]) } };
     return s_;
@@ -258,9 +304,14 @@ simde_vld1_u32_x2(uint32_t const ptr[HEDLEY_ARRAY_PARAM(4)]) {
     return vld1_u32_x2(ptr);
   #else
     simde_uint32x2_private a_[2];
-    for (size_t i = 0; i < 4; i++) {
-      a_[i / 2].values[i % 2] = ptr[i];
-    }
+    #if defined(SIMDE_RISCV_V_NATIVE)
+      a_[0].sv64 = __riscv_vle32_v_u32m1(ptr , 2);
+      a_[1].sv64 = __riscv_vle32_v_u32m1(ptr+2 , 2);
+    #else
+      for (size_t i = 0; i < 4; i++) {
+        a_[i / 2].values[i % 2] = ptr[i];
+      }
+    #endif
     simde_uint32x2x2_t s_ = { { simde_uint32x2_from_private(a_[0]),
                                 simde_uint32x2_from_private(a_[1]) } };
     return s_;
@@ -281,9 +332,14 @@ simde_vld1_u64_x2(uint64_t const ptr[HEDLEY_ARRAY_PARAM(2)]) {
     return vld1_u64_x2(ptr);
   #else
     simde_uint64x1_private a_[2];
-    for (size_t i = 0; i < 2; i++) {
-      a_[i].values[0] = ptr[i];
-    }
+    #if defined(SIMDE_RISCV_V_NATIVE)
+      a_[0].sv64 = __riscv_vle64_v_u64m1(ptr , 1);
+      a_[1].sv64 = __riscv_vle64_v_u64m1(ptr+1 , 1);
+    #else
+      for (size_t i = 0; i < 2; i++) {
+        a_[i].values[0] = ptr[i];
+      }
+    #endif
     simde_uint64x1x2_t s_ = { { simde_uint64x1_from_private(a_[0]),
                                 simde_uint64x1_from_private(a_[1]) } };
     return s_;
@@ -301,9 +357,14 @@ simde_vld1_p8_x2(simde_poly8_t const ptr[HEDLEY_ARRAY_PARAM(16)]) {
     return vld1_p8_x2(ptr);
   #else
     simde_poly8x8_private a_[2];
-    for (size_t i = 0; i < 16; i++) {
-      a_[i / 8].values[i % 8] = ptr[i];
-    }
+    #if defined(SIMDE_RISCV_V_NATIVE)
+      a_[0].sv64 = __riscv_vle8_v_u8m1(ptr , 8);
+      a_[1].sv64 = __riscv_vle8_v_u8m1(ptr+8 , 8);
+    #else
+      for (size_t i = 0; i < 16; i++) {
+        a_[i / 8].values[i % 8] = ptr[i];
+      }
+    #endif
     simde_poly8x8x2_t s_ = { { simde_poly8x8_from_private(a_[0]),
                                simde_poly8x8_from_private(a_[1]) } };
     return s_;
@@ -321,9 +382,14 @@ simde_vld1_p16_x2(simde_poly16_t const ptr[HEDLEY_ARRAY_PARAM(8)]) {
     return vld1_p16_x2(ptr);
   #else
     simde_poly16x4_private a_[2];
-    for (size_t i = 0; i < 8; i++) {
-      a_[i / 4].values[i % 4] = ptr[i];
-    }
+    #if defined(SIMDE_RISCV_V_NATIVE)
+      a_[0].sv64 = __riscv_vle16_v_u16m1(ptr , 4);
+      a_[1].sv64 = __riscv_vle16_v_u16m1(ptr+4 , 4);
+    #else
+      for (size_t i = 0; i < 8; i++) {
+        a_[i / 4].values[i % 4] = ptr[i];
+      }
+    #endif
     simde_poly16x4x2_t s_ = { { simde_poly16x4_from_private(a_[0]),
                                 simde_poly16x4_from_private(a_[1]) } };
     return s_;
@@ -344,9 +410,14 @@ simde_vld1_p64_x2(simde_poly64_t const ptr[HEDLEY_ARRAY_PARAM(2)]) {
     return vld1_p64_x2(ptr);
   #else
     simde_poly64x1_private a_[2];
-    for (size_t i = 0; i < 2; i++) {
-      a_[i].values[0] = ptr[i];
-    }
+    #if defined(SIMDE_RISCV_V_NATIVE)
+      a_[0].sv64 = __riscv_vle64_v_u64m1(ptr , 1);
+      a_[1].sv64 = __riscv_vle64_v_u64m1(ptr+1 , 1);
+    #else
+      for (size_t i = 0; i < 2; i++) {
+        a_[i].values[0] = ptr[i];
+      }
+    #endif
     simde_poly64x1x2_t s_ = { { simde_poly64x1_from_private(a_[0]),
                                 simde_poly64x1_from_private(a_[1]) } };
     return s_;

arm/neon/ld1q_x2.h

@@ -25,6 +25,7 @@
  *   2021      Zhi An Ng <zhin@google.com> (Copyright owned by Google, LLC)
  *   2021      Décio Luiz Gazzoni Filho <decio@decpp.net>
  *   2023      Yi-Yen Chung <eric681@andestech.com> (Copyright owned by Andes Technology)
+ *   2023      Chi-Wei Chu <wewe5215@gapp.nthu.edu.tw> (Copyright owned by NTHU pllab)
  */
 
 #if !defined(SIMDE_ARM_NEON_LD1Q_X2_H)
@@ -52,9 +53,14 @@ simde_vld1q_f16_x2(simde_float16_t const ptr[HEDLEY_ARRAY_PARAM(16)]) {
     return vld1q_f16_x2(ptr);
   #else
     simde_float16x8_private a_[2];
-    for (size_t i = 0; i < 16; i++) {
-      a_[i / 8].values[i % 8] = ptr[i];
-    }
+    #if defined(SIMDE_RISCV_V_NATIVE) && SIMDE_ARCH_RISCV_ZVFH
+      a_[0].sv128 = __riscv_vle16_v_f16m1((_Float16 *)ptr , 8);
+      a_[1].sv128 = __riscv_vle16_v_f16m1((_Float16 *)(ptr+8) , 8);
+    #else
+      for (size_t i = 0; i < 16; i++) {
+        a_[i / 8].values[i % 8] = ptr[i];
+      }
+    #endif
     simde_float16x8x2_t s_ = { { simde_float16x8_from_private(a_[0]),
                                  simde_float16x8_from_private(a_[1]) } };
     return s_;
@@ -75,9 +81,14 @@ simde_vld1q_f32_x2(simde_float32 const ptr[HEDLEY_ARRAY_PARAM(8)]) {
     return vld1q_f32_x2(ptr);
   #else
     simde_float32x4_private a_[2];
-    for (size_t i = 0; i < 8; i++) {
-      a_[i / 4].values[i % 4] = ptr[i];
-    }
+    #if defined(SIMDE_RISCV_V_NATIVE)
+      a_[0].sv128 = __riscv_vle32_v_f32m1(ptr , 4);
+      a_[1].sv128 = __riscv_vle32_v_f32m1(ptr+4 , 4);
+    #else
+      for (size_t i = 0; i < 8; i++) {
+        a_[i / 4].values[i % 4] = ptr[i];
+      }
+    #endif
     simde_float32x4x2_t s_ = { { simde_float32x4_from_private(a_[0]),
                                  simde_float32x4_from_private(a_[1]) } };
     return s_;
@@ -98,9 +109,14 @@ simde_vld1q_f64_x2(simde_float64 const ptr[HEDLEY_ARRAY_PARAM(4)]) {
     return vld1q_f64_x2(ptr);
   #else
     simde_float64x2_private a_[2];
-    for (size_t i = 0; i < 4; i++) {
-      a_[i / 2].values[i % 2] = ptr[i];
-    }
+    #if defined(SIMDE_RISCV_V_NATIVE)
+      a_[0].sv128 = __riscv_vle64_v_f64m1(ptr , 2);
+      a_[1].sv128 = __riscv_vle64_v_f64m1(ptr+2 , 2);
+    #else
+      for (size_t i = 0; i < 4; i++) {
+        a_[i / 2].values[i % 2] = ptr[i];
+      }
+    #endif
     simde_float64x2x2_t s_ = { { simde_float64x2_from_private(a_[0]),
                                  simde_float64x2_from_private(a_[1]) } };
     return s_;
@@ -121,9 +137,14 @@ simde_vld1q_s8_x2(int8_t const ptr[HEDLEY_ARRAY_PARAM(32)]) {
     return vld1q_s8_x2(ptr);
   #else
     simde_int8x16_private a_[2];
-    for (size_t i = 0; i < 32; i++) {
-      a_[i / 16].values[i % 16] = ptr[i];
-    }
+    #if defined(SIMDE_RISCV_V_NATIVE)
+      a_[0].sv128 = __riscv_vle8_v_i8m1(ptr , 16);
+      a_[1].sv128 = __riscv_vle8_v_i8m1(ptr+16 , 16);
+    #else
+      for (size_t i = 0; i < 32; i++) {
+        a_[i / 16].values[i % 16] = ptr[i];
+      }
+    #endif
     simde_int8x16x2_t s_ = { { simde_int8x16_from_private(a_[0]),
                                simde_int8x16_from_private(a_[1]) } };
     return s_;
@@ -144,9 +165,14 @@ simde_vld1q_s16_x2(int16_t const ptr[HEDLEY_ARRAY_PARAM(16)]) {
     return vld1q_s16_x2(ptr);
   #else
     simde_int16x8_private a_[2];
-    for (size_t i = 0; i < 16; i++) {
-      a_[i / 8].values[i % 8] = ptr[i];
-    }
+    #if defined(SIMDE_RISCV_V_NATIVE)
+      a_[0].sv128 = __riscv_vle16_v_i16m1(ptr , 8);
+      a_[1].sv128 = __riscv_vle16_v_i16m1(ptr+8 , 8);
+    #else
+      for (size_t i = 0; i < 16; i++) {
+        a_[i / 8].values[i % 8] = ptr[i];
+      }
+    #endif
     simde_int16x8x2_t s_ = { { simde_int16x8_from_private(a_[0]),
                                simde_int16x8_from_private(a_[1]) } };
     return s_;
@@ -167,9 +193,14 @@ simde_vld1q_s32_x2(int32_t const ptr[HEDLEY_ARRAY_PARAM(8)]) {
     return vld1q_s32_x2(ptr);
   #else
     simde_int32x4_private a_[2];
-    for (size_t i = 0; i < 8; i++) {
-      a_[i / 4].values[i % 4] = ptr[i];
-    }
+    #if defined(SIMDE_RISCV_V_NATIVE)
+      a_[0].sv128 = __riscv_vle32_v_i32m1(ptr , 4);
+      a_[1].sv128 = __riscv_vle32_v_i32m1(ptr+4 , 4);
+    #else
+      for (size_t i = 0; i < 8; i++) {
+        a_[i / 4].values[i % 4] = ptr[i];
+      }
+    #endif
     simde_int32x4x2_t s_ = { { simde_int32x4_from_private(a_[0]),
                                simde_int32x4_from_private(a_[1]) } };
     return s_;
@@ -190,9 +221,14 @@ simde_vld1q_s64_x2(int64_t const ptr[HEDLEY_ARRAY_PARAM(4)]) {
     return vld1q_s64_x2(ptr);
   #else
     simde_int64x2_private a_[2];
-    for (size_t i = 0; i < 4; i++) {
-      a_[i / 2].values[i % 2] = ptr[i];
-    }
+    #if defined(SIMDE_RISCV_V_NATIVE)
+      a_[0].sv128 = __riscv_vle64_v_i64m1(ptr , 2);
+      a_[1].sv128 = __riscv_vle64_v_i64m1(ptr+2 , 2);
+    #else
+      for (size_t i = 0; i < 4; i++) {
+        a_[i / 2].values[i % 2] = ptr[i];
+      }
+    #endif
     simde_int64x2x2_t s_ = { { simde_int64x2_from_private(a_[0]),
                                simde_int64x2_from_private(a_[1]) } };
     return s_;
@@ -213,9 +249,14 @@ simde_vld1q_u8_x2(uint8_t const ptr[HEDLEY_ARRAY_PARAM(32)]) {
     return vld1q_u8_x2(ptr);
   #else
     simde_uint8x16_private a_[2];
-    for (size_t i = 0; i < 32; i++) {
-      a_[i / 16].values[i % 16] = ptr[i];
-    }
+    #if defined(SIMDE_RISCV_V_NATIVE)
+      a_[0].sv128 = __riscv_vle8_v_u8m1(ptr , 16);
+      a_[1].sv128 = __riscv_vle8_v_u8m1(ptr+16 , 16);
+    #else
+      for (size_t i = 0; i < 32; i++) {
+        a_[i / 16].values[i % 16] = ptr[i];
+      }
+    #endif
     simde_uint8x16x2_t s_ = { { simde_uint8x16_from_private(a_[0]),
                                 simde_uint8x16_from_private(a_[1]) } };
     return s_;
@@ -236,9 +277,14 @@ simde_vld1q_u16_x2(uint16_t const ptr[HEDLEY_ARRAY_PARAM(16)]) {
     return vld1q_u16_x2(ptr);
   #else
     simde_uint16x8_private a_[2];
-    for (size_t i = 0; i < 16; i++) {
-      a_[i / 8].values[i % 8] = ptr[i];
-    }
+    #if defined(SIMDE_RISCV_V_NATIVE)
+      a_[0].sv128 = __riscv_vle16_v_u16m1(ptr , 8);
+      a_[1].sv128 = __riscv_vle16_v_u16m1(ptr+8 , 8);
+    #else
+      for (size_t i = 0; i < 16; i++) {
+        a_[i / 8].values[i % 8] = ptr[i];
+      }
+    #endif
     simde_uint16x8x2_t s_ = { { simde_uint16x8_from_private(a_[0]),
                                 simde_uint16x8_from_private(a_[1]) } };
     return s_;
@@ -259,9 +305,14 @@ simde_vld1q_u32_x2(uint32_t const ptr[HEDLEY_ARRAY_PARAM(8)]) {
     return vld1q_u32_x2(ptr);
   #else
     simde_uint32x4_private a_[2];
-    for (size_t i = 0; i < 8; i++) {
-      a_[i / 4].values[i % 4] = ptr[i];
-    }
+    #if defined(SIMDE_RISCV_V_NATIVE)
+      a_[0].sv128 = __riscv_vle32_v_u32m1(ptr , 4);
+      a_[1].sv128 = __riscv_vle32_v_u32m1(ptr+4 , 4);
+    #else
+      for (size_t i = 0; i < 8; i++) {
+        a_[i / 4].values[i % 4] = ptr[i];
+      }
+    #endif
     simde_uint32x4x2_t s_ = { { simde_uint32x4_from_private(a_[0]),
                                 simde_uint32x4_from_private(a_[1]) } };
     return s_;
@@ -282,9 +333,14 @@ simde_vld1q_u64_x2(uint64_t const ptr[HEDLEY_ARRAY_PARAM(4)]) {
     return vld1q_u64_x2(ptr);
   #else
     simde_uint64x2_private a_[2];
-    for (size_t i = 0; i < 4; i++) {
-      a_[i / 2].values[i % 2] = ptr[i];
-    }
+    #if defined(SIMDE_RISCV_V_NATIVE)
+      a_[0].sv128 = __riscv_vle64_v_u64m1(ptr , 2);
+      a_[1].sv128 = __riscv_vle64_v_u64m1(ptr+2 , 2);
+    #else
+      for (size_t i = 0; i < 4; i++) {
+        a_[i / 2].values[i % 2] = ptr[i];
+      }
+    #endif
     simde_uint64x2x2_t s_ = { { simde_uint64x2_from_private(a_[0]),
                                 simde_uint64x2_from_private(a_[1]) } };
     return s_;
@@ -304,9 +360,14 @@ simde_vld1q_p8_x2(simde_poly8_t const ptr[HEDLEY_ARRAY_PARAM(32)]) {
     return vld1q_p8_x2(ptr);
   #else
     simde_poly8x16_private a_[2];
-    for (size_t i = 0; i < 32; i++) {
-      a_[i / 16].values[i % 16] = ptr[i];
-    }
+    #if defined(SIMDE_RISCV_V_NATIVE)
+      a_[0].sv128 = __riscv_vle8_v_u8m1(ptr , 16);
+      a_[1].sv128 = __riscv_vle8_v_u8m1(ptr+16 , 16);
+    #else
+      for (size_t i = 0; i < 32; i++) {
+        a_[i / 16].values[i % 16] = ptr[i];
+      }
+    #endif
     simde_poly8x16x2_t s_ = { { simde_poly8x16_from_private(a_[0]),
                                 simde_poly8x16_from_private(a_[1]) } };
     return s_;
@@ -326,9 +387,14 @@ simde_vld1q_p16_x2(simde_poly16_t const ptr[HEDLEY_ARRAY_PARAM(16)]) {
     return vld1q_p16_x2(ptr);
   #else
     simde_poly16x8_private a_[2];
-    for (size_t i = 0; i < 16; i++) {
-      a_[i / 8].values[i % 8] = ptr[i];
-    }
+    #if defined(SIMDE_RISCV_V_NATIVE)
+      a_[0].sv128 = __riscv_vle16_v_u16m1(ptr , 8);
+      a_[1].sv128 = __riscv_vle16_v_u16m1(ptr+8 , 8);
+    #else
+      for (size_t i = 0; i < 16; i++) {
+        a_[i / 8].values[i % 8] = ptr[i];
+      }
+    #endif
     simde_poly16x8x2_t s_ = { { simde_poly16x8_from_private(a_[0]),
                                 simde_poly16x8_from_private(a_[1]) } };
     return s_;
@@ -348,9 +414,14 @@ simde_vld1q_p64_x2(simde_poly64_t const ptr[HEDLEY_ARRAY_PARAM(4)]) {
     return vld1q_p64_x2(ptr);
   #else
     simde_poly64x2_private a_[2];
-    for (size_t i = 0; i < 4; i++) {
-      a_[i / 2].values[i % 2] = ptr[i];
-    }
+    #if defined(SIMDE_RISCV_V_NATIVE)
+      a_[0].sv128 = __riscv_vle64_v_u64m1(ptr , 2);
+      a_[1].sv128 = __riscv_vle64_v_u64m1(ptr+2 , 2);
+    #else
+      for (size_t i = 0; i < 4; i++) {
+        a_[i / 2].values[i % 2] = ptr[i];
+      }
+    #endif
     simde_poly64x2x2_t s_ = { { simde_poly64x2_from_private(a_[0]),
                                 simde_poly64x2_from_private(a_[1]) } };
     return s_;

arm/neon/mul.h

@@ -24,6 +24,7 @@
  *   2020      Evan Nemerson <evan@nemerson.com>
  *   2020      Sean Maher <seanptmaher@gmail.com> (Copyright owned by Google, LLC)
  *   2023      Yi-Yen Chung <eric681@andestech.com> (Copyright owned by Andes Technology)
+ *   2023      Yung-Cheng Su <eric20607@gapp.nthu.edu.tw> (Copyright owned by NTHU pllab)
  */
 
 #if !defined(SIMDE_ARM_NEON_MUL_H)
@@ -91,7 +92,9 @@ simde_vmul_f32(simde_float32x2_t a, simde_float32x2_t b) {
       a_ = simde_float32x2_to_private(a),
       b_ = simde_float32x2_to_private(b);
 
-    #if defined(SIMDE_VECTOR_SUBSCRIPT_OPS)
+    #if defined(SIMDE_RISCV_V_NATIVE)
+      r_.sv64 = __riscv_vfmul_vv_f32m1(a_.sv64, b_.sv64, 2);
+    #elif defined(SIMDE_VECTOR_SUBSCRIPT_OPS)
       r_.values = a_.values * b_.values;
     #else
       SIMDE_VECTORIZE
@@ -119,7 +122,9 @@ simde_vmul_f64(simde_float64x1_t a, simde_float64x1_t b) {
       a_ = simde_float64x1_to_private(a),
       b_ = simde_float64x1_to_private(b);
 
-    #if defined(SIMDE_VECTOR_SUBSCRIPT_OPS)
+    #if defined(SIMDE_RISCV_V_NATIVE)
+      r_.sv64 = __riscv_vfmul_vv_f64m1(a_.sv64, b_.sv64, 1);
+    #elif defined(SIMDE_VECTOR_SUBSCRIPT_OPS)
       r_.values = a_.values * b_.values;
     #else
       SIMDE_VECTORIZE
@@ -147,7 +152,9 @@ simde_vmul_s8(simde_int8x8_t a, simde_int8x8_t b) {
       a_ = simde_int8x8_to_private(a),
       b_ = simde_int8x8_to_private(b);
 
-    #if defined(SIMDE_VECTOR_SUBSCRIPT_OPS) && !defined(SIMDE_BUG_GCC_100762)
+    #if defined(SIMDE_RISCV_V_NATIVE)
+      r_.sv64 = __riscv_vmul_vv_i8m1(a_.sv64, b_.sv64, 8);
+    #elif defined(SIMDE_VECTOR_SUBSCRIPT_OPS) && !defined(SIMDE_BUG_GCC_100762)
       r_.values = a_.values * b_.values;
     #else
       SIMDE_VECTORIZE
@@ -177,6 +184,8 @@ simde_vmul_s16(simde_int16x4_t a, simde_int16x4_t b) {
 
     #if defined(SIMDE_X86_MMX_NATIVE)
       r_.m64 = _m_pmullw(a_.m64, b_.m64);
+    #elif defined(SIMDE_RISCV_V_NATIVE)
+      r_.sv64 = __riscv_vmul_vv_i16m1(a_.sv64, b_.sv64, 4);
     #elif defined(SIMDE_VECTOR_SUBSCRIPT_OPS) && !defined(SIMDE_BUG_GCC_100762)
       r_.values = a_.values * b_.values;
     #else
@@ -205,7 +214,9 @@ simde_vmul_s32(simde_int32x2_t a, simde_int32x2_t b) {
       a_ = simde_int32x2_to_private(a),
       b_ = simde_int32x2_to_private(b);
 
-    #if defined(SIMDE_VECTOR_SUBSCRIPT_OPS) && !defined(SIMDE_BUG_GCC_100762)
+    #if defined(SIMDE_RISCV_V_NATIVE)
+      r_.sv64 = __riscv_vmul_vv_i32m1(a_.sv64, b_.sv64, 2);
+    #elif defined(SIMDE_VECTOR_SUBSCRIPT_OPS) && !defined(SIMDE_BUG_GCC_100762)
       r_.values = a_.values * b_.values;
     #else
       SIMDE_VECTORIZE
@@ -230,7 +241,9 @@ simde_x_vmul_s64(simde_int64x1_t a, simde_int64x1_t b) {
     a_ = simde_int64x1_to_private(a),
     b_ = simde_int64x1_to_private(b);
 
-  #if defined(SIMDE_VECTOR_SUBSCRIPT_OPS)
+  #if defined(SIMDE_RISCV_V_NATIVE)
+    r_.sv64 = __riscv_vmul_vv_i64m1(a_.sv64, b_.sv64, 1);
+  #elif defined(SIMDE_VECTOR_SUBSCRIPT_OPS)
     r_.values = a_.values * b_.values;
   #else
     SIMDE_VECTORIZE
@@ -253,7 +266,9 @@ simde_vmul_u8(simde_uint8x8_t a, simde_uint8x8_t b) {
       a_ = simde_uint8x8_to_private(a),
       b_ = simde_uint8x8_to_private(b);
 
-    #if defined(SIMDE_VECTOR_SUBSCRIPT_OPS) && !defined(SIMDE_BUG_GCC_100762)
+    #if defined(SIMDE_RISCV_V_NATIVE)
+      r_.sv64 = __riscv_vmul_vv_u8m1(a_.sv64, b_.sv64, 8);
+    #elif defined(SIMDE_VECTOR_SUBSCRIPT_OPS) && !defined(SIMDE_BUG_GCC_100762)
       r_.values = a_.values * b_.values;
     #else
       SIMDE_VECTORIZE
@@ -281,7 +296,9 @@ simde_vmul_u16(simde_uint16x4_t a, simde_uint16x4_t b) {
       a_ = simde_uint16x4_to_private(a),
       b_ = simde_uint16x4_to_private(b);
 
-    #if defined(SIMDE_VECTOR_SUBSCRIPT_OPS) && !defined(SIMDE_BUG_GCC_100762)
+    #if defined(SIMDE_RISCV_V_NATIVE)
+      r_.sv64 = __riscv_vmul_vv_u16m1(a_.sv64, b_.sv64, 4);
+    #elif defined(SIMDE_VECTOR_SUBSCRIPT_OPS) && !defined(SIMDE_BUG_GCC_100762)
       r_.values = a_.values * b_.values;
     #else
       SIMDE_VECTORIZE
@@ -309,7 +326,9 @@ simde_vmul_u32(simde_uint32x2_t a, simde_uint32x2_t b) {
       a_ = simde_uint32x2_to_private(a),
       b_ = simde_uint32x2_to_private(b);
 
-    #if defined(SIMDE_VECTOR_SUBSCRIPT_OPS) && !defined(SIMDE_BUG_GCC_100762)
+    #if defined(SIMDE_RISCV_V_NATIVE)
+      r_.sv64 = __riscv_vmul_vv_u32m1(a_.sv64, b_.sv64, 2);
+    #elif defined(SIMDE_VECTOR_SUBSCRIPT_OPS) && !defined(SIMDE_BUG_GCC_100762)
       r_.values = a_.values * b_.values;
     #else
       SIMDE_VECTORIZE
@@ -334,7 +353,9 @@ simde_x_vmul_u64(simde_uint64x1_t a, simde_uint64x1_t b) {
     a_ = simde_uint64x1_to_private(a),
     b_ = simde_uint64x1_to_private(b);
 
-  #if defined(SIMDE_VECTOR_SUBSCRIPT_OPS)
+  #if defined(SIMDE_RISCV_V_NATIVE)
+    r_.sv64 = __riscv_vmul_vv_u64m1(a_.sv64, b_.sv64, 1);
+  #elif defined(SIMDE_VECTOR_SUBSCRIPT_OPS)
     r_.values = a_.values * b_.values;
   #else
     SIMDE_VECTORIZE
@@ -387,6 +408,8 @@ simde_vmulq_f32(simde_float32x4_t a, simde_float32x4_t b) {
       r_.m128 = _mm_mul_ps(a_.m128, b_.m128);
     #elif defined(SIMDE_WASM_SIMD128_NATIVE)
       r_.v128 = wasm_f32x4_mul(a_.v128, b_.v128);
+    #elif defined(SIMDE_RISCV_V_NATIVE)
+      r_.sv128 = __riscv_vfmul_vv_f32m1(a_.sv128, b_.sv128, 4);
     #elif defined(SIMDE_VECTOR_SUBSCRIPT_OPS)
       r_.values = a_.values * b_.values;
     #else
@@ -419,6 +442,8 @@ simde_vmulq_f64(simde_float64x2_t a, simde_float64x2_t b) {
       r_.m128d = _mm_mul_pd(a_.m128d, b_.m128d);
     #elif defined(SIMDE_WASM_SIMD128_NATIVE)
       r_.v128 = wasm_f64x2_mul(a_.v128, b_.v128);
+    #elif defined(SIMDE_RISCV_V_NATIVE)
+      r_.sv128 = __riscv_vfmul_vv_f64m1(a_.sv128, b_.sv128, 2);
     #elif defined(SIMDE_VECTOR_SUBSCRIPT_OPS)
       r_.values = a_.values * b_.values;
     #else
@@ -470,6 +495,8 @@ simde_vmulq_s8(simde_int8x16_t a, simde_int8x16_t b) {
             )
           #endif
         );
+    #elif defined(SIMDE_RISCV_V_NATIVE)
+      r_.sv128 = __riscv_vmul_vv_i8m1(a_.sv128, b_.sv128, 16);
     #elif defined(SIMDE_VECTOR_SUBSCRIPT_OPS)
       r_.values = a_.values * b_.values;
     #else
@@ -500,6 +527,8 @@ simde_vmulq_s16(simde_int16x8_t a, simde_int16x8_t b) {
 
     #if defined(SIMDE_X86_SSE2_NATIVE)
       r_.m128i = _mm_mullo_epi16(a_.m128i, b_.m128i);
+    #elif defined(SIMDE_RISCV_V_NATIVE)
+      r_.sv128 = __riscv_vmul_vv_i16m1(a_.sv128, b_.sv128, 8);
     #elif defined(SIMDE_VECTOR_SUBSCRIPT_OPS)
       r_.values = a_.values * b_.values;
     #else
@@ -530,6 +559,8 @@ simde_vmulq_s32(simde_int32x4_t a, simde_int32x4_t b) {
 
     #if defined(SIMDE_WASM_SIMD128_NATIVE)
       r_.v128 = wasm_i32x4_mul(a_.v128, b_.v128);
+    #elif defined(SIMDE_RISCV_V_NATIVE)
+      r_.sv128 = __riscv_vmul_vv_i32m1(a_.sv128, b_.sv128, 4);
     #elif defined(SIMDE_VECTOR_SUBSCRIPT_OPS)
       r_.values = a_.values * b_.values;
     #else
@@ -559,6 +590,8 @@ simde_x_vmulq_s64(simde_int64x2_t a, simde_int64x2_t b) {
     r_.v128 = wasm_i64x2_mul(a_.v128, b_.v128);
   #elif defined(SIMDE_X86_AVX512VL_NATIVE) && defined(SIMDE_X86_AVX512DQ_NATIVE)
     r_.m128i = _mm_mullo_epi64(a_.m128i, b_.m128i);
+  #elif defined(SIMDE_RISCV_V_NATIVE)
+    r_.sv128 = __riscv_vmul_vv_i64m1(a_.sv128, b_.sv128, 2);
   #elif defined(SIMDE_VECTOR_SUBSCRIPT_OPS)
     r_.values = a_.values * b_.values;
   #else
@@ -576,6 +609,13 @@ simde_uint8x16_t
 simde_vmulq_u8(simde_uint8x16_t a, simde_uint8x16_t b) {
   #if defined(SIMDE_ARM_NEON_A32V7_NATIVE)
     return vmulq_u8(a, b);
+  #elif defined(SIMDE_RISCV_V_NATIVE)
+    simde_uint8x16_private
+      r_,
+      a_ = simde_uint8x16_to_private(a),
+      b_ = simde_uint8x16_to_private(b);
+    r_.sv128 = __riscv_vmul_vv_u8m1(a_.sv128, b_.sv128, 16);
+    return simde_uint8x16_from_private(r_);
   #else
     return
       simde_vreinterpretq_u8_s8(
@@ -596,6 +636,13 @@ simde_uint16x8_t
 simde_vmulq_u16(simde_uint16x8_t a, simde_uint16x8_t b) {
   #if defined(SIMDE_ARM_NEON_A32V7_NATIVE)
     return vmulq_u16(a, b);
+  #elif defined(SIMDE_RISCV_V_NATIVE)
+    simde_uint16x8_private
+      r_,
+      a_ = simde_uint16x8_to_private(a),
+      b_ = simde_uint16x8_to_private(b);
+    r_.sv128 = __riscv_vmul_vv_u16m1(a_.sv128, b_.sv128, 8);
+    return simde_uint16x8_from_private(r_);
   #else
     return
       simde_vreinterpretq_u16_s16(
@@ -616,6 +663,13 @@ simde_uint32x4_t
 simde_vmulq_u32(simde_uint32x4_t a, simde_uint32x4_t b) {
   #if defined(SIMDE_ARM_NEON_A32V7_NATIVE)
     return vmulq_u32(a, b);
+  #elif defined(SIMDE_RISCV_V_NATIVE)
+    simde_uint32x4_private
+      r_,
+      a_ = simde_uint32x4_to_private(a),
+      b_ = simde_uint32x4_to_private(b);
+    r_.sv128 = __riscv_vmul_vv_u32m1(a_.sv128, b_.sv128, 4);
+    return simde_uint32x4_from_private(r_);
   #else
     return
       simde_vreinterpretq_u32_s32(
@@ -634,13 +688,22 @@ simde_vmulq_u32(simde_uint32x4_t a, simde_uint32x4_t b) {
 SIMDE_FUNCTION_ATTRIBUTES
 simde_uint64x2_t
 simde_x_vmulq_u64(simde_uint64x2_t a, simde_uint64x2_t b) {
-  return
-    simde_vreinterpretq_u64_s64(
-      simde_x_vmulq_s64(
-        simde_vreinterpretq_s64_u64(a),
-        simde_vreinterpretq_s64_u64(b)
-      )
-    );
+  #if defined(SIMDE_RISCV_V_NATIVE)
+    simde_uint64x2_private
+      r_,
+      a_ = simde_uint64x2_to_private(a),
+      b_ = simde_uint64x2_to_private(b);
+    r_.sv128 = __riscv_vmul_vv_u64m1(a_.sv128, b_.sv128, 2);
+    return simde_uint64x2_from_private(r_);
+  #else
+    return
+      simde_vreinterpretq_u64_s64(
+        simde_x_vmulq_s64(
+          simde_vreinterpretq_s64_u64(a),
+          simde_vreinterpretq_s64_u64(b)
+        )
+      );
+  #endif
 }
 
 SIMDE_FUNCTION_ATTRIBUTES

arm/neon/mulx_lane.h

@@ -156,10 +156,14 @@ simde_vmulx_lane_f32(simde_float32x2_t a, simde_float32x2_t b, const int lane)
     a_ = simde_float32x2_to_private(a),
     b_ = simde_float32x2_to_private(b);
 
-  SIMDE_VECTORIZE
-  for (size_t i = 0 ; i < (sizeof(r_.values) / sizeof(r_.values[0])) ; i++) {
-    r_.values[i] = a_.values[i] * b_.values[lane];
-  }
+  #if defined(SIMDE_RISCV_V_NATIVE)
+    r_.sv64 = __riscv_vfmul_vf_f32m1(a_.sv64, b_.values[lane], 2);
+  #else
+    SIMDE_VECTORIZE
+    for (size_t i = 0 ; i < (sizeof(r_.values) / sizeof(r_.values[0])) ; i++) {
+      r_.values[i] = a_.values[i] * b_.values[lane];
+    }
+  #endif
 
   return simde_float32x2_from_private(r_);
 }
@@ -180,10 +184,14 @@ simde_vmulx_lane_f64(simde_float64x1_t a, simde_float64x1_t b, const int lane)
     a_ = simde_float64x1_to_private(a),
     b_ = simde_float64x1_to_private(b);
 
-  SIMDE_VECTORIZE
-  for (size_t i = 0 ; i < (sizeof(r_.values) / sizeof(r_.values[0])) ; i++) {
-    r_.values[i] = a_.values[i] * b_.values[lane];
-  }
+  #if defined(SIMDE_RISCV_V_NATIVE)
+    r_.sv64 = __riscv_vfmul_vf_f64m1(a_.sv64, b_.values[lane], 1);
+  #else
+    SIMDE_VECTORIZE
+    for (size_t i = 0 ; i < (sizeof(r_.values) / sizeof(r_.values[0])) ; i++) {
+      r_.values[i] = a_.values[i] * b_.values[lane];
+    }
+  #endif
 
   return simde_float64x1_from_private(r_);
 }
@@ -230,10 +238,14 @@ simde_vmulxq_lane_f32(simde_float32x4_t a, simde_float32x2_t b, const int lane)
     a_ = simde_float32x4_to_private(a);
   simde_float32x2_private b_ = simde_float32x2_to_private(b);
 
-  SIMDE_VECTORIZE
-  for (size_t i = 0 ; i < (sizeof(r_.values) / sizeof(r_.values[0])) ; i++) {
-    r_.values[i] = a_.values[i] * b_.values[lane];
-  }
+  #if defined(SIMDE_RISCV_V_NATIVE)
+    r_.sv128 = __riscv_vfmul_vf_f32m1(a_.sv128, b_.values[lane], 4);
+  #else
+    SIMDE_VECTORIZE
+    for (size_t i = 0 ; i < (sizeof(r_.values) / sizeof(r_.values[0])) ; i++) {
+      r_.values[i] = a_.values[i] * b_.values[lane];
+    }
+  #endif
 
   return simde_float32x4_from_private(r_);
 }
@@ -254,10 +266,14 @@ simde_vmulxq_lane_f64(simde_float64x2_t a, simde_float64x1_t b, const int lane)
     a_ = simde_float64x2_to_private(a);
   simde_float64x1_private b_ = simde_float64x1_to_private(b);
 
-  SIMDE_VECTORIZE
-  for (size_t i = 0 ; i < (sizeof(r_.values) / sizeof(r_.values[0])) ; i++) {
-    r_.values[i] = a_.values[i] * b_.values[lane];
-  }
+  #if defined(SIMDE_RISCV_V_NATIVE)
+    r_.sv128 = __riscv_vfmul_vf_f64m1(a_.sv128, b_.values[lane], 2);
+  #else
+    SIMDE_VECTORIZE
+    for (size_t i = 0 ; i < (sizeof(r_.values) / sizeof(r_.values[0])) ; i++) {
+      r_.values[i] = a_.values[i] * b_.values[lane];
+    }
+  #endif
 
   return simde_float64x2_from_private(r_);
 }
@@ -304,10 +320,14 @@ simde_vmulxq_laneq_f32(simde_float32x4_t a, simde_float32x4_t b, const int lane)
     a_ = simde_float32x4_to_private(a),
     b_ = simde_float32x4_to_private(b);
 
-  SIMDE_VECTORIZE
-  for (size_t i = 0 ; i < (sizeof(r_.values) / sizeof(r_.values[0])) ; i++) {
-    r_.values[i] = a_.values[i] * b_.values[lane];
-  }
+  #if defined(SIMDE_RISCV_V_NATIVE)
+    r_.sv128 = __riscv_vfmul_vf_f32m1(a_.sv128, b_.values[lane], 4);
+  #else
+    SIMDE_VECTORIZE
+    for (size_t i = 0 ; i < (sizeof(r_.values) / sizeof(r_.values[0])) ; i++) {
+      r_.values[i] = a_.values[i] * b_.values[lane];
+    }
+  #endif
 
   return simde_float32x4_from_private(r_);
 }
@@ -328,10 +348,14 @@ simde_vmulxq_laneq_f64(simde_float64x2_t a, simde_float64x2_t b, const int lane)
     a_ = simde_float64x2_to_private(a),
     b_ = simde_float64x2_to_private(b);
 
-  SIMDE_VECTORIZE
-  for (size_t i = 0 ; i < (sizeof(r_.values) / sizeof(r_.values[0])) ; i++) {
-    r_.values[i] = a_.values[i] * b_.values[lane];
-  }
+  #if defined(SIMDE_RISCV_V_NATIVE)
+    r_.sv128 = __riscv_vfmul_vf_f64m1(a_.sv128, b_.values[lane], 2);
+  #else
+    SIMDE_VECTORIZE
+    for (size_t i = 0 ; i < (sizeof(r_.values) / sizeof(r_.values[0])) ; i++) {
+      r_.values[i] = a_.values[i] * b_.values[lane];
+    }
+  #endif
 
   return simde_float64x2_from_private(r_);
 }
@@ -378,10 +402,14 @@ simde_vmulx_laneq_f32(simde_float32x2_t a, simde_float32x4_t b, const int lane)
     a_ = simde_float32x2_to_private(a);
   simde_float32x4_private b_ = simde_float32x4_to_private(b);
 
-  SIMDE_VECTORIZE
-  for (size_t i = 0 ; i < (sizeof(r_.values) / sizeof(r_.values[0])) ; i++) {
-    r_.values[i] = a_.values[i] * b_.values[lane];
-  }
+  #if defined(SIMDE_RISCV_V_NATIVE)
+    r_.sv64 = __riscv_vfmul_vf_f32m1(a_.sv64, b_.values[lane], 2);
+  #else
+    SIMDE_VECTORIZE
+    for (size_t i = 0 ; i < (sizeof(r_.values) / sizeof(r_.values[0])) ; i++) {
+      r_.values[i] = a_.values[i] * b_.values[lane];
+    }
+  #endif
 
   return simde_float32x2_from_private(r_);
 }
@@ -402,10 +430,14 @@ simde_vmulx_laneq_f64(simde_float64x1_t a, simde_float64x2_t b, const int lane)
     a_ = simde_float64x1_to_private(a);
   simde_float64x2_private b_ = simde_float64x2_to_private(b);
 
-  SIMDE_VECTORIZE
-  for (size_t i = 0 ; i < (sizeof(r_.values) / sizeof(r_.values[0])) ; i++) {
-    r_.values[i] = a_.values[i] * b_.values[lane];
-  }
+  #if defined(SIMDE_RISCV_V_NATIVE)
+    r_.sv64 = __riscv_vfmul_vf_f64m1(a_.sv64, b_.values[lane], 1);
+  #else
+    SIMDE_VECTORIZE
+    for (size_t i = 0 ; i < (sizeof(r_.values) / sizeof(r_.values[0])) ; i++) {
+      r_.values[i] = a_.values[i] * b_.values[lane];
+    }
+  #endif
 
   return simde_float64x1_from_private(r_);
 }

arm/neon/st1_x2.h

@@ -24,6 +24,7 @@
  *   2020      Evan Nemerson <evan@nemerson.com>
  *   2021      Décio Luiz Gazzoni Filho <decio@decpp.net>
  *   2023      Yi-Yen Chung <eric681@andestech.com> (Copyright owned by Andes Technology)
+ *   2023      Chi-Wei Chu <wewe5215@gapp.nthu.edu.tw> (Copyright owned by NTHU pllab)
  */
 
 #if !defined(SIMDE_ARM_NEON_ST1_X2_H)
@@ -43,11 +44,18 @@ simde_vst1_f16_x2(simde_float16_t ptr[HEDLEY_ARRAY_PARAM(8)], simde_float16x4x2_
   #if defined(SIMDE_ARM_NEON_A32V7_NATIVE) && defined(SIMDE_ARM_NEON_FP16) && !defined(SIMDE_BUG_GCC_REV_260989)
     vst1_f16_x2(ptr, val);
   #else
-    simde_float16x4_private val_[2];
-    for (size_t i = 0; i < 2; i++) {
-      val_[i] = simde_float16x4_to_private(val.val[i]);
-    }
-    simde_memcpy(ptr, &val_, sizeof(val_));
+    simde_float16x4_private a_[2] = {simde_float16x4_to_private(val.val[0]),
+                                     simde_float16x4_to_private(val.val[1])};
+    #if defined(SIMDE_RISCV_V_NATIVE) && SIMDE_ARCH_RISCV_ZVFH
+      __riscv_vse16_v_f16m1((_Float16 *)ptr , a_[0].sv64 , 4);
+      __riscv_vse16_v_f16m1((_Float16 *)ptr+4 , a_[1].sv64 , 4);
+    #else
+      simde_float16_t buf[8];
+      for (size_t i = 0; i < 8; i++) {
+        buf[i] = a_[i / 4].values[i % 4];
+      }
+      simde_memcpy(ptr, buf, sizeof(buf));
+    #endif
   #endif
 }
 #if defined(SIMDE_ARM_NEON_A32V7_ENABLE_NATIVE_ALIASES)
@@ -216,7 +224,12 @@ simde_vst1_p8_x2(simde_poly8_t ptr[HEDLEY_ARRAY_PARAM(16)], simde_poly8x8x2_t va
     for (size_t i = 0; i < 2; i++) {
       val_[i] = simde_poly8x8_to_private(val.val[i]);
     }
-    simde_memcpy(ptr, &val_, sizeof(val_));
+    #if defined(SIMDE_RISCV_V_NATIVE)
+      __riscv_vse8_v_u8m1(ptr , val_[0].sv64 , 8);
+      __riscv_vse8_v_u8m1(ptr+8 , val_[1].sv64 , 8);
+    #else
+      simde_memcpy(ptr, &val_, sizeof(val_));
+    #endif
   #endif
 }
 #if defined(SIMDE_ARM_NEON_A32V7_ENABLE_NATIVE_ALIASES)
@@ -235,7 +248,12 @@ simde_vst1_p16_x2(simde_poly16_t ptr[HEDLEY_ARRAY_PARAM(8)], simde_poly16x4x2_t
     for (size_t i = 0; i < 2; i++) {
       val_[i] = simde_poly16x4_to_private(val.val[i]);
     }
-    simde_memcpy(ptr, &val_, sizeof(val_));
+    #if defined(SIMDE_RISCV_V_NATIVE)
+      __riscv_vse16_v_u16m1(ptr , val_[0].sv64 , 4);
+      __riscv_vse16_v_u16m1(ptr+4 , val_[1].sv64 , 4);
+    #else
+      simde_memcpy(ptr, &val_, sizeof(val_));
+    #endif
   #endif
 }
 #if defined(SIMDE_ARM_NEON_A32V7_ENABLE_NATIVE_ALIASES)
@@ -254,7 +272,12 @@ simde_vst1_p64_x2(simde_poly64_t ptr[HEDLEY_ARRAY_PARAM(2)], simde_poly64x1x2_t
     for (size_t i = 0; i < 2; i++) {
       val_[i] = simde_poly64x1_to_private(val.val[i]);
     }
-    simde_memcpy(ptr, &val_, sizeof(val_));
+    #if defined(SIMDE_RISCV_V_NATIVE)
+      __riscv_vse64_v_u64m1(ptr , val_[0].sv64 , 1);
+      __riscv_vse64_v_u64m1(ptr+1 , val_[1].sv64 , 1);
+    #else
+      simde_memcpy(ptr, &val_, sizeof(val_));
+    #endif
   #endif
 }
 #if defined(SIMDE_ARM_NEON_A32V8_ENABLE_NATIVE_ALIASES)

arm/neon/st1_x3.h

@@ -24,6 +24,7 @@
  *   2020      Evan Nemerson <evan@nemerson.com>
  *   2021      Décio Luiz Gazzoni Filho <decio@decpp.net>
  *   2023      Yi-Yen Chung <eric681@andestech.com> (Copyright owned by Andes Technology)
+ *   2023      Chi-Wei Chu <wewe5215@gapp.nthu.edu.tw> (Copyright owned by NTHU pllab)
  */
 
 #if !defined(SIMDE_ARM_NEON_ST1_X3_H)
@@ -43,11 +44,20 @@ simde_vst1_f16_x3(simde_float16_t ptr[HEDLEY_ARRAY_PARAM(12)], simde_float16x4x3
   #if defined(SIMDE_ARM_NEON_A32V7_NATIVE) && defined(SIMDE_ARM_NEON_FP16)
     vst1_f16_x3(ptr, val);
   #else
-    simde_float16x4_private val_[3];
-    for (size_t i = 0; i < 3; i++) {
-      val_[i] = simde_float16x4_to_private(val.val[i]);
-    }
-    simde_memcpy(ptr, &val_, sizeof(val_));
+    simde_float16x4_private a[3] = { simde_float16x4_to_private(val.val[0]),
+                                      simde_float16x4_to_private(val.val[1]),
+                                      simde_float16x4_to_private(val.val[2]) };
+    #if defined(SIMDE_RISCV_V_NATIVE) && SIMDE_ARCH_RISCV_ZVFH
+      __riscv_vse16_v_f16m1((_Float16 *)ptr , a[0].sv64 , 4);
+      __riscv_vse16_v_f16m1((_Float16 *)ptr+4 , a[1].sv64 , 4);
+      __riscv_vse16_v_f16m1((_Float16 *)ptr+8 , a[2].sv64 , 4);
+    #else
+      simde_float16_t buf[12];
+      for (size_t i = 0; i < 12 ; i++) {
+        buf[i] = a[i / 4].values[i % 4];
+      }
+      simde_memcpy(ptr, buf, sizeof(buf));
+    #endif
   #endif
 }
 #if defined(SIMDE_ARM_NEON_A32V7_ENABLE_NATIVE_ALIASES)
@@ -226,7 +236,13 @@ simde_vst1_p8_x3(simde_poly8_t ptr[HEDLEY_ARRAY_PARAM(24)], simde_poly8x8x3_t va
     for (size_t i = 0; i < 3; i++) {
       val_[i] = simde_poly8x8_to_private(val.val[i]);
     }
-    simde_memcpy(ptr, &val_, sizeof(val_));
+    #if defined(SIMDE_RISCV_V_NATIVE)
+      __riscv_vse8_v_u8m1(ptr , val_[0].sv64 , 8);
+      __riscv_vse8_v_u8m1(ptr+8 , val_[1].sv64 , 8);
+      __riscv_vse8_v_u8m1(ptr+16 , val_[2].sv64 , 8);
+    #else
+      simde_memcpy(ptr, &val_, sizeof(val_));
+    #endif
   #endif
 }
 #if defined(SIMDE_ARM_NEON_A32V7_ENABLE_NATIVE_ALIASES)
@@ -245,7 +261,13 @@ simde_vst1_p16_x3(simde_poly16_t ptr[HEDLEY_ARRAY_PARAM(12)], simde_poly16x4x3_t
     for (size_t i = 0; i < 3; i++) {
       val_[i] = simde_poly16x4_to_private(val.val[i]);
     }
-    simde_memcpy(ptr, &val_, sizeof(val_));
+    #if defined(SIMDE_RISCV_V_NATIVE)
+      __riscv_vse16_v_u16m1(ptr , val_[0].sv64 , 4);
+      __riscv_vse16_v_u16m1(ptr+4 , val_[1].sv64 , 4);
+      __riscv_vse16_v_u16m1(ptr+8 , val_[2].sv64 , 4);
+    #else
+      simde_memcpy(ptr, &val_, sizeof(val_));
+    #endif
   #endif
 }
 #if defined(SIMDE_ARM_NEON_A32V7_ENABLE_NATIVE_ALIASES)
@@ -264,7 +286,13 @@ simde_vst1_p64_x3(simde_poly64_t ptr[HEDLEY_ARRAY_PARAM(3)], simde_poly64x1x3_t
     for (size_t i = 0; i < 3; i++) {
       val_[i] = simde_poly64x1_to_private(val.val[i]);
     }
-    simde_memcpy(ptr, &val_, sizeof(val_));
+    #if defined(SIMDE_RISCV_V_NATIVE)
+      __riscv_vse64_v_u64m1(ptr , val_[0].sv64 , 1);
+      __riscv_vse64_v_u64m1(ptr+1 , val_[1].sv64 , 1);
+      __riscv_vse64_v_u64m1(ptr+2 , val_[2].sv64 , 1);
+    #else
+      simde_memcpy(ptr, &val_, sizeof(val_));
+    #endif
   #endif
 }
 #if defined(SIMDE_ARM_NEON_A32V8_ENABLE_NATIVE_ALIASES)