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Commit 8c421df1 authored by Michael R. Crusoe's avatar Michael R. Crusoe Committed by Michael R. Crusoe
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arm neon: define native alias only under the inverse of the conditions of a pass-through

parent 25e70ce7
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Showing with 2280 additions and 1134 deletions
arm/neon/abd.h
View file @ 8c421df1
......@@ -50,7 +50,7 @@ simde_vabdh_f16(simde_float16_t a, simde_float16_t b) {
return r_ < 0 ? simde_float16_from_float32(-r_) : simde_float16_from_float32(r_);
#endif
}
#if defined(SIMDE_ARM_NEON_A64V8_ENABLE_NATIVE_ALIASES)
#if defined(SIMDE_ARM_NEON_A64V8_ENABLE_NATIVE_ALIASES) || (defined(SIMDE_ENABLE_NATIVE_ALIASES) && !defined(SIMDE_ARM_NEON_FP16))
#undef vabdh_f16
#define vabdh_f16(a, b) simde_vabdh_f16((a), (b))
#endif
......@@ -94,7 +94,7 @@ simde_vabd_f16(simde_float16x4_t a, simde_float16x4_t b) {
return simde_vabs_f16(simde_vsub_f16(a, b));
#endif
}
#if defined(SIMDE_ARM_NEON_A32V8_ENABLE_NATIVE_ALIASES)
#if defined(SIMDE_ARM_NEON_A64V8_ENABLE_NATIVE_ALIASES) || (defined(SIMDE_ENABLE_NATIVE_ALIASES) && !defined(SIMDE_ARM_NEON_FP16))
#undef vabd_f16
#define vabd_f16(a, b) simde_vabd_f16((a), (b))
#endif
......@@ -315,7 +315,7 @@ simde_vabdq_f16(simde_float16x8_t a, simde_float16x8_t b) {
return simde_vabsq_f16(simde_vsubq_f16(a, b));
#endif
}
#if defined(SIMDE_ARM_NEON_A32V8_ENABLE_NATIVE_ALIASES)
#if defined(SIMDE_ARM_NEON_A32V8_ENABLE_NATIVE_ALIASES) || (defined(SIMDE_ENABLE_NATIVE_ALIASES) && !defined(SIMDE_ARM_NEON_FP16))
#undef vabdq_f16
#define vabdq_f16(a, b) simde_vabdq_f16((a), (b))
#endif
......
arm/neon/abs.h
View file @ 8c421df1
......@@ -44,7 +44,8 @@ simde_vabsd_s64(int64_t a) {
return a < 0 ? -a : a;
#endif
}
#if defined(SIMDE_ARM_NEON_A64V8_ENABLE_NATIVE_ALIASES)
#if defined(SIMDE_ARM_NEON_A64V8_ENABLE_NATIVE_ALIASES) || (defined(SIMDE_ENABLE_NATIVE_ALIASES) && \
!(!defined(HEDLEY_GCC_VERSION) || HEDLEY_GCC_VERSION_CHECK(9,1,0)))
#undef vabsd_s64
#define vabsd_s64(a) simde_vabsd_s64(a)
#endif
......@@ -60,7 +61,8 @@ simde_vabsh_f16(simde_float16_t a) {
return (a_ >= 0.0f) ? simde_float16_from_float32(a_) : simde_float16_from_float32(-a_);
#endif
}
#if defined(SIMDE_ARM_NEON_A32V8_ENABLE_NATIVE_ALIASES)
#if defined(SIMDE_ARM_NEON_A32V8_ENABLE_NATIVE_ALIASES) || (defined(SIMDE_ENABLE_NATIVE_ALIASES) && \
!(defined(SIMDE_ARM_NEON_FP16)))
#undef vabsh_f16
#define vabsh_f16(a) simde_vabsh_f16(a)
#endif
......@@ -87,7 +89,8 @@ simde_vabs_f16(simde_float16x4_t a) {
return simde_float16x4_from_private(r_);
#endif
}
#if defined(SIMDE_ARM_NEON_A32V8_ENABLE_NATIVE_ALIASES)
#if defined(SIMDE_ARM_NEON_A32V8_ENABLE_NATIVE_ALIASES) || (defined(SIMDE_ENABLE_NATIVE_ALIASES) && \
!(defined(SIMDE_ARM_NEON_FP16)))
#undef vabs_f16
#define vabs_f16(a) simde_vabs_f16(a)
#endif
......@@ -294,7 +297,8 @@ simde_vabsq_f16(simde_float16x8_t a) {
return simde_float16x8_from_private(r_);
#endif
}
#if defined(SIMDE_ARM_NEON_A32V8_ENABLE_NATIVE_ALIASES)
#if defined(SIMDE_ARM_NEON_A32V8_ENABLE_NATIVE_ALIASES) || (defined(SIMDE_ENABLE_NATIVE_ALIASES) && \
!(defined(SIMDE_ARM_NEON_FP16)))
#undef vabsq_f16
#define vabsq_f16(a) simde_vabsq_f16(a)
#endif
......
arm/neon/add.h
View file @ 8c421df1
......@@ -46,7 +46,8 @@ simde_vaddh_f16(simde_float16_t a, simde_float16_t b) {
return simde_float16_from_float32(af + bf);
#endif
}
#if defined(SIMDE_ARM_NEON_A32V8_ENABLE_NATIVE_ALIASES)
#if defined(SIMDE_ARM_NEON_A32V8_ENABLE_NATIVE_ALIASES) || (defined(SIMDE_ENABLE_NATIVE_ALIASES) && \
!(defined(SIMDE_ARM_NEON_FP16)))
#undef vaddh_f16
#define vaddh_f16(a, b) simde_vaddh_f16((a), (b))
#endif
......@@ -102,7 +103,8 @@ simde_vadd_f16(simde_float16x4_t a, simde_float16x4_t b) {
return simde_float16x4_from_private(r_);
#endif
}
#if defined(SIMDE_ARM_NEON_A32V8_ENABLE_NATIVE_ALIASES)
#if defined(SIMDE_ARM_NEON_A32V8_ENABLE_NATIVE_ALIASES) || (defined(SIMDE_ENABLE_NATIVE_ALIASES) && \
!(defined(SIMDE_ARM_NEON_FP16)))
#undef vadd_f16
#define vadd_f16(a, b) simde_vadd_f16((a), (b))
#endif
......@@ -437,7 +439,8 @@ simde_vaddq_f16(simde_float16x8_t a, simde_float16x8_t b) {
return simde_float16x8_from_private(r_);
#endif
}
#if defined(SIMDE_ARM_NEON_A32V8_ENABLE_NATIVE_ALIASES)
#if defined(SIMDE_ARM_NEON_A32V8_ENABLE_NATIVE_ALIASES) || (defined(SIMDE_ENABLE_NATIVE_ALIASES) && \
!(defined(SIMDE_ARM_NEON_FP16)))
#undef vaddq_f16
#define vaddq_f16(a, b) simde_vaddq_f16((a), (b))
#endif
......@@ -809,7 +812,8 @@ simde_vadd_p8(simde_poly8x8_t a, simde_poly8x8_t b) {
return simde_poly8x8_from_private(r_);
#endif
}
#if defined(SIMDE_ARM_NEON_A32V7_ENABLE_NATIVE_ALIASES)
#if defined(SIMDE_ARM_NEON_A32V7_ENABLE_NATIVE_ALIASES) || (defined(SIMDE_ENABLE_NATIVE_ALIASES) && \
defined(_GCC_ARM_NEON_H))
#undef vadd_p8
#define vadd_p8(a, b) simde_vadd_p8((a), (b))
#endif
......@@ -833,7 +837,8 @@ simde_vadd_p16(simde_poly16x4_t a, simde_poly16x4_t b) {
return simde_poly16x4_from_private(r_);
#endif
}
#if defined(SIMDE_ARM_NEON_A32V7_ENABLE_NATIVE_ALIASES)
#if defined(SIMDE_ARM_NEON_A32V7_ENABLE_NATIVE_ALIASES) || (defined(SIMDE_ENABLE_NATIVE_ALIASES) && \
defined(_GCC_ARM_NEON_H))
#undef vadd_p16
#define vadd_p16(a, b) simde_vadd_p16((a), (b))
#endif
......@@ -858,7 +863,9 @@ simde_vadd_p64(simde_poly64x1_t a, simde_poly64x1_t b) {
return simde_poly64x1_from_private(r_);
#endif
}
#if defined(SIMDE_ARM_NEON_A32V7_ENABLE_NATIVE_ALIASES)
#if defined(SIMDE_ARM_NEON_A32V8_ENABLE_NATIVE_ALIASES) || (defined(SIMDE_ENABLE_NATIVE_ALIASES) && \
!(defined(SIMDE_ARM_NEON_CRYPTO) && \
!defined(_GCC_ARM_NEON_H)))
#undef vadd_p64
#define vadd_p64(a, b) simde_vadd_p64((a), (b))
#endif
......@@ -882,7 +889,8 @@ simde_vaddq_p8(simde_poly8x16_t a, simde_poly8x16_t b) {
return simde_poly8x16_from_private(r_);
#endif
}
#if defined(SIMDE_ARM_NEON_A32V7_ENABLE_NATIVE_ALIASES)
#if defined(SIMDE_ARM_NEON_A32V7_ENABLE_NATIVE_ALIASES) || (defined(SIMDE_ENABLE_NATIVE_ALIASES) && \
defined(_GCC_ARM_NEON_H))
#undef vaddq_p8
#define vaddq_p8(a, b) simde_vaddq_p8((a), (b))
#endif
......@@ -906,7 +914,8 @@ simde_vaddq_p16(simde_poly16x8_t a, simde_poly16x8_t b) {
return simde_poly16x8_from_private(r_);
#endif
}
#if defined(SIMDE_ARM_NEON_A32V7_ENABLE_NATIVE_ALIASES)
#if defined(SIMDE_ARM_NEON_A32V7_ENABLE_NATIVE_ALIASES) || (defined(SIMDE_ENABLE_NATIVE_ALIASES) && \
defined(_GCC_ARM_NEON_H))
#undef vaddq_p16
#define vaddq_p16(a, b) simde_vaddq_p16((a), (b))
#endif
......@@ -931,7 +940,9 @@ simde_vaddq_p64(simde_poly64x2_t a, simde_poly64x2_t b) {
return simde_poly64x2_from_private(r_);
#endif
}
#if defined(SIMDE_ARM_NEON_A32V8_ENABLE_NATIVE_ALIASES)
#if defined(SIMDE_ARM_NEON_A32V8_ENABLE_NATIVE_ALIASES) || (defined(SIMDE_ENABLE_NATIVE_ALIASES) && \
!(defined(SIMDE_ARM_NEON_CRYPTO) && \
!defined(_GCC_ARM_NEON_H)))
#undef vaddq_p64
#define vaddq_p64(a, b) simde_vaddq_p64((a), (b))
#endif
......@@ -950,7 +961,9 @@ simde_vaddq_p128(simde_poly128_t a, simde_poly128_t b) {
return b ^ ((0 ^ a) & mask);
#endif
}
#if defined(SIMDE_ARM_NEON_A32V8_ENABLE_NATIVE_ALIASES)
#if defined(SIMDE_ARM_NEON_A32V8_ENABLE_NATIVE_ALIASES) || (defined(SIMDE_ENABLE_NATIVE_ALIASES) && \
!(defined(SIMDE_ARM_NEON_CRYPTO) && \
!defined(_GCC_ARM_NEON_H)))
#undef vaddq_p128
#define vaddq_p128(a, b) simde_vaddq_p128((a), (b))
#endif
......
arm/neon/aes.h
View file @ 8c421df1
......@@ -84,7 +84,8 @@ simde_vaeseq_u8(simde_uint8x16_t data, simde_uint8x16_t key) {
return simde_uint8x16_from_private(r_);
#endif
}
#if defined(SIMDE_ARM_NEON_A32V8_ENABLE_NATIVE_ALIASES)
#if defined(SIMDE_ARM_NEON_A32V8_ENABLE_NATIVE_ALIASES) || (defined(SIMDE_ENABLE_NATIVE_ALIASES) && \
!(defined(SIMDE_ARCH_ARM_AES)))
#undef vaeseq_u8
#define vaeseq_u8(data, key) simde_vaeseq_u8((data), (key))
#endif
......@@ -132,7 +133,8 @@ simde_vaesdq_u8(simde_uint8x16_t data, simde_uint8x16_t key) {
return simde_uint8x16_from_private(r_);
#endif
}
#if defined(SIMDE_ARM_NEON_A32V8_ENABLE_NATIVE_ALIASES)
#if defined(SIMDE_ARM_NEON_A32V8_ENABLE_NATIVE_ALIASES) || (defined(SIMDE_ENABLE_NATIVE_ALIASES) && \
!(defined(SIMDE_ARCH_ARM_AES)))
#undef vaesdq_u8
#define vaesdq_u8(data, key) simde_vaesdq_u8((data), (key))
#endif
......@@ -160,7 +162,8 @@ simde_vaesmcq_u8(simde_uint8x16_t data) {
return simde_uint8x16_from_private(a_);
#endif
}
#if defined(SIMDE_ARM_NEON_A32V8_ENABLE_NATIVE_ALIASES)
#if defined(SIMDE_ARM_NEON_A32V8_ENABLE_NATIVE_ALIASES) || (defined(SIMDE_ENABLE_NATIVE_ALIASES) && \
!(defined(SIMDE_ARCH_ARM_AES)))
#undef vaesmcq_u8
#define vaesmcq_u8(data) simde_vaesmcq_u8((data))
#endif
......@@ -207,7 +210,8 @@ simde_vaesimcq_u8(simde_uint8x16_t data) {
return simde_uint8x16_from_private(r_);
#endif
}
#if defined(SIMDE_ARM_NEON_A32V8_ENABLE_NATIVE_ALIASES)
#if defined(SIMDE_ARM_NEON_A32V8_ENABLE_NATIVE_ALIASES) || (defined(SIMDE_ENABLE_NATIVE_ALIASES) && \
!(defined(SIMDE_ARCH_ARM_AES)))
#undef vaesimcq_u8
#define vaesimcq_u8(data) simde_vaesimcq_u8((data))
#endif
......
arm/neon/bsl.h
View file @ 8c421df1
......@@ -62,7 +62,8 @@ simde_vbsl_f16(simde_uint16x4_t a, simde_float16x4_t b, simde_float16x4_t c) {
return simde_vreinterpret_f16_u16(simde_uint16x4_from_private(r_));
#endif
}
#if defined(SIMDE_ARM_NEON_A32V7_ENABLE_NATIVE_ALIASES)
#if defined(SIMDE_ARM_NEON_A32V7_ENABLE_NATIVE_ALIASES) || (defined(SIMDE_ENABLE_NATIVE_ALIASES) && \
!(defined(SIMDE_ARM_NEON_FP16)))
#undef vbsl_f16
#define vbsl_f16(a, b, c) simde_vbsl_f16((a), (b), (c))
#endif
......@@ -381,7 +382,8 @@ simde_vbslq_f16(simde_uint16x8_t a, simde_float16x8_t b, simde_float16x8_t c) {
return simde_vreinterpretq_f16_u16(simde_uint16x8_from_private(r_));
#endif
}
#if defined(SIMDE_ARM_NEON_A32V7_ENABLE_NATIVE_ALIASES)
#if defined(SIMDE_ARM_NEON_A32V7_ENABLE_NATIVE_ALIASES) || (defined(SIMDE_ENABLE_NATIVE_ALIASES) && \
!(defined(SIMDE_ARM_NEON_FP16)))
#undef vbslq_f16
#define vbslq_f16(a, b, c) simde_vbslq_f16((a), (b), (c))
#endif
......
arm/neon/cadd_rot270.h
View file @ 8c421df1
......@@ -41,8 +41,8 @@ _Pragma("clang diagnostic ignored \"-Wimplicit-float-conversion\"")
SIMDE_FUNCTION_ATTRIBUTES
simde_float16x4_t simde_vcadd_rot270_f16(simde_float16x4_t a, simde_float16x4_t b)
{
#if defined(SIMDE_ARM_NEON_A32V8_NATIVE) && SIMDE_ARCH_ARM_CHECK(8, 3) && \
(!defined(HEDLEY_GCC_VERSION) || HEDLEY_GCC_VERSION_CHECK(9, 0, 0)) && \
#if defined(SIMDE_ARM_NEON_A32V8_NATIVE) && SIMDE_ARCH_ARM_CHECK(8, 3) && \
(!defined(HEDLEY_GCC_VERSION) || HEDLEY_GCC_VERSION_CHECK(9, 0, 0)) && \
(!defined(__clang__) || SIMDE_DETECT_CLANG_VERSION_CHECK(12, 0, 0))
return vcadd_rot270_f16(a, b);
#else
......@@ -68,7 +68,10 @@ simde_float16x4_t simde_vcadd_rot270_f16(simde_float16x4_t a, simde_float16x4_t
return simde_float16x4_from_private(r_);
#endif
}
#if defined(SIMDE_ARM_NEON_A32V8_ENABLE_NATIVE_ALIASES)
#if defined(SIMDE_ARM_NEON_A32V8_ENABLE_NATIVE_ALIASES) || (defined(SIMDE_ENABLE_NATIVE_ALIASES) && \
!(SIMDE_ARCH_ARM_CHECK(8, 3) && \
(!defined(HEDLEY_GCC_VERSION) || HEDLEY_GCC_VERSION_CHECK(9, 0, 0)) && \
(!defined(__clang__) || SIMDE_DETECT_CLANG_VERSION_CHECK(12, 0, 0))))
#undef vcadd_rot270_f16
#define vcadd_rot270_f16(a, b) simde_vcadd_rot270_f16(a, b)
#endif
......@@ -104,7 +107,10 @@ simde_float16x8_t simde_vcaddq_rot270_f16(simde_float16x8_t a, simde_float16x8_t
return simde_float16x8_from_private(r_);
#endif
}
#if defined(SIMDE_ARM_NEON_A32V8_ENABLE_NATIVE_ALIASES)
#if defined(SIMDE_ARM_NEON_A32V8_ENABLE_NATIVE_ALIASES) || (defined(SIMDE_ENABLE_NATIVE_ALIASES) && \
!(SIMDE_ARCH_ARM_CHECK(8, 3) && \
(!defined(HEDLEY_GCC_VERSION) || HEDLEY_GCC_VERSION_CHECK(9, 0, 0)) && \
(!defined(__clang__) || SIMDE_DETECT_CLANG_VERSION_CHECK(12, 0, 0))))
#undef vcaddq_rot270_f16
#define vcaddq_rot270_f16(a, b) simde_vcaddq_rot270_f16(a, b)
#endif
......@@ -137,7 +143,10 @@ simde_float32x2_t simde_vcadd_rot270_f32(simde_float32x2_t a, simde_float32x2_t
return simde_float32x2_from_private(r_);
#endif
}
#if defined(SIMDE_ARM_NEON_A32V8_ENABLE_NATIVE_ALIASES)
#if defined(SIMDE_ARM_NEON_A32V8_ENABLE_NATIVE_ALIASES) || (defined(SIMDE_ENABLE_NATIVE_ALIASES) && \
!(SIMDE_ARCH_ARM_CHECK(8, 3) && \
(!defined(HEDLEY_GCC_VERSION) || HEDLEY_GCC_VERSION_CHECK(9, 0, 0)) && \
(!defined(__clang__) || SIMDE_DETECT_CLANG_VERSION_CHECK(12, 0, 0))))
#undef vcadd_rot270_f32
#define vcadd_rot270_f32(a, b) simde_vcadd_rot270_f32(a, b)
#endif
......@@ -171,7 +180,10 @@ simde_float32x4_t simde_vcaddq_rot270_f32(simde_float32x4_t a, simde_float32x4_t
return simde_float32x4_from_private(r_);
#endif
}
#if defined(SIMDE_ARM_NEON_A32V8_ENABLE_NATIVE_ALIASES)
#if defined(SIMDE_ARM_NEON_A32V8_ENABLE_NATIVE_ALIASES) || (defined(SIMDE_ENABLE_NATIVE_ALIASES) && \
!(SIMDE_ARCH_ARM_CHECK(8, 3) && \
(!defined(HEDLEY_GCC_VERSION) || HEDLEY_GCC_VERSION_CHECK(9, 0, 0)) && \
(!defined(__clang__) || SIMDE_DETECT_CLANG_VERSION_CHECK(12, 0, 0))))
#undef vcaddq_rot270_f32
#define vcaddq_rot270_f32(a, b) simde_vcaddq_rot270_f32(a, b)
#endif
......@@ -205,7 +217,10 @@ simde_float64x2_t simde_vcaddq_rot270_f64(simde_float64x2_t a, simde_float64x2_t
return simde_float64x2_from_private(r_);
#endif
}
#if defined(SIMDE_ARM_NEON_A32V8_ENABLE_NATIVE_ALIASES)
#if defined(SIMDE_ARM_NEON_A64V8_ENABLE_NATIVE_ALIASES) || (defined(SIMDE_ENABLE_NATIVE_ALIASES) && \
!(SIMDE_ARCH_ARM_CHECK(8, 3) && \
(!defined(HEDLEY_GCC_VERSION) || HEDLEY_GCC_VERSION_CHECK(9, 0, 0)) && \
(!defined(__clang__) || SIMDE_DETECT_CLANG_VERSION_CHECK(12, 0, 0))))
#undef vcaddq_rot270_f64
#define vcaddq_rot270_f64(a, b) simde_vcaddq_rot270_f64(a, b)
#endif
......
arm/neon/cadd_rot90.h
View file @ 8c421df1
......@@ -68,7 +68,10 @@ simde_float16x4_t simde_vcadd_rot90_f16(simde_float16x4_t a, simde_float16x4_t b
return simde_float16x4_from_private(r_);
#endif
}
#if defined(SIMDE_ARM_NEON_A32V8_ENABLE_NATIVE_ALIASES)
#if defined(SIMDE_ARM_NEON_A32V8_ENABLE_NATIVE_ALIASES) || (defined(SIMDE_ENABLE_NATIVE_ALIASES) && \
!(SIMDE_ARCH_ARM_CHECK(8, 3) && \
(!defined(HEDLEY_GCC_VERSION) || HEDLEY_GCC_VERSION_CHECK(9, 0, 0)) && \
(!defined(__clang__) || SIMDE_DETECT_CLANG_VERSION_CHECK(12, 0, 0))))
#undef vcadd_rot90_f16
#define vcadd_rot90_f16(a, b) simde_vcadd_rot90_f16(a, b)
#endif
......@@ -104,7 +107,10 @@ simde_float16x8_t simde_vcaddq_rot90_f16(simde_float16x8_t a, simde_float16x8_t
return simde_float16x8_from_private(r_);
#endif
}
#if defined(SIMDE_ARM_NEON_A32V8_ENABLE_NATIVE_ALIASES)
#if defined(SIMDE_ARM_NEON_A32V8_ENABLE_NATIVE_ALIASES) || (defined(SIMDE_ENABLE_NATIVE_ALIASES) && \
!(SIMDE_ARCH_ARM_CHECK(8, 3) && \
(!defined(HEDLEY_GCC_VERSION) || HEDLEY_GCC_VERSION_CHECK(9, 0, 0)) && \
(!defined(__clang__) || SIMDE_DETECT_CLANG_VERSION_CHECK(12, 0, 0))))
#undef vcaddq_rot90_f16
#define vcaddq_rot90_f16(a, b) simde_vcaddq_rot90_f16(a, b)
#endif
......@@ -137,7 +143,10 @@ simde_float32x2_t simde_vcadd_rot90_f32(simde_float32x2_t a, simde_float32x2_t b
return simde_float32x2_from_private(r_);
#endif
}
#if defined(SIMDE_ARM_NEON_A32V8_ENABLE_NATIVE_ALIASES)
#if defined(SIMDE_ARM_NEON_A32V8_ENABLE_NATIVE_ALIASES) || (defined(SIMDE_ENABLE_NATIVE_ALIASES) && \
!(SIMDE_ARCH_ARM_CHECK(8, 3) && \
(!defined(HEDLEY_GCC_VERSION) || HEDLEY_GCC_VERSION_CHECK(9, 0, 0)) && \
(!defined(__clang__) || SIMDE_DETECT_CLANG_VERSION_CHECK(12, 0, 0))))
#undef vcadd_rot90_f32
#define vcadd_rot90_f32(a, b) simde_vcadd_rot90_f32(a, b)
#endif
......@@ -171,7 +180,10 @@ simde_float32x4_t simde_vcaddq_rot90_f32(simde_float32x4_t a, simde_float32x4_t
return simde_float32x4_from_private(r_);
#endif
}
#if defined(SIMDE_ARM_NEON_A32V8_ENABLE_NATIVE_ALIASES)
#if defined(SIMDE_ARM_NEON_A32V8_ENABLE_NATIVE_ALIASES) || (defined(SIMDE_ENABLE_NATIVE_ALIASES) && \
!(SIMDE_ARCH_ARM_CHECK(8, 3) && \
(!defined(HEDLEY_GCC_VERSION) || HEDLEY_GCC_VERSION_CHECK(9, 0, 0)) && \
(!defined(__clang__) || SIMDE_DETECT_CLANG_VERSION_CHECK(12, 0, 0))))
#undef vcaddq_rot90_f32
#define vcaddq_rot90_f32(a, b) simde_vcaddq_rot90_f32(a, b)
#endif
......@@ -205,9 +217,12 @@ simde_float64x2_t simde_vcaddq_rot90_f64(simde_float64x2_t a, simde_float64x2_t
return simde_float64x2_from_private(r_);
#endif
}
#if defined(SIMDE_ARM_NEON_A32V8_ENABLE_NATIVE_ALIASES)
#undef vcaddq_rot90_f64
#define vcaddq_rot90_f64(a, b) simde_vcaddq_rot90_f64(a, b)
#if defined(SIMDE_ARM_NEON_A64V8_ENABLE_NATIVE_ALIASES) || (defined(SIMDE_ENABLE_NATIVE_ALIASES) && \
!(SIMDE_ARCH_ARM_CHECK(8, 3) && \
(!defined(HEDLEY_GCC_VERSION) || HEDLEY_GCC_VERSION_CHECK(9, 0, 0)) && \
(!defined(__clang__) || SIMDE_DETECT_CLANG_VERSION_CHECK(12, 0, 0))))
#undef vcaddq_rot90_f64
#define vcaddq_rot90_f64(a, b) simde_vcaddq_rot90_f64(a, b)
#endif
SIMDE_END_DECLS_
......
arm/neon/cage.h
View file @ 8c421df1
......@@ -47,7 +47,8 @@ simde_vcageh_f16(simde_float16_t a, simde_float16_t b) {
return (simde_math_fabsf(a_) >= simde_math_fabsf(b_)) ? UINT16_MAX : UINT16_C(0);
#endif
}
#if defined(SIMDE_ARM_NEON_A64V8_ENABLE_NATIVE_ALIASES)
#if defined(SIMDE_ARM_NEON_A64V8_ENABLE_NATIVE_ALIASES) || (defined(SIMDE_ENABLE_NATIVE_ALIASES) && \
!(defined(SIMDE_ARM_NEON_FP16)))
#undef vcageh_f16
#define vcageh_f16(a, b) simde_vcageh_f16((a), (b))
#endif
......@@ -99,7 +100,8 @@ simde_vcage_f16(simde_float16x4_t a, simde_float16x4_t b) {
return simde_uint16x4_from_private(r_);
#endif
}
#if defined(SIMDE_ARM_NEON_A32V8_ENABLE_NATIVE_ALIASES)
#if defined(SIMDE_ARM_NEON_A32V8_ENABLE_NATIVE_ALIASES) || (defined(SIMDE_ENABLE_NATIVE_ALIASES) && \
!(defined(SIMDE_ARM_NEON_FP16)))
#undef vcage_f16
#define vcage_f16(a, b) simde_vcage_f16((a), (b))
#endif
......@@ -150,7 +152,8 @@ simde_vcageq_f16(simde_float16x8_t a, simde_float16x8_t b) {
return simde_uint16x8_from_private(r_);
#endif
}
#if defined(SIMDE_ARM_NEON_A32V8_ENABLE_NATIVE_ALIASES)
#if defined(SIMDE_ARM_NEON_A32V8_ENABLE_NATIVE_ALIASES) || (defined(SIMDE_ENABLE_NATIVE_ALIASES) && \
!(defined(SIMDE_ARM_NEON_FP16)))
#undef vcageq_f16
#define vcageq_f16(a, b) simde_vcageq_f16((a), (b))
#endif
......
arm/neon/cagt.h
View file @ 8c421df1
......@@ -48,7 +48,8 @@ simde_vcagth_f16(simde_float16_t a, simde_float16_t b) {
return (simde_math_fabsf(af) > simde_math_fabsf(bf)) ? UINT16_MAX : UINT16_C(0);
#endif
}
#if defined(SIMDE_ARM_NEON_A64V8_ENABLE_NATIVE_ALIASES)
#if defined(SIMDE_ARM_NEON_A64V8_ENABLE_NATIVE_ALIASES) || (defined(SIMDE_ENABLE_NATIVE_ALIASES) && \
!(defined(SIMDE_ARM_NEON_FP16)))
#undef vcagth_f16
#define vcagth_f16(a, b) simde_vcagth_f16((a), (b))
#endif
......@@ -99,7 +100,8 @@ simde_vcagt_f16(simde_float16x4_t a, simde_float16x4_t b) {
return simde_uint16x4_from_private(r_);
#endif
}
#if defined(SIMDE_ARM_NEON_A32V8_ENABLE_NATIVE_ALIASES)
#if defined(SIMDE_ARM_NEON_A32V8_ENABLE_NATIVE_ALIASES) || (defined(SIMDE_ENABLE_NATIVE_ALIASES) && \
!(defined(SIMDE_ARM_NEON_FP16)))
#undef vcagt_f16
#define vcagt_f16(a, b) simde_vcagt_f16((a), (b))
#endif
......@@ -150,7 +152,8 @@ simde_vcagtq_f16(simde_float16x8_t a, simde_float16x8_t b) {
return simde_uint16x8_from_private(r_);
#endif
}
#if defined(SIMDE_ARM_NEON_A32V8_ENABLE_NATIVE_ALIASES)
#if defined(SIMDE_ARM_NEON_A32V8_ENABLE_NATIVE_ALIASES) || (defined(SIMDE_ENABLE_NATIVE_ALIASES) && \
!(defined(SIMDE_ARM_NEON_FP16)))
#undef vcagtq_f16
#define vcagtq_f16(a, b) simde_vcagtq_f16((a), (b))
#endif
......
arm/neon/cale.h
View file @ 8c421df1
......@@ -42,7 +42,8 @@ simde_vcaleh_f16(simde_float16_t a, simde_float16_t b) {
return simde_vcageh_f16(b, a);
#endif
}
#if defined(SIMDE_ARM_NEON_A64V8_ENABLE_NATIVE_ALIASES)
#if defined(SIMDE_ARM_NEON_A64V8_ENABLE_NATIVE_ALIASES) || (defined(SIMDE_ENABLE_NATIVE_ALIASES) && \
!(defined(SIMDE_ARM_NEON_FP16)))
#undef vcaleh_f16
#define vcaleh_f16(a, b) simde_vcaleh_f16((a), (b))
#endif
......@@ -84,7 +85,8 @@ simde_vcale_f16(simde_float16x4_t a, simde_float16x4_t b) {
return simde_vcage_f16(b, a);
#endif
}
#if defined(SIMDE_ARM_NEON_A32V8_ENABLE_NATIVE_ALIASES)
#if defined(SIMDE_ARM_NEON_A32V8_ENABLE_NATIVE_ALIASES) || (defined(SIMDE_ENABLE_NATIVE_ALIASES) && \
!(defined(SIMDE_ARM_NEON_FP16)))
#undef vcale_f16
#define vcale_f16(a, b) simde_vcale_f16((a), (b))
#endif
......@@ -126,7 +128,8 @@ simde_vcaleq_f16(simde_float16x8_t a, simde_float16x8_t b) {
return simde_vcageq_f16(b, a);
#endif
}
#if defined(SIMDE_ARM_NEON_A32V8_ENABLE_NATIVE_ALIASES)
#if defined(SIMDE_ARM_NEON_A32V8_ENABLE_NATIVE_ALIASES) || (defined(SIMDE_ENABLE_NATIVE_ALIASES) && \
!(defined(SIMDE_ARM_NEON_FP16)))
#undef vcaleq_f16
#define vcaleq_f16(a, b) simde_vcaleq_f16((a), (b))
#endif
......
arm/neon/calt.h
View file @ 8c421df1
......@@ -42,7 +42,8 @@ simde_vcalth_f16(simde_float16_t a, simde_float16_t b) {
return simde_vcagth_f16(b, a);
#endif
}
#if defined(SIMDE_ARM_NEON_A64V8_ENABLE_NATIVE_ALIASES)
#if defined(SIMDE_ARM_NEON_A64V8_ENABLE_NATIVE_ALIASES) || (defined(SIMDE_ENABLE_NATIVE_ALIASES) && \
!(defined(SIMDE_ARM_NEON_FP16)))
#undef vcalth_f16
#define vcalth_f16(a, b) simde_vcalth_f16((a), (b))
#endif
......@@ -84,7 +85,8 @@ simde_vcalt_f16(simde_float16x4_t a, simde_float16x4_t b) {
return simde_vcagt_f16(b, a);
#endif
}
#if defined(SIMDE_ARM_NEON_A32V8_ENABLE_NATIVE_ALIASES)
#if defined(SIMDE_ARM_NEON_A32V8_ENABLE_NATIVE_ALIASES) || (defined(SIMDE_ENABLE_NATIVE_ALIASES) && \
!(defined(SIMDE_ARM_NEON_FP16)))
#undef vcalt_f16
#define vcalt_f16(a, b) simde_vcalt_f16((a), (b))
#endif
......@@ -126,7 +128,8 @@ simde_vcaltq_f16(simde_float16x8_t a, simde_float16x8_t b) {
return simde_vcagtq_f16(b, a);
#endif
}
#if defined(SIMDE_ARM_NEON_A32V8_ENABLE_NATIVE_ALIASES)
#if defined(SIMDE_ARM_NEON_A32V8_ENABLE_NATIVE_ALIASES) || (defined(SIMDE_ENABLE_NATIVE_ALIASES) && \
!(defined(SIMDE_ARM_NEON_FP16)))
#undef vcaltq_f16
#define vcaltq_f16(a, b) simde_vcaltq_f16((a), (b))
#endif
......
arm/neon/ceq.h
View file @ 8c421df1
......@@ -43,7 +43,8 @@ simde_vceqh_f16(simde_float16_t a, simde_float16_t b) {
return (simde_float16_to_float32(a) == simde_float16_to_float32(b)) ? UINT16_MAX : UINT16_C(0);
#endif
}
#if defined(SIMDE_ARM_NEON_A64V8_ENABLE_NATIVE_ALIASES)
#if defined(SIMDE_ARM_NEON_A64V8_ENABLE_NATIVE_ALIASES) || (defined(SIMDE_ENABLE_NATIVE_ALIASES) && \
!(defined(SIMDE_ARM_NEON_FP16)))
#undef vceqh_f16
#define vceqh_f16(a, b) simde_vceqh_f16((a), (b))
#endif
......@@ -122,7 +123,8 @@ simde_vceq_f16(simde_float16x4_t a, simde_float16x4_t b) {
return simde_uint16x4_from_private(r_);
#endif
}
#if defined(SIMDE_ARM_NEON_A32V8_ENABLE_NATIVE_ALIASES)
#if defined(SIMDE_ARM_NEON_A32V8_ENABLE_NATIVE_ALIASES) || (defined(SIMDE_ENABLE_NATIVE_ALIASES) && \
!(defined(SIMDE_ARM_NEON_FP16)))
#undef vceq_f16
#define vceq_f16(a, b) simde_vceq_f16((a), (b))
#endif
......@@ -432,7 +434,8 @@ simde_vceqq_f16(simde_float16x8_t a, simde_float16x8_t b) {
return simde_uint16x8_from_private(r_);
#endif
}
#if defined(SIMDE_ARM_NEON_A32V8_ENABLE_NATIVE_ALIASES)
#if defined(SIMDE_ARM_NEON_A32V8_ENABLE_NATIVE_ALIASES) || (defined(SIMDE_ENABLE_NATIVE_ALIASES) && \
!(defined(SIMDE_ARM_NEON_FP16)))
#undef vceqq_f16
#define vceqq_f16(a, b) simde_vceqq_f16((a), (b))
#endif
......
arm/neon/ceqz.h
View file @ 8c421df1
......@@ -47,7 +47,8 @@ simde_vceqz_f16(simde_float16x4_t a) {
return simde_vceq_f16(a, simde_vdup_n_f16(SIMDE_FLOAT16_VALUE(0.0)));
#endif
}
#if defined(SIMDE_ARM_NEON_A32V8_ENABLE_NATIVE_ALIASES)
#if defined(SIMDE_ARM_NEON_A32V8_ENABLE_NATIVE_ALIASES) || (defined(SIMDE_ENABLE_NATIVE_ALIASES) && \
!(defined(SIMDE_ARM_NEON_FP16)))
#undef vceqz_f16
#define vceqz_f16(a) simde_vceqz_f16((a))
#endif
......@@ -201,7 +202,8 @@ simde_vceqzq_f16(simde_float16x8_t a) {
return simde_vceqq_f16(a, simde_vdupq_n_f16(SIMDE_FLOAT16_VALUE(0.0)));
#endif
}
#if defined(SIMDE_ARM_NEON_A32V8_ENABLE_NATIVE_ALIASES)
#if defined(SIMDE_ARM_NEON_A32V8_ENABLE_NATIVE_ALIASES) || (defined(SIMDE_ENABLE_NATIVE_ALIASES) && \
!(defined(SIMDE_ARM_NEON_FP16)))
#undef vceqzq_f16
#define vceqzq_f16(a) simde_vceqzq_f16((a))
#endif
......@@ -383,7 +385,8 @@ simde_vceqzh_f16(simde_float16_t a) {
return simde_vceqh_f16(a, SIMDE_FLOAT16_VALUE(0.0));
#endif
}
#if defined(SIMDE_ARM_NEON_A64V8_ENABLE_NATIVE_ALIASES)
#if defined(SIMDE_ARM_NEON_A64V8_ENABLE_NATIVE_ALIASES) || (defined(SIMDE_ENABLE_NATIVE_ALIASES) && \
!(defined(SIMDE_ARM_NEON_FP16)))
#undef vceqzh_f16
#define vceqzh_f16(a) simde_vceqzh_f16((a))
#endif
......
arm/neon/cge.h
View file @ 8c421df1
......@@ -44,7 +44,8 @@ simde_vcgeh_f16(simde_float16_t a, simde_float16_t b){
return (simde_float16_to_float32(a) >= simde_float16_to_float32(b)) ? UINT16_MAX : 0;
#endif
}
#if defined(SIMDE_ARM_NEON_A64V8_ENABLE_NATIVE_ALIASES)
#if defined(SIMDE_ARM_NEON_A64V8_ENABLE_NATIVE_ALIASES) || (defined(SIMDE_ENABLE_NATIVE_ALIASES) && \
!(defined(SIMDE_ARM_NEON_FP16)))
#undef vcgeh_f16
#define vcgeh_f16(a, b) simde_vcgeh_f16((a), (b))
#endif
......@@ -74,7 +75,8 @@ simde_vcgeq_f16(simde_float16x8_t a, simde_float16x8_t b) {
return simde_uint16x8_from_private(r_);
#endif
}
#if defined(SIMDE_ARM_NEON_A32V8_ENABLE_NATIVE_ALIASES)
#if defined(SIMDE_ARM_NEON_A32V8_ENABLE_NATIVE_ALIASES) || (defined(SIMDE_ENABLE_NATIVE_ALIASES) && \
!(defined(SIMDE_ARM_NEON_FP16)))
#undef vcgeq_f16
#define vcgeq_f16(a, b) simde_vcgeq_f16((a), (b))
#endif
......@@ -508,7 +510,8 @@ simde_vcge_f16(simde_float16x4_t a, simde_float16x4_t b) {
return simde_uint16x4_from_private(r_);
#endif
}
#if defined(SIMDE_ARM_NEON_A32V8_ENABLE_NATIVE_ALIASES)
#if defined(SIMDE_ARM_NEON_A32V8_ENABLE_NATIVE_ALIASES) || (defined(SIMDE_ENABLE_NATIVE_ALIASES) && \
!(defined(SIMDE_ARM_NEON_FP16)))
#undef vcge_f16
#define vcge_f16(a, b) simde_vcge_f16((a), (b))
#endif
......
arm/neon/cgez.h
View file @ 8c421df1
......@@ -88,7 +88,8 @@ simde_vcgezh_f16(simde_float16_t a) {
return (simde_float16_to_float32(a) >= SIMDE_FLOAT32_C(0.0)) ? UINT16_MAX : 0;
#endif
}
#if defined(SIMDE_ARM_NEON_A64V8_ENABLE_NATIVE_ALIASES)
#if defined(SIMDE_ARM_NEON_A64V8_ENABLE_NATIVE_ALIASES) || (defined(SIMDE_ENABLE_NATIVE_ALIASES) && \
!(defined(SIMDE_ARM_NEON_FP16)))
#undef vcgezh_f16
#define vcgezh_f16(a) simde_vcgezh_f16(a)
#endif
......@@ -110,7 +111,8 @@ simde_vcgezq_f16(simde_float16x8_t a) {
return simde_uint16x8_from_private(r_);
#endif
}
#if defined(SIMDE_ARM_NEON_A32V8_ENABLE_NATIVE_ALIASES)
#if defined(SIMDE_ARM_NEON_A32V8_ENABLE_NATIVE_ALIASES) || (defined(SIMDE_ENABLE_NATIVE_ALIASES) && \
!(defined(SIMDE_ARM_NEON_FP16)))
#undef vcgezq_f16
#define vcgezq_f16(a) simde_vcgezq_f16(a)
#endif
......@@ -300,7 +302,8 @@ simde_vcgez_f16(simde_float16x4_t a) {
return simde_uint16x4_from_private(r_);
#endif
}
#if defined(SIMDE_ARM_NEON_A32V8_ENABLE_NATIVE_ALIASES)
#if defined(SIMDE_ARM_NEON_A32V8_ENABLE_NATIVE_ALIASES) || (defined(SIMDE_ENABLE_NATIVE_ALIASES) && \
!(defined(SIMDE_ARM_NEON_FP16)))
#undef vcgez_f16
#define vcgez_f16(a) simde_vcgez_f16(a)
#endif
......
arm/neon/cgt.h
View file @ 8c421df1
......@@ -92,7 +92,8 @@ simde_vcgth_f16(simde_float16_t a, simde_float16_t b) {
return (a_ > b_) ? UINT16_MAX : 0;
#endif
}
#if defined(SIMDE_ARM_NEON_A64V8_ENABLE_NATIVE_ALIASES)
#if defined(SIMDE_ARM_NEON_A64V8_ENABLE_NATIVE_ALIASES) || (defined(SIMDE_ENABLE_NATIVE_ALIASES) && \
!(defined(SIMDE_ARM_NEON_FP16)))
#undef vcgth_f16
#define vcgth_f16(a, b) simde_vcgth_f16((a), (b))
#endif
......@@ -136,7 +137,8 @@ simde_vcgtq_f16(simde_float16x8_t a, simde_float16x8_t b) {
return simde_uint16x8_from_private(r_);
#endif
}
#if defined(SIMDE_ARM_NEON_A32V8_ENABLE_NATIVE_ALIASES)
#if defined(SIMDE_ARM_NEON_A32V8_ENABLE_NATIVE_ALIASES) || (defined(SIMDE_ENABLE_NATIVE_ALIASES) && \
!(defined(SIMDE_ARM_NEON_FP16)))
#undef vcgtq_f16
#define vcgtq_f16(a, b) simde_vcgtq_f16((a), (b))
#endif
......@@ -556,7 +558,8 @@ simde_vcgt_f16(simde_float16x4_t a, simde_float16x4_t b) {
return simde_uint16x4_from_private(r_);
#endif
}
#if defined(SIMDE_ARM_NEON_A32V8_ENABLE_NATIVE_ALIASES)
#if defined(SIMDE_ARM_NEON_A32V8_ENABLE_NATIVE_ALIASES) || (defined(SIMDE_ENABLE_NATIVE_ALIASES) && \
!(defined(SIMDE_ARM_NEON_FP16)))
#undef vcgt_f16
#define vcgt_f16(a, b) simde_vcgt_f16((a), (b))
#endif
......
arm/neon/cgtz.h
View file @ 8c421df1
......@@ -76,7 +76,8 @@ simde_vcgtzh_f16(simde_float16_t a) {
return (simde_float16_to_float32(a) > SIMDE_FLOAT32_C(0.0)) ? UINT16_MAX : 0;
#endif
}
#if defined(SIMDE_ARM_NEON_A64V8_ENABLE_NATIVE_ALIASES)
#if defined(SIMDE_ARM_NEON_A64V8_ENABLE_NATIVE_ALIASES) || (defined(SIMDE_ENABLE_NATIVE_ALIASES) && \
!(defined(SIMDE_ARM_NEON_FP16)))
#undef vcgtzh_f16
#define vcgtzh_f16(a) simde_vcgtzh_f16(a)
#endif
......@@ -98,7 +99,8 @@ simde_vcgtzq_f16(simde_float16x8_t a) {
return simde_uint16x8_from_private(r_);
#endif
}
#if defined(SIMDE_ARM_NEON_A32V8_ENABLE_NATIVE_ALIASES)
#if defined(SIMDE_ARM_NEON_A32V8_ENABLE_NATIVE_ALIASES) || (defined(SIMDE_ENABLE_NATIVE_ALIASES) && \
!(defined(SIMDE_ARM_NEON_FP16)))
#undef vcgtzq_f16
#define vcgtzq_f16(a) simde_vcgtzq_f16(a)
#endif
......@@ -302,7 +304,8 @@ simde_vcgtz_f16(simde_float16x4_t a) {
return simde_uint16x4_from_private(r_);
#endif
}
#if defined(SIMDE_ARM_NEON_A32V8_ENABLE_NATIVE_ALIASES)
#if defined(SIMDE_ARM_NEON_A32V8_ENABLE_NATIVE_ALIASES) || (defined(SIMDE_ENABLE_NATIVE_ALIASES) && \
!(defined(SIMDE_ARM_NEON_FP16)))
#undef vcgtz_f16
#define vcgtz_f16(a) simde_vcgtz_f16(a)
#endif
......
arm/neon/cle.h
View file @ 8c421df1
......@@ -101,7 +101,8 @@ simde_vcleh_f16(simde_float16_t a, simde_float16_t b) {
return (simde_float16_to_float32(a) <= simde_float16_to_float32(b)) ? UINT16_MAX : 0;
#endif
}
#if defined(SIMDE_ARM_NEON_A64V8_ENABLE_NATIVE_ALIASES)
#if defined(SIMDE_ARM_NEON_A64V8_ENABLE_NATIVE_ALIASES) || (defined(SIMDE_ENABLE_NATIVE_ALIASES) && \
!(defined(SIMDE_ARM_NEON_FP16)))
#undef vcleh_f16
#define vcleh_f16(a, b) simde_vcleh_f16((a), (b))
#endif
......@@ -131,7 +132,8 @@ simde_vcleq_f16(simde_float16x8_t a, simde_float16x8_t b) {
return simde_uint16x8_from_private(r_);
#endif
}
#if defined(SIMDE_ARM_NEON_A32V8_ENABLE_NATIVE_ALIASES)
#if defined(SIMDE_ARM_NEON_A32V8_ENABLE_NATIVE_ALIASES) || (defined(SIMDE_ENABLE_NATIVE_ALIASES) && \
!(defined(SIMDE_ARM_NEON_FP16)))
#undef vcleq_f16
#define vcleq_f16(a, b) simde_vcleq_f16((a), (b))
#endif
......@@ -586,7 +588,8 @@ simde_vcle_f16(simde_float16x4_t a, simde_float16x4_t b) {
return simde_uint16x4_from_private(r_);
#endif
}
#if defined(SIMDE_ARM_NEON_A32V8_ENABLE_NATIVE_ALIASES)
#if defined(SIMDE_ARM_NEON_A32V8_ENABLE_NATIVE_ALIASES) || (defined(SIMDE_ENABLE_NATIVE_ALIASES) && \
!(defined(SIMDE_ARM_NEON_FP16)))
#undef vcle_f16
#define vcle_f16(a, b) simde_vcle_f16((a), (b))
#endif
......
arm/neon/clez.h
View file @ 8c421df1
......@@ -91,7 +91,8 @@ simde_vclezh_f16(simde_float16_t a) {
return (a_ <= 0.0f) ? UINT16_MAX : 0;
#endif
}
#if defined(SIMDE_ARM_NEON_A64V8_ENABLE_NATIVE_ALIASES)
#if defined(SIMDE_ARM_NEON_A64V8_ENABLE_NATIVE_ALIASES) || (defined(SIMDE_ENABLE_NATIVE_ALIASES) && \
!(defined(SIMDE_ARM_NEON_FP16)))
#undef vclezh_f16
#define vclezh_f16(a) simde_vclezh_f16(a)
#endif
......@@ -119,7 +120,8 @@ simde_vclezq_f16(simde_float16x8_t a) {
return simde_uint16x8_from_private(r_);
#endif
}
#if defined(SIMDE_ARM_NEON_A32V8_ENABLE_NATIVE_ALIASES)
#if defined(SIMDE_ARM_NEON_A32V8_ENABLE_NATIVE_ALIASES) || (defined(SIMDE_ENABLE_NATIVE_ALIASES) && \
!(defined(SIMDE_ARM_NEON_FP16)))
#undef vclezq_f16
#define vclezq_f16(a) simde_vclezq_f16(a)
#endif
......@@ -339,7 +341,8 @@ simde_vclez_f16(simde_float16x4_t a) {
return simde_uint16x4_from_private(r_);
#endif
}
#if defined(SIMDE_ARM_NEON_A32V8_ENABLE_NATIVE_ALIASES)
#if defined(SIMDE_ARM_NEON_A32V8_ENABLE_NATIVE_ALIASES) || (defined(SIMDE_ENABLE_NATIVE_ALIASES) && \
!(defined(SIMDE_ARM_NEON_FP16)))
#undef vclez_f16
#define vclez_f16(a) simde_vclez_f16(a)
#endif
......
arm/neon/clt.h
View file @ 8c421df1
......@@ -91,7 +91,8 @@ simde_vclth_f16(simde_float16_t a, simde_float16_t b) {
return (a_ < b_) ? UINT16_MAX : 0;
#endif
}
#if defined(SIMDE_ARM_NEON_A64V8_ENABLE_NATIVE_ALIASES)
#if defined(SIMDE_ARM_NEON_A64V8_ENABLE_NATIVE_ALIASES) || (defined(SIMDE_ENABLE_NATIVE_ALIASES) && \
!(defined(SIMDE_ARM_NEON_FP16)))
#undef vclth_f16
#define vclth_f16(a, b) simde_vclth_f16((a), (b))
#endif
......@@ -135,7 +136,8 @@ simde_vcltq_f16(simde_float16x8_t a, simde_float16x8_t b) {
return simde_uint16x8_from_private(r_);
#endif
}
#if defined(SIMDE_ARM_NEON_A32V8_ENABLE_NATIVE_ALIASES)
#if defined(SIMDE_ARM_NEON_A32V8_ENABLE_NATIVE_ALIASES) || (defined(SIMDE_ENABLE_NATIVE_ALIASES) && \
!(defined(SIMDE_ARM_NEON_FP16)))
#undef vcltq_f16
#define vcltq_f16(a, b) simde_vcltq_f16((a), (b))
#endif
......@@ -564,7 +566,8 @@ simde_vclt_f16(simde_float16x4_t a, simde_float16x4_t b) {
return simde_uint16x4_from_private(r_);
#endif
}
#if defined(SIMDE_ARM_NEON_A32V8_ENABLE_NATIVE_ALIASES)
#if defined(SIMDE_ARM_NEON_A32V8_ENABLE_NATIVE_ALIASES) || (defined(SIMDE_ENABLE_NATIVE_ALIASES) && \
!(defined(SIMDE_ARM_NEON_FP16)))
#undef vclt_f16
#define vclt_f16(a, b) simde_vclt_f16((a), (b))
#endif
......
arm/neon/cltz.h
View file @ 8c421df1
......@@ -91,7 +91,8 @@ simde_vcltzh_f16(simde_float16_t a) {
return (simde_float16_to_float32(a) < SIMDE_FLOAT32_C(0.0)) ? UINT16_MAX : 0;
#endif
}
#if defined(SIMDE_ARM_NEON_A64V8_ENABLE_NATIVE_ALIASES)
#if defined(SIMDE_ARM_NEON_A64V8_ENABLE_NATIVE_ALIASES) || (defined(SIMDE_ENABLE_NATIVE_ALIASES) && \
!(defined(SIMDE_ARM_NEON_FP16)))
#undef vcltzh_f16
#define vcltzh_f16(a) simde_vcltzh_f16(a)
#endif
......@@ -113,7 +114,8 @@ simde_vcltz_f16(simde_float16x4_t a) {
return simde_uint16x4_from_private(r_);
#endif
}
#if defined(SIMDE_ARM_NEON_A32V7_ENABLE_NATIVE_ALIASES)
#if defined(SIMDE_ARM_NEON_A32V8_ENABLE_NATIVE_ALIASES) || (defined(SIMDE_ENABLE_NATIVE_ALIASES) && \
!(defined(SIMDE_ARM_NEON_FP16)))
#undef vcltz_f16
#define vcltz_f16(a) simde_vcltz_f16(a)
#endif
......@@ -255,7 +257,8 @@ simde_vcltzq_f16(simde_float16x8_t a) {
return simde_uint16x8_from_private(r_);
#endif
}
#if defined(SIMDE_ARM_NEON_A32V8_ENABLE_NATIVE_ALIASES)
#if defined(SIMDE_ARM_NEON_A32V8_ENABLE_NATIVE_ALIASES) || (defined(SIMDE_ENABLE_NATIVE_ALIASES) && \
!(defined(SIMDE_ARM_NEON_FP16)))
#undef vcltzq_f16
#define vcltzq_f16(a) simde_vcltzq_f16(a)
#endif
......
arm/neon/cmla.h
View file @ 8c421df1
......@@ -63,7 +63,11 @@ simde_vcmla_f16(simde_float16x4_t r, simde_float16x4_t a, simde_float16x4_t b) {
return simde_float16x4_from_private(r_);
#endif
}
#if defined(SIMDE_ARM_NEON_A32V8_ENABLE_NATIVE_ALIASES)
#if defined(SIMDE_ARM_NEON_A32V8_ENABLE_NATIVE_ALIASES) || (defined(SIMDE_ENABLE_NATIVE_ALIASES) && \
!(SIMDE_ARCH_ARM_CHECK(8,3) && \
(!defined(HEDLEY_GCC_VERSION) || HEDLEY_GCC_VERSION_CHECK(8,5,0)) && \
(!defined(__clang__) || SIMDE_DETECT_CLANG_VERSION_CHECK(12,0,0)) && \
defined(SIMDE_ARM_NEON_FP16) && defined(SIMDE_ARCH_ARM_COMPLEX)))
#undef vcmla_f16
#define vcmla_f16(r, a, b) simde_vcmla_f16(r, a, b)
#endif
......@@ -95,7 +99,11 @@ simde_vcmla_f32(simde_float32x2_t r, simde_float32x2_t a, simde_float32x2_t b) {
return simde_float32x2_from_private(r_);
#endif
}
#if defined(SIMDE_ARM_NEON_A32V8_ENABLE_NATIVE_ALIASES)
#if defined(SIMDE_ARM_NEON_A32V8_ENABLE_NATIVE_ALIASES) || (defined(SIMDE_ENABLE_NATIVE_ALIASES) && \
!(SIMDE_ARCH_ARM_CHECK(8,3) && \
(!defined(HEDLEY_GCC_VERSION) || HEDLEY_GCC_VERSION_CHECK(9,0,0)) && \
(!defined(__clang__) || SIMDE_DETECT_CLANG_VERSION_CHECK(12,0,0)) && \
defined(SIMDE_ARCH_ARM_COMPLEX)))
#undef vcmla_f32
#define vcmla_f32(r, a, b) simde_vcmla_f32(r, a, b)
#endif
......@@ -129,7 +137,11 @@ simde_vcmlaq_f16(simde_float16x8_t r, simde_float16x8_t a, simde_float16x8_t b)
return simde_float16x8_from_private(r_);
#endif
}
#if defined(SIMDE_ARM_NEON_A32V8_ENABLE_NATIVE_ALIASES)
#if defined(SIMDE_ARM_NEON_A32V8_ENABLE_NATIVE_ALIASES) || (defined(SIMDE_ENABLE_NATIVE_ALIASES) && \
!(SIMDE_ARCH_ARM_CHECK(8,3) && \
(!defined(HEDLEY_GCC_VERSION) || HEDLEY_GCC_VERSION_CHECK(8,5,0)) && \
(!defined(__clang__) || SIMDE_DETECT_CLANG_VERSION_CHECK(12,0,0)) && \
defined(SIMDE_ARM_NEON_FP16) && defined(SIMDE_ARCH_ARM_COMPLEX)))
#undef vcmlaq_f16
#define vcmlaq_f16(r, a, b) simde_vcmlaq_f16(r, a, b)
#endif
......@@ -163,7 +175,11 @@ simde_vcmlaq_f32(simde_float32x4_t r, simde_float32x4_t a, simde_float32x4_t b)
return simde_float32x4_from_private(r_);
#endif
}
#if defined(SIMDE_ARM_NEON_A32V8_ENABLE_NATIVE_ALIASES)
#if defined(SIMDE_ARM_NEON_A32V8_ENABLE_NATIVE_ALIASES) || (defined(SIMDE_ENABLE_NATIVE_ALIASES) && \
!(SIMDE_ARCH_ARM_CHECK(8,3) && \
(!defined(HEDLEY_GCC_VERSION) || HEDLEY_GCC_VERSION_CHECK(9,0,0)) && \
(!defined(__clang__) || SIMDE_DETECT_CLANG_VERSION_CHECK(12,0,0)) && \
defined(SIMDE_ARCH_ARM_COMPLEX)))
#undef vcmlaq_f32
#define vcmlaq_f32(r, a, b) simde_vcmlaq_f32(r, a, b)
#endif
......@@ -197,7 +213,11 @@ simde_vcmlaq_f64(simde_float64x2_t r, simde_float64x2_t a, simde_float64x2_t b)
return simde_float64x2_from_private(r_);
#endif
}
#if defined(SIMDE_ARM_NEON_A32V8_ENABLE_NATIVE_ALIASES)
#if defined(SIMDE_ARM_NEON_A32V8_ENABLE_NATIVE_ALIASES) || (defined(SIMDE_ENABLE_NATIVE_ALIASES) && \
!(SIMDE_ARCH_ARM_CHECK(8,3) && \
(!defined(HEDLEY_GCC_VERSION) || HEDLEY_GCC_VERSION_CHECK(9,0,0)) && \
(!defined(__clang__) || SIMDE_DETECT_CLANG_VERSION_CHECK(12,0,0)) && \
defined(SIMDE_ARCH_ARM_COMPLEX)))
#undef vcmlaq_f64
#define vcmlaq_f64(r, a, b) simde_vcmlaq_f64(r, a, b)
#endif
......
arm/neon/cmla_lane.h
View file @ 8c421df1
This diff is collapsed.
arm/neon/cmla_rot180.h
View file @ 8c421df1
......@@ -63,7 +63,11 @@ simde_vcmla_rot180_f16(simde_float16x4_t r, simde_float16x4_t a, simde_float16x4
return simde_float16x4_from_private(r_);
#endif
}
#if defined(SIMDE_ARM_NEON_A32V8_ENABLE_NATIVE_ALIASES)
#if defined(SIMDE_ARM_NEON_A32V8_ENABLE_NATIVE_ALIASES) || (defined(SIMDE_ENABLE_NATIVE_ALIASES) && \
!(SIMDE_ARCH_ARM_CHECK(8,3) && \
(!defined(HEDLEY_GCC_VERSION) || HEDLEY_GCC_VERSION_CHECK(8,5,0)) && \
(!defined(__clang__) || SIMDE_DETECT_CLANG_VERSION_CHECK(12,0,0)) && \
defined(SIMDE_ARM_NEON_FP16) && defined(SIMDE_ARCH_ARM_COMPLEX)))
#undef vcmla_rot180_f16
#define vcmla_rot180_f16(r, a, b) simde_vcmla_rot180_f16(r, a, b)
#endif
......@@ -97,7 +101,11 @@ simde_vcmlaq_rot180_f16(simde_float16x8_t r, simde_float16x8_t a, simde_float16x
return simde_float16x8_from_private(r_);
#endif
}
#if defined(SIMDE_ARM_NEON_A32V8_ENABLE_NATIVE_ALIASES)
#if defined(SIMDE_ARM_NEON_A32V8_ENABLE_NATIVE_ALIASES) || (defined(SIMDE_ENABLE_NATIVE_ALIASES) && \
!(SIMDE_ARCH_ARM_CHECK(8,3) && \
(!defined(HEDLEY_GCC_VERSION) || HEDLEY_GCC_VERSION_CHECK(8,5,0)) && \
(!defined(__clang__) || SIMDE_DETECT_CLANG_VERSION_CHECK(12,0,0)) && \
defined(SIMDE_ARM_NEON_FP16) && defined(SIMDE_ARCH_ARM_COMPLEX)))
#undef vcmlaq_rot180_f16
#define vcmlaq_rot180_f16(r, a, b) simde_vcmlaq_rot180_f16(r, a, b)
#endif
......@@ -132,7 +140,11 @@ simde_vcmla_rot180_f32(simde_float32x2_t r, simde_float32x2_t a, simde_float32x2
return simde_float32x2_from_private(r_);
#endif
}
#if defined(SIMDE_ARM_NEON_A32V8_ENABLE_NATIVE_ALIASES)
#if defined(SIMDE_ARM_NEON_A32V8_ENABLE_NATIVE_ALIASES) || (defined(SIMDE_ENABLE_NATIVE_ALIASES) && \
!(SIMDE_ARCH_ARM_CHECK(8,3) && \
(!defined(HEDLEY_GCC_VERSION) || HEDLEY_GCC_VERSION_CHECK(9,0,0)) && \
(!defined(__clang__) || SIMDE_DETECT_CLANG_VERSION_CHECK(12,0,0)) && \
defined(SIMDE_ARCH_ARM_COMPLEX)))
#undef vcmla_rot180_f32
#define vcmla_rot180_f32(r, a, b) simde_vcmla_rot180_f32(r, a, b)
#endif
......@@ -170,7 +182,11 @@ simde_vcmlaq_rot180_f32(simde_float32x4_t r, simde_float32x4_t a, simde_float32x
return simde_float32x4_from_private(r_);
#endif
}
#if defined(SIMDE_ARM_NEON_A32V8_ENABLE_NATIVE_ALIASES)
#if defined(SIMDE_ARM_NEON_A32V8_ENABLE_NATIVE_ALIASES) || (defined(SIMDE_ENABLE_NATIVE_ALIASES) && \
!(SIMDE_ARCH_ARM_CHECK(8,3) && \
(!defined(HEDLEY_GCC_VERSION) || HEDLEY_GCC_VERSION_CHECK(9,0,0)) && \
(!defined(__clang__) || SIMDE_DETECT_CLANG_VERSION_CHECK(12,0,0)) && \
defined(SIMDE_ARCH_ARM_COMPLEX)))
#undef vcmlaq_rot180_f32
#define vcmlaq_rot180_f32(r, a, b) simde_vcmlaq_rot180_f32(r, a, b)
#endif
......@@ -208,7 +224,11 @@ simde_vcmlaq_rot180_f64(simde_float64x2_t r, simde_float64x2_t a, simde_float64x
return simde_float64x2_from_private(r_);
#endif
}
#if defined(SIMDE_ARM_NEON_A32V8_ENABLE_NATIVE_ALIASES)
#if defined(SIMDE_ARM_NEON_A64V8_ENABLE_NATIVE_ALIASES) || (defined(SIMDE_ENABLE_NATIVE_ALIASES) && \
!(SIMDE_ARCH_ARM_CHECK(8,3) && \
(!defined(HEDLEY_GCC_VERSION) || HEDLEY_GCC_VERSION_CHECK(9,0,0)) && \
(!defined(__clang__) || SIMDE_DETECT_CLANG_VERSION_CHECK(12,0,0)) && \
defined(SIMDE_ARCH_ARM_COMPLEX)))
#undef vcmlaq_rot180_f64
#define vcmlaq_rot180_f64(r, a, b) simde_vcmlaq_rot180_f64(r, a, b)
#endif
......
arm/neon/cmla_rot180_lane.h
View file @ 8c421df1
This diff is collapsed.
arm/neon/cmla_rot270.h
View file @ 8c421df1
......@@ -63,7 +63,11 @@ simde_vcmla_rot270_f16(simde_float16x4_t r, simde_float16x4_t a, simde_float16x4
return simde_float16x4_from_private(r_);
#endif
}
#if defined(SIMDE_ARM_NEON_A32V8_ENABLE_NATIVE_ALIASES)
#if defined(SIMDE_ARM_NEON_A32V8_ENABLE_NATIVE_ALIASES) || (defined(SIMDE_ENABLE_NATIVE_ALIASES) && \
!(SIMDE_ARCH_ARM_CHECK(8,3) && \
(!defined(HEDLEY_GCC_VERSION) || HEDLEY_GCC_VERSION_CHECK(8,5,0)) && \
(!defined(__clang__) || SIMDE_DETECT_CLANG_VERSION_CHECK(12,0,0)) && \
defined(SIMDE_ARM_NEON_FP16) && defined(SIMDE_ARCH_ARM_COMPLEX)))
#undef vcmla_rot270_f16
#define vcmla_rot270_f16(r, a, b) simde_vcmla_rot270_f16(r, a, b)
#endif
......@@ -97,7 +101,11 @@ simde_vcmlaq_rot270_f16(simde_float16x8_t r, simde_float16x8_t a, simde_float16x
return simde_float16x8_from_private(r_);
#endif
}
#if defined(SIMDE_ARM_NEON_A32V8_ENABLE_NATIVE_ALIASES)
#if defined(SIMDE_ARM_NEON_A32V8_ENABLE_NATIVE_ALIASES) || (defined(SIMDE_ENABLE_NATIVE_ALIASES) && \
!(SIMDE_ARCH_ARM_CHECK(8,3) && \
(!defined(HEDLEY_GCC_VERSION) || HEDLEY_GCC_VERSION_CHECK(8,5,0)) && \
(!defined(__clang__) || SIMDE_DETECT_CLANG_VERSION_CHECK(12,0,0)) && \
defined(SIMDE_ARM_NEON_FP16) && defined(SIMDE_ARCH_ARM_COMPLEX)))
#undef vcmlaq_rot270_f16
#define vcmlaq_rot270_f16(r, a, b) simde_vcmlaq_rot270_f16(r, a, b)
#endif
......@@ -131,7 +139,11 @@ simde_vcmla_rot270_f32(simde_float32x2_t r, simde_float32x2_t a, simde_float32x2
return simde_float32x2_from_private(r_);
#endif
}
#if defined(SIMDE_ARM_NEON_A32V8_ENABLE_NATIVE_ALIASES)
#if defined(SIMDE_ARM_NEON_A32V8_ENABLE_NATIVE_ALIASES) || (defined(SIMDE_ENABLE_NATIVE_ALIASES) && \
!(SIMDE_ARCH_ARM_CHECK(8,3) && \
(!defined(HEDLEY_GCC_VERSION) || HEDLEY_GCC_VERSION_CHECK(9,0,0)) && \
(!defined(__clang__) || SIMDE_DETECT_CLANG_VERSION_CHECK(12,0,0)) && \
defined(SIMDE_ARCH_ARM_COMPLEX)))
#undef vcmla_rot270_f32
#define vcmla_rot270_f32(r, a, b) simde_vcmla_rot270_f32(r, a, b)
#endif
......@@ -169,7 +181,11 @@ simde_vcmlaq_rot270_f32(simde_float32x4_t r, simde_float32x4_t a, simde_float32x
return simde_float32x4_from_private(r_);
#endif
}
#if defined(SIMDE_ARM_NEON_A32V8_ENABLE_NATIVE_ALIASES)
#if defined(SIMDE_ARM_NEON_A32V8_ENABLE_NATIVE_ALIASES) || (defined(SIMDE_ENABLE_NATIVE_ALIASES) && \
!(SIMDE_ARCH_ARM_CHECK(8,3) && \
(!defined(HEDLEY_GCC_VERSION) || HEDLEY_GCC_VERSION_CHECK(9,0,0)) && \
(!defined(__clang__) || SIMDE_DETECT_CLANG_VERSION_CHECK(12,0,0)) && \
defined(SIMDE_ARCH_ARM_COMPLEX)))
#undef vcmlaq_rot270_f32
#define vcmlaq_rot270_f32(r, a, b) simde_vcmlaq_rot270_f32(r, a, b)
#endif
......@@ -207,7 +223,11 @@ simde_vcmlaq_rot270_f64(simde_float64x2_t r, simde_float64x2_t a, simde_float64x
return simde_float64x2_from_private(r_);
#endif
}
#if defined(SIMDE_ARM_NEON_A32V8_ENABLE_NATIVE_ALIASES)
#if defined(SIMDE_ARM_NEON_A64V8_ENABLE_NATIVE_ALIASES) || (defined(SIMDE_ENABLE_NATIVE_ALIASES) && \
!(SIMDE_ARCH_ARM_CHECK(8,3) && \
(!defined(HEDLEY_GCC_VERSION) || HEDLEY_GCC_VERSION_CHECK(9,0,0)) && \
(!defined(__clang__) || SIMDE_DETECT_CLANG_VERSION_CHECK(12,0,0)) && \
defined(SIMDE_ARCH_ARM_COMPLEX)))
#undef vcmlaq_rot270_f64
#define vcmlaq_rot270_f64(r, a, b) simde_vcmlaq_rot270_f64(r, a, b)
#endif
......
arm/neon/cmla_rot270_lane.h
View file @ 8c421df1
This diff is collapsed.
arm/neon/cmla_rot90.h
View file @ 8c421df1
......@@ -63,7 +63,11 @@ simde_vcmla_rot90_f16(simde_float16x4_t r, simde_float16x4_t a, simde_float16x4_
return simde_float16x4_from_private(r_);
#endif
}
#if defined(SIMDE_ARM_NEON_A32V8_ENABLE_NATIVE_ALIASES)
#if defined(SIMDE_ARM_NEON_A32V8_ENABLE_NATIVE_ALIASES) || (defined(SIMDE_ENABLE_NATIVE_ALIASES) && \
!(SIMDE_ARCH_ARM_CHECK(8,3) && \
(!defined(HEDLEY_GCC_VERSION) || HEDLEY_GCC_VERSION_CHECK(8,5,0)) && \
(!defined(__clang__) || SIMDE_DETECT_CLANG_VERSION_CHECK(12,0,0)) && \
defined(SIMDE_ARM_NEON_FP16) && defined(SIMDE_ARCH_ARM_COMPLEX)))
#undef vcmla_rot90_f16
#define vcmla_rot90_f16(r, a, b) simde_vcmla_rot90_f16(r, a, b)
#endif
......@@ -97,7 +101,11 @@ simde_vcmlaq_rot90_f16(simde_float16x8_t r, simde_float16x8_t a, simde_float16x8
return simde_float16x8_from_private(r_);
#endif
}
#if defined(SIMDE_ARM_NEON_A32V8_ENABLE_NATIVE_ALIASES)
#if defined(SIMDE_ARM_NEON_A32V8_ENABLE_NATIVE_ALIASES) || (defined(SIMDE_ENABLE_NATIVE_ALIASES) && \
!(SIMDE_ARCH_ARM_CHECK(8,3) && \
(!defined(HEDLEY_GCC_VERSION) || HEDLEY_GCC_VERSION_CHECK(8,5,0)) && \
(!defined(__clang__) || SIMDE_DETECT_CLANG_VERSION_CHECK(12,0,0)) && \
defined(SIMDE_ARM_NEON_FP16) && defined(SIMDE_ARCH_ARM_COMPLEX)))
#undef vcmlaq_rot90_f16
#define vcmlaq_rot90_f16(r, a, b) simde_vcmlaq_rot90_f16(r, a, b)
#endif
......@@ -131,7 +139,11 @@ simde_vcmla_rot90_f32(simde_float32x2_t r, simde_float32x2_t a, simde_float32x2_
return simde_float32x2_from_private(r_);
#endif
}
#if defined(SIMDE_ARM_NEON_A32V8_ENABLE_NATIVE_ALIASES)
#if defined(SIMDE_ARM_NEON_A32V8_ENABLE_NATIVE_ALIASES) || (defined(SIMDE_ENABLE_NATIVE_ALIASES) && \
!(SIMDE_ARCH_ARM_CHECK(8,3) && \
(!defined(HEDLEY_GCC_VERSION) || HEDLEY_GCC_VERSION_CHECK(9,0,0)) && \
(!defined(__clang__) || SIMDE_DETECT_CLANG_VERSION_CHECK(12,0,0)) && \
defined(SIMDE_ARCH_ARM_COMPLEX)))
#undef vcmla_rot90_f32
#define vcmla_rot90_f32(r, a, b) simde_vcmla_rot90_f32(r, a, b)
#endif
......@@ -169,7 +181,11 @@ simde_vcmlaq_rot90_f32(simde_float32x4_t r, simde_float32x4_t a, simde_float32x4
return simde_float32x4_from_private(r_);
#endif
}
#if defined(SIMDE_ARM_NEON_A32V8_ENABLE_NATIVE_ALIASES)
#if defined(SIMDE_ARM_NEON_A32V8_ENABLE_NATIVE_ALIASES) || (defined(SIMDE_ENABLE_NATIVE_ALIASES) && \
!(SIMDE_ARCH_ARM_CHECK(8,3) && \
(!defined(HEDLEY_GCC_VERSION) || HEDLEY_GCC_VERSION_CHECK(9,0,0)) && \
(!defined(__clang__) || SIMDE_DETECT_CLANG_VERSION_CHECK(12,0,0)) && \
defined(SIMDE_ARCH_ARM_COMPLEX)))
#undef vcmlaq_rot90_f32
#define vcmlaq_rot90_f32(r, a, b) simde_vcmlaq_rot90_f32(r, a, b)
#endif
......@@ -207,7 +223,11 @@ simde_vcmlaq_rot90_f64(simde_float64x2_t r, simde_float64x2_t a, simde_float64x2
return simde_float64x2_from_private(r_);
#endif
}
#if defined(SIMDE_ARM_NEON_A32V8_ENABLE_NATIVE_ALIASES)
#if defined(SIMDE_ARM_NEON_A64V8_ENABLE_NATIVE_ALIASES) || (defined(SIMDE_ENABLE_NATIVE_ALIASES) && \
!(SIMDE_ARCH_ARM_CHECK(8,3) && \
(!defined(HEDLEY_GCC_VERSION) || HEDLEY_GCC_VERSION_CHECK(9,0,0)) && \
(!defined(__clang__) || SIMDE_DETECT_CLANG_VERSION_CHECK(12,0,0)) && \
defined(SIMDE_ARCH_ARM_COMPLEX)))
#undef vcmlaq_rot90_f64
#define vcmlaq_rot90_f64(r, a, b) simde_vcmlaq_rot90_f64(r, a, b)
#endif
......
arm/neon/cmla_rot90_lane.h
View file @ 8c421df1
This diff is collapsed.
arm/neon/combine.h
View file @ 8c421df1
......@@ -59,7 +59,8 @@ simde_vcombine_f16(simde_float16x4_t low, simde_float16x4_t high) {
return simde_float16x8_from_private(r_);
#endif
}
#if defined(SIMDE_ARM_NEON_A32V7_ENABLE_NATIVE_ALIASES)
#if defined(SIMDE_ARM_NEON_A32V7_ENABLE_NATIVE_ALIASES) || (defined(SIMDE_ENABLE_NATIVE_ALIASES) && \
!(defined(SIMDE_ARM_NEON_FP16)))
#undef vcombine_f16
#define vcombine_f16(low, high) simde_vcombine_f16((low), (high))
#endif
......@@ -486,7 +487,8 @@ simde_vcombine_bf16(simde_bfloat16x4_t low, simde_bfloat16x4_t high) {
return simde_bfloat16x8_from_private(r_);
#endif
}
#if defined(SIMDE_ARM_NEON_A32V8_ENABLE_NATIVE_ALIASES)
#if defined(SIMDE_ARM_NEON_A32V8_ENABLE_NATIVE_ALIASES) || (defined(SIMDE_ENABLE_NATIVE_ALIASES) && \
!(defined(SIMDE_ARM_NEON_FP16)))
#undef vcombine_bf16
#define vcombine_bf16(low, high) simde_vcombine_bf16((low), (high))
#endif
......
arm/neon/copy_lane.h
View file @ 8c421df1
......@@ -869,7 +869,8 @@ simde_vcopy_lane_p8(simde_poly8x8_t a, const int lane1, simde_poly8x8_t b, const
#if defined(SIMDE_ARM_NEON_A64V8_NATIVE) && !defined(SIMDE_BUG_CLANG_71362)
#define simde_vcopy_lane_p8(a, lane1, b, lane2) vcopy_lane_p8((a), (lane1), (b), (lane2))
#endif
#if defined(SIMDE_ARM_NEON_A64V8_ENABLE_NATIVE_ALIASES)
#if defined(SIMDE_ARM_NEON_A64V8_ENABLE_NATIVE_ALIASES) || (defined(SIMDE_ENABLE_NATIVE_ALIASES) && \
defined(SIMDE_BUG_CLANG_71362))
#undef vcopy_lane_p8
#define vcopy_lane_p8(a, lane1, b, lane2) simde_vcopy_lane_p8((a), (lane1), (b), (lane2))
#endif
......@@ -889,7 +890,8 @@ simde_vcopy_lane_p16(simde_poly16x4_t a, const int lane1, simde_poly16x4_t b, co
#if defined(SIMDE_ARM_NEON_A64V8_NATIVE) && !defined(SIMDE_BUG_CLANG_71362)
#define simde_vcopy_lane_p16(a, lane1, b, lane2) vcopy_lane_p16((a), (lane1), (b), (lane2))
#endif
#if defined(SIMDE_ARM_NEON_A64V8_ENABLE_NATIVE_ALIASES)
#if defined(SIMDE_ARM_NEON_A64V8_ENABLE_NATIVE_ALIASES) || (defined(SIMDE_ENABLE_NATIVE_ALIASES) && \
defined(SIMDE_BUG_CLANG_71362))
#undef vcopy_lane_p16
#define vcopy_lane_p16(a, lane1, b, lane2) simde_vcopy_lane_p16((a), (lane1), (b), (lane2))
#endif
......@@ -909,7 +911,8 @@ simde_vcopy_lane_p64(simde_poly64x1_t a, const int lane1, simde_poly64x1_t b, co
#if defined(SIMDE_ARM_NEON_A64V8_NATIVE) && !defined(SIMDE_BUG_CLANG_71362)
#define simde_vcopy_lane_p64(a, lane1, b, lane2) vcopy_lane_p64((a), (lane1), (b), (lane2))
#endif
#if defined(SIMDE_ARM_NEON_A64V8_ENABLE_NATIVE_ALIASES)
#if defined(SIMDE_ARM_NEON_A64V8_ENABLE_NATIVE_ALIASES) || (defined(SIMDE_ENABLE_NATIVE_ALIASES) && \
defined(SIMDE_BUG_CLANG_71362))
#undef vcopy_lane_p64
#define vcopy_lane_p64(a, lane1, b, lane2) simde_vcopy_lane_p64((a), (lane1), (b), (lane2))
#endif
......@@ -930,7 +933,8 @@ simde_vcopy_laneq_p8(simde_poly8x8_t a, const int lane1, simde_poly8x16_t b, con
#if defined(SIMDE_ARM_NEON_A64V8_NATIVE) && !defined(SIMDE_BUG_CLANG_71362)
#define simde_vcopy_laneq_p8(a, lane1, b, lane2) vcopy_laneq_p8((a), (lane1), (b), (lane2))
#endif
#if defined(SIMDE_ARM_NEON_A64V8_ENABLE_NATIVE_ALIASES)
#if defined(SIMDE_ARM_NEON_A64V8_ENABLE_NATIVE_ALIASES) || (defined(SIMDE_ENABLE_NATIVE_ALIASES) && \
defined(SIMDE_BUG_CLANG_71362))
#undef vcopy_laneq_p8
#define vcopy_laneq_p8(a, lane1, b, lane2) simde_vcopy_laneq_p8((a), (lane1), (b), (lane2))
#endif
......@@ -951,7 +955,8 @@ simde_vcopy_laneq_p16(simde_poly16x4_t a, const int lane1, simde_poly16x8_t b, c
#if defined(SIMDE_ARM_NEON_A64V8_NATIVE) && !defined(SIMDE_BUG_CLANG_71362)
#define simde_vcopy_laneq_p16(a, lane1, b, lane2) vcopy_laneq_p16((a), (lane1), (b), (lane2))
#endif
#if defined(SIMDE_ARM_NEON_A64V8_ENABLE_NATIVE_ALIASES)
#if defined(SIMDE_ARM_NEON_A64V8_ENABLE_NATIVE_ALIASES) || (defined(SIMDE_ENABLE_NATIVE_ALIASES) && \
defined(SIMDE_BUG_CLANG_71362))
#undef vcopy_laneq_p16
#define vcopy_laneq_p16(a, lane1, b, lane2) simde_vcopy_laneq_p16((a), (lane1), (b), (lane2))
#endif
......@@ -972,7 +977,8 @@ simde_vcopy_laneq_p64(simde_poly64x1_t a, const int lane1, simde_poly64x2_t b, c
#if defined(SIMDE_ARM_NEON_A64V8_NATIVE) && !defined(SIMDE_BUG_CLANG_71362)
#define simde_vcopy_laneq_p64(a, lane1, b, lane2) vcopy_laneq_p64((a), (lane1), (b), (lane2))
#endif
#if defined(SIMDE_ARM_NEON_A64V8_ENABLE_NATIVE_ALIASES)
#if defined(SIMDE_ARM_NEON_A64V8_ENABLE_NATIVE_ALIASES) || (defined(SIMDE_ENABLE_NATIVE_ALIASES) && \
defined(SIMDE_BUG_CLANG_71362))
#undef vcopy_laneq_p64
#define vcopy_laneq_p64(a, lane1, b, lane2) simde_vcopy_laneq_p64((a), (lane1), (b), (lane2))
#endif
......@@ -993,7 +999,8 @@ simde_vcopyq_lane_p8(simde_poly8x16_t a, const int lane1, simde_poly8x8_t b, con
#if defined(SIMDE_ARM_NEON_A64V8_NATIVE) && !defined(SIMDE_BUG_CLANG_71362)
#define simde_vcopyq_lane_p8(a, lane1, b, lane2) vcopyq_lane_p8((a), (lane1), (b), (lane2))
#endif
#if defined(SIMDE_ARM_NEON_A64V8_ENABLE_NATIVE_ALIASES)
#if defined(SIMDE_ARM_NEON_A64V8_ENABLE_NATIVE_ALIASES) || (defined(SIMDE_ENABLE_NATIVE_ALIASES) && \
defined(SIMDE_BUG_CLANG_71362))
#undef vcopyq_lane_p8
#define vcopyq_lane_p8(a, lane1, b, lane2) simde_vcopyq_lane_p8((a), (lane1), (b), (lane2))
#endif
......@@ -1014,7 +1021,8 @@ simde_vcopyq_lane_p16(simde_poly16x8_t a, const int lane1, simde_poly16x4_t b, c
#if defined(SIMDE_ARM_NEON_A64V8_NATIVE) && !defined(SIMDE_BUG_CLANG_71362)
#define simde_vcopyq_lane_p16(a, lane1, b, lane2) vcopyq_lane_p16((a), (lane1), (b), (lane2))
#endif
#if defined(SIMDE_ARM_NEON_A64V8_ENABLE_NATIVE_ALIASES)
#if defined(SIMDE_ARM_NEON_A64V8_ENABLE_NATIVE_ALIASES) || (defined(SIMDE_ENABLE_NATIVE_ALIASES) && \
defined(SIMDE_BUG_CLANG_71362))
#undef vcopyq_lane_p16
#define vcopyq_lane_p16(a, lane1, b, lane2) simde_vcopyq_lane_p16((a), (lane1), (b), (lane2))
#endif
......@@ -1035,7 +1043,8 @@ simde_vcopyq_lane_p64(simde_poly64x2_t a, const int lane1, simde_poly64x1_t b, c
#if defined(SIMDE_ARM_NEON_A64V8_NATIVE) && !defined(SIMDE_BUG_CLANG_71362)
#define simde_vcopyq_lane_p64(a, lane1, b, lane2) vcopyq_lane_p64((a), (lane1), (b), (lane2))
#endif
#if defined(SIMDE_ARM_NEON_A64V8_ENABLE_NATIVE_ALIASES)
#if defined(SIMDE_ARM_NEON_A64V8_ENABLE_NATIVE_ALIASES) || (defined(SIMDE_ENABLE_NATIVE_ALIASES) && \
defined(SIMDE_BUG_CLANG_71362))
#undef vcopyq_lane_p64
#define vcopyq_lane_p64(a, lane1, b, lane2) simde_vcopyq_lane_p64((a), (lane1), (b), (lane2))
#endif
......@@ -1055,7 +1064,8 @@ simde_vcopyq_laneq_p8(simde_poly8x16_t a, const int lane1, simde_poly8x16_t b, c
#if defined(SIMDE_ARM_NEON_A64V8_NATIVE) && !defined(SIMDE_BUG_CLANG_71362)
#define simde_vcopyq_laneq_p8(a, lane1, b, lane2) vcopyq_laneq_p8((a), (lane1), (b), (lane2))
#endif
#if defined(SIMDE_ARM_NEON_A64V8_ENABLE_NATIVE_ALIASES)
#if defined(SIMDE_ARM_NEON_A64V8_ENABLE_NATIVE_ALIASES) || (defined(SIMDE_ENABLE_NATIVE_ALIASES) && \
defined(SIMDE_BUG_CLANG_71362))
#undef vcopyq_laneq_p8
#define vcopyq_laneq_p8(a, lane1, b, lane2) simde_vcopyq_laneq_p8((a), (lane1), (b), (lane2))
#endif
......@@ -1075,7 +1085,8 @@ simde_vcopyq_laneq_p16(simde_poly16x8_t a, const int lane1, simde_poly16x8_t b,
#if defined(SIMDE_ARM_NEON_A64V8_NATIVE) && !defined(SIMDE_BUG_CLANG_71362)
#define simde_vcopyq_laneq_p16(a, lane1, b, lane2) vcopyq_laneq_p16((a), (lane1), (b), (lane2))
#endif
#if defined(SIMDE_ARM_NEON_A64V8_ENABLE_NATIVE_ALIASES)
#if defined(SIMDE_ARM_NEON_A64V8_ENABLE_NATIVE_ALIASES) || (defined(SIMDE_ENABLE_NATIVE_ALIASES) && \
defined(SIMDE_BUG_CLANG_71362))
#undef vcopyq_laneq_p16
#define vcopyq_laneq_p16(a, lane1, b, lane2) simde_vcopyq_laneq_p16((a), (lane1), (b), (lane2))
#endif
......@@ -1095,7 +1106,8 @@ simde_vcopyq_laneq_p64(simde_poly64x2_t a, const int lane1, simde_poly64x2_t b,
#if defined(SIMDE_ARM_NEON_A64V8_NATIVE) && !defined(SIMDE_BUG_CLANG_71362)
#define simde_vcopyq_laneq_p64(a, lane1, b, lane2) vcopyq_laneq_p64((a), (lane1), (b), (lane2))
#endif
#if defined(SIMDE_ARM_NEON_A64V8_ENABLE_NATIVE_ALIASES)
#if defined(SIMDE_ARM_NEON_A64V8_ENABLE_NATIVE_ALIASES) || (defined(SIMDE_ENABLE_NATIVE_ALIASES) && \
defined(SIMDE_BUG_CLANG_71362))
#undef vcopyq_laneq_p64
#define vcopyq_laneq_p64(a, lane1, b, lane2) simde_vcopyq_laneq_p64((a), (lane1), (b), (lane2))
#endif
......@@ -1115,7 +1127,8 @@ simde_vcopy_lane_bf16(simde_bfloat16x4_t a, const int lane1, simde_bfloat16x4_t
#if defined(SIMDE_ARM_NEON_A64V8_NATIVE) && defined(SIMDE_ARM_NEON_BF16)
#define simde_vcopy_lane_bf16(a, lane1, b, lane2) vcopy_lane_bf16((a), (lane1), (b), (lane2))
#endif
#if defined(SIMDE_ARM_NEON_A64V8_ENABLE_NATIVE_ALIASES)
#if defined(SIMDE_ARM_NEON_A64V8_ENABLE_NATIVE_ALIASES) || (defined(SIMDE_ENABLE_NATIVE_ALIASES) && \
!(defined(SIMDE_ARM_NEON_BF16)))
#undef vcopy_lane_bf16
#define vcopy_lane_bf16(a, lane1, b, lane2) simde_vcopy_lane_bf16((a), (lane1), (b), (lane2))
#endif
......@@ -1134,7 +1147,8 @@ simde_vcopy_laneq_bf16(simde_bfloat16x4_t a, const int lane1, simde_bfloat16x8_t
#if defined(SIMDE_ARM_NEON_A64V8_NATIVE) && defined(SIMDE_ARM_NEON_BF16)
#define simde_vcopy_laneq_bf16(a, lane1, b, lane2) vcopy_laneq_bf16((a), (lane1), (b), (lane2))
#endif
#if defined(SIMDE_ARM_NEON_A64V8_ENABLE_NATIVE_ALIASES)
#if defined(SIMDE_ARM_NEON_A64V8_ENABLE_NATIVE_ALIASES) || (defined(SIMDE_ENABLE_NATIVE_ALIASES) && \
!(defined(SIMDE_ARM_NEON_BF16)))
#undef vcopy_laneq_bf16
#define vcopy_laneq_bf16(a, lane1, b, lane2) simde_vcopy_laneq_bf16((a), (lane1), (b), (lane2))
#endif
......@@ -1153,7 +1167,8 @@ simde_vcopyq_lane_bf16(simde_bfloat16x8_t a, const int lane1, simde_bfloat16x4_t
#if defined(SIMDE_ARM_NEON_A64V8_NATIVE) && defined(SIMDE_ARM_NEON_BF16)
#define simde_vcopyq_lane_bf16(a, lane1, b, lane2) vcopyq_lane_bf16((a), (lane1), (b), (lane2))
#endif
#if defined(SIMDE_ARM_NEON_A64V8_ENABLE_NATIVE_ALIASES)
#if defined(SIMDE_ARM_NEON_A64V8_ENABLE_NATIVE_ALIASES) || (defined(SIMDE_ENABLE_NATIVE_ALIASES) && \
!(defined(SIMDE_ARM_NEON_BF16)))
#undef vcopyq_lane_bf16
#define vcopyq_lane_bf16(a, lane1, b, lane2) simde_vcopyq_lane_bf16((a), (lane1), (b), (lane2))
#endif
......@@ -1173,7 +1188,8 @@ simde_vcopyq_laneq_bf16(simde_bfloat16x8_t a, const int lane1, simde_bfloat16x8_
#if defined(SIMDE_ARM_NEON_A64V8_NATIVE) && defined(SIMDE_ARM_NEON_BF16)
#define simde_vcopyq_laneq_bf16(a, lane1, b, lane2) vcopyq_laneq_bf16((a), (lane1), (b), (lane2))
#endif
#if defined(SIMDE_ARM_NEON_A64V8_ENABLE_NATIVE_ALIASES)
#if defined(SIMDE_ARM_NEON_A64V8_ENABLE_NATIVE_ALIASES) || (defined(SIMDE_ENABLE_NATIVE_ALIASES) && \
!(defined(SIMDE_ARM_NEON_BF16)))
#undef vcopyq_laneq_bf16
#define vcopyq_laneq_bf16(a, lane1, b, lane2) simde_vcopyq_laneq_bf16((a), (lane1), (b), (lane2))
#endif
......
arm/neon/crc32.h
View file @ 8c421df1
......@@ -78,7 +78,8 @@ simde___crc32b(uint32_t a, uint8_t b) {
return HEDLEY_STATIC_CAST(uint32_t, simde_crc32_reverseBits(result, 32));
#endif
}
#if defined(SIMDE_ARM_NEON_A32V8_ENABLE_NATIVE_ALIASES)
#if defined(SIMDE_ARM_NEON_A32V8_ENABLE_NATIVE_ALIASES) || (defined(SIMDE_ENABLE_NATIVE_ALIASES) && \
!(defined(SIMDE_ARCH_ARM_CRC32)))
#undef __crc32b
#define __crc32b(a, b) simde___crc32b((a), (b))
#endif
......@@ -104,7 +105,8 @@ simde___crc32h(uint32_t a, uint16_t b) {
return HEDLEY_STATIC_CAST(uint32_t, simde_crc32_reverseBits(result, 32));
#endif
}
#if defined(SIMDE_ARM_NEON_A32V8_ENABLE_NATIVE_ALIASES)
#if defined(SIMDE_ARM_NEON_A32V8_ENABLE_NATIVE_ALIASES) || (defined(SIMDE_ENABLE_NATIVE_ALIASES) && \
!(defined(SIMDE_ARCH_ARM_CRC32)))
#undef __crc32h
#define __crc32h(a, b) simde___crc32h((a), (b))
#endif
......@@ -129,7 +131,8 @@ simde___crc32w(uint32_t a, uint32_t b) {
return HEDLEY_STATIC_CAST(uint32_t, simde_crc32_reverseBits(tail, 32));
#endif
}
#if defined(SIMDE_ARM_NEON_A32V8_ENABLE_NATIVE_ALIASES)
#if defined(SIMDE_ARM_NEON_A32V8_ENABLE_NATIVE_ALIASES) || (defined(SIMDE_ENABLE_NATIVE_ALIASES) && \
!(defined(SIMDE_ARCH_ARM_CRC32)))
#undef __crc32w
#define __crc32w(a, b) simde___crc32w((a), (b))
#endif
......@@ -164,7 +167,8 @@ simde___crc32d(uint32_t a, uint64_t b) {
return HEDLEY_STATIC_CAST(uint32_t, simde_crc32_reverseBits(tail, 32));
#endif
}
#if defined(SIMDE_ARM_NEON_A32V8_ENABLE_NATIVE_ALIASES)
#if defined(SIMDE_ARM_NEON_A32V8_ENABLE_NATIVE_ALIASES) || (defined(SIMDE_ENABLE_NATIVE_ALIASES) && \
!(defined(SIMDE_ARCH_ARM_CRC32)))
#undef __crc32d
#define __crc32d(a, b) simde___crc32d((a), (b))
#endif
......@@ -190,7 +194,8 @@ simde___crc32cb(uint32_t a, uint8_t b) {
return HEDLEY_STATIC_CAST(uint32_t, simde_crc32_reverseBits(result, 32));
#endif
}
#if defined(SIMDE_ARM_NEON_A32V8_ENABLE_NATIVE_ALIASES)
#if defined(SIMDE_ARM_NEON_A32V8_ENABLE_NATIVE_ALIASES) || (defined(SIMDE_ENABLE_NATIVE_ALIASES) && \
!(defined(SIMDE_ARCH_ARM_CRC32)))
#undef __crc32cb
#define __crc32cb(a, b) simde___crc32cb((a), (b))
#endif
......@@ -216,7 +221,8 @@ simde___crc32ch(uint32_t a, uint16_t b) {
return HEDLEY_STATIC_CAST(uint32_t, simde_crc32_reverseBits(result, 32));
#endif
}
#if defined(SIMDE_ARM_NEON_A32V8_ENABLE_NATIVE_ALIASES)
#if defined(SIMDE_ARM_NEON_A32V8_ENABLE_NATIVE_ALIASES) || (defined(SIMDE_ENABLE_NATIVE_ALIASES) && \
!(defined(SIMDE_ARCH_ARM_CRC32)))
#undef __crc32ch
#define __crc32ch(a, b) simde___crc32ch((a), (b))
#endif
......@@ -241,7 +247,8 @@ simde___crc32cw(uint32_t a, uint32_t b) {
return HEDLEY_STATIC_CAST(uint32_t, simde_crc32_reverseBits(tail, 32));
#endif
}
#if defined(SIMDE_ARM_NEON_A32V8_ENABLE_NATIVE_ALIASES)
#if defined(SIMDE_ARM_NEON_A32V8_ENABLE_NATIVE_ALIASES) || (defined(SIMDE_ENABLE_NATIVE_ALIASES) && \
!(defined(SIMDE_ARCH_ARM_CRC32)))
#undef __crc32cw
#define __crc32cw(a, b) simde___crc32cw((a), (b))
#endif
......@@ -276,7 +283,8 @@ simde___crc32cd(uint32_t a, uint64_t b) {
return HEDLEY_STATIC_CAST(uint32_t, simde_crc32_reverseBits(tail, 32));
#endif
}
#if defined(SIMDE_ARM_NEON_A32V8_ENABLE_NATIVE_ALIASES)
#if defined(SIMDE_ARM_NEON_A32V8_ENABLE_NATIVE_ALIASES) || (defined(SIMDE_ENABLE_NATIVE_ALIASES) && \
!(defined(SIMDE_ARCH_ARM_CRC32)))
#undef __crc32cd
#define __crc32cd(a, b) simde___crc32cd((a), (b))
#endif
......
arm/neon/create.h
View file @ 8c421df1
......@@ -158,7 +158,8 @@ simde_vcreate_f16(uint64_t a) {
return simde_vreinterpret_f16_u64(simde_vdup_n_u64(a));
#endif
}
#if defined(SIMDE_ARM_NEON_A32V7_ENABLE_NATIVE_ALIASES)
#if defined(SIMDE_ARM_NEON_A32V7_ENABLE_NATIVE_ALIASES) || (defined(SIMDE_ENABLE_NATIVE_ALIASES) && \
!(defined(SIMDE_ARM_NEON_FP16)))
#undef vcreate_f16
#define vcreate_f16(a) simde_vcreate_f16(a)
#endif
......@@ -242,7 +243,8 @@ simde_vcreate_bf16(uint64_t a) {
return simde_vreinterpret_bf16_u64(simde_vdup_n_u64(a));
#endif
}
#if defined(SIMDE_ARM_NEON_A32V8_ENABLE_NATIVE_ALIASES)
#if defined(SIMDE_ARM_NEON_A32V8_ENABLE_NATIVE_ALIASES) || (defined(SIMDE_ENABLE_NATIVE_ALIASES) && \
!(defined(SIMDE_ARM_NEON_BF16)))
#undef vcreate_bf16
#define vcreate_bf16(a) simde_vcreate_bf16(a)
#endif
......
arm/neon/cvt.h
View file @ 8c421df1
This diff is collapsed.
arm/neon/cvt_n.h
View file @ 8c421df1
......@@ -45,7 +45,8 @@ simde_vcvth_n_u16_f16(simde_float16_t a, const int n)
#if defined(SIMDE_ARM_NEON_A64V8_NATIVE) && defined(SIMDE_ARM_NEON_FP16)
#define simde_vcvth_n_u16_f16(a, n) vcvth_n_u16_f16(a, n)
#endif
#if defined(SIMDE_ARM_NEON_A64V8_ENABLE_NATIVE_ALIASES)
#if defined(SIMDE_ARM_NEON_A64V8_ENABLE_NATIVE_ALIASES) || (defined(SIMDE_ENABLE_NATIVE_ALIASES) && \
!(defined(SIMDE_ARM_NEON_FP16)))
#undef vcvth_n_u16_f16
#define vcvth_n_u16_f16(a, n) simde_vcvth_n_u16_f16(a, n)
#endif
......@@ -61,7 +62,8 @@ simde_vcvth_n_f16_s16(int16_t a, const int n)
#if defined(SIMDE_ARM_NEON_A64V8_NATIVE) && defined(SIMDE_ARM_NEON_FP16)
#define simde_vcvth_n_f16_s16(a, n) vcvth_n_f16_s16(a, n)
#endif
#if defined(SIMDE_ARM_NEON_A64V8_ENABLE_NATIVE_ALIASES)
#if defined(SIMDE_ARM_NEON_A64V8_ENABLE_NATIVE_ALIASES) || (defined(SIMDE_ENABLE_NATIVE_ALIASES) && \
!(defined(SIMDE_ARM_NEON_FP16)))
#undef vcvth_n_f16_s16
#define vcvth_n_f16_s16(a, n) simde_vcvth_n_f16_s16(a, n)
#endif
......@@ -77,7 +79,8 @@ simde_vcvth_n_f16_u16(uint16_t a, const int n)
#if defined(SIMDE_ARM_NEON_A64V8_NATIVE) && defined(SIMDE_ARM_NEON_FP16)
#define simde_vcvth_n_f16_u16(a, n) vcvth_n_f16_u16(a, n)
#endif
#if defined(SIMDE_ARM_NEON_A64V8_ENABLE_NATIVE_ALIASES)
#if defined(SIMDE_ARM_NEON_A64V8_ENABLE_NATIVE_ALIASES) || (defined(SIMDE_ENABLE_NATIVE_ALIASES) && \
!(defined(SIMDE_ARM_NEON_FP16)))
#undef vcvth_n_f16_u16
#define vcvth_n_f16_u16(a, n) simde_vcvth_n_f16_u16(a, n)
#endif
......@@ -259,7 +262,8 @@ simde_vcvt_n_u16_f16(simde_float16x4_t a, const int n)
#if defined(SIMDE_ARM_NEON_A32V8_NATIVE) && defined(SIMDE_ARM_NEON_FP16)
#define simde_vcvt_n_u16_f16(a, n) vcvt_n_u16_f16((a), (n))
#endif
#if defined(SIMDE_ARM_NEON_A32V8_ENABLE_NATIVE_ALIASES)
#if defined(SIMDE_ARM_NEON_A32V8_ENABLE_NATIVE_ALIASES) || (defined(SIMDE_ENABLE_NATIVE_ALIASES) && \
!(defined(SIMDE_ARM_NEON_FP16)))
#undef vcvt_n_u16_f16
#define vcvt_n_u16_f16(a, n) simde_vcvt_n_u16_f16((a), (n))
#endif
......@@ -303,7 +307,8 @@ simde_vcvt_n_u64_f64(simde_float64x1_t a, const int n)
#if defined(SIMDE_ARM_NEON_A64V8_NATIVE) && !defined(SIMDE_BUG_CLANG_46844)
#define simde_vcvt_n_u64_f64(a, n) vcvt_n_u64_f64((a), (n))
#endif
#if defined(SIMDE_ARM_NEON_A64V8_ENABLE_NATIVE_ALIASES)
#if defined(SIMDE_ARM_NEON_A64V8_ENABLE_NATIVE_ALIASES) || (defined(SIMDE_ENABLE_NATIVE_ALIASES) && \
defined(SIMDE_BUG_CLANG_46844))
#undef vcvt_n_u64_f64
#define vcvt_n_u64_f64(a, n) simde_vcvt_n_u64_f64((a), (n))
#endif
......@@ -371,7 +376,8 @@ simde_vcvtq_n_u16_f16(simde_float16x8_t a, const int n)
#if defined(SIMDE_ARM_NEON_A32V8_NATIVE) && defined(SIMDE_ARM_NEON_FP16)
#define simde_vcvtq_n_u16_f16(a, n) vcvtq_n_u16_f16((a), (n))
#endif
#if defined(SIMDE_ARM_NEON_A32V8_ENABLE_NATIVE_ALIASES)
#if defined(SIMDE_ARM_NEON_A32V8_ENABLE_NATIVE_ALIASES) || (defined(SIMDE_ENABLE_NATIVE_ALIASES) && \
!(defined(SIMDE_ARM_NEON_FP16)))
#undef vcvtq_n_u16_f16
#define vcvtq_n_u16_f16(a, n) simde_vcvtq_n_u16_f16((a), (n))
#endif
......@@ -393,7 +399,8 @@ simde_vcvtq_n_u32_f32(simde_float32x4_t a, const int n)
#if defined(SIMDE_ARM_NEON_A32V7_NATIVE) && !defined(SIMDE_BUG_CLANG_46844)
#define simde_vcvtq_n_u32_f32(a, n) vcvtq_n_u32_f32((a), (n))
#endif
#if defined(SIMDE_ARM_NEON_A32V7_ENABLE_NATIVE_ALIASES)
#if defined(SIMDE_ARM_NEON_A32V7_ENABLE_NATIVE_ALIASES) || (defined(SIMDE_ENABLE_NATIVE_ALIASES) && \
defined(SIMDE_BUG_CLANG_46844))
#undef vcvtq_n_u32_f32
#define vcvtq_n_u32_f32(a, n) simde_vcvtq_n_u32_f32((a), (n))
#endif
......@@ -415,7 +422,8 @@ simde_vcvtq_n_u64_f64(simde_float64x2_t a, const int n)
#if defined(SIMDE_ARM_NEON_A64V8_NATIVE) && !defined(SIMDE_BUG_CLANG_46844)
#define simde_vcvtq_n_u64_f64(a, n) vcvtq_n_u64_f64((a), (n))
#endif
#if defined(SIMDE_ARM_NEON_A64V8_ENABLE_NATIVE_ALIASES)
#if defined(SIMDE_ARM_NEON_A64V8_ENABLE_NATIVE_ALIASES) || (defined(SIMDE_ENABLE_NATIVE_ALIASES) && \
defined(SIMDE_BUG_CLANG_46844))
#undef vcvtq_n_u64_f64
#define vcvtq_n_u64_f64(a, n) simde_vcvtq_n_u64_f64((a), (n))
#endif
......@@ -437,7 +445,8 @@ simde_vcvt_n_f16_u16(simde_uint16x4_t a, const int n)
#if defined(SIMDE_ARM_NEON_A32V8_NATIVE) && defined(SIMDE_ARM_NEON_FP16)
#define simde_vcvt_n_f16_u16(a, n) vcvt_n_f16_u16((a), (n))
#endif
#if defined(SIMDE_ARM_NEON_A32V8_ENABLE_NATIVE_ALIASES)
#if defined(SIMDE_ARM_NEON_A32V8_ENABLE_NATIVE_ALIASES) || (defined(SIMDE_ENABLE_NATIVE_ALIASES) && \
!(defined(SIMDE_ARM_NEON_FP16)))
#undef vcvt_n_f16_u16
#define vcvt_n_f16_u16(a, n) simde_vcvt_n_f16_u16((a), (n))
#endif
......@@ -459,7 +468,8 @@ simde_vcvt_n_f16_s16(simde_int16x4_t a, const int n)
#if defined(SIMDE_ARM_NEON_A32V8_NATIVE) && defined(SIMDE_ARM_NEON_FP16)
#define simde_vcvt_n_f16_s16(a, n) vcvt_n_f16_s16((a), (n))
#endif
#if defined(SIMDE_ARM_NEON_A32V8_ENABLE_NATIVE_ALIASES)
#if defined(SIMDE_ARM_NEON_A32V8_ENABLE_NATIVE_ALIASES) || (defined(SIMDE_ENABLE_NATIVE_ALIASES) && \
!(defined(SIMDE_ARM_NEON_FP16)))
#undef vcvt_n_f16_s16
#define vcvt_n_f16_s16(a, n) simde_vcvt_n_f16_s16((a), (n))
#endif
......@@ -481,7 +491,8 @@ simde_vcvtq_n_f16_u16(simde_uint16x8_t a, const int n)
#if defined(SIMDE_ARM_NEON_A32V8_NATIVE) && defined(SIMDE_ARM_NEON_FP16)
#define simde_vcvtq_n_f16_u16(a, n) vcvtq_n_f16_u16((a), (n))
#endif
#if defined(SIMDE_ARM_NEON_A32V8_ENABLE_NATIVE_ALIASES)
#if defined(SIMDE_ARM_NEON_A32V8_ENABLE_NATIVE_ALIASES) || (defined(SIMDE_ENABLE_NATIVE_ALIASES) && \
!(defined(SIMDE_ARM_NEON_FP16)))
#undef vcvtq_n_f16_u16
#define vcvtq_n_f16_u16(a, n) simde_vcvtq_n_f16_u16((a), (n))
#endif
......@@ -503,7 +514,8 @@ simde_vcvtq_n_f16_s16(simde_int16x8_t a, const int n)
#if defined(SIMDE_ARM_NEON_A32V8_NATIVE) && defined(SIMDE_ARM_NEON_FP16)
#define simde_vcvtq_n_f16_s16(a, n) vcvtq_n_f16_s16((a), (n))
#endif
#if defined(SIMDE_ARM_NEON_A32V8_ENABLE_NATIVE_ALIASES)
#if defined(SIMDE_ARM_NEON_A32V8_ENABLE_NATIVE_ALIASES) || (defined(SIMDE_ENABLE_NATIVE_ALIASES) && \
!(defined(SIMDE_ARM_NEON_FP16)))
#undef vcvtq_n_f16_s16
#define vcvtq_n_f16_s16(a, n) simde_vcvtq_n_f16_s16((a), (n))
#endif
......
arm/neon/cvtm.h
View file @ 8c421df1
......@@ -56,7 +56,8 @@ simde_vcvtmh_s64_f16(simde_float16_t a) {
}
#endif
}
#if defined(SIMDE_ARM_NEON_A64V8_ENABLE_NATIVE_ALIASES)
#if defined(SIMDE_ARM_NEON_A64V8_ENABLE_NATIVE_ALIASES) || (defined(SIMDE_ENABLE_NATIVE_ALIASES) && \
!(defined(SIMDE_ARM_NEON_FP16)))
#undef vcvtmh_s64_f16
#define vcvtmh_s64_f16(a) simde_vcvtmh_s64_f16(a)
#endif
......@@ -83,7 +84,8 @@ simde_vcvtmh_s32_f16(simde_float16_t a) {
}
#endif
}
#if defined(SIMDE_ARM_NEON_A32V8_ENABLE_NATIVE_ALIASES)
#if defined(SIMDE_ARM_NEON_A32V8_ENABLE_NATIVE_ALIASES) || (defined(SIMDE_ENABLE_NATIVE_ALIASES) && \
!(defined(SIMDE_ARM_NEON_FP16)))
#undef vcvtmh_s32_f16
#define vcvtmh_s32_f16(a) simde_vcvtmh_s32_f16(a)
#endif
......@@ -110,7 +112,8 @@ simde_vcvtmh_u64_f16(simde_float16_t a) {
}
#endif
}
#if defined(SIMDE_ARM_NEON_A64V8_ENABLE_NATIVE_ALIASES)
#if defined(SIMDE_ARM_NEON_A64V8_ENABLE_NATIVE_ALIASES) || (defined(SIMDE_ENABLE_NATIVE_ALIASES) && \
!(defined(SIMDE_ARM_NEON_FP16)))
#undef vcvtmh_u64_f16
#define vcvtmh_u64_f16(a) simde_vcvtmh_u64_f16(a)
#endif
......@@ -137,7 +140,8 @@ simde_vcvtmh_u32_f16(simde_float16_t a) {
}
#endif
}
#if defined(SIMDE_ARM_NEON_A32V8_ENABLE_NATIVE_ALIASES)
#if defined(SIMDE_ARM_NEON_A32V8_ENABLE_NATIVE_ALIASES) || (defined(SIMDE_ENABLE_NATIVE_ALIASES) && \
!(defined(SIMDE_ARM_NEON_FP16)))
#undef vcvtmh_u32_f16
#define vcvtmh_u32_f16(a) simde_vcvtmh_u32_f16(a)
#endif
......@@ -164,7 +168,8 @@ simde_vcvtmh_u16_f16(simde_float16_t a) {
}
#endif
}
#if defined(SIMDE_ARM_NEON_A64V8_ENABLE_NATIVE_ALIASES)
#if defined(SIMDE_ARM_NEON_A64V8_ENABLE_NATIVE_ALIASES) || (defined(SIMDE_ENABLE_NATIVE_ALIASES) && \
!(defined(SIMDE_ARM_NEON_FP16)))
#undef vcvtmh_u16_f16
#define vcvtmh_u16_f16(a) simde_vcvtmh_u16_f16(a)
#endif
......@@ -234,7 +239,8 @@ simde_vcvtmq_u16_f16(simde_float16x8_t a) {
return simde_uint16x8_from_private(r_);
#endif
}
#if defined(SIMDE_ARM_NEON_A32V8_ENABLE_NATIVE_ALIASES)
#if defined(SIMDE_ARM_NEON_A32V8_ENABLE_NATIVE_ALIASES) || (defined(SIMDE_ENABLE_NATIVE_ALIASES) && \
!(defined(SIMDE_ARM_NEON_FP16)))
#undef vcvtmq_u16_f16
#define vcvtmq_u16_f16(a) simde_vcvtmq_u16_f16(a)
#endif
......@@ -269,7 +275,8 @@ simde_vcvtmq_u32_f32(simde_float32x4_t a) {
return simde_uint32x4_from_private(r_);
#endif
}
#if defined(SIMDE_ARM_NEON_A64V8_ENABLE_NATIVE_ALIASES)
#if defined(SIMDE_ARM_NEON_A64V8_ENABLE_NATIVE_ALIASES) || (defined(SIMDE_ENABLE_NATIVE_ALIASES) && \
defined(SIMDE_BUG_CLANG_46844))
#undef vcvtmq_u32_f32
#define vcvtmq_u32_f32(a) simde_vcvtmq_u32_f32(a)
#endif
......@@ -326,7 +333,8 @@ simde_vcvtm_u16_f16(simde_float16x4_t a) {
return simde_uint16x4_from_private(r_);
#endif
}
#if defined(SIMDE_ARM_NEON_A32V8_ENABLE_NATIVE_ALIASES)
#if defined(SIMDE_ARM_NEON_A32V8_ENABLE_NATIVE_ALIASES) || (defined(SIMDE_ENABLE_NATIVE_ALIASES) && \
!(defined(SIMDE_ARM_NEON_FP16)))
#undef vcvtm_u16_f16
#define vcvtm_u16_f16(a) simde_vcvtm_u16_f16(a)
#endif
......
arm/neon/cvtn.h
View file @ 8c421df1
......@@ -123,7 +123,8 @@ simde_vcvtnh_s64_f16(simde_float16_t a) {
}
#endif
}
#if defined(SIMDE_ARM_NEON_A64V8_ENABLE_NATIVE_ALIASES)
#if defined(SIMDE_ARM_NEON_A64V8_ENABLE_NATIVE_ALIASES) || (defined(SIMDE_ENABLE_NATIVE_ALIASES) && \
!(defined(SIMDE_ARM_NEON_FP16)))
#undef vcvtnh_s64_f16
#define vcvtnh_s64_f16(a) simde_vcvtnh_s64_f16(a)
#endif
......@@ -148,7 +149,8 @@ simde_vcvtnh_s32_f16(simde_float16_t a) {
}
#endif
}
#if defined(SIMDE_ARM_NEON_A32V8_ENABLE_NATIVE_ALIASES)
#if defined(SIMDE_ARM_NEON_A32V8_ENABLE_NATIVE_ALIASES) || (defined(SIMDE_ENABLE_NATIVE_ALIASES) && \
!(defined(SIMDE_ARM_NEON_FP16)))
#undef vcvtnh_s32_f16
#define vcvtnh_s32_f16(a) simde_vcvtnh_s32_f16(a)
#endif
......@@ -173,7 +175,8 @@ simde_vcvtnh_u64_f16(simde_float16_t a) {
}
#endif
}
#if defined(SIMDE_ARM_NEON_A64V8_ENABLE_NATIVE_ALIASES)
#if defined(SIMDE_ARM_NEON_A64V8_ENABLE_NATIVE_ALIASES) || (defined(SIMDE_ENABLE_NATIVE_ALIASES) && \
!(defined(SIMDE_ARM_NEON_FP16)))
#undef vcvtnh_u64_f16
#define vcvtnh_u64_f16(a) simde_vcvtnh_u64_f16(a)
#endif
......@@ -198,7 +201,8 @@ simde_vcvtnh_u32_f16(simde_float16_t a) {
}
#endif
}
#if defined(SIMDE_ARM_NEON_A32V8_ENABLE_NATIVE_ALIASES)
#if defined(SIMDE_ARM_NEON_A32V8_ENABLE_NATIVE_ALIASES) || (defined(SIMDE_ENABLE_NATIVE_ALIASES) && \
!(defined(SIMDE_ARM_NEON_FP16)))
#undef vcvtnh_u32_f16
#define vcvtnh_u32_f16(a) simde_vcvtnh_u32_f16(a)
#endif
......@@ -223,7 +227,8 @@ simde_vcvtnh_u16_f16(simde_float16_t a) {
}
#endif
}
#if defined(SIMDE_ARM_NEON_A64V8_ENABLE_NATIVE_ALIASES)
#if defined(SIMDE_ARM_NEON_A64V8_ENABLE_NATIVE_ALIASES) || (defined(SIMDE_ENABLE_NATIVE_ALIASES) && \
!(defined(SIMDE_ARM_NEON_FP16)))
#undef vcvtnh_u16_f16
#define vcvtnh_u16_f16(a) simde_vcvtnh_u16_f16(a)
#endif
......@@ -305,7 +310,8 @@ simde_vcvtnq_u32_f32(simde_float32x4_t a) {
return simde_uint32x4_from_private(r_);
#endif
}
#if defined(SIMDE_ARM_NEON_A64V8_ENABLE_NATIVE_ALIASES)
#if defined(SIMDE_ARM_NEON_A64V8_ENABLE_NATIVE_ALIASES) || (defined(SIMDE_ENABLE_NATIVE_ALIASES) && \
defined(SIMDE_BUG_CLANG_46844))
#undef vcvtnq_u32_f32
#define vcvtnq_u32_f32(a) simde_vcvtnq_u32_f32(a)
#endif
......@@ -409,7 +415,8 @@ simde_vcvtnq_u16_f16(simde_float16x8_t a) {
return simde_uint16x8_from_private(r_);
#endif
}
#if defined(SIMDE_ARM_NEON_A32V8_ENABLE_NATIVE_ALIASES)
#if defined(SIMDE_ARM_NEON_A32V8_ENABLE_NATIVE_ALIASES) || (defined(SIMDE_ENABLE_NATIVE_ALIASES) && \
!(defined(SIMDE_ARM_NEON_FP16)))
#undef vcvtnq_u16_f16
#define vcvtnq_u16_f16(a) simde_vcvtnq_u16_f16(a)
#endif
......@@ -431,7 +438,8 @@ simde_vcvtn_u16_f16(simde_float16x4_t a) {
return simde_uint16x4_from_private(r_);
#endif
}
#if defined(SIMDE_ARM_NEON_A32V8_ENABLE_NATIVE_ALIASES)
#if defined(SIMDE_ARM_NEON_A32V8_ENABLE_NATIVE_ALIASES) || (defined(SIMDE_ENABLE_NATIVE_ALIASES) && \
!(defined(SIMDE_ARM_NEON_FP16)))
#undef vcvtn_u16_f16
#define vcvtn_u16_f16(a) simde_vcvtn_u16_f16(a)
#endif
......
arm/neon/cvtp.h
View file @ 8c421df1
......@@ -56,7 +56,8 @@ simde_vcvtph_s64_f16(simde_float16_t a) {
}
#endif
}
#if defined(SIMDE_ARM_NEON_A64V8_ENABLE_NATIVE_ALIASES)
#if defined(SIMDE_ARM_NEON_A64V8_ENABLE_NATIVE_ALIASES) || (defined(SIMDE_ENABLE_NATIVE_ALIASES) && \
!(defined(SIMDE_ARM_NEON_FP16)))
#undef vcvtph_s64_f16
#define vcvtph_s64_f16(a) simde_vcvtph_s64_f16(a)
#endif
......@@ -83,7 +84,8 @@ simde_vcvtph_s32_f16(simde_float16_t a) {
}
#endif
}
#if defined(SIMDE_ARM_NEON_A32V8_ENABLE_NATIVE_ALIASES)
#if defined(SIMDE_ARM_NEON_A32V8_ENABLE_NATIVE_ALIASES) || (defined(SIMDE_ENABLE_NATIVE_ALIASES) && \
!(defined(SIMDE_ARM_NEON_FP16)))
#undef vcvtph_s32_f16
#define vcvtph_s32_f16(a) simde_vcvtph_s32_f16(a)
#endif
......@@ -110,7 +112,8 @@ simde_vcvtph_u64_f16(simde_float16_t a) {
}
#endif
}
#if defined(SIMDE_ARM_NEON_A64V8_ENABLE_NATIVE_ALIASES)
#if defined(SIMDE_ARM_NEON_A64V8_ENABLE_NATIVE_ALIASES) || (defined(SIMDE_ENABLE_NATIVE_ALIASES) && \
!(defined(SIMDE_ARM_NEON_FP16)))
#undef vcvtph_u64_f16
#define vcvtph_u64_f16(a) simde_vcvtph_u64_f16(a)
#endif
......@@ -137,7 +140,8 @@ simde_vcvtph_u32_f16(simde_float16_t a) {
}
#endif
}
#if defined(SIMDE_ARM_NEON_A32V8_ENABLE_NATIVE_ALIASES)
#if defined(SIMDE_ARM_NEON_A32V8_ENABLE_NATIVE_ALIASES) || (defined(SIMDE_ENABLE_NATIVE_ALIASES) && \
!(defined(SIMDE_ARM_NEON_FP16)))
#undef vcvtph_u32_f16
#define vcvtph_u32_f16(a) simde_vcvtph_u32_f16(a)
#endif
......@@ -164,7 +168,8 @@ simde_vcvtph_u16_f16(simde_float16_t a) {
}
#endif
}
#if defined(SIMDE_ARM_NEON_A64V8_ENABLE_NATIVE_ALIASES)
#if defined(SIMDE_ARM_NEON_A64V8_ENABLE_NATIVE_ALIASES) || (defined(SIMDE_ENABLE_NATIVE_ALIASES) && \
!(defined(SIMDE_ARM_NEON_FP16)))
#undef vcvtph_u16_f16
#define vcvtph_u16_f16(a) simde_vcvtph_u16_f16(a)
#endif
......@@ -234,7 +239,8 @@ simde_vcvtpq_u16_f16(simde_float16x8_t a) {
return simde_uint16x8_from_private(r_);
#endif
}
#if defined(SIMDE_ARM_NEON_A32V8_ENABLE_NATIVE_ALIASES)
#if defined(SIMDE_ARM_NEON_A32V8_ENABLE_NATIVE_ALIASES) || (defined(SIMDE_ENABLE_NATIVE_ALIASES) && \
!(defined(SIMDE_ARM_NEON_FP16)))
#undef vcvtpq_u16_f16
#define vcvtpq_u16_f16(a) simde_vcvtpq_u16_f16(a)
#endif
......@@ -268,7 +274,8 @@ simde_vcvtpq_u32_f32(simde_float32x4_t a) {
return simde_uint32x4_from_private(r_);
#endif
}
#if defined(SIMDE_ARM_NEON_A64V8_ENABLE_NATIVE_ALIASES)
#if defined(SIMDE_ARM_NEON_A64V8_ENABLE_NATIVE_ALIASES) || (defined(SIMDE_ENABLE_NATIVE_ALIASES) && \
defined(SIMDE_BUG_CLANG_46844))
#undef vcvtpq_u32_f32
#define vcvtpq_u32_f32(a) simde_vcvtpq_u32_f32(a)
#endif
......@@ -324,7 +331,8 @@ simde_vcvtp_u16_f16(simde_float16x4_t a) {
return simde_uint16x4_from_private(r_);
#endif
}
#if defined(SIMDE_ARM_NEON_A32V8_ENABLE_NATIVE_ALIASES)
#if defined(SIMDE_ARM_NEON_A32V8_ENABLE_NATIVE_ALIASES) || (defined(SIMDE_ENABLE_NATIVE_ALIASES) && \
!(defined(SIMDE_ARM_NEON_FP16)))
#undef vcvtp_u16_f16
#define vcvtp_u16_f16(a) simde_vcvtp_u16_f16(a)
#endif
......
arm/neon/div.h
View file @ 8c421df1
......@@ -44,7 +44,8 @@ simde_vdivh_f16(simde_float16_t a, simde_float16_t b) {
return simde_float16_from_float32(simde_float16_to_float32(a) / simde_float16_to_float32(b));
#endif
}
#if defined(SIMDE_ARM_NEON_A64V8_ENABLE_NATIVE_ALIASES)
#if defined(SIMDE_ARM_NEON_A64V8_ENABLE_NATIVE_ALIASES) || (defined(SIMDE_ENABLE_NATIVE_ALIASES) && \
!(defined(SIMDE_ARM_NEON_FP16)))
#undef vdivh_f16
#define vdivh_f16(a, b) simde_vdivh_f16((a), (b))
#endif
......@@ -68,7 +69,8 @@ simde_vdiv_f16(simde_float16x4_t a, simde_float16x4_t b) {
return simde_float16x4_from_private(r_);
#endif
}
#if defined(SIMDE_ARM_NEON_A64V8_ENABLE_NATIVE_ALIASES)
#if defined(SIMDE_ARM_NEON_A64V8_ENABLE_NATIVE_ALIASES) || (defined(SIMDE_ENABLE_NATIVE_ALIASES) && \
!(defined(SIMDE_ARM_NEON_FP16)))
#undef vdiv_f16
#define vdiv_f16(a, b) simde_vdiv_f16((a), (b))
#endif
......@@ -92,7 +94,8 @@ simde_vdivq_f16(simde_float16x8_t a, simde_float16x8_t b) {
return simde_float16x8_from_private(r_);
#endif
}
#if defined(SIMDE_ARM_NEON_A64V8_ENABLE_NATIVE_ALIASES)
#if defined(SIMDE_ARM_NEON_A64V8_ENABLE_NATIVE_ALIASES) || (defined(SIMDE_ENABLE_NATIVE_ALIASES) && \
!(defined(SIMDE_ARM_NEON_FP16)))
#undef vdivq_f16
#define vdivq_f16(a, b) simde_vdivq_f16((a), (b))
#endif
......@@ -196,4 +199,4 @@ simde_vdivq_f64(simde_float64x2_t a, simde_float64x2_t b) {
SIMDE_END_DECLS_
HEDLEY_DIAGNOSTIC_POP
#endif /* !defined(SIMDE_ARM_NEON_MUL_H) */
#endif /* !defined(SIMDE_ARM_NEON_DIV_H) */
arm/neon/dot.h
View file @ 8c421df1
......@@ -84,7 +84,8 @@ simde_vdot_s32(simde_int32x2_t r, simde_int8x8_t a, simde_int8x8_t b) {
return simde_vadd_s32(r, simde_int32x2_from_private(r_));
#endif
}
#if defined(SIMDE_ARM_NEON_A32V8_ENABLE_NATIVE_ALIASES)
#if defined(SIMDE_ARM_NEON_A32V8_ENABLE_NATIVE_ALIASES) || (defined(SIMDE_ENABLE_NATIVE_ALIASES) && \
!(defined(SIMDE_ARCH_ARM_DOTPROD)))
#undef vdot_s32
#define vdot_s32(r, a, b) simde_vdot_s32((r), (a), (b))
#endif
......@@ -130,7 +131,8 @@ simde_vdot_u32(simde_uint32x2_t r, simde_uint8x8_t a, simde_uint8x8_t b) {
return simde_vadd_u32(r, simde_uint32x2_from_private(r_));
#endif
}
#if defined(SIMDE_ARM_NEON_A32V8_ENABLE_NATIVE_ALIASES)
#if defined(SIMDE_ARM_NEON_A32V8_ENABLE_NATIVE_ALIASES) || (defined(SIMDE_ENABLE_NATIVE_ALIASES) && \
!(defined(SIMDE_ARCH_ARM_DOTPROD)))
#undef vdot_u32
#define vdot_u32(r, a, b) simde_vdot_u32((r), (a), (b))
#endif
......@@ -179,7 +181,8 @@ simde_vdotq_s32(simde_int32x4_t r, simde_int8x16_t a, simde_int8x16_t b) {
return simde_vaddq_s32(r, simde_int32x4_from_private(r_));
#endif
}
#if defined(SIMDE_ARM_NEON_A32V8_ENABLE_NATIVE_ALIASES)
#if defined(SIMDE_ARM_NEON_A32V8_ENABLE_NATIVE_ALIASES) || (defined(SIMDE_ENABLE_NATIVE_ALIASES) && \
!(defined(SIMDE_ARCH_ARM_DOTPROD)))
#undef vdotq_s32
#define vdotq_s32(r, a, b) simde_vdotq_s32((r), (a), (b))
#endif
......@@ -228,7 +231,8 @@ simde_vdotq_u32(simde_uint32x4_t r, simde_uint8x16_t a, simde_uint8x16_t b) {
return simde_vaddq_u32(r, simde_uint32x4_from_private(r_));
#endif
}
#if defined(SIMDE_ARM_NEON_A32V8_ENABLE_NATIVE_ALIASES)
#if defined(SIMDE_ARM_NEON_A32V8_ENABLE_NATIVE_ALIASES) || (defined(SIMDE_ENABLE_NATIVE_ALIASES) && \
!(defined(SIMDE_ARCH_ARM_DOTPROD)))
#undef vdotq_u32
#define vdotq_u32(r, a, b) simde_vdotq_u32((r), (a), (b))
#endif
......@@ -255,7 +259,8 @@ simde_vbfdot_f32(simde_float32x2_t r, simde_bfloat16x4_t a, simde_bfloat16x4_t b
return simde_float32x2_from_private(r_);
#endif
}
#if defined(SIMDE_ARM_NEON_A32V8_ENABLE_NATIVE_ALIASES)
#if defined(SIMDE_ARM_NEON_A32V8_ENABLE_NATIVE_ALIASES) || (defined(SIMDE_ENABLE_NATIVE_ALIASES) && \
!(defined(SIMDE_ARM_NEON_BF16)))
#undef vbfdot_f32
#define vbfdot_f32(r, a, b) simde_vbfdot_f32((r), (a), (b))
#endif
......@@ -282,7 +287,9 @@ simde_vbfdotq_f32(simde_float32x4_t r, simde_bfloat16x8_t a, simde_bfloat16x8_t
return simde_float32x4_from_private(r_);
#endif
}
#if defined(SIMDE_ARM_NEON_A32V8_ENABLE_NATIVE_ALIASES)
#if defined(SIMDE_ARM_NEON_A32V8_ENABLE_NATIVE_ALIASES) || (defined(SIMDE_ENABLE_NATIVE_ALIASES) && \
!(defined(SIMDE_ARCH_ARM_DOTPROD) && \
defined(SIMDE_ARM_NEON_BF16)))
#undef vbfdotq_f32
#define vbfdotq_f32(r, a, b) simde_vbfdotq_f32((r), (a), (b))
#endif
......
arm/neon/dot_lane.h
View file @ 8c421df1
......@@ -100,7 +100,8 @@ simde_vdot_lane_s32(simde_int32x2_t r, simde_int8x8_t a, simde_int8x8_t b, const
return result;
}
#if defined(SIMDE_ARM_NEON_A32V8_ENABLE_NATIVE_ALIASES)
#if defined(SIMDE_ARM_NEON_A64V8_ENABLE_NATIVE_ALIASES) || (defined(SIMDE_ENABLE_NATIVE_ALIASES) && \
!(defined(SIMDE_ARCH_ARM_DOTPROD)))
#undef vdot_lane_s32
#define vdot_lane_s32(r, a, b, lane) simde_vdot_lane_s32((r), (a), (b), (lane))
#endif
......@@ -164,7 +165,8 @@ simde_vdot_lane_u32(simde_uint32x2_t r, simde_uint8x8_t a, simde_uint8x8_t b, co
return result;
}
#if defined(SIMDE_ARM_NEON_A32V8_ENABLE_NATIVE_ALIASES)
#if defined(SIMDE_ARM_NEON_A64V8_ENABLE_NATIVE_ALIASES) || (defined(SIMDE_ENABLE_NATIVE_ALIASES) && \
!(defined(SIMDE_ARCH_ARM_DOTPROD)))
#undef vdot_lane_u32
#define vdot_lane_u32(r, a, b, lane) simde_vdot_lane_u32((r), (a), (b), (lane))
#endif
......@@ -226,7 +228,8 @@ simde_vdot_laneq_s32(simde_int32x2_t r, simde_int8x8_t a, simde_int8x16_t b, con
return result;
}
#if defined(SIMDE_ARM_NEON_A32V8_ENABLE_NATIVE_ALIASES)
#if defined(SIMDE_ARM_NEON_A64V8_ENABLE_NATIVE_ALIASES) || (defined(SIMDE_ENABLE_NATIVE_ALIASES) && \
!(defined(SIMDE_ARCH_ARM_DOTPROD)))
#undef vdot_laneq_s32
#define vdot_laneq_s32(r, a, b, lane) simde_vdot_laneq_s32((r), (a), (b), (lane))
#endif
......@@ -287,7 +290,8 @@ simde_vdot_laneq_u32(simde_uint32x2_t r, simde_uint8x8_t a, simde_uint8x16_t b,
#endif
return result;
}
#if defined(SIMDE_ARM_NEON_A32V8_ENABLE_NATIVE_ALIASES)
#if defined(SIMDE_ARM_NEON_A64V8_ENABLE_NATIVE_ALIASES) || (defined(SIMDE_ENABLE_NATIVE_ALIASES) && \
!(defined(SIMDE_ARCH_ARM_DOTPROD)))
#undef vdot_laneq_u32
#define vdot_laneq_u32(r, a, b, lane) simde_vdot_laneq_u32((r), (a), (b), (lane))
#endif
......@@ -365,7 +369,8 @@ simde_vdotq_laneq_u32(simde_uint32x4_t r, simde_uint8x16_t a, simde_uint8x16_t b
#endif
return result;
}
#if defined(SIMDE_ARM_NEON_A32V8_ENABLE_NATIVE_ALIASES)
#if defined(SIMDE_ARM_NEON_A64V8_ENABLE_NATIVE_ALIASES) || (defined(SIMDE_ENABLE_NATIVE_ALIASES) && \
!(defined(SIMDE_ARCH_ARM_DOTPROD)))
#undef vdotq_laneq_u32
#define vdotq_laneq_u32(r, a, b, lane) simde_vdotq_laneq_u32((r), (a), (b), (lane))
#endif
......@@ -447,7 +452,8 @@ simde_vdotq_laneq_s32(simde_int32x4_t r, simde_int8x16_t a, simde_int8x16_t b, c
#endif
return result;
}
#if defined(SIMDE_ARM_NEON_A32V8_ENABLE_NATIVE_ALIASES)
#if defined(SIMDE_ARM_NEON_A64V8_ENABLE_NATIVE_ALIASES) || (defined(SIMDE_ENABLE_NATIVE_ALIASES) && \
!(defined(SIMDE_ARCH_ARM_DOTPROD)))
#undef vdotq_laneq_s32
#define vdotq_laneq_s32(r, a, b, lane) simde_vdotq_laneq_s32((r), (a), (b), (lane))
#endif
......@@ -523,7 +529,8 @@ simde_vdotq_lane_u32(simde_uint32x4_t r, simde_uint8x16_t a, simde_uint8x8_t b,
#endif
return result;
}
#if defined(SIMDE_ARM_NEON_A32V8_ENABLE_NATIVE_ALIASES)
#if defined(SIMDE_ARM_NEON_A64V8_ENABLE_NATIVE_ALIASES) || (defined(SIMDE_ENABLE_NATIVE_ALIASES) && \
!(defined(SIMDE_ARCH_ARM_DOTPROD)))
#undef vdotq_lane_u32
#define vdotq_lane_u32(r, a, b, lane) simde_vdotq_lane_u32((r), (a), (b), (lane))
#endif
......@@ -600,7 +607,8 @@ simde_vdotq_lane_s32(simde_int32x4_t r, simde_int8x16_t a, simde_int8x8_t b, con
#endif
return result;
}
#if defined(SIMDE_ARM_NEON_A32V8_ENABLE_NATIVE_ALIASES)
#if defined(SIMDE_ARM_NEON_A64V8_ENABLE_NATIVE_ALIASES) || (defined(SIMDE_ENABLE_NATIVE_ALIASES) && \
!(defined(SIMDE_ARCH_ARM_DOTPROD)))
#undef vdotq_lane_s32
#define vdotq_lane_s32(r, a, b, lane) simde_vdotq_lane_s32((r), (a), (b), (lane))
#endif
......@@ -632,7 +640,9 @@ simde_vbfdot_lane_f32(simde_float32x2_t r, simde_bfloat16x4_t a, simde_bfloat16x
return result;
}
#if defined(SIMDE_ARM_NEON_A32V8_ENABLE_NATIVE_ALIASES)
#if defined(SIMDE_ARM_NEON_A32V8_ENABLE_NATIVE_ALIASES) || (defined(SIMDE_ENABLE_NATIVE_ALIASES) && \
!(defined(SIMDE_ARCH_ARM_DOTPROD) && \
defined(SIMDE_ARM_NEON_BF16)))
#undef vbfdot_lane_f32
#define vbfdot_lane_f32(r, a, b, lane) simde_vbfdot_lane_f32((r), (a), (b), (lane))
#endif
......@@ -663,7 +673,9 @@ simde_vbfdotq_lane_f32(simde_float32x4_t r, simde_bfloat16x8_t a, simde_bfloat16
return result;
}
#if defined(SIMDE_ARM_NEON_A32V8_ENABLE_NATIVE_ALIASES)
#if defined(SIMDE_ARM_NEON_A32V8_ENABLE_NATIVE_ALIASES) || (defined(SIMDE_ENABLE_NATIVE_ALIASES) && \
!(defined(SIMDE_ARCH_ARM_DOTPROD) && \
defined(SIMDE_ARM_NEON_BF16)))
#undef vbfdotq_lane_f32
#define vbfdotq_lane_f32(r, a, b, lane) simde_vbfdotq_lane_f32((r), (a), (b), (lane))
#endif
......@@ -694,7 +706,9 @@ simde_vbfdot_laneq_f32(simde_float32x2_t r, simde_bfloat16x4_t a, simde_bfloat16
return result;
}
#if defined(SIMDE_ARM_NEON_A32V8_ENABLE_NATIVE_ALIASES)
#if defined(SIMDE_ARM_NEON_A32V8_ENABLE_NATIVE_ALIASES) || (defined(SIMDE_ENABLE_NATIVE_ALIASES) && \
!(defined(SIMDE_ARCH_ARM_DOTPROD) && \
defined(SIMDE_ARM_NEON_BF16)))
#undef vbfdot_laneq_f32
#define vbfdot_laneq_f32(r, a, b, lane) simde_vbfdot_laneq_f32((r), (a), (b), (lane))
#endif
......@@ -726,7 +740,9 @@ simde_vbfdotq_laneq_f32(simde_float32x4_t r, simde_bfloat16x8_t a, simde_bfloat1
return result;
}
#if defined(SIMDE_ARM_NEON_A32V8_ENABLE_NATIVE_ALIASES)
#if defined(SIMDE_ARM_NEON_A32V8_ENABLE_NATIVE_ALIASES) || (defined(SIMDE_ENABLE_NATIVE_ALIASES) && \
!(defined(SIMDE_ARCH_ARM_DOTPROD) && \
defined(SIMDE_ARM_NEON_BF16)))
#undef vbfdotq_laneq_f32
#define vbfdotq_laneq_f32(r, a, b, lane) simde_vbfdotq_laneq_f32((r), (a), (b), (lane))
#endif
......
arm/neon/dup_lane.h
View file @ 8c421df1
......@@ -156,7 +156,8 @@ simde_vduph_lane_f16(simde_float16x4_t vec, const int lane)
#if defined(SIMDE_ARM_NEON_A64V8_NATIVE) && defined(SIMDE_ARM_NEON_FP16)
#define simde_vduph_lane_f16(vec, lane) vduph_lane_f16(vec, lane)
#endif
#if defined(SIMDE_ARM_NEON_A64V8_ENABLE_NATIVE_ALIASES)
#if defined(SIMDE_ARM_NEON_A64V8_ENABLE_NATIVE_ALIASES) || (defined(SIMDE_ENABLE_NATIVE_ALIASES) && \
!(defined(SIMDE_ARM_NEON_FP16)))
#undef vduph_lane_f16
#define vduph_lane_f16(vec, lane) simde_vduph_lane_f16((vec), (lane))
#endif
......@@ -167,7 +168,8 @@ simde_vduph_lane_f16(simde_float16x4_t vec, const int lane)
#else
#define simde_vdup_lane_f16(vec, lane) simde_vdup_n_f16(simde_vduph_lane_f16(vec, lane))
#endif
#if defined(SIMDE_ARM_NEON_A32V7_ENABLE_NATIVE_ALIASES)
#if defined(SIMDE_ARM_NEON_A32V7_ENABLE_NATIVE_ALIASES) || (defined(SIMDE_ENABLE_NATIVE_ALIASES) && \
!(defined(SIMDE_ARM_NEON_FP16)))
#undef vdup_lane_f16
#define vdup_lane_f16(vec, lane) simde_vdup_lane_f16((vec), (lane))
#endif
......@@ -181,7 +183,8 @@ simde_vdup_laneq_f16(simde_float16x8_t vec, const int lane)
#if defined(SIMDE_ARM_NEON_A64V8_NATIVE) && defined(SIMDE_ARM_NEON_FP16)
#define simde_vdup_laneq_f16(vec, lane) vdup_laneq_f16(vec, lane)
#endif
#if defined(SIMDE_ARM_NEON_A64V8_ENABLE_NATIVE_ALIASES)
#if defined(SIMDE_ARM_NEON_A64V8_ENABLE_NATIVE_ALIASES) || (defined(SIMDE_ENABLE_NATIVE_ALIASES) && \
!(defined(SIMDE_ARM_NEON_FP16)))
#undef vdup_laneq_f16
#define vdup_laneq_f16(vec, lane) simde_vdup_laneq_f16((vec), (lane))
#endif
......@@ -195,7 +198,8 @@ simde_vdupq_lane_f16(simde_float16x4_t vec, const int lane)
#if defined(SIMDE_ARM_NEON_A32V7_NATIVE) && defined(SIMDE_ARM_NEON_FP16)
#define simde_vdupq_lane_f16(vec, lane) vdupq_lane_f16(vec, lane)
#endif
#if defined(SIMDE_ARM_NEON_A32V7_ENABLE_NATIVE_ALIASES)
#if defined(SIMDE_ARM_NEON_A32V7_ENABLE_NATIVE_ALIASES) || (defined(SIMDE_ENABLE_NATIVE_ALIASES) && \
!(defined(SIMDE_ARM_NEON_FP16)))
#undef vdupq_lane_f16
#define vdupq_lane_f16(vec, lane) simde_vdupq_lane_f16((vec), (lane))
#endif
......@@ -987,7 +991,8 @@ simde_vdupq_laneq_f16(simde_float16x8_t vec, const int lane)
#if defined(SIMDE_ARM_NEON_A64V8_NATIVE) && defined(SIMDE_ARM_NEON_FP16)
#define simde_vdupq_laneq_f16(vec, lane) vdupq_laneq_f16(vec, lane)
#endif
#if defined(SIMDE_ARM_NEON_A64V8_ENABLE_NATIVE_ALIASES)
#if defined(SIMDE_ARM_NEON_A64V8_ENABLE_NATIVE_ALIASES) || (defined(SIMDE_ENABLE_NATIVE_ALIASES) && \
!(defined(SIMDE_ARM_NEON_FP16)))
#undef vdupq_laneq_f16
#define vdupq_laneq_f16(vec, lane) simde_vdupq_laneq_f16((vec), (lane))
#endif
......@@ -1383,7 +1388,8 @@ simde_vduph_laneq_f16(simde_float16x8_t vec, const int lane)
#if defined(SIMDE_ARM_NEON_A64V8_NATIVE) && defined(SIMDE_ARM_NEON_FP16)
#define simde_vduph_laneq_f16(vec, lane) vduph_laneq_f16(vec, lane)
#endif
#if defined(SIMDE_ARM_NEON_A64V8_ENABLE_NATIVE_ALIASES)
#if defined(SIMDE_ARM_NEON_A64V8_ENABLE_NATIVE_ALIASES) || (defined(SIMDE_ENABLE_NATIVE_ALIASES) && \
!(defined(SIMDE_ARM_NEON_FP16)))
#undef vduph_laneq_f16
#define vduph_laneq_f16(vec, lane) simde_vduph_laneq_f16((vec), (lane))
#endif
......@@ -1565,7 +1571,8 @@ simde_vdupb_lane_p8(simde_poly8x8_t vec, const int lane)
#if defined(SIMDE_ARM_NEON_A64V8_NATIVE) && !defined(SIMDE_BUG_CLANG_71362)
#define simde_vdupb_lane_p8(vec, lane) vdupb_lane_p8((vec), (lane))
#endif
#if defined(SIMDE_ARM_NEON_A64V8_ENABLE_NATIVE_ALIASES)
#if defined(SIMDE_ARM_NEON_A64V8_ENABLE_NATIVE_ALIASES) || (defined(SIMDE_ENABLE_NATIVE_ALIASES) && \
defined(SIMDE_BUG_CLANG_71362))
#undef vdupb_lane_p8
#define vdupb_lane_p8(vec, lane) simde_vdupb_lane_p8((vec), (lane))
#endif
......@@ -1579,7 +1586,8 @@ simde_vdupb_laneq_p8(simde_poly8x16_t vec, const int lane)
#if defined(SIMDE_ARM_NEON_A64V8_NATIVE) && !defined(SIMDE_BUG_CLANG_71362)
#define simde_vdupb_laneq_p8(vec, lane) vdupb_laneq_p8((vec), (lane))
#endif
#if defined(SIMDE_ARM_NEON_A64V8_ENABLE_NATIVE_ALIASES)
#if defined(SIMDE_ARM_NEON_A64V8_ENABLE_NATIVE_ALIASES) || (defined(SIMDE_ENABLE_NATIVE_ALIASES) && \
defined(SIMDE_BUG_CLANG_71362))
#undef vdupb_laneq_p8
#define vdupb_laneq_p8(vec, lane) simde_vdupb_laneq_p8((vec), (lane))
#endif
......@@ -1593,7 +1601,8 @@ simde_vduph_lane_p16(simde_poly16x4_t vec, const int lane)
#if defined(SIMDE_ARM_NEON_A64V8_NATIVE) && !defined(SIMDE_BUG_CLANG_71362)
#define simde_vduph_lane_p16(vec, lane) vduph_lane_p16((vec), (lane))
#endif
#if defined(SIMDE_ARM_NEON_A64V8_ENABLE_NATIVE_ALIASES)
#if defined(SIMDE_ARM_NEON_A64V8_ENABLE_NATIVE_ALIASES) || (defined(SIMDE_ENABLE_NATIVE_ALIASES) && \
defined(SIMDE_BUG_CLANG_71362))
#undef vduph_lane_p16
#define vduph_lane_p16(vec, lane) simde_vduph_lane_p16((vec), (lane))
#endif
......@@ -1607,7 +1616,8 @@ simde_vduph_laneq_p16(simde_poly16x8_t vec, const int lane)
#if defined(SIMDE_ARM_NEON_A64V8_NATIVE) && !defined(SIMDE_BUG_CLANG_71362)
#define simde_vduph_laneq_p16(vec, lane) vduph_laneq_p16((vec), (lane))
#endif
#if defined(SIMDE_ARM_NEON_A64V8_ENABLE_NATIVE_ALIASES)
#if defined(SIMDE_ARM_NEON_A64V8_ENABLE_NATIVE_ALIASES) || (defined(SIMDE_ENABLE_NATIVE_ALIASES) && \
defined(SIMDE_BUG_CLANG_71362))
#undef vduph_laneq_p16
#define vduph_laneq_p16(vec, lane) simde_vduph_laneq_p16((vec), (lane))
#endif
......@@ -1621,7 +1631,8 @@ simde_vduph_lane_bf16(simde_bfloat16x4_t vec, const int lane)
#if defined(SIMDE_ARM_NEON_A32V8_NATIVE) && defined(SIMDE_ARM_NEON_BF16)
#define simde_vduph_lane_bf16(vec, lane) vduph_lane_bf16(vec, lane)
#endif
#if defined(SIMDE_ARM_NEON_A32V8_ENABLE_NATIVE_ALIASES)
#if defined(SIMDE_ARM_NEON_A32V8_ENABLE_NATIVE_ALIASES) || (defined(SIMDE_ENABLE_NATIVE_ALIASES) && \
!(defined(SIMDE_ARM_NEON_BF16)))
#undef vduph_lane_bf16
#define vduph_lane_bf16(vec, lane) simde_vduph_lane_bf16((vec), (lane))
#endif
......@@ -1635,7 +1646,8 @@ simde_vduph_laneq_bf16(simde_bfloat16x8_t vec, const int lane)
#if defined(SIMDE_ARM_NEON_A32V8_NATIVE) && defined(SIMDE_ARM_NEON_BF16)
#define simde_vduph_laneq_bf16(vec, lane) vduph_laneq_bf16(vec, lane)
#endif
#if defined(SIMDE_ARM_NEON_A32V8_ENABLE_NATIVE_ALIASES)
#if defined(SIMDE_ARM_NEON_A32V8_ENABLE_NATIVE_ALIASES) || (defined(SIMDE_ENABLE_NATIVE_ALIASES) && \
!(defined(SIMDE_ARM_NEON_BF16)))
#undef vduph_laneq_bf16
#define vduph_laneq_bf16(vec, lane) simde_vduph_laneq_bf16((vec), (lane))
#endif
......@@ -1646,7 +1658,8 @@ simde_vduph_laneq_bf16(simde_bfloat16x8_t vec, const int lane)
#else
#define simde_vdup_lane_bf16(vec, lane) simde_vdup_n_bf16(simde_vduph_lane_bf16(vec, lane))
#endif
#if defined(SIMDE_ARM_NEON_A32V8_ENABLE_NATIVE_ALIASES)
#if defined(SIMDE_ARM_NEON_A32V8_ENABLE_NATIVE_ALIASES) || (defined(SIMDE_ENABLE_NATIVE_ALIASES) && \
!(defined(SIMDE_ARM_NEON_BF16)))
#undef vdup_lane_bf16
#define vdup_lane_bf16(vec, lane) simde_vdup_lane_bf16((vec), (lane))
#endif
......@@ -1660,7 +1673,8 @@ simde_vdup_laneq_bf16(simde_bfloat16x8_t vec, const int lane)
#if defined(SIMDE_ARM_NEON_A32V8_NATIVE) && defined(SIMDE_ARM_NEON_BF16)
#define simde_vdup_laneq_bf16(vec, lane) vdup_laneq_bf16(vec, lane)
#endif
#if defined(SIMDE_ARM_NEON_A32V8_ENABLE_NATIVE_ALIASES)
#if defined(SIMDE_ARM_NEON_A32V8_ENABLE_NATIVE_ALIASES) || (defined(SIMDE_ENABLE_NATIVE_ALIASES) && \
!(defined(SIMDE_ARM_NEON_BF16)))
#undef vdup_laneq_bf16
#define vdup_laneq_bf16(vec, lane) simde_vdup_laneq_bf16((vec), (lane))
#endif
......@@ -1674,7 +1688,8 @@ simde_vdupq_lane_bf16(simde_bfloat16x4_t vec, const int lane)
#if defined(SIMDE_ARM_NEON_A32V8_NATIVE) && defined(SIMDE_ARM_NEON_BF16)
#define simde_vdupq_lane_bf16(vec, lane) vdupq_lane_bf16(vec, lane)
#endif
#if defined(SIMDE_ARM_NEON_A32V8_ENABLE_NATIVE_ALIASES)
#if defined(SIMDE_ARM_NEON_A32V8_ENABLE_NATIVE_ALIASES) || (defined(SIMDE_ENABLE_NATIVE_ALIASES) && \
!(defined(SIMDE_ARM_NEON_BF16)))
#undef vdupq_lane_bf16
#define vdupq_lane_bf16(vec, lane) simde_vdupq_lane_bf16((vec), (lane))
#endif
......@@ -1688,7 +1703,8 @@ simde_vdupq_laneq_bf16(simde_bfloat16x8_t vec, const int lane)
#if defined(SIMDE_ARM_NEON_A32V8_NATIVE) && defined(SIMDE_ARM_NEON_BF16)
#define simde_vdupq_laneq_bf16(vec, lane) vdupq_laneq_bf16(vec, lane)
#endif
#if defined(SIMDE_ARM_NEON_A32V8_ENABLE_NATIVE_ALIASES)
#if defined(SIMDE_ARM_NEON_A32V8_ENABLE_NATIVE_ALIASES) || (defined(SIMDE_ENABLE_NATIVE_ALIASES) && \
!(defined(SIMDE_ARM_NEON_BF16)))
#undef vdupq_laneq_bf16
#define vdupq_laneq_bf16(vec, lane) simde_vdupq_laneq_bf16((vec), (lane))
#endif
......
arm/neon/dup_n.h
View file @ 8c421df1
......@@ -55,7 +55,8 @@ simde_vdup_n_f16(simde_float16_t value) {
#endif
}
#define simde_vmov_n_f16 simde_vdup_n_f16
#if defined(SIMDE_ARM_NEON_A32V7_ENABLE_NATIVE_ALIASES)
#if defined(SIMDE_ARM_NEON_A32V7_ENABLE_NATIVE_ALIASES) || (defined(SIMDE_ENABLE_NATIVE_ALIASES) && \
!(defined(SIMDE_ARM_NEON_FP16)))
#undef vdup_n_f16
#define vdup_n_f16(value) simde_vdup_n_f16((value))
#undef vmov_n_f16
......@@ -366,7 +367,8 @@ simde_vdupq_n_f16(simde_float16_t value) {
#endif
}
#define simde_vmovq_n_f16 simde_vdupq_n_f16
#if defined(SIMDE_ARM_NEON_A32V7_ENABLE_NATIVE_ALIASES)
#if defined(SIMDE_ARM_NEON_A32V7_ENABLE_NATIVE_ALIASES) || (defined(SIMDE_ENABLE_NATIVE_ALIASES) && \
!(defined(SIMDE_ARM_NEON_FP16)))
#undef vdupq_n_f16
#define vdupq_n_f16(value) simde_vdupq_n_f16((value))
#undef vmovq_n_f16
......@@ -869,7 +871,8 @@ simde_vdup_n_bf16(simde_bfloat16_t value) {
return simde_bfloat16x4_from_private(r_);
#endif
}
#if defined(SIMDE_ARM_NEON_A32V8_ENABLE_NATIVE_ALIASES)
#if defined(SIMDE_ARM_NEON_A32V8_ENABLE_NATIVE_ALIASES) || (defined(SIMDE_ENABLE_NATIVE_ALIASES) && \
!(defined(SIMDE_ARM_NEON_FP16)))
#undef vdup_n_bf16
#define vdup_n_bf16(value) simde_vdup_n_bf16((value))
#endif
......@@ -890,7 +893,8 @@ simde_vdupq_n_bf16(simde_bfloat16_t value) {
return simde_bfloat16x8_from_private(r_);
#endif
}
#if defined(SIMDE_ARM_NEON_A32V8_ENABLE_NATIVE_ALIASES)
#if defined(SIMDE_ARM_NEON_A32V8_ENABLE_NATIVE_ALIASES) || (defined(SIMDE_ENABLE_NATIVE_ALIASES) && \
!(defined(SIMDE_ARM_NEON_FP16)))
#undef vdupq_n_bf16
#define vdupq_n_bf16(value) simde_vdupq_n_bf16((value))
#endif
......
arm/neon/eor.h
View file @ 8c421df1
......@@ -608,7 +608,8 @@ simde_veor3q_s8(simde_int8x16_t a, simde_int8x16_t b, simde_int8x16_t c) {
return simde_int8x16_from_private(r_);
#endif
}
#if defined(SIMDE_ARM_NEON_A64V8_ENABLE_NATIVE_ALIASES)
#if defined(SIMDE_ARM_NEON_A64V8_ENABLE_NATIVE_ALIASES) || (defined(SIMDE_ENABLE_NATIVE_ALIASES) && \
!(defined(SIMDE_ARCH_ARM_SHA3)))
#undef veor3q_s8
#define veor3q_s8(a, b, c) simde_veor3q_s8((a), (b), (c))
#endif
......@@ -639,7 +640,8 @@ simde_veor3q_s16(simde_int16x8_t a, simde_int16x8_t b, simde_int16x8_t c) {
return simde_int16x8_from_private(r_);
#endif
}
#if defined(SIMDE_ARM_NEON_A64V8_ENABLE_NATIVE_ALIASES)
#if defined(SIMDE_ARM_NEON_A64V8_ENABLE_NATIVE_ALIASES) || (defined(SIMDE_ENABLE_NATIVE_ALIASES) && \
!(defined(SIMDE_ARCH_ARM_SHA3)))
#undef veor3q_s16
#define veor3q_s16(a, b, c) simde_veor3q_s16((a), (b), (c))
#endif
......@@ -670,7 +672,8 @@ simde_veor3q_s32(simde_int32x4_t a, simde_int32x4_t b, simde_int32x4_t c) {
return simde_int32x4_from_private(r_);
#endif
}
#if defined(SIMDE_ARM_NEON_A64V8_ENABLE_NATIVE_ALIASES)
#if defined(SIMDE_ARM_NEON_A64V8_ENABLE_NATIVE_ALIASES) || (defined(SIMDE_ENABLE_NATIVE_ALIASES) && \
!(defined(SIMDE_ARCH_ARM_SHA3)))
#undef veor3q_s32
#define veor3q_s32(a, b, c) simde_veor3q_s32((a), (b), (c))
#endif
......@@ -701,7 +704,8 @@ simde_veor3q_s64(simde_int64x2_t a, simde_int64x2_t b, simde_int64x2_t c) {
return simde_int64x2_from_private(r_);
#endif
}
#if defined(SIMDE_ARM_NEON_A64V8_ENABLE_NATIVE_ALIASES)
#if defined(SIMDE_ARM_NEON_A64V8_ENABLE_NATIVE_ALIASES) || (defined(SIMDE_ENABLE_NATIVE_ALIASES) && \
!(defined(SIMDE_ARCH_ARM_SHA3)))
#undef veor3q_s64
#define veor3q_s64(a, b, c) simde_veor3q_s64((a), (b), (c))
#endif
......@@ -732,7 +736,8 @@ simde_veor3q_u8(simde_uint8x16_t a, simde_uint8x16_t b, simde_uint8x16_t c) {
return simde_uint8x16_from_private(r_);
#endif
}
#if defined(SIMDE_ARM_NEON_A64V8_ENABLE_NATIVE_ALIASES)
#if defined(SIMDE_ARM_NEON_A64V8_ENABLE_NATIVE_ALIASES) || (defined(SIMDE_ENABLE_NATIVE_ALIASES) && \
!(defined(SIMDE_ARCH_ARM_SHA3)))
#undef veor3q_u8
#define veor3q_u8(a, b, c) simde_veor3q_u8((a), (b), (c))
#endif
......@@ -763,7 +768,8 @@ simde_veor3q_u16(simde_uint16x8_t a, simde_uint16x8_t b, simde_uint16x8_t c) {
return simde_uint16x8_from_private(r_);
#endif
}
#if defined(SIMDE_ARM_NEON_A64V8_ENABLE_NATIVE_ALIASES)
#if defined(SIMDE_ARM_NEON_A64V8_ENABLE_NATIVE_ALIASES) || (defined(SIMDE_ENABLE_NATIVE_ALIASES) && \
!(defined(SIMDE_ARCH_ARM_SHA3)))
#undef veor3q_u16
#define veor3q_u16(a, b, c) simde_veor3q_u16((a), (b), (c))
#endif
......@@ -794,7 +800,8 @@ simde_veor3q_u32(simde_uint32x4_t a, simde_uint32x4_t b, simde_uint32x4_t c) {
return simde_uint32x4_from_private(r_);
#endif
}
#if defined(SIMDE_ARM_NEON_A64V8_ENABLE_NATIVE_ALIASES)
#if defined(SIMDE_ARM_NEON_A64V8_ENABLE_NATIVE_ALIASES) || (defined(SIMDE_ENABLE_NATIVE_ALIASES) && \
!(defined(SIMDE_ARCH_ARM_SHA3)))
#undef veor3q_u32
#define veor3q_u32(a, b, c) simde_veor3q_u32((a), (b), (c))
#endif
......@@ -825,7 +832,8 @@ simde_veor3q_u64(simde_uint64x2_t a, simde_uint64x2_t b, simde_uint64x2_t c) {
return simde_uint64x2_from_private(r_);
#endif
}
#if defined(SIMDE_ARM_NEON_A64V8_ENABLE_NATIVE_ALIASES)
#if defined(SIMDE_ARM_NEON_A64V8_ENABLE_NATIVE_ALIASES) || (defined(SIMDE_ENABLE_NATIVE_ALIASES) && \
!(defined(SIMDE_ARCH_ARM_SHA3)))
#undef veor3q_u64
#define veor3q_u64(a, b, c) simde_veor3q_u64((a), (b), (c))
#endif
......
arm/neon/ext.h
View file @ 8c421df1
......@@ -61,7 +61,8 @@ simde_vext_f16(simde_float16x4_t a, simde_float16x4_t b, const int n)
return simde_float16x4_from_private(r_);
#endif
}
#if defined(SIMDE_ARM_NEON_A32V7_ENABLE_NATIVE_ALIASES)
#if defined(SIMDE_ARM_NEON_A32V7_ENABLE_NATIVE_ALIASES) || (defined(SIMDE_ENABLE_NATIVE_ALIASES) && \
!(defined(SIMDE_ARM_NEON_FP16)))
#undef vext_f16
#define vext_f16(a, b, n) simde_vext_f16((a), (b), (n))
#endif
......@@ -507,7 +508,8 @@ simde_vextq_f16(simde_float16x8_t a, simde_float16x8_t b, const int n)
return simde_float16x8_from_private(r_);
#endif
}
#if defined(SIMDE_ARM_NEON_A32V7_ENABLE_NATIVE_ALIASES)
#if defined(SIMDE_ARM_NEON_A32V7_ENABLE_NATIVE_ALIASES) || (defined(SIMDE_ENABLE_NATIVE_ALIASES) && \
!(defined(SIMDE_ARM_NEON_FP16)))
#undef vextq_f16
#define vextq_f16(a, b, n) simde_vextq_f16((a), (b), (n))
#endif
......
arm/neon/fma.h
View file @ 8c421df1
......@@ -45,7 +45,8 @@ simde_vfmah_f16(simde_float16_t a, simde_float16_t b, simde_float16_t c) {
return simde_vaddh_f16(a, simde_vmulh_f16(b, c));
#endif
}
#if defined(SIMDE_ARM_NEON_A32V8_ENABLE_NATIVE_ALIASES)
#if defined(SIMDE_ARM_NEON_A32V8_ENABLE_NATIVE_ALIASES) || (defined(SIMDE_ENABLE_NATIVE_ALIASES) && \
!(defined(SIMDE_ARCH_ARM_FMA) && defined(SIMDE_ARM_NEON_FP16)))
#undef vfmah_f16
#define vfmah_f16(a, b, c) simde_vfmah_f16(a, b, c)
#endif
......@@ -68,7 +69,8 @@ simde_vfma_f32(simde_float32x2_t a, simde_float32x2_t b, simde_float32x2_t c) {
return simde_vadd_f32(a, simde_vmul_f32(b, c));
#endif
}
#if defined(SIMDE_ARM_NEON_A32V7_ENABLE_NATIVE_ALIASES)
#if defined(SIMDE_ARM_NEON_A32V7_ENABLE_NATIVE_ALIASES) || (defined(SIMDE_ENABLE_NATIVE_ALIASES) && \
!(defined(SIMDE_ARCH_ARM_FMA)))
#undef vfma_f32
#define vfma_f32(a, b, c) simde_vfma_f32(a, b, c)
#endif
......@@ -91,7 +93,8 @@ simde_vfma_f64(simde_float64x1_t a, simde_float64x1_t b, simde_float64x1_t c) {
return simde_vadd_f64(a, simde_vmul_f64(b, c));
#endif
}
#if defined(SIMDE_ARM_NEON_A32V7_ENABLE_NATIVE_ALIASES)
#if defined(SIMDE_ARM_NEON_A64V8_ENABLE_NATIVE_ALIASES) || (defined(SIMDE_ENABLE_NATIVE_ALIASES) && \
!(defined(SIMDE_ARCH_ARM_FMA)))
#undef vfma_f64
#define vfma_f64(a, b, c) simde_vfma_f64(a, b, c)
#endif
......@@ -114,7 +117,8 @@ simde_vfma_f16(simde_float16x4_t a, simde_float16x4_t b, simde_float16x4_t c) {
return simde_vadd_f16(a, simde_vmul_f16(b, c));
#endif
}
#if defined(SIMDE_ARM_NEON_A32V8_ENABLE_NATIVE_ALIASES)
#if defined(SIMDE_ARM_NEON_A32V8_ENABLE_NATIVE_ALIASES) || (defined(SIMDE_ENABLE_NATIVE_ALIASES) && \
!(defined(SIMDE_ARCH_ARM_FMA) && defined(SIMDE_ARM_NEON_FP16)))
#undef vfma_f16
#define vfma_f16(a, b, c) simde_vfma_f16(a, b, c)
#endif
......@@ -137,7 +141,8 @@ simde_vfmaq_f16(simde_float16x8_t a, simde_float16x8_t b, simde_float16x8_t c) {
return simde_vaddq_f16(a, simde_vmulq_f16(b, c));
#endif
}
#if defined(SIMDE_ARM_NEON_A32V8_ENABLE_NATIVE_ALIASES)
#if defined(SIMDE_ARM_NEON_A32V8_ENABLE_NATIVE_ALIASES) || (defined(SIMDE_ENABLE_NATIVE_ALIASES) && \
!(defined(SIMDE_ARCH_ARM_FMA) && defined(SIMDE_ARM_NEON_FP16)))
#undef vfmaq_f16
#define vfmaq_f16(a, b, c) simde_vfmaq_f16(a, b, c)
#endif
......@@ -168,7 +173,8 @@ simde_vfmaq_f32(simde_float32x4_t a, simde_float32x4_t b, simde_float32x4_t c) {
return simde_vaddq_f32(a, simde_vmulq_f32(b, c));
#endif
}
#if defined(SIMDE_ARM_NEON_A32V7_ENABLE_NATIVE_ALIASES)
#if defined(SIMDE_ARM_NEON_A32V7_ENABLE_NATIVE_ALIASES) || (defined(SIMDE_ENABLE_NATIVE_ALIASES) && \
!(defined(SIMDE_ARCH_ARM_FMA)))
#undef vfmaq_f32
#define vfmaq_f32(a, b, c) simde_vfmaq_f32(a, b, c)
#endif
......@@ -199,7 +205,8 @@ simde_vfmaq_f64(simde_float64x2_t a, simde_float64x2_t b, simde_float64x2_t c) {
return simde_vaddq_f64(a, simde_vmulq_f64(b, c));
#endif
}
#if defined(SIMDE_ARM_NEON_A32V7_ENABLE_NATIVE_ALIASES)
#if defined(SIMDE_ARM_NEON_A64V8_ENABLE_NATIVE_ALIASES) || (defined(SIMDE_ENABLE_NATIVE_ALIASES) && \
!(defined(SIMDE_ARCH_ARM_FMA)))
#undef vfmaq_f64
#define vfmaq_f64(a, b, c) simde_vfmaq_f64(a, b, c)
#endif
......
arm/neon/fma_lane.h
View file @ 8c421df1
......@@ -56,7 +56,8 @@ SIMDE_BEGIN_DECLS_
0 \
)
#endif
#if defined(SIMDE_ARM_NEON_A64V8_ENABLE_NATIVE_ALIASES)
#if defined(SIMDE_ARM_NEON_A64V8_ENABLE_NATIVE_ALIASES) || (defined(SIMDE_ENABLE_NATIVE_ALIASES) && \
!(defined(SIMDE_ARCH_ARM_FMA)))
#undef vfmad_lane_f64
#define vfmad_lane_f64(a, b, v, lane) simde_vfmad_lane_f64(a, b, v, lane)
#endif
......@@ -79,7 +80,8 @@ SIMDE_BEGIN_DECLS_
0 \
)
#endif
#if defined(SIMDE_ARM_NEON_A64V8_ENABLE_NATIVE_ALIASES)
#if defined(SIMDE_ARM_NEON_A64V8_ENABLE_NATIVE_ALIASES) || (defined(SIMDE_ENABLE_NATIVE_ALIASES) && \
!(defined(SIMDE_ARCH_ARM_FMA)))
#undef vfmad_laneq_f64
#define vfmad_laneq_f64(a, b, v, lane) simde_vfmad_laneq_f64(a, b, v, lane)
#endif
......@@ -102,7 +104,8 @@ SIMDE_BEGIN_DECLS_
0 \
)
#endif
#if defined(SIMDE_ARM_NEON_A64V8_ENABLE_NATIVE_ALIASES)
#if defined(SIMDE_ARM_NEON_A64V8_ENABLE_NATIVE_ALIASES) || (defined(SIMDE_ENABLE_NATIVE_ALIASES) && \
!(defined(SIMDE_ARCH_ARM_FMA) && defined(SIMDE_ARM_NEON_FP16)))
#undef vfmah_lane_f16
#define vfmah_lane_f16(a, b, v, lane) simde_vfmah_lane_f16(a, b, v, lane)
#endif
......@@ -125,7 +128,8 @@ SIMDE_BEGIN_DECLS_
0 \
)
#endif
#if defined(SIMDE_ARM_NEON_A64V8_ENABLE_NATIVE_ALIASES)
#if defined(SIMDE_ARM_NEON_A64V8_ENABLE_NATIVE_ALIASES) || (defined(SIMDE_ENABLE_NATIVE_ALIASES) && \
!(defined(SIMDE_ARCH_ARM_FMA) && defined(SIMDE_ARM_NEON_FP16)))
#undef vfmah_laneq_f16
#define vfmah_laneq_f16(a, b, v, lane) simde_vfmah_laneq_f16(a, b, v, lane)
#endif
......@@ -148,7 +152,8 @@ SIMDE_BEGIN_DECLS_
0 \
)
#endif
#if defined(SIMDE_ARM_NEON_A64V8_ENABLE_NATIVE_ALIASES)
#if defined(SIMDE_ARM_NEON_A64V8_ENABLE_NATIVE_ALIASES) || (defined(SIMDE_ENABLE_NATIVE_ALIASES) && \
!(defined(SIMDE_ARCH_ARM_FMA)))
#undef vfmas_lane_f32
#define vfmas_lane_f32(a, b, v, lane) simde_vfmas_lane_f32(a, b, v, lane)
#endif
......@@ -171,7 +176,8 @@ SIMDE_BEGIN_DECLS_
0 \
)
#endif
#if defined(SIMDE_ARM_NEON_A64V8_ENABLE_NATIVE_ALIASES)
#if defined(SIMDE_ARM_NEON_A64V8_ENABLE_NATIVE_ALIASES) || (defined(SIMDE_ENABLE_NATIVE_ALIASES) && \
!(defined(SIMDE_ARCH_ARM_FMA)))
#undef vfmas_laneq_f32
#define vfmas_laneq_f32(a, b, v, lane) simde_vfmas_laneq_f32(a, b, v, lane)
#endif
......@@ -182,7 +188,8 @@ SIMDE_BEGIN_DECLS_
#else
#define simde_vfma_lane_f16(a, b, v, lane) simde_vadd_f16(a, simde_vmul_lane_f16(b, v, lane))
#endif
#if defined(SIMDE_ARM_NEON_A64V8_ENABLE_NATIVE_ALIASES)
#if defined(SIMDE_ARM_NEON_A64V8_ENABLE_NATIVE_ALIASES) || (defined(SIMDE_ENABLE_NATIVE_ALIASES) && \
!(defined(SIMDE_ARCH_ARM_FMA) && defined(SIMDE_ARM_NEON_FP16)))
#undef vfma_lane_f16
#define vfma_lane_f16(a, b, v, lane) simde_vfma_lane_f16(a, b, v, lane)
#endif
......@@ -193,7 +200,8 @@ SIMDE_BEGIN_DECLS_
#else
#define simde_vfma_lane_f32(a, b, v, lane) simde_vadd_f32(a, simde_vmul_lane_f32(b, v, lane))
#endif
#if defined(SIMDE_ARM_NEON_A64V8_ENABLE_NATIVE_ALIASES)
#if defined(SIMDE_ARM_NEON_A64V8_ENABLE_NATIVE_ALIASES) || (defined(SIMDE_ENABLE_NATIVE_ALIASES) && \
!(defined(SIMDE_ARCH_ARM_FMA)))
#undef vfma_lane_f32
#define vfma_lane_f32(a, b, v, lane) simde_vfma_lane_f32(a, b, v, lane)
#endif
......@@ -204,7 +212,8 @@ SIMDE_BEGIN_DECLS_
#else
#define simde_vfma_lane_f64(a, b, v, lane) simde_vadd_f64(a, simde_vmul_lane_f64(b, v, lane))
#endif
#if defined(SIMDE_ARM_NEON_A64V8_ENABLE_NATIVE_ALIASES)
#if defined(SIMDE_ARM_NEON_A64V8_ENABLE_NATIVE_ALIASES) || (defined(SIMDE_ENABLE_NATIVE_ALIASES) && \
!(defined(SIMDE_ARCH_ARM_FMA)))
#undef vfma_lane_f64
#define vfma_lane_f64(a, b, v, lane) simde_vfma_lane_f64(a, b, v, lane)
#endif
......@@ -215,7 +224,8 @@ SIMDE_BEGIN_DECLS_
#else
#define simde_vfma_laneq_f16(a, b, v, lane) simde_vadd_f16(a, simde_vmul_laneq_f16(b, v, lane))
#endif
#if defined(SIMDE_ARM_NEON_A64V8_ENABLE_NATIVE_ALIASES)
#if defined(SIMDE_ARM_NEON_A64V8_ENABLE_NATIVE_ALIASES) || (defined(SIMDE_ENABLE_NATIVE_ALIASES) && \
!(defined(SIMDE_ARCH_ARM_FMA) && defined(SIMDE_ARM_NEON_FP16)))
#undef vfma_laneq_f16
#define vfma_laneq_f16(a, b, v, lane) simde_vfma_laneq_f16(a, b, v, lane)
#endif
......@@ -226,7 +236,8 @@ SIMDE_BEGIN_DECLS_
#else
#define simde_vfma_laneq_f32(a, b, v, lane) simde_vadd_f32(a, simde_vmul_laneq_f32(b, v, lane))
#endif
#if defined(SIMDE_ARM_NEON_A64V8_ENABLE_NATIVE_ALIASES)
#if defined(SIMDE_ARM_NEON_A64V8_ENABLE_NATIVE_ALIASES) || (defined(SIMDE_ENABLE_NATIVE_ALIASES) && \
!(defined(SIMDE_ARCH_ARM_FMA)))
#undef vfma_laneq_f32
#define vfma_laneq_f32(a, b, v, lane) simde_vfma_laneq_f32(a, b, v, lane)
#endif
......@@ -237,7 +248,8 @@ SIMDE_BEGIN_DECLS_
#else
#define simde_vfma_laneq_f64(a, b, v, lane) simde_vadd_f64(a, simde_vmul_laneq_f64(b, v, lane))
#endif
#if defined(SIMDE_ARM_NEON_A64V8_ENABLE_NATIVE_ALIASES)
#if defined(SIMDE_ARM_NEON_A64V8_ENABLE_NATIVE_ALIASES) || (defined(SIMDE_ENABLE_NATIVE_ALIASES) && \
!(defined(SIMDE_ARCH_ARM_FMA)))
#undef vfma_laneq_f64
#define vfma_laneq_f64(a, b, v, lane) simde_vfma_laneq_f64(a, b, v, lane)
#endif
......@@ -248,7 +260,8 @@ SIMDE_BEGIN_DECLS_
#else
#define simde_vfmaq_lane_f64(a, b, v, lane) simde_vaddq_f64(a, simde_vmulq_lane_f64(b, v, lane))
#endif
#if defined(SIMDE_ARM_NEON_A64V8_ENABLE_NATIVE_ALIASES)
#if defined(SIMDE_ARM_NEON_A64V8_ENABLE_NATIVE_ALIASES) || (defined(SIMDE_ENABLE_NATIVE_ALIASES) && \
!(defined(SIMDE_ARCH_ARM_FMA)))
#undef vfmaq_lane_f64
#define vfmaq_lane_f64(a, b, v, lane) simde_vfmaq_lane_f64(a, b, v, lane)
#endif
......@@ -259,7 +272,8 @@ SIMDE_BEGIN_DECLS_
#else
#define simde_vfmaq_lane_f16(a, b, v, lane) simde_vaddq_f16(a, simde_vmulq_lane_f16(b, v, lane))
#endif
#if defined(SIMDE_ARM_NEON_A64V8_ENABLE_NATIVE_ALIASES)
#if defined(SIMDE_ARM_NEON_A64V8_ENABLE_NATIVE_ALIASES) || (defined(SIMDE_ENABLE_NATIVE_ALIASES) && \
!(defined(SIMDE_ARCH_ARM_FMA) && defined(SIMDE_ARM_NEON_FP16)))
#undef vfmaq_lane_f16
#define vfmaq_lane_f16(a, b, v, lane) simde_vfmaq_lane_f16(a, b, v, lane)
#endif
......@@ -270,7 +284,8 @@ SIMDE_BEGIN_DECLS_
#else
#define simde_vfmaq_lane_f32(a, b, v, lane) simde_vaddq_f32(a, simde_vmulq_lane_f32(b, v, lane))
#endif
#if defined(SIMDE_ARM_NEON_A64V8_ENABLE_NATIVE_ALIASES)
#if defined(SIMDE_ARM_NEON_A64V8_ENABLE_NATIVE_ALIASES) || (defined(SIMDE_ENABLE_NATIVE_ALIASES) && \
!(defined(SIMDE_ARCH_ARM_FMA)))
#undef vfmaq_lane_f32
#define vfmaq_lane_f32(a, b, v, lane) simde_vfmaq_lane_f32(a, b, v, lane)
#endif
......@@ -282,7 +297,8 @@ SIMDE_BEGIN_DECLS_
#define simde_vfmaq_laneq_f16(a, b, v, lane) \
simde_vaddq_f16(a, simde_vmulq_laneq_f16(b, v, lane))
#endif
#if defined(SIMDE_ARM_NEON_A64V8_ENABLE_NATIVE_ALIASES)
#if defined(SIMDE_ARM_NEON_A64V8_ENABLE_NATIVE_ALIASES) || (defined(SIMDE_ENABLE_NATIVE_ALIASES) && \
!(defined(SIMDE_ARCH_ARM_FMA) && defined(SIMDE_ARM_NEON_FP16)))
#undef vfmaq_laneq_f16
#define vfmaq_laneq_f16(a, b, v, lane) simde_vfmaq_laneq_f16(a, b, v, lane)
#endif
......@@ -294,7 +310,8 @@ SIMDE_BEGIN_DECLS_
#define simde_vfmaq_laneq_f32(a, b, v, lane) \
simde_vaddq_f32(a, simde_vmulq_laneq_f32(b, v, lane))
#endif
#if defined(SIMDE_ARM_NEON_A64V8_ENABLE_NATIVE_ALIASES)
#if defined(SIMDE_ARM_NEON_A64V8_ENABLE_NATIVE_ALIASES) || (defined(SIMDE_ENABLE_NATIVE_ALIASES) && \
!(defined(SIMDE_ARCH_ARM_FMA)))
#undef vfmaq_laneq_f32
#define vfmaq_laneq_f32(a, b, v, lane) simde_vfmaq_laneq_f32(a, b, v, lane)
#endif
......@@ -306,7 +323,8 @@ SIMDE_BEGIN_DECLS_
#define simde_vfmaq_laneq_f64(a, b, v, lane) \
simde_vaddq_f64(a, simde_vmulq_laneq_f64(b, v, lane))
#endif
#if defined(SIMDE_ARM_NEON_A64V8_ENABLE_NATIVE_ALIASES)
#if defined(SIMDE_ARM_NEON_A64V8_ENABLE_NATIVE_ALIASES) || (defined(SIMDE_ENABLE_NATIVE_ALIASES) && \
!(defined(SIMDE_ARCH_ARM_FMA)))
#undef vfmaq_laneq_f64
#define vfmaq_laneq_f64(a, b, v, lane) simde_vfmaq_laneq_f64(a, b, v, lane)
#endif
......
arm/neon/fma_n.h
View file @ 8c421df1
......@@ -45,7 +45,8 @@ simde_vfma_n_f16(simde_float16x4_t a, simde_float16x4_t b, simde_float16_t c) {
return simde_vfma_f16(a, b, simde_vdup_n_f16(c));
#endif
}
#if defined(SIMDE_ARM_NEON_A64V8_ENABLE_NATIVE_ALIASES)
#if defined(SIMDE_ARM_NEON_A64V8_ENABLE_NATIVE_ALIASES) || (defined(SIMDE_ENABLE_NATIVE_ALIASES) && \
!(defined(SIMDE_ARCH_ARM_FMA) && (!defined(__clang__) || SIMDE_DETECT_CLANG_VERSION_CHECK(7,0,0)) && !defined(SIMDE_BUG_GCC_95399) && defined(SIMDE_ARM_NEON_FP16)))
#undef vfma_n_f16
#define vfma_n_f16(a, b, c) simde_vfma_n_f16(a, b, c)
#endif
......@@ -59,7 +60,8 @@ simde_vfmaq_n_f16(simde_float16x8_t a, simde_float16x8_t b, simde_float16_t c) {
return simde_vfmaq_f16(a, b, simde_vdupq_n_f16(c));
#endif
}
#if defined(SIMDE_ARM_NEON_A64V8_ENABLE_NATIVE_ALIASES)
#if defined(SIMDE_ARM_NEON_A64V8_ENABLE_NATIVE_ALIASES) || (defined(SIMDE_ENABLE_NATIVE_ALIASES) && \
!(defined(SIMDE_ARCH_ARM_FMA) && (!defined(__clang__) || SIMDE_DETECT_CLANG_VERSION_CHECK(7,0,0)) && !defined(SIMDE_BUG_GCC_95399) && defined(SIMDE_ARM_NEON_FP16)))
#undef vfmaq_n_f16
#define vfmaq_n_f16(a, b, c) simde_vfmaq_n_f16(a, b, c)
#endif
......@@ -73,7 +75,8 @@ simde_vfma_n_f32(simde_float32x2_t a, simde_float32x2_t b, simde_float32_t c) {
return simde_vfma_f32(a, b, simde_vdup_n_f32(c));
#endif
}
#if defined(SIMDE_ARM_NEON_A32V7_ENABLE_NATIVE_ALIASES)
#if defined(SIMDE_ARM_NEON_A32V7_ENABLE_NATIVE_ALIASES) || (defined(SIMDE_ENABLE_NATIVE_ALIASES) && \
!(defined(SIMDE_ARCH_ARM_FMA) && (!defined(__clang__) || SIMDE_DETECT_CLANG_VERSION_CHECK(7,0,0)) && !defined(SIMDE_BUG_GCC_95399)))
#undef vfma_n_f32
#define vfma_n_f32(a, b, c) simde_vfma_n_f32(a, b, c)
#endif
......@@ -87,7 +90,8 @@ simde_vfma_n_f64(simde_float64x1_t a, simde_float64x1_t b, simde_float64_t c) {
return simde_vfma_f64(a, b, simde_vdup_n_f64(c));
#endif
}
#if defined(SIMDE_ARM_NEON_A32V7_ENABLE_NATIVE_ALIASES)
#if defined(SIMDE_ARM_NEON_A64V8_ENABLE_NATIVE_ALIASES) || (defined(SIMDE_ENABLE_NATIVE_ALIASES) && \
!(defined(SIMDE_ARCH_ARM_FMA) && (!defined(__clang__) || SIMDE_DETECT_CLANG_VERSION_CHECK(7,0,0))))
#undef vfma_n_f64
#define vfma_n_f64(a, b, c) simde_vfma_n_f64(a, b, c)
#endif
......@@ -101,7 +105,8 @@ simde_vfmaq_n_f32(simde_float32x4_t a, simde_float32x4_t b, simde_float32_t c) {
return simde_vfmaq_f32(a, b, simde_vdupq_n_f32(c));
#endif
}
#if defined(SIMDE_ARM_NEON_A32V7_ENABLE_NATIVE_ALIASES)
#if defined(SIMDE_ARM_NEON_A32V7_ENABLE_NATIVE_ALIASES) || (defined(SIMDE_ENABLE_NATIVE_ALIASES) && \
!(defined(SIMDE_ARCH_ARM_FMA) && (!defined(__clang__) || SIMDE_DETECT_CLANG_VERSION_CHECK(7,0,0)) && !defined(SIMDE_BUG_GCC_95399)))
#undef vfmaq_n_f32
#define vfmaq_n_f32(a, b, c) simde_vfmaq_n_f32(a, b, c)
#endif
......@@ -115,7 +120,8 @@ simde_vfmaq_n_f64(simde_float64x2_t a, simde_float64x2_t b, simde_float64_t c) {
return simde_vfmaq_f64(a, b, simde_vdupq_n_f64(c));
#endif
}
#if defined(SIMDE_ARM_NEON_A32V7_ENABLE_NATIVE_ALIASES)
#if defined(SIMDE_ARM_NEON_A64V8_ENABLE_NATIVE_ALIASES) || (defined(SIMDE_ENABLE_NATIVE_ALIASES) && \
!(defined(SIMDE_ARCH_ARM_FMA) && (!defined(__clang__) || SIMDE_DETECT_CLANG_VERSION_CHECK(7,0,0))))
#undef vfmaq_n_f64
#define vfmaq_n_f64(a, b, c) simde_vfmaq_n_f64(a, b, c)
#endif
......
arm/neon/fmlal.h
View file @ 8c421df1
This diff is collapsed.
arm/neon/fmlsl.h
View file @ 8c421df1
......@@ -55,7 +55,9 @@ simde_vfmlsl_low_f16(simde_float32x2_t r, simde_float16x4_t a, simde_float16x4_t
return simde_float32x2_from_private(ret_);
#endif
}
#if defined(SIMDE_ARM_NEON_A32V8_ENABLE_NATIVE_ALIASES)
#if defined(SIMDE_ARM_NEON_A32V8_ENABLE_NATIVE_ALIASES) || (defined(SIMDE_ENABLE_NATIVE_ALIASES) && \
!(defined(SIMDE_ARM_NEON_FP16) && \
defined(SIMDE_ARCH_ARM_FP16_FML)))
#undef vfmlsl_low_f16
#define vfmlsl_low_f16(r, a, b) simde_vfmlsl_low_f16((r), (a), (b))
#endif
......@@ -82,7 +84,9 @@ simde_vfmlslq_low_f16(simde_float32x4_t r, simde_float16x8_t a, simde_float16x8_
return simde_float32x4_from_private(ret_);
#endif
}
#if defined(SIMDE_ARM_NEON_A32V8_ENABLE_NATIVE_ALIASES)
#if defined(SIMDE_ARM_NEON_A32V8_ENABLE_NATIVE_ALIASES) || (defined(SIMDE_ENABLE_NATIVE_ALIASES) && \
!(defined(SIMDE_ARM_NEON_FP16) && \
defined(SIMDE_ARCH_ARM_FP16_FML)))
#undef vfmlslq_low_f16
#define vfmlslq_low_f16(r, a, b) simde_vfmlslq_low_f16((r), (a), (b))
#endif
......@@ -110,7 +114,9 @@ simde_vfmlsl_high_f16(simde_float32x2_t r, simde_float16x4_t a, simde_float16x4_
return simde_float32x2_from_private(ret_);
#endif
}
#if defined(SIMDE_ARM_NEON_A32V8_ENABLE_NATIVE_ALIASES)
#if defined(SIMDE_ARM_NEON_A32V8_ENABLE_NATIVE_ALIASES) || (defined(SIMDE_ENABLE_NATIVE_ALIASES) && \
!(defined(SIMDE_ARM_NEON_FP16) && \
defined(SIMDE_ARCH_ARM_FP16_FML)))
#undef vfmlsl_high_f16
#define vfmlsl_high_f16(r, a, b) simde_vfmlsl_high_f16((r), (a), (b))
#endif
......@@ -138,7 +144,9 @@ simde_vfmlslq_high_f16(simde_float32x4_t r, simde_float16x8_t a, simde_float16x8
return simde_float32x4_from_private(ret_);
#endif
}
#if defined(SIMDE_ARM_NEON_A32V8_ENABLE_NATIVE_ALIASES)
#if defined(SIMDE_ARM_NEON_A32V8_ENABLE_NATIVE_ALIASES) || (defined(SIMDE_ENABLE_NATIVE_ALIASES) && \
!(defined(SIMDE_ARM_NEON_FP16) && \
defined(SIMDE_ARCH_ARM_FP16_FML)))
#undef vfmlslq_high_f16
#define vfmlslq_high_f16(r, a, b) simde_vfmlslq_high_f16((r), (a), (b))
#endif
......@@ -165,7 +173,9 @@ simde_vfmlsl_lane_low_f16(simde_float32x2_t r, simde_float16x4_t a, simde_float1
defined(SIMDE_ARCH_ARM_FP16_FML)
#define simde_vfmlsl_lane_low_f16(r, a, b, lane) vfmlsl_lane_low_f16((r), (a), (b), (lane));
#endif
#if defined(SIMDE_ARM_NEON_A32V8_ENABLE_NATIVE_ALIASES)
#if defined(SIMDE_ARM_NEON_A32V8_ENABLE_NATIVE_ALIASES) || (defined(SIMDE_ENABLE_NATIVE_ALIASES) && \
!(defined(SIMDE_ARM_NEON_FP16) && \
defined(SIMDE_ARCH_ARM_FP16_FML)))
#undef vfmlsl_lane_low_f16
#define vfmlsl_lane_low_f16(r, a, b, lane) simde_vfmlsl_lane_low_f16((r), (a), (b), (lane));
#endif
......@@ -193,7 +203,9 @@ simde_vfmlsl_laneq_low_f16(simde_float32x2_t r, simde_float16x4_t a, simde_float
defined(SIMDE_ARCH_ARM_FP16_FML)
#define simde_vfmlsl_laneq_low_f16(r, a, b, lane) vfmlsl_laneq_low_f16((r), (a), (b), (lane));
#endif
#if defined(SIMDE_ARM_NEON_A32V8_ENABLE_NATIVE_ALIASES)
#if defined(SIMDE_ARM_NEON_A32V8_ENABLE_NATIVE_ALIASES) || (defined(SIMDE_ENABLE_NATIVE_ALIASES) && \
!(defined(SIMDE_ARM_NEON_FP16) && \
defined(SIMDE_ARCH_ARM_FP16_FML)))
#undef vfmlsl_laneq_low_f16
#define vfmlsl_laneq_low_f16(r, a, b, lane) simde_vfmlsl_laneq_low_f16((r), (a), (b), (lane));
#endif
......@@ -221,7 +233,9 @@ simde_vfmlslq_lane_low_f16(simde_float32x4_t r, simde_float16x8_t a, simde_float
defined(SIMDE_ARCH_ARM_FP16_FML)
#define simde_vfmlslq_lane_low_f16(r, a, b, lane) vfmlslq_lane_low_f16((r), (a), (b), (lane));
#endif
#if defined(SIMDE_ARM_NEON_A32V8_ENABLE_NATIVE_ALIASES)
#if defined(SIMDE_ARM_NEON_A32V8_ENABLE_NATIVE_ALIASES) || (defined(SIMDE_ENABLE_NATIVE_ALIASES) && \
!(defined(SIMDE_ARM_NEON_FP16) && \
defined(SIMDE_ARCH_ARM_FP16_FML)))
#undef vfmlslq_lane_low_f16
#define vfmlslq_lane_low_f16(r, a, b, lane) simde_vfmlslq_lane_low_f16((r), (a), (b), (lane));
#endif
......@@ -248,7 +262,9 @@ simde_vfmlslq_laneq_low_f16(simde_float32x4_t r, simde_float16x8_t a, simde_floa
defined(SIMDE_ARCH_ARM_FP16_FML)
#define simde_vfmlslq_laneq_low_f16(r, a, b, lane) vfmlslq_laneq_low_f16((r), (a), (b), (lane));
#endif
#if defined(SIMDE_ARM_NEON_A32V8_ENABLE_NATIVE_ALIASES)
#if defined(SIMDE_ARM_NEON_A32V8_ENABLE_NATIVE_ALIASES) || (defined(SIMDE_ENABLE_NATIVE_ALIASES) && \
!(defined(SIMDE_ARM_NEON_FP16) && \
defined(SIMDE_ARCH_ARM_FP16_FML)))
#undef vfmlslq_laneq_low_f16
#define vfmlslq_laneq_low_f16(r, a, b, lane) simde_vfmlslq_laneq_low_f16((r), (a), (b), (lane));
#endif
......@@ -276,7 +292,9 @@ simde_vfmlsl_lane_high_f16(simde_float32x2_t r, simde_float16x4_t a, simde_float
defined(SIMDE_ARCH_ARM_FP16_FML)
#define simde_vfmlsl_lane_high_f16(r, a, b, lane) vfmlsl_lane_high_f16((r), (a), (b), (lane));
#endif
#if defined(SIMDE_ARM_NEON_A32V8_ENABLE_NATIVE_ALIASES)
#if defined(SIMDE_ARM_NEON_A32V8_ENABLE_NATIVE_ALIASES) || (defined(SIMDE_ENABLE_NATIVE_ALIASES) && \
!(defined(SIMDE_ARM_NEON_FP16) && \
defined(SIMDE_ARCH_ARM_FP16_FML)))
#undef vfmlsl_lane_high_f16
#define vfmlsl_lane_high_f16(r, a, b, lane) simde_vfmlsl_lane_high_f16((r), (a), (b), (lane));
#endif
......@@ -305,7 +323,9 @@ simde_vfmlsl_laneq_high_f16(simde_float32x2_t r, simde_float16x4_t a, simde_floa
defined(SIMDE_ARCH_ARM_FP16_FML)
#define simde_vfmlsl_laneq_high_f16(r, a, b, lane) vfmlsl_laneq_high_f16((r), (a), (b), (lane));
#endif
#if defined(SIMDE_ARM_NEON_A32V8_ENABLE_NATIVE_ALIASES)
#if defined(SIMDE_ARM_NEON_A32V8_ENABLE_NATIVE_ALIASES) || (defined(SIMDE_ENABLE_NATIVE_ALIASES) && \
!(defined(SIMDE_ARM_NEON_FP16) && \
defined(SIMDE_ARCH_ARM_FP16_FML)))
#undef vfmlsl_laneq_high_f16
#define vfmlsl_laneq_high_f16(r, a, b, lane) simde_vfmlsl_laneq_high_f16((r), (a), (b), (lane));
#endif
......@@ -334,7 +354,9 @@ simde_vfmlslq_lane_high_f16(simde_float32x4_t r, simde_float16x8_t a, simde_floa
defined(SIMDE_ARCH_ARM_FP16_FML)
#define simde_vfmlslq_lane_high_f16(r, a, b, lane) vfmlslq_lane_high_f16((r), (a), (b), (lane));
#endif
#if defined(SIMDE_ARM_NEON_A32V8_ENABLE_NATIVE_ALIASES)
#if defined(SIMDE_ARM_NEON_A32V8_ENABLE_NATIVE_ALIASES) || (defined(SIMDE_ENABLE_NATIVE_ALIASES) && \
!(defined(SIMDE_ARM_NEON_FP16) && \
defined(SIMDE_ARCH_ARM_FP16_FML)))
#undef vfmlslq_lane_high_f16
#define vfmlslq_lane_high_f16(r, a, b, lane) simde_vfmlslq_lane_high_f16((r), (a), (b), (lane));
#endif
......@@ -362,7 +384,9 @@ simde_vfmlslq_laneq_high_f16(simde_float32x4_t r, simde_float16x8_t a, simde_flo
defined(SIMDE_ARCH_ARM_FP16_FML)
#define simde_vfmlslq_laneq_high_f16(r, a, b, lane) vfmlslq_laneq_high_f16((r), (a), (b), (lane));
#endif
#if defined(SIMDE_ARM_NEON_A32V8_ENABLE_NATIVE_ALIASES)
#if defined(SIMDE_ARM_NEON_A32V8_ENABLE_NATIVE_ALIASES) || (defined(SIMDE_ENABLE_NATIVE_ALIASES) && \
!(defined(SIMDE_ARM_NEON_FP16) && \
defined(SIMDE_ARCH_ARM_FP16_FML)))
#undef vfmlslq_laneq_high_f16
#define vfmlslq_laneq_high_f16(r, a, b, lane) simde_vfmlslq_laneq_high_f16((r), (a), (b), (lane));
#endif
......
arm/neon/fms.h
View file @ 8c421df1
......@@ -45,7 +45,8 @@ simde_vfmsh_f16(simde_float16_t a, simde_float16_t b, simde_float16_t c) {
return simde_vaddh_f16(a, simde_vnegh_f16(simde_vmulh_f16(b, c)));
#endif
}
#if defined(SIMDE_ARM_NEON_A32V8_ENABLE_NATIVE_ALIASES)
#if defined(SIMDE_ARM_NEON_A32V8_ENABLE_NATIVE_ALIASES) || (defined(SIMDE_ENABLE_NATIVE_ALIASES) && \
!(defined(SIMDE_ARCH_ARM_FMA) && defined(SIMDE_ARM_NEON_FP16)))
#undef vfmsh_f16
#define vfmsh_f16(a, b, c) simde_vfmsh_f16(a, b, c)
#endif
......@@ -67,7 +68,8 @@ simde_vfms_f32(simde_float32x2_t a, simde_float32x2_t b, simde_float32x2_t c) {
return simde_vadd_f32(a, simde_vneg_f32(simde_vmul_f32(b, c)));
#endif
}
#if defined(SIMDE_ARM_NEON_A32V7_ENABLE_NATIVE_ALIASES)
#if defined(SIMDE_ARM_NEON_A32V7_ENABLE_NATIVE_ALIASES) || (defined(SIMDE_ENABLE_NATIVE_ALIASES) && \
!(defined(SIMDE_ARCH_ARM_FMA)))
#undef vfms_f32
#define vfms_f32(a, b, c) simde_vfms_f32(a, b, c)
#endif
......@@ -89,7 +91,8 @@ simde_vfms_f64(simde_float64x1_t a, simde_float64x1_t b, simde_float64x1_t c) {
return simde_vadd_f64(a, simde_vneg_f64(simde_vmul_f64(b, c)));
#endif
}
#if defined(SIMDE_ARM_NEON_A32V7_ENABLE_NATIVE_ALIASES)
#if defined(SIMDE_ARM_NEON_A64V8_ENABLE_NATIVE_ALIASES) || (defined(SIMDE_ENABLE_NATIVE_ALIASES) && \
!(defined(SIMDE_ARCH_ARM_FMA)))
#undef vfms_f64
#define vfms_f64(a, b, c) simde_vfms_f64(a, b, c)
#endif
......@@ -111,7 +114,8 @@ simde_vfms_f16(simde_float16x4_t a, simde_float16x4_t b, simde_float16x4_t c) {
return simde_vadd_f16(a, simde_vneg_f16(simde_vmul_f16(b, c)));
#endif
}
#if defined(SIMDE_ARM_NEON_A32V8_ENABLE_NATIVE_ALIASES)
#if defined(SIMDE_ARM_NEON_A32V8_ENABLE_NATIVE_ALIASES) || (defined(SIMDE_ENABLE_NATIVE_ALIASES) && \
!(defined(SIMDE_ARCH_ARM_FMA) && defined(SIMDE_ARM_NEON_FP16)))
#undef vfms_f16
#define vfms_f16(a, b, c) simde_vfms_f16(a, b, c)
#endif
......@@ -133,7 +137,8 @@ simde_vfmsq_f16(simde_float16x8_t a, simde_float16x8_t b, simde_float16x8_t c) {
return simde_vaddq_f16(a, simde_vnegq_f16(simde_vmulq_f16(b, c)));
#endif
}
#if defined(SIMDE_ARM_NEON_A32V8_ENABLE_NATIVE_ALIASES)
#if defined(SIMDE_ARM_NEON_A32V8_ENABLE_NATIVE_ALIASES) || (defined(SIMDE_ENABLE_NATIVE_ALIASES) && \
!(defined(SIMDE_ARCH_ARM_FMA) && defined(SIMDE_ARM_NEON_FP16)))
#undef vfmsq_f16
#define vfmsq_f16(a, b, c) simde_vfmsq_f16(a, b, c)
#endif
......@@ -155,7 +160,8 @@ simde_vfmsq_f32(simde_float32x4_t a, simde_float32x4_t b, simde_float32x4_t c) {
return simde_vaddq_f32(a, simde_vnegq_f32(simde_vmulq_f32(b, c)));
#endif
}
#if defined(SIMDE_ARM_NEON_A32V7_ENABLE_NATIVE_ALIASES)
#if defined(SIMDE_ARM_NEON_A32V7_ENABLE_NATIVE_ALIASES) || (defined(SIMDE_ENABLE_NATIVE_ALIASES) && \
!(defined(SIMDE_ARCH_ARM_FMA)))
#undef vfmsq_f32
#define vfmsq_f32(a, b, c) simde_vfmsq_f32(a, b, c)
#endif
......@@ -177,7 +183,8 @@ simde_vfmsq_f64(simde_float64x2_t a, simde_float64x2_t b, simde_float64x2_t c) {
return simde_vaddq_f64(a, simde_vnegq_f64(simde_vmulq_f64(b, c)));
#endif
}
#if defined(SIMDE_ARM_NEON_A64V8_ENABLE_NATIVE_ALIASES)
#if defined(SIMDE_ARM_NEON_A64V8_ENABLE_NATIVE_ALIASES) || (defined(SIMDE_ENABLE_NATIVE_ALIASES) && \
!(defined(SIMDE_ARCH_ARM_FMA)))
#undef vfmsq_f64
#define vfmsq_f64(a, b, c) simde_vfmsq_f64(a, b, c)
#endif
......
arm/neon/fms_lane.h
View file @ 8c421df1
......@@ -55,7 +55,8 @@ SIMDE_BEGIN_DECLS_
0 \
)
#endif
#if defined(SIMDE_ARM_NEON_A64V8_ENABLE_NATIVE_ALIASES)
#if defined(SIMDE_ARM_NEON_A64V8_ENABLE_NATIVE_ALIASES) || (defined(SIMDE_ENABLE_NATIVE_ALIASES) && \
!(defined(SIMDE_ARCH_ARM_FMA)))
#undef vfmsd_lane_f64
#define vfmsd_lane_f64(a, b, v, lane) simde_vfmsd_lane_f64(a, b, v, lane)
#endif
......@@ -78,7 +79,8 @@ SIMDE_BEGIN_DECLS_
0 \
)
#endif
#if defined(SIMDE_ARM_NEON_A64V8_ENABLE_NATIVE_ALIASES)
#if defined(SIMDE_ARM_NEON_A64V8_ENABLE_NATIVE_ALIASES) || (defined(SIMDE_ENABLE_NATIVE_ALIASES) && \
!(defined(SIMDE_ARCH_ARM_FMA)))
#undef vfmsd_laneq_f64
#define vfmsd_laneq_f64(a, b, v, lane) simde_vfmsd_laneq_f64(a, b, v, lane)
#endif
......@@ -101,7 +103,8 @@ SIMDE_BEGIN_DECLS_
0 \
)
#endif
#if defined(SIMDE_ARM_NEON_A64V8_ENABLE_NATIVE_ALIASES)
#if defined(SIMDE_ARM_NEON_A64V8_ENABLE_NATIVE_ALIASES) || (defined(SIMDE_ENABLE_NATIVE_ALIASES) && \
!(defined(SIMDE_ARCH_ARM_FMA) && defined(SIMDE_ARM_NEON_FP16)))
#undef vfmsh_lane_f16
#define vfmsh_lane_f16(a, b, v, lane) simde_vfmsh_lane_f16(a, b, v, lane)
#endif
......@@ -124,7 +127,8 @@ SIMDE_BEGIN_DECLS_
0 \
)
#endif
#if defined(SIMDE_ARM_NEON_A64V8_ENABLE_NATIVE_ALIASES)
#if defined(SIMDE_ARM_NEON_A64V8_ENABLE_NATIVE_ALIASES) || (defined(SIMDE_ENABLE_NATIVE_ALIASES) && \
!(defined(SIMDE_ARCH_ARM_FMA) && defined(SIMDE_ARM_NEON_FP16)))
#undef vfmsh_laneq_f16
#define vfmsh_laneq_f16(a, b, v, lane) simde_vfmsh_laneq_f16(a, b, v, lane)
#endif
......@@ -147,7 +151,8 @@ SIMDE_BEGIN_DECLS_
0 \
)
#endif
#if defined(SIMDE_ARM_NEON_A64V8_ENABLE_NATIVE_ALIASES)
#if defined(SIMDE_ARM_NEON_A64V8_ENABLE_NATIVE_ALIASES) || (defined(SIMDE_ENABLE_NATIVE_ALIASES) && \
!(defined(SIMDE_ARCH_ARM_FMA)))
#undef vfmss_lane_f32
#define vfmss_lane_f32(a, b, v, lane) simde_vfmss_lane_f32(a, b, v, lane)
#endif
......@@ -170,7 +175,8 @@ SIMDE_BEGIN_DECLS_
0 \
)
#endif
#if defined(SIMDE_ARM_NEON_A64V8_ENABLE_NATIVE_ALIASES)
#if defined(SIMDE_ARM_NEON_A64V8_ENABLE_NATIVE_ALIASES) || (defined(SIMDE_ENABLE_NATIVE_ALIASES) && \
!(defined(SIMDE_ARCH_ARM_FMA)))
#undef vfmss_laneq_f32
#define vfmss_laneq_f32(a, b, v, lane) simde_vfmss_laneq_f32(a, b, v, lane)
#endif
......@@ -181,7 +187,8 @@ SIMDE_BEGIN_DECLS_
#else
#define simde_vfms_lane_f16(a, b, v, lane) simde_vsub_f16(a, simde_vmul_lane_f16(b, v, lane))
#endif
#if defined(SIMDE_ARM_NEON_A64V8_ENABLE_NATIVE_ALIASES)
#if defined(SIMDE_ARM_NEON_A64V8_ENABLE_NATIVE_ALIASES) || (defined(SIMDE_ENABLE_NATIVE_ALIASES) && \
!(defined(SIMDE_ARCH_ARM_FMA) && defined(SIMDE_ARM_NEON_FP16)))
#undef vfms_lane_f16
#define vfms_lane_f16(a, b, v, lane) simde_vfms_lane_f16(a, b, v, lane)
#endif
......@@ -192,7 +199,8 @@ SIMDE_BEGIN_DECLS_
#else
#define simde_vfms_lane_f32(a, b, v, lane) simde_vsub_f32(a, simde_vmul_lane_f32(b, v, lane))
#endif
#if defined(SIMDE_ARM_NEON_A64V8_ENABLE_NATIVE_ALIASES)
#if defined(SIMDE_ARM_NEON_A64V8_ENABLE_NATIVE_ALIASES) || (defined(SIMDE_ENABLE_NATIVE_ALIASES) && \
!(defined(SIMDE_ARCH_ARM_FMA)))
#undef vfms_lane_f32
#define vfms_lane_f32(a, b, v, lane) simde_vfms_lane_f32(a, b, v, lane)
#endif
......@@ -203,7 +211,8 @@ SIMDE_BEGIN_DECLS_
#else
#define simde_vfms_lane_f64(a, b, v, lane) simde_vsub_f64(a, simde_vmul_lane_f64(b, v, lane))
#endif
#if defined(SIMDE_ARM_NEON_A64V8_ENABLE_NATIVE_ALIASES)
#if defined(SIMDE_ARM_NEON_A64V8_ENABLE_NATIVE_ALIASES) || (defined(SIMDE_ENABLE_NATIVE_ALIASES) && \
!(defined(SIMDE_ARCH_ARM_FMA)))
#undef vfms_lane_f64
#define vfms_lane_f64(a, b, v, lane) simde_vfms_lane_f64(a, b, v, lane)
#endif
......@@ -214,7 +223,8 @@ SIMDE_BEGIN_DECLS_
#else
#define simde_vfms_laneq_f16(a, b, v, lane) simde_vsub_f16(a, simde_vmul_laneq_f16(b, v, lane))
#endif
#if defined(SIMDE_ARM_NEON_A64V8_ENABLE_NATIVE_ALIASES)
#if defined(SIMDE_ARM_NEON_A64V8_ENABLE_NATIVE_ALIASES) || (defined(SIMDE_ENABLE_NATIVE_ALIASES) && \
!(defined(SIMDE_ARCH_ARM_FMA) && defined(SIMDE_ARM_NEON_FP16)))
#undef vfms_laneq_f16
#define vfms_laneq_f16(a, b, v, lane) simde_vfms_laneq_f16(a, b, v, lane)
#endif
......@@ -225,7 +235,8 @@ SIMDE_BEGIN_DECLS_
#else
#define simde_vfms_laneq_f32(a, b, v, lane) simde_vsub_f32(a, simde_vmul_laneq_f32(b, v, lane))
#endif
#if defined(SIMDE_ARM_NEON_A64V8_ENABLE_NATIVE_ALIASES)
#if defined(SIMDE_ARM_NEON_A64V8_ENABLE_NATIVE_ALIASES) || (defined(SIMDE_ENABLE_NATIVE_ALIASES) && \
!(defined(SIMDE_ARCH_ARM_FMA)))
#undef vfms_laneq_f32
#define vfms_laneq_f32(a, b, v, lane) simde_vfms_laneq_f32(a, b, v, lane)
#endif
......@@ -236,7 +247,8 @@ SIMDE_BEGIN_DECLS_
#else
#define simde_vfms_laneq_f64(a, b, v, lane) simde_vsub_f64(a, simde_vmul_laneq_f64(b, v, lane))
#endif
#if defined(SIMDE_ARM_NEON_A64V8_ENABLE_NATIVE_ALIASES)
#if defined(SIMDE_ARM_NEON_A64V8_ENABLE_NATIVE_ALIASES) || (defined(SIMDE_ENABLE_NATIVE_ALIASES) && \
!(defined(SIMDE_ARCH_ARM_FMA)))
#undef vfms_laneq_f64
#define vfms_laneq_f64(a, b, v, lane) simde_vfms_laneq_f64(a, b, v, lane)
#endif
......@@ -247,7 +259,8 @@ SIMDE_BEGIN_DECLS_
#else
#define simde_vfmsq_lane_f64(a, b, v, lane) simde_vsubq_f64(a, simde_vmulq_lane_f64(b, v, lane))
#endif
#if defined(SIMDE_ARM_NEON_A64V8_ENABLE_NATIVE_ALIASES)
#if defined(SIMDE_ARM_NEON_A64V8_ENABLE_NATIVE_ALIASES) || (defined(SIMDE_ENABLE_NATIVE_ALIASES) && \
!(defined(SIMDE_ARCH_ARM_FMA)))
#undef vfmsq_lane_f64
#define vfmsq_lane_f64(a, b, v, lane) simde_vfmsq_lane_f64(a, b, v, lane)
#endif
......@@ -258,7 +271,8 @@ SIMDE_BEGIN_DECLS_
#else
#define simde_vfmsq_lane_f16(a, b, v, lane) simde_vsubq_f16(a, simde_vmulq_lane_f16(b, v, lane))
#endif
#if defined(SIMDE_ARM_NEON_A64V8_ENABLE_NATIVE_ALIASES)
#if defined(SIMDE_ARM_NEON_A64V8_ENABLE_NATIVE_ALIASES) || (defined(SIMDE_ENABLE_NATIVE_ALIASES) && \
!(defined(SIMDE_ARCH_ARM_FMA) && defined(SIMDE_ARM_NEON_FP16)))
#undef vfmsq_lane_f16
#define vfmsq_lane_f16(a, b, v, lane) simde_vfmsq_lane_f16(a, b, v, lane)
#endif
......@@ -269,7 +283,8 @@ SIMDE_BEGIN_DECLS_
#else
#define simde_vfmsq_lane_f32(a, b, v, lane) simde_vsubq_f32(a, simde_vmulq_lane_f32(b, v, lane))
#endif
#if defined(SIMDE_ARM_NEON_A64V8_ENABLE_NATIVE_ALIASES)
#if defined(SIMDE_ARM_NEON_A64V8_ENABLE_NATIVE_ALIASES) || (defined(SIMDE_ENABLE_NATIVE_ALIASES) && \
!(defined(SIMDE_ARCH_ARM_FMA)))
#undef vfmsq_lane_f32
#define vfmsq_lane_f32(a, b, v, lane) simde_vfmsq_lane_f32(a, b, v, lane)
#endif
......@@ -281,7 +296,8 @@ SIMDE_BEGIN_DECLS_
#define simde_vfmsq_laneq_f16(a, b, v, lane) \
simde_vsubq_f16(a, simde_vmulq_laneq_f16(b, v, lane))
#endif
#if defined(SIMDE_ARM_NEON_A64V8_ENABLE_NATIVE_ALIASES)
#if defined(SIMDE_ARM_NEON_A64V8_ENABLE_NATIVE_ALIASES) || (defined(SIMDE_ENABLE_NATIVE_ALIASES) && \
!(defined(SIMDE_ARCH_ARM_FMA) && defined(SIMDE_ARM_NEON_FP16)))
#undef vfmsq_laneq_f16
#define vfmsq_laneq_f16(a, b, v, lane) simde_vfmsq_laneq_f16(a, b, v, lane)
#endif
......@@ -293,7 +309,8 @@ SIMDE_BEGIN_DECLS_
#define simde_vfmsq_laneq_f32(a, b, v, lane) \
simde_vsubq_f32(a, simde_vmulq_laneq_f32(b, v, lane))
#endif
#if defined(SIMDE_ARM_NEON_A64V8_ENABLE_NATIVE_ALIASES)
#if defined(SIMDE_ARM_NEON_A64V8_ENABLE_NATIVE_ALIASES) || (defined(SIMDE_ENABLE_NATIVE_ALIASES) && \
!(defined(SIMDE_ARCH_ARM_FMA)))
#undef vfmsq_laneq_f32
#define vfmsq_laneq_f32(a, b, v, lane) simde_vfmsq_laneq_f32(a, b, v, lane)
#endif
......@@ -305,7 +322,8 @@ SIMDE_BEGIN_DECLS_
#define simde_vfmsq_laneq_f64(a, b, v, lane) \
simde_vsubq_f64(a, simde_vmulq_laneq_f64(b, v, lane))
#endif
#if defined(SIMDE_ARM_NEON_A64V8_ENABLE_NATIVE_ALIASES)
#if defined(SIMDE_ARM_NEON_A64V8_ENABLE_NATIVE_ALIASES) || (defined(SIMDE_ENABLE_NATIVE_ALIASES) && \
!(defined(SIMDE_ARCH_ARM_FMA)))
#undef vfmsq_laneq_f64
#define vfmsq_laneq_f64(a, b, v, lane) simde_vfmsq_laneq_f64(a, b, v, lane)
#endif
......
arm/neon/fms_n.h
View file @ 8c421df1
......@@ -52,7 +52,8 @@ simde_vfms_n_f16(simde_float16x4_t a, simde_float16x4_t b, simde_float16_t c) {
return simde_vfms_f16(a, b, simde_vdup_n_f16(c));
#endif
}
#if defined(SIMDE_ARM_NEON_A64V8_ENABLE_NATIVE_ALIASES)
#if defined(SIMDE_ARM_NEON_A64V8_ENABLE_NATIVE_ALIASES) || (defined(SIMDE_ENABLE_NATIVE_ALIASES) && \
!(defined(SIMDE_ARCH_ARM_FMA) && (!defined(__clang__) || SIMDE_DETECT_CLANG_VERSION_CHECK(7,0,0)) && !defined(SIMDE_BUG_GCC_95399) && defined(SIMDE_ARM_NEON_FP16)))
#undef vfms_n_f16
#define vfms_n_f16(a, b, c) simde_vfms_n_f16(a, b, c)
#endif
......@@ -73,7 +74,8 @@ simde_vfmsq_n_f16(simde_float16x8_t a, simde_float16x8_t b, simde_float16_t c) {
return simde_vfmsq_f16(a, b, simde_vdupq_n_f16(c));
#endif
}
#if defined(SIMDE_ARM_NEON_A64V8_ENABLE_NATIVE_ALIASES)
#if defined(SIMDE_ARM_NEON_A64V8_ENABLE_NATIVE_ALIASES) || (defined(SIMDE_ENABLE_NATIVE_ALIASES) && \
!(defined(SIMDE_ARCH_ARM_FMA) && (!defined(__clang__) || SIMDE_DETECT_CLANG_VERSION_CHECK(7,0,0)) && !defined(SIMDE_BUG_GCC_95399) && defined(SIMDE_ARM_NEON_FP16)))
#undef vfmsq_n_f16
#define vfmsq_n_f16(a, b, c) simde_vfmsq_n_f16(a, b, c)
#endif
......@@ -94,7 +96,8 @@ simde_vfms_n_f32(simde_float32x2_t a, simde_float32x2_t b, simde_float32_t c) {
return simde_vfms_f32(a, b, simde_vdup_n_f32(c));
#endif
}
#if defined(SIMDE_ARM_NEON_A64V8_ENABLE_NATIVE_ALIASES)
#if defined(SIMDE_ARM_NEON_A64V8_ENABLE_NATIVE_ALIASES) || (defined(SIMDE_ENABLE_NATIVE_ALIASES) && \
!(defined(SIMDE_ARCH_ARM_FMA) && (!defined(__clang__) || SIMDE_DETECT_CLANG_VERSION_CHECK(7,0,0)) && !defined(SIMDE_BUG_GCC_95399)))
#undef vfms_n_f32
#define vfms_n_f32(a, b, c) simde_vfms_n_f32(a, b, c)
#endif
......@@ -115,7 +118,8 @@ simde_vfms_n_f64(simde_float64x1_t a, simde_float64x1_t b, simde_float64_t c) {
return simde_vfms_f64(a, b, simde_vdup_n_f64(c));
#endif
}
#if defined(SIMDE_ARM_NEON_A32V7_ENABLE_NATIVE_ALIASES)
#if defined(SIMDE_ARM_NEON_A64V8_ENABLE_NATIVE_ALIASES) || (defined(SIMDE_ENABLE_NATIVE_ALIASES) && \
!(defined(SIMDE_ARCH_ARM_FMA) && (!defined(__clang__) || SIMDE_DETECT_CLANG_VERSION_CHECK(7,0,0))))
#undef vfms_n_f64
#define vfms_n_f64(a, b, c) simde_vfms_n_f64(a, b, c)
#endif
......@@ -136,7 +140,8 @@ simde_vfmsq_n_f32(simde_float32x4_t a, simde_float32x4_t b, simde_float32_t c) {
return simde_vfmsq_f32(a, b, simde_vdupq_n_f32(c));
#endif
}
#if defined(SIMDE_ARM_NEON_A64V8_ENABLE_NATIVE_ALIASES)
#if defined(SIMDE_ARM_NEON_A64V8_ENABLE_NATIVE_ALIASES) || (defined(SIMDE_ENABLE_NATIVE_ALIASES) && \
!(defined(SIMDE_ARCH_ARM_FMA) && (!defined(__clang__) || SIMDE_DETECT_CLANG_VERSION_CHECK(7,0,0)) && !defined(SIMDE_BUG_GCC_95399)))
#undef vfmsq_n_f32
#define vfmsq_n_f32(a, b, c) simde_vfmsq_n_f32(a, b, c)
#endif
......@@ -157,7 +162,8 @@ simde_vfmsq_n_f64(simde_float64x2_t a, simde_float64x2_t b, simde_float64_t c) {
return simde_vfmsq_f64(a, b, simde_vdupq_n_f64(c));
#endif
}
#if defined(SIMDE_ARM_NEON_A32V7_ENABLE_NATIVE_ALIASES)
#if defined(SIMDE_ARM_NEON_A64V8_ENABLE_NATIVE_ALIASES) || (defined(SIMDE_ENABLE_NATIVE_ALIASES) && \
!(defined(SIMDE_ARCH_ARM_FMA) && (!defined(__clang__) || SIMDE_DETECT_CLANG_VERSION_CHECK(7,0,0))))
#undef vfmsq_n_f64
#define vfmsq_n_f64(a, b, c) simde_vfmsq_n_f64(a, b, c)
#endif
......
arm/neon/get_high.h
View file @ 8c421df1
......@@ -55,7 +55,8 @@ simde_vget_high_f16(simde_float16x8_t a) {
return simde_float16x4_from_private(r_);
#endif
}
#if defined(SIMDE_ARM_NEON_A32V7_ENABLE_NATIVE_ALIASES)
#if defined(SIMDE_ARM_NEON_A32V7_ENABLE_NATIVE_ALIASES) || (defined(SIMDE_ENABLE_NATIVE_ALIASES) && \
!(defined(SIMDE_ARM_NEON_FP16)))
#undef vget_high_f16
#define vget_high_f16(a) simde_vget_high_f16((a))
#endif
......
arm/neon/get_lane.h
View file @ 8c421df1
......@@ -51,7 +51,8 @@ simde_vget_lane_f16(simde_float16x4_t v, const int lane)
return r;
}
#if defined(SIMDE_ARM_NEON_A32V8_ENABLE_NATIVE_ALIASES)
#if defined(SIMDE_ARM_NEON_A32V8_ENABLE_NATIVE_ALIASES) || (defined(SIMDE_ENABLE_NATIVE_ALIASES) && \
!(defined(SIMDE_ARM_NEON_FP16)))
#undef vget_lane_f16
#define vget_lane_f16(v, lane) simde_vget_lane_f16((v), (lane))
#endif
......@@ -285,7 +286,8 @@ simde_vgetq_lane_f16(simde_float16x8_t v, const int lane)
return r;
}
#if defined(SIMDE_ARM_NEON_A32V7_ENABLE_NATIVE_ALIASES)
#if defined(SIMDE_ARM_NEON_A32V7_ENABLE_NATIVE_ALIASES) || (defined(SIMDE_ENABLE_NATIVE_ALIASES) && \
!(defined(SIMDE_ARM_NEON_FP16)))
#undef vgetq_lane_f16
#define vgetq_lane_f16(v, lane) simde_vgetq_lane_f16((v), (lane))
#endif
......@@ -569,7 +571,8 @@ simde_vget_lane_p8(simde_poly8x8_t v, const int lane)
#if defined(SIMDE_ARM_NEON_A32V7_NATIVE) && !defined(SIMDE_BUG_CLANG_71362)
#define simde_vget_lane_p8(v, lane) vget_lane_p8((v), (lane))
#endif
#if defined(SIMDE_ARM_NEON_A32V7_ENABLE_NATIVE_ALIASES)
#if defined(SIMDE_ARM_NEON_A32V7_ENABLE_NATIVE_ALIASES) || (defined(SIMDE_ENABLE_NATIVE_ALIASES) && \
defined(SIMDE_BUG_CLANG_71362))
#undef vget_lane_p8
#define vget_lane_p8(v, lane) simde_vget_lane_p8((v), (lane))
#endif
......@@ -588,7 +591,8 @@ simde_vget_lane_p16(simde_poly16x4_t v, const int lane)
#if defined(SIMDE_ARM_NEON_A32V7_NATIVE) && !defined(SIMDE_BUG_CLANG_71362)
#define simde_vget_lane_p16(v, lane) vget_lane_p16((v), (lane))
#endif
#if defined(SIMDE_ARM_NEON_A32V7_ENABLE_NATIVE_ALIASES)
#if defined(SIMDE_ARM_NEON_A32V7_ENABLE_NATIVE_ALIASES) || (defined(SIMDE_ENABLE_NATIVE_ALIASES) && \
defined(SIMDE_BUG_CLANG_71362))
#undef vget_lane_p16
#define vget_lane_p16(v, lane) simde_vget_lane_p16((v), (lane))
#endif
......@@ -607,7 +611,8 @@ simde_vget_lane_p64(simde_poly64x1_t v, const int lane)
#if defined(SIMDE_ARM_NEON_A32V8_NATIVE) && !defined(SIMDE_BUG_CLANG_71362)
#define simde_vget_lane_p64(v, lane) vget_lane_p64((v), (lane))
#endif
#if defined(SIMDE_ARM_NEON_A32V8_ENABLE_NATIVE_ALIASES)
#if defined(SIMDE_ARM_NEON_A32V8_ENABLE_NATIVE_ALIASES) || (defined(SIMDE_ENABLE_NATIVE_ALIASES) && \
defined(SIMDE_BUG_CLANG_71362))
#undef vget_lane_p64
#define vget_lane_p64(v, lane) simde_vget_lane_p64((v), (lane))
#endif
......@@ -626,7 +631,8 @@ simde_vgetq_lane_p8(simde_poly8x16_t v, const int lane)
#if defined(SIMDE_ARM_NEON_A32V7_NATIVE) && !defined(SIMDE_BUG_CLANG_71362)
#define simde_vgetq_lane_p8(v, lane) vgetq_lane_p8((v), (lane))
#endif
#if defined(SIMDE_ARM_NEON_A32V7_ENABLE_NATIVE_ALIASES)
#if defined(SIMDE_ARM_NEON_A32V7_ENABLE_NATIVE_ALIASES) || (defined(SIMDE_ENABLE_NATIVE_ALIASES) && \
defined(SIMDE_BUG_CLANG_71362))
#undef vgetq_lane_p8
#define vgetq_lane_p8(v, lane) simde_vgetq_lane_p8((v), (lane))
#endif
......@@ -645,7 +651,8 @@ simde_vgetq_lane_p16(simde_poly16x8_t v, const int lane)
#if defined(SIMDE_ARM_NEON_A32V7_NATIVE) && !defined(SIMDE_BUG_CLANG_71362)
#define simde_vgetq_lane_p16(v, lane) vgetq_lane_p16((v), (lane))
#endif
#if defined(SIMDE_ARM_NEON_A32V7_ENABLE_NATIVE_ALIASES)
#if defined(SIMDE_ARM_NEON_A32V7_ENABLE_NATIVE_ALIASES) || (defined(SIMDE_ENABLE_NATIVE_ALIASES) && \
defined(SIMDE_BUG_CLANG_71362))
#undef vgetq_lane_p16
#define vgetq_lane_p16(v, lane) simde_vgetq_lane_p16((v), (lane))
#endif
......@@ -664,7 +671,8 @@ simde_vgetq_lane_p64(simde_poly64x2_t v, const int lane)
#if defined(SIMDE_ARM_NEON_A32V8_NATIVE) && !defined(SIMDE_BUG_CLANG_71362)
#define simde_vgetq_lane_p64(v, lane) vgetq_lane_p64((v), (lane))
#endif
#if defined(SIMDE_ARM_NEON_A32V8_ENABLE_NATIVE_ALIASES)
#if defined(SIMDE_ARM_NEON_A32V8_ENABLE_NATIVE_ALIASES) || (defined(SIMDE_ENABLE_NATIVE_ALIASES) && \
defined(SIMDE_BUG_CLANG_71362))
#undef vgetq_lane_p64
#define vgetq_lane_p64(v, lane) simde_vgetq_lane_p64((v), (lane))
#endif
......@@ -685,7 +693,8 @@ simde_vget_lane_bf16(simde_bfloat16x4_t v, const int lane)
return r;
}
#if defined(SIMDE_ARM_NEON_A32V8_ENABLE_NATIVE_ALIASES)
#if defined(SIMDE_ARM_NEON_A32V8_ENABLE_NATIVE_ALIASES) || (defined(SIMDE_ENABLE_NATIVE_ALIASES) && \
!(defined(SIMDE_ARM_NEON_BF16)))
#undef vget_lane_bf16
#define vget_lane_bf16(v, lane) simde_vget_lane_bf16((v), (lane))
#endif
......@@ -706,7 +715,8 @@ simde_vgetq_lane_bf16(simde_bfloat16x8_t v, const int lane)
return r;
}
#if defined(SIMDE_ARM_NEON_A32V8_ENABLE_NATIVE_ALIASES)
#if defined(SIMDE_ARM_NEON_A32V8_ENABLE_NATIVE_ALIASES) || (defined(SIMDE_ENABLE_NATIVE_ALIASES) && \
!(defined(SIMDE_ARM_NEON_BF16)))
#undef vgetq_lane_bf16
#define vgetq_lane_bf16(v, lane) simde_vgetq_lane_bf16((v), (lane))
#endif
......
arm/neon/get_low.h
View file @ 8c421df1
......@@ -57,7 +57,8 @@ simde_vget_low_f16(simde_float16x8_t a) {
return simde_float16x4_from_private(r_);
#endif
}
#if defined(SIMDE_ARM_NEON_A32V7_ENABLE_NATIVE_ALIASES)
#if defined(SIMDE_ARM_NEON_A32V7_ENABLE_NATIVE_ALIASES) || (defined(SIMDE_ENABLE_NATIVE_ALIASES) && \
!(defined(SIMDE_ARM_NEON_FP16)))
#undef vget_low_f16
#define vget_low_f16(a) simde_vget_low_f16((a))
#endif
......@@ -457,7 +458,8 @@ simde_vget_low_bf16(simde_bfloat16x8_t a) {
return simde_bfloat16x4_from_private(r_);
#endif
}
#if defined(SIMDE_ARM_NEON_A32V8_ENABLE_NATIVE_ALIASES)
#if defined(SIMDE_ARM_NEON_A32V8_ENABLE_NATIVE_ALIASES) || (defined(SIMDE_ENABLE_NATIVE_ALIASES) && \
!(defined(SIMDE_ARM_NEON_BF16)))
#undef vget_low_bf16
#define vget_low_bf16(a) simde_vget_low_bf16((a))
#endif
......
arm/neon/ld1.h
View file @ 8c421df1
......@@ -51,7 +51,7 @@ simde_vld1_f16(simde_float16_t const ptr[HEDLEY_ARRAY_PARAM(4)]) {
return simde_float16x4_from_private(r_);
#endif
}
#if defined(SIMDE_ARM_NEON_A32V7_ENABLE_NATIVE_ALIASES)
#if defined(SIMDE_ARM_NEON_A32V7_ENABLE_NATIVE_ALIASES) || (defined(SIMDE_ENABLE_NATIVE_ALIASES) && !defined(SIMDE_ARM_NEON_FP16))
#undef vld1_f16
#define vld1_f16(a) simde_vld1_f16((a))
#endif
......@@ -273,7 +273,7 @@ simde_vld1q_f16(simde_float16_t const ptr[HEDLEY_ARRAY_PARAM(8)]) {
return simde_float16x8_from_private(r_);
#endif
}
#if defined(SIMDE_ARM_NEON_A32V7_ENABLE_NATIVE_ALIASES)
#if defined(SIMDE_ARM_NEON_A32V7_ENABLE_NATIVE_ALIASES) || (defined(SIMDE_ENABLE_NATIVE_ALIASES) && !defined(SIMDE_ARM_NEON_FP16))
#undef vld1q_f16
#define vld1q_f16(a) simde_vld1q_f16((a))
#endif
......@@ -630,7 +630,7 @@ simde_vldrq_p128(simde_poly128_t const ptr[HEDLEY_ARRAY_PARAM(1)]) {
return r_;
#endif
}
#if defined(SIMDE_ARM_NEON_A32V8_ENABLE_NATIVE_ALIASES)
#if defined(SIMDE_ARM_NEON_A32V8_ENABLE_NATIVE_ALIASES) || (defined(SIMDE_ENABLE_NATIVE_ALIASES) && !defined(SIMDE_ARCH_ARM_CRYPTO))
#undef vldrq_p128
#define vldrq_p128(a) simde_vldrq_p128((a))
#endif
......@@ -648,7 +648,7 @@ simde_vld1_bf16(simde_bfloat16_t const ptr[HEDLEY_ARRAY_PARAM(4)]) {
return simde_bfloat16x4_from_private(r_);
#endif
}
#if defined(SIMDE_ARM_NEON_A32V8_ENABLE_NATIVE_ALIASES)
#if defined(SIMDE_ARM_NEON_A32V8_ENABLE_NATIVE_ALIASES) || (defined(SIMDE_ENABLE_NATIVE_ALIASES) && !defined(SIMDE_ARM_NEON_BF16))
#undef vld1_bf16
#define vld1_bf16(a) simde_vld1_bf16((a))
#endif
......@@ -664,7 +664,7 @@ simde_vld1q_bf16(simde_bfloat16_t const ptr[HEDLEY_ARRAY_PARAM(8)]) {
return simde_bfloat16x8_from_private(r_);
#endif
}
#if defined(SIMDE_ARM_NEON_A32V8_ENABLE_NATIVE_ALIASES)
#if defined(SIMDE_ARM_NEON_A32V8_ENABLE_NATIVE_ALIASES) || (defined(SIMDE_ENABLE_NATIVE_ALIASES) && !defined(SIMDE_ARM_NEON_BF16))
#undef vld1q_bf16
#define vld1q_bf16(a) simde_vld1q_bf16((a))
#endif
......
arm/neon/ld1_dup.h
View file @ 8c421df1
......@@ -45,7 +45,7 @@ simde_vld1_dup_f16(simde_float16_t const * ptr) {
return simde_vdup_n_f16(*ptr);
#endif
}
#if defined(SIMDE_ARM_NEON_A32V7_ENABLE_NATIVE_ALIASES)
#if defined(SIMDE_ARM_NEON_A32V7_ENABLE_NATIVE_ALIASES) || (defined(SIMDE_ENABLE_NATIVE_ALIASES) && !defined(SIMDE_ARM_NEON_FP16))
#undef vld1_dup_f16
#define vld1_dup_f16(a) simde_vld1_dup_f16((a))
#endif
......@@ -201,7 +201,7 @@ simde_vld1q_dup_f16(simde_float16_t const * ptr) {
return simde_vdupq_n_f16(*ptr);
#endif
}
#if defined(SIMDE_ARM_NEON_A32V7_ENABLE_NATIVE_ALIASES)
#if defined(SIMDE_ARM_NEON_A32V7_ENABLE_NATIVE_ALIASES) || (defined(SIMDE_ENABLE_NATIVE_ALIASES) && !defined(SIMDE_ARM_NEON_FP16))
#undef vld1q_dup_f16
#define vld1q_dup_f16(a) simde_vld1q_dup_f16((a))
#endif
......
arm/neon/ld1_lane.h
View file @ 8c421df1
......@@ -173,7 +173,7 @@ simde_float16x4_t simde_vld1_lane_f16(simde_float16_t const *ptr, simde_float16x
#if defined(SIMDE_ARM_NEON_A32V7_NATIVE) && defined(SIMDE_ARM_NEON_FP16)
#define simde_vld1_lane_f16(ptr, src, lane) vld1_lane_f16(ptr, src, lane)
#endif
#if defined(SIMDE_ARM_NEON_A32V7_ENABLE_NATIVE_ALIASES)
#if defined(SIMDE_ARM_NEON_A32V7_ENABLE_NATIVE_ALIASES) || (defined(SIMDE_ENABLE_NATIVE_ALIASES) && !defined(SIMDE_ARM_NEON_FP16))
#undef vld1_lane_f16
#define vld1_lane_f16(ptr, src, lane) simde_vld1_lane_f16((ptr), (src), (lane))
#endif
......@@ -349,7 +349,7 @@ simde_float16x8_t simde_vld1q_lane_f16(simde_float16_t const *ptr, simde_float16
#if defined(SIMDE_ARM_NEON_A32V7_NATIVE) && defined(SIMDE_ARM_NEON_FP16)
#define simde_vld1q_lane_f16(ptr, src, lane) vld1q_lane_f16(ptr, src, lane)
#endif
#if defined(SIMDE_ARM_NEON_A32V7_ENABLE_NATIVE_ALIASES)
#if defined(SIMDE_ARM_NEON_A32V7_ENABLE_NATIVE_ALIASES) || (defined(SIMDE_ENABLE_NATIVE_ALIASES) && !defined(SIMDE_ARM_NEON_FP16))
#undef vld1q_lane_f16
#define vld1q_lane_f16(ptr, src, lane) simde_vld1q_lane_f16((ptr), (src), (lane))
#endif
......@@ -498,7 +498,8 @@ simde_bfloat16x4_t simde_vld1_lane_bf16(simde_bfloat16_t const *ptr, simde_bfloa
#if defined(SIMDE_ARM_NEON_A32V8_NATIVE) && defined(SIMDE_ARM_NEON_BF16)
#define simde_vld1_lane_bf16(ptr, src, lane) vld1_lane_bf16(ptr, src, lane)
#endif
#if defined(SIMDE_ARM_NEON_A32V8_ENABLE_NATIVE_ALIASES)
#if defined(SIMDE_ARM_NEON_A32V8_ENABLE_NATIVE_ALIASES) || (defined(SIMDE_ENABLE_NATIVE_ALIASES) && \
!(defined(SIMDE_ARM_NEON_BF16)))
#undef vld1_lane_bf16
#define vld1_lane_bf16(ptr, src, lane) simde_vld1_lane_bf16((ptr), (src), (lane))
#endif
......@@ -514,7 +515,8 @@ simde_bfloat16x8_t simde_vld1q_lane_bf16(simde_bfloat16_t const *ptr, simde_bflo
#if defined(SIMDE_ARM_NEON_A32V8_NATIVE) && defined(SIMDE_ARM_NEON_BF16)
#define simde_vld1q_lane_bf16(ptr, src, lane) vld1q_lane_bf16(ptr, src, lane)
#endif
#if defined(SIMDE_ARM_NEON_A32V8_ENABLE_NATIVE_ALIASES)
#if defined(SIMDE_ARM_NEON_A32V8_ENABLE_NATIVE_ALIASES) || (defined(SIMDE_ENABLE_NATIVE_ALIASES) && \
!(defined(SIMDE_ARM_NEON_BF16)))
#undef vld1q_lane_bf16
#define vld1q_lane_bf16(ptr, src, lane) simde_vld1q_lane_bf16((ptr), (src), (lane))
#endif
......
arm/neon/ld1_x2.h
View file @ 8c421df1
......@@ -65,7 +65,10 @@ simde_vld1_f16_x2(simde_float16_t const ptr[HEDLEY_ARRAY_PARAM(8)]) {
return s_;
#endif
}
#if defined(SIMDE_ARM_NEON_A32V7_ENABLE_NATIVE_ALIASES)
#if defined(SIMDE_ARM_NEON_A32V7_ENABLE_NATIVE_ALIASES) || (defined(SIMDE_ENABLE_NATIVE_ALIASES) && \
!(defined(SIMDE_ARM_NEON_FP16) && \
(!defined(HEDLEY_GCC_VERSION) || (HEDLEY_GCC_VERSION_CHECK(8,0,0) && defined(SIMDE_ARM_NEON_A64V8_NATIVE))) && \
(!defined(__clang__) || (SIMDE_DETECT_CLANG_VERSION_CHECK(7,0,0) && defined(SIMDE_ARM_NEON_A64V8_NATIVE)))))
#undef vld1_f16_x2
#define vld1_f16_x2(a) simde_vld1_f16_x2((a))
#endif
......@@ -93,7 +96,9 @@ simde_vld1_f32_x2(simde_float32 const ptr[HEDLEY_ARRAY_PARAM(4)]) {
return s_;
#endif
}
#if defined(SIMDE_ARM_NEON_A32V7_ENABLE_NATIVE_ALIASES)
#if defined(SIMDE_ARM_NEON_A32V7_ENABLE_NATIVE_ALIASES) || (defined(SIMDE_ENABLE_NATIVE_ALIASES) && \
!((!defined(HEDLEY_GCC_VERSION) || (HEDLEY_GCC_VERSION_CHECK(8,0,0) && defined(SIMDE_ARM_NEON_A64V8_NATIVE))) && \
(!defined(__clang__) || (SIMDE_DETECT_CLANG_VERSION_CHECK(7,0,0) && defined(SIMDE_ARM_NEON_A64V8_NATIVE)))))
#undef vld1_f32_x2
#define vld1_f32_x2(a) simde_vld1_f32_x2((a))
#endif
......@@ -121,7 +126,9 @@ simde_vld1_f64_x2(simde_float64 const ptr[HEDLEY_ARRAY_PARAM(2)]) {
return s_;
#endif
}
#if defined(SIMDE_ARM_NEON_A64V8_ENABLE_NATIVE_ALIASES)
#if defined(SIMDE_ARM_NEON_A64V8_ENABLE_NATIVE_ALIASES) || (defined(SIMDE_ENABLE_NATIVE_ALIASES) && \
!((!defined(HEDLEY_GCC_VERSION) || HEDLEY_GCC_VERSION_CHECK(8,0,0)) && \
(!defined(__clang__) || SIMDE_DETECT_CLANG_VERSION_CHECK(7,0,0))))
#undef vld1_f64_x2
#define vld1_f64_x2(a) simde_vld1_f64_x2((a))
#endif
......@@ -149,7 +156,9 @@ simde_vld1_s8_x2(int8_t const ptr[HEDLEY_ARRAY_PARAM(16)]) {
return s_;
#endif
}
#if defined(SIMDE_ARM_NEON_A32V7_ENABLE_NATIVE_ALIASES)
#if defined(SIMDE_ARM_NEON_A32V7_ENABLE_NATIVE_ALIASES) || (defined(SIMDE_ENABLE_NATIVE_ALIASES) && \
!((!defined(HEDLEY_GCC_VERSION) || (HEDLEY_GCC_VERSION_CHECK(8,0,0) && defined(SIMDE_ARM_NEON_A64V8_NATIVE))) && \
(!defined(__clang__) || (SIMDE_DETECT_CLANG_VERSION_CHECK(7,0,0) && defined(SIMDE_ARM_NEON_A64V8_NATIVE)))))
#undef vld1_s8_x2
#define vld1_s8_x2(a) simde_vld1_s8_x2((a))
#endif
......@@ -177,7 +186,9 @@ simde_vld1_s16_x2(int16_t const ptr[HEDLEY_ARRAY_PARAM(8)]) {
return s_;
#endif
}
#if defined(SIMDE_ARM_NEON_A32V7_ENABLE_NATIVE_ALIASES)
#if defined(SIMDE_ARM_NEON_A32V7_ENABLE_NATIVE_ALIASES) || (defined(SIMDE_ENABLE_NATIVE_ALIASES) && \
!((!defined(HEDLEY_GCC_VERSION) || (HEDLEY_GCC_VERSION_CHECK(8,0,0) && defined(SIMDE_ARM_NEON_A64V8_NATIVE))) && \
(!defined(__clang__) || (SIMDE_DETECT_CLANG_VERSION_CHECK(7,0,0) && defined(SIMDE_ARM_NEON_A64V8_NATIVE)))))
#undef vld1_s16_x2
#define vld1_s16_x2(a) simde_vld1_s16_x2((a))
#endif
......@@ -205,7 +216,9 @@ simde_vld1_s32_x2(int32_t const ptr[HEDLEY_ARRAY_PARAM(4)]) {
return s_;
#endif
}
#if defined(SIMDE_ARM_NEON_A32V7_ENABLE_NATIVE_ALIASES)
#if defined(SIMDE_ARM_NEON_A32V7_ENABLE_NATIVE_ALIASES) || (defined(SIMDE_ENABLE_NATIVE_ALIASES) && \
!((!defined(HEDLEY_GCC_VERSION) || (HEDLEY_GCC_VERSION_CHECK(8,0,0) && defined(SIMDE_ARM_NEON_A64V8_NATIVE))) && \
(!defined(__clang__) || (SIMDE_DETECT_CLANG_VERSION_CHECK(7,0,0) && defined(SIMDE_ARM_NEON_A64V8_NATIVE)))))
#undef vld1_s32_x2
#define vld1_s32_x2(a) simde_vld1_s32_x2((a))
#endif
......@@ -233,7 +246,9 @@ simde_vld1_s64_x2(int64_t const ptr[HEDLEY_ARRAY_PARAM(2)]) {
return s_;
#endif
}
#if defined(SIMDE_ARM_NEON_A32V7_ENABLE_NATIVE_ALIASES)
#if defined(SIMDE_ARM_NEON_A32V7_ENABLE_NATIVE_ALIASES) || (defined(SIMDE_ENABLE_NATIVE_ALIASES) && \
!((!defined(HEDLEY_GCC_VERSION) || (HEDLEY_GCC_VERSION_CHECK(8,0,0) && defined(SIMDE_ARM_NEON_A64V8_NATIVE))) && \
(!defined(__clang__) || (SIMDE_DETECT_CLANG_VERSION_CHECK(7,0,0) && defined(SIMDE_ARM_NEON_A64V8_NATIVE)))))
#undef vld1_s64_x2
#define vld1_s64_x2(a) simde_vld1_s64_x2((a))
#endif
......@@ -261,7 +276,9 @@ simde_vld1_u8_x2(uint8_t const ptr[HEDLEY_ARRAY_PARAM(16)]) {
return s_;
#endif
}
#if defined(SIMDE_ARM_NEON_A32V7_ENABLE_NATIVE_ALIASES)
#if defined(SIMDE_ARM_NEON_A32V7_ENABLE_NATIVE_ALIASES) || (defined(SIMDE_ENABLE_NATIVE_ALIASES) && \
!((!defined(HEDLEY_GCC_VERSION) || (HEDLEY_GCC_VERSION_CHECK(8,0,0) && defined(SIMDE_ARM_NEON_A64V8_NATIVE))) && \
(!defined(__clang__) || (SIMDE_DETECT_CLANG_VERSION_CHECK(7,0,0) && defined(SIMDE_ARM_NEON_A64V8_NATIVE)))))
#undef vld1_u8_x2
#define vld1_u8_x2(a) simde_vld1_u8_x2((a))
#endif
......@@ -289,7 +306,9 @@ simde_vld1_u16_x2(uint16_t const ptr[HEDLEY_ARRAY_PARAM(8)]) {
return s_;
#endif
}
#if defined(SIMDE_ARM_NEON_A32V7_ENABLE_NATIVE_ALIASES)
#if defined(SIMDE_ARM_NEON_A32V7_ENABLE_NATIVE_ALIASES) || (defined(SIMDE_ENABLE_NATIVE_ALIASES) && \
!((!defined(HEDLEY_GCC_VERSION) || (HEDLEY_GCC_VERSION_CHECK(8,0,0) && defined(SIMDE_ARM_NEON_A64V8_NATIVE))) && \
(!defined(__clang__) || (SIMDE_DETECT_CLANG_VERSION_CHECK(7,0,0) && defined(SIMDE_ARM_NEON_A64V8_NATIVE)))))
#undef vld1_u16_x2
#define vld1_u16_x2(a) simde_vld1_u16_x2((a))
#endif
......@@ -317,7 +336,9 @@ simde_vld1_u32_x2(uint32_t const ptr[HEDLEY_ARRAY_PARAM(4)]) {
return s_;
#endif
}
#if defined(SIMDE_ARM_NEON_A32V7_ENABLE_NATIVE_ALIASES)
#if defined(SIMDE_ARM_NEON_A32V7_ENABLE_NATIVE_ALIASES) || (defined(SIMDE_ENABLE_NATIVE_ALIASES) && \
!((!defined(HEDLEY_GCC_VERSION) || (HEDLEY_GCC_VERSION_CHECK(8,0,0) && defined(SIMDE_ARM_NEON_A64V8_NATIVE))) && \
(!defined(__clang__) || (SIMDE_DETECT_CLANG_VERSION_CHECK(7,0,0) && defined(SIMDE_ARM_NEON_A64V8_NATIVE)))))
#undef vld1_u32_x2
#define vld1_u32_x2(a) simde_vld1_u32_x2((a))
#endif
......@@ -345,7 +366,9 @@ simde_vld1_u64_x2(uint64_t const ptr[HEDLEY_ARRAY_PARAM(2)]) {
return s_;
#endif
}
#if defined(SIMDE_ARM_NEON_A32V7_ENABLE_NATIVE_ALIASES)
#if defined(SIMDE_ARM_NEON_A32V7_ENABLE_NATIVE_ALIASES) || (defined(SIMDE_ENABLE_NATIVE_ALIASES) && \
!((!defined(HEDLEY_GCC_VERSION) || (HEDLEY_GCC_VERSION_CHECK(8,0,0) && defined(SIMDE_ARM_NEON_A64V8_NATIVE))) && \
(!defined(__clang__) || (SIMDE_DETECT_CLANG_VERSION_CHECK(7,0,0) && defined(SIMDE_ARM_NEON_A64V8_NATIVE)))))
#undef vld1_u64_x2
#define vld1_u64_x2(a) simde_vld1_u64_x2((a))
#endif
......@@ -370,7 +393,8 @@ simde_vld1_p8_x2(simde_poly8_t const ptr[HEDLEY_ARRAY_PARAM(16)]) {
return s_;
#endif
}
#if defined(SIMDE_ARM_NEON_A32V7_ENABLE_NATIVE_ALIASES)
#if defined(SIMDE_ARM_NEON_A32V7_ENABLE_NATIVE_ALIASES) || (defined(SIMDE_ENABLE_NATIVE_ALIASES) && \
defined(SIMDE_BUG_GCC_95399))
#undef vld1_p8_x2
#define vld1_p8_x2(a) simde_vld1_p8_x2((a))
#endif
......@@ -395,7 +419,8 @@ simde_vld1_p16_x2(simde_poly16_t const ptr[HEDLEY_ARRAY_PARAM(8)]) {
return s_;
#endif
}
#if defined(SIMDE_ARM_NEON_A32V7_ENABLE_NATIVE_ALIASES)
#if defined(SIMDE_ARM_NEON_A32V7_ENABLE_NATIVE_ALIASES) || (defined(SIMDE_ENABLE_NATIVE_ALIASES) && \
defined(SIMDE_BUG_GCC_95399))
#undef vld1_p16_x2
#define vld1_p16_x2(a) simde_vld1_p16_x2((a))
#endif
......@@ -423,7 +448,9 @@ simde_vld1_p64_x2(simde_poly64_t const ptr[HEDLEY_ARRAY_PARAM(2)]) {
return s_;
#endif
}
#if defined(SIMDE_ARM_NEON_A32V8_ENABLE_NATIVE_ALIASES)
#if defined(SIMDE_ARM_NEON_A32V8_ENABLE_NATIVE_ALIASES) || (defined(SIMDE_ENABLE_NATIVE_ALIASES) && \
!((!defined(HEDLEY_GCC_VERSION) || (HEDLEY_GCC_VERSION_CHECK(8,0,0) && defined(SIMDE_ARM_NEON_A64V8_NATIVE))) && \
(!defined(__clang__) || (SIMDE_DETECT_CLANG_VERSION_CHECK(9,0,0) && defined(SIMDE_ARM_NEON_A64V8_NATIVE)))))
#undef vld1_p64_x2
#define vld1_p64_x2(a) simde_vld1_p64_x2((a))
#endif
......@@ -443,7 +470,8 @@ simde_vld1_bf16_x2(simde_bfloat16 const ptr[HEDLEY_ARRAY_PARAM(8)]) {
return s_;
#endif
}
#if defined(SIMDE_ARM_NEON_A32V8_ENABLE_NATIVE_ALIASES)
#if defined(SIMDE_ARM_NEON_A32V8_ENABLE_NATIVE_ALIASES) || (defined(SIMDE_ENABLE_NATIVE_ALIASES) && \
!(defined(SIMDE_ARM_NEON_BF16)))
#undef vld1_bf16_x2
#define vld1_bf16_x2(a) simde_vld1_bf16_x2((a))
#endif
......
arm/neon/ld1_x3.h
View file @ 8c421df1
......@@ -66,7 +66,10 @@ simde_vld1_f16_x3(simde_float16_t const ptr[HEDLEY_ARRAY_PARAM(12)]) {
return s_;
#endif
}
#if defined(SIMDE_ARM_NEON_A32V7_ENABLE_NATIVE_ALIASES)
#if defined(SIMDE_ARM_NEON_A32V7_ENABLE_NATIVE_ALIASES) || (defined(SIMDE_ENABLE_NATIVE_ALIASES) && \
!(defined(SIMDE_ARM_NEON_FP16) && \
(!defined(HEDLEY_GCC_VERSION) || (HEDLEY_GCC_VERSION_CHECK(8,0,0) && defined(SIMDE_ARM_NEON_A64V8_NATIVE))) && \
(!defined(__clang__) || (SIMDE_DETECT_CLANG_VERSION_CHECK(7,0,0) && defined(SIMDE_ARM_NEON_A64V8_NATIVE)))))
#undef vld1_f16_x3
#define vld1_f16_x3(a) simde_vld1_f16_x3((a))
#endif
......@@ -96,7 +99,9 @@ simde_vld1_f32_x3(simde_float32 const ptr[HEDLEY_ARRAY_PARAM(6)]) {
return s_;
#endif
}
#if defined(SIMDE_ARM_NEON_A32V7_ENABLE_NATIVE_ALIASES)
#if defined(SIMDE_ARM_NEON_A32V7_ENABLE_NATIVE_ALIASES) || (defined(SIMDE_ENABLE_NATIVE_ALIASES) && \
!((!defined(HEDLEY_GCC_VERSION) || (HEDLEY_GCC_VERSION_CHECK(8,0,0) && defined(SIMDE_ARM_NEON_A64V8_NATIVE))) && \
(!defined(__clang__) || (SIMDE_DETECT_CLANG_VERSION_CHECK(7,0,0) && defined(SIMDE_ARM_NEON_A64V8_NATIVE)))))
#undef vld1_f32_x3
#define vld1_f32_x3(a) simde_vld1_f32_x3((a))
#endif
......@@ -126,7 +131,9 @@ simde_vld1_f64_x3(simde_float64 const ptr[HEDLEY_ARRAY_PARAM(3)]) {
return s_;
#endif
}
#if defined(SIMDE_ARM_NEON_A64V8_ENABLE_NATIVE_ALIASES)
#if defined(SIMDE_ARM_NEON_A64V8_ENABLE_NATIVE_ALIASES) || (defined(SIMDE_ENABLE_NATIVE_ALIASES) && \
!((!defined(HEDLEY_GCC_VERSION) || HEDLEY_GCC_VERSION_CHECK(8,0,0)) && \
(!defined(__clang__) || SIMDE_DETECT_CLANG_VERSION_CHECK(7,0,0))))
#undef vld1_f64_x3
#define vld1_f64_x3(a) simde_vld1_f64_x3((a))
#endif
......@@ -156,7 +163,9 @@ simde_vld1_s8_x3(int8_t const ptr[HEDLEY_ARRAY_PARAM(24)]) {
return s_;
#endif
}
#if defined(SIMDE_ARM_NEON_A32V7_ENABLE_NATIVE_ALIASES)
#if defined(SIMDE_ARM_NEON_A32V7_ENABLE_NATIVE_ALIASES) || (defined(SIMDE_ENABLE_NATIVE_ALIASES) && \
!((!defined(HEDLEY_GCC_VERSION) || (HEDLEY_GCC_VERSION_CHECK(12,0,0) && defined(SIMDE_ARM_NEON_A64V8_NATIVE))) && \
(!defined(__clang__) || (SIMDE_DETECT_CLANG_VERSION_CHECK(7,0,0) && defined(SIMDE_ARM_NEON_A64V8_NATIVE)))))
#undef vld1_s8_x3
#define vld1_s8_x3(a) simde_vld1_s8_x3((a))
#endif
......@@ -186,7 +195,9 @@ simde_vld1_s16_x3(int16_t const ptr[HEDLEY_ARRAY_PARAM(12)]) {
return s_;
#endif
}
#if defined(SIMDE_ARM_NEON_A32V7_ENABLE_NATIVE_ALIASES)
#if defined(SIMDE_ARM_NEON_A32V7_ENABLE_NATIVE_ALIASES) || (defined(SIMDE_ENABLE_NATIVE_ALIASES) && \
!((!defined(HEDLEY_GCC_VERSION) || (HEDLEY_GCC_VERSION_CHECK(8,0,0) && defined(SIMDE_ARM_NEON_A64V8_NATIVE))) && \
(!defined(__clang__) || (SIMDE_DETECT_CLANG_VERSION_CHECK(7,0,0) && defined(SIMDE_ARM_NEON_A64V8_NATIVE)))))
#undef vld1_s16_x3
#define vld1_s16_x3(a) simde_vld1_s16_x3((a))
#endif
......@@ -216,7 +227,9 @@ simde_vld1_s32_x3(int32_t const ptr[HEDLEY_ARRAY_PARAM(6)]) {
return s_;
#endif
}
#if defined(SIMDE_ARM_NEON_A32V7_ENABLE_NATIVE_ALIASES)
#if defined(SIMDE_ARM_NEON_A32V7_ENABLE_NATIVE_ALIASES) || (defined(SIMDE_ENABLE_NATIVE_ALIASES) && \
!((!defined(HEDLEY_GCC_VERSION) || (HEDLEY_GCC_VERSION_CHECK(8,0,0) && defined(SIMDE_ARM_NEON_A64V8_NATIVE))) && \
(!defined(__clang__) || (SIMDE_DETECT_CLANG_VERSION_CHECK(7,0,0) && defined(SIMDE_ARM_NEON_A64V8_NATIVE)))))
#undef vld1_s32_x3
#define vld1_s32_x3(a) simde_vld1_s32_x3((a))
#endif
......@@ -246,7 +259,9 @@ simde_vld1_s64_x3(int64_t const ptr[HEDLEY_ARRAY_PARAM(3)]) {
return s_;
#endif
}
#if defined(SIMDE_ARM_NEON_A32V7_ENABLE_NATIVE_ALIASES)
#if defined(SIMDE_ARM_NEON_A32V7_ENABLE_NATIVE_ALIASES) || (defined(SIMDE_ENABLE_NATIVE_ALIASES) && \
!((!defined(HEDLEY_GCC_VERSION) || (HEDLEY_GCC_VERSION_CHECK(8,0,0) && defined(SIMDE_ARM_NEON_A64V8_NATIVE))) && \
(!defined(__clang__) || (SIMDE_DETECT_CLANG_VERSION_CHECK(7,0,0) && defined(SIMDE_ARM_NEON_A64V8_NATIVE)))))
#undef vld1_s64_x3
#define vld1_s64_x3(a) simde_vld1_s64_x3((a))
#endif
......@@ -276,7 +291,9 @@ simde_vld1_u8_x3(uint8_t const ptr[HEDLEY_ARRAY_PARAM(24)]) {
return s_;
#endif
}
#if defined(SIMDE_ARM_NEON_A32V7_ENABLE_NATIVE_ALIASES)
#if defined(SIMDE_ARM_NEON_A32V7_ENABLE_NATIVE_ALIASES) || (defined(SIMDE_ENABLE_NATIVE_ALIASES) && \
!((!defined(HEDLEY_GCC_VERSION) || (HEDLEY_GCC_VERSION_CHECK(8,0,0) && defined(SIMDE_ARM_NEON_A64V8_NATIVE))) && \
(!defined(__clang__) || (SIMDE_DETECT_CLANG_VERSION_CHECK(7,0,0) && defined(SIMDE_ARM_NEON_A64V8_NATIVE)))))
#undef vld1_u8_x3
#define vld1_u8_x3(a) simde_vld1_u8_x3((a))
#endif
......@@ -306,7 +323,9 @@ simde_vld1_u16_x3(uint16_t const ptr[HEDLEY_ARRAY_PARAM(12)]) {
return s_;
#endif
}
#if defined(SIMDE_ARM_NEON_A32V7_ENABLE_NATIVE_ALIASES)
#if defined(SIMDE_ARM_NEON_A32V7_ENABLE_NATIVE_ALIASES) || (defined(SIMDE_ENABLE_NATIVE_ALIASES) && \
!((!defined(HEDLEY_GCC_VERSION) || (HEDLEY_GCC_VERSION_CHECK(8,0,0) && defined(SIMDE_ARM_NEON_A64V8_NATIVE))) && \
(!defined(__clang__) || (SIMDE_DETECT_CLANG_VERSION_CHECK(7,0,0) && defined(SIMDE_ARM_NEON_A64V8_NATIVE)))))
#undef vld1_u16_x3
#define vld1_u16_x3(a) simde_vld1_u16_x3((a))
#endif
......@@ -336,7 +355,9 @@ simde_vld1_u32_x3(uint32_t const ptr[HEDLEY_ARRAY_PARAM(6)]) {
return s_;
#endif
}
#if defined(SIMDE_ARM_NEON_A32V7_ENABLE_NATIVE_ALIASES)
#if defined(SIMDE_ARM_NEON_A32V7_ENABLE_NATIVE_ALIASES) || (defined(SIMDE_ENABLE_NATIVE_ALIASES) && \
!((!defined(HEDLEY_GCC_VERSION) || (HEDLEY_GCC_VERSION_CHECK(8,0,0) && defined(SIMDE_ARM_NEON_A64V8_NATIVE))) && \
(!defined(__clang__) || (SIMDE_DETECT_CLANG_VERSION_CHECK(7,0,0) && defined(SIMDE_ARM_NEON_A64V8_NATIVE)))))
#undef vld1_u32_x3
#define vld1_u32_x3(a) simde_vld1_u32_x3((a))
#endif
......@@ -366,7 +387,9 @@ simde_vld1_u64_x3(uint64_t const ptr[HEDLEY_ARRAY_PARAM(3)]) {
return s_;
#endif
}
#if defined(SIMDE_ARM_NEON_A32V7_ENABLE_NATIVE_ALIASES)
#if defined(SIMDE_ARM_NEON_A32V7_ENABLE_NATIVE_ALIASES) || (defined(SIMDE_ENABLE_NATIVE_ALIASES) && \
!((!defined(HEDLEY_GCC_VERSION) || (HEDLEY_GCC_VERSION_CHECK(8,0,0) && defined(SIMDE_ARM_NEON_A64V8_NATIVE))) && \
(!defined(__clang__) || (SIMDE_DETECT_CLANG_VERSION_CHECK(7,0,0) && defined(SIMDE_ARM_NEON_A64V8_NATIVE)))))
#undef vld1_u64_x3
#define vld1_u64_x3(a) simde_vld1_u64_x3((a))
#endif
......@@ -394,7 +417,8 @@ simde_vld1_p8_x3(simde_poly8_t const ptr[HEDLEY_ARRAY_PARAM(24)]) {
return s_;
#endif
}
#if defined(SIMDE_ARM_NEON_A32V7_ENABLE_NATIVE_ALIASES)
#if defined(SIMDE_ARM_NEON_A32V7_ENABLE_NATIVE_ALIASES) || (defined(SIMDE_ENABLE_NATIVE_ALIASES) && \
!(!defined(HEDLEY_GCC_VERSION) || (HEDLEY_GCC_VERSION_CHECK(8,5,0) && defined(SIMDE_ARM_NEON_A64V8_NATIVE))))
#undef vld1_p8_x3
#define vld1_p8_x3(a) simde_vld1_p8_x3((a))
#endif
......@@ -422,7 +446,8 @@ simde_vld1_p16_x3(simde_poly16_t const ptr[HEDLEY_ARRAY_PARAM(12)]) {
return s_;
#endif
}
#if defined(SIMDE_ARM_NEON_A32V7_ENABLE_NATIVE_ALIASES)
#if defined(SIMDE_ARM_NEON_A32V7_ENABLE_NATIVE_ALIASES) || (defined(SIMDE_ENABLE_NATIVE_ALIASES) && \
!(!defined(HEDLEY_GCC_VERSION) || (HEDLEY_GCC_VERSION_CHECK(8,5,0) && defined(SIMDE_ARM_NEON_A64V8_NATIVE))))
#undef vld1_p16_x3
#define vld1_p16_x3(a) simde_vld1_p16_x3((a))
#endif
......@@ -452,7 +477,9 @@ simde_vld1_p64_x3(simde_poly64_t const ptr[HEDLEY_ARRAY_PARAM(3)]) {
return s_;
#endif
}
#if defined(SIMDE_ARM_NEON_A32V8_ENABLE_NATIVE_ALIASES)
#if defined(SIMDE_ARM_NEON_A32V8_ENABLE_NATIVE_ALIASES) || (defined(SIMDE_ENABLE_NATIVE_ALIASES) && \
!((!defined(HEDLEY_GCC_VERSION) || (HEDLEY_GCC_VERSION_CHECK(8,5,0) && defined(SIMDE_ARM_NEON_A64V8_NATIVE))) && \
(!defined(__clang__) || (SIMDE_DETECT_CLANG_VERSION_CHECK(9,0,0) && defined(SIMDE_ARM_NEON_A64V8_NATIVE)))))
#undef vld1_p64_x3
#define vld1_p64_x3(a) simde_vld1_p64_x3((a))
#endif
......@@ -473,7 +500,8 @@ simde_vld1_bf16_x3(simde_bfloat16 const ptr[HEDLEY_ARRAY_PARAM(12)]) {
return s_;
#endif
}
#if defined(SIMDE_ARM_NEON_A32V8_ENABLE_NATIVE_ALIASES)
#if defined(SIMDE_ARM_NEON_A32V8_ENABLE_NATIVE_ALIASES) || (defined(SIMDE_ENABLE_NATIVE_ALIASES) && \
!(defined(SIMDE_ARM_NEON_BF16)))
#undef vld1_bf16_x3
#define vld1_bf16_x3(a) simde_vld1_bf16_x3((a))
#endif
......
arm/neon/ld1_x4.h
View file @ 8c421df1
......@@ -69,7 +69,10 @@ simde_vld1_f16_x4(simde_float16_t const ptr[HEDLEY_ARRAY_PARAM(16)]) {
return s_;
#endif
}
#if defined(SIMDE_ARM_NEON_A32V7_ENABLE_NATIVE_ALIASES)
#if defined(SIMDE_ARM_NEON_A32V7_ENABLE_NATIVE_ALIASES) || (defined(SIMDE_ENABLE_NATIVE_ALIASES) && \
!(defined(SIMDE_ARM_NEON_FP16) && \
(!defined(HEDLEY_GCC_VERSION) || (HEDLEY_GCC_VERSION_CHECK(8,0,0) && defined(SIMDE_ARM_NEON_A64V8_NATIVE))) && \
(!defined(__clang__) || (SIMDE_DETECT_CLANG_VERSION_CHECK(7,0,0) && defined(SIMDE_ARM_NEON_A64V8_NATIVE)))))
#undef vld1_f16_x4
#define vld1_f16_x4(a) simde_vld1_f16_x4((a))
#endif
......@@ -101,7 +104,9 @@ simde_vld1_f32_x4(simde_float32 const ptr[HEDLEY_ARRAY_PARAM(8)]) {
return s_;
#endif
}
#if defined(SIMDE_ARM_NEON_A32V7_ENABLE_NATIVE_ALIASES)
#if defined(SIMDE_ARM_NEON_A32V7_ENABLE_NATIVE_ALIASES) || (defined(SIMDE_ENABLE_NATIVE_ALIASES) && \
!((!defined(HEDLEY_GCC_VERSION) || (HEDLEY_GCC_VERSION_CHECK(8,0,0) && defined(SIMDE_ARM_NEON_A64V8_NATIVE))) && \
(!defined(__clang__) || (SIMDE_DETECT_CLANG_VERSION_CHECK(7,0,0) && defined(SIMDE_ARM_NEON_A64V8_NATIVE)))))
#undef vld1_f32_x4
#define vld1_f32_x4(a) simde_vld1_f32_x4((a))
#endif
......@@ -133,7 +138,9 @@ simde_vld1_f64_x4(simde_float64 const ptr[HEDLEY_ARRAY_PARAM(4)]) {
return s_;
#endif
}
#if defined(SIMDE_ARM_NEON_A64V8_ENABLE_NATIVE_ALIASES)
#if defined(SIMDE_ARM_NEON_A64V8_ENABLE_NATIVE_ALIASES) || (defined(SIMDE_ENABLE_NATIVE_ALIASES) && \
!((!defined(HEDLEY_GCC_VERSION) || HEDLEY_GCC_VERSION_CHECK(8,0,0)) && \
(!defined(__clang__) || SIMDE_DETECT_CLANG_VERSION_CHECK(7,0,0))))
#undef vld1_f64_x4
#define vld1_f64_x4(a) simde_vld1_f64_x4((a))
#endif
......@@ -165,7 +172,9 @@ simde_vld1_s8_x4(int8_t const ptr[HEDLEY_ARRAY_PARAM(32)]) {
return s_;
#endif
}
#if defined(SIMDE_ARM_NEON_A32V7_ENABLE_NATIVE_ALIASES)
#if defined(SIMDE_ARM_NEON_A32V7_ENABLE_NATIVE_ALIASES) || (defined(SIMDE_ENABLE_NATIVE_ALIASES) && \
!((!defined(HEDLEY_GCC_VERSION) || (HEDLEY_GCC_VERSION_CHECK(8,0,0) && defined(SIMDE_ARM_NEON_A64V8_NATIVE))) && \
(!defined(__clang__) || (SIMDE_DETECT_CLANG_VERSION_CHECK(7,0,0) && defined(SIMDE_ARM_NEON_A64V8_NATIVE)))))
#undef vld1_s8_x4
#define vld1_s8_x4(a) simde_vld1_s8_x4((a))
#endif
......@@ -197,7 +206,9 @@ simde_vld1_s16_x4(int16_t const ptr[HEDLEY_ARRAY_PARAM(16)]) {
return s_;
#endif
}
#if defined(SIMDE_ARM_NEON_A32V7_ENABLE_NATIVE_ALIASES)
#if defined(SIMDE_ARM_NEON_A32V7_ENABLE_NATIVE_ALIASES) || (defined(SIMDE_ENABLE_NATIVE_ALIASES) && \
!((!defined(HEDLEY_GCC_VERSION) || (HEDLEY_GCC_VERSION_CHECK(8,0,0) && defined(SIMDE_ARM_NEON_A64V8_NATIVE))) && \
(!defined(__clang__) || (SIMDE_DETECT_CLANG_VERSION_CHECK(7,0,0) && defined(SIMDE_ARM_NEON_A64V8_NATIVE)))))
#undef vld1_s16_x4
#define vld1_s16_x4(a) simde_vld1_s16_x4((a))
#endif
......@@ -229,7 +240,9 @@ simde_vld1_s32_x4(int32_t const ptr[HEDLEY_ARRAY_PARAM(8)]) {
return s_;
#endif
}
#if defined(SIMDE_ARM_NEON_A32V7_ENABLE_NATIVE_ALIASES)
#if defined(SIMDE_ARM_NEON_A32V7_ENABLE_NATIVE_ALIASES) || (defined(SIMDE_ENABLE_NATIVE_ALIASES) && \
!((!defined(HEDLEY_GCC_VERSION) || (HEDLEY_GCC_VERSION_CHECK(8,0,0) && defined(SIMDE_ARM_NEON_A64V8_NATIVE))) && \
(!defined(__clang__) || (SIMDE_DETECT_CLANG_VERSION_CHECK(7,0,0) && defined(SIMDE_ARM_NEON_A64V8_NATIVE)))))
#undef vld1_s32_x4
#define vld1_s32_x4(a) simde_vld1_s32_x4((a))
#endif
......@@ -261,7 +274,9 @@ simde_vld1_s64_x4(int64_t const ptr[HEDLEY_ARRAY_PARAM(4)]) {
return s_;
#endif
}
#if defined(SIMDE_ARM_NEON_A32V7_ENABLE_NATIVE_ALIASES)
#if defined(SIMDE_ARM_NEON_A32V7_ENABLE_NATIVE_ALIASES) || (defined(SIMDE_ENABLE_NATIVE_ALIASES) && \
!((!defined(HEDLEY_GCC_VERSION) || (HEDLEY_GCC_VERSION_CHECK(8,0,0) && defined(SIMDE_ARM_NEON_A64V8_NATIVE))) && \
(!defined(__clang__) || (SIMDE_DETECT_CLANG_VERSION_CHECK(7,0,0) && defined(SIMDE_ARM_NEON_A64V8_NATIVE)))))
#undef vld1_s64_x4
#define vld1_s64_x4(a) simde_vld1_s64_x4((a))
#endif
......@@ -293,7 +308,9 @@ simde_vld1_u8_x4(uint8_t const ptr[HEDLEY_ARRAY_PARAM(32)]) {
return s_;
#endif
}
#if defined(SIMDE_ARM_NEON_A32V7_ENABLE_NATIVE_ALIASES)
#if defined(SIMDE_ARM_NEON_A32V7_ENABLE_NATIVE_ALIASES) || (defined(SIMDE_ENABLE_NATIVE_ALIASES) && \
!((!defined(HEDLEY_GCC_VERSION) || (HEDLEY_GCC_VERSION_CHECK(8,0,0) && defined(SIMDE_ARM_NEON_A64V8_NATIVE))) && \
(!defined(__clang__) || (SIMDE_DETECT_CLANG_VERSION_CHECK(7,0,0) && defined(SIMDE_ARM_NEON_A64V8_NATIVE)))))
#undef vld1_u8_x4
#define vld1_u8_x4(a) simde_vld1_u8_x4((a))
#endif
......@@ -325,7 +342,9 @@ simde_vld1_u16_x4(uint16_t const ptr[HEDLEY_ARRAY_PARAM(16)]) {
return s_;
#endif
}
#if defined(SIMDE_ARM_NEON_A32V7_ENABLE_NATIVE_ALIASES)
#if defined(SIMDE_ARM_NEON_A32V7_ENABLE_NATIVE_ALIASES) || (defined(SIMDE_ENABLE_NATIVE_ALIASES) && \
!((!defined(HEDLEY_GCC_VERSION) || (HEDLEY_GCC_VERSION_CHECK(8,0,0) && defined(SIMDE_ARM_NEON_A64V8_NATIVE))) && \
(!defined(__clang__) || (SIMDE_DETECT_CLANG_VERSION_CHECK(7,0,0) && defined(SIMDE_ARM_NEON_A64V8_NATIVE)))))
#undef vld1_u16_x4
#define vld1_u16_x4(a) simde_vld1_u16_x4((a))
#endif
......@@ -357,7 +376,9 @@ simde_vld1_u32_x4(uint32_t const ptr[HEDLEY_ARRAY_PARAM(8)]) {
return s_;
#endif
}
#if defined(SIMDE_ARM_NEON_A32V7_ENABLE_NATIVE_ALIASES)
#if defined(SIMDE_ARM_NEON_A32V7_ENABLE_NATIVE_ALIASES) || (defined(SIMDE_ENABLE_NATIVE_ALIASES) && \
!((!defined(HEDLEY_GCC_VERSION) || (HEDLEY_GCC_VERSION_CHECK(8,0,0) && defined(SIMDE_ARM_NEON_A64V8_NATIVE))) && \
(!defined(__clang__) || (SIMDE_DETECT_CLANG_VERSION_CHECK(7,0,0) && defined(SIMDE_ARM_NEON_A64V8_NATIVE)))))
#undef vld1_u32_x4
#define vld1_u32_x4(a) simde_vld1_u32_x4((a))
#endif
......@@ -389,7 +410,9 @@ simde_vld1_u64_x4(uint64_t const ptr[HEDLEY_ARRAY_PARAM(4)]) {
return s_;
#endif
}
#if defined(SIMDE_ARM_NEON_A32V7_ENABLE_NATIVE_ALIASES)
#if defined(SIMDE_ARM_NEON_A32V7_ENABLE_NATIVE_ALIASES) || (defined(SIMDE_ENABLE_NATIVE_ALIASES) && \
!((!defined(HEDLEY_GCC_VERSION) || (HEDLEY_GCC_VERSION_CHECK(8,0,0) && defined(SIMDE_ARM_NEON_A64V8_NATIVE))) && \
(!defined(__clang__) || (SIMDE_DETECT_CLANG_VERSION_CHECK(7,0,0) && defined(SIMDE_ARM_NEON_A64V8_NATIVE)))))
#undef vld1_u64_x4
#define vld1_u64_x4(a) simde_vld1_u64_x4((a))
#endif
......@@ -419,7 +442,9 @@ simde_vld1_p8_x4(simde_poly8_t const ptr[HEDLEY_ARRAY_PARAM(32)]) {
return s_;
#endif
}
#if defined(SIMDE_ARM_NEON_A32V7_ENABLE_NATIVE_ALIASES)
#if defined(SIMDE_ARM_NEON_A32V7_ENABLE_NATIVE_ALIASES) || (defined(SIMDE_ENABLE_NATIVE_ALIASES) && \
!((!defined(HEDLEY_GCC_VERSION) || (HEDLEY_GCC_VERSION_CHECK(8,0,0) && defined(SIMDE_ARM_NEON_A64V8_NATIVE))) && \
(!defined(__clang__) || (SIMDE_DETECT_CLANG_VERSION_CHECK(7,0,0) && defined(SIMDE_ARM_NEON_A64V8_NATIVE)))))
#undef vld1_p8_x4
#define vld1_p8_x4(a) simde_vld1_p8_x4((a))
#endif
......@@ -449,7 +474,8 @@ simde_vld1_p16_x4(simde_poly16_t const ptr[HEDLEY_ARRAY_PARAM(16)]) {
return s_;
#endif
}
#if defined(SIMDE_ARM_NEON_A32V7_ENABLE_NATIVE_ALIASES)
#if defined(SIMDE_ARM_NEON_A32V7_ENABLE_NATIVE_ALIASES) || (defined(SIMDE_ENABLE_NATIVE_ALIASES) && \
!(!defined(HEDLEY_GCC_VERSION) || (HEDLEY_GCC_VERSION_CHECK(8,5,0) && defined(SIMDE_ARM_NEON_A64V8_NATIVE))))
#undef vld1_p16_x4
#define vld1_p16_x4(a) simde_vld1_p16_x4((a))
#endif
......@@ -481,7 +507,9 @@ simde_vld1_p64_x4(simde_poly64_t const ptr[HEDLEY_ARRAY_PARAM(4)]) {
return s_;
#endif
}
#if defined(SIMDE_ARM_NEON_A32V8_ENABLE_NATIVE_ALIASES)
#if defined(SIMDE_ARM_NEON_A32V8_ENABLE_NATIVE_ALIASES) || (defined(SIMDE_ENABLE_NATIVE_ALIASES) && \
!((!defined(HEDLEY_GCC_VERSION) || (HEDLEY_GCC_VERSION_CHECK(8,5,0) && defined(SIMDE_ARM_NEON_A64V8_NATIVE))) && \
(!defined(__clang__) || (SIMDE_DETECT_CLANG_VERSION_CHECK(9,0,0) && defined(SIMDE_ARM_NEON_A64V8_NATIVE)))))
#undef vld1_p64_x4
#define vld1_p64_x4(a) simde_vld1_p64_x4((a))
#endif
......@@ -503,7 +531,8 @@ simde_vld1_bf16_x4(simde_bfloat16 const ptr[HEDLEY_ARRAY_PARAM(16)]) {
return s_;
#endif
}
#if defined(SIMDE_ARM_NEON_A32V8_ENABLE_NATIVE_ALIASES)
#if defined(SIMDE_ARM_NEON_A32V8_ENABLE_NATIVE_ALIASES) || (defined(SIMDE_ENABLE_NATIVE_ALIASES) && \
!(defined(SIMDE_ARM_NEON_BF16)))
#undef vld1_bf16_x4
#define vld1_bf16_x4(a) simde_vld1_bf16_x4((a))
#endif
......
arm/neon/ld1q_x2.h
View file @ 8c421df1
......@@ -48,8 +48,7 @@ simde_vld1q_f16_x2(simde_float16_t const ptr[HEDLEY_ARRAY_PARAM(16)]) {
#if \
defined(SIMDE_ARM_NEON_A32V7_NATIVE) && defined(SIMDE_ARM_NEON_FP16) && \
(!defined(HEDLEY_GCC_VERSION) || (HEDLEY_GCC_VERSION_CHECK(8,0,0) && defined(SIMDE_ARM_NEON_A64V8_NATIVE))) && \
(!defined(__clang__) || (SIMDE_DETECT_CLANG_VERSION_CHECK(7,0,0) && defined(SIMDE_ARM_NEON_A64V8_NATIVE))) && \
defined(SIMDE_ARM_NEON_FP16)
(!defined(__clang__) || (SIMDE_DETECT_CLANG_VERSION_CHECK(7,0,0) && defined(SIMDE_ARM_NEON_A64V8_NATIVE)))
return vld1q_f16_x2(ptr);
#else
simde_float16x8_private a_[2];
......@@ -66,7 +65,9 @@ simde_vld1q_f16_x2(simde_float16_t const ptr[HEDLEY_ARRAY_PARAM(16)]) {
return s_;
#endif
}
#if defined(SIMDE_ARM_NEON_A32V7_ENABLE_NATIVE_ALIASES)
#if defined(SIMDE_ARM_NEON_A32V7_ENABLE_NATIVE_ALIASES) || (defined(SIMDE_ENABLE_NATIVE_ALIASES) && !(defined(SIMDE_ARM_NEON_FP16) && \
(!defined(HEDLEY_GCC_VERSION) || (HEDLEY_GCC_VERSION_CHECK(8,0,0) && defined(SIMDE_ARM_NEON_A64V8_NATIVE))) && \
(!defined(__clang__) || (SIMDE_DETECT_CLANG_VERSION_CHECK(7,0,0) && defined(SIMDE_ARM_NEON_A64V8_NATIVE)))))
#undef vld1q_f16_x2
#define vld1q_f16_x2(a) simde_vld1q_f16_x2((a))
#endif
......@@ -94,7 +95,9 @@ simde_vld1q_f32_x2(simde_float32 const ptr[HEDLEY_ARRAY_PARAM(8)]) {
return s_;
#endif
}
#if defined(SIMDE_ARM_NEON_A32V7_ENABLE_NATIVE_ALIASES)
#if defined(SIMDE_ARM_NEON_A32V7_ENABLE_NATIVE_ALIASES) || (defined(SIMDE_ENABLE_NATIVE_ALIASES) && \
!((!defined(HEDLEY_GCC_VERSION) || (HEDLEY_GCC_VERSION_CHECK(8,0,0) && defined(SIMDE_ARM_NEON_A64V8_NATIVE))) && \
(!defined(__clang__) || (SIMDE_DETECT_CLANG_VERSION_CHECK(7,0,0) && defined(SIMDE_ARM_NEON_A64V8_NATIVE)))))
#undef vld1q_f32_x2
#define vld1q_f32_x2(a) simde_vld1q_f32_x2((a))
#endif
......@@ -122,7 +125,9 @@ simde_vld1q_f64_x2(simde_float64 const ptr[HEDLEY_ARRAY_PARAM(4)]) {
return s_;
#endif
}
#if defined(SIMDE_ARM_NEON_A64V8_ENABLE_NATIVE_ALIASES)
#if defined(SIMDE_ARM_NEON_A64V8_ENABLE_NATIVE_ALIASES) || (defined(SIMDE_ENABLE_NATIVE_ALIASES) && \
!((!defined(HEDLEY_GCC_VERSION) || HEDLEY_GCC_VERSION_CHECK(8,0,0)) && \
(!defined(__clang__) || SIMDE_DETECT_CLANG_VERSION_CHECK(7,0,0))))
#undef vld1q_f64_x2
#define vld1q_f64_x2(a) simde_vld1q_f64_x2((a))
#endif
......@@ -150,7 +155,9 @@ simde_vld1q_s8_x2(int8_t const ptr[HEDLEY_ARRAY_PARAM(32)]) {
return s_;
#endif
}
#if defined(SIMDE_ARM_NEON_A32V7_ENABLE_NATIVE_ALIASES)
#if defined(SIMDE_ARM_NEON_A32V7_ENABLE_NATIVE_ALIASES) || (defined(SIMDE_ENABLE_NATIVE_ALIASES) && \
!((!defined(HEDLEY_GCC_VERSION) || (HEDLEY_GCC_VERSION_CHECK(8,0,0) && defined(SIMDE_ARM_NEON_A64V8_NATIVE))) && \
(!defined(__clang__) || (SIMDE_DETECT_CLANG_VERSION_CHECK(7,0,0) && defined(SIMDE_ARM_NEON_A64V8_NATIVE)))))
#undef vld1q_s8_x2
#define vld1q_s8_x2(a) simde_vld1q_s8_x2((a))
#endif
......@@ -178,7 +185,9 @@ simde_vld1q_s16_x2(int16_t const ptr[HEDLEY_ARRAY_PARAM(16)]) {
return s_;
#endif
}
#if defined(SIMDE_ARM_NEON_A32V7_ENABLE_NATIVE_ALIASES)
#if defined(SIMDE_ARM_NEON_A32V7_ENABLE_NATIVE_ALIASES) || (defined(SIMDE_ENABLE_NATIVE_ALIASES) && \
!((!defined(HEDLEY_GCC_VERSION) || (HEDLEY_GCC_VERSION_CHECK(8,0,0) && defined(SIMDE_ARM_NEON_A64V8_NATIVE))) && \
(!defined(__clang__) || (SIMDE_DETECT_CLANG_VERSION_CHECK(7,0,0) && defined(SIMDE_ARM_NEON_A64V8_NATIVE)))))
#undef vld1q_s16_x2
#define vld1q_s16_x2(a) simde_vld1q_s16_x2((a))
#endif
......@@ -206,7 +215,9 @@ simde_vld1q_s32_x2(int32_t const ptr[HEDLEY_ARRAY_PARAM(8)]) {
return s_;
#endif
}
#if defined(SIMDE_ARM_NEON_A32V7_ENABLE_NATIVE_ALIASES)
#if defined(SIMDE_ARM_NEON_A32V7_ENABLE_NATIVE_ALIASES) || (defined(SIMDE_ENABLE_NATIVE_ALIASES) && \
!((!defined(HEDLEY_GCC_VERSION) || (HEDLEY_GCC_VERSION_CHECK(8,0,0) && defined(SIMDE_ARM_NEON_A64V8_NATIVE))) && \
(!defined(__clang__) || (SIMDE_DETECT_CLANG_VERSION_CHECK(7,0,0) && defined(SIMDE_ARM_NEON_A64V8_NATIVE)))))
#undef vld1q_s32_x2
#define vld1q_s32_x2(a) simde_vld1q_s32_x2((a))
#endif
......@@ -234,7 +245,9 @@ simde_vld1q_s64_x2(int64_t const ptr[HEDLEY_ARRAY_PARAM(4)]) {
return s_;
#endif
}
#if defined(SIMDE_ARM_NEON_A32V7_ENABLE_NATIVE_ALIASES)
#if defined(SIMDE_ARM_NEON_A32V7_ENABLE_NATIVE_ALIASES) || (defined(SIMDE_ENABLE_NATIVE_ALIASES) && \
!((!defined(HEDLEY_GCC_VERSION) || (HEDLEY_GCC_VERSION_CHECK(8,0,0) && defined(SIMDE_ARM_NEON_A64V8_NATIVE))) && \
(!defined(__clang__) || (SIMDE_DETECT_CLANG_VERSION_CHECK(7,0,0) && defined(SIMDE_ARM_NEON_A64V8_NATIVE)))))
#undef vld1q_s64_x2
#define vld1q_s64_x2(a) simde_vld1q_s64_x2((a))
#endif
......@@ -262,7 +275,9 @@ simde_vld1q_u8_x2(uint8_t const ptr[HEDLEY_ARRAY_PARAM(32)]) {
return s_;
#endif
}
#if defined(SIMDE_ARM_NEON_A32V7_ENABLE_NATIVE_ALIASES)
#if defined(SIMDE_ARM_NEON_A32V7_ENABLE_NATIVE_ALIASES) || (defined(SIMDE_ENABLE_NATIVE_ALIASES) && \
!((!defined(HEDLEY_GCC_VERSION) || (HEDLEY_GCC_VERSION_CHECK(8,0,0) && defined(SIMDE_ARM_NEON_A64V8_NATIVE))) && \
(!defined(__clang__) || (SIMDE_DETECT_CLANG_VERSION_CHECK(7,0,0) && defined(SIMDE_ARM_NEON_A64V8_NATIVE)))))
#undef vld1q_u8_x2
#define vld1q_u8_x2(a) simde_vld1q_u8_x2((a))
#endif
......@@ -290,7 +305,9 @@ simde_vld1q_u16_x2(uint16_t const ptr[HEDLEY_ARRAY_PARAM(16)]) {
return s_;
#endif
}
#if defined(SIMDE_ARM_NEON_A32V7_ENABLE_NATIVE_ALIASES)
#if defined(SIMDE_ARM_NEON_A32V7_ENABLE_NATIVE_ALIASES) || (defined(SIMDE_ENABLE_NATIVE_ALIASES) && \
!((!defined(HEDLEY_GCC_VERSION) || (HEDLEY_GCC_VERSION_CHECK(8,0,0) && defined(SIMDE_ARM_NEON_A64V8_NATIVE))) && \
(!defined(__clang__) || (SIMDE_DETECT_CLANG_VERSION_CHECK(7,0,0) && defined(SIMDE_ARM_NEON_A64V8_NATIVE)))))
#undef vld1q_u16_x2
#define vld1q_u16_x2(a) simde_vld1q_u16_x2((a))
#endif
......@@ -318,7 +335,9 @@ simde_vld1q_u32_x2(uint32_t const ptr[HEDLEY_ARRAY_PARAM(8)]) {
return s_;
#endif
}
#if defined(SIMDE_ARM_NEON_A32V7_ENABLE_NATIVE_ALIASES)
#if defined(SIMDE_ARM_NEON_A32V7_ENABLE_NATIVE_ALIASES) || (defined(SIMDE_ENABLE_NATIVE_ALIASES) && \
!((!defined(HEDLEY_GCC_VERSION) || (HEDLEY_GCC_VERSION_CHECK(8,0,0) && defined(SIMDE_ARM_NEON_A64V8_NATIVE))) && \
(!defined(__clang__) || (SIMDE_DETECT_CLANG_VERSION_CHECK(7,0,0) && defined(SIMDE_ARM_NEON_A64V8_NATIVE)))))
#undef vld1q_u32_x2
#define vld1q_u32_x2(a) simde_vld1q_u32_x2((a))
#endif
......@@ -346,8 +365,10 @@ simde_vld1q_u64_x2(uint64_t const ptr[HEDLEY_ARRAY_PARAM(4)]) {
return s_;
#endif
}
#if defined(SIMDE_ARM_NEON_A32V7_ENABLE_NATIVE_ALIASES)
#undef vld1q_u64_x2
#if defined(SIMDE_ARM_NEON_A32V7_ENABLE_NATIVE_ALIASES) || (defined(SIMDE_ENABLE_NATIVE_ALIASES) && \
!((!defined(HEDLEY_GCC_VERSION) || (HEDLEY_GCC_VERSION_CHECK(8,0,0) && defined(SIMDE_ARM_NEON_A64V8_NATIVE))) && \
(!defined(__clang__) || (SIMDE_DETECT_CLANG_VERSION_CHECK(7,0,0) && defined(SIMDE_ARM_NEON_A64V8_NATIVE)))))
#undef vld1q_u64_x2
#define vld1q_u64_x2(a) simde_vld1q_u64_x2((a))
#endif
......@@ -373,7 +394,8 @@ simde_vld1q_p8_x2(simde_poly8_t const ptr[HEDLEY_ARRAY_PARAM(32)]) {
return s_;
#endif
}
#if defined(SIMDE_ARM_NEON_A32V7_ENABLE_NATIVE_ALIASES)
#if defined(SIMDE_ARM_NEON_A32V7_ENABLE_NATIVE_ALIASES) || (defined(SIMDE_ENABLE_NATIVE_ALIASES) && \
!((!defined(HEDLEY_GCC_VERSION) || (HEDLEY_GCC_VERSION_CHECK(8,0,0) && defined(SIMDE_ARM_NEON_A64V8_NATIVE)))))
#undef vld1q_p8_x2
#define vld1q_p8_x2(a) simde_vld1q_p8_x2((a))
#endif
......@@ -400,7 +422,8 @@ simde_vld1q_p16_x2(simde_poly16_t const ptr[HEDLEY_ARRAY_PARAM(16)]) {
return s_;
#endif
}
#if defined(SIMDE_ARM_NEON_A32V7_ENABLE_NATIVE_ALIASES)
#if defined(SIMDE_ARM_NEON_A32V7_ENABLE_NATIVE_ALIASES) || (defined(SIMDE_ENABLE_NATIVE_ALIASES) && \
!((!defined(HEDLEY_GCC_VERSION) || (HEDLEY_GCC_VERSION_CHECK(8,0,0) && defined(SIMDE_ARM_NEON_A64V8_NATIVE)))))
#undef vld1q_p16_x2
#define vld1q_p16_x2(a) simde_vld1q_p16_x2((a))
#endif
......@@ -427,7 +450,8 @@ simde_vld1q_p64_x2(simde_poly64_t const ptr[HEDLEY_ARRAY_PARAM(4)]) {
return s_;
#endif
}
#if defined(SIMDE_ARM_NEON_A32V8_ENABLE_NATIVE_ALIASES)
#if defined(SIMDE_ARM_NEON_A32V7_ENABLE_NATIVE_ALIASES) || (defined(SIMDE_ENABLE_NATIVE_ALIASES) && \
!((!defined(HEDLEY_GCC_VERSION) || (HEDLEY_GCC_VERSION_CHECK(8,0,0) && defined(SIMDE_ARM_NEON_A64V8_NATIVE)))))
#undef vld1q_p64_x2
#define vld1q_p64_x2(a) simde_vld1q_p64_x2((a))
#endif
......@@ -447,7 +471,8 @@ simde_vld1q_bf16_x2(simde_bfloat16 const ptr[HEDLEY_ARRAY_PARAM(16)]) {
return s_;
#endif
}
#if defined(SIMDE_ARM_NEON_A32V8_ENABLE_NATIVE_ALIASES)
#if defined(SIMDE_ARM_NEON_A32V7_ENABLE_NATIVE_ALIASES) || (defined(SIMDE_ENABLE_NATIVE_ALIASES) && \
!((!defined(HEDLEY_GCC_VERSION) || (HEDLEY_GCC_VERSION_CHECK(8,0,0) && defined(SIMDE_ARM_NEON_A64V8_NATIVE)))))
#undef vld1q_bf16_x2
#define vld1q_bf16_x2(a) simde_vld1q_bf16_x2((a))
#endif
......
arm/neon/ld1q_x3.h
View file @ 8c421df1
......@@ -66,7 +66,10 @@ simde_vld1q_f16_x3(simde_float16_t const ptr[HEDLEY_ARRAY_PARAM(24)]) {
return s_;
#endif
}
#if defined(SIMDE_ARM_NEON_A32V7_ENABLE_NATIVE_ALIASES)
#if defined(SIMDE_ARM_NEON_A32V7_ENABLE_NATIVE_ALIASES) || (defined(SIMDE_ENABLE_NATIVE_ALIASES) && \
!(defined(SIMDE_ARM_NEON_FP16) && \
(!defined(HEDLEY_GCC_VERSION) || (HEDLEY_GCC_VERSION_CHECK(8,0,0) && defined(SIMDE_ARM_NEON_A64V8_NATIVE))) && \
(!defined(__clang__) || (SIMDE_DETECT_CLANG_VERSION_CHECK(7,0,0) && defined(SIMDE_ARM_NEON_A64V8_NATIVE)))))
#undef vld1q_f16_x3
#define vld1q_f16_x3(a) simde_vld1q_f16_x3((a))
#endif
......@@ -96,7 +99,9 @@ simde_vld1q_f32_x3(simde_float32 const ptr[HEDLEY_ARRAY_PARAM(12)]) {
return s_;
#endif
}
#if defined(SIMDE_ARM_NEON_A32V7_ENABLE_NATIVE_ALIASES)
#if defined(SIMDE_ARM_NEON_A32V7_ENABLE_NATIVE_ALIASES) || (defined(SIMDE_ENABLE_NATIVE_ALIASES) && \
!((!defined(HEDLEY_GCC_VERSION) || (HEDLEY_GCC_VERSION_CHECK(8,0,0) && defined(SIMDE_ARM_NEON_A64V8_NATIVE))) && \
(!defined(__clang__) || (SIMDE_DETECT_CLANG_VERSION_CHECK(7,0,0) && defined(SIMDE_ARM_NEON_A64V8_NATIVE)))))
#undef vld1q_f32_x3
#define vld1q_f32_x3(a) simde_vld1q_f32_x3((a))
#endif
......@@ -126,7 +131,9 @@ simde_vld1q_f64_x3(simde_float64 const ptr[HEDLEY_ARRAY_PARAM(6)]) {
return s_;
#endif
}
#if defined(SIMDE_ARM_NEON_A64V8_ENABLE_NATIVE_ALIASES)
#if defined(SIMDE_ARM_NEON_A64V8_ENABLE_NATIVE_ALIASES) || (defined(SIMDE_ENABLE_NATIVE_ALIASES) && \
!((!defined(HEDLEY_GCC_VERSION) || HEDLEY_GCC_VERSION_CHECK(8,0,0)) && \
(!defined(__clang__) || SIMDE_DETECT_CLANG_VERSION_CHECK(7,0,0))))
#undef vld1q_f64_x3
#define vld1q_f64_x3(a) simde_vld1q_f64_x3((a))
#endif
......@@ -156,7 +163,9 @@ simde_vld1q_s8_x3(int8_t const ptr[HEDLEY_ARRAY_PARAM(48)]) {
return s_;
#endif
}
#if defined(SIMDE_ARM_NEON_A32V7_ENABLE_NATIVE_ALIASES)
#if defined(SIMDE_ARM_NEON_A32V7_ENABLE_NATIVE_ALIASES) || (defined(SIMDE_ENABLE_NATIVE_ALIASES) && \
!((!defined(HEDLEY_GCC_VERSION) || (HEDLEY_GCC_VERSION_CHECK(8,0,0) && defined(SIMDE_ARM_NEON_A64V8_NATIVE))) && \
(!defined(__clang__) || (SIMDE_DETECT_CLANG_VERSION_CHECK(7,0,0) && defined(SIMDE_ARM_NEON_A64V8_NATIVE)))))
#undef vld1q_s8_x3
#define vld1q_s8_x3(a) simde_vld1q_s8_x3((a))
#endif
......@@ -186,7 +195,9 @@ simde_vld1q_s16_x3(int16_t const ptr[HEDLEY_ARRAY_PARAM(12)]) {
return s_;
#endif
}
#if defined(SIMDE_ARM_NEON_A32V7_ENABLE_NATIVE_ALIASES)
#if defined(SIMDE_ARM_NEON_A32V7_ENABLE_NATIVE_ALIASES) || (defined(SIMDE_ENABLE_NATIVE_ALIASES) && \
!((!defined(HEDLEY_GCC_VERSION) || (HEDLEY_GCC_VERSION_CHECK(8,0,0) && defined(SIMDE_ARM_NEON_A64V8_NATIVE))) && \
(!defined(__clang__) || (SIMDE_DETECT_CLANG_VERSION_CHECK(7,0,0) && defined(SIMDE_ARM_NEON_A64V8_NATIVE)))))
#undef vld1q_s16_x3
#define vld1q_s16_x3(a) simde_vld1q_s16_x3((a))
#endif
......@@ -216,7 +227,9 @@ simde_vld1q_s32_x3(int32_t const ptr[HEDLEY_ARRAY_PARAM(6)]) {
return s_;
#endif
}
#if defined(SIMDE_ARM_NEON_A32V7_ENABLE_NATIVE_ALIASES)
#if defined(SIMDE_ARM_NEON_A32V7_ENABLE_NATIVE_ALIASES) || (defined(SIMDE_ENABLE_NATIVE_ALIASES) && \
!((!defined(HEDLEY_GCC_VERSION) || (HEDLEY_GCC_VERSION_CHECK(8,0,0) && defined(SIMDE_ARM_NEON_A64V8_NATIVE))) && \
(!defined(__clang__) || (SIMDE_DETECT_CLANG_VERSION_CHECK(7,0,0) && defined(SIMDE_ARM_NEON_A64V8_NATIVE)))))
#undef vld1q_s32_x3
#define vld1q_s32_x3(a) simde_vld1q_s32_x3((a))
#endif
......@@ -246,7 +259,9 @@ simde_vld1q_s64_x3(int64_t const ptr[HEDLEY_ARRAY_PARAM(3)]) {
return s_;
#endif
}
#if defined(SIMDE_ARM_NEON_A32V7_ENABLE_NATIVE_ALIASES)
#if defined(SIMDE_ARM_NEON_A32V7_ENABLE_NATIVE_ALIASES) || (defined(SIMDE_ENABLE_NATIVE_ALIASES) && \
!((!defined(HEDLEY_GCC_VERSION) || (HEDLEY_GCC_VERSION_CHECK(8,0,0) && defined(SIMDE_ARM_NEON_A64V8_NATIVE))) && \
(!defined(__clang__) || (SIMDE_DETECT_CLANG_VERSION_CHECK(7,0,0) && defined(SIMDE_ARM_NEON_A64V8_NATIVE)))))
#undef vld1q_s64_x3
#define vld1q_s64_x3(a) simde_vld1q_s64_x3((a))
#endif
......@@ -276,7 +291,9 @@ simde_vld1q_u8_x3(uint8_t const ptr[HEDLEY_ARRAY_PARAM(48)]) {
return s_;
#endif
}
#if defined(SIMDE_ARM_NEON_A32V7_ENABLE_NATIVE_ALIASES)
#if defined(SIMDE_ARM_NEON_A32V7_ENABLE_NATIVE_ALIASES) || (defined(SIMDE_ENABLE_NATIVE_ALIASES) && \
!((!defined(HEDLEY_GCC_VERSION) || (HEDLEY_GCC_VERSION_CHECK(8,0,0) && defined(SIMDE_ARM_NEON_A64V8_NATIVE))) && \
(!defined(__clang__) || (SIMDE_DETECT_CLANG_VERSION_CHECK(7,0,0) && defined(SIMDE_ARM_NEON_A64V8_NATIVE)))))
#undef vld1q_u8_x3
#define vld1q_u8_x3(a) simde_vld1q_u8_x3((a))
#endif
......@@ -306,7 +323,9 @@ simde_vld1q_u16_x3(uint16_t const ptr[HEDLEY_ARRAY_PARAM(24)]) {
return s_;
#endif
}
#if defined(SIMDE_ARM_NEON_A32V7_ENABLE_NATIVE_ALIASES)
#if defined(SIMDE_ARM_NEON_A32V7_ENABLE_NATIVE_ALIASES) || (defined(SIMDE_ENABLE_NATIVE_ALIASES) && \
!((!defined(HEDLEY_GCC_VERSION) || (HEDLEY_GCC_VERSION_CHECK(8,0,0) && defined(SIMDE_ARM_NEON_A64V8_NATIVE))) && \
(!defined(__clang__) || (SIMDE_DETECT_CLANG_VERSION_CHECK(7,0,0) && defined(SIMDE_ARM_NEON_A64V8_NATIVE)))))
#undef vld1q_u16_x3
#define vld1q_u16_x3(a) simde_vld1q_u16_x3((a))
#endif
......@@ -336,7 +355,9 @@ simde_vld1q_u32_x3(uint32_t const ptr[HEDLEY_ARRAY_PARAM(6)]) {
return s_;
#endif
}
#if defined(SIMDE_ARM_NEON_A32V7_ENABLE_NATIVE_ALIASES)
#if defined(SIMDE_ARM_NEON_A32V7_ENABLE_NATIVE_ALIASES) || (defined(SIMDE_ENABLE_NATIVE_ALIASES) && \
!((!defined(HEDLEY_GCC_VERSION) || (HEDLEY_GCC_VERSION_CHECK(8,0,0) && defined(SIMDE_ARM_NEON_A64V8_NATIVE))) && \
(!defined(__clang__) || (SIMDE_DETECT_CLANG_VERSION_CHECK(7,0,0) && defined(SIMDE_ARM_NEON_A64V8_NATIVE)))))
#undef vld1q_u32_x3
#define vld1q_u32_x3(a) simde_vld1q_u32_x3((a))
#endif
......@@ -366,7 +387,9 @@ simde_vld1q_u64_x3(uint64_t const ptr[HEDLEY_ARRAY_PARAM(3)]) {
return s_;
#endif
}
#if defined(SIMDE_ARM_NEON_A32V7_ENABLE_NATIVE_ALIASES)
#if defined(SIMDE_ARM_NEON_A32V7_ENABLE_NATIVE_ALIASES) || (defined(SIMDE_ENABLE_NATIVE_ALIASES) && \
!((!defined(HEDLEY_GCC_VERSION) || (HEDLEY_GCC_VERSION_CHECK(8,0,0) && defined(SIMDE_ARM_NEON_A64V8_NATIVE))) && \
(!defined(__clang__) || (SIMDE_DETECT_CLANG_VERSION_CHECK(7,0,0) && defined(SIMDE_ARM_NEON_A64V8_NATIVE)))))
#undef vld1q_u64_x3
#define vld1q_u64_x3(a) simde_vld1q_u64_x3((a))
#endif
......@@ -395,7 +418,8 @@ simde_vld1q_p8_x3(simde_poly8_t const ptr[HEDLEY_ARRAY_PARAM(48)]) {
return s_;
#endif
}
#if defined(SIMDE_ARM_NEON_A32V7_ENABLE_NATIVE_ALIASES)
#if defined(SIMDE_ARM_NEON_A32V7_ENABLE_NATIVE_ALIASES) || (defined(SIMDE_ENABLE_NATIVE_ALIASES) && \
!((!defined(HEDLEY_GCC_VERSION) || (HEDLEY_GCC_VERSION_CHECK(8,5,0) && defined(SIMDE_ARM_NEON_A64V8_NATIVE)))))
#undef vld1q_p8_x3
#define vld1q_p8_x3(a) simde_vld1q_p8_x3((a))
#endif
......@@ -424,7 +448,8 @@ simde_vld1q_p16_x3(simde_poly16_t const ptr[HEDLEY_ARRAY_PARAM(24)]) {
return s_;
#endif
}
#if defined(SIMDE_ARM_NEON_A32V7_ENABLE_NATIVE_ALIASES)
#if defined(SIMDE_ARM_NEON_A32V7_ENABLE_NATIVE_ALIASES) || (defined(SIMDE_ENABLE_NATIVE_ALIASES) && \
!((!defined(HEDLEY_GCC_VERSION) || (HEDLEY_GCC_VERSION_CHECK(8,5,0) && defined(SIMDE_ARM_NEON_A64V8_NATIVE)))))
#undef vld1q_p16_x3
#define vld1q_p16_x3(a) simde_vld1q_p16_x3((a))
#endif
......@@ -453,7 +478,8 @@ simde_vld1q_p64_x3(simde_poly64_t const ptr[HEDLEY_ARRAY_PARAM(3)]) {
return s_;
#endif
}
#if defined(SIMDE_ARM_NEON_A32V8_ENABLE_NATIVE_ALIASES)
#if defined(SIMDE_ARM_NEON_A32V8_ENABLE_NATIVE_ALIASES) || (defined(SIMDE_ENABLE_NATIVE_ALIASES) && \
!((!defined(HEDLEY_GCC_VERSION) || (HEDLEY_GCC_VERSION_CHECK(8,5,0) && defined(SIMDE_ARM_NEON_A64V8_NATIVE)))))
#undef vld1q_p64_x3
#define vld1q_p64_x3(a) simde_vld1q_p64_x3((a))
#endif
......@@ -474,7 +500,8 @@ simde_vld1q_bf16_x3(simde_bfloat16 const ptr[HEDLEY_ARRAY_PARAM(24)]) {
return s_;
#endif
}
#if defined(SIMDE_ARM_NEON_A32V8_ENABLE_NATIVE_ALIASES)
#if defined(SIMDE_ARM_NEON_A32V8_ENABLE_NATIVE_ALIASES) || (defined(SIMDE_ENABLE_NATIVE_ALIASES) && \
!(defined(SIMDE_ARM_NEON_BF16)))
#undef vld1q_bf16_x3
#define vld1q_bf16_x3(a) simde_vld1q_bf16_x3((a))
#endif
......
arm/neon/ld1q_x4.h
View file @ 8c421df1
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arm/neon/ld2.h
View file @ 8c421df1
......@@ -455,7 +455,8 @@ simde_vld2_f16(simde_float16_t const ptr[HEDLEY_ARRAY_PARAM(8)]) {
return r;
#endif
}
#if defined(SIMDE_ARM_NEON_A32V7_ENABLE_NATIVE_ALIASES)
#if defined(SIMDE_ARM_NEON_A32V7_ENABLE_NATIVE_ALIASES) || (defined(SIMDE_ENABLE_NATIVE_ALIASES) && \
!(defined(SIMDE_ARM_NEON_FP16)))
#undef vld2_f16
#define vld2_f16(a) simde_vld2_f16((a))
#endif
......@@ -959,7 +960,8 @@ simde_vld2q_f16(simde_float16_t const ptr[HEDLEY_ARRAY_PARAM(16)]) {
return r;
#endif
}
#if defined(SIMDE_ARM_NEON_A32V7_ENABLE_NATIVE_ALIASES)
#if defined(SIMDE_ARM_NEON_A32V7_ENABLE_NATIVE_ALIASES) || (defined(SIMDE_ENABLE_NATIVE_ALIASES) && \
!(defined(SIMDE_ARM_NEON_FP16)))
#undef vld2q_f16
#define vld2q_f16(a) simde_vld2q_f16((a))
#endif
......@@ -1289,7 +1291,8 @@ simde_vld2_bf16(simde_bfloat16_t const ptr[HEDLEY_ARRAY_PARAM(8)]) {
return r;
#endif
}
#if defined(SIMDE_ARM_NEON_A32V8_ENABLE_NATIVE_ALIASES)
#if defined(SIMDE_ARM_NEON_A32V8_ENABLE_NATIVE_ALIASES) || (defined(SIMDE_ENABLE_NATIVE_ALIASES) && \
!(defined(SIMDE_ARM_NEON_BF16)))
#undef vld2_bf16
#define vld2_bf16(a) simde_vld2_bf16((a))
#endif
......@@ -1316,7 +1319,8 @@ simde_vld2q_bf16(simde_bfloat16_t const ptr[HEDLEY_ARRAY_PARAM(16)]) {
return r;
#endif
}
#if defined(SIMDE_ARM_NEON_A32V8_ENABLE_NATIVE_ALIASES)
#if defined(SIMDE_ARM_NEON_A32V8_ENABLE_NATIVE_ALIASES) || (defined(SIMDE_ENABLE_NATIVE_ALIASES) && \
!(defined(SIMDE_ARM_NEON_BF16)))
#undef vld2q_bf16
#define vld2q_bf16(a) simde_vld2q_bf16((a))
#endif
......
arm/neon/ld2_dup.h
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arm/neon/ld2_lane.h
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arm/neon/ld3.h
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arm/neon/ld3_dup.h
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arm/neon/ld3_lane.h
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arm/neon/ld4.h
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arm/neon/ld4_dup.h
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arm/neon/ld4_lane.h
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arm/neon/max.h
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arm/neon/maxnm.h
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arm/neon/maxnmv.h
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arm/neon/maxv.h
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arm/neon/min.h
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arm/neon/minnm.h
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arm/neon/minnmv.h
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arm/neon/minv.h
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arm/neon/mls.h
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arm/neon/mmlaq.h
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arm/neon/mul.h
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arm/neon/mul_lane.h
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arm/neon/mul_n.h
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arm/neon/mull.h
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arm/neon/mull_high.h
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