Skip to content

S
simde
Commit 8d90b041 authored by wewe5215's avatar wewe5215 Committed by Michael R. Crusoe
Browse files
Options

arm neon: fix `cmla{_rot{90,180,270},}_lane` with correct test-suite on ARMv8.3 system 

Formatting normalization.

Put similar functions in the same order.

Replace the last usage of SIMDE_ARCH_ARM_CHECK(8, n) with feature
checks.
Co-Authored-By: default avatarMichael R. Crusoe <crusoe@debian.org>
parent 500454a2
Expand all Hide whitespace changes
Inline Side-by-side
Showing with 891 additions and 963 deletions
arm/neon/cadd_rot270.h
View file @ 8d90b041
......@@ -52,7 +52,7 @@ simde_float16x4_t simde_vcadd_rot270_f16(simde_float16x4_t a, simde_float16x4_t
vfloat16m1_t op1 = __riscv_vrgather_vv_f16m1(__riscv_vslideup_vx_f16m1( \
__riscv_vfneg_v_f16m1(b_.sv64, 4), b_.sv64, 4, 8), __riscv_vle16_v_u16m1(idx1, 4), 4);
r_.sv64 = __riscv_vfadd_vv_f16m1(op1, a_.sv64, 4);
#elif defined(SIMDE_SHUFFLE_VECTOR_) && !defined(SIMDE_BUG_GCC_100760) && \
#elif defined(SIMDE_SHUFFLE_VECTOR_) && !defined(SIMDE_BUG_GCC_100760) && \
((SIMDE_FLOAT16_API == SIMDE_FLOAT16_API_FP16) || (SIMDE_FLOAT16_API == SIMDE_FLOAT16_API_FLOAT16))
b_.values = SIMDE_SHUFFLE_VECTOR_(16, 8, -b_.values, b_.values, 5, 0, 7, 2);
r_.values = b_.values + a_.values;
......@@ -91,7 +91,7 @@ simde_float16x8_t simde_vcaddq_rot270_f16(simde_float16x8_t a, simde_float16x8_t
vfloat16m1_t op1 = __riscv_vlmul_trunc_v_f16m2_f16m1(__riscv_vrgather_vv_f16m2(__riscv_vslideup_vx_f16m2( \
__riscv_vfneg_v_f16m2(b_tmp, 8), b_tmp, 8, 16), __riscv_vle16_v_u16m2(idx1, 8), 8));
r_.sv128 = __riscv_vfadd_vv_f16m1(op1, a_.sv128, 8);
#elif defined(SIMDE_SHUFFLE_VECTOR_) && \
#elif defined(SIMDE_SHUFFLE_VECTOR_) && \
((SIMDE_FLOAT16_API == SIMDE_FLOAT16_API_FP16) || (SIMDE_FLOAT16_API == SIMDE_FLOAT16_API_FLOAT16))
b_.values = SIMDE_SHUFFLE_VECTOR_(16, 16, -b_.values, b_.values, 9, 0, 11, 2, 13, 4, 15, 6);
r_.values = b_.values + a_.values;
......@@ -191,7 +191,7 @@ simde_float32x4_t simde_vcaddq_rot270_f32(simde_float32x4_t a, simde_float32x4_t
SIMDE_FUNCTION_ATTRIBUTES
simde_float64x2_t simde_vcaddq_rot270_f64(simde_float64x2_t a, simde_float64x2_t b)
{
#if defined(SIMDE_ARM_NEON_A64V8_NATIVE) && defined(SIMDE_ARCH_ARM_COMPLEX) && \
#if defined(SIMDE_ARM_NEON_A64V8_NATIVE) && defined(SIMDE_ARCH_ARM_COMPLEX) && \
(!defined(HEDLEY_GCC_VERSION) || HEDLEY_GCC_VERSION_CHECK(9, 0, 0)) && \
(!defined(__clang__) || SIMDE_DETECT_CLANG_VERSION_CHECK(15, 0, 0))
return vcaddq_rot270_f64(a, b);
......
arm/neon/cadd_rot90.h
View file @ 8d90b041
......@@ -52,7 +52,7 @@ simde_float16x4_t simde_vcadd_rot90_f16(simde_float16x4_t a, simde_float16x4_t b
vfloat16m1_t op1 = __riscv_vrgather_vv_f16m1(__riscv_vslideup_vx_f16m1( \
__riscv_vfneg_v_f16m1(b_.sv64, 4), b_.sv64, 4, 8), __riscv_vle16_v_u16m1(idx1, 4), 4);
r_.sv64 = __riscv_vfadd_vv_f16m1(op1, a_.sv64, 4);
#elif defined(SIMDE_SHUFFLE_VECTOR_) && \
#elif defined(SIMDE_SHUFFLE_VECTOR_) && \
((SIMDE_FLOAT16_API == SIMDE_FLOAT16_API_FP16) || (SIMDE_FLOAT16_API == SIMDE_FLOAT16_API_FLOAT16))
b_.values = SIMDE_SHUFFLE_VECTOR_(16, 8, -b_.values, b_.values, 1, 4, 3, 6);
r_.values = b_.values + a_.values;
......@@ -91,7 +91,7 @@ simde_float16x8_t simde_vcaddq_rot90_f16(simde_float16x8_t a, simde_float16x8_t
vfloat16m1_t op1 = __riscv_vlmul_trunc_v_f16m2_f16m1(__riscv_vrgather_vv_f16m2(__riscv_vslideup_vx_f16m2( \
__riscv_vfneg_v_f16m2(b_tmp, 8), b_tmp, 8, 16), __riscv_vle16_v_u16m2(idx1, 8), 8));
r_.sv128 = __riscv_vfadd_vv_f16m1(op1, a_.sv128, 8);
#elif defined(SIMDE_SHUFFLE_VECTOR_) && \
#elif defined(SIMDE_SHUFFLE_VECTOR_) && \
((SIMDE_FLOAT16_API == SIMDE_FLOAT16_API_FP16) || (SIMDE_FLOAT16_API == SIMDE_FLOAT16_API_FLOAT16))
b_.values = SIMDE_SHUFFLE_VECTOR_(16, 16, -b_.values, b_.values, 1, 8, 3, 10, 5, 12, 7, 14);
r_.values = b_.values + a_.values;
......@@ -191,7 +191,7 @@ simde_float32x4_t simde_vcaddq_rot90_f32(simde_float32x4_t a, simde_float32x4_t
SIMDE_FUNCTION_ATTRIBUTES
simde_float64x2_t simde_vcaddq_rot90_f64(simde_float64x2_t a, simde_float64x2_t b)
{
#if defined(SIMDE_ARM_NEON_A64V8_NATIVE) && defined(SIMDE_ARCH_ARM_COMPLEX) && \
#if defined(SIMDE_ARM_NEON_A64V8_NATIVE) && defined(SIMDE_ARCH_ARM_COMPLEX) && \
(!defined(HEDLEY_GCC_VERSION) || HEDLEY_GCC_VERSION_CHECK(9, 0, 0)) && \
(!defined(__clang__) || SIMDE_DETECT_CLANG_VERSION_CHECK(15, 0, 0))
return vcaddq_rot90_f64(a, b);
......
arm/neon/cmla_lane.h
View file @ 8d90b041
This diff is collapsed.
arm/neon/cmla_rot180.h
View file @ 8d90b041
......@@ -71,13 +71,48 @@ simde_vcmla_rot180_f16(simde_float16x4_t r, simde_float16x4_t a, simde_float16x4
#define vcmla_rot180_f16(r, a, b) simde_vcmla_rot180_f16(r, a, b)
#endif
SIMDE_FUNCTION_ATTRIBUTES
simde_float32x2_t
simde_vcmla_rot180_f32(simde_float32x2_t r, simde_float32x2_t a, simde_float32x2_t b) {
#if defined(SIMDE_ARM_NEON_A32V8_NATIVE) && defined(SIMDE_ARCH_ARM_COMPLEX) && \
(!defined(HEDLEY_GCC_VERSION) || HEDLEY_GCC_VERSION_CHECK(9, 0, 0)) && \
(!defined(__clang__) || SIMDE_DETECT_CLANG_VERSION_CHECK(12, 0, 0))
return vcmla_rot180_f32(r, a, b);
#else
simde_float32x2_private
r_ = simde_float32x2_to_private(r),
a_ = simde_float32x2_to_private(a),
b_ = simde_float32x2_to_private(b);
#if defined(SIMDE_SHUFFLE_VECTOR_)
a_.values = SIMDE_SHUFFLE_VECTOR_(32, 8, a_.values, a_.values, 0, 0);
b_.values = SIMDE_SHUFFLE_VECTOR_(32, 8, -b_.values, -b_.values, 0, 1);
r_.values += b_.values * a_.values;
#else
SIMDE_VECTORIZE
for (size_t i = 0 ; i < (sizeof(r_.values) / (2 * sizeof(r_.values[0]))) ; i++) {
r_.values[2 * i] += -(b_.values[2 * i]) * a_.values[2 * i];
r_.values[2 * i + 1] += -(b_.values[2 * i + 1]) * a_.values[2 * i];
}
#endif
return simde_float32x2_from_private(r_);
#endif
}
#if defined(SIMDE_ARM_NEON_A32V8_ENABLE_NATIVE_ALIASES) || (defined(SIMDE_ENABLE_NATIVE_ALIASES) && \
!(defined(SIMDE_ARCH_ARM_COMPLEX) && \
(!defined(HEDLEY_GCC_VERSION) || HEDLEY_GCC_VERSION_CHECK(9,0,0)) && \
(!defined(__clang__) || SIMDE_DETECT_CLANG_VERSION_CHECK(12,0,0))))
#undef vcmla_rot180_f32
#define vcmla_rot180_f32(r, a, b) simde_vcmla_rot180_f32(r, a, b)
#endif
SIMDE_FUNCTION_ATTRIBUTES
simde_float16x8_t
simde_vcmlaq_rot180_f16(simde_float16x8_t r, simde_float16x8_t a, simde_float16x8_t b) {
#if defined(SIMDE_ARM_NEON_A32V8_NATIVE) && \
#if defined(SIMDE_ARM_NEON_A32V8_NATIVE) && defined(SIMDE_ARM_NEON_FP16) && defined(SIMDE_ARCH_ARM_COMPLEX) && \
(!defined(HEDLEY_GCC_VERSION) || HEDLEY_GCC_VERSION_CHECK(8,5,0)) && \
(!defined(__clang__) || SIMDE_DETECT_CLANG_VERSION_CHECK(12,0,0)) && \
defined(SIMDE_ARM_NEON_FP16) && defined(SIMDE_ARCH_ARM_COMPLEX)
(!defined(__clang__) || SIMDE_DETECT_CLANG_VERSION_CHECK(12,0,0))
return vcmlaq_rot180_f16(r, a, b);
#else
simde_float16x8_private
......@@ -101,51 +136,13 @@ simde_vcmlaq_rot180_f16(simde_float16x8_t r, simde_float16x8_t a, simde_float16x
#endif
}
#if defined(SIMDE_ARM_NEON_A32V8_ENABLE_NATIVE_ALIASES) || (defined(SIMDE_ENABLE_NATIVE_ALIASES) && \
!((!defined(HEDLEY_GCC_VERSION) || HEDLEY_GCC_VERSION_CHECK(8,5,0)) && \
(!defined(__clang__) || SIMDE_DETECT_CLANG_VERSION_CHECK(12,0,0)) && \
defined(SIMDE_ARM_NEON_FP16) && defined(SIMDE_ARCH_ARM_COMPLEX)))
!(defined(SIMDE_ARCH_ARM_COMPLEX) && defined(SIMDE_ARM_NEON_FP16) && \
(!defined(HEDLEY_GCC_VERSION) || HEDLEY_GCC_VERSION_CHECK(8,5,0)) && \
(!defined(__clang__) || SIMDE_DETECT_CLANG_VERSION_CHECK(12,0,0))))
#undef vcmlaq_rot180_f16
#define vcmlaq_rot180_f16(r, a, b) simde_vcmlaq_rot180_f16(r, a, b)
#endif
SIMDE_FUNCTION_ATTRIBUTES
simde_float32x2_t
simde_vcmla_rot180_f32(simde_float32x2_t r, simde_float32x2_t a, simde_float32x2_t b) {
#if defined(SIMDE_ARM_NEON_A32V8_NATIVE) && \
(!defined(HEDLEY_GCC_VERSION) || HEDLEY_GCC_VERSION_CHECK(9,0,0)) && \
(!defined(__clang__) || SIMDE_DETECT_CLANG_VERSION_CHECK(12,0,0)) && \
defined(SIMDE_ARCH_ARM_COMPLEX)
return vcmla_rot180_f32(r, a, b);
#else
simde_float32x2_private
r_ = simde_float32x2_to_private(r),
a_ = simde_float32x2_to_private(a),
b_ = simde_float32x2_to_private(b);
#if defined(SIMDE_SHUFFLE_VECTOR_)
a_.values = SIMDE_SHUFFLE_VECTOR_(32, 8, a_.values, a_.values, 0, 0);
b_.values = SIMDE_SHUFFLE_VECTOR_(32, 8, -b_.values, -b_.values, 0, 1);
r_.values += b_.values * a_.values;
#else
SIMDE_VECTORIZE
for (size_t i = 0 ; i < (sizeof(r_.values) / (2 * sizeof(r_.values[0]))) ; i++) {
r_.values[2 * i] += -(b_.values[2 * i]) * a_.values[2 * i];
r_.values[2 * i + 1] += -(b_.values[2 * i + 1]) * a_.values[2 * i];
}
#endif
return simde_float32x2_from_private(r_);
#endif
}
#if defined(SIMDE_ARM_NEON_A32V8_ENABLE_NATIVE_ALIASES) || (defined(SIMDE_ENABLE_NATIVE_ALIASES) && \
!((!defined(HEDLEY_GCC_VERSION) || HEDLEY_GCC_VERSION_CHECK(9,0,0)) && \
(!defined(__clang__) || SIMDE_DETECT_CLANG_VERSION_CHECK(12,0,0)) && \
defined(SIMDE_ARCH_ARM_COMPLEX)))
#undef vcmla_rot180_f32
#define vcmla_rot180_f32(r, a, b) simde_vcmla_rot180_f32(r, a, b)
#endif
SIMDE_FUNCTION_ATTRIBUTES
simde_float32x4_t
simde_vcmlaq_rot180_f32(simde_float32x4_t r, simde_float32x4_t a, simde_float32x4_t b) {
......@@ -180,9 +177,9 @@ simde_vcmlaq_rot180_f32(simde_float32x4_t r, simde_float32x4_t a, simde_float32x
#endif
}
#if defined(SIMDE_ARM_NEON_A32V8_ENABLE_NATIVE_ALIASES) || (defined(SIMDE_ENABLE_NATIVE_ALIASES) && \
!((!defined(HEDLEY_GCC_VERSION) || HEDLEY_GCC_VERSION_CHECK(9,0,0)) && \
(!defined(__clang__) || SIMDE_DETECT_CLANG_VERSION_CHECK(12,0,0)) && \
defined(SIMDE_ARCH_ARM_COMPLEX)))
!(defined(SIMDE_ARCH_ARM_COMPLEX) && \
(!defined(HEDLEY_GCC_VERSION) || HEDLEY_GCC_VERSION_CHECK(9,0,0)) && \
(!defined(__clang__) || SIMDE_DETECT_CLANG_VERSION_CHECK(12,0,0))))
#undef vcmlaq_rot180_f32
#define vcmlaq_rot180_f32(r, a, b) simde_vcmlaq_rot180_f32(r, a, b)
#endif
......
arm/neon/cmla_rot180_lane.h
View file @ 8d90b041
This diff is collapsed.
arm/neon/cmla_rot270.h
View file @ 8d90b041
......@@ -37,10 +37,9 @@ SIMDE_BEGIN_DECLS_
SIMDE_FUNCTION_ATTRIBUTES
simde_float16x4_t
simde_vcmla_rot270_f16(simde_float16x4_t r, simde_float16x4_t a, simde_float16x4_t b) {
#if defined(SIMDE_ARM_NEON_A32V8_NATIVE) && \
#if defined(SIMDE_ARM_NEON_A32V8_NATIVE) && defined(SIMDE_ARM_NEON_FP16) && defined(SIMDE_ARCH_ARM_COMPLEX) && \
(!defined(HEDLEY_GCC_VERSION) || HEDLEY_GCC_VERSION_CHECK(8,5,0)) && \
(!defined(__clang__) || SIMDE_DETECT_CLANG_VERSION_CHECK(12,0,0)) && \
defined(SIMDE_ARM_NEON_FP16) && defined(SIMDE_ARCH_ARM_COMPLEX)
(!defined(__clang__) || SIMDE_DETECT_CLANG_VERSION_CHECK(12,0,0))
return vcmla_rot270_f16(r, a, b);
#else
simde_float16x4_private
......@@ -64,57 +63,19 @@ simde_vcmla_rot270_f16(simde_float16x4_t r, simde_float16x4_t a, simde_float16x4
#endif
}
#if defined(SIMDE_ARM_NEON_A32V8_ENABLE_NATIVE_ALIASES) || (defined(SIMDE_ENABLE_NATIVE_ALIASES) && \
!((!defined(HEDLEY_GCC_VERSION) || HEDLEY_GCC_VERSION_CHECK(8,5,0)) && \
(!defined(__clang__) || SIMDE_DETECT_CLANG_VERSION_CHECK(12,0,0)) && \
defined(SIMDE_ARM_NEON_FP16) && defined(SIMDE_ARCH_ARM_COMPLEX)))
!(defined(SIMDE_ARCH_ARM_COMPLEX) && defined(SIMDE_ARM_NEON_FP16) && \
(!defined(HEDLEY_GCC_VERSION) || HEDLEY_GCC_VERSION_CHECK(8,5,0)) && \
(!defined(__clang__) || SIMDE_DETECT_CLANG_VERSION_CHECK(12,0,0))))
#undef vcmla_rot270_f16
#define vcmla_rot270_f16(r, a, b) simde_vcmla_rot270_f16(r, a, b)
#endif
SIMDE_FUNCTION_ATTRIBUTES
simde_float16x8_t
simde_vcmlaq_rot270_f16(simde_float16x8_t r, simde_float16x8_t a, simde_float16x8_t b) {
#if defined(SIMDE_ARM_NEON_A32V8_NATIVE) && \
(!defined(HEDLEY_GCC_VERSION) || HEDLEY_GCC_VERSION_CHECK(8,5,0)) && \
(!defined(__clang__) || SIMDE_DETECT_CLANG_VERSION_CHECK(12,0,0)) && \
defined(SIMDE_ARM_NEON_FP16) && defined(SIMDE_ARCH_ARM_COMPLEX)
return vcmlaq_rot270_f16(r, a, b);
#else
simde_float16x8_private
r_ = simde_float16x8_to_private(r),
a_ = simde_float16x8_to_private(a),
b_ = simde_float16x8_to_private(b);
SIMDE_VECTORIZE
for (size_t i = 0 ; i < (sizeof(r_.values) / (2 * sizeof(r_.values[0]))) ; i++) {
r_.values[2 * i] = simde_float16_from_float32(
simde_float16_to_float32(r_.values[2 * i]) +
simde_float16_to_float32(b_.values[2 * i + 1]) *
simde_float16_to_float32(a_.values[2 * i + 1]));
r_.values[2 * i + 1] = simde_float16_from_float32(
simde_float16_to_float32(r_.values[2 * i + 1]) -
simde_float16_to_float32(b_.values[2 * i]) *
simde_float16_to_float32(a_.values[2 * i + 1]));
}
return simde_float16x8_from_private(r_);
#endif
}
#if defined(SIMDE_ARM_NEON_A32V8_ENABLE_NATIVE_ALIASES) || (defined(SIMDE_ENABLE_NATIVE_ALIASES) && \
!((!defined(HEDLEY_GCC_VERSION) || HEDLEY_GCC_VERSION_CHECK(8,5,0)) && \
(!defined(__clang__) || SIMDE_DETECT_CLANG_VERSION_CHECK(12,0,0)) && \
defined(SIMDE_ARM_NEON_FP16) && defined(SIMDE_ARCH_ARM_COMPLEX)))
#undef vcmlaq_rot270_f16
#define vcmlaq_rot270_f16(r, a, b) simde_vcmlaq_rot270_f16(r, a, b)
#endif
SIMDE_FUNCTION_ATTRIBUTES
simde_float32x2_t
simde_vcmla_rot270_f32(simde_float32x2_t r, simde_float32x2_t a, simde_float32x2_t b) {
#if defined(SIMDE_ARM_NEON_A32V8_NATIVE) && \
#if defined(SIMDE_ARM_NEON_A32V8_NATIVE) && defined(SIMDE_ARCH_ARM_COMPLEX) && \
(!defined(HEDLEY_GCC_VERSION) || HEDLEY_GCC_VERSION_CHECK(9,0,0)) && \
(!defined(__clang__) || SIMDE_DETECT_CLANG_VERSION_CHECK(12,0,0)) && \
defined(SIMDE_ARCH_ARM_COMPLEX)
(!defined(__clang__) || SIMDE_DETECT_CLANG_VERSION_CHECK(12,0,0))
return vcmla_rot270_f32(r, a, b);
#else
simde_float32x2_private
......@@ -138,20 +99,55 @@ simde_vcmla_rot270_f32(simde_float32x2_t r, simde_float32x2_t a, simde_float32x2
#endif
}
#if defined(SIMDE_ARM_NEON_A32V8_ENABLE_NATIVE_ALIASES) || (defined(SIMDE_ENABLE_NATIVE_ALIASES) && \
!((!defined(HEDLEY_GCC_VERSION) || HEDLEY_GCC_VERSION_CHECK(9,0,0)) && \
(!defined(__clang__) || SIMDE_DETECT_CLANG_VERSION_CHECK(12,0,0)) && \
defined(SIMDE_ARCH_ARM_COMPLEX)))
!(defined(SIMDE_ARCH_ARM_COMPLEX) && \
(!defined(HEDLEY_GCC_VERSION) || HEDLEY_GCC_VERSION_CHECK(9,0,0)) && \
(!defined(__clang__) || SIMDE_DETECT_CLANG_VERSION_CHECK(12,0,0))))
#undef vcmla_rot270_f32
#define vcmla_rot270_f32(r, a, b) simde_vcmla_rot270_f32(r, a, b)
#endif
SIMDE_FUNCTION_ATTRIBUTES
simde_float16x8_t
simde_vcmlaq_rot270_f16(simde_float16x8_t r, simde_float16x8_t a, simde_float16x8_t b) {
#if defined(SIMDE_ARM_NEON_A32V8_NATIVE) && defined(SIMDE_ARM_NEON_FP16) && defined(SIMDE_ARCH_ARM_COMPLEX) && \
(!defined(HEDLEY_GCC_VERSION) || HEDLEY_GCC_VERSION_CHECK(8,5,0)) && \
(!defined(__clang__) || SIMDE_DETECT_CLANG_VERSION_CHECK(12,0,0))
return vcmlaq_rot270_f16(r, a, b);
#else
simde_float16x8_private
r_ = simde_float16x8_to_private(r),
a_ = simde_float16x8_to_private(a),
b_ = simde_float16x8_to_private(b);
SIMDE_VECTORIZE
for (size_t i = 0 ; i < (sizeof(r_.values) / (2 * sizeof(r_.values[0]))) ; i++) {
r_.values[2 * i] = simde_float16_from_float32(
simde_float16_to_float32(r_.values[2 * i]) +
simde_float16_to_float32(b_.values[2 * i + 1]) *
simde_float16_to_float32(a_.values[2 * i + 1]));
r_.values[2 * i + 1] = simde_float16_from_float32(
simde_float16_to_float32(r_.values[2 * i + 1]) -
simde_float16_to_float32(b_.values[2 * i]) *
simde_float16_to_float32(a_.values[2 * i + 1]));
}
return simde_float16x8_from_private(r_);
#endif
}
#if defined(SIMDE_ARM_NEON_A32V8_ENABLE_NATIVE_ALIASES) || (defined(SIMDE_ENABLE_NATIVE_ALIASES) && \
!(defined(SIMDE_ARCH_ARM_COMPLEX) && defined(SIMDE_ARM_NEON_FP16) && \
(!defined(HEDLEY_GCC_VERSION) || HEDLEY_GCC_VERSION_CHECK(8,5,0)) && \
(!defined(__clang__) || SIMDE_DETECT_CLANG_VERSION_CHECK(12,0,0))))
#undef vcmlaq_rot270_f16
#define vcmlaq_rot270_f16(r, a, b) simde_vcmlaq_rot270_f16(r, a, b)
#endif
SIMDE_FUNCTION_ATTRIBUTES
simde_float32x4_t
simde_vcmlaq_rot270_f32(simde_float32x4_t r, simde_float32x4_t a, simde_float32x4_t b) {
#if defined(SIMDE_ARM_NEON_A32V8_NATIVE) && \
#if defined(SIMDE_ARM_NEON_A32V8_NATIVE) && defined(SIMDE_ARCH_ARM_COMPLEX) && \
(!defined(HEDLEY_GCC_VERSION) || HEDLEY_GCC_VERSION_CHECK(9,0,0)) && \
(!defined(__clang__) || SIMDE_DETECT_CLANG_VERSION_CHECK(12,0,0)) && \
defined(SIMDE_ARCH_ARM_COMPLEX)
(!defined(__clang__) || SIMDE_DETECT_CLANG_VERSION_CHECK(12,0,0))
return vcmlaq_rot270_f32(r, a, b);
#else
simde_float32x4_private
......@@ -179,9 +175,9 @@ simde_vcmlaq_rot270_f32(simde_float32x4_t r, simde_float32x4_t a, simde_float32x
#endif
}
#if defined(SIMDE_ARM_NEON_A32V8_ENABLE_NATIVE_ALIASES) || (defined(SIMDE_ENABLE_NATIVE_ALIASES) && \
!((!defined(HEDLEY_GCC_VERSION) || HEDLEY_GCC_VERSION_CHECK(9,0,0)) && \
(!defined(__clang__) || SIMDE_DETECT_CLANG_VERSION_CHECK(12,0,0)) && \
defined(SIMDE_ARCH_ARM_COMPLEX)))
!(defined(SIMDE_ARCH_ARM_COMPLEX) && \
(!defined(HEDLEY_GCC_VERSION) || HEDLEY_GCC_VERSION_CHECK(9,0,0)) && \
(!defined(__clang__) || SIMDE_DETECT_CLANG_VERSION_CHECK(12,0,0))))
#undef vcmlaq_rot270_f32
#define vcmlaq_rot270_f32(r, a, b) simde_vcmlaq_rot270_f32(r, a, b)
#endif
......
arm/neon/cmla_rot270_lane.h
View file @ 8d90b041
This diff is collapsed.
arm/neon/cmla_rot90.h
View file @ 8d90b041
......@@ -71,43 +71,6 @@ simde_vcmla_rot90_f16(simde_float16x4_t r, simde_float16x4_t a, simde_float16x4_
#define vcmla_rot90_f16(r, a, b) simde_vcmla_rot90_f16(r, a, b)
#endif
SIMDE_FUNCTION_ATTRIBUTES
simde_float16x8_t
simde_vcmlaq_rot90_f16(simde_float16x8_t r, simde_float16x8_t a, simde_float16x8_t b) {
#if defined(SIMDE_ARM_NEON_A32V8_NATIVE) && \
(!defined(HEDLEY_GCC_VERSION) || HEDLEY_GCC_VERSION_CHECK(8,5,0)) && \
(!defined(__clang__) || SIMDE_DETECT_CLANG_VERSION_CHECK(12,0,0)) && \
defined(SIMDE_ARM_NEON_FP16) && defined(SIMDE_ARCH_ARM_COMPLEX)
return vcmlaq_rot90_f16(r, a, b);
#else
simde_float16x8_private
r_ = simde_float16x8_to_private(r),
a_ = simde_float16x8_to_private(a),
b_ = simde_float16x8_to_private(b);
SIMDE_VECTORIZE
for (size_t i = 0 ; i < (sizeof(r_.values) / (2 * sizeof(r_.values[0]))) ; i++) {
r_.values[2 * i] = simde_float16_from_float32(
simde_float16_to_float32(r_.values[2 * i]) -
simde_float16_to_float32(b_.values[2 * i + 1]) *
simde_float16_to_float32(a_.values[2 * i + 1]));
r_.values[2 * i + 1] = simde_float16_from_float32(
simde_float16_to_float32(r_.values[2 * i + 1]) +
simde_float16_to_float32(b_.values[2 * i]) *
simde_float16_to_float32(a_.values[2 * i + 1]));
}
return simde_float16x8_from_private(r_);
#endif
}
#if defined(SIMDE_ARM_NEON_A32V8_ENABLE_NATIVE_ALIASES) || (defined(SIMDE_ENABLE_NATIVE_ALIASES) && \
!((!defined(HEDLEY_GCC_VERSION) || HEDLEY_GCC_VERSION_CHECK(8,5,0)) && \
(!defined(__clang__) || SIMDE_DETECT_CLANG_VERSION_CHECK(12,0,0)) && \
defined(SIMDE_ARM_NEON_FP16) && defined(SIMDE_ARCH_ARM_COMPLEX)))
#undef vcmlaq_rot90_f16
#define vcmlaq_rot90_f16(r, a, b) simde_vcmlaq_rot90_f16(r, a, b)
#endif
SIMDE_FUNCTION_ATTRIBUTES
simde_float32x2_t
simde_vcmla_rot90_f32(simde_float32x2_t r, simde_float32x2_t a, simde_float32x2_t b) {
......@@ -145,6 +108,43 @@ simde_vcmla_rot90_f32(simde_float32x2_t r, simde_float32x2_t a, simde_float32x2_
#define vcmla_rot90_f32(r, a, b) simde_vcmla_rot90_f32(r, a, b)
#endif
SIMDE_FUNCTION_ATTRIBUTES
simde_float16x8_t
simde_vcmlaq_rot90_f16(simde_float16x8_t r, simde_float16x8_t a, simde_float16x8_t b) {
#if defined(SIMDE_ARM_NEON_A32V8_NATIVE) && \
(!defined(HEDLEY_GCC_VERSION) || HEDLEY_GCC_VERSION_CHECK(8,5,0)) && \
(!defined(__clang__) || SIMDE_DETECT_CLANG_VERSION_CHECK(12,0,0)) && \
defined(SIMDE_ARM_NEON_FP16) && defined(SIMDE_ARCH_ARM_COMPLEX)
return vcmlaq_rot90_f16(r, a, b);
#else
simde_float16x8_private
r_ = simde_float16x8_to_private(r),
a_ = simde_float16x8_to_private(a),
b_ = simde_float16x8_to_private(b);
SIMDE_VECTORIZE
for (size_t i = 0 ; i < (sizeof(r_.values) / (2 * sizeof(r_.values[0]))) ; i++) {
r_.values[2 * i] = simde_float16_from_float32(
simde_float16_to_float32(r_.values[2 * i]) -
simde_float16_to_float32(b_.values[2 * i + 1]) *
simde_float16_to_float32(a_.values[2 * i + 1]));
r_.values[2 * i + 1] = simde_float16_from_float32(
simde_float16_to_float32(r_.values[2 * i + 1]) +
simde_float16_to_float32(b_.values[2 * i]) *
simde_float16_to_float32(a_.values[2 * i + 1]));
}
return simde_float16x8_from_private(r_);
#endif
}
#if defined(SIMDE_ARM_NEON_A32V8_ENABLE_NATIVE_ALIASES) || (defined(SIMDE_ENABLE_NATIVE_ALIASES) && \
!((!defined(HEDLEY_GCC_VERSION) || HEDLEY_GCC_VERSION_CHECK(8,5,0)) && \
(!defined(__clang__) || SIMDE_DETECT_CLANG_VERSION_CHECK(12,0,0)) && \
defined(SIMDE_ARM_NEON_FP16) && defined(SIMDE_ARCH_ARM_COMPLEX)))
#undef vcmlaq_rot90_f16
#define vcmlaq_rot90_f16(r, a, b) simde_vcmlaq_rot90_f16(r, a, b)
#endif
SIMDE_FUNCTION_ATTRIBUTES
simde_float32x4_t
simde_vcmlaq_rot90_f32(simde_float32x4_t r, simde_float32x4_t a, simde_float32x4_t b) {
......
arm/neon/cmla_rot90_lane.h
View file @ 8d90b041
This diff is collapsed.
arm/neon/rshr_n.h
View file @ 8d90b041
......@@ -144,7 +144,7 @@ simde_vrshrq_n_s16 (const simde_int16x8_t a, const int n)
#define simde_vrshrq_n_s16(a, n) vrshrq_n_s16((a), (n))
#elif SIMDE_NATURAL_VECTOR_SIZE > 0
#define simde_vrshrq_n_s16(a, n) simde_vsubq_s16(simde_vshrq_n_s16((a), (n)), simde_vreinterpretq_s16_u16( \
simde_vtstq_u16(simde_vreinterpretq_u16_s16(a), \
simde_vtstq_u16(simde_vreinterpretq_u16_s16(a), \
simde_vdupq_n_u16(HEDLEY_STATIC_CAST(uint16_t, 1 << ((n) - 1))))))
#endif
#if defined(SIMDE_ARM_NEON_A32V7_ENABLE_NATIVE_ALIASES)
......@@ -329,7 +329,7 @@ simde_vrshr_n_s8 (const simde_int8x8_t a, const int n)
#define simde_vrshr_n_s8(a, n) vrshr_n_s8((a), (n))
#elif SIMDE_NATURAL_VECTOR_SIZE > 0
#define simde_vrshr_n_s8(a, n) simde_vsub_s8(simde_vshr_n_s8((a), (n)), simde_vreinterpret_s8_u8( \
simde_vtst_u8(simde_vreinterpret_u8_s8(a), \
simde_vtst_u8(simde_vreinterpret_u8_s8(a), \
simde_vdup_n_u8(HEDLEY_STATIC_CAST(uint8_t, 1 << ((n) - 1))))))
#endif
#if defined(SIMDE_ARM_NEON_A32V7_ENABLE_NATIVE_ALIASES)
......
arm/neon/shrn_high_n.h
View file @ 8d90b041
......@@ -73,8 +73,8 @@ SIMDE_BEGIN_DECLS_
#define simde_vshrn_high_n_u16(r, a, n) vshrn_high_n_u16((r), (a), (n))
#else
#define simde_vshrn_high_n_u16(r, a, n) \
simde_vreinterpretq_u8_s8( \
simde_vcombine_s8(simde_vreinterpret_s8_u8(r), \
simde_vreinterpretq_u8_s8( \
simde_vcombine_s8(simde_vreinterpret_s8_u8(r), \
simde_vshrn_n_s16(simde_vreinterpretq_s16_u16(a), (n))))
#endif
#if defined(SIMDE_ARM_NEON_A64V8_ENABLE_NATIVE_ALIASES)
......@@ -87,7 +87,7 @@ SIMDE_BEGIN_DECLS_
#else
#define simde_vshrn_high_n_u32(r, a, n) \
simde_vreinterpretq_u16_s16( \
simde_vcombine_s16(simde_vreinterpret_s16_u16(r), \
simde_vcombine_s16(simde_vreinterpret_s16_u16(r), \
simde_vshrn_n_s32(simde_vreinterpretq_s32_u32(a), (n))))
#endif
#if defined(SIMDE_ARM_NEON_A64V8_ENABLE_NATIVE_ALIASES)
......@@ -100,7 +100,7 @@ SIMDE_BEGIN_DECLS_
#else
#define simde_vshrn_high_n_u64(r, a, n) \
simde_vreinterpretq_u32_s32( \
simde_vcombine_s32(simde_vreinterpret_s32_u32(r), \
simde_vcombine_s32(simde_vreinterpret_s32_u32(r), \
simde_vshrn_n_s64(simde_vreinterpretq_s64_u64(a), (n))))
#endif
#if defined(SIMDE_ARM_NEON_A64V8_ENABLE_NATIVE_ALIASES)
......
arm/neon/shrn_n.h
View file @ 8d90b041
......@@ -126,7 +126,7 @@ simde_vshrn_n_s64 (const simde_int64x2_t a, const int n)
#define simde_vshrn_n_u16(a, n) vshrn_n_u16((a), (n))
#else
#define simde_vshrn_n_u16(a, n) \
simde_vreinterpret_u8_s8( \
simde_vreinterpret_u8_s8( \
simde_vshrn_n_s16(simde_vreinterpretq_s16_u16(a), (n)))
#endif
#if defined(SIMDE_ARM_NEON_A32V7_ENABLE_NATIVE_ALIASES)
......
Markdown is supported
0% or
You are about to add 0 people to the discussion. Proceed with caution.
Finish editing this message first!
Please register or to comment