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Commit e6afb7be authored by Michael R. Crusoe's avatar Michael R. Crusoe Committed by Michael R. Crusoe
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arm neon: Fully remove the problematic FCVTZS/FCVTMS/FCVTPS/FCVTNS family intrinsics

parent fb73a318
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arm/neon/cvt.h
View file @ e6afb7be
......@@ -139,35 +139,6 @@ simde_vcvt_f64_f32(simde_float32x2_t a) {
#define vcvt_f64_f32(a) simde_vcvt_f64_f32(a)
#endif
/* Disabled until we fix the FCVTZS/FCVTMS/FCVTPS/FCVTNS family intrinsics
* https://github.com/simd-everywhere/simde/issues/1099
SIMDE_FUNCTION_ATTRIBUTES
int16_t
simde_vcvth_s16_f16(simde_float16_t a) {
#if defined(SIMDE_ARM_NEON_A64V8_NATIVE) && defined(SIMDE_ARM_NEON_FP16)
return vcvth_s16_f16(a);
#elif defined(SIMDE_FAST_CONVERSION_RANGE)
return HEDLEY_STATIC_CAST(int16_t,
simde_float16_to_float32(a));
#else
simde_float32 af = simde_float16_to_float32(a);
if (HEDLEY_UNLIKELY(af <= HEDLEY_STATIC_CAST(simde_float32, INT16_MIN))) {
return INT16_MIN;
} else if (HEDLEY_UNLIKELY(af >= HEDLEY_STATIC_CAST(simde_float32, INT16_MAX))) {
return INT16_MAX;
} else if (HEDLEY_UNLIKELY(simde_isnanhf(a))) {
return 0;
} else {
return HEDLEY_STATIC_CAST(int16_t, af);
}
#endif
}
#if defined(SIMDE_ARM_NEON_A64V8_ENABLE_NATIVE_ALIASES)
#undef vcvth_s16_f16
#define vcvth_s16_f16(a) simde_vcvth_s16_f16(a)
#endif
*/
SIMDE_FUNCTION_ATTRIBUTES
uint16_t
simde_vcvth_u16_f16(simde_float16_t a) {
......@@ -547,35 +518,6 @@ simde_vcvth_f16_u16(uint16_t a) {
#define vcvth_f16_u16(a) simde_vcvth_f16_u16(a)
#endif
/* Disabled until we fix the FCVTZS/FCVTMS/FCVTPS/FCVTNS family intrinsics
* https://github.com/simd-everywhere/simde/issues/1099
SIMDE_FUNCTION_ATTRIBUTES
simde_int16x4_t
simde_vcvt_s16_f16(simde_float16x4_t a) {
#if defined(SIMDE_ARM_NEON_A32V8_NATIVE) && defined(SIMDE_ARM_NEON_FP16)
return vcvt_s16_f16(a);
#else
simde_float16x4_private a_ = simde_float16x4_to_private(a);
simde_int16x4_private r_;
#if defined(SIMDE_CONVERT_VECTOR_) && defined(SIMDE_FAST_CONVERSION_RANGE) && defined(SIMDE_FLOAT16_VECTOR)
SIMDE_CONVERT_VECTOR_(r_.values, a_.values);
#else
SIMDE_VECTORIZE
for (size_t i = 0 ; i < (sizeof(r_.values) / sizeof(r_.values[0])) ; i++) {
r_.values[i] = simde_vcvth_s16_f16(a_.values[i]);
}
#endif
return simde_int16x4_from_private(r_);
#endif
}
#if defined(SIMDE_ARM_NEON_A32V8_ENABLE_NATIVE_ALIASES)
#undef vcvt_s16_f16
#define vcvt_s16_f16(a) simde_vcvt_s16_f16(a)
#endif
*/
SIMDE_FUNCTION_ATTRIBUTES
simde_int32x2_t
simde_vcvt_s32_f32(simde_float32x2_t a) {
......@@ -707,35 +649,6 @@ simde_vcvt_u64_f64(simde_float64x1_t a) {
#define vcvt_u64_f64(a) simde_vcvt_u64_f64(a)
#endif
/* Disabled until we fix the FCVTZS/FCVTMS/FCVTPS/FCVTNS family intrinsics
* https://github.com/simd-everywhere/simde/issues/1099
SIMDE_FUNCTION_ATTRIBUTES
simde_int16x8_t
simde_vcvtq_s16_f16(simde_float16x8_t a) {
#if defined(SIMDE_ARM_NEON_A32V8_NATIVE) && defined(SIMDE_ARM_NEON_FP16)
return vcvtq_s16_f16(a);
#else
simde_float16x8_private a_ = simde_float16x8_to_private(a);
simde_int16x8_private r_;
#if defined(SIMDE_CONVERT_VECTOR_) && defined(SIMDE_FAST_CONVERSION_RANGE) && defined(SIMDE_FLOAT16_VECTOR)
SIMDE_CONVERT_VECTOR_(r_.values, a_.values);
#else
SIMDE_VECTORIZE
for (size_t i = 0 ; i < (sizeof(r_.values) / sizeof(r_.values[0])) ; i++) {
r_.values[i] = simde_vcvth_s16_f16(a_.values[i]);
}
#endif
return simde_int16x8_from_private(r_);
#endif
}
#if defined(SIMDE_ARM_NEON_A32V8_ENABLE_NATIVE_ALIASES)
#undef vcvtq_s16_f16
#define vcvtq_s16_f16(a) simde_vcvtq_s16_f16(a)
#endif
*/
SIMDE_FUNCTION_ATTRIBUTES
simde_int32x4_t
simde_vcvtq_s32_f32(simde_float32x4_t a) {
......@@ -1392,35 +1305,6 @@ simde_vcvtq_f64_u64(simde_uint64x2_t a) {
#define vcvtq_f64_u64(a) simde_vcvtq_f64_u64(a)
#endif
/* Disabled until we fix the FCVTZS/FCVTMS/FCVTPS/FCVTNS family intrinsics
* https://github.com/simd-everywhere/simde/issues/1099
SIMDE_FUNCTION_ATTRIBUTES
int16_t
simde_vcvtah_s16_f16(simde_float16_t a) {
#if defined(SIMDE_ARM_NEON_A64V8_NATIVE) && defined(SIMDE_ARM_NEON_FP16)
return vcvtah_s16_f16(a);
#elif defined(SIMDE_FAST_CONVERSION_RANGE)
return HEDLEY_STATIC_CAST(int16_t,
simde_math_roundf(simde_float16_to_float32(a)));
#else
simde_float32 af = simde_float16_to_float32(a);
if (HEDLEY_UNLIKELY(af <= HEDLEY_STATIC_CAST(simde_float32, INT16_MIN))) {
return INT16_MIN;
} else if (HEDLEY_UNLIKELY(af >= HEDLEY_STATIC_CAST(simde_float32, INT16_MAX))) {
return INT16_MAX;
} else if (HEDLEY_UNLIKELY(simde_isnanhf(a))) {
return 0;
} else {
return HEDLEY_STATIC_CAST(int16_t, simde_math_roundf(af));
}
#endif
}
#if defined(SIMDE_ARM_NEON_A64V8_ENABLE_NATIVE_ALIASES)
#undef vcvtah_s16_f16
#define vcvtah_s16_f16(a) simde_vcvtah_s16_f16(a)
#endif
*/
SIMDE_FUNCTION_ATTRIBUTES
uint16_t
simde_vcvtah_u16_f16(simde_float16_t a) {
......@@ -1648,31 +1532,6 @@ simde_vcvtas_u32_f32(simde_float32 a) {
#define vcvtas_u32_f32(a) simde_vcvtas_u32_f32(a)
#endif
/* Disabled until we fix the FCVTZS/FCVTMS/FCVTPS/FCVTNS family intrinsics
* https://github.com/simd-everywhere/simde/issues/1099
SIMDE_FUNCTION_ATTRIBUTES
simde_int16x4_t
simde_vcvta_s16_f16(simde_float16x4_t a) {
#if defined(SIMDE_ARM_NEON_A32V8_NATIVE) && defined(SIMDE_ARM_NEON_FP16)
return vcvta_s16_f16(a);
#else
simde_float16x4_private a_ = simde_float16x4_to_private(a);
simde_int16x4_private r_;
SIMDE_VECTORIZE
for (size_t i = 0 ; i < (sizeof(r_.values) / sizeof(r_.values[0])) ; i++) {
r_.values[i] = simde_vcvtah_s16_f16(a_.values[i]);
}
return simde_int16x4_from_private(r_);
#endif
}
#if defined(SIMDE_ARM_NEON_A32V8_ENABLE_NATIVE_ALIASES)
#undef vcvta_s16_f16
#define vcvta_s16_f16(a) simde_vcvta_s16_f16(a)
#endif
*/
SIMDE_FUNCTION_ATTRIBUTES
simde_uint16x4_t
simde_vcvta_u16_f16(simde_float16x4_t a) {
......@@ -1761,31 +1620,6 @@ simde_vcvta_s32_f32(simde_float32x2_t a) {
#define vcvta_s32_f32(a) simde_vcvta_s32_f32(a)
#endif
/* Disabled until we fix the FCVTZS/FCVTMS/FCVTPS/FCVTNS family intrinsics
* https://github.com/simd-everywhere/simde/issues/1099
SIMDE_FUNCTION_ATTRIBUTES
simde_int16x8_t
simde_vcvtaq_s16_f16(simde_float16x8_t a) {
#if defined(SIMDE_ARM_NEON_A32V8_NATIVE) && defined(SIMDE_ARM_NEON_FP16)
return vcvtaq_s16_f16(a);
#else
simde_float16x8_private a_ = simde_float16x8_to_private(a);
simde_int16x8_private r_;
SIMDE_VECTORIZE
for (size_t i = 0 ; i < (sizeof(r_.values) / sizeof(r_.values[0])) ; i++) {
r_.values[i] = simde_vcvtah_s16_f16(a_.values[i]);
}
return simde_int16x8_from_private(r_);
#endif
}
#if defined(SIMDE_ARM_NEON_A32V8_ENABLE_NATIVE_ALIASES)
#undef vcvtaq_s16_f16
#define vcvtaq_s16_f16(a) simde_vcvtaq_s16_f16(a)
#endif
*/
SIMDE_FUNCTION_ATTRIBUTES
simde_uint16x8_t
simde_vcvtaq_u16_f16(simde_float16x8_t a) {
......
arm/neon/cvt_n.h
View file @ e6afb7be
......@@ -34,57 +34,6 @@ HEDLEY_DIAGNOSTIC_PUSH
SIMDE_DISABLE_UNWANTED_DIAGNOSTICS
SIMDE_BEGIN_DECLS_
/* Disabled until we fix the FCVTZS/FCVTMS/FCVTPS/FCVTNS family intrinsics
* https://github.com/simd-everywhere/simde/issues/1099
SIMDE_FUNCTION_ATTRIBUTES
int16_t
simde_vcvth_n_s16_f16(simde_float16_t a, const int n)
SIMDE_REQUIRE_CONSTANT_RANGE(n, 1, 16) {
return simde_vcvth_s16_f16(
simde_float16_from_float32(
simde_float16_to_float32(a) * HEDLEY_STATIC_CAST(simde_float32_t, pow(2, n))));
}
#if defined(SIMDE_ARM_NEON_A64V8_NATIVE) && defined(SIMDE_ARM_NEON_FP16)
#define simde_vcvth_n_s16_f16(a, n) vcvth_n_s16_f16(a, n)
#endif
#if defined(SIMDE_ARM_NEON_A64V8_ENABLE_NATIVE_ALIASES)
#undef vcvth_n_s16_f16
#define vcvth_n_s16_f16(a, n) simde_vcvth_n_s16_f16(a, n)
#endif
SIMDE_FUNCTION_ATTRIBUTES
int32_t
simde_vcvth_n_s32_f16(simde_float16_t a, const int n)
SIMDE_REQUIRE_CONSTANT_RANGE(n, 1, 16) {
return simde_vcvth_s32_f16(
simde_float16_from_float32(
simde_float16_to_float32(a) * HEDLEY_STATIC_CAST(simde_float32_t, pow(2, n))));
}
#if defined(SIMDE_ARM_NEON_A32V8_NATIVE) && defined(SIMDE_ARM_NEON_FP16)
#define simde_vcvth_n_s32_f16(a, n) vcvth_n_s32_f16(a, n)
#endif
#if defined(SIMDE_ARM_NEON_A32V8_ENABLE_NATIVE_ALIASES)
#undef vcvth_n_s32_f16
#define vcvth_n_s32_f16(a, n) simde_vcvth_n_s32_f16(a, n)
#endif
SIMDE_FUNCTION_ATTRIBUTES
int64_t
simde_vcvth_n_s64_f16(simde_float16_t a, const int n)
SIMDE_REQUIRE_CONSTANT_RANGE(n, 1, 16) {
return simde_vcvth_s64_f16(
simde_float16_from_float32(
simde_float16_to_float32(a) * HEDLEY_STATIC_CAST(simde_float32_t, pow(2, n))));
}
#if defined(SIMDE_ARM_NEON_A64V8_NATIVE) && defined(SIMDE_ARM_NEON_FP16)
#define simde_vcvth_n_s64_f16(a, n) vcvth_n_s64_f16(a, n)
#endif
#if defined(SIMDE_ARM_NEON_A64V8_ENABLE_NATIVE_ALIASES)
#undef vcvth_n_s64_f16
#define vcvth_n_s64_f16(a, n) simde_vcvth_n_s64_f16(a, n)
#endif
*/
SIMDE_FUNCTION_ATTRIBUTES
uint16_t
simde_vcvth_n_u16_f16(simde_float16_t a, const int n)
......@@ -101,41 +50,6 @@ simde_vcvth_n_u16_f16(simde_float16_t a, const int n)
#define vcvth_n_u16_f16(a, n) simde_vcvth_n_u16_f16(a, n)
#endif
/* Disabled until we fix the FCVTZS/FCVTMS/FCVTPS/FCVTNS family intrinsics
* https://github.com/simd-everywhere/simde/issues/1099
SIMDE_FUNCTION_ATTRIBUTES
uint32_t
simde_vcvth_n_u32_f16(simde_float16_t a, const int n)
SIMDE_REQUIRE_CONSTANT_RANGE(n, 1, 16) {
return simde_vcvth_u32_f16(
simde_float16_from_float32(
simde_float16_to_float32(a) * HEDLEY_STATIC_CAST(simde_float32_t, pow(2, n))));
}
#if defined(SIMDE_ARM_NEON_A32V8_NATIVE) && defined(SIMDE_ARM_NEON_FP16)
#define simde_vcvth_n_u32_f16(a, n) vcvth_n_u32_f16(a, n)
#endif
#if defined(SIMDE_ARM_NEON_A32V8_ENABLE_NATIVE_ALIASES)
#undef vcvth_n_u32_f16
#define vcvth_n_u32_f16(a, n) simde_vcvth_n_u32_f16(a, n)
#endif
SIMDE_FUNCTION_ATTRIBUTES
uint64_t
simde_vcvth_n_u64_f16(simde_float16_t a, const int n)
SIMDE_REQUIRE_CONSTANT_RANGE(n, 1, 16) {
return simde_vcvth_u64_f16(
simde_float16_from_float32(
simde_float16_to_float32(a) * HEDLEY_STATIC_CAST(simde_float32_t, pow(2, n))));
}
#if defined(SIMDE_ARM_NEON_A64V8_NATIVE) && defined(SIMDE_ARM_NEON_FP16)
#define simde_vcvth_n_u64_f16(a, n) vcvth_n_u64_f16(a, n)
#endif
#if defined(SIMDE_ARM_NEON_A64V8_ENABLE_NATIVE_ALIASES)
#undef vcvth_n_u64_f16
#define vcvth_n_u64_f16(a, n) simde_vcvth_n_u64_f16(a, n)
#endif
*/
SIMDE_FUNCTION_ATTRIBUTES
simde_float16_t
simde_vcvth_n_f16_s16(int16_t a, const int n)
......@@ -152,41 +66,6 @@ simde_vcvth_n_f16_s16(int16_t a, const int n)
#define vcvth_n_f16_s16(a, n) simde_vcvth_n_f16_s16(a, n)
#endif
/* Disabled until we fix the FCVTZS/FCVTMS/FCVTPS/FCVTNS family intrinsics
* https://github.com/simd-everywhere/simde/issues/1099
SIMDE_FUNCTION_ATTRIBUTES
simde_float16_t
simde_vcvth_n_f16_s32(int32_t a, const int n)
SIMDE_REQUIRE_CONSTANT_RANGE(n, 1, 16) {
return simde_float16_from_float32(
HEDLEY_STATIC_CAST(simde_float32_t,
HEDLEY_STATIC_CAST(simde_float64_t, a) / pow(2, n)));
}
#if defined(SIMDE_ARM_NEON_A32V8_NATIVE) && defined(SIMDE_ARM_NEON_FP16)
#define simde_vcvth_n_f16_s32(a, n) vcvth_n_f16_s32(a, n)
#endif
#if defined(SIMDE_ARM_NEON_A32V8_ENABLE_NATIVE_ALIASES)
#undef vcvth_n_f16_s32
#define vcvth_n_f16_s32(a, n) simde_vcvth_n_f16_s32(a, n)
#endif
SIMDE_FUNCTION_ATTRIBUTES
simde_float16_t
simde_vcvth_n_f16_s64(int64_t a, const int n)
SIMDE_REQUIRE_CONSTANT_RANGE(n, 1, 16) {
return simde_float16_from_float32(
HEDLEY_STATIC_CAST(simde_float32_t,
HEDLEY_STATIC_CAST(simde_float64_t, a) / pow(2, n)));
}
#if defined(SIMDE_ARM_NEON_A64V8_NATIVE) && defined(SIMDE_ARM_NEON_FP16)
#define simde_vcvth_n_f16_s64(a, n) vcvth_n_f16_s64(a, n)
#endif
#if defined(SIMDE_ARM_NEON_A64V8_ENABLE_NATIVE_ALIASES)
#undef vcvth_n_f16_s64
#define vcvth_n_f16_s64(a, n) simde_vcvth_n_f16_s64(a, n)
#endif
*/
SIMDE_FUNCTION_ATTRIBUTES
simde_float16_t
simde_vcvth_n_f16_u16(uint16_t a, const int n)
......@@ -203,41 +82,6 @@ simde_vcvth_n_f16_u16(uint16_t a, const int n)
#define vcvth_n_f16_u16(a, n) simde_vcvth_n_f16_u16(a, n)
#endif
/* Disabled until we fix the FCVTZS/FCVTMS/FCVTPS/FCVTNS family intrinsics
* https://github.com/simd-everywhere/simde/issues/1099
SIMDE_FUNCTION_ATTRIBUTES
simde_float16_t
simde_vcvth_n_f16_u32(uint32_t a, const int n)
SIMDE_REQUIRE_CONSTANT_RANGE(n, 1, 16) {
return simde_float16_from_float32(
HEDLEY_STATIC_CAST(simde_float32_t,
HEDLEY_STATIC_CAST(simde_float64_t, a) / pow(2, n)));
}
#if defined(SIMDE_ARM_NEON_A32V8_NATIVE) && defined(SIMDE_ARM_NEON_FP16)
#define simde_vcvth_n_f16_u32(a, n) vcvth_n_f16_u32(a, n)
#endif
#if defined(SIMDE_ARM_NEON_A32V8_ENABLE_NATIVE_ALIASES)
#undef vcvth_n_f16_u32
#define vcvth_n_f16_u32(a, n) simde_vcvth_n_f16_u32(a, n)
#endif
SIMDE_FUNCTION_ATTRIBUTES
simde_float16_t
simde_vcvth_n_f16_u64(uint64_t a, const int n)
SIMDE_REQUIRE_CONSTANT_RANGE(n, 1, 16) {
return simde_float16_from_float32(
HEDLEY_STATIC_CAST(simde_float32_t,
HEDLEY_STATIC_CAST(simde_float64_t, a) / pow(2, n)));
}
#if defined(SIMDE_ARM_NEON_A64V8_NATIVE) && defined(SIMDE_ARM_NEON_FP16)
#define simde_vcvth_n_f16_u64(a, n) vcvth_n_f16_u64(a, n)
#endif
#if defined(SIMDE_ARM_NEON_A64V8_ENABLE_NATIVE_ALIASES)
#undef vcvth_n_f16_u64
#define vcvth_n_f16_u64(a, n) simde_vcvth_n_f16_u64(a, n)
#endif
*/
SIMDE_FUNCTION_ATTRIBUTES
int32_t
simde_vcvts_n_s32_f32(simde_float32_t a, const int n)
......@@ -352,33 +196,6 @@ simde_vcvtd_n_f64_u64(uint64_t a, const int n)
#define vcvtd_n_f64_u64(a, n) simde_vcvtd_n_f64_u64(a, n)
#endif
/* Disabled until we fix the FCVTZS/FCVTMS/FCVTPS/FCVTNS family intrinsics
* https://github.com/simd-everywhere/simde/issues/1099
SIMDE_FUNCTION_ATTRIBUTES
simde_int16x4_t
simde_vcvt_n_s16_f16(simde_float16x4_t a, const int n)
SIMDE_REQUIRE_CONSTANT_RANGE(n, 1, 16) {
simde_float16x4_private a_ = simde_float16x4_to_private(a);
simde_int16x4_private r_;
SIMDE_VECTORIZE
for (size_t i = 0 ; i < (sizeof(r_.values) / sizeof(r_.values[0])) ; i++) {
r_.values[i] = simde_vcvth_s16_f16(simde_float16_from_float32(
simde_float16_to_float32(a_.values[i]) *
HEDLEY_STATIC_CAST(simde_float32_t, pow(2, n))));
}
return simde_int16x4_from_private(r_);
}
#if defined(SIMDE_ARM_NEON_A32V8_NATIVE) && defined(SIMDE_ARM_NEON_FP16)
#define simde_vcvt_n_s16_f16(a, n) vcvt_n_s16_f16((a), (n))
#endif
#if defined(SIMDE_ARM_NEON_A32V8_ENABLE_NATIVE_ALIASES)
#undef vcvt_n_s16_f16
#define vcvt_n_s16_f16(a, n) simde_vcvt_n_s16_f16((a), (n))
#endif
*/
SIMDE_FUNCTION_ATTRIBUTES
simde_int32x2_t
simde_vcvt_n_s32_f32(simde_float32x2_t a, const int n)
......@@ -491,33 +308,6 @@ simde_vcvt_n_u64_f64(simde_float64x1_t a, const int n)
#define vcvt_n_u64_f64(a, n) simde_vcvt_n_u64_f64((a), (n))
#endif
/* Disabled until we fix the FCVTZS/FCVTMS/FCVTPS/FCVTNS family intrinsics
* https://github.com/simd-everywhere/simde/issues/1099
SIMDE_FUNCTION_ATTRIBUTES
simde_int16x8_t
simde_vcvtq_n_s16_f16(simde_float16x8_t a, const int n)
SIMDE_REQUIRE_CONSTANT_RANGE(n, 1, 16) {
simde_float16x8_private a_ = simde_float16x8_to_private(a);
simde_int16x8_private r_;
SIMDE_VECTORIZE
for (size_t i = 0 ; i < (sizeof(r_.values) / sizeof(r_.values[0])) ; i++) {
r_.values[i] = simde_vcvth_s16_f16(simde_float16_from_float32(
simde_float16_to_float32(a_.values[i]) *
HEDLEY_STATIC_CAST(simde_float32_t, pow(2, n))));
}
return simde_int16x8_from_private(r_);
}
#if defined(SIMDE_ARM_NEON_A32V8_NATIVE) && defined(SIMDE_ARM_NEON_FP16)
#define simde_vcvtq_n_s16_f16(a, n) vcvtq_n_s16_f16((a), (n))
#endif
#if defined(SIMDE_ARM_NEON_A32V8_ENABLE_NATIVE_ALIASES)
#undef vcvtq_n_s16_f16
#define vcvtq_n_s16_f16(a, n) simde_vcvtq_n_s16_f16((a), (n))
#endif
*/
SIMDE_FUNCTION_ATTRIBUTES
simde_int32x4_t
simde_vcvtq_n_s32_f32(simde_float32x4_t a, const int n)
......
arm/neon/cvtm.h
View file @ e6afb7be
......@@ -88,36 +88,6 @@ simde_vcvtmh_s32_f16(simde_float16_t a) {
#define vcvtmh_s32_f16(a) simde_vcvtmh_s32_f16(a)
#endif
/* Disabled until we fix the FCVTZS/FCVTMS/FCVTPS/FCVTNS family intrinsics
* https://github.com/simd-everywhere/simde/issues/1099
SIMDE_FUNCTION_ATTRIBUTES
int16_t
simde_vcvtmh_s16_f16(simde_float16_t a) {
#if defined(SIMDE_ARM_NEON_A64V8_NATIVE) && defined(SIMDE_ARM_NEON_FP16)
return vcvtmh_s16_f16(a);
#elif defined(SIMDE_FAST_CONVERSION_RANGE)
return HEDLEY_STATIC_CAST(int16_t,
simde_math_floorf(
simde_float16_to_float32(a)));
#else
simde_float32 af = simde_float16_to_float32(a);
if (HEDLEY_UNLIKELY(af <= HEDLEY_STATIC_CAST(simde_float32, INT16_MIN))) {
return INT16_MIN;
} else if (HEDLEY_UNLIKELY(af >= HEDLEY_STATIC_CAST(simde_float32, INT16_MAX))) {
return INT16_MAX;
} else if (HEDLEY_UNLIKELY(simde_isnanhf(a))) {
return 0;
} else {
return HEDLEY_STATIC_CAST(int16_t, simde_math_floorf(af));
}
#endif
}
#if defined(SIMDE_ARM_NEON_A64V8_ENABLE_NATIVE_ALIASES)
#undef vcvtmh_s16_f16
#define vcvtmh_s16_f16(a) simde_vcvtmh_s16_f16(a)
#endif
*/
SIMDE_FUNCTION_ATTRIBUTES
uint64_t
simde_vcvtmh_u64_f16(simde_float16_t a) {
......@@ -199,33 +169,6 @@ simde_vcvtmh_u16_f16(simde_float16_t a) {
#define vcvtmh_u16_f16(a) simde_vcvtmh_u16_f16(a)
#endif
/* Disabled until we fix the FCVTZS/FCVTMS/FCVTPS/FCVTNS family intrinsics
* https://github.com/simd-everywhere/simde/issues/1099
SIMDE_FUNCTION_ATTRIBUTES
int32_t
simde_vcvtms_s32_f32(simde_float32 a) {
#if defined(SIMDE_ARM_NEON_A64V8_NATIVE)
return vcvtms_s32_f32(a);
#elif defined(SIMDE_FAST_CONVERSION_RANGE)
return HEDLEY_STATIC_CAST(int32_t, simde_math_floorf(a));
#else
if (HEDLEY_UNLIKELY(a <= HEDLEY_STATIC_CAST(simde_float32, INT32_MIN))) {
return INT32_MIN;
} else if (HEDLEY_UNLIKELY(a >= HEDLEY_STATIC_CAST(simde_float32, INT32_MAX))) {
return INT32_MAX;
} else if (HEDLEY_UNLIKELY(simde_math_isnanf(a))) {
return 0;
} else {
return HEDLEY_STATIC_CAST(int32_t, simde_math_floorf(a));
}
#endif
}
#if defined(SIMDE_ARM_NEON_A64V8_ENABLE_NATIVE_ALIASES)
#undef vcvtms_s32_f32
#define vcvtms_s32_f32(a) simde_vcvtms_s32_f32(a)
#endif
*/
SIMDE_FUNCTION_ATTRIBUTES
uint32_t
simde_vcvtms_u32_f32(simde_float32 a) {
......@@ -250,33 +193,6 @@ simde_vcvtms_u32_f32(simde_float32 a) {
#define vcvtms_u32_f32(a) simde_vcvtms_u32_f32(a)
#endif
/* Disabled until we fix the FCVTZS/FCVTMS/FCVTPS/FCVTNS family intrinsics
* https://github.com/simd-everywhere/simde/issues/1099
SIMDE_FUNCTION_ATTRIBUTES
int64_t
simde_vcvtmd_s64_f64(simde_float64 a) {
#if defined(SIMDE_ARM_NEON_A64V8_NATIVE)
return vcvtmd_s64_f64(a);
#elif defined(SIMDE_FAST_CONVERSION_RANGE)
return HEDLEY_STATIC_CAST(int64_t, simde_math_floor(a));
#else
if (HEDLEY_UNLIKELY(a <= HEDLEY_STATIC_CAST(simde_float64, INT64_MIN))) {
return INT64_MIN;
} else if (HEDLEY_UNLIKELY(a >= HEDLEY_STATIC_CAST(simde_float64, INT64_MAX))) {
return INT64_MAX;
} else if (simde_math_isnan(a)) {
return 0;
} else {
return HEDLEY_STATIC_CAST(int64_t, simde_math_floor(a));
}
#endif
}
#if defined(SIMDE_ARM_NEON_A64V8_ENABLE_NATIVE_ALIASES)
#undef vcvtmd_s64_f64
#define vcvtmd_s64_f64(a) simde_vcvtmd_s64_f64(a)
#endif
*/
SIMDE_FUNCTION_ATTRIBUTES
uint64_t
simde_vcvtmd_u64_f64(simde_float64 a) {
......@@ -301,75 +217,6 @@ simde_vcvtmd_u64_f64(simde_float64 a) {
#define vcvtmd_u64_f64(a) simde_vcvtmd_u64_f64(a)
#endif
/* Disabled until we fix the FCVTZS/FCVTMS/FCVTPS/FCVTNS family intrinsics
* https://github.com/simd-everywhere/simde/issues/1099
SIMDE_FUNCTION_ATTRIBUTES
simde_int16x8_t
simde_vcvtmq_s16_f16(simde_float16x8_t a) {
#if defined(SIMDE_ARM_NEON_A32V8_NATIVE) && defined(SIMDE_ARM_NEON_FP16)
return vcvtmq_s16_f16(a);
#else
simde_float16x8_private a_ = simde_float16x8_to_private(a);
simde_int16x8_private r_;
SIMDE_VECTORIZE
for (size_t i = 0 ; i < (sizeof(r_.values) / sizeof(r_.values[0])) ; i++) {
r_.values[i] = simde_vcvtmh_s16_f16(a_.values[i]);
}
return simde_int16x8_from_private(r_);
#endif
}
#if defined(SIMDE_ARM_NEON_A32V8_ENABLE_NATIVE_ALIASES)
#undef vcvtmq_s16_f16
#define vcvtmq_s16_f16(a) simde_vcvtmq_s16_f16(a)
#endif
SIMDE_FUNCTION_ATTRIBUTES
simde_int32x4_t
simde_vcvtmq_s32_f32(simde_float32x4_t a) {
#if defined(SIMDE_ARM_NEON_A32V8_NATIVE)
return vcvtmq_s32_f32(a);
#else
simde_float32x4_private a_ = simde_float32x4_to_private(a);
simde_int32x4_private r_;
SIMDE_VECTORIZE
for (size_t i = 0 ; i < (sizeof(r_.values) / sizeof(r_.values[0])) ; i++) {
r_.values[i] = simde_vcvtms_s32_f32(a_.values[i]);
}
return simde_int32x4_from_private(r_);
#endif
}
#if defined(SIMDE_ARM_NEON_A32V8_ENABLE_NATIVE_ALIASES)
#undef vcvtmq_s32_f32
#define vcvtmq_s32_f32(a) simde_vcvtmq_s32_f32(a)
#endif
SIMDE_FUNCTION_ATTRIBUTES
simde_int64x2_t
simde_vcvtmq_s64_f64(simde_float64x2_t a) {
#if defined(SIMDE_ARM_NEON_A64V8_NATIVE)
return vcvtmq_s64_f64(a);
#else
simde_float64x2_private a_ = simde_float64x2_to_private(a);
simde_int64x2_private r_;
SIMDE_VECTORIZE
for (size_t i = 0 ; i < (sizeof(r_.values) / sizeof(r_.values[0])) ; i++) {
r_.values[i] = simde_vcvtmd_s64_f64(a_.values[i]);
}
return simde_int64x2_from_private(r_);
#endif
}
#if defined(SIMDE_ARM_NEON_A64V8_ENABLE_NATIVE_ALIASES)
#undef vcvtmq_s64_f64
#define vcvtmq_s64_f64(a) simde_vcvtmq_s64_f64(a)
#endif
*/
SIMDE_FUNCTION_ATTRIBUTES
simde_uint16x8_t
simde_vcvtmq_u16_f16(simde_float16x8_t a) {
......@@ -462,31 +309,6 @@ simde_vcvtmq_u64_f64(simde_float64x2_t a) {
#define vcvtmq_u64_f64(a) simde_vcvtmq_u64_f64(a)
#endif
/* Disabled until we fix the FCVTZS/FCVTMS/FCVTPS/FCVTNS family intrinsics
* https://github.com/simd-everywhere/simde/issues/1099
SIMDE_FUNCTION_ATTRIBUTES
simde_int16x4_t
simde_vcvtm_s16_f16(simde_float16x4_t a) {
#if defined(SIMDE_ARM_NEON_A32V8_NATIVE) && defined(SIMDE_ARM_NEON_FP16)
return vcvtm_s16_f16(a);
#else
simde_float16x4_private a_ = simde_float16x4_to_private(a);
simde_int16x4_private r_;
SIMDE_VECTORIZE
for (size_t i = 0 ; i < (sizeof(r_.values) / sizeof(r_.values[0])) ; i++) {
r_.values[i] = simde_vcvtmh_s16_f16(a_.values[i]);
}
return simde_int16x4_from_private(r_);
#endif
}
#if defined(SIMDE_ARM_NEON_A32V8_ENABLE_NATIVE_ALIASES)
#undef vcvtm_s16_f16
#define vcvtm_s16_f16(a) simde_vcvtm_s16_f16(a)
#endif
*/
SIMDE_FUNCTION_ATTRIBUTES
simde_uint16x4_t
simde_vcvtm_u16_f16(simde_float16x4_t a) {
......@@ -531,53 +353,6 @@ simde_vcvtm_u32_f32(simde_float32x2_t a) {
#define vcvtm_u32_f32(a) simde_vcvtm_u32_f32(a)
#endif
/* Disabled until we fix the FCVTZS/FCVTMS/FCVTPS/FCVTNS family intrinsics
* https://github.com/simd-everywhere/simde/issues/1099
SIMDE_FUNCTION_ATTRIBUTES
simde_int32x2_t
simde_vcvtm_s32_f32(simde_float32x2_t a) {
#if defined(SIMDE_ARM_NEON_A32V8_NATIVE)
return vcvtm_s32_f32(a);
#else
simde_float32x2_private a_ = simde_float32x2_to_private(a);
simde_int32x2_private r_;
SIMDE_VECTORIZE
for (size_t i = 0 ; i < (sizeof(r_.values) / sizeof(r_.values[0])) ; i++) {
r_.values[i] = simde_vcvtms_s32_f32(a_.values[i]);
}
return simde_int32x2_from_private(r_);
#endif
}
#if defined(SIMDE_ARM_NEON_A32V8_ENABLE_NATIVE_ALIASES)
#undef vcvtm_s32_f32
#define vcvtm_s32_f32(a) simde_vcvtm_s32_f32(a)
#endif
SIMDE_FUNCTION_ATTRIBUTES
simde_int64x1_t
simde_vcvtm_s64_f64(simde_float64x1_t a) {
#if defined(SIMDE_ARM_NEON_A64V8_NATIVE)
return vcvtm_s64_f64(a);
#else
simde_float64x1_private a_ = simde_float64x1_to_private(a);
simde_int64x1_private r_;
SIMDE_VECTORIZE
for (size_t i = 0 ; i < (sizeof(r_.values) / sizeof(r_.values[0])) ; i++) {
r_.values[i] = simde_vcvtmd_s64_f64(a_.values[i]);
}
return simde_int64x1_from_private(r_);
#endif
}
#if defined(SIMDE_ARM_NEON_A64V8_ENABLE_NATIVE_ALIASES)
#undef vcvtm_s64_f64
#define vcvtm_s64_f64(a) simde_vcvtm_s64_f64(a)
#endif
*/
SIMDE_FUNCTION_ATTRIBUTES
simde_uint64x1_t
simde_vcvtm_u64_f64(simde_float64x1_t a) {
......
arm/neon/cvtn.h
View file @ e6afb7be
......@@ -153,34 +153,6 @@ simde_vcvtnh_s32_f16(simde_float16_t a) {
#define vcvtnh_s32_f16(a) simde_vcvtnh_s32_f16(a)
#endif
/* Disabled until we fix the FCVTZS/FCVTMS/FCVTPS/FCVTNS family intrinsics
* https://github.com/simd-everywhere/simde/issues/1099
SIMDE_FUNCTION_ATTRIBUTES
int16_t
simde_vcvtnh_s16_f16(simde_float16_t a) {
#if defined(SIMDE_ARM_NEON_A64V8_NATIVE) && defined(SIMDE_ARM_NEON_FP16)
return vcvtnh_s16_f16(a);
#elif defined(SIMDE_FAST_CONVERSION_RANGE)
return HEDLEY_STATIC_CAST(int16_t, simde_math_roundevenf(simde_float16_to_float32(a)));
#else
simde_float32 a_ = simde_float16_to_float32(a);
if (HEDLEY_UNLIKELY(a_ < HEDLEY_STATIC_CAST(simde_float32, INT16_MIN))) {
return INT16_MIN;
} else if (HEDLEY_UNLIKELY(a_ > HEDLEY_STATIC_CAST(simde_float32, INT16_MAX))) {
return INT16_MAX;
} else if (simde_math_isnanf(a_)) {
return 0;
} else {
return HEDLEY_STATIC_CAST(int16_t, simde_math_roundevenf(a_));
}
#endif
}
#if defined(SIMDE_ARM_NEON_A64V8_ENABLE_NATIVE_ALIASES)
#undef vcvtnh_s16_f16
#define vcvtnh_s16_f16(a) simde_vcvtnh_s16_f16(a)
#endif
*/
SIMDE_FUNCTION_ATTRIBUTES
uint64_t
simde_vcvtnh_u64_f16(simde_float16_t a) {
......@@ -420,53 +392,6 @@ simde_vcvtnq_u64_f64(simde_float64x2_t a) {
#define vcvtnq_u64_f64(a) simde_vcvtnq_u64_f64(a)
#endif
/* Disabled until we fix the FCVTZS/FCVTMS/FCVTPS/FCVTNS family intrinsics
* https://github.com/simd-everywhere/simde/issues/1099
SIMDE_FUNCTION_ATTRIBUTES
simde_int16x8_t
simde_vcvtnq_s16_f16(simde_float16x8_t a) {
#if defined(SIMDE_ARM_NEON_A32V8_NATIVE) && defined(SIMDE_ARM_NEON_FP16)
return vcvtnq_s16_f16(a);
#else
simde_float16x8_private a_ = simde_float16x8_to_private(a);
simde_int16x8_private r_;
SIMDE_VECTORIZE
for (size_t i = 0 ; i < (sizeof(r_.values) / sizeof(r_.values[0])) ; i++) {
r_.values[i] = simde_vcvtnh_s16_f16(a_.values[i]);
}
return simde_int16x8_from_private(r_);
#endif
}
#if defined(SIMDE_ARM_NEON_A32V8_ENABLE_NATIVE_ALIASES)
#undef vcvtnq_s16_f16
#define vcvtnq_s16_f16(a) simde_vcvtnq_s16_f16(a)
#endif
SIMDE_FUNCTION_ATTRIBUTES
simde_int16x4_t
simde_vcvtn_s16_f16(simde_float16x4_t a) {
#if defined(SIMDE_ARM_NEON_A32V8_NATIVE) && defined(SIMDE_ARM_NEON_FP16)
return vcvtn_s16_f16(a);
#else
simde_float16x4_private a_ = simde_float16x4_to_private(a);
simde_int16x4_private r_;
SIMDE_VECTORIZE
for (size_t i = 0 ; i < (sizeof(r_.values) / sizeof(r_.values[0])) ; i++) {
r_.values[i] = simde_vcvtnh_s16_f16(a_.values[i]);
}
return simde_int16x4_from_private(r_);
#endif
}
#if defined(SIMDE_ARM_NEON_A32V8_ENABLE_NATIVE_ALIASES)
#undef vcvtn_s16_f16
#define vcvtn_s16_f16(a) simde_vcvtn_s16_f16(a)
#endif
*/
SIMDE_FUNCTION_ATTRIBUTES
simde_uint16x8_t
simde_vcvtnq_u16_f16(simde_float16x8_t a) {
......
arm/neon/cvtp.h
View file @ e6afb7be
......@@ -88,36 +88,6 @@ simde_vcvtph_s32_f16(simde_float16_t a) {
#define vcvtph_s32_f16(a) simde_vcvtph_s32_f16(a)
#endif
/* Disabled until we fix the FCVTZS/FCVTMS/FCVTPS/FCVTNS family intrinsics
* https://github.com/simd-everywhere/simde/issues/1099
SIMDE_FUNCTION_ATTRIBUTES
int16_t
simde_vcvtph_s16_f16(simde_float16_t a) {
#if defined(SIMDE_ARM_NEON_A64V8_NATIVE) && defined(SIMDE_ARM_NEON_FP16)
return vcvtph_s16_f16(a);
#elif defined(SIMDE_FAST_CONVERSION_RANGE)
return HEDLEY_STATIC_CAST(int16_t,
simde_math_ceilf(
simde_float16_to_float32(a)));
#else
simde_float32 af = simde_float16_to_float32(a);
if (HEDLEY_UNLIKELY(af <= HEDLEY_STATIC_CAST(simde_float32, INT16_MIN))) {
return INT16_MIN;
} else if (HEDLEY_UNLIKELY(af >= HEDLEY_STATIC_CAST(simde_float32, INT16_MAX))) {
return INT16_MAX;
} else if (HEDLEY_UNLIKELY(simde_isnanhf(a))) {
return 0;
} else {
return HEDLEY_STATIC_CAST(int16_t, simde_math_ceilf(af));
}
#endif
}
#if defined(SIMDE_ARM_NEON_A64V8_ENABLE_NATIVE_ALIASES)
#undef vcvtph_s16_f16
#define vcvtph_s16_f16(a) simde_vcvtph_s16_f16(a)
#endif
*/
SIMDE_FUNCTION_ATTRIBUTES
uint64_t
simde_vcvtph_u64_f16(simde_float16_t a) {
......@@ -199,33 +169,6 @@ simde_vcvtph_u16_f16(simde_float16_t a) {
#define vcvtph_u16_f16(a) simde_vcvtph_u16_f16(a)
#endif
/* Disabled until we fix the FCVTZS/FCVTMS/FCVTPS/FCVTNS family intrinsics
* https://github.com/simd-everywhere/simde/issues/1099
SIMDE_FUNCTION_ATTRIBUTES
int32_t
simde_vcvtps_s32_f32(simde_float32 a) {
#if defined(SIMDE_ARM_NEON_A64V8_NATIVE)
return vcvtps_s32_f32(a);
#elif defined(SIMDE_FAST_CONVERSION_RANGE)
return HEDLEY_STATIC_CAST(int32_t, simde_math_ceilf(a));
#else
if (HEDLEY_UNLIKELY(a <= HEDLEY_STATIC_CAST(simde_float32, INT32_MIN))) {
return INT32_MIN;
} else if (HEDLEY_UNLIKELY(a >= HEDLEY_STATIC_CAST(simde_float32, INT32_MAX))) {
return INT32_MAX;
} else if (HEDLEY_UNLIKELY(simde_math_isnanf(a))) {
return 0;
} else {
return HEDLEY_STATIC_CAST(int32_t, simde_math_ceilf(a));
}
#endif
}
#if defined(SIMDE_ARM_NEON_A64V8_ENABLE_NATIVE_ALIASES)
#undef vcvtps_s32_f32
#define vcvtps_s32_f32(a) simde_vcvtps_s32_f32(a)
#endif
*/
SIMDE_FUNCTION_ATTRIBUTES
uint32_t
simde_vcvtps_u32_f32(simde_float32 a) {
......@@ -250,33 +193,6 @@ simde_vcvtps_u32_f32(simde_float32 a) {
#define vcvtps_u32_f32(a) simde_vcvtps_u32_f32(a)
#endif
/* Disabled until we fix the FCVTZS/FCVTMS/FCVTPS/FCVTNS family intrinsics
* https://github.com/simd-everywhere/simde/issues/1099
SIMDE_FUNCTION_ATTRIBUTES
int64_t
simde_vcvtpd_s64_f64(simde_float64 a) {
#if defined(SIMDE_ARM_NEON_A64V8_NATIVE)
return vcvtpd_s64_f64(a);
#elif defined(SIMDE_FAST_CONVERSION_RANGE)
return HEDLEY_STATIC_CAST(int64_t, simde_math_ceil(a));
#else
if (HEDLEY_UNLIKELY(a <= HEDLEY_STATIC_CAST(simde_float64, INT64_MIN))) {
return INT64_MIN;
} else if (HEDLEY_UNLIKELY(a >= HEDLEY_STATIC_CAST(simde_float64, INT64_MAX))) {
return INT64_MAX;
} else if (simde_math_isnan(a)) {
return 0;
} else {
return HEDLEY_STATIC_CAST(int64_t, simde_math_ceil(a));
}
#endif
}
#if defined(SIMDE_ARM_NEON_A64V8_ENABLE_NATIVE_ALIASES)
#undef vcvtpd_s64_f64
#define vcvtpd_s64_f64(a) simde_vcvtpd_s64_f64(a)
#endif
*/
SIMDE_FUNCTION_ATTRIBUTES
uint64_t
simde_vcvtpd_u64_f64(simde_float64 a) {
......@@ -301,75 +217,6 @@ simde_vcvtpd_u64_f64(simde_float64 a) {
#define vcvtpd_u64_f64(a) simde_vcvtpd_u64_f64(a)
#endif
/* Disabled until we fix the FCVTZS/FCVTMS/FCVTPS/FCVTNS family intrinsics
* https://github.com/simd-everywhere/simde/issues/1099
SIMDE_FUNCTION_ATTRIBUTES
simde_int16x8_t
simde_vcvtpq_s16_f16(simde_float16x8_t a) {
#if defined(SIMDE_ARM_NEON_A32V8_NATIVE) && defined(SIMDE_ARM_NEON_FP16)
return vcvtpq_s16_f16(a);
#else
simde_float16x8_private a_ = simde_float16x8_to_private(a);
simde_int16x8_private r_;
SIMDE_VECTORIZE
for (size_t i = 0 ; i < (sizeof(r_.values) / sizeof(r_.values[0])) ; i++) {
r_.values[i] = simde_vcvtph_s16_f16(a_.values[i]);
}
return simde_int16x8_from_private(r_);
#endif
}
#if defined(SIMDE_ARM_NEON_A32V8_ENABLE_NATIVE_ALIASES)
#undef vcvtpq_s16_f16
#define vcvtpq_s16_f16(a) simde_vcvtpq_s16_f16(a)
#endif
SIMDE_FUNCTION_ATTRIBUTES
simde_int32x4_t
simde_vcvtpq_s32_f32(simde_float32x4_t a) {
#if defined(SIMDE_ARM_NEON_A32V8_NATIVE)
return vcvtpq_s32_f32(a);
#else
simde_float32x4_private a_ = simde_float32x4_to_private(a);
simde_int32x4_private r_;
SIMDE_VECTORIZE
for (size_t i = 0 ; i < (sizeof(r_.values) / sizeof(r_.values[0])) ; i++) {
r_.values[i] = simde_vcvtps_s32_f32(a_.values[i]);
}
return simde_int32x4_from_private(r_);
#endif
}
#if defined(SIMDE_ARM_NEON_A32V8_ENABLE_NATIVE_ALIASES)
#undef vcvtpq_s32_f32
#define vcvtpq_s32_f32(a) simde_vcvtpq_s32_f32(a)
#endif
SIMDE_FUNCTION_ATTRIBUTES
simde_int64x2_t
simde_vcvtpq_s64_f64(simde_float64x2_t a) {
#if defined(SIMDE_ARM_NEON_A64V8_NATIVE)
return vcvtpq_s64_f64(a);
#else
simde_float64x2_private a_ = simde_float64x2_to_private(a);
simde_int64x2_private r_;
SIMDE_VECTORIZE
for (size_t i = 0 ; i < (sizeof(r_.values) / sizeof(r_.values[0])) ; i++) {
r_.values[i] = simde_vcvtpd_s64_f64(a_.values[i]);
}
return simde_int64x2_from_private(r_);
#endif
}
#if defined(SIMDE_ARM_NEON_A64V8_ENABLE_NATIVE_ALIASES)
#undef vcvtpq_s64_f64
#define vcvtpq_s64_f64(a) simde_vcvtpq_s64_f64(a)
#endif
*/
SIMDE_FUNCTION_ATTRIBUTES
simde_uint16x8_t
simde_vcvtpq_u16_f16(simde_float16x8_t a) {
......@@ -392,7 +239,6 @@ simde_vcvtpq_u16_f16(simde_float16x8_t a) {
#define vcvtpq_u16_f16(a) simde_vcvtpq_u16_f16(a)
#endif
SIMDE_FUNCTION_ATTRIBUTES
simde_uint32x4_t
simde_vcvtpq_u32_f32(simde_float32x4_t a) {
......@@ -427,7 +273,6 @@ simde_vcvtpq_u32_f32(simde_float32x4_t a) {
#define vcvtpq_u32_f32(a) simde_vcvtpq_u32_f32(a)
#endif
SIMDE_FUNCTION_ATTRIBUTES
simde_uint64x2_t
simde_vcvtpq_u64_f64(simde_float64x2_t a) {
......@@ -462,31 +307,6 @@ simde_vcvtpq_u64_f64(simde_float64x2_t a) {
#define vcvtpq_u64_f64(a) simde_vcvtpq_u64_f64(a)
#endif
/* Disabled until we fix the FCVTZS/FCVTMS/FCVTPS/FCVTNS family intrinsics
* https://github.com/simd-everywhere/simde/issues/1099
SIMDE_FUNCTION_ATTRIBUTES
simde_int16x4_t
simde_vcvtp_s16_f16(simde_float16x4_t a) {
#if defined(SIMDE_ARM_NEON_A32V8_NATIVE) && defined(SIMDE_ARM_NEON_FP16)
return vcvtp_s16_f16(a);
#else
simde_float16x4_private a_ = simde_float16x4_to_private(a);
simde_int16x4_private r_;
SIMDE_VECTORIZE
for (size_t i = 0 ; i < (sizeof(r_.values) / sizeof(r_.values[0])) ; i++) {
r_.values[i] = simde_vcvtph_s16_f16(a_.values[i]);
}
return simde_int16x4_from_private(r_);
#endif
}
#if defined(SIMDE_ARM_NEON_A32V8_ENABLE_NATIVE_ALIASES)
#undef vcvtp_s16_f16
#define vcvtp_s16_f16(a) simde_vcvtp_s16_f16(a)
#endif
*/
SIMDE_FUNCTION_ATTRIBUTES
simde_uint16x4_t
simde_vcvtp_u16_f16(simde_float16x4_t a) {
......@@ -531,53 +351,6 @@ simde_vcvtp_u32_f32(simde_float32x2_t a) {
#define vcvtp_u32_f32(a) simde_vcvtp_u32_f32(a)
#endif
/* Disabled until we fix the FCVTZS/FCVTMS/FCVTPS/FCVTNS family intrinsics
* https://github.com/simd-everywhere/simde/issues/1099
SIMDE_FUNCTION_ATTRIBUTES
simde_int32x2_t
simde_vcvtp_s32_f32(simde_float32x2_t a) {
#if defined(SIMDE_ARM_NEON_A32V8_NATIVE)
return vcvtp_s32_f32(a);
#else
simde_float32x2_private a_ = simde_float32x2_to_private(a);
simde_int32x2_private r_;
SIMDE_VECTORIZE
for (size_t i = 0 ; i < (sizeof(r_.values) / sizeof(r_.values[0])) ; i++) {
r_.values[i] = simde_vcvtps_s32_f32(a_.values[i]);
}
return simde_int32x2_from_private(r_);
#endif
}
#if defined(SIMDE_ARM_NEON_A32V8_ENABLE_NATIVE_ALIASES)
#undef vcvtp_s32_f32
#define vcvtp_s32_f32(a) simde_vcvtp_s32_f32(a)
#endif
SIMDE_FUNCTION_ATTRIBUTES
simde_int64x1_t
simde_vcvtp_s64_f64(simde_float64x1_t a) {
#if defined(SIMDE_ARM_NEON_A64V8_NATIVE)
return vcvtp_s64_f64(a);
#else
simde_float64x1_private a_ = simde_float64x1_to_private(a);
simde_int64x1_private r_;
SIMDE_VECTORIZE
for (size_t i = 0 ; i < (sizeof(r_.values) / sizeof(r_.values[0])) ; i++) {
r_.values[i] = simde_vcvtpd_s64_f64(a_.values[i]);
}
return simde_int64x1_from_private(r_);
#endif
}
#if defined(SIMDE_ARM_NEON_A64V8_ENABLE_NATIVE_ALIASES)
#undef vcvtp_s64_f64
#define vcvtp_s64_f64(a) simde_vcvtp_s64_f64(a)
#endif
*/
SIMDE_FUNCTION_ATTRIBUTES
simde_uint64x1_t
simde_vcvtp_u64_f64(simde_float64x1_t a) {
......
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