Commit eb16663e authored by Evan Nemerson's avatar Evan Nemerson

neon/bsl, neon/mvn: use ternarylogic on AVX-512VL

parent 7604b37e
...@@ -228,6 +228,8 @@ simde_vbslq_f32(simde_uint32x4_t a, simde_float32x4_t b, simde_float32x4_t c) { ...@@ -228,6 +228,8 @@ simde_vbslq_f32(simde_uint32x4_t a, simde_float32x4_t b, simde_float32x4_t c) {
return vbslq_f32(a, b, c); return vbslq_f32(a, b, c);
#elif defined(SIMDE_WASM_SIMD128_NATIVE) #elif defined(SIMDE_WASM_SIMD128_NATIVE)
return wasm_v128_bitselect(b, c, a); return wasm_v128_bitselect(b, c, a);
#elif defined(SIMDE_X86_AVX512VL_NATIVE)
return _mm_castsi128_ps(_mm_ternarylogic_epi32(a, _mm_castps_si128(b), _mm_castps_si128(c), 0xca));
#else #else
simde_uint8x16_t simde_uint8x16_t
a_ = simde_vreinterpretq_u8_u32(a), a_ = simde_vreinterpretq_u8_u32(a),
...@@ -249,6 +251,8 @@ simde_vbslq_f64(simde_uint64x2_t a, simde_float64x2_t b, simde_float64x2_t c) { ...@@ -249,6 +251,8 @@ simde_vbslq_f64(simde_uint64x2_t a, simde_float64x2_t b, simde_float64x2_t c) {
return vbslq_f64(a, b, c); return vbslq_f64(a, b, c);
#elif defined(SIMDE_WASM_SIMD128_NATIVE) #elif defined(SIMDE_WASM_SIMD128_NATIVE)
return wasm_v128_bitselect(b, c, a); return wasm_v128_bitselect(b, c, a);
#elif defined(SIMDE_X86_AVX512VL_NATIVE)
return _mm_castsi128_pd(_mm_ternarylogic_epi32(a, _mm_castpd_si128(b), _mm_castpd_si128(c), 0xca));
#else #else
simde_uint8x16_t simde_uint8x16_t
a_ = simde_vreinterpretq_u8_u64(a), a_ = simde_vreinterpretq_u8_u64(a),
...@@ -269,6 +273,8 @@ simde_vbslq_s8(simde_uint8x16_t a, simde_int8x16_t b, simde_int8x16_t c) { ...@@ -269,6 +273,8 @@ simde_vbslq_s8(simde_uint8x16_t a, simde_int8x16_t b, simde_int8x16_t c) {
return vbslq_s8(a, b, c); return vbslq_s8(a, b, c);
#elif defined(SIMDE_WASM_SIMD128_NATIVE) #elif defined(SIMDE_WASM_SIMD128_NATIVE)
return wasm_v128_bitselect(b, c, a); return wasm_v128_bitselect(b, c, a);
#elif defined(SIMDE_X86_AVX512VL_NATIVE)
return _mm_ternarylogic_epi32(a, b, c, 0xca);
#else #else
simde_uint8x16_t simde_uint8x16_t
a_ = (a), a_ = (a),
...@@ -291,6 +297,8 @@ simde_vbslq_s16(simde_uint16x8_t a, simde_int16x8_t b, simde_int16x8_t c) { ...@@ -291,6 +297,8 @@ simde_vbslq_s16(simde_uint16x8_t a, simde_int16x8_t b, simde_int16x8_t c) {
return wasm_v128_bitselect(b, c, a); return wasm_v128_bitselect(b, c, a);
#elif defined(SIMDE_POWER_ALTIVEC_P6_NATIVE) #elif defined(SIMDE_POWER_ALTIVEC_P6_NATIVE)
return vec_sel(c, b, a); return vec_sel(c, b, a);
#elif defined(SIMDE_X86_AVX512VL_NATIVE)
return _mm_ternarylogic_epi32(a, b, c, 0xca);
#else #else
simde_uint8x16_t simde_uint8x16_t
a_ = simde_vreinterpretq_u8_u16(a), a_ = simde_vreinterpretq_u8_u16(a),
...@@ -311,6 +319,8 @@ simde_vbslq_s32(simde_uint32x4_t a, simde_int32x4_t b, simde_int32x4_t c) { ...@@ -311,6 +319,8 @@ simde_vbslq_s32(simde_uint32x4_t a, simde_int32x4_t b, simde_int32x4_t c) {
return vbslq_s32(a, b, c); return vbslq_s32(a, b, c);
#elif defined(SIMDE_WASM_SIMD128_NATIVE) #elif defined(SIMDE_WASM_SIMD128_NATIVE)
return wasm_v128_bitselect(b, c, a); return wasm_v128_bitselect(b, c, a);
#elif defined(SIMDE_X86_AVX512VL_NATIVE)
return _mm_ternarylogic_epi32(a, b, c, 0xca);
#else #else
simde_uint8x16_t simde_uint8x16_t
a_ = simde_vreinterpretq_u8_u32(a), a_ = simde_vreinterpretq_u8_u32(a),
...@@ -331,6 +341,8 @@ simde_vbslq_s64(simde_uint64x2_t a, simde_int64x2_t b, simde_int64x2_t c) { ...@@ -331,6 +341,8 @@ simde_vbslq_s64(simde_uint64x2_t a, simde_int64x2_t b, simde_int64x2_t c) {
return vbslq_s64(a, b, c); return vbslq_s64(a, b, c);
#elif defined(SIMDE_WASM_SIMD128_NATIVE) #elif defined(SIMDE_WASM_SIMD128_NATIVE)
return wasm_v128_bitselect(b, c, a); return wasm_v128_bitselect(b, c, a);
#elif defined(SIMDE_X86_AVX512VL_NATIVE)
return _mm_ternarylogic_epi32(a, b, c, 0xca);
#else #else
simde_uint8x16_t simde_uint8x16_t
a_ = simde_vreinterpretq_u8_u64(a), a_ = simde_vreinterpretq_u8_u64(a),
...@@ -353,6 +365,8 @@ simde_vbslq_u8(simde_uint8x16_t a, simde_uint8x16_t b, simde_uint8x16_t c) { ...@@ -353,6 +365,8 @@ simde_vbslq_u8(simde_uint8x16_t a, simde_uint8x16_t b, simde_uint8x16_t c) {
return wasm_v128_bitselect(b, c, a); return wasm_v128_bitselect(b, c, a);
#elif defined(SIMDE_POWER_ALTIVEC_P6_NATIVE) #elif defined(SIMDE_POWER_ALTIVEC_P6_NATIVE)
return vec_sel(c, b, a); return vec_sel(c, b, a);
#elif defined(SIMDE_X86_AVX512VL_NATIVE)
return _mm_ternarylogic_epi32(a, b, c, 0xca);
#else #else
return simde_veorq_u8(c, simde_vandq_u8(simde_veorq_u8(c, b), a)); return simde_veorq_u8(c, simde_vandq_u8(simde_veorq_u8(c, b), a));
#endif #endif
...@@ -369,6 +383,8 @@ simde_vbslq_u16(simde_uint16x8_t a, simde_uint16x8_t b, simde_uint16x8_t c) { ...@@ -369,6 +383,8 @@ simde_vbslq_u16(simde_uint16x8_t a, simde_uint16x8_t b, simde_uint16x8_t c) {
return vbslq_u16(a, b, c); return vbslq_u16(a, b, c);
#elif defined(SIMDE_WASM_SIMD128_NATIVE) #elif defined(SIMDE_WASM_SIMD128_NATIVE)
return wasm_v128_bitselect(b, c, a); return wasm_v128_bitselect(b, c, a);
#elif defined(SIMDE_X86_AVX512VL_NATIVE)
return _mm_ternarylogic_epi32(a, b, c, 0xca);
#else #else
simde_uint8x16_t simde_uint8x16_t
a_ = simde_vreinterpretq_u8_u16(a), a_ = simde_vreinterpretq_u8_u16(a),
...@@ -389,6 +405,8 @@ simde_vbslq_u32(simde_uint32x4_t a, simde_uint32x4_t b, simde_uint32x4_t c) { ...@@ -389,6 +405,8 @@ simde_vbslq_u32(simde_uint32x4_t a, simde_uint32x4_t b, simde_uint32x4_t c) {
return vbslq_u32(a, b, c); return vbslq_u32(a, b, c);
#elif defined(SIMDE_WASM_SIMD128_NATIVE) #elif defined(SIMDE_WASM_SIMD128_NATIVE)
return wasm_v128_bitselect(b, c, a); return wasm_v128_bitselect(b, c, a);
#elif defined(SIMDE_X86_AVX512VL_NATIVE)
return _mm_ternarylogic_epi32(a, b, c, 0xca);
#else #else
simde_uint8x16_t simde_uint8x16_t
a_ = simde_vreinterpretq_u8_u32(a), a_ = simde_vreinterpretq_u8_u32(a),
...@@ -409,6 +427,8 @@ simde_vbslq_u64(simde_uint64x2_t a, simde_uint64x2_t b, simde_uint64x2_t c) { ...@@ -409,6 +427,8 @@ simde_vbslq_u64(simde_uint64x2_t a, simde_uint64x2_t b, simde_uint64x2_t c) {
return vbslq_u64(a, b, c); return vbslq_u64(a, b, c);
#elif defined(SIMDE_WASM_SIMD128_NATIVE) #elif defined(SIMDE_WASM_SIMD128_NATIVE)
return wasm_v128_bitselect(b, c, a); return wasm_v128_bitselect(b, c, a);
#elif defined(SIMDE_X86_AVX512VL_NATIVE)
return _mm_ternarylogic_epi32(a, b, c, 0xca);
#else #else
simde_uint8x16_t simde_uint8x16_t
a_ = simde_vreinterpretq_u8_u64(a), a_ = simde_vreinterpretq_u8_u64(a),
......
...@@ -41,6 +41,8 @@ simde_int8x16_t ...@@ -41,6 +41,8 @@ simde_int8x16_t
simde_vmvnq_s8(simde_int8x16_t a) { simde_vmvnq_s8(simde_int8x16_t a) {
#if defined(SIMDE_ARM_NEON_A32V7_NATIVE) #if defined(SIMDE_ARM_NEON_A32V7_NATIVE)
return vmvnq_s8(a); return vmvnq_s8(a);
#elif defined(SIMDE_X86_AVX512VL_NATIVE)
return _mm_ternarylogic_epi32(a, a, a, 0x55);
#elif defined(SIMDE_X86_SSE2_NATIVE) #elif defined(SIMDE_X86_SSE2_NATIVE)
return _mm_andnot_si128(a, _mm_cmpeq_epi8(a, a)); return _mm_andnot_si128(a, _mm_cmpeq_epi8(a, a));
#elif defined(SIMDE_POWER_ALTIVEC_P6_NATIVE) #elif defined(SIMDE_POWER_ALTIVEC_P6_NATIVE)
...@@ -74,6 +76,8 @@ simde_int16x8_t ...@@ -74,6 +76,8 @@ simde_int16x8_t
simde_vmvnq_s16(simde_int16x8_t a) { simde_vmvnq_s16(simde_int16x8_t a) {
#if defined(SIMDE_ARM_NEON_A32V7_NATIVE) #if defined(SIMDE_ARM_NEON_A32V7_NATIVE)
return vmvnq_s16(a); return vmvnq_s16(a);
#elif defined(SIMDE_X86_AVX512VL_NATIVE)
return _mm_ternarylogic_epi32(a, a, a, 0x55);
#elif defined(SIMDE_X86_SSE2_NATIVE) #elif defined(SIMDE_X86_SSE2_NATIVE)
return _mm_andnot_si128(a, _mm_cmpeq_epi16(a, a)); return _mm_andnot_si128(a, _mm_cmpeq_epi16(a, a));
#elif defined(SIMDE_POWER_ALTIVEC_P6_NATIVE) #elif defined(SIMDE_POWER_ALTIVEC_P6_NATIVE)
...@@ -107,6 +111,8 @@ simde_int32x4_t ...@@ -107,6 +111,8 @@ simde_int32x4_t
simde_vmvnq_s32(simde_int32x4_t a) { simde_vmvnq_s32(simde_int32x4_t a) {
#if defined(SIMDE_ARM_NEON_A32V7_NATIVE) #if defined(SIMDE_ARM_NEON_A32V7_NATIVE)
return vmvnq_s32(a); return vmvnq_s32(a);
#elif defined(SIMDE_X86_AVX512VL_NATIVE)
return _mm_ternarylogic_epi32(a, a, a, 0x55);
#elif defined(SIMDE_X86_SSE2_NATIVE) #elif defined(SIMDE_X86_SSE2_NATIVE)
return _mm_andnot_si128(a, _mm_cmpeq_epi32(a, a)); return _mm_andnot_si128(a, _mm_cmpeq_epi32(a, a));
#elif defined(SIMDE_POWER_ALTIVEC_P6_NATIVE) #elif defined(SIMDE_POWER_ALTIVEC_P6_NATIVE)
...@@ -140,6 +146,8 @@ simde_uint8x16_t ...@@ -140,6 +146,8 @@ simde_uint8x16_t
simde_vmvnq_u8(simde_uint8x16_t a) { simde_vmvnq_u8(simde_uint8x16_t a) {
#if defined(SIMDE_ARM_NEON_A32V7_NATIVE) #if defined(SIMDE_ARM_NEON_A32V7_NATIVE)
return vmvnq_u8(a); return vmvnq_u8(a);
#elif defined(SIMDE_X86_AVX512VL_NATIVE)
return _mm_ternarylogic_epi32(a, a, a, 0x55);
#elif defined(SIMDE_X86_SSE2_NATIVE) #elif defined(SIMDE_X86_SSE2_NATIVE)
return _mm_andnot_si128(a, _mm_cmpeq_epi8(a, a)); return _mm_andnot_si128(a, _mm_cmpeq_epi8(a, a));
#elif defined(SIMDE_POWER_ALTIVEC_P6_NATIVE) #elif defined(SIMDE_POWER_ALTIVEC_P6_NATIVE)
...@@ -173,6 +181,8 @@ simde_uint16x8_t ...@@ -173,6 +181,8 @@ simde_uint16x8_t
simde_vmvnq_u16(simde_uint16x8_t a) { simde_vmvnq_u16(simde_uint16x8_t a) {
#if defined(SIMDE_ARM_NEON_A32V7_NATIVE) #if defined(SIMDE_ARM_NEON_A32V7_NATIVE)
return vmvnq_u16(a); return vmvnq_u16(a);
#elif defined(SIMDE_X86_AVX512VL_NATIVE)
return _mm_ternarylogic_epi32(a, a, a, 0x55);
#elif defined(SIMDE_X86_SSE2_NATIVE) #elif defined(SIMDE_X86_SSE2_NATIVE)
return _mm_andnot_si128(a, _mm_cmpeq_epi16(a, a)); return _mm_andnot_si128(a, _mm_cmpeq_epi16(a, a));
#elif defined(SIMDE_POWER_ALTIVEC_P6_NATIVE) #elif defined(SIMDE_POWER_ALTIVEC_P6_NATIVE)
...@@ -206,6 +216,8 @@ simde_uint32x4_t ...@@ -206,6 +216,8 @@ simde_uint32x4_t
simde_vmvnq_u32(simde_uint32x4_t a) { simde_vmvnq_u32(simde_uint32x4_t a) {
#if defined(SIMDE_ARM_NEON_A32V7_NATIVE) #if defined(SIMDE_ARM_NEON_A32V7_NATIVE)
return vmvnq_u32(a); return vmvnq_u32(a);
#elif defined(SIMDE_X86_AVX512VL_NATIVE)
return _mm_ternarylogic_epi32(a, a, a, 0x55);
#elif defined(SIMDE_X86_SSE2_NATIVE) #elif defined(SIMDE_X86_SSE2_NATIVE)
return _mm_andnot_si128(a, _mm_cmpeq_epi32(a, a)); return _mm_andnot_si128(a, _mm_cmpeq_epi32(a, a));
#elif defined(SIMDE_POWER_ALTIVEC_P6_NATIVE) #elif defined(SIMDE_POWER_ALTIVEC_P6_NATIVE)
......
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