Commit 486e9e23 authored by luis_pereira87's avatar luis_pereira87

Merge remote-tracking branch 'origin/Dedicated-BWPs' into integration_2022_wk19b

# Conflicts:
#	openair1/SIMULATION/NR_PHY/ulsim.c
#	openair2/LAYER2/NR_MAC_UE/nr_ue_scheduler.c
#	openair2/RRC/NR/rrc_gNB_reconfig.c
parents 851291dd cc238a91
...@@ -332,6 +332,9 @@ The following features are valid for the gNB and the 5G-NR UE. ...@@ -332,6 +332,9 @@ The following features are valid for the gNB and the 5G-NR UE.
- evalution of RSRP report - evalution of RSRP report
- evaluation of CQI report - evaluation of CQI report
- MAC scheduling of SR reception - MAC scheduling of SR reception
- Bandwidth part (BWP) operation
- Handle multiple dedicated BWPs
- BWP switching through RRCReconfiguration method
**gNB RLC** **gNB RLC**
- Send/Receive operations according to 38.322 Rel.16 - Send/Receive operations according to 38.322 Rel.16
...@@ -493,6 +496,8 @@ The following features are valid for the gNB and the 5G-NR UE. ...@@ -493,6 +496,8 @@ The following features are valid for the gNB and the 5G-NR UE.
- Configuration of fapi PDU according to DCI - Configuration of fapi PDU according to DCI
* Scheduler procedures for SRS transmission * Scheduler procedures for SRS transmission
- Periodic SRS transmission - Periodic SRS transmission
* Bandwidth part (BWP) operation
- Operation in configured dedicated BWP through RRCSetup or RRCReconfiguration
**UE RLC** **UE RLC**
......
# Procedure to add dedicated Bandwidth part (BWP)
## Contributed by 5G Testbed IISc
### Developers: Abhijith A, Shruthi S
# Terminology #
## Bandwidth part (BWP) ##
Bandwidth Part (BWP) is a set of contiguous Resource Blocks in the resource grid.
Parameters of a BWP are communicated to UE using RRC parameters: BWP-Downlink and BWP-Uplink.
A UE can be configured with a set of 4 BWPs in uplink (UL) and downlink (DL) direction (3GPP TS 38.331 Annex B.2 Description of BWP configuration options). But only 1 BWP can be active in UL and DL direction at a given time.
# Procedure to run multiple dedicated BWPs #
A maximum of 4 dedicated BWPs can be configured for a UE.
To configure multiple BWPs, add the following parameters to the gNB configuration file under "servingCellConfigDedicated":
## Setup of the Configuration files ##
```
firstActiveDownlinkBWP-Id = 1; #BWP-Id
defaultDownlinkBWP-Id = 1; #BWP-Id
firstActiveUplinkBWP-Id = 1; #BWP-Id
```
Each dedicated BWP must have:
```
# BWP 1 Configuration
dl_bwp-Id_1 = 1;
dl_bwp1_locationAndBandwidth = 28875; // RBstart=0, L=106 (40 MHz BW)
# subcarrierSpacing
# 0=kHz15, 1=kHz30, 2=kHz60, 3=kHz120
dl_bwp1_subcarrierSpacing = 1;
```
Find these parameters in this configuration file: "targets/PROJECTS/GENERIC-NR-5GC/CONF/gnb.sa.band78.fr1.106PRB.usrpb210.conf"
# Testing gNB and UE in RF simulator
## gNB command:
```
sudo ./nr-softmodem -O ../../../targets/PROJECTS/GENERIC-NR-5GC/CONF/gnb.sa.band78.fr1.106PRB.usrpb210.conf --gNBs.[0].min_rxtxtime 6 --rfsim --sa
```
## UE command:
```
sudo RFSIMULATOR=127.0.0.1 ./nr-uesoftmodem -r 106 --numerology 1 --band 78 -C 3619200000 --nokrnmod --rfsim --sa --uicc0.imsi 208990000000001
```
\ No newline at end of file
...@@ -10,7 +10,8 @@ ...@@ -10,7 +10,8 @@
#define FAPI_NR_MAX_RA_OCCASION_PER_CSIRS 64 #define FAPI_NR_MAX_RA_OCCASION_PER_CSIRS 64
// Constants Defined in 38.213 // Constants Defined in 38.213
#define FAPI_NR_MAX_CORESET_PER_BWP 3 #define FAPI_NR_MAX_CORESET_PER_BWP 3
#define FAPI_NR_MAX_SS 10 #define FAPI_NR_MAX_SS_PER_BWP 10
#define FAPI_NR_MAX_SS FAPI_NR_MAX_SS_PER_BWP*NR_MAX_NUM_BWP
/// RX_IND /// RX_IND
......
...@@ -51,9 +51,9 @@ void reset_stats(FL_OBJECT *button, long arg) { ...@@ -51,9 +51,9 @@ void reset_stats(FL_OBJECT *button, long arg) {
int i,j,k; int i,j,k;
PHY_VARS_eNB *phy_vars_eNB = RC.eNB[0][0]; PHY_VARS_eNB *phy_vars_eNB = RC.eNB[0][0];
for (i=0; i<NUMBER_OF_DLSCH_MAX; i++) { for (i=0; i<NUMBER_OF_UE_MAX; i++) {
for (k=0; k<8; k++) { //harq_processes for (k=0; k<NUMBER_OF_DLSCH_MAX; k++) { //harq_processes
for (j=0; j<phy_vars_eNB->dlsch[i][0]->Mlimit; j++) { for (j=0; j<phy_vars_eNB->dlsch[k][0]->Mlimit; j++) {
phy_vars_eNB->UE_stats[i].dlsch_NAK[k][j]=0; phy_vars_eNB->UE_stats[i].dlsch_NAK[k][j]=0;
phy_vars_eNB->UE_stats[i].dlsch_ACK[k][j]=0; phy_vars_eNB->UE_stats[i].dlsch_ACK[k][j]=0;
phy_vars_eNB->UE_stats[i].dlsch_trials[k][j]=0; phy_vars_eNB->UE_stats[i].dlsch_trials[k][j]=0;
......
...@@ -87,7 +87,7 @@ ...@@ -87,7 +87,7 @@
#define NR_MAX_PDSCH_TBS 3824 #define NR_MAX_PDSCH_TBS 3824
#define NR_MAX_SIB_LENGTH 2976 // 3GPP TS 38.331 section 5.2.1 - The physical layer imposes a limit to the maximum size a SIB can take. The maximum SIB1 or SI message size is 2976 bits. #define NR_MAX_SIB_LENGTH 2976 // 3GPP TS 38.331 section 5.2.1 - The physical layer imposes a limit to the maximum size a SIB can take. The maximum SIB1 or SI message size is 2976 bits.
#define MAX_NUM_NR_DLSCH_SEGMENTS_PER_LAYER 34 #define MAX_NUM_NR_DLSCH_SEGMENTS_PER_LAYER 36
#define MAX_NUM_NR_ULSCH_SEGMENTS_PER_LAYER 34 #define MAX_NUM_NR_ULSCH_SEGMENTS_PER_LAYER 34
......
...@@ -919,21 +919,25 @@ bool nr_ue_dlsch_procedures(PHY_VARS_NR_UE *ue, ...@@ -919,21 +919,25 @@ bool nr_ue_dlsch_procedures(PHY_VARS_NR_UE *ue,
const double N_TA_max = Ta_max * bw_scaling * tc_factor; const double N_TA_max = Ta_max * bw_scaling * tc_factor;
NR_UE_MAC_INST_t *mac = get_mac_inst(0); NR_UE_MAC_INST_t *mac = get_mac_inst(0);
NR_BWP_Id_t dl_bwp = mac->DL_BWP_Id;
NR_BWP_Id_t ul_bwp = mac->UL_BWP_Id;
NR_PUSCH_TimeDomainResourceAllocationList_t *pusch_TimeDomainAllocationList = NULL; NR_PUSCH_TimeDomainResourceAllocationList_t *pusch_TimeDomainAllocationList = NULL;
if (mac->ULbwp[0] && if(ul_bwp){
mac->ULbwp[0]->bwp_Dedicated && if (mac->ULbwp[ul_bwp-1] &&
mac->ULbwp[0]->bwp_Dedicated->pusch_Config && mac->ULbwp[ul_bwp-1]->bwp_Dedicated &&
mac->ULbwp[0]->bwp_Dedicated->pusch_Config->choice.setup && mac->ULbwp[ul_bwp-1]->bwp_Dedicated->pusch_Config &&
mac->ULbwp[0]->bwp_Dedicated->pusch_Config->choice.setup->pusch_TimeDomainAllocationList) { mac->ULbwp[ul_bwp-1]->bwp_Dedicated->pusch_Config->choice.setup &&
pusch_TimeDomainAllocationList = mac->ULbwp[0]->bwp_Dedicated->pusch_Config->choice.setup->pusch_TimeDomainAllocationList->choice.setup; mac->ULbwp[ul_bwp-1]->bwp_Dedicated->pusch_Config->choice.setup->pusch_TimeDomainAllocationList) {
} pusch_TimeDomainAllocationList = mac->ULbwp[ul_bwp-1]->bwp_Dedicated->pusch_Config->choice.setup->pusch_TimeDomainAllocationList->choice.setup;
else if (mac->ULbwp[0] && }
mac->ULbwp[0]->bwp_Common && else if (mac->ULbwp[ul_bwp-1] &&
mac->ULbwp[0]->bwp_Common->pusch_ConfigCommon && mac->ULbwp[ul_bwp-1]->bwp_Common &&
mac->ULbwp[0]->bwp_Common->pusch_ConfigCommon->choice.setup && mac->ULbwp[ul_bwp-1]->bwp_Common->pusch_ConfigCommon &&
mac->ULbwp[0]->bwp_Common->pusch_ConfigCommon->choice.setup->pusch_TimeDomainAllocationList) { mac->ULbwp[ul_bwp-1]->bwp_Common->pusch_ConfigCommon->choice.setup &&
pusch_TimeDomainAllocationList = mac->ULbwp[0]->bwp_Common->pusch_ConfigCommon->choice.setup->pusch_TimeDomainAllocationList; mac->ULbwp[ul_bwp-1]->bwp_Common->pusch_ConfigCommon->choice.setup->pusch_TimeDomainAllocationList) {
pusch_TimeDomainAllocationList = mac->ULbwp[ul_bwp-1]->bwp_Common->pusch_ConfigCommon->choice.setup->pusch_TimeDomainAllocationList;
}
} }
else if (mac->scc_SIB && else if (mac->scc_SIB &&
mac->scc_SIB->uplinkConfigCommon && mac->scc_SIB->uplinkConfigCommon &&
...@@ -944,12 +948,15 @@ bool nr_ue_dlsch_procedures(PHY_VARS_NR_UE *ue, ...@@ -944,12 +948,15 @@ bool nr_ue_dlsch_procedures(PHY_VARS_NR_UE *ue,
} }
long mapping_type_ul = pusch_TimeDomainAllocationList ? pusch_TimeDomainAllocationList->list.array[0]->mappingType : NR_PUSCH_TimeDomainResourceAllocation__mappingType_typeA; long mapping_type_ul = pusch_TimeDomainAllocationList ? pusch_TimeDomainAllocationList->list.array[0]->mappingType : NR_PUSCH_TimeDomainResourceAllocation__mappingType_typeA;
NR_PDSCH_Config_t *pdsch_Config = (mac->DLbwp[0] && mac->DLbwp[0]->bwp_Dedicated->pdsch_Config->choice.setup) ? mac->DLbwp[0]->bwp_Dedicated->pdsch_Config->choice.setup : NULL; NR_PDSCH_Config_t *pdsch_Config = NULL;
NR_PDSCH_TimeDomainResourceAllocationList_t *pdsch_TimeDomainAllocationList = NULL; NR_PDSCH_TimeDomainResourceAllocationList_t *pdsch_TimeDomainAllocationList = NULL;
if (mac->DLbwp[0] && mac->DLbwp[0]->bwp_Dedicated->pdsch_Config->choice.setup->pdsch_TimeDomainAllocationList) if(dl_bwp){
pdsch_TimeDomainAllocationList = pdsch_Config->pdsch_TimeDomainAllocationList->choice.setup; pdsch_Config = (mac->DLbwp[dl_bwp-1] && mac->DLbwp[dl_bwp-1]->bwp_Dedicated->pdsch_Config->choice.setup) ? mac->DLbwp[dl_bwp-1]->bwp_Dedicated->pdsch_Config->choice.setup : NULL;
else if (mac->DLbwp[0] && mac->DLbwp[0]->bwp_Common->pdsch_ConfigCommon->choice.setup->pdsch_TimeDomainAllocationList) if (mac->DLbwp[dl_bwp-1] && mac->DLbwp[dl_bwp-1]->bwp_Dedicated->pdsch_Config->choice.setup->pdsch_TimeDomainAllocationList)
pdsch_TimeDomainAllocationList = mac->DLbwp[0]->bwp_Common->pdsch_ConfigCommon->choice.setup->pdsch_TimeDomainAllocationList; pdsch_TimeDomainAllocationList = pdsch_Config->pdsch_TimeDomainAllocationList->choice.setup;
else if (mac->DLbwp[dl_bwp-1] && mac->DLbwp[dl_bwp-1]->bwp_Common->pdsch_ConfigCommon->choice.setup->pdsch_TimeDomainAllocationList)
pdsch_TimeDomainAllocationList = mac->DLbwp[dl_bwp-1]->bwp_Common->pdsch_ConfigCommon->choice.setup->pdsch_TimeDomainAllocationList;
}
else if (mac->scc_SIB && mac->scc_SIB->downlinkConfigCommon.initialDownlinkBWP.pdsch_ConfigCommon->choice.setup) else if (mac->scc_SIB && mac->scc_SIB->downlinkConfigCommon.initialDownlinkBWP.pdsch_ConfigCommon->choice.setup)
pdsch_TimeDomainAllocationList = mac->scc_SIB->downlinkConfigCommon.initialDownlinkBWP.pdsch_ConfigCommon->choice.setup->pdsch_TimeDomainAllocationList; pdsch_TimeDomainAllocationList = mac->scc_SIB->downlinkConfigCommon.initialDownlinkBWP.pdsch_ConfigCommon->choice.setup->pdsch_TimeDomainAllocationList;
long mapping_type_dl = pdsch_TimeDomainAllocationList ? pdsch_TimeDomainAllocationList->list.array[0]->mappingType : NR_PDSCH_TimeDomainResourceAllocation__mappingType_typeA; long mapping_type_dl = pdsch_TimeDomainAllocationList ? pdsch_TimeDomainAllocationList->list.array[0]->mappingType : NR_PDSCH_TimeDomainResourceAllocation__mappingType_typeA;
...@@ -1003,7 +1010,7 @@ bool nr_ue_dlsch_procedures(PHY_VARS_NR_UE *ue, ...@@ -1003,7 +1010,7 @@ bool nr_ue_dlsch_procedures(PHY_VARS_NR_UE *ue,
d_2_1 = 1; d_2_1 = 1;
/* d_2_2 */ /* d_2_2 */
const double d_2_2 = 0.0; // set to 0 because there is only 1 BWP: TODO this should corresponds to the switching time as defined in TS 38.133 const double d_2_2 = pusch_d_2_2_timing_capability_1[numerology][1];
/* N_t_1 time duration in msec of N_1 symbols corresponding to a PDSCH reception time /* N_t_1 time duration in msec of N_1 symbols corresponding to a PDSCH reception time
// N_t_2 time duration in msec of N_2 symbols corresponding to a PUSCH preparation time */ // N_t_2 time duration in msec of N_2 symbols corresponding to a PUSCH preparation time */
......
...@@ -106,4 +106,36 @@ float pusch_N_2_timing_capability_2[3][2] = { ...@@ -106,4 +106,36 @@ float pusch_N_2_timing_capability_2[3][2] = {
{ 0, 5 }, { 0, 5 },
{ 1, 5.5 }, { 1, 5.5 },
{ 2, 11 }, { 2, 11 },
}; };
\ No newline at end of file
/* TS 38.133 Table 8.6.2-1: BWP switch delay capability 1
// corresponding to the PUSCH preparation time d_2_2 [slots]
// where mu corresponds to the one of {mu_DL, mu_UL}
// resulting with the largest T_proc_2
// where mu_DL is the SCS with which the PDCCH
// carrying the DCI scheduling the PUSCH was transmitted
// mu_UL is the SCS of the UL channel with which PUSCH to be transmitted
*/
float pusch_d_2_2_timing_capability_1[4][2] = {
/* mu d_2_2 */
{ 0, 1 },
{ 1, 2 },
{ 2, 3 },
{ 3, 6 },
};
/* TS 38.133 Table 8.6.2-1: BWP switch delay capability 2
// corresponding to the PUSCH preparation time d_2_2 [slots]
// where mu corresponds to the one of {mu_DL, mu_UL}
// resulting with the largest T_proc_2
// where mu_DL is the SCS with which the PDCCH
// carrying the DCI scheduling the PUSCH was transmitted
// mu_UL is the SCS of the UL channel with which PUSCH to be transmitted
*/
float pusch_d_2_2_timing_capability_2[4][2] = {
/* mu d_2_2 */
{ 0, 3 },
{ 1, 5 },
{ 2, 9 },
{ 3, 18 },
};
...@@ -292,7 +292,7 @@ void nr_dlsim_preprocessor(module_id_t module_id, ...@@ -292,7 +292,7 @@ void nr_dlsim_preprocessor(module_id_t module_id,
UE_info->CellGroup[0], UE_info->CellGroup[0],
sched_ctrl->active_bwp, sched_ctrl->active_bwp,
NULL, NULL,
/* tda = */ 2, /* tda = */ 0,
g_nrOfLayers, g_nrOfLayers,
sched_ctrl, sched_ctrl,
ps); ps);
...@@ -314,8 +314,7 @@ void nr_dlsim_preprocessor(module_id_t module_id, ...@@ -314,8 +314,7 @@ void nr_dlsim_preprocessor(module_id_t module_id,
ps->N_PRB_DMRS * ps->N_DMRS_SLOT, ps->N_PRB_DMRS * ps->N_DMRS_SLOT,
0 /* N_PRB_oh, 0 for initialBWP */, 0 /* N_PRB_oh, 0 for initialBWP */,
0 /* tb_scaling */, 0 /* tb_scaling */,
ps->nrOfLayers) ps->nrOfLayers) >> 3;
>> 3;
/* the simulator assumes the HARQ PID is equal to the slot number */ /* the simulator assumes the HARQ PID is equal to the slot number */
sched_pdsch->dl_harq_pid = slot; sched_pdsch->dl_harq_pid = slot;
...@@ -651,12 +650,12 @@ int main(int argc, char **argv) ...@@ -651,12 +650,12 @@ int main(int argc, char **argv)
dmrs_arg[i] = atoi(argv[optind++]); dmrs_arg[i] = atoi(argv[optind++]);
} }
break; break;
case 'X': case 'X':
strncpy(gNBthreads, optarg, sizeof(gNBthreads)); strncpy(gNBthreads, optarg, sizeof(gNBthreads));
gNBthreads[sizeof(gNBthreads)-1]=0; gNBthreads[sizeof(gNBthreads)-1]=0;
break; break;
default: default:
case 'h': case 'h':
printf("%s -h(elp) -p(extended_prefix) -N cell_id -f output_filename -F input_filename -g channel_model -n n_frames -t Delayspread -s snr0 -S snr1 -x transmission_mode -y TXant -z RXant -i Intefrence0 -j Interference1 -A interpolation_file -C(alibration offset dB) -N CellId\n", printf("%s -h(elp) -p(extended_prefix) -N cell_id -f output_filename -F input_filename -g channel_model -n n_frames -t Delayspread -s snr0 -S snr1 -x transmission_mode -y TXant -z RXant -i Intefrence0 -j Interference1 -A interpolation_file -C(alibration offset dB) -N CellId\n",
...@@ -870,11 +869,11 @@ int main(int argc, char **argv) ...@@ -870,11 +869,11 @@ int main(int argc, char **argv)
fs = 61.44e6; fs = 61.44e6;
bw = 40e6; bw = 40e6;
} }
else if (mu == 1 && N_RB_DL == 133) { else if (mu == 1 && N_RB_DL == 133) {
fs = 61.44e6; fs = 61.44e6;
bw = 50e6; bw = 50e6;
} }
else if (mu == 1 && N_RB_DL == 162) { else if (mu == 1 && N_RB_DL == 162) {
fs = 61.44e6; fs = 61.44e6;
bw = 60e6; bw = 60e6;
} }
......
...@@ -462,7 +462,7 @@ int main(int argc, char **argv) ...@@ -462,7 +462,7 @@ int main(int argc, char **argv)
case 'W': case 'W':
precod_nbr_layers = atoi(optarg); precod_nbr_layers = atoi(optarg);
break; break;
case 'n': case 'n':
n_trials = atoi(optarg); n_trials = atoi(optarg);
break; break;
...@@ -756,7 +756,7 @@ int main(int argc, char **argv) ...@@ -756,7 +756,7 @@ int main(int argc, char **argv)
rrc_mac_config_req_gNB(0,0, conf.pdsch_AntennaPorts, n_rx, 0, 6, scc, &rrc.carrier.mib, rrc.carrier.siblock1, 0, 0, NULL); rrc_mac_config_req_gNB(0,0, conf.pdsch_AntennaPorts, n_rx, 0, 6, scc, &rrc.carrier.mib, rrc.carrier.siblock1, 0, 0, NULL);
// UE dedicated configuration // UE dedicated configuration
rrc_mac_config_req_gNB(0,0, conf.pdsch_AntennaPorts, n_rx, 0, 6, scc, &rrc.carrier.mib, rrc.carrier.siblock1, 1, rrc_mac_config_req_gNB(0,0, conf.pdsch_AntennaPorts, n_rx, 0, 6, scc, &rrc.carrier.mib, rrc.carrier.siblock1, 1,
secondaryCellGroup->spCellConfig->reconfigurationWithSync->newUE_Identity,secondaryCellGroup); secondaryCellGroup->spCellConfig->reconfigurationWithSync->newUE_Identity, secondaryCellGroup);
frame_parms->nb_antennas_tx = 1; frame_parms->nb_antennas_tx = 1;
frame_parms->nb_antennas_rx = n_rx; frame_parms->nb_antennas_rx = n_rx;
nfapi_nr_config_request_scf_t *cfg = &gNB->gNB_config; nfapi_nr_config_request_scf_t *cfg = &gNB->gNB_config;
...@@ -880,10 +880,10 @@ int main(int argc, char **argv) ...@@ -880,10 +880,10 @@ int main(int argc, char **argv)
uint16_t number_dmrs_symbols = get_dmrs_symbols_in_slot(l_prime_mask, nb_symb_sch); uint16_t number_dmrs_symbols = get_dmrs_symbols_in_slot(l_prime_mask, nb_symb_sch);
printf("num dmrs sym %d\n",number_dmrs_symbols); printf("num dmrs sym %d\n",number_dmrs_symbols);
uint8_t nb_re_dmrs = (dmrs_config_type == pusch_dmrs_type1) ? 6 : 4; uint8_t nb_re_dmrs = (dmrs_config_type == pusch_dmrs_type1) ? 6 : 4;
if ((UE->frame_parms.nb_antennas_tx==4)&&(precod_nbr_layers==4)) if ((UE->frame_parms.nb_antennas_tx==4)&&(precod_nbr_layers==4))
num_dmrs_cdm_grps_no_data = 2; num_dmrs_cdm_grps_no_data = 2;
if (transform_precoding == transformPrecoder_enabled) { if (transform_precoding == transformPrecoder_enabled) {
AssertFatal(enable_ptrs == 0, "PTRS NOT SUPPORTED IF TRANSFORM PRECODING IS ENABLED\n"); AssertFatal(enable_ptrs == 0, "PTRS NOT SUPPORTED IF TRANSFORM PRECODING IS ENABLED\n");
...@@ -1096,7 +1096,7 @@ int main(int argc, char **argv) ...@@ -1096,7 +1096,7 @@ int main(int argc, char **argv)
pusch_pdu->dmrs_config_type = dmrs_config_type; pusch_pdu->dmrs_config_type = dmrs_config_type;
pusch_pdu->ul_dmrs_scrambling_id = *scc->physCellId; pusch_pdu->ul_dmrs_scrambling_id = *scc->physCellId;
pusch_pdu->scid = 0; pusch_pdu->scid = 0;
pusch_pdu->dmrs_ports = ((1<<precod_nbr_layers)-1); pusch_pdu->dmrs_ports = ((1<<precod_nbr_layers)-1);
pusch_pdu->num_dmrs_cdm_grps_no_data = num_dmrs_cdm_grps_no_data; pusch_pdu->num_dmrs_cdm_grps_no_data = num_dmrs_cdm_grps_no_data;
pusch_pdu->resource_alloc = 1; pusch_pdu->resource_alloc = 1;
pusch_pdu->rb_start = start_rb; pusch_pdu->rb_start = start_rb;
...@@ -1209,8 +1209,8 @@ int main(int argc, char **argv) ...@@ -1209,8 +1209,8 @@ int main(int argc, char **argv)
slot, slot,
&UE->frame_parms, &UE->frame_parms,
UE->frame_parms.nb_antennas_tx); UE->frame_parms.nb_antennas_tx);
if (n_trials==1) { if (n_trials==1) {
LOG_M("txsig0.m","txs0", &UE->common_vars.txdata[0][slot_offset],slot_length,1,1); LOG_M("txsig0.m","txs0", &UE->common_vars.txdata[0][slot_offset],slot_length,1,1);
LOG_M("txsig0F.m","txs0F", UE->common_vars.txdataF[0],frame_parms->ofdm_symbol_size*14,1,1); LOG_M("txsig0F.m","txs0F", UE->common_vars.txdataF[0],frame_parms->ofdm_symbol_size*14,1,1);
...@@ -1232,12 +1232,12 @@ int main(int argc, char **argv) ...@@ -1232,12 +1232,12 @@ int main(int argc, char **argv)
for (int aa=0; aa<UE->frame_parms.nb_antennas_tx; aa++) { for (int aa=0; aa<UE->frame_parms.nb_antennas_tx; aa++) {
atxlev[aa] = signal_energy(&UE->common_vars.txdata[aa][tx_offset + 5*frame_parms->ofdm_symbol_size + 4*frame_parms->nb_prefix_samples + frame_parms->nb_prefix_samples0], atxlev[aa] = signal_energy(&UE->common_vars.txdata[aa][tx_offset + 5*frame_parms->ofdm_symbol_size + 4*frame_parms->nb_prefix_samples + frame_parms->nb_prefix_samples0],
frame_parms->ofdm_symbol_size + frame_parms->nb_prefix_samples); frame_parms->ofdm_symbol_size + frame_parms->nb_prefix_samples);
txlev_sum += atxlev[aa]; txlev_sum += atxlev[aa];
if (n_trials==1) printf("txlev[%d] = %d (%f dB) txlev_sum %d\n",aa,atxlev[aa],10*log10((double)atxlev[aa]),txlev_sum); if (n_trials==1) printf("txlev[%d] = %d (%f dB) txlev_sum %d\n",aa,atxlev[aa],10*log10((double)atxlev[aa]),txlev_sum);
} }
} }
else else
n_trials = 1; n_trials = 1;
...@@ -1363,26 +1363,26 @@ int main(int argc, char **argv) ...@@ -1363,26 +1363,26 @@ int main(int argc, char **argv)
&gNB->pusch_vars[0]->ul_ch_magb[0][start_symbol*(off+(NR_NB_SC_PER_RB * pusch_pdu->rb_size))],nb_symb_sch*(off+(NR_NB_SC_PER_RB * pusch_pdu->rb_size)),1,1); &gNB->pusch_vars[0]->ul_ch_magb[0][start_symbol*(off+(NR_NB_SC_PER_RB * pusch_pdu->rb_size))],nb_symb_sch*(off+(NR_NB_SC_PER_RB * pusch_pdu->rb_size)),1,1);
LOG_M("rxsigF0_llrlayers0.m","rxsF0_llrlayers0", LOG_M("rxsigF0_llrlayers0.m","rxsF0_llrlayers0",
&gNB->pusch_vars[0]->llr_layers[0][0],(nb_symb_sch-1)*NR_NB_SC_PER_RB * pusch_pdu->rb_size * mod_order,1,0); &gNB->pusch_vars[0]->llr_layers[0][0],(nb_symb_sch-1)*NR_NB_SC_PER_RB * pusch_pdu->rb_size * mod_order,1,0);
if (precod_nbr_layers==2) { if (precod_nbr_layers==2) {
LOG_M("rxsigF1_ext.m","rxsF1_ext", LOG_M("rxsigF1_ext.m","rxsF1_ext",
&gNB->pusch_vars[0]->rxdataF_ext[1][start_symbol*NR_NB_SC_PER_RB * pusch_pdu->rb_size],nb_symb_sch*(off+(NR_NB_SC_PER_RB * pusch_pdu->rb_size)),1,1); &gNB->pusch_vars[0]->rxdataF_ext[1][start_symbol*NR_NB_SC_PER_RB * pusch_pdu->rb_size],nb_symb_sch*(off+(NR_NB_SC_PER_RB * pusch_pdu->rb_size)),1,1);
LOG_M("chestF3.m","chF3", LOG_M("chestF3.m","chF3",
&gNB->pusch_vars[0]->ul_ch_estimates[3][start_symbol*frame_parms->ofdm_symbol_size],frame_parms->ofdm_symbol_size,1,1); &gNB->pusch_vars[0]->ul_ch_estimates[3][start_symbol*frame_parms->ofdm_symbol_size],frame_parms->ofdm_symbol_size,1,1);
LOG_M("chestF3_ext.m","chF3_ext", LOG_M("chestF3_ext.m","chF3_ext",
&gNB->pusch_vars[0]->ul_ch_estimates_ext[3][(start_symbol+1)*(off+(NR_NB_SC_PER_RB * pusch_pdu->rb_size))], &gNB->pusch_vars[0]->ul_ch_estimates_ext[3][(start_symbol+1)*(off+(NR_NB_SC_PER_RB * pusch_pdu->rb_size))],
(nb_symb_sch-1)*(off+(NR_NB_SC_PER_RB * pusch_pdu->rb_size)),1,1); (nb_symb_sch-1)*(off+(NR_NB_SC_PER_RB * pusch_pdu->rb_size)),1,1);
LOG_M("rxsigF2_comp.m","rxsF2_comp", LOG_M("rxsigF2_comp.m","rxsF2_comp",
&gNB->pusch_vars[0]->rxdataF_comp[2][start_symbol*(off+(NR_NB_SC_PER_RB * pusch_pdu->rb_size))],nb_symb_sch*(off+(NR_NB_SC_PER_RB * pusch_pdu->rb_size)),1,1); &gNB->pusch_vars[0]->rxdataF_comp[2][start_symbol*(off+(NR_NB_SC_PER_RB * pusch_pdu->rb_size))],nb_symb_sch*(off+(NR_NB_SC_PER_RB * pusch_pdu->rb_size)),1,1);
LOG_M("rxsigF0_llrlayers1.m","rxsF0_llrlayers1", LOG_M("rxsigF0_llrlayers1.m","rxsF0_llrlayers1",
&gNB->pusch_vars[0]->llr_layers[1][0],(nb_symb_sch-1)*NR_NB_SC_PER_RB * pusch_pdu->rb_size * mod_order,1,0); &gNB->pusch_vars[0]->llr_layers[1][0],(nb_symb_sch-1)*NR_NB_SC_PER_RB * pusch_pdu->rb_size * mod_order,1,0);
} }
if (precod_nbr_layers==4) { if (precod_nbr_layers==4) {
LOG_M("rxsigF1_ext.m","rxsF1_ext", LOG_M("rxsigF1_ext.m","rxsF1_ext",
&gNB->pusch_vars[0]->rxdataF_ext[1][start_symbol*NR_NB_SC_PER_RB * pusch_pdu->rb_size],nb_symb_sch*(off+(NR_NB_SC_PER_RB * pusch_pdu->rb_size)),1,1); &gNB->pusch_vars[0]->rxdataF_ext[1][start_symbol*NR_NB_SC_PER_RB * pusch_pdu->rb_size],nb_symb_sch*(off+(NR_NB_SC_PER_RB * pusch_pdu->rb_size)),1,1);
...@@ -1390,7 +1390,7 @@ int main(int argc, char **argv) ...@@ -1390,7 +1390,7 @@ int main(int argc, char **argv)
&gNB->pusch_vars[0]->rxdataF_ext[2][start_symbol*NR_NB_SC_PER_RB * pusch_pdu->rb_size],nb_symb_sch*(off+(NR_NB_SC_PER_RB * pusch_pdu->rb_size)),1,1); &gNB->pusch_vars[0]->rxdataF_ext[2][start_symbol*NR_NB_SC_PER_RB * pusch_pdu->rb_size],nb_symb_sch*(off+(NR_NB_SC_PER_RB * pusch_pdu->rb_size)),1,1);
LOG_M("rxsigF3_ext.m","rxsF3_ext", LOG_M("rxsigF3_ext.m","rxsF3_ext",
&gNB->pusch_vars[0]->rxdataF_ext[3][start_symbol*NR_NB_SC_PER_RB * pusch_pdu->rb_size],nb_symb_sch*(off+(NR_NB_SC_PER_RB * pusch_pdu->rb_size)),1,1); &gNB->pusch_vars[0]->rxdataF_ext[3][start_symbol*NR_NB_SC_PER_RB * pusch_pdu->rb_size],nb_symb_sch*(off+(NR_NB_SC_PER_RB * pusch_pdu->rb_size)),1,1);
LOG_M("chestF5.m","chF5", LOG_M("chestF5.m","chF5",
&gNB->pusch_vars[0]->ul_ch_estimates[5][start_symbol*frame_parms->ofdm_symbol_size],frame_parms->ofdm_symbol_size,1,1); &gNB->pusch_vars[0]->ul_ch_estimates[5][start_symbol*frame_parms->ofdm_symbol_size],frame_parms->ofdm_symbol_size,1,1);
LOG_M("chestF10.m","chF10", LOG_M("chestF10.m","chF10",
...@@ -1423,7 +1423,7 @@ int main(int argc, char **argv) ...@@ -1423,7 +1423,7 @@ int main(int argc, char **argv)
LOG_M("rxsigF0_llrlayers3.m","rxsF0_llrlayers3", LOG_M("rxsigF0_llrlayers3.m","rxsF0_llrlayers3",
&gNB->pusch_vars[0]->llr_layers[3][0],(nb_symb_sch-1)*NR_NB_SC_PER_RB * pusch_pdu->rb_size * mod_order,1,0); &gNB->pusch_vars[0]->llr_layers[3][0],(nb_symb_sch-1)*NR_NB_SC_PER_RB * pusch_pdu->rb_size * mod_order,1,0);
} }
LOG_M("rxsigF0_llr.m","rxsF0_llr", LOG_M("rxsigF0_llr.m","rxsF0_llr",
&gNB->pusch_vars[0]->llr[0],precod_nbr_layers*(nb_symb_sch-1)*NR_NB_SC_PER_RB * pusch_pdu->rb_size * mod_order,1,0); &gNB->pusch_vars[0]->llr[0],precod_nbr_layers*(nb_symb_sch-1)*NR_NB_SC_PER_RB * pusch_pdu->rb_size * mod_order,1,0);
} }
......
...@@ -60,7 +60,9 @@ ...@@ -60,7 +60,9 @@
#define F1AP_MAX_NB_CELLS 2 #define F1AP_MAX_NB_CELLS 2
#define F1AP_MAX_NO_OF_TNL_ASSOCIATIONS 32 #define F1AP_MAX_NO_OF_TNL_ASSOCIATIONS 32
#define F1AP_MAX_NO_UE_ID 1024 #define F1AP_MAX_NO_UE_ID 1024
#define F1AP_MAX_DU2CU_RRC_LENGTH 1024
typedef struct f1ap_net_ip_address_s { typedef struct f1ap_net_ip_address_s {
unsigned ipv4:1; unsigned ipv4:1;
unsigned ipv6:1; unsigned ipv6:1;
...@@ -307,7 +309,7 @@ typedef struct f1ap_initial_ul_rrc_message_s { ...@@ -307,7 +309,7 @@ typedef struct f1ap_initial_ul_rrc_message_s {
uint16_t crnti; uint16_t crnti;
uint8_t *rrc_container; uint8_t *rrc_container;
int rrc_container_length; int rrc_container_length;
char du2cu_rrc_container[200]; char du2cu_rrc_container[F1AP_MAX_DU2CU_RRC_LENGTH];
int du2cu_rrc_container_length; int du2cu_rrc_container_length;
} f1ap_initial_ul_rrc_message_t; } f1ap_initial_ul_rrc_message_t;
......
...@@ -58,7 +58,7 @@ ...@@ -58,7 +58,7 @@
// Some constants from "LAYER2/MAC/defs.h" // Some constants from "LAYER2/MAC/defs.h"
#define BCCH_SDU_SIZE (512) #define BCCH_SDU_SIZE (512)
#define BCCH_SDU_MBMS_SIZE (512) #define BCCH_SDU_MBMS_SIZE (512)
#define CCCH_SDU_SIZE (512) #define CCCH_SDU_SIZE (1024)
#define MCCH_SDU_SIZE (512) #define MCCH_SDU_SIZE (512)
#define PCCH_SDU_SIZE (512) #define PCCH_SDU_SIZE (512)
......
...@@ -132,6 +132,34 @@ ...@@ -132,6 +132,34 @@
#define GNB_CONFIG_STRING_ULPTRSMAXPORTS_0 "ul_ptrsMaxPorts_0" #define GNB_CONFIG_STRING_ULPTRSMAXPORTS_0 "ul_ptrsMaxPorts_0"
#define GNB_CONFIG_STRING_ULPTRSPOWER_0 "ul_ptrsPower_0" #define GNB_CONFIG_STRING_ULPTRSPOWER_0 "ul_ptrsPower_0"
#define GNB_CONFIG_STRING_DLBWP1_ID "dl_bwp-Id_1"
#define GNB_CONFIG_STRING_DLBWP2_ID "dl_bwp-Id_2"
#define GNB_CONFIG_STRING_DLBWP3_ID "dl_bwp-Id_3"
#define GNB_CONFIG_STRING_DLBWP4_ID "dl_bwp-Id_4"
#define GNB_CONFIG_STRING_LOCATIONANDBANDWIDTH_DLBWP1 "dl_bwp1_locationAndBandwidth"
#define GNB_CONFIG_STRING_LOCATIONANDBANDWIDTH_DLBWP2 "dl_bwp2_locationAndBandwidth"
#define GNB_CONFIG_STRING_LOCATIONANDBANDWIDTH_DLBWP3 "dl_bwp3_locationAndBandwidth"
#define GNB_CONFIG_STRING_LOCATIONANDBANDWIDTH_DLBWP4 "dl_bwp4_locationAndBandwidth"
#define GNB_CONFIG_STRING_SCS_DLBWP1 "dl_bwp1_subcarrierSpacing"
#define GNB_CONFIG_STRING_SCS_DLBWP2 "dl_bwp2_subcarrierSpacing"
#define GNB_CONFIG_STRING_SCS_DLBWP3 "dl_bwp3_subcarrierSpacing"
#define GNB_CONFIG_STRING_SCS_DLBWP4 "dl_bwp4_subcarrierSpacing"
#define GNB_CONFIG_STRING_FIRSTACTIVEDLBWP_ID "firstActiveDownlinkBWP-Id"
#define GNB_CONFIG_STRING_DEFAULTDLBWP_ID "defaultDownlinkBWP-Id"
#define GNB_CONFIG_STRING_ULBWP1_ID "ul_bwp-Id_1"
#define GNB_CONFIG_STRING_ULBWP2_ID "ul_bwp-Id_2"
#define GNB_CONFIG_STRING_ULBWP3_ID "ul_bwp-Id_3"
#define GNB_CONFIG_STRING_ULBWP4_ID "ul_bwp-Id_4"
#define GNB_CONFIG_STRING_LOCATIONANDBANDWIDTH_ULBWP1 "ul_bwp1_locationAndBandwidth"
#define GNB_CONFIG_STRING_LOCATIONANDBANDWIDTH_ULBWP2 "ul_bwp2_locationAndBandwidth"
#define GNB_CONFIG_STRING_LOCATIONANDBANDWIDTH_ULBWP3 "ul_bwp3_locationAndBandwidth"
#define GNB_CONFIG_STRING_LOCATIONANDBANDWIDTH_ULBWP4 "ul_bwp4_locationAndBandwidth"
#define GNB_CONFIG_STRING_SCS_ULBWP1 "ul_bwp1_subcarrierSpacing"
#define GNB_CONFIG_STRING_SCS_ULBWP2 "ul_bwp2_subcarrierSpacing"
#define GNB_CONFIG_STRING_SCS_ULBWP3 "ul_bwp3_subcarrierSpacing"
#define GNB_CONFIG_STRING_SCS_ULBWP4 "ul_bwp4_subcarrierSpacing"
#define GNB_CONFIG_STRING_FIRSTACTIVEULBWP_ID "firstActiveUplinkBWP-Id"
/*--------------------------------------------------------------------------------------------------------------------*/ /*--------------------------------------------------------------------------------------------------------------------*/
/* pdcch_ConfigSIB1 parameters */ /* pdcch_ConfigSIB1 parameters */
/*--------------------------------------------------------------------------------------------------------------------*/ /*--------------------------------------------------------------------------------------------------------------------*/
...@@ -240,10 +268,33 @@ ...@@ -240,10 +268,33 @@
{GNB_CONFIG_STRING_ULPTRSTIMEDENSITY2_0,NULL,0,i64ptr:scd->uplinkConfig->uplinkBWP_ToAddModList->list.array[0]->bwp_Dedicated->pusch_Config->choice.setup->dmrs_UplinkForPUSCH_MappingTypeB->choice.setup->phaseTrackingRS->choice.setup->transformPrecoderDisabled->timeDensity->list.array[2],defint64val:-1,TYPE_INT64,0}, \ {GNB_CONFIG_STRING_ULPTRSTIMEDENSITY2_0,NULL,0,i64ptr:scd->uplinkConfig->uplinkBWP_ToAddModList->list.array[0]->bwp_Dedicated->pusch_Config->choice.setup->dmrs_UplinkForPUSCH_MappingTypeB->choice.setup->phaseTrackingRS->choice.setup->transformPrecoderDisabled->timeDensity->list.array[2],defint64val:-1,TYPE_INT64,0}, \
{GNB_CONFIG_STRING_ULPTRSREOFFSET_0,NULL,0,i64ptr:scd->uplinkConfig->uplinkBWP_ToAddModList->list.array[0]->bwp_Dedicated->pusch_Config->choice.setup->dmrs_UplinkForPUSCH_MappingTypeB->choice.setup->phaseTrackingRS->choice.setup->transformPrecoderDisabled->resourceElementOffset,defint64val:-1,TYPE_INT64,0}, \ {GNB_CONFIG_STRING_ULPTRSREOFFSET_0,NULL,0,i64ptr:scd->uplinkConfig->uplinkBWP_ToAddModList->list.array[0]->bwp_Dedicated->pusch_Config->choice.setup->dmrs_UplinkForPUSCH_MappingTypeB->choice.setup->phaseTrackingRS->choice.setup->transformPrecoderDisabled->resourceElementOffset,defint64val:-1,TYPE_INT64,0}, \
{GNB_CONFIG_STRING_ULPTRSMAXPORTS_0,NULL,0,i64ptr:&scd->uplinkConfig->uplinkBWP_ToAddModList->list.array[0]->bwp_Dedicated->pusch_Config->choice.setup->dmrs_UplinkForPUSCH_MappingTypeB->choice.setup->phaseTrackingRS->choice.setup->transformPrecoderDisabled->maxNrofPorts,defint64val:0,TYPE_INT64,0}, \ {GNB_CONFIG_STRING_ULPTRSMAXPORTS_0,NULL,0,i64ptr:&scd->uplinkConfig->uplinkBWP_ToAddModList->list.array[0]->bwp_Dedicated->pusch_Config->choice.setup->dmrs_UplinkForPUSCH_MappingTypeB->choice.setup->phaseTrackingRS->choice.setup->transformPrecoderDisabled->maxNrofPorts,defint64val:0,TYPE_INT64,0}, \
{GNB_CONFIG_STRING_ULPTRSPOWER_0,NULL,0,i64ptr:&scd->uplinkConfig->uplinkBWP_ToAddModList->list.array[0]->bwp_Dedicated->pusch_Config->choice.setup->dmrs_UplinkForPUSCH_MappingTypeB->choice.setup->phaseTrackingRS->choice.setup->transformPrecoderDisabled->ptrs_Power,defint64val:0,TYPE_INT64,0}} {GNB_CONFIG_STRING_ULPTRSPOWER_0,NULL,0,i64ptr:&scd->uplinkConfig->uplinkBWP_ToAddModList->list.array[0]->bwp_Dedicated->pusch_Config->choice.setup->dmrs_UplinkForPUSCH_MappingTypeB->choice.setup->phaseTrackingRS->choice.setup->transformPrecoderDisabled->ptrs_Power,defint64val:0,TYPE_INT64,0}, \
{GNB_CONFIG_STRING_FIRSTACTIVEDLBWP_ID,NULL,0,i64ptr:scd->firstActiveDownlinkBWP_Id,defint64val:1,TYPE_INT64,0}, \
{GNB_CONFIG_STRING_FIRSTACTIVEULBWP_ID,NULL,0,i64ptr:scd->uplinkConfig->firstActiveUplinkBWP_Id,defint64val:1,TYPE_INT64,0}, \
{GNB_CONFIG_STRING_DLBWP1_ID,NULL,0,i64ptr:&scd->downlinkBWP_ToAddModList->list.array[0]->bwp_Id,defint64val:1,TYPE_INT64,0}, \
{GNB_CONFIG_STRING_DLBWP2_ID,NULL,0,i64ptr:&scd->downlinkBWP_ToAddModList->list.array[1]->bwp_Id,defint64val:2,TYPE_INT64,0}, \
{GNB_CONFIG_STRING_DLBWP3_ID,NULL,0,i64ptr:&scd->downlinkBWP_ToAddModList->list.array[2]->bwp_Id,defint64val:3,TYPE_INT64,0}, \
{GNB_CONFIG_STRING_DLBWP4_ID,NULL,0,i64ptr:&scd->downlinkBWP_ToAddModList->list.array[3]->bwp_Id,defint64val:4,TYPE_INT64,0}, \
{GNB_CONFIG_STRING_SCS_DLBWP1,NULL,0,i64ptr:&scd->downlinkBWP_ToAddModList->list.array[0]->bwp_Common->genericParameters.subcarrierSpacing,defint64val:1,TYPE_INT64,0}, \
{GNB_CONFIG_STRING_SCS_DLBWP2,NULL,0,i64ptr:&scd->downlinkBWP_ToAddModList->list.array[1]->bwp_Common->genericParameters.subcarrierSpacing,defint64val:1,TYPE_INT64,0}, \
{GNB_CONFIG_STRING_SCS_DLBWP3,NULL,0,i64ptr:&scd->downlinkBWP_ToAddModList->list.array[2]->bwp_Common->genericParameters.subcarrierSpacing,defint64val:1,TYPE_INT64,0}, \
{GNB_CONFIG_STRING_SCS_DLBWP4,NULL,0,i64ptr:&scd->downlinkBWP_ToAddModList->list.array[3]->bwp_Common->genericParameters.subcarrierSpacing,defint64val:1,TYPE_INT64,0}, \
{GNB_CONFIG_STRING_LOCATIONANDBANDWIDTH_DLBWP1,NULL,0,i64ptr:&scd->downlinkBWP_ToAddModList->list.array[0]->bwp_Common->genericParameters.locationAndBandwidth,defint64val:0,TYPE_INT64,0}, \
{GNB_CONFIG_STRING_LOCATIONANDBANDWIDTH_DLBWP2,NULL,0,i64ptr:&scd->downlinkBWP_ToAddModList->list.array[1]->bwp_Common->genericParameters.locationAndBandwidth,defint64val:0,TYPE_INT64,0}, \
{GNB_CONFIG_STRING_LOCATIONANDBANDWIDTH_DLBWP3,NULL,0,i64ptr:&scd->downlinkBWP_ToAddModList->list.array[2]->bwp_Common->genericParameters.locationAndBandwidth,defint64val:0,TYPE_INT64,0}, \
{GNB_CONFIG_STRING_LOCATIONANDBANDWIDTH_DLBWP4,NULL,0,i64ptr:&scd->downlinkBWP_ToAddModList->list.array[3]->bwp_Common->genericParameters.locationAndBandwidth,defint64val:0,TYPE_INT64,0}, \
{GNB_CONFIG_STRING_ULBWP1_ID,NULL,0,i64ptr:&scd->uplinkConfig->uplinkBWP_ToAddModList->list.array[0]->bwp_Id,defint64val:1,TYPE_INT64,0}, \
{GNB_CONFIG_STRING_ULBWP2_ID,NULL,0,i64ptr:&scd->uplinkConfig->uplinkBWP_ToAddModList->list.array[1]->bwp_Id,defint64val:2,TYPE_INT64,0}, \
{GNB_CONFIG_STRING_ULBWP3_ID,NULL,0,i64ptr:&scd->uplinkConfig->uplinkBWP_ToAddModList->list.array[2]->bwp_Id,defint64val:3,TYPE_INT64,0}, \
{GNB_CONFIG_STRING_ULBWP4_ID,NULL,0,i64ptr:&scd->uplinkConfig->uplinkBWP_ToAddModList->list.array[3]->bwp_Id,defint64val:4,TYPE_INT64,0}, \
{GNB_CONFIG_STRING_SCS_ULBWP1,NULL,0,i64ptr:&scd->uplinkConfig->uplinkBWP_ToAddModList->list.array[0]->bwp_Common->genericParameters.subcarrierSpacing,defint64val:1,TYPE_INT64,0}, \
{GNB_CONFIG_STRING_SCS_ULBWP2,NULL,0,i64ptr:&scd->uplinkConfig->uplinkBWP_ToAddModList->list.array[1]->bwp_Common->genericParameters.subcarrierSpacing,defint64val:1,TYPE_INT64,0}, \
{GNB_CONFIG_STRING_SCS_ULBWP3,NULL,0,i64ptr:&scd->uplinkConfig->uplinkBWP_ToAddModList->list.array[2]->bwp_Common->genericParameters.subcarrierSpacing,defint64val:1,TYPE_INT64,0}, \
{GNB_CONFIG_STRING_SCS_ULBWP4,NULL,0,i64ptr:&scd->uplinkConfig->uplinkBWP_ToAddModList->list.array[3]->bwp_Common->genericParameters.subcarrierSpacing,defint64val:1,TYPE_INT64,0}, \
{GNB_CONFIG_STRING_LOCATIONANDBANDWIDTH_ULBWP1,NULL,0,i64ptr:&scd->uplinkConfig->uplinkBWP_ToAddModList->list.array[0]->bwp_Common->genericParameters.locationAndBandwidth,defint64val:0,TYPE_INT64,0}, \
{GNB_CONFIG_STRING_LOCATIONANDBANDWIDTH_ULBWP2,NULL,0,i64ptr:&scd->uplinkConfig->uplinkBWP_ToAddModList->list.array[1]->bwp_Common->genericParameters.locationAndBandwidth,defint64val:0,TYPE_INT64,0}, \
{GNB_CONFIG_STRING_LOCATIONANDBANDWIDTH_ULBWP3,NULL,0,i64ptr:&scd->uplinkConfig->uplinkBWP_ToAddModList->list.array[2]->bwp_Common->genericParameters.locationAndBandwidth,defint64val:0,TYPE_INT64,0}, \
{GNB_CONFIG_STRING_LOCATIONANDBANDWIDTH_ULBWP4,NULL,0,i64ptr:&scd->uplinkConfig->uplinkBWP_ToAddModList->list.array[3]->bwp_Common->genericParameters.locationAndBandwidth,defint64val:0,TYPE_INT64,0}, \
{GNB_CONFIG_STRING_DEFAULTDLBWP_ID,NULL,0,i64ptr:scd->defaultDownlinkBWP_Id,defint64val:0,TYPE_INT64,0}}
#endif #endif
This diff is collapsed.
...@@ -2623,6 +2623,7 @@ uint16_t nr_dci_size(const NR_BWP_DownlinkCommon_t *initialDownlinkBWP, ...@@ -2623,6 +2623,7 @@ uint16_t nr_dci_size(const NR_BWP_DownlinkCommon_t *initialDownlinkBWP,
nr_rnti_type_t rnti_type, nr_rnti_type_t rnti_type,
uint16_t N_RB, uint16_t N_RB,
int bwp_id, int bwp_id,
NR_ControlResourceSetId_t coreset_id,
uint16_t cset0_bwp_size) { uint16_t cset0_bwp_size) {
uint16_t size = 0; uint16_t size = 0;
...@@ -2672,7 +2673,7 @@ uint16_t nr_dci_size(const NR_BWP_DownlinkCommon_t *initialDownlinkBWP, ...@@ -2672,7 +2673,7 @@ uint16_t nr_dci_size(const NR_BWP_DownlinkCommon_t *initialDownlinkBWP,
/// fixed: Format identifier 1, Hop flag 1, MCS 5, NDI 1, RV 2, HARQ PID 4, PUSCH TPC 2 Time Domain assgnmt 4 --20 /// fixed: Format identifier 1, Hop flag 1, MCS 5, NDI 1, RV 2, HARQ PID 4, PUSCH TPC 2 Time Domain assgnmt 4 --20
size += 20; size += 20;
size += (uint8_t)ceil( log2( (N_RB*(N_RB+1))>>1 ) ); // Freq domain assignment -- hopping scenario to be updated size += (uint8_t)ceil( log2( (N_RB*(N_RB+1))>>1 ) ); // Freq domain assignment -- hopping scenario to be updated
int dci_10_size = nr_dci_size(initialDownlinkBWP,initialUplinkBWP,cg,dci_pdu,NR_DL_DCI_FORMAT_1_0, rnti_type, N_RB, bwp_id, cset0_bwp_size); int dci_10_size = nr_dci_size(initialDownlinkBWP,initialUplinkBWP,cg,dci_pdu,NR_DL_DCI_FORMAT_1_0, rnti_type, N_RB, bwp_id, coreset_id, cset0_bwp_size);
AssertFatal(dci_10_size >= size, "NR_UL_DCI_FORMAT_0_0 size is bigger than NR_DL_DCI_FORMAT_1_0! 3GPP TS 38.212 Section 7.3.1.0: DCI size alignment is not fully implemented"); AssertFatal(dci_10_size >= size, "NR_UL_DCI_FORMAT_0_0 size is bigger than NR_DL_DCI_FORMAT_1_0! 3GPP TS 38.212 Section 7.3.1.0: DCI size alignment is not fully implemented");
size += dci_10_size - size; // Padding to match 1_0 size size += dci_10_size - size; // Padding to match 1_0 size
// UL/SUL indicator assumed to be 0 // UL/SUL indicator assumed to be 0
...@@ -3019,10 +3020,15 @@ uint16_t nr_dci_size(const NR_BWP_DownlinkCommon_t *initialDownlinkBWP, ...@@ -3019,10 +3020,15 @@ uint16_t nr_dci_size(const NR_BWP_DownlinkCommon_t *initialDownlinkBWP,
size += dci_pdu->antenna_ports.nbits; size += dci_pdu->antenna_ports.nbits;
LOG_D(NR_MAC,"dci_pdu->antenna_ports.nbits %d\n",dci_pdu->antenna_ports.nbits); LOG_D(NR_MAC,"dci_pdu->antenna_ports.nbits %d\n",dci_pdu->antenna_ports.nbits);
// Tx Config Indication // Tx Config Indication
long *isTciEnable = pdcch_Config->controlResourceSetToAddModList->list.array[0]->tci_PresentInDCI; for (int i = 0; i < pdcch_Config->controlResourceSetToAddModList->list.count; i++) {
if (isTciEnable != NULL) { if (pdcch_Config->controlResourceSetToAddModList->list.array[i]->controlResourceSetId == coreset_id) {
dci_pdu->transmission_configuration_indication.nbits = 3; long *isTciEnable = pdcch_Config->controlResourceSetToAddModList->list.array[i]->tci_PresentInDCI;
size += dci_pdu->transmission_configuration_indication.nbits; if (isTciEnable != NULL) {
dci_pdu->transmission_configuration_indication.nbits = 3;
size += dci_pdu->transmission_configuration_indication.nbits;
}
break;
}
} }
// SRS request // SRS request
if (cg->spCellConfig->spCellConfigDedicated->supplementaryUplink==NULL) if (cg->spCellConfig->spCellConfigDedicated->supplementaryUplink==NULL)
......
...@@ -55,6 +55,7 @@ uint16_t nr_dci_size(const NR_BWP_DownlinkCommon_t *initialDLBWP, ...@@ -55,6 +55,7 @@ uint16_t nr_dci_size(const NR_BWP_DownlinkCommon_t *initialDLBWP,
nr_rnti_type_t rnti_type, nr_rnti_type_t rnti_type,
uint16_t N_RB, uint16_t N_RB,
int bwp_id, int bwp_id,
NR_ControlResourceSetId_t coreset_id,
uint16_t cset0_bwp_size); uint16_t cset0_bwp_size);
void find_aggregation_candidates(uint8_t *aggregation_level, void find_aggregation_candidates(uint8_t *aggregation_level,
......
...@@ -434,19 +434,24 @@ void config_bwp_ue(NR_UE_MAC_INST_t *mac, uint16_t *bwp_ind, uint8_t *dci_format ...@@ -434,19 +434,24 @@ void config_bwp_ue(NR_UE_MAC_INST_t *mac, uint16_t *bwp_ind, uint8_t *dci_format
NR_ServingCellConfig_t *scd = mac->cg->spCellConfig->spCellConfigDedicated; NR_ServingCellConfig_t *scd = mac->cg->spCellConfig->spCellConfigDedicated;
if (bwp_ind && dci_format){ int n_ubwp = 0;
if (scd && scd->uplinkConfig &&
scd->uplinkConfig->uplinkBWP_ToAddModList)
n_ubwp = scd->uplinkConfig->uplinkBWP_ToAddModList->list.count;
if (bwp_ind && dci_format){
switch(*dci_format){ switch(*dci_format){
case NR_UL_DCI_FORMAT_0_1: case NR_UL_DCI_FORMAT_0_1:
mac->UL_BWP_Id = *bwp_ind; mac->UL_BWP_Id = n_ubwp < 4 ? *bwp_ind : *bwp_ind + 1;
break; break;
case NR_DL_DCI_FORMAT_1_1: case NR_DL_DCI_FORMAT_1_1:
mac->DL_BWP_Id = *bwp_ind; mac->DL_BWP_Id = n_ubwp < 4 ? *bwp_ind : *bwp_ind + 1;
break; break;
default: default:
LOG_E(MAC, "In %s: failed to configure BWP Id from DCI with format %d \n", __FUNCTION__, *dci_format); LOG_E(MAC, "In %s: failed to configure BWP Id from DCI with format %d \n", __FUNCTION__, *dci_format);
} }
// configure ss coreset after switching BWP
configure_ss_coreset(mac, scd, mac->DL_BWP_Id);
} else { } else {
if (scd->firstActiveDownlinkBWP_Id) if (scd->firstActiveDownlinkBWP_Id)
...@@ -474,82 +479,96 @@ void config_bwp_ue(NR_UE_MAC_INST_t *mac, uint16_t *bwp_ind, uint8_t *dci_format ...@@ -474,82 +479,96 @@ void config_bwp_ue(NR_UE_MAC_INST_t *mac, uint16_t *bwp_ind, uint8_t *dci_format
*/ */
void config_control_ue(NR_UE_MAC_INST_t *mac){ void config_control_ue(NR_UE_MAC_INST_t *mac){
uint8_t coreset_id = 1, ss_id; int bwp_id;
NR_BWP_Id_t dl_bwp_id = mac->DL_BWP_Id;
NR_BWP_Id_t ul_bwp_id = mac->UL_BWP_Id;
NR_ServingCellConfig_t *scd = mac->cg->spCellConfig->spCellConfigDedicated; NR_ServingCellConfig_t *scd = mac->cg->spCellConfig->spCellConfigDedicated;
if (dl_bwp_id==0) AssertFatal(mac->scc_SIB,"dl_bwp_id 0 (DL %d,UL %d) means mac->scc_SIB should exist here!\n",(int)mac->DL_BWP_Id,(int)mac->UL_BWP_Id); config_bwp_ue(mac, NULL, NULL);
NR_BWP_DownlinkCommon_t *bwp_Common = dl_bwp_id>0 ? scd->downlinkBWP_ToAddModList->list.array[dl_bwp_id - 1]->bwp_Common : NR_BWP_Id_t dl_bwp_id = mac->DL_BWP_Id;
&mac->scc_SIB->downlinkConfigCommon.initialDownlinkBWP;
// configure DLbwp
if (scd->downlinkBWP_ToAddModList) {
for (int i = 0; i < scd->downlinkBWP_ToAddModList->list.count; i++) {
bwp_id = scd->downlinkBWP_ToAddModList->list.array[i]->bwp_Id;
mac->DLbwp[bwp_id-1] = scd->downlinkBWP_ToAddModList->list.array[i];
}
}
if (dl_bwp_id > 0 ) { // configure ULbwp
AssertFatal(scd->downlinkBWP_ToAddModList != NULL, "downlinkBWP_ToAddModList is null\n"); if (scd->uplinkConfig->uplinkBWP_ToAddModList) {
AssertFatal(scd->downlinkBWP_ToAddModList->list.count == 1, "downlinkBWP_ToAddModList->list->count is %d\n", scd->downlinkBWP_ToAddModList->list.count); for (int i = 0; i < scd->uplinkConfig->uplinkBWP_ToAddModList->list.count; i++) {
bwp_id = scd->uplinkConfig->uplinkBWP_ToAddModList->list.array[i]->bwp_Id;
mac->ULbwp[bwp_id-1] = scd->uplinkConfig->uplinkBWP_ToAddModList->list.array[i];
}
} }
configure_ss_coreset(mac, scd, dl_bwp_id);
}
void configure_ss_coreset(NR_UE_MAC_INST_t *mac,
NR_ServingCellConfig_t *scd,
NR_BWP_Id_t dl_bwp_id) {
NR_BWP_DownlinkCommon_t *bwp_Common = get_bwp_downlink_common(mac, dl_bwp_id);
AssertFatal(bwp_Common != NULL, "bwp_Common is null\n");
NR_SetupRelease_PDCCH_ConfigCommon_t *pdcch_ConfigCommon = bwp_Common->pdcch_ConfigCommon;
AssertFatal(pdcch_ConfigCommon != NULL, "pdcch_ConfigCommon is null\n");
// configuring eventual common coreset
NR_ControlResourceSet_t *coreset = pdcch_ConfigCommon->choice.setup->commonControlResourceSet;
if (coreset)
mac->coreset[dl_bwp_id][coreset->controlResourceSetId - 1] = coreset;
NR_BWP_DownlinkDedicated_t *dl_bwp_Dedicated = dl_bwp_id>0 ? scd->downlinkBWP_ToAddModList->list.array[dl_bwp_id - 1]->bwp_Dedicated: NR_BWP_DownlinkDedicated_t *dl_bwp_Dedicated = dl_bwp_id>0 ? scd->downlinkBWP_ToAddModList->list.array[dl_bwp_id - 1]->bwp_Dedicated:
scd->initialDownlinkBWP; scd->initialDownlinkBWP;
AssertFatal(dl_bwp_Dedicated != NULL, "dl_bwp_Dedicated is null\n"); AssertFatal(dl_bwp_Dedicated != NULL, "dl_bwp_Dedicated is null\n");
config_bwp_ue(mac, NULL, NULL);
NR_SetupRelease_PDCCH_Config_t *pdcch_Config = dl_bwp_Dedicated->pdcch_Config; NR_SetupRelease_PDCCH_Config_t *pdcch_Config = dl_bwp_Dedicated->pdcch_Config;
AssertFatal(pdcch_Config != NULL, "pdcch_Config is null\n"); AssertFatal(pdcch_Config != NULL, "pdcch_Config is null\n");
NR_SetupRelease_PDCCH_ConfigCommon_t *pdcch_ConfigCommon = bwp_Common->pdcch_ConfigCommon;
AssertFatal(pdcch_ConfigCommon != NULL, "pdcch_ConfigCommon is null\n");
AssertFatal(pdcch_ConfigCommon->choice.setup->ra_SearchSpace != NULL, "ra_SearchSpace must be available in DL BWP\n");
struct NR_PDCCH_ConfigCommon__commonSearchSpaceList *commonSearchSpaceList = pdcch_ConfigCommon->choice.setup->commonSearchSpaceList;
AssertFatal(commonSearchSpaceList != NULL, "commonSearchSpaceList is null\n");
AssertFatal(commonSearchSpaceList->list.count > 0, "PDCCH CSS list has 0 elements\n");
struct NR_PDCCH_Config__controlResourceSetToAddModList *controlResourceSetToAddModList = pdcch_Config->choice.setup->controlResourceSetToAddModList; struct NR_PDCCH_Config__controlResourceSetToAddModList *controlResourceSetToAddModList = pdcch_Config->choice.setup->controlResourceSetToAddModList;
AssertFatal(controlResourceSetToAddModList != NULL, "controlResourceSetToAddModList is null\n"); AssertFatal(controlResourceSetToAddModList != NULL, "controlResourceSetToAddModList is null\n");
AssertFatal(controlResourceSetToAddModList->list.count == 1, "controlResourceSetToAddModList->list.count=%d\n", controlResourceSetToAddModList->list.count);
AssertFatal(controlResourceSetToAddModList->list.array[0] != NULL, "coreset[0][0] is null\n"); // configuring dedicated coreset
// In case network reconfigures control resource set with the same ControlResourceSetId as used for commonControlResourceSet configured via PDCCH-ConfigCommon,
// the configuration from PDCCH-Config always takes precedence
for (int i=0; i<controlResourceSetToAddModList->list.count; i++) {
coreset = controlResourceSetToAddModList->list.array[i];
mac->coreset[dl_bwp_id][coreset->controlResourceSetId - 1] = coreset;
}
struct NR_PDCCH_Config__searchSpacesToAddModList *searchSpacesToAddModList = pdcch_Config->choice.setup->searchSpacesToAddModList; struct NR_PDCCH_Config__searchSpacesToAddModList *searchSpacesToAddModList = pdcch_Config->choice.setup->searchSpacesToAddModList;
AssertFatal(searchSpacesToAddModList != NULL, "searchSpacesToAddModList is null\n"); AssertFatal(searchSpacesToAddModList != NULL, "searchSpacesToAddModList is null\n");
AssertFatal(searchSpacesToAddModList->list.count > 0, "list of UE specifically configured Search Spaces is empty\n"); AssertFatal(searchSpacesToAddModList->list.count > 0, "list of UE specifically configured Search Spaces is empty\n");
AssertFatal(searchSpacesToAddModList->list.count < FAPI_NR_MAX_SS, "too many searchpaces per coreset %d\n", searchSpacesToAddModList->list.count); AssertFatal(searchSpacesToAddModList->list.count < FAPI_NR_MAX_SS_PER_BWP, "too many searchpaces per coreset %d\n", searchSpacesToAddModList->list.count);
struct NR_UplinkConfig__uplinkBWP_ToAddModList *uplinkBWP_ToAddModList = scd->uplinkConfig->uplinkBWP_ToAddModList;
if (ul_bwp_id > 0) {
AssertFatal(uplinkBWP_ToAddModList != NULL, "uplinkBWP_ToAddModList is null\n");
AssertFatal(uplinkBWP_ToAddModList->list.count == 1, "uplinkBWP_ToAddModList->list->count is %d\n", uplinkBWP_ToAddModList->list.count);
}
// check pdcch_Config, pdcch_ConfigCommon and DL BWP
mac->DLbwp[0] = dl_bwp_id>0?scd->downlinkBWP_ToAddModList->list.array[dl_bwp_id - 1]:NULL;
mac->coreset[dl_bwp_id][coreset_id - 1] = controlResourceSetToAddModList->list.array[0];
// Check dedicated UL BWP and pass to MAC
mac->ULbwp[0] = ul_bwp_id>0?uplinkBWP_ToAddModList->list.array[0]:NULL;
if (mac->ULbwp[0]) AssertFatal(mac->ULbwp[0]->bwp_Dedicated != NULL, "UL bwp_Dedicated is null\n");
// check available Search Spaces in the searchSpacesToAddModList and pass to MAC // check available Search Spaces in the searchSpacesToAddModList and pass to MAC
// note: the network configures at most 10 Search Spaces per BWP per cell (including UE-specific and common Search Spaces). // note: the network configures at most 10 Search Spaces per BWP per cell (including UE-specific and common Search Spaces).
for (ss_id = 0; ss_id < searchSpacesToAddModList->list.count; ss_id++) { for (int ss_id = 0; ss_id < searchSpacesToAddModList->list.count; ss_id++) {
NR_SearchSpace_t *ss = searchSpacesToAddModList->list.array[ss_id]; NR_SearchSpace_t *ss = searchSpacesToAddModList->list.array[ss_id];
AssertFatal(ss->controlResourceSetId != NULL, "ss->controlResourceSetId is null\n"); AssertFatal(ss->controlResourceSetId != NULL, "ss->controlResourceSetId is null\n");
AssertFatal(ss->searchSpaceType != NULL, "ss->searchSpaceType is null\n"); AssertFatal(ss->searchSpaceType != NULL, "ss->searchSpaceType is null\n");
AssertFatal(*ss->controlResourceSetId == mac->coreset[dl_bwp_id][coreset_id - 1]->controlResourceSetId, "ss->controlResourceSetId is unknown\n");
AssertFatal(ss->monitoringSymbolsWithinSlot != NULL, "NR_SearchSpace->monitoringSymbolsWithinSlot is null\n"); AssertFatal(ss->monitoringSymbolsWithinSlot != NULL, "NR_SearchSpace->monitoringSymbolsWithinSlot is null\n");
AssertFatal(ss->monitoringSymbolsWithinSlot->buf != NULL, "NR_SearchSpace->monitoringSymbolsWithinSlot->buf is null\n"); AssertFatal(ss->monitoringSymbolsWithinSlot->buf != NULL, "NR_SearchSpace->monitoringSymbolsWithinSlot->buf is null\n");
mac->SSpace[dl_bwp_id][ss_id] = ss; AssertFatal(ss->searchSpaceId <= FAPI_NR_MAX_SS, "Invalid searchSpaceId\n");
mac->SSpace[dl_bwp_id][ss->searchSpaceId - 1] = ss;
} }
struct NR_PDCCH_ConfigCommon__commonSearchSpaceList *commonSearchSpaceList = pdcch_ConfigCommon->choice.setup->commonSearchSpaceList;
AssertFatal(commonSearchSpaceList != NULL, "commonSearchSpaceList is null\n");
AssertFatal(commonSearchSpaceList->list.count > 0, "PDCCH CSS list has 0 elements\n");
// Check available CSSs in the commonSearchSpaceList (list of additional common search spaces) // Check available CSSs in the commonSearchSpaceList (list of additional common search spaces)
// note: commonSearchSpaceList SIZE(1..4) // note: commonSearchSpaceList SIZE(1..4)
for (int css_id = 0; css_id < commonSearchSpaceList->list.count; css_id++) { for (int css_id = 0; css_id < commonSearchSpaceList->list.count; css_id++) {
NR_SearchSpace_t *css = commonSearchSpaceList->list.array[css_id]; NR_SearchSpace_t *css = commonSearchSpaceList->list.array[css_id];
AssertFatal(css->controlResourceSetId != NULL, "ss->controlResourceSetId is null\n"); AssertFatal(css->controlResourceSetId != NULL, "ss->controlResourceSetId is null\n");
AssertFatal(*css->controlResourceSetId == 0 || *css->controlResourceSetId == mac->coreset[dl_bwp_id][coreset_id - 1]->controlResourceSetId, "css->controlResourceSetId %ld is unknown, mac->coreset[%ld][%d]->controlResourceSetId %ld\n",*css->controlResourceSetId,dl_bwp_id,coreset_id-1,mac->coreset[dl_bwp_id][coreset_id - 1]->controlResourceSetId);
AssertFatal(css->searchSpaceType != NULL, "css->searchSpaceType is null\n"); AssertFatal(css->searchSpaceType != NULL, "css->searchSpaceType is null\n");
AssertFatal(css->monitoringSymbolsWithinSlot != NULL, "css->monitoringSymbolsWithinSlot is null\n"); AssertFatal(css->monitoringSymbolsWithinSlot != NULL, "css->monitoringSymbolsWithinSlot is null\n");
AssertFatal(css->monitoringSymbolsWithinSlot->buf != NULL, "css->monitoringSymbolsWithinSlot->buf is null\n"); AssertFatal(css->monitoringSymbolsWithinSlot->buf != NULL, "css->monitoringSymbolsWithinSlot->buf is null\n");
mac->SSpace[dl_bwp_id][ss_id] = css; AssertFatal(css->searchSpaceId <= FAPI_NR_MAX_SS, "Invalid searchSpaceId\n");
ss_id++; mac->SSpace[dl_bwp_id][css->searchSpaceId - 1] = css;
} }
} }
......
...@@ -74,7 +74,7 @@ ...@@ -74,7 +74,7 @@
// ========== // ==========
#define NB_NR_UE_MAC_INST 1 #define NB_NR_UE_MAC_INST 1
#define MAX_NUM_BWP 2 #define MAX_NUM_BWP_UE 4
#define NUM_SLOT_FRAME 10 #define NUM_SLOT_FRAME 10
/*!\brief value for indicating BSR Timer is not running */ /*!\brief value for indicating BSR Timer is not running */
...@@ -364,10 +364,10 @@ typedef struct { ...@@ -364,10 +364,10 @@ typedef struct {
NR_RNTI_Value_t *cs_RNTI; NR_RNTI_Value_t *cs_RNTI;
NR_MIB_t *mib; NR_MIB_t *mib;
NR_BWP_Downlink_t *DLbwp[MAX_NUM_BWP]; NR_BWP_Downlink_t *DLbwp[MAX_NUM_BWP_UE];
NR_BWP_Uplink_t *ULbwp[MAX_NUM_BWP]; NR_BWP_Uplink_t *ULbwp[MAX_NUM_BWP_UE];
NR_ControlResourceSet_t *coreset[MAX_NUM_BWP][FAPI_NR_MAX_CORESET_PER_BWP]; NR_ControlResourceSet_t *coreset[MAX_NUM_BWP_UE][FAPI_NR_MAX_CORESET_PER_BWP];
NR_SearchSpace_t *SSpace[MAX_NUM_BWP][FAPI_NR_MAX_SS]; NR_SearchSpace_t *SSpace[MAX_NUM_BWP_UE][FAPI_NR_MAX_SS];
frame_type_t frame_type; frame_type_t frame_type;
......
...@@ -260,6 +260,8 @@ void get_bwp_info(NR_UE_MAC_INST_t *mac, ...@@ -260,6 +260,8 @@ void get_bwp_info(NR_UE_MAC_INST_t *mac,
NR_BWP_UplinkDedicated_t **ubwpd, NR_BWP_UplinkDedicated_t **ubwpd,
NR_BWP_UplinkCommon_t **ubwpc); NR_BWP_UplinkCommon_t **ubwpc);
NR_BWP_DownlinkCommon_t *get_bwp_downlink_common(NR_UE_MAC_INST_t *mac, NR_BWP_Id_t dl_bwp_id);
uint8_t nr_extract_dci_info(NR_UE_MAC_INST_t *mac, uint8_t nr_extract_dci_info(NR_UE_MAC_INST_t *mac,
uint8_t dci_format, uint8_t dci_format,
uint8_t dci_length, uint8_t dci_length,
...@@ -452,6 +454,10 @@ void build_ssb_to_ro_map(NR_UE_MAC_INST_t *mac); ...@@ -452,6 +454,10 @@ void build_ssb_to_ro_map(NR_UE_MAC_INST_t *mac);
void config_bwp_ue(NR_UE_MAC_INST_t *mac, uint16_t *bwp_ind, uint8_t *dci_format); void config_bwp_ue(NR_UE_MAC_INST_t *mac, uint16_t *bwp_ind, uint8_t *dci_format);
void configure_ss_coreset(NR_UE_MAC_INST_t *mac,
NR_ServingCellConfig_t *scd,
NR_BWP_Id_t dl_bwp_id);
fapi_nr_ul_config_request_t *get_ul_config_request(NR_UE_MAC_INST_t *mac, int slot); fapi_nr_ul_config_request_t *get_ul_config_request(NR_UE_MAC_INST_t *mac, int slot);
void fill_ul_config(fapi_nr_ul_config_request_t *ul_config, frame_t frame_tx, int slot_tx, uint8_t pdu_type); void fill_ul_config(fapi_nr_ul_config_request_t *ul_config, frame_t frame_tx, int slot_tx, uint8_t pdu_type);
......
...@@ -94,10 +94,12 @@ void init_RA(module_id_t mod_id, ...@@ -94,10 +94,12 @@ void init_RA(module_id_t mod_id,
} }
} }
if (ss_id < 0) { if (ss_id < 0) {
ra_ss = mac->DLbwp[0]->bwp_Common->pdcch_ConfigCommon->choice.setup->ra_SearchSpace; if (mac->DL_BWP_Id>0) {
if (ra_ss) { ra_ss = mac->DLbwp[mac->DL_BWP_Id-1]->bwp_Common->pdcch_ConfigCommon->choice.setup->ra_SearchSpace;
commonSearchSpaceList = mac->DLbwp[0]->bwp_Common->pdcch_ConfigCommon->choice.setup->commonSearchSpaceList; if (ra_ss) {
ss_id = *mac->DLbwp[0]->bwp_Common->pdcch_ConfigCommon->choice.setup->ra_SearchSpace; commonSearchSpaceList = mac->DLbwp[mac->DL_BWP_Id-1]->bwp_Common->pdcch_ConfigCommon->choice.setup->commonSearchSpaceList;
ss_id = *mac->DLbwp[mac->DL_BWP_Id-1]->bwp_Common->pdcch_ConfigCommon->choice.setup->ra_SearchSpace;
}
} }
} }
} }
......
...@@ -80,7 +80,7 @@ void config_dci_pdu(NR_UE_MAC_INST_t *mac, fapi_nr_dl_config_dci_dl_pdu_rel15_t ...@@ -80,7 +80,7 @@ void config_dci_pdu(NR_UE_MAC_INST_t *mac, fapi_nr_dl_config_dci_dl_pdu_rel15_t
AssertFatal(mac->scc == NULL || mac->scc_SIB == NULL, "both scc and scc_SIB cannot be non-null\n"); AssertFatal(mac->scc == NULL || mac->scc_SIB == NULL, "both scc and scc_SIB cannot be non-null\n");
NR_BWP_Id_t bwp_id = mac->DL_BWP_Id; NR_BWP_Id_t dl_bwp_id = mac->DL_BWP_Id;
NR_ServingCellConfigCommon_t *scc = mac->scc; NR_ServingCellConfigCommon_t *scc = mac->scc;
NR_ServingCellConfigCommonSIB_t *scc_SIB = mac->scc_SIB; NR_ServingCellConfigCommonSIB_t *scc_SIB = mac->scc_SIB;
NR_BWP_DownlinkCommon_t *bwp_Common=NULL; NR_BWP_DownlinkCommon_t *bwp_Common=NULL;
...@@ -91,7 +91,7 @@ void config_dci_pdu(NR_UE_MAC_INST_t *mac, fapi_nr_dl_config_dci_dl_pdu_rel15_t ...@@ -91,7 +91,7 @@ void config_dci_pdu(NR_UE_MAC_INST_t *mac, fapi_nr_dl_config_dci_dl_pdu_rel15_t
initialDownlinkBWP = scc!=NULL ? scc->downlinkConfigCommon->initialDownlinkBWP : &scc_SIB->downlinkConfigCommon.initialDownlinkBWP; initialDownlinkBWP = scc!=NULL ? scc->downlinkConfigCommon->initialDownlinkBWP : &scc_SIB->downlinkConfigCommon.initialDownlinkBWP;
initialUplinkBWP = scc!=NULL ? scc->uplinkConfigCommon->initialUplinkBWP : &scc_SIB->uplinkConfigCommon->initialUplinkBWP; initialUplinkBWP = scc!=NULL ? scc->uplinkConfigCommon->initialUplinkBWP : &scc_SIB->uplinkConfigCommon->initialUplinkBWP;
} }
bwp_Common = bwp_id>0 ? mac->DLbwp[bwp_id-1]->bwp_Common : NULL; bwp_Common = dl_bwp_id>0 ? mac->DLbwp[dl_bwp_id-1]->bwp_Common : NULL;
NR_SearchSpace_t *ss; NR_SearchSpace_t *ss;
NR_ControlResourceSet_t *coreset; NR_ControlResourceSet_t *coreset;
...@@ -102,7 +102,7 @@ void config_dci_pdu(NR_UE_MAC_INST_t *mac, fapi_nr_dl_config_dci_dl_pdu_rel15_t ...@@ -102,7 +102,7 @@ void config_dci_pdu(NR_UE_MAC_INST_t *mac, fapi_nr_dl_config_dci_dl_pdu_rel15_t
ss_id,mac->ra.ss->searchSpaceId); ss_id,mac->ra.ss->searchSpaceId);
} }
else else
ss = mac->SSpace[bwp_id][ss_id]; ss = mac->SSpace[dl_bwp_id][ss_id-1];
} }
else else
ss = mac->search_space_zero; ss = mac->search_space_zero;
...@@ -110,7 +110,7 @@ void config_dci_pdu(NR_UE_MAC_INST_t *mac, fapi_nr_dl_config_dci_dl_pdu_rel15_t ...@@ -110,7 +110,7 @@ void config_dci_pdu(NR_UE_MAC_INST_t *mac, fapi_nr_dl_config_dci_dl_pdu_rel15_t
uint8_t coreset_id = *ss->controlResourceSetId; uint8_t coreset_id = *ss->controlResourceSetId;
if(coreset_id>0) { if(coreset_id>0) {
coreset = mac->coreset[bwp_id][coreset_id - 1]; coreset = mac->coreset[dl_bwp_id][coreset_id - 1];
rel15->coreset.CoreSetType = NFAPI_NR_CSET_CONFIG_PDCCH_CONFIG; rel15->coreset.CoreSetType = NFAPI_NR_CSET_CONFIG_PDCCH_CONFIG;
} else { } else {
coreset = mac->coreset0; coreset = mac->coreset0;
...@@ -169,7 +169,7 @@ void config_dci_pdu(NR_UE_MAC_INST_t *mac, fapi_nr_dl_config_dci_dl_pdu_rel15_t ...@@ -169,7 +169,7 @@ void config_dci_pdu(NR_UE_MAC_INST_t *mac, fapi_nr_dl_config_dci_dl_pdu_rel15_t
rel15->SubcarrierSpacing = bwp_Common->genericParameters.subcarrierSpacing; rel15->SubcarrierSpacing = bwp_Common->genericParameters.subcarrierSpacing;
} }
for (int i = 0; i < rel15->num_dci_options; i++) { for (int i = 0; i < rel15->num_dci_options; i++) {
rel15->dci_length_options[i] = nr_dci_size(initialDownlinkBWP,initialUplinkBWP, mac->cg, &mac->def_dci_pdu_rel15[rel15->dci_format_options[i]], rel15->dci_format_options[i], NR_RNTI_C, rel15->BWPSize, bwp_id, mac->type0_PDCCH_CSS_config.num_rbs); rel15->dci_length_options[i] = nr_dci_size(initialDownlinkBWP,initialUplinkBWP, mac->cg, &mac->def_dci_pdu_rel15[rel15->dci_format_options[i]], rel15->dci_format_options[i], NR_RNTI_C, rel15->BWPSize, dl_bwp_id, coreset_id, mac->type0_PDCCH_CSS_config.num_rbs);
} }
break; break;
case NR_RNTI_RA: case NR_RNTI_RA:
...@@ -185,7 +185,7 @@ void config_dci_pdu(NR_UE_MAC_INST_t *mac, fapi_nr_dl_config_dci_dl_pdu_rel15_t ...@@ -185,7 +185,7 @@ void config_dci_pdu(NR_UE_MAC_INST_t *mac, fapi_nr_dl_config_dci_dl_pdu_rel15_t
rel15->BWPStart = NRRIV2PRBOFFSET(bwp_Common->genericParameters.locationAndBandwidth, MAX_BWP_SIZE); rel15->BWPStart = NRRIV2PRBOFFSET(bwp_Common->genericParameters.locationAndBandwidth, MAX_BWP_SIZE);
} }
rel15->SubcarrierSpacing = initialDownlinkBWP->genericParameters.subcarrierSpacing; rel15->SubcarrierSpacing = initialDownlinkBWP->genericParameters.subcarrierSpacing;
rel15->dci_length_options[0] = nr_dci_size(initialDownlinkBWP,initialUplinkBWP, mac->cg, &mac->def_dci_pdu_rel15[rel15->dci_format_options[0]], rel15->dci_format_options[0], NR_RNTI_RA, rel15->BWPSize, bwp_id, mac->type0_PDCCH_CSS_config.num_rbs); rel15->dci_length_options[0] = nr_dci_size(initialDownlinkBWP,initialUplinkBWP, mac->cg, &mac->def_dci_pdu_rel15[rel15->dci_format_options[0]], rel15->dci_format_options[0], NR_RNTI_RA, rel15->BWPSize, dl_bwp_id, coreset_id, mac->type0_PDCCH_CSS_config.num_rbs);
break; break;
case NR_RNTI_P: case NR_RNTI_P:
break; break;
...@@ -200,7 +200,7 @@ void config_dci_pdu(NR_UE_MAC_INST_t *mac, fapi_nr_dl_config_dci_dl_pdu_rel15_t ...@@ -200,7 +200,7 @@ void config_dci_pdu(NR_UE_MAC_INST_t *mac, fapi_nr_dl_config_dci_dl_pdu_rel15_t
rel15->BWPStart = mac->type0_PDCCH_CSS_config.cset_start_rb; rel15->BWPStart = mac->type0_PDCCH_CSS_config.cset_start_rb;
rel15->SubcarrierSpacing = initialDownlinkBWP->genericParameters.subcarrierSpacing; rel15->SubcarrierSpacing = initialDownlinkBWP->genericParameters.subcarrierSpacing;
for (int i = 0; i < rel15->num_dci_options; i++) { for (int i = 0; i < rel15->num_dci_options; i++) {
rel15->dci_length_options[i] = nr_dci_size(initialDownlinkBWP,initialUplinkBWP, mac->cg, &mac->def_dci_pdu_rel15[rel15->dci_format_options[i]], rel15->dci_format_options[i], NR_RNTI_TC, rel15->BWPSize, bwp_id, mac->type0_PDCCH_CSS_config.num_rbs); rel15->dci_length_options[i] = nr_dci_size(initialDownlinkBWP,initialUplinkBWP, mac->cg, &mac->def_dci_pdu_rel15[rel15->dci_format_options[i]], rel15->dci_format_options[i], NR_RNTI_TC, rel15->BWPSize, dl_bwp_id, coreset_id, mac->type0_PDCCH_CSS_config.num_rbs);
} }
break; break;
case NR_RNTI_SP_CSI: case NR_RNTI_SP_CSI:
...@@ -223,7 +223,7 @@ void config_dci_pdu(NR_UE_MAC_INST_t *mac, fapi_nr_dl_config_dci_dl_pdu_rel15_t ...@@ -223,7 +223,7 @@ void config_dci_pdu(NR_UE_MAC_INST_t *mac, fapi_nr_dl_config_dci_dl_pdu_rel15_t
rel15->SubcarrierSpacing = mac->mib->subCarrierSpacingCommon + 2; rel15->SubcarrierSpacing = mac->mib->subCarrierSpacingCommon + 2;
for (int i = 0; i < rel15->num_dci_options; i++) { for (int i = 0; i < rel15->num_dci_options; i++) {
rel15->dci_length_options[i] = nr_dci_size(initialDownlinkBWP,initialUplinkBWP, mac->cg, &mac->def_dci_pdu_rel15[rel15->dci_format_options[i]], rel15->dci_format_options[i], NR_RNTI_SI, rel15->BWPSize, 0, mac->type0_PDCCH_CSS_config.num_rbs); rel15->dci_length_options[i] = nr_dci_size(initialDownlinkBWP,initialUplinkBWP, mac->cg, &mac->def_dci_pdu_rel15[rel15->dci_format_options[i]], rel15->dci_format_options[i], NR_RNTI_SI, rel15->BWPSize, 0, coreset_id, mac->type0_PDCCH_CSS_config.num_rbs);
} }
break; break;
case NR_RNTI_SFI: case NR_RNTI_SFI:
...@@ -273,11 +273,17 @@ void ue_dci_configuration(NR_UE_MAC_INST_t *mac, fapi_nr_dl_config_request_t *dl ...@@ -273,11 +273,17 @@ void ue_dci_configuration(NR_UE_MAC_INST_t *mac, fapi_nr_dl_config_request_t *dl
LOG_D(NR_MAC, "[DCI_CONFIG] ra_rnti %p (%x) crnti %p (%x) t_crnti %p (%x)\n", &ra->ra_rnti, ra->ra_rnti, &mac->crnti, mac->crnti, &ra->t_crnti, ra->t_crnti); LOG_D(NR_MAC, "[DCI_CONFIG] ra_rnti %p (%x) crnti %p (%x) t_crnti %p (%x)\n", &ra->ra_rnti, ra->ra_rnti, &mac->crnti, mac->crnti, &ra->t_crnti, ra->t_crnti);
// loop over all available SS for CORESET ID 1 // loop over all available SS for bwp_id
if (bwpd) { if (bwpd) {
for (ss_id = 0; ss_id < FAPI_NR_MAX_SS && mac->SSpace[bwp_id][ss_id] != NULL; ss_id++){ for (ss_id = 1; ss_id <= FAPI_NR_MAX_SS; ss_id++){
if(mac->SSpace[bwp_id][ss_id-1]==NULL) {
continue;
}
LOG_D(NR_MAC, "[DCI_CONFIG] ss_id %d\n",ss_id); LOG_D(NR_MAC, "[DCI_CONFIG] ss_id %d\n",ss_id);
NR_SearchSpace_t *ss = mac->SSpace[bwp_id][ss_id]; NR_SearchSpace_t *ss = mac->SSpace[bwp_id][ss_id-1];
AssertFatal(ss_id == ss->searchSpaceId,"SS IDs don't correspond\n");
fapi_nr_dl_config_dci_dl_pdu_rel15_t *rel15 = &dl_config->dl_config_list[dl_config->number_pdus].dci_config_pdu.dci_config_rel15; fapi_nr_dl_config_dci_dl_pdu_rel15_t *rel15 = &dl_config->dl_config_list[dl_config->number_pdus].dci_config_pdu.dci_config_rel15;
NR_SetupRelease_PDCCH_ConfigCommon_t *pdcch_ConfigCommon = bwp_Common->pdcch_ConfigCommon; NR_SetupRelease_PDCCH_ConfigCommon_t *pdcch_ConfigCommon = bwp_Common->pdcch_ConfigCommon;
struct NR_PhysicalCellGroupConfig *phy_cgc = mac->cg->physicalCellGroupConfig; struct NR_PhysicalCellGroupConfig *phy_cgc = mac->cg->physicalCellGroupConfig;
...@@ -285,15 +291,6 @@ void ue_dci_configuration(NR_UE_MAC_INST_t *mac, fapi_nr_dl_config_request_t *dl ...@@ -285,15 +291,6 @@ void ue_dci_configuration(NR_UE_MAC_INST_t *mac, fapi_nr_dl_config_request_t *dl
case NR_SearchSpace__searchSpaceType_PR_common: case NR_SearchSpace__searchSpaceType_PR_common:
// this is for CSSs, we use BWP common and pdcch_ConfigCommon // this is for CSSs, we use BWP common and pdcch_ConfigCommon
// Fetch configuration for searchSpaceZero
// note: The search space with the SearchSpaceId = 0 identifies the search space configured via PBCH (MIB) and in ServingCellConfigCommon (searchSpaceZero).
if (pdcch_ConfigCommon->choice.setup->searchSpaceZero){
if (pdcch_ConfigCommon->choice.setup->searchSpaceSIB1 == NULL){
pdcch_ConfigCommon->choice.setup->searchSpaceSIB1=calloc(1,sizeof(*pdcch_ConfigCommon->choice.setup->searchSpaceSIB1));
}
*pdcch_ConfigCommon->choice.setup->searchSpaceSIB1 = 0;
LOG_D(NR_MAC, "[DCI_CONFIG] Configure SearchSpace#0 of the initial BWP\n");
}
if (ss->searchSpaceType->choice.common->dci_Format0_0_AndFormat1_0){ if (ss->searchSpaceType->choice.common->dci_Format0_0_AndFormat1_0){
// check available SS IDs // check available SS IDs
if (pdcch_ConfigCommon->choice.setup->ra_SearchSpace){ if (pdcch_ConfigCommon->choice.setup->ra_SearchSpace){
...@@ -424,34 +421,18 @@ void ue_dci_configuration(NR_UE_MAC_INST_t *mac, fapi_nr_dl_config_request_t *dl ...@@ -424,34 +421,18 @@ void ue_dci_configuration(NR_UE_MAC_INST_t *mac, fapi_nr_dl_config_request_t *dl
AssertFatal(1==0,"Handle DCI searching when CellGroup without dedicated BWP\n"); AssertFatal(1==0,"Handle DCI searching when CellGroup without dedicated BWP\n");
} }
// Search space 0, CORESET ID 0 // Search space 0, CORESET ID 0
if (!get_softmodem_params()->nsa) {
NR_SetupRelease_PDCCH_ConfigCommon_t *pdcch_ConfigCommon = bwp_Common->pdcch_ConfigCommon;
if (pdcch_ConfigCommon &&
pdcch_ConfigCommon->choice.setup->searchSpaceSIB1 &&
!get_softmodem_params()->nsa) {
NR_SearchSpace_t *ss0 = mac->search_space_zero;
fapi_nr_dl_config_dci_dl_pdu_rel15_t *rel15 = &dl_config->dl_config_list[dl_config->number_pdus].dci_config_pdu.dci_config_rel15;
if (ss0->searchSpaceId == *pdcch_ConfigCommon->choice.setup->searchSpaceSIB1){
if( (frame%2 == mac->type0_PDCCH_CSS_config.sfn_c) && (slot == mac->type0_PDCCH_CSS_config.n_0) ){
rel15->num_dci_options = 1;
rel15->dci_format_options[0] = NR_DL_DCI_FORMAT_1_0;
config_dci_pdu(mac, rel15, dl_config, NR_RNTI_SI, -1);
fill_dci_search_candidates(ss0, rel15);
}
}
}
else if (!get_softmodem_params()->nsa) { // use coreset0/ss0
NR_SearchSpace_t *ss0 = mac->search_space_zero; NR_SearchSpace_t *ss0 = mac->search_space_zero;
if(ss0) { if(ss0) {
fapi_nr_dl_config_dci_dl_pdu_rel15_t *rel15 = &dl_config->dl_config_list[0].dci_config_pdu.dci_config_rel15; fapi_nr_dl_config_dci_dl_pdu_rel15_t *rel15 = &dl_config->dl_config_list[dl_config->number_pdus].dci_config_pdu.dci_config_rel15;
rel15->num_dci_options = 1; rel15->num_dci_options = 1;
rel15->dci_format_options[0] = NR_DL_DCI_FORMAT_1_0; rel15->dci_format_options[0] = NR_DL_DCI_FORMAT_1_0;
config_dci_pdu(mac, rel15, dl_config, NR_RNTI_C , -1); config_dci_pdu(mac,
rel15,
dl_config,
((frame%2==mac->type0_PDCCH_CSS_config.sfn_c)&&(slot==mac->type0_PDCCH_CSS_config.n_0)) ? NR_RNTI_SI : NR_RNTI_C,
-1);
fill_dci_search_candidates(ss0, rel15); fill_dci_search_candidates(ss0, rel15);
dl_config->number_pdus = 1;
} }
} }
} }
This diff is collapsed.
...@@ -466,7 +466,7 @@ int nr_mac_enable_ue_rrc_processing_timer(module_id_t Mod_idP, rnti_t rnti, NR_S ...@@ -466,7 +466,7 @@ int nr_mac_enable_ue_rrc_processing_timer(module_id_t Mod_idP, rnti_t rnti, NR_S
const uint16_t sf_ahead = 6/(0x01<<subcarrierSpacing) + ((6%(0x01<<subcarrierSpacing))>0); const uint16_t sf_ahead = 6/(0x01<<subcarrierSpacing) + ((6%(0x01<<subcarrierSpacing))>0);
const uint16_t sl_ahead = sf_ahead * (0x01<<subcarrierSpacing); const uint16_t sl_ahead = sf_ahead * (0x01<<subcarrierSpacing);
sched_ctrl->rrc_processing_timer = (rrc_reconfiguration_delay<<subcarrierSpacing) + sl_ahead; sched_ctrl->rrc_processing_timer = (rrc_reconfiguration_delay<<subcarrierSpacing) + sl_ahead;
LOG_I(NR_MAC, "Activating RRC processing timer for UE %d\n", UE_id); LOG_I(NR_MAC, "Activating RRC processing timer for UE %d with %d ms\n", UE_id, rrc_reconfiguration_delay);
return 0; return 0;
} }
......
...@@ -348,6 +348,8 @@ void gNB_dlsch_ulsch_scheduler(module_id_t module_idP, ...@@ -348,6 +348,8 @@ void gNB_dlsch_ulsch_scheduler(module_id_t module_idP,
nr_mac_update_timers(module_idP, frame, slot); nr_mac_update_timers(module_idP, frame, slot);
schedule_nr_bwp_switch(module_idP, frame, slot);
// This schedules MIB // This schedules MIB
schedule_nr_mib(module_idP, frame, slot); schedule_nr_mib(module_idP, frame, slot);
......
...@@ -552,6 +552,7 @@ void nr_fill_nfapi_dl_sib1_pdu(int Mod_idP, ...@@ -552,6 +552,7 @@ void nr_fill_nfapi_dl_sib1_pdu(int Mod_idP,
rnti_type, rnti_type,
pdsch_pdu_rel15->BWPSize, pdsch_pdu_rel15->BWPSize,
0, 0,
0,
gNB_mac->cset0_bwp_size); gNB_mac->cset0_bwp_size);
LOG_D(MAC,"BWPSize: %i\n", pdcch_pdu_rel15->BWPSize); LOG_D(MAC,"BWPSize: %i\n", pdcch_pdu_rel15->BWPSize);
......
...@@ -535,7 +535,6 @@ bool allocate_dl_retransmission(module_id_t module_id, ...@@ -535,7 +535,6 @@ bool allocate_dl_retransmission(module_id_t module_id,
int UE_id, int UE_id,
int current_harq_pid) { int current_harq_pid) {
gNB_MAC_INST *nr_mac = RC.nrmac[module_id]; gNB_MAC_INST *nr_mac = RC.nrmac[module_id];
const NR_ServingCellConfigCommon_t *scc = nr_mac->common_channels->ServingCellConfigCommon; const NR_ServingCellConfigCommon_t *scc = nr_mac->common_channels->ServingCellConfigCommon;
NR_UE_info_t *UE_info = &nr_mac->UE_info; NR_UE_info_t *UE_info = &nr_mac->UE_info;
...@@ -756,8 +755,7 @@ void pf_dl(module_id_t module_id, ...@@ -756,8 +755,7 @@ void pf_dl(module_id_t module_id,
/* retransmission */ /* retransmission */
if (sched_pdsch->dl_harq_pid >= 0) { if (sched_pdsch->dl_harq_pid >= 0) {
/* Allocate retransmission */ /* Allocate retransmission */
bool r = allocate_dl_retransmission( bool r = allocate_dl_retransmission(module_id, frame, slot, rballoc_mask, &n_rb_sched, UE_id, sched_pdsch->dl_harq_pid);
module_id, frame, slot, rballoc_mask, &n_rb_sched, UE_id, sched_pdsch->dl_harq_pid);
if (!r) { if (!r) {
LOG_D(NR_MAC, "%4d.%2d retransmission can NOT be allocated\n", frame, slot); LOG_D(NR_MAC, "%4d.%2d retransmission can NOT be allocated\n", frame, slot);
...@@ -998,7 +996,6 @@ void nr_fr1_dlsch_preprocessor(module_id_t module_id, frame_t frame, sub_frame_t ...@@ -998,7 +996,6 @@ void nr_fr1_dlsch_preprocessor(module_id_t module_id, frame_t frame, sub_frame_t
const int startSymbolAndLength = tdaList->list.array[tda]->startSymbolAndLength; const int startSymbolAndLength = tdaList->list.array[tda]->startSymbolAndLength;
SLIV2SL(startSymbolAndLength, &startSymbolIndex, &nrOfSymbols); SLIV2SL(startSymbolAndLength, &startSymbolIndex, &nrOfSymbols);
const NR_SIB1_t *sib1 = RC.nrmac[module_id]->common_channels[0].sib1 ? RC.nrmac[module_id]->common_channels[0].sib1->message.choice.c1->choice.systemInformationBlockType1 : NULL; const NR_SIB1_t *sib1 = RC.nrmac[module_id]->common_channels[0].sib1 ? RC.nrmac[module_id]->common_channels[0].sib1->message.choice.c1->choice.systemInformationBlockType1 : NULL;
NR_BWP_t *genericParameters = get_dl_bwp_genericParameters(sched_ctrl->active_bwp, NR_BWP_t *genericParameters = get_dl_bwp_genericParameters(sched_ctrl->active_bwp,
RC.nrmac[module_id]->common_channels[0].ServingCellConfigCommon, RC.nrmac[module_id]->common_channels[0].ServingCellConfigCommon,
...@@ -1026,9 +1023,9 @@ void nr_fr1_dlsch_preprocessor(module_id_t module_id, frame_t frame, sub_frame_t ...@@ -1026,9 +1023,9 @@ void nr_fr1_dlsch_preprocessor(module_id_t module_id, frame_t frame, sub_frame_t
rballoc_mask[i] = (~vrb_map[i+BWPStart])&0x3fff; //bitwise not and 14 symbols rballoc_mask[i] = (~vrb_map[i+BWPStart])&0x3fff; //bitwise not and 14 symbols
// if all the pdsch symbols are free // if all the pdsch symbols are free
if((rballoc_mask[i]&slbitmap) == if ((rballoc_mask[i]&slbitmap) == slbitmap) {
slbitmap)
n_rb_sched++; n_rb_sched++;
}
} }
/* Retrieve amount of data to send for this UE */ /* Retrieve amount of data to send for this UE */
...@@ -1186,7 +1183,7 @@ void nr_schedule_ue_spec(module_id_t module_id, ...@@ -1186,7 +1183,7 @@ void nr_schedule_ue_spec(module_id_t module_id,
NR_SearchSpace_t *ss = (bwp||bwpd) ? sched_ctrl->search_space : gNB_mac->sched_ctrlCommon->search_space; NR_SearchSpace_t *ss = (bwp||bwpd) ? sched_ctrl->search_space : gNB_mac->sched_ctrlCommon->search_space;
const int bwpid = bwp ? bwp->bwp_Id : 0; const int bwp_id = bwp ? bwp->bwp_Id : 0;
const int coresetid = (bwp||bwpd) ? sched_ctrl->coreset->controlResourceSetId : gNB_mac->sched_ctrlCommon->coreset->controlResourceSetId; const int coresetid = (bwp||bwpd) ? sched_ctrl->coreset->controlResourceSetId : gNB_mac->sched_ctrlCommon->coreset->controlResourceSetId;
/* look up the PDCCH PDU for this CC, BWP, and CORESET. If it does not exist, create it */ /* look up the PDCCH PDU for this CC, BWP, and CORESET. If it does not exist, create it */
...@@ -1200,7 +1197,7 @@ void nr_schedule_ue_spec(module_id_t module_id, ...@@ -1200,7 +1197,7 @@ void nr_schedule_ue_spec(module_id_t module_id,
dl_tti_pdcch_pdu->PDUSize = (uint8_t)(2+sizeof(nfapi_nr_dl_tti_pdcch_pdu)); dl_tti_pdcch_pdu->PDUSize = (uint8_t)(2+sizeof(nfapi_nr_dl_tti_pdcch_pdu));
dl_req->nPDUs += 1; dl_req->nPDUs += 1;
pdcch_pdu = &dl_tti_pdcch_pdu->pdcch_pdu.pdcch_pdu_rel15; pdcch_pdu = &dl_tti_pdcch_pdu->pdcch_pdu.pdcch_pdu_rel15;
LOG_D(NR_MAC,"Trying to configure DL pdcch for UE %d, bwp %d, cs %d\n",UE_id,bwpid,coresetid); LOG_D(NR_MAC,"Trying to configure DL pdcch for UE %d, bwp %d, cs %d\n",UE_id,bwp_id,coresetid);
NR_ControlResourceSet_t *coreset = (bwp||bwpd)? sched_ctrl->coreset:gNB_mac->sched_ctrlCommon->coreset; NR_ControlResourceSet_t *coreset = (bwp||bwpd)? sched_ctrl->coreset:gNB_mac->sched_ctrlCommon->coreset;
nr_configure_pdcch(pdcch_pdu, coreset, genericParameters, &sched_ctrl->sched_pdcch); nr_configure_pdcch(pdcch_pdu, coreset, genericParameters, &sched_ctrl->sched_pdcch);
gNB_mac->pdcch_pdu_idx[CC_id][coresetid] = pdcch_pdu; gNB_mac->pdcch_pdu_idx[CC_id][coresetid] = pdcch_pdu;
...@@ -1335,18 +1332,17 @@ void nr_schedule_ue_spec(module_id_t module_id, ...@@ -1335,18 +1332,17 @@ void nr_schedule_ue_spec(module_id_t module_id,
memset(&dci_payload, 0, sizeof(dci_pdu_rel15_t)); memset(&dci_payload, 0, sizeof(dci_pdu_rel15_t));
// bwp indicator // bwp indicator
const int n_dl_bwp = bwp ? cg->spCellConfig->spCellConfigDedicated->downlinkBWP_ToAddModList->list.count : 0; const int n_dl_bwp = bwp ? cg->spCellConfig->spCellConfigDedicated->downlinkBWP_ToAddModList->list.count : 0;
AssertFatal(n_dl_bwp <= 1, "downlinkBWP_ToAddModList has %d BWP!\n", n_dl_bwp); AssertFatal(n_dl_bwp <= NR_MAX_NUM_BWP, "downlinkBWP_ToAddModList has %d BWP!\n", n_dl_bwp);
// as per table 7.3.1.1.2-1 in 38.212 // as per table 7.3.1.1.2-1 in 38.212
dci_payload.bwp_indicator.val = bwp ? (n_dl_bwp < 4 ? bwp->bwp_Id : bwp->bwp_Id - 1) : 0; dci_payload.bwp_indicator.val = bwp ? (n_dl_bwp < 4 ? bwp->bwp_Id : bwp->bwp_Id - 1) : 0;
if (bwp) AssertFatal(bwp->bwp_Dedicated->pdsch_Config->choice.setup->resourceAllocation == NR_PDSCH_Config__resourceAllocation_resourceAllocationType1, if (bwp) AssertFatal(bwp->bwp_Dedicated->pdsch_Config->choice.setup->resourceAllocation == NR_PDSCH_Config__resourceAllocation_resourceAllocationType1,
"Only frequency resource allocation type 1 is currently supported\n"); "Only frequency resource allocation type 1 is currently supported\n");
dci_payload.frequency_domain_assignment.val = dci_payload.frequency_domain_assignment.val = PRBalloc_to_locationandbandwidth0(pdsch_pdu->rbSize,
PRBalloc_to_locationandbandwidth0( pdsch_pdu->rbStart,
pdsch_pdu->rbSize, pdsch_pdu->BWPSize);
pdsch_pdu->rbStart,
pdsch_pdu->BWPSize);
dci_payload.format_indicator = 1; dci_payload.format_indicator = 1;
dci_payload.time_domain_assignment.val = ps->time_domain_allocation; dci_payload.time_domain_assignment.val = ps->time_domain_allocation;
dci_payload.mcs = sched_pdsch->mcs; dci_payload.mcs = sched_pdsch->mcs;
...@@ -1378,7 +1374,6 @@ void nr_schedule_ue_spec(module_id_t module_id, ...@@ -1378,7 +1374,6 @@ void nr_schedule_ue_spec(module_id_t module_id,
dci_payload.tpc, dci_payload.tpc,
pucch->timing_indicator); pucch->timing_indicator);
int dci_format = ss && ss->searchSpaceType && ss->searchSpaceType->present == NR_SearchSpace__searchSpaceType_PR_ue_Specific ? int dci_format = ss && ss->searchSpaceType && ss->searchSpaceType->present == NR_SearchSpace__searchSpaceType_PR_ue_Specific ?
NR_DL_DCI_FORMAT_1_1 : NR_DL_DCI_FORMAT_1_0; NR_DL_DCI_FORMAT_1_1 : NR_DL_DCI_FORMAT_1_0;
...@@ -1390,7 +1385,8 @@ void nr_schedule_ue_spec(module_id_t module_id, ...@@ -1390,7 +1385,8 @@ void nr_schedule_ue_spec(module_id_t module_id,
dci_format, dci_format,
rnti_type, rnti_type,
pdsch_pdu->BWPSize, pdsch_pdu->BWPSize,
bwp? bwp->bwp_Id : 0, bwp ? bwp->bwp_Id : 0,
coresetid,
gNB_mac->cset0_bwp_size); gNB_mac->cset0_bwp_size);
LOG_D(NR_MAC, LOG_D(NR_MAC,
......
...@@ -284,6 +284,7 @@ void nr_preprocessor_phytest(module_id_t module_id, ...@@ -284,6 +284,7 @@ void nr_preprocessor_phytest(module_id_t module_id,
/* find largest unallocated chunk */ /* find largest unallocated chunk */
const int bwpSize = NRRIV2BW(sched_ctrl->active_bwp->bwp_Common->genericParameters.locationAndBandwidth, MAX_BWP_SIZE); const int bwpSize = NRRIV2BW(sched_ctrl->active_bwp->bwp_Common->genericParameters.locationAndBandwidth, MAX_BWP_SIZE);
const int BWPStart = NRRIV2PRBOFFSET(sched_ctrl->active_bwp->bwp_Common->genericParameters.locationAndBandwidth, MAX_BWP_SIZE); const int BWPStart = NRRIV2PRBOFFSET(sched_ctrl->active_bwp->bwp_Common->genericParameters.locationAndBandwidth, MAX_BWP_SIZE);
int rbStart = 0; int rbStart = 0;
int rbSize = 0; int rbSize = 0;
if (target_dl_bw>bwpSize) if (target_dl_bw>bwpSize)
......
...@@ -51,7 +51,7 @@ void nr_fill_nfapi_pucch(module_id_t mod_id, ...@@ -51,7 +51,7 @@ void nr_fill_nfapi_pucch(module_id_t mod_id,
&RC.nrmac[mod_id]->UL_tti_req_ahead[0][pucch->ul_slot]; &RC.nrmac[mod_id]->UL_tti_req_ahead[0][pucch->ul_slot];
AssertFatal(future_ul_tti_req->SFN == pucch->frame AssertFatal(future_ul_tti_req->SFN == pucch->frame
&& future_ul_tti_req->Slot == pucch->ul_slot, && future_ul_tti_req->Slot == pucch->ul_slot,
"Current %d.%d : future UL_tti_req's frame.slot %4d.%2d does not match PUCCH %4d.%2d\n", "Current %4d.%2d : future UL_tti_req's frame.slot %4d.%2d does not match PUCCH %4d.%2d\n",
frame,slot, frame,slot,
future_ul_tti_req->SFN, future_ul_tti_req->SFN,
future_ul_tti_req->Slot, future_ul_tti_req->Slot,
...@@ -721,16 +721,15 @@ void nr_csi_meas_reporting(int Mod_idP, ...@@ -721,16 +721,15 @@ void nr_csi_meas_reporting(int Mod_idP,
NR_PUCCH_Config_t *pucch_Config = NULL; NR_PUCCH_Config_t *pucch_Config = NULL;
if (sched_ctrl->active_ubwp) { if (sched_ctrl->active_ubwp) {
pucch_Config = sched_ctrl->active_ubwp->bwp_Dedicated->pucch_Config->choice.setup; pucch_Config = sched_ctrl->active_ubwp->bwp_Dedicated->pucch_Config->choice.setup;
} else if (RC.nrmac[Mod_idP]->UE_info.CellGroup[UE_id] && } else if (CellGroup &&
RC.nrmac[Mod_idP]->UE_info.CellGroup[UE_id]->spCellConfig && CellGroup->spCellConfig &&
RC.nrmac[Mod_idP]->UE_info.CellGroup[UE_id]->spCellConfig->spCellConfigDedicated && CellGroup->spCellConfig->spCellConfigDedicated &&
RC.nrmac[Mod_idP]->UE_info.CellGroup[UE_id]->spCellConfig->spCellConfigDedicated->uplinkConfig && CellGroup->spCellConfig->spCellConfigDedicated->uplinkConfig &&
RC.nrmac[Mod_idP]->UE_info.CellGroup[UE_id]->spCellConfig->spCellConfigDedicated->uplinkConfig->initialUplinkBWP && CellGroup->spCellConfig->spCellConfigDedicated->uplinkConfig->initialUplinkBWP &&
RC.nrmac[Mod_idP]->UE_info.CellGroup[UE_id]->spCellConfig->spCellConfigDedicated->uplinkConfig->initialUplinkBWP->pucch_Config->choice.setup) { CellGroup->spCellConfig->spCellConfigDedicated->uplinkConfig->initialUplinkBWP->pucch_Config->choice.setup) {
pucch_Config = RC.nrmac[Mod_idP]->UE_info.CellGroup[UE_id]->spCellConfig->spCellConfigDedicated->uplinkConfig->initialUplinkBWP->pucch_Config->choice.setup; pucch_Config = CellGroup->spCellConfig->spCellConfigDedicated->uplinkConfig->initialUplinkBWP->pucch_Config->choice.setup;
} }
for (int csi_report_id = 0; csi_report_id < csi_measconfig->csi_ReportConfigToAddModList->list.count; csi_report_id++){ for (int csi_report_id = 0; csi_report_id < csi_measconfig->csi_ReportConfigToAddModList->list.count; csi_report_id++){
NR_CSI_ReportConfig_t *csirep = csi_measconfig->csi_ReportConfigToAddModList->list.array[csi_report_id]; NR_CSI_ReportConfig_t *csirep = csi_measconfig->csi_ReportConfigToAddModList->list.array[csi_report_id];
...@@ -881,9 +880,8 @@ int checkTargetSSBInTCIStates_pdcchConfig(int ssb_index_t, int Mod_idP, int UE_i ...@@ -881,9 +880,8 @@ int checkTargetSSBInTCIStates_pdcchConfig(int ssb_index_t, int Mod_idP, int UE_i
int nb_tci_states = CellGroup->spCellConfig->spCellConfigDedicated->initialDownlinkBWP->pdsch_Config->choice.setup->tci_StatesToAddModList->list.count; int nb_tci_states = CellGroup->spCellConfig->spCellConfigDedicated->initialDownlinkBWP->pdsch_Config->choice.setup->tci_StatesToAddModList->list.count;
NR_TCI_State_t *tci =NULL; NR_TCI_State_t *tci =NULL;
NR_TCI_StateId_t *tci_id = NULL; NR_TCI_StateId_t *tci_id = NULL;
int bwp_id = 1; NR_UE_sched_ctrl_t *sched_ctrl = &UE_info->UE_sched_ctrl[UE_id];
NR_BWP_Downlink_t *bwp = CellGroup->spCellConfig->spCellConfigDedicated->downlinkBWP_ToAddModList->list.array[bwp_id-1]; NR_ControlResourceSet_t *coreset = sched_ctrl->coreset;
NR_ControlResourceSet_t *coreset = bwp->bwp_Dedicated->pdcch_Config->choice.setup->controlResourceSetToAddModList->list.array[bwp_id-1];
int i; int i;
int flag = 0; int flag = 0;
int tci_stateID = -1; int tci_stateID = -1;
...@@ -951,18 +949,15 @@ void tci_handling(module_id_t Mod_idP, int UE_id, frame_t frame, slot_t slot) { ...@@ -951,18 +949,15 @@ void tci_handling(module_id_t Mod_idP, int UE_id, frame_t frame, slot_t slot) {
uint8_t idx = 0; uint8_t idx = 0;
NR_UE_info_t *UE_info = &RC.nrmac[Mod_idP]->UE_info; NR_UE_info_t *UE_info = &RC.nrmac[Mod_idP]->UE_info;
NR_UE_sched_ctrl_t *sched_ctrl = &UE_info->UE_sched_ctrl[UE_id]; NR_UE_sched_ctrl_t *sched_ctrl = &UE_info->UE_sched_ctrl[UE_id];
int bwp_id = sched_ctrl->active_bwp ? 1 : 0; const int bwp_id = sched_ctrl->active_bwp ? sched_ctrl->active_bwp->bwp_Id : 0;
NR_CellGroupConfig_t *CellGroup = UE_info->CellGroup[UE_id]; NR_CellGroupConfig_t *CellGroup = UE_info->CellGroup[UE_id];
NR_BWP_Downlink_t *bwp = bwp_id>0 ?
sched_ctrl->active_bwp:
NULL;
//bwp indicator //bwp indicator
int n_dl_bwp=0; int n_dl_bwp=0;
if (CellGroup->spCellConfig->spCellConfigDedicated && if (CellGroup->spCellConfig &&
CellGroup->spCellConfig->spCellConfigDedicated &&
CellGroup->spCellConfig->spCellConfigDedicated->downlinkBWP_ToAddModList) CellGroup->spCellConfig->spCellConfigDedicated->downlinkBWP_ToAddModList)
n_dl_bwp = CellGroup->spCellConfig->spCellConfigDedicated->downlinkBWP_ToAddModList->list.count; n_dl_bwp = CellGroup->spCellConfig->spCellConfigDedicated->downlinkBWP_ToAddModList->list.count;
uint8_t nr_ssbri_cri = 0; uint8_t nr_ssbri_cri = 0;
uint8_t nb_of_csi_ssb_report = UE_info->csi_report_template[UE_id][cqi_idx].nb_of_csi_ssb_report; uint8_t nb_of_csi_ssb_report = UE_info->csi_report_template[UE_id][cqi_idx].nb_of_csi_ssb_report;
...@@ -1085,10 +1080,8 @@ void tci_handling(module_id_t Mod_idP, int UE_id, frame_t frame, slot_t slot) { ...@@ -1085,10 +1080,8 @@ void tci_handling(module_id_t Mod_idP, int UE_id, frame_t frame, slot_t slot) {
} }
} }
sched_ctrl->UE_mac_ce_ctrl.pdcch_state_ind.tci_present_inDCI = bwp ? sched_ctrl->UE_mac_ce_ctrl.pdcch_state_ind.tci_present_inDCI = sched_ctrl->coreset ?
bwp->bwp_Dedicated->pdcch_Config->choice.setup->controlResourceSetToAddModList->list.array[bwp_id-1]->tci_PresentInDCI : sched_ctrl->coreset->tci_PresentInDCI : NULL;
CellGroup->spCellConfig->spCellConfigDedicated->initialDownlinkBWP->pdcch_Config->choice.setup->controlResourceSetToAddModList->list.array[0]->tci_PresentInDCI;
//filling pdsch tci state activation deactivation mac ce structure fields //filling pdsch tci state activation deactivation mac ce structure fields
if(sched_ctrl->UE_mac_ce_ctrl.pdcch_state_ind.tci_present_inDCI) { if(sched_ctrl->UE_mac_ce_ctrl.pdcch_state_ind.tci_present_inDCI) {
...@@ -1677,10 +1670,10 @@ int nr_acknack_scheduling(int mod_id, ...@@ -1677,10 +1670,10 @@ int nr_acknack_scheduling(int mod_id,
const int f = pucch->frame; const int f = pucch->frame;
const int s = pucch->ul_slot; const int s = pucch->ul_slot;
LOG_D(NR_MAC, "In %s: %4d.%2d DAI = 2 pucch currently in %4d.%2d, advancing by 1 slot\n", __FUNCTION__, frame, slot, f, s); LOG_D(NR_MAC, "In %s: %4d.%2d DAI = 2 pucch currently in %4d.%2d, advancing by 1 slot\n", __FUNCTION__, frame, slot, f, s);
if (!(csi_pucch if (!(csi_pucch
&& csi_pucch->csi_bits > 0 && csi_pucch->csi_bits > 0
&& csi_pucch->frame == f && csi_pucch->frame == f
&& csi_pucch->ul_slot == s)) && csi_pucch->ul_slot == s))
nr_fill_nfapi_pucch(mod_id, frame, slot, pucch, UE_id); nr_fill_nfapi_pucch(mod_id, frame, slot, pucch, UE_id);
memset(pucch, 0, sizeof(*pucch)); memset(pucch, 0, sizeof(*pucch));
pucch->frame = s == n_slots_frame - 1 ? (f + 1) % 1024 : f; pucch->frame = s == n_slots_frame - 1 ? (f + 1) % 1024 : f;
...@@ -1692,7 +1685,7 @@ int nr_acknack_scheduling(int mod_id, ...@@ -1692,7 +1685,7 @@ int nr_acknack_scheduling(int mod_id,
// skip the CSI PUCCH if it is present and if in the next frame/slot // skip the CSI PUCCH if it is present and if in the next frame/slot
// and if we don't multiplex // and if we don't multiplex
csi_pucch->r_pucch=-1; csi_pucch->r_pucch=-1;
if (csi_pucch if (csi_pucch
&& csi_pucch->csi_bits > 0 && csi_pucch->csi_bits > 0
&& csi_pucch->frame == pucch->frame && csi_pucch->frame == pucch->frame
&& csi_pucch->ul_slot == pucch->ul_slot && csi_pucch->ul_slot == pucch->ul_slot
...@@ -1722,11 +1715,10 @@ int nr_acknack_scheduling(int mod_id, ...@@ -1722,11 +1715,10 @@ int nr_acknack_scheduling(int mod_id,
NR_SearchSpace__searchSpaceType_PR ss_type = (is_common==0 && (sched_ctrl->active_bwp || ubwpd)) ? NR_SearchSpace__searchSpaceType_PR_ue_Specific: NR_SearchSpace__searchSpaceType_PR_common; NR_SearchSpace__searchSpaceType_PR ss_type = (is_common==0 && (sched_ctrl->active_bwp || ubwpd)) ? NR_SearchSpace__searchSpaceType_PR_ue_Specific: NR_SearchSpace__searchSpaceType_PR_common;
uint8_t pdsch_to_harq_feedback[8]; uint8_t pdsch_to_harq_feedback[8];
int bwp_Id = 0; const int bwp_id = sched_ctrl->active_bwp ? sched_ctrl->active_bwp->bwp_Id : 0;
if (sched_ctrl->active_ubwp) bwp_Id = sched_ctrl->active_ubwp->bwp_Id;
int max_fb_time = 0; int max_fb_time = 0;
get_pdsch_to_harq_feedback(mod_id, UE_id, bwp_Id, ss_type, &max_fb_time, pdsch_to_harq_feedback); get_pdsch_to_harq_feedback(mod_id, UE_id, bwp_id, ss_type, &max_fb_time, pdsch_to_harq_feedback);
LOG_D(NR_MAC, "In %s: 1b. DL %4d.%2d, UL_ACK %4d.%2d, DAI_C %d\n", __FUNCTION__, frame,slot,pucch->frame,pucch->ul_slot,pucch->dai_c); LOG_D(NR_MAC, "In %s: 1b. DL %4d.%2d, UL_ACK %4d.%2d, DAI_C %d\n", __FUNCTION__, frame,slot,pucch->frame,pucch->ul_slot,pucch->dai_c);
/* there is a HARQ. Check whether we can use it for this ACKNACK */ /* there is a HARQ. Check whether we can use it for this ACKNACK */
......
...@@ -58,7 +58,7 @@ void calculate_preferred_ul_tda(module_id_t module_id, const NR_BWP_Uplink_t *ub ...@@ -58,7 +58,7 @@ void calculate_preferred_ul_tda(module_id_t module_id, const NR_BWP_Uplink_t *ub
frame_type_t frame_type = nrmac->common_channels->frame_type; frame_type_t frame_type = nrmac->common_channels->frame_type;
const int n = nr_slots_per_frame[*scc->ssbSubcarrierSpacing]; const int n = nr_slots_per_frame[*scc->ssbSubcarrierSpacing];
NR_ServingCellConfigCommonSIB_t *scc_sib1 = get_softmodem_params()->sa ? NR_ServingCellConfigCommonSIB_t *scc_sib1 = nrmac->common_channels[0].sib1 ?
RC.nrmac[module_id]->common_channels[0].sib1->message.choice.c1->choice.systemInformationBlockType1->servingCellConfigCommon : NULL; RC.nrmac[module_id]->common_channels[0].sib1->message.choice.c1->choice.systemInformationBlockType1->servingCellConfigCommon : NULL;
AssertFatal(scc!=NULL || scc_sib1!=NULL,"We need one serving cell config common\n"); AssertFatal(scc!=NULL || scc_sib1!=NULL,"We need one serving cell config common\n");
...@@ -1421,7 +1421,6 @@ void pf_ul(module_id_t module_id, ...@@ -1421,7 +1421,6 @@ void pf_ul(module_id_t module_id,
} }
else LOG_D(NR_MAC,"allocating UL data for UE %d/RNTI %04x (rbStsart %d, min_rb %d, bwpSize %d\n",UE_id, UE_info->rnti[UE_id],rbStart,min_rb,bwpSize); else LOG_D(NR_MAC,"allocating UL data for UE %d/RNTI %04x (rbStsart %d, min_rb %d, bwpSize %d\n",UE_id, UE_info->rnti[UE_id],rbStart,min_rb,bwpSize);
/* Calculate the current scheduling bytes and the necessary RBs */ /* Calculate the current scheduling bytes and the necessary RBs */
const int B = cmax(sched_ctrl->estimated_ul_buffer - sched_ctrl->sched_ul_bytes, 0); const int B = cmax(sched_ctrl->estimated_ul_buffer - sched_ctrl->sched_ul_bytes, 0);
uint16_t rbSize = 0; uint16_t rbSize = 0;
...@@ -1487,7 +1486,7 @@ bool nr_fr1_ulsch_preprocessor(module_id_t module_id, frame_t frame, sub_frame_t ...@@ -1487,7 +1486,7 @@ bool nr_fr1_ulsch_preprocessor(module_id_t module_id, frame_t frame, sub_frame_t
if (tda < 0) if (tda < 0)
return false; return false;
int K2 = get_K2(scc, scc_sib1, sched_ctrl->active_ubwp, tda, mu); int K2 = get_K2(scc, scc_sib1, sched_ctrl->active_ubwp, tda, mu);
const int sched_frame = (frame + (slot + K2 >= nr_slots_per_frame[mu])) % 1024; const int sched_frame = (frame + (slot + K2 >= nr_slots_per_frame[mu])) & 1023;
const int sched_slot = (slot + K2) % nr_slots_per_frame[mu]; const int sched_slot = (slot + K2) % nr_slots_per_frame[mu];
if (!is_xlsch_in_slot(nr_mac->ulsch_slot_bitmap[sched_slot / 64], sched_slot)) if (!is_xlsch_in_slot(nr_mac->ulsch_slot_bitmap[sched_slot / 64], sched_slot))
...@@ -1887,7 +1886,7 @@ void nr_schedule_ulsch(module_id_t module_id, frame_t frame, sub_frame_t slot) ...@@ -1887,7 +1886,7 @@ void nr_schedule_ulsch(module_id_t module_id, frame_t frame, sub_frame_t slot)
/* look up the PDCCH PDU for this BWP and CORESET. If it does not exist, /* look up the PDCCH PDU for this BWP and CORESET. If it does not exist,
* create it */ * create it */
const int bwpid = sched_ctrl->active_bwp ? sched_ctrl->active_bwp->bwp_Id : 0; const int bwp_id = sched_ctrl->active_bwp ? sched_ctrl->active_bwp->bwp_Id : 0;
NR_SearchSpace_t *ss = (sched_ctrl->active_bwp || ubwpd) ? sched_ctrl->search_space: RC.nrmac[module_id]->sched_ctrlCommon->search_space; NR_SearchSpace_t *ss = (sched_ctrl->active_bwp || ubwpd) ? sched_ctrl->search_space: RC.nrmac[module_id]->sched_ctrlCommon->search_space;
NR_ControlResourceSet_t *coreset = (sched_ctrl->active_bwp || ubwpd) ? sched_ctrl->coreset: RC.nrmac[module_id]->sched_ctrlCommon->coreset; NR_ControlResourceSet_t *coreset = (sched_ctrl->active_bwp || ubwpd) ? sched_ctrl->coreset: RC.nrmac[module_id]->sched_ctrlCommon->coreset;
const int coresetid = coreset->controlResourceSetId; const int coresetid = coreset->controlResourceSetId;
...@@ -1943,7 +1942,7 @@ void nr_schedule_ulsch(module_id_t module_id, frame_t frame, sub_frame_t slot) ...@@ -1943,7 +1942,7 @@ void nr_schedule_ulsch(module_id_t module_id, frame_t frame, sub_frame_t slot)
ps->time_domain_allocation, ps->time_domain_allocation,
UE_info->UE_sched_ctrl[UE_id].tpc0, UE_info->UE_sched_ctrl[UE_id].tpc0,
n_ubwp, n_ubwp,
bwpid); bwp_id);
fill_dci_pdu_rel15(scc, fill_dci_pdu_rel15(scc,
cg, cg,
dci_pdu, dci_pdu,
...@@ -1951,7 +1950,8 @@ void nr_schedule_ulsch(module_id_t module_id, frame_t frame, sub_frame_t slot) ...@@ -1951,7 +1950,8 @@ void nr_schedule_ulsch(module_id_t module_id, frame_t frame, sub_frame_t slot)
ps->dci_format, ps->dci_format,
rnti_types[0], rnti_types[0],
pusch_pdu->bwp_size, pusch_pdu->bwp_size,
bwpid, bwp_id,
coresetid,
nr_mac->cset0_bwp_size); nr_mac->cset0_bwp_size);
memset(sched_pusch, 0, sizeof(*sched_pusch)); memset(sched_pusch, 0, sizeof(*sched_pusch));
......
...@@ -76,6 +76,10 @@ void nr_mac_update_timers(module_id_t module_id, ...@@ -76,6 +76,10 @@ void nr_mac_update_timers(module_id_t module_id,
void gNB_dlsch_ulsch_scheduler(module_id_t module_idP, void gNB_dlsch_ulsch_scheduler(module_id_t module_idP,
frame_t frame_rxP, sub_frame_t slot_rxP); frame_t frame_rxP, sub_frame_t slot_rxP);
void schedule_nr_bwp_switch(module_id_t module_id,
frame_t frame,
sub_frame_t slot);
/* \brief main DL scheduler function. Calls a preprocessor to decide on /* \brief main DL scheduler function. Calls a preprocessor to decide on
* resource allocation, then "post-processes" resource allocation (nFAPI * resource allocation, then "post-processes" resource allocation (nFAPI
* messages, statistics, HARQ handling, CEs, ... */ * messages, statistics, HARQ handling, CEs, ... */
...@@ -303,6 +307,7 @@ void fill_dci_pdu_rel15(const NR_ServingCellConfigCommon_t *scc, ...@@ -303,6 +307,7 @@ void fill_dci_pdu_rel15(const NR_ServingCellConfigCommon_t *scc,
int rnti_types, int rnti_types,
int N_RB, int N_RB,
int bwp_id, int bwp_id,
NR_ControlResourceSetId_t coreset_id,
uint16_t cset0_bwp_size); uint16_t cset0_bwp_size);
void prepare_dci(const NR_CellGroupConfig_t *CellGroup, void prepare_dci(const NR_CellGroupConfig_t *CellGroup,
......
...@@ -72,7 +72,7 @@ ...@@ -72,7 +72,7 @@
/* Defs */ /* Defs */
#define MAX_NUM_BWP 2 #define MAX_NUM_BWP 5
#define MAX_NUM_CORESET 12 #define MAX_NUM_CORESET 12
#define MAX_NUM_CCE 90 #define MAX_NUM_CCE 90
#define MAX_HARQ_ROUNDS 4 #define MAX_HARQ_ROUNDS 4
...@@ -80,6 +80,8 @@ ...@@ -80,6 +80,8 @@
#define NR_NB_RA_PROC_MAX 4 #define NR_NB_RA_PROC_MAX 4
#define MAX_NUM_OF_SSB 64 #define MAX_NUM_OF_SSB 64
#define MIN_NUM_PRBS_TO_SCHEDULE 5
/*! \brief NR_list_t is a "list" (of users, HARQ processes, slices, ...). /*! \brief NR_list_t is a "list" (of users, HARQ processes, slices, ...).
* Especially useful in the scheduler and to keep "classes" of users. */ * Especially useful in the scheduler and to keep "classes" of users. */
typedef struct { typedef struct {
...@@ -121,8 +123,10 @@ typedef struct NR_sched_pdcch { ...@@ -121,8 +123,10 @@ typedef struct NR_sched_pdcch {
typedef struct { typedef struct {
/// Flag to indicate this process is active /// Flag to indicate this process is active
RA_gNB_state_t state; RA_gNB_state_t state;
/// BWP id of RA process /// DL BWP id of RA process
int bwp_id; int dl_bwp_id;
/// UL BWP id of RA process
int ul_bwp_id;
/// CORESET0 configured flag /// CORESET0 configured flag
int coreset0_configured; int coreset0_configured;
/// Slot where preamble was received /// Slot where preamble was received
...@@ -566,6 +570,12 @@ typedef struct { ...@@ -566,6 +570,12 @@ typedef struct {
NR_BWP_Downlink_t *active_bwp; NR_BWP_Downlink_t *active_bwp;
/// the currently active BWP in UL /// the currently active BWP in UL
NR_BWP_Uplink_t *active_ubwp; NR_BWP_Uplink_t *active_ubwp;
/// the next active BWP ID in DL
NR_BWP_Id_t next_dl_bwp_id;
/// the next active BWP ID in UL
NR_BWP_Id_t next_ul_bwp_id;
/// CCE index and aggregation, should be coherent with cce_list /// CCE index and aggregation, should be coherent with cce_list
NR_SearchSpace_t *search_space; NR_SearchSpace_t *search_space;
NR_ControlResourceSet_t *coreset; NR_ControlResourceSet_t *coreset;
......
...@@ -148,7 +148,7 @@ typedef struct UE_RRC_INFO_NB_IoT_s { ...@@ -148,7 +148,7 @@ typedef struct UE_RRC_INFO_NB_IoT_s {
//Measurement Report not supported in NB-IoT //Measurement Report not supported in NB-IoT
#define PAYLOAD_SIZE_MAX 1024 #define PAYLOAD_SIZE_MAX 1024
#define RRC_BUF_SIZE 512 #define RRC_BUF_SIZE 1024
#define UNDEF_SECURITY_MODE 0xff #define UNDEF_SECURITY_MODE 0xff
#define NO_SECURITY_MODE 0x20 #define NO_SECURITY_MODE 0x20
......
...@@ -316,7 +316,7 @@ typedef enum SL_TRIGGER_e { ...@@ -316,7 +316,7 @@ typedef enum SL_TRIGGER_e {
#define MAX_MEAS_ID 7 #define MAX_MEAS_ID 7
#define PAYLOAD_SIZE_MAX 1024 #define PAYLOAD_SIZE_MAX 1024
#define RRC_BUF_SIZE 512 #define RRC_BUF_SIZE 1024
#define UNDEF_SECURITY_MODE 0xff #define UNDEF_SECURITY_MODE 0xff
#define NO_SECURITY_MODE 0x20 #define NO_SECURITY_MODE 0x20
...@@ -484,7 +484,7 @@ typedef struct MEASUREMENT_INFO_s { ...@@ -484,7 +484,7 @@ typedef struct MEASUREMENT_INFO_s {
typedef struct { typedef struct {
char Payload[RRC_BUFFER_SIZE_MAX]; char Payload[RRC_BUFFER_SIZE_MAX];
char Header[RRC_HEADER_SIZE_MAX]; char Header[RRC_HEADER_SIZE_MAX];
char payload_size; uint16_t payload_size;
} RRC_BUFFER; } RRC_BUFFER;
#define RRC_BUFFER_SIZE sizeof(RRC_BUFFER) #define RRC_BUFFER_SIZE sizeof(RRC_BUFFER)
......
...@@ -207,90 +207,103 @@ nr_rrc_data_req( ...@@ -207,90 +207,103 @@ nr_rrc_data_req(
return TRUE; // TODO should be changed to a CNF message later, currently RRC lite does not used the returned value anyway. return TRUE; // TODO should be changed to a CNF message later, currently RRC lite does not used the returned value anyway.
} }
int mac_rrc_nr_data_req(const module_id_t Mod_idP, uint16_t mac_rrc_nr_data_req(const module_id_t Mod_idP,
const int CC_id, const int CC_id,
const frame_t frameP, const frame_t frameP,
const rb_id_t Srb_id, const rb_id_t Srb_id,
const rnti_t rnti, const rnti_t rnti,
const uint8_t Nb_tb, const uint8_t Nb_tb,
uint8_t *const buffer_pP ){ uint8_t *const buffer_pP ){
#ifdef DEBUG_RRC #ifdef DEBUG_RRC
LOG_D(RRC,"[eNB %d] mac_rrc_data_req to SRB ID=%ld\n",Mod_idP,Srb_id); LOG_D(RRC,"[eNB %d] mac_rrc_data_req to SRB ID=%ld\n",Mod_idP,Srb_id);
#endif #endif
// MIBCH // MIBCH
if ((Srb_id & RAB_OFFSET) == MIBCH) { if ((Srb_id & RAB_OFFSET) == MIBCH) {
asn_enc_rval_t enc_rval; asn_enc_rval_t enc_rval;
uint8_t sfn_msb = (uint8_t)((frameP>>4)&0x3f); uint8_t sfn_msb = (uint8_t)((frameP>>4)&0x3f);
rrc_gNB_carrier_data_t *carrier = &RC.nrrrc[Mod_idP]->carrier; rrc_gNB_carrier_data_t *carrier = &RC.nrrrc[Mod_idP]->carrier;
NR_BCCH_BCH_Message_t *mib = &carrier->mib; NR_BCCH_BCH_Message_t *mib = &carrier->mib;
// Currently we are getting the pdcch_ConfigSIB1 from the configuration file. // Currently we are getting the pdcch_ConfigSIB1 from the configuration file.
// Uncomment this function for a dynamic pdcch_ConfigSIB1. // Uncomment this function for a dynamic pdcch_ConfigSIB1.
//channel_bandwidth_t min_channel_bw = bw_10MHz; // Must be obtained based on TS 38.101-1 Table 5.3.5-1 //channel_bandwidth_t min_channel_bw = bw_10MHz; // Must be obtained based on TS 38.101-1 Table 5.3.5-1
//generate_pdcch_ConfigSIB1(carrier->pdcch_ConfigSIB1, //generate_pdcch_ConfigSIB1(carrier->pdcch_ConfigSIB1,
// *carrier->servingcellconfigcommon->ssbSubcarrierSpacing, // *carrier->servingcellconfigcommon->ssbSubcarrierSpacing,
// carrier->mib.message.choice.mib->subCarrierSpacingCommon, // carrier->mib.message.choice.mib->subCarrierSpacingCommon,
// min_channel_bw); // min_channel_bw);
mib->message.choice.mib->pdcch_ConfigSIB1.controlResourceSetZero = carrier->pdcch_ConfigSIB1->controlResourceSetZero; mib->message.choice.mib->pdcch_ConfigSIB1.controlResourceSetZero = carrier->pdcch_ConfigSIB1->controlResourceSetZero;
mib->message.choice.mib->pdcch_ConfigSIB1.searchSpaceZero = carrier->pdcch_ConfigSIB1->searchSpaceZero; mib->message.choice.mib->pdcch_ConfigSIB1.searchSpaceZero = carrier->pdcch_ConfigSIB1->searchSpaceZero;
mib->message.choice.mib->systemFrameNumber.buf[0] = sfn_msb << 2; mib->message.choice.mib->systemFrameNumber.buf[0] = sfn_msb << 2;
enc_rval = uper_encode_to_buffer(&asn_DEF_NR_BCCH_BCH_Message, enc_rval = uper_encode_to_buffer(&asn_DEF_NR_BCCH_BCH_Message,
NULL, NULL,
(void *) mib, (void *) mib,
carrier->MIB, carrier->MIB,
24); 24);
LOG_D(NR_RRC, "Encoded MIB for frame %d sfn_msb %d (%p), bits %lu\n", frameP, sfn_msb, carrier->MIB, LOG_D(NR_RRC, "Encoded MIB for frame %d sfn_msb %d (%p), bits %lu\n", frameP, sfn_msb, carrier->MIB,
enc_rval.encoded); enc_rval.encoded);
buffer_pP[0] = carrier->MIB[0]; buffer_pP[0] = carrier->MIB[0];
buffer_pP[1] = carrier->MIB[1]; buffer_pP[1] = carrier->MIB[1];
buffer_pP[2] = carrier->MIB[2]; buffer_pP[2] = carrier->MIB[2];
LOG_D(NR_RRC, "MIB PDU buffer_pP[0]=%x , buffer_pP[1]=%x, buffer_pP[2]=%x\n", buffer_pP[0], buffer_pP[1], LOG_D(NR_RRC, "MIB PDU buffer_pP[0]=%x , buffer_pP[1]=%x, buffer_pP[2]=%x\n", buffer_pP[0], buffer_pP[1],
buffer_pP[2]); buffer_pP[2]);
AssertFatal (enc_rval.encoded > 0, "ASN1 message encoding failed (%s, %lu)!\n", AssertFatal (enc_rval.encoded > 0, "ASN1 message encoding failed (%s, %lu)!\n",
enc_rval.failed_type->name, enc_rval.encoded); enc_rval.failed_type->name, enc_rval.encoded);
return (3); return 3;
} }
// TODO BCCH SIB1 SIBs // TODO BCCH SIB1 SIBs
if ((Srb_id & RAB_OFFSET ) == BCCH) { if ((Srb_id & RAB_OFFSET) == BCCH) {
memcpy(&buffer_pP[0], memcpy(&buffer_pP[0], RC.nrrrc[Mod_idP]->carrier.SIB1, RC.nrrrc[Mod_idP]->carrier.sizeof_SIB1);
RC.nrrrc[Mod_idP]->carrier.SIB1,
RC.nrrrc[Mod_idP]->carrier.sizeof_SIB1);
return RC.nrrrc[Mod_idP]->carrier.sizeof_SIB1; return RC.nrrrc[Mod_idP]->carrier.sizeof_SIB1;
} }
// CCCH // CCCH
if( (Srb_id & RAB_OFFSET ) == CCCH) { if ((Srb_id & RAB_OFFSET) == CCCH) {
LOG_D(NR_RRC,"[gNB %d] Frame %d CCCH request (Srb_id %ld)\n", Mod_idP, frameP, Srb_id);
char *payload_pP; char *payload_pP;
uint8_t Sdu_size = 0;
struct rrc_gNB_ue_context_s *ue_context_p = rrc_gNB_get_ue_context(RC.nrrrc[Mod_idP], rnti); struct rrc_gNB_ue_context_s *ue_context_p = rrc_gNB_get_ue_context(RC.nrrrc[Mod_idP], rnti);
LOG_D(NR_RRC,"[gNB %d] Frame %d CCCH request (Srb_id %ld)\n", Mod_idP, frameP, Srb_id); LOG_D(NR_RRC,"[gNB %d] Frame %d CCCH request (Srb_id %ld)\n", Mod_idP, frameP, Srb_id);
if (ue_context_p == NULL) {
LOG_E(NR_RRC,"[gNB %d] Frame %d CCCH request but no ue_context\n", Mod_idP, frameP);
return 0;
}
AssertFatal(ue_context_p!=NULL,"failed to get ue_context, rnti %x\n",rnti); uint16_t payload_size = ue_context_p->ue_context.Srb0.Tx_buffer.payload_size;
int payload_size = ue_context_p->ue_context.Srb0.Tx_buffer.payload_size;
// check if data is there for MAC // check if data is there for MAC
if (payload_size > 0) { if (payload_size > 0) {
payload_pP = ue_context_p->ue_context.Srb0.Tx_buffer.Payload; payload_pP = ue_context_p->ue_context.Srb0.Tx_buffer.Payload;
LOG_D(NR_RRC,"[gNB %d] CCCH has %d bytes (dest: %p, src %p)\n", Mod_idP, payload_size, buffer_pP, payload_pP); LOG_D(NR_RRC,"[gNB %d] CCCH has %d bytes (dest: %p, src %p)\n", Mod_idP, payload_size, buffer_pP, payload_pP);
// Fill buffer // Fill buffer
memcpy((void *)buffer_pP, (void*)payload_pP, payload_size); memcpy((void *)buffer_pP, (void*)payload_pP, payload_size);
Sdu_size = payload_size;
ue_context_p->ue_context.Srb0.Tx_buffer.payload_size = 0; ue_context_p->ue_context.Srb0.Tx_buffer.payload_size = 0;
} }
return Sdu_size; return payload_size;
} }
return(0); return 0;
}
int8_t nr_mac_rrc_bwp_switch_req(const module_id_t module_idP,
const frame_t frameP,
const sub_frame_t sub_frameP,
const rnti_t rntiP,
const int dl_bwp_id,
const int ul_bwp_id) {
struct rrc_gNB_ue_context_s *ue_context_p = rrc_gNB_get_ue_context(RC.nrrrc[module_idP], rntiP);
protocol_ctxt_t ctxt;
PROTOCOL_CTXT_SET_BY_MODULE_ID(&ctxt, module_idP, GNB_FLAG_YES, rntiP, frameP, sub_frameP, 0);
nr_rrc_reconfiguration_req(ue_context_p, &ctxt, dl_bwp_id, ul_bwp_id);
return 0;
} }
int8_t nr_mac_rrc_data_ind(const module_id_t module_idP, int8_t nr_mac_rrc_data_ind(const module_id_t module_idP,
...@@ -312,6 +325,7 @@ int8_t nr_mac_rrc_data_ind(const module_id_t module_idP, ...@@ -312,6 +325,7 @@ int8_t nr_mac_rrc_data_ind(const module_id_t module_idP,
// call do_RRCSetup like full procedure and extract masterCellGroup // call do_RRCSetup like full procedure and extract masterCellGroup
NR_CellGroupConfig_t cellGroupConfig; NR_CellGroupConfig_t cellGroupConfig;
NR_ServingCellConfigCommon_t *scc=RC.nrrrc[module_idP]->carrier.servingcellconfigcommon; NR_ServingCellConfigCommon_t *scc=RC.nrrrc[module_idP]->carrier.servingcellconfigcommon;
NR_ServingCellConfig_t *servingcellconfigdedicated = RC.nrrrc[module_idP]->configuration.scd;
memset(&cellGroupConfig,0,sizeof(cellGroupConfig)); memset(&cellGroupConfig,0,sizeof(cellGroupConfig));
struct rrc_gNB_ue_context_s *ue_context_p = rrc_gNB_allocate_new_UE_context(RC.nrrrc[module_idP]); struct rrc_gNB_ue_context_s *ue_context_p = rrc_gNB_allocate_new_UE_context(RC.nrrrc[module_idP]);
...@@ -321,16 +335,16 @@ int8_t nr_mac_rrc_data_ind(const module_id_t module_idP, ...@@ -321,16 +335,16 @@ int8_t nr_mac_rrc_data_ind(const module_id_t module_idP,
ue_context_p->ue_context.Srb0.Active = 1; ue_context_p->ue_context.Srb0.Active = 1;
RB_INSERT(rrc_nr_ue_tree_s, &RC.nrrrc[module_idP]->rrc_ue_head, ue_context_p); RB_INSERT(rrc_nr_ue_tree_s, &RC.nrrrc[module_idP]->rrc_ue_head, ue_context_p);
fill_initial_cellGroupConfig(ue_context_p->local_uid,&cellGroupConfig,scc, &RC.nrrrc[module_idP]->configuration); fill_initial_cellGroupConfig(ue_context_p->local_uid,&cellGroupConfig,scc,servingcellconfigdedicated,&RC.nrrrc[module_idP]->configuration);
MessageDef* tmp=itti_alloc_new_message_sized(TASK_RRC_GNB, 0, F1AP_INITIAL_UL_RRC_MESSAGE, sizeof(f1ap_initial_ul_rrc_message_t) + sdu_lenP); MessageDef* tmp=itti_alloc_new_message_sized(TASK_RRC_GNB, 0, F1AP_INITIAL_UL_RRC_MESSAGE, sizeof(f1ap_initial_ul_rrc_message_t) + sdu_lenP);
f1ap_initial_ul_rrc_message_t *msg = &F1AP_INITIAL_UL_RRC_MESSAGE(tmp); f1ap_initial_ul_rrc_message_t *msg = &F1AP_INITIAL_UL_RRC_MESSAGE(tmp);
asn_enc_rval_t enc_rval = uper_encode_to_buffer(&asn_DEF_NR_CellGroupConfig, asn_enc_rval_t enc_rval = uper_encode_to_buffer(&asn_DEF_NR_CellGroupConfig,
NULL, NULL,
(void *)&cellGroupConfig, (void *)&cellGroupConfig,
msg->du2cu_rrc_container, msg->du2cu_rrc_container,
1024); //sizeof(msg->du2cu_rrc_container)); F1AP_MAX_DU2CU_RRC_LENGTH);
if (enc_rval.encoded == -1) { if (enc_rval.encoded == -1) {
LOG_E(F1AP,"Could not encoded cellGroupConfig, failed element %s\n",enc_rval.failed_type->name); LOG_E(F1AP,"Could not encoded cellGroupConfig, failed element %s\n",enc_rval.failed_type->name);
......
This diff is collapsed.
...@@ -104,24 +104,27 @@ uint8_t do_RRCReject(uint8_t Mod_id, ...@@ -104,24 +104,27 @@ uint8_t do_RRCReject(uint8_t Mod_id,
void fill_initial_SpCellConfig(int uid, void fill_initial_SpCellConfig(int uid,
NR_SpCellConfig_t *SpCellConfig, NR_SpCellConfig_t *SpCellConfig,
NR_ServingCellConfigCommon_t *scc, NR_ServingCellConfigCommon_t *scc,
NR_ServingCellConfig_t *servingcellconfigdedicated,
const gNB_RrcConfigurationReq *configuration); const gNB_RrcConfigurationReq *configuration);
void fill_initial_cellGroupConfig(int uid, void fill_initial_cellGroupConfig(int uid,
NR_CellGroupConfig_t *cellGroupConfig, NR_CellGroupConfig_t *cellGroupConfig,
NR_ServingCellConfigCommon_t *scc, NR_ServingCellConfigCommon_t *scc,
NR_ServingCellConfig_t *servingcellconfigdedicated,
const gNB_RrcConfigurationReq *configuration); const gNB_RrcConfigurationReq *configuration);
void update_cellGroupConfig(NR_CellGroupConfig_t *cellGroupConfig, void update_cellGroupConfig(NR_CellGroupConfig_t *cellGroupConfig,
NR_UE_NR_Capability_t *uecap, NR_UE_NR_Capability_t *uecap,
const gNB_RrcConfigurationReq *configuration); const gNB_RrcConfigurationReq *configuration);
void fill_mastercellGroupConfig(NR_CellGroupConfig_t *cellGroupConfig, NR_CellGroupConfig_t *ue_context_mastercellGroup,int use_rlc_um_for_drb); void fill_mastercellGroupConfig(NR_CellGroupConfig_t *cellGroupConfig, NR_CellGroupConfig_t *ue_context_mastercellGroup, int use_rlc_um_for_drb);
int do_RRCSetup(rrc_gNB_ue_context_t *const ue_context_pP, int16_t do_RRCSetup(rrc_gNB_ue_context_t *const ue_context_pP,
uint8_t *const buffer, uint8_t *const buffer,
const uint8_t transaction_id, const uint8_t transaction_id,
OCTET_STRING_t *masterCellGroup_from_DU, OCTET_STRING_t *masterCellGroup_from_DU,
NR_ServingCellConfigCommon_t *scc, NR_ServingCellConfigCommon_t *scc,
NR_ServingCellConfig_t *servingcellconfigdedicated,
const gNB_RrcConfigurationReq *configuration); const gNB_RrcConfigurationReq *configuration);
uint8_t do_NR_SecurityModeCommand( uint8_t do_NR_SecurityModeCommand(
......
...@@ -311,30 +311,37 @@ void prepare_sim_uecap(NR_UE_NR_Capability_t *cap, ...@@ -311,30 +311,37 @@ void prepare_sim_uecap(NR_UE_NR_Capability_t *cap,
} }
} }
void nr_rrc_config_dl_tda(NR_ServingCellConfigCommon_t *scc){ void nr_rrc_config_dl_tda(NR_ServingCellConfigCommon_t *scc,
NR_PDSCH_TimeDomainResourceAllocationList_t *pdsch_TimeDomainAllocationList,
int curr_bwp) {
frame_type_t frame_type = get_frame_type(*scc->downlinkConfigCommon->frequencyInfoDL->frequencyBandList.list.array[0], *scc->ssbSubcarrierSpacing); frame_type_t frame_type = get_frame_type(*scc->downlinkConfigCommon->frequencyInfoDL->frequencyBandList.list.array[0], *scc->ssbSubcarrierSpacing);
int curr_bwp = scc->downlinkConfigCommon->frequencyInfoDL->scs_SpecificCarrierList.list.array[0]->carrierBandwidth;
// coreset duration setting to be improved in the framework of RRC harmonization, potentially using a common function // coreset duration setting to be improved in the framework of RRC harmonization, potentially using a common function
int len_coreset = 1; int len_coreset = 1;
if (curr_bwp < 48) if (curr_bwp < 48)
len_coreset = 2; len_coreset = 2;
// setting default TDA for DL with // setting default TDA for DL with
struct NR_PDSCH_TimeDomainResourceAllocation *timedomainresourceallocation = CALLOC(1,sizeof(NR_PDSCH_TimeDomainResourceAllocation_t)); struct NR_PDSCH_TimeDomainResourceAllocation *timedomainresourceallocation = CALLOC(1,sizeof(NR_PDSCH_TimeDomainResourceAllocation_t));
// k0: Slot offset between DCI and its scheduled PDSCH (see TS 38.214 clause 5.1.2.1) When the field is absent the UE applies the value 0.
//timedomainresourceallocation->k0 = calloc(1,sizeof(*timedomainresourceallocation->k0));
//*timedomainresourceallocation->k0 = 0;
timedomainresourceallocation->mappingType = NR_PDSCH_TimeDomainResourceAllocation__mappingType_typeA; timedomainresourceallocation->mappingType = NR_PDSCH_TimeDomainResourceAllocation__mappingType_typeA;
timedomainresourceallocation->startSymbolAndLength = get_SLIV(len_coreset,14-len_coreset); // basic slot configuration starting in symbol 1 til the end of the slot timedomainresourceallocation->startSymbolAndLength = get_SLIV(len_coreset,14-len_coreset); // basic slot configuration starting in symbol 1 til the end of the slot
ASN_SEQUENCE_ADD(&scc->downlinkConfigCommon->initialDownlinkBWP->pdsch_ConfigCommon->choice.setup->pdsch_TimeDomainAllocationList->list, ASN_SEQUENCE_ADD(&pdsch_TimeDomainAllocationList->list, timedomainresourceallocation);
timedomainresourceallocation);
if(frame_type==TDD) { if(frame_type==TDD) {
// TDD // TDD
if(scc->tdd_UL_DL_ConfigurationCommon) { if(scc->tdd_UL_DL_ConfigurationCommon) {
int dl_symb = scc->tdd_UL_DL_ConfigurationCommon->pattern1.nrofDownlinkSymbols; int dl_symb = scc->tdd_UL_DL_ConfigurationCommon->pattern1.nrofDownlinkSymbols;
if(dl_symb > 1) { if(dl_symb > 1) {
timedomainresourceallocation = CALLOC(1,sizeof(NR_PDSCH_TimeDomainResourceAllocation_t)); timedomainresourceallocation = CALLOC(1,sizeof(NR_PDSCH_TimeDomainResourceAllocation_t));
// k0: Slot offset between DCI and its scheduled PDSCH (see TS 38.214 clause 5.1.2.1) When the field is absent the UE applies the value 0.
//timedomainresourceallocation->k0 = calloc(1,sizeof(*timedomainresourceallocation->k0));
//*timedomainresourceallocation->k0 = 0;
timedomainresourceallocation->mappingType = NR_PDSCH_TimeDomainResourceAllocation__mappingType_typeA; timedomainresourceallocation->mappingType = NR_PDSCH_TimeDomainResourceAllocation__mappingType_typeA;
timedomainresourceallocation->startSymbolAndLength = get_SLIV(len_coreset,dl_symb-len_coreset); // mixed slot configuration starting in symbol 1 til the end of the dl allocation timedomainresourceallocation->startSymbolAndLength = get_SLIV(len_coreset,dl_symb-len_coreset); // mixed slot configuration starting in symbol 1 til the end of the dl allocation
ASN_SEQUENCE_ADD(&scc->downlinkConfigCommon->initialDownlinkBWP->pdsch_ConfigCommon->choice.setup->pdsch_TimeDomainAllocationList->list, ASN_SEQUENCE_ADD(&pdsch_TimeDomainAllocationList->list, timedomainresourceallocation);
timedomainresourceallocation);
} }
} }
} }
......
...@@ -111,7 +111,9 @@ typedef struct physicalcellgroup_s{ ...@@ -111,7 +111,9 @@ typedef struct physicalcellgroup_s{
long RNTI_Value[MAX_NUM_CCs]; long RNTI_Value[MAX_NUM_CCs];
}physicalcellgroup_t; }physicalcellgroup_t;
void nr_rrc_config_dl_tda(NR_ServingCellConfigCommon_t *scc); void nr_rrc_config_dl_tda(NR_ServingCellConfigCommon_t *scc,
NR_PDSCH_TimeDomainResourceAllocationList_t *pdsch_TimeDomainAllocationList,
int curr_bwp);
void nr_rrc_config_ul_tda(NR_ServingCellConfigCommon_t *scc, int min_fb_delay); void nr_rrc_config_ul_tda(NR_ServingCellConfigCommon_t *scc, int min_fb_delay);
void config_csirs(NR_ServingCellConfigCommon_t *servingcellconfigcommon, void config_csirs(NR_ServingCellConfigCommon_t *servingcellconfigcommon,
NR_CSI_MeasConfig_t *csi_MeasConfig, NR_CSI_MeasConfig_t *csi_MeasConfig,
......
...@@ -132,7 +132,7 @@ typedef enum UE_STATE_NR_e { ...@@ -132,7 +132,7 @@ typedef enum UE_STATE_NR_e {
#define MAX_MEAS_ID 7 #define MAX_MEAS_ID 7
#define PAYLOAD_SIZE_MAX 1024 #define PAYLOAD_SIZE_MAX 1024
#define RRC_BUF_SIZE 512 #define RRC_BUF_SIZE 1024
#define UNDEF_SECURITY_MODE 0xff #define UNDEF_SECURITY_MODE 0xff
#define NO_SECURITY_MODE 0x20 #define NO_SECURITY_MODE 0x20
...@@ -217,7 +217,7 @@ typedef struct HANDOVER_INFO_NR_s { ...@@ -217,7 +217,7 @@ typedef struct HANDOVER_INFO_NR_s {
typedef struct { typedef struct {
char Payload[NR_RRC_BUFFER_SIZE_MAX]; char Payload[NR_RRC_BUFFER_SIZE_MAX];
char Header[NR_RRC_HEADER_SIZE_MAX]; char Header[NR_RRC_HEADER_SIZE_MAX];
int payload_size; uint16_t payload_size;
} NR_RRC_BUFFER; } NR_RRC_BUFFER;
#define NR_RRC_BUFFER_SIZE sizeof(RRC_BUFFER_NR) #define NR_RRC_BUFFER_SIZE sizeof(RRC_BUFFER_NR)
...@@ -454,6 +454,7 @@ typedef struct { ...@@ -454,6 +454,7 @@ typedef struct {
NR_BCCH_DL_SCH_Message_t systemInformation; // SIB23 NR_BCCH_DL_SCH_Message_t systemInformation; // SIB23
NR_BCCH_DL_SCH_Message_t *siblock1; NR_BCCH_DL_SCH_Message_t *siblock1;
NR_ServingCellConfigCommon_t *servingcellconfigcommon; NR_ServingCellConfigCommon_t *servingcellconfigcommon;
NR_ServingCellConfig_t *servingcellconfig;
NR_PDCCH_ConfigSIB1_t *pdcch_ConfigSIB1; NR_PDCCH_ConfigSIB1_t *pdcch_ConfigSIB1;
NR_CellGroupConfig_t *secondaryCellGroup[MAX_NR_RRC_UE_CONTEXTS]; NR_CellGroupConfig_t *secondaryCellGroup[MAX_NR_RRC_UE_CONTEXTS];
NR_SRB_INFO SI; NR_SRB_INFO SI;
......
...@@ -47,13 +47,13 @@ void rrc_config_nr_buffer(NR_SRB_INFO* Srb_info, ...@@ -47,13 +47,13 @@ void rrc_config_nr_buffer(NR_SRB_INFO* Srb_info,
uint8_t Lchan_type, uint8_t Lchan_type,
uint8_t Role); uint8_t Role);
int mac_rrc_nr_data_req(const module_id_t Mod_idP, uint16_t mac_rrc_nr_data_req(const module_id_t Mod_idP,
const int CC_id, const int CC_id,
const frame_t frameP, const frame_t frameP,
const rb_id_t Srb_id, const rb_id_t Srb_id,
const rnti_t rnti, const rnti_t rnti,
const uint8_t Nb_tb, const uint8_t Nb_tb,
uint8_t *const buffer_pP ); uint8_t *const buffer_pP);
void rrc_gNB_process_SgNBAdditionRequest( void rrc_gNB_process_SgNBAdditionRequest(
const protocol_ctxt_t *const ctxt_pP, const protocol_ctxt_t *const ctxt_pP,
...@@ -167,6 +167,13 @@ int ...@@ -167,6 +167,13 @@ int
nr_rrc_mac_remove_ue(module_id_t mod_idP, nr_rrc_mac_remove_ue(module_id_t mod_idP,
rnti_t rntiP); rnti_t rntiP);
int8_t nr_mac_rrc_bwp_switch_req(const module_id_t module_idP,
const frame_t frameP,
const sub_frame_t sub_frameP,
const rnti_t rntiP,
const int dl_bwp_id,
const int ul_bwp_id);
int8_t nr_mac_rrc_data_ind( int8_t nr_mac_rrc_data_ind(
const module_id_t module_idP, const module_id_t module_idP,
const int CC_id, const int CC_id,
...@@ -180,6 +187,11 @@ int8_t nr_mac_rrc_data_ind( ...@@ -180,6 +187,11 @@ int8_t nr_mac_rrc_data_ind(
const boolean_t brOption const boolean_t brOption
); );
int nr_rrc_reconfiguration_req(rrc_gNB_ue_context_t *const ue_context_pP,
protocol_ctxt_t *const ctxt_pP,
const int dl_bwp_id,
const int ul_bwp_id);
int nr_rrc_gNB_decode_ccch(protocol_ctxt_t *const ctxt_pP, int nr_rrc_gNB_decode_ccch(protocol_ctxt_t *const ctxt_pP,
const uint8_t *buffer, const uint8_t *buffer,
int buffer_length, int buffer_length,
......
This diff is collapsed.
...@@ -106,6 +106,9 @@ void rrc_parse_ue_capabilities(gNB_RRC_INST *rrc, NR_UE_CapabilityRAT_ContainerL ...@@ -106,6 +106,9 @@ void rrc_parse_ue_capabilities(gNB_RRC_INST *rrc, NR_UE_CapabilityRAT_ContainerL
} }
LOG_A(NR_RRC, "Successfully decoded UE NR capabilities (NR and MRDC)\n"); LOG_A(NR_RRC, "Successfully decoded UE NR capabilities (NR and MRDC)\n");
ue_context_p->ue_context.spCellConfig = calloc(1, sizeof(struct NR_SpCellConfig));
ue_context_p->ue_context.spCellConfig->spCellConfigDedicated = rrc->carrier.servingcellconfig;
LOG_I(NR_RRC,"Adding new NSA user (%p)\n",ue_context_p);
rrc_add_nsa_user(rrc,ue_context_p, m); rrc_add_nsa_user(rrc,ue_context_p, m);
} }
......
This diff is collapsed.
...@@ -1462,8 +1462,8 @@ int8_t nr_rrc_ue_decode_ccch( const protocol_ctxt_t *const ctxt_pP, const NR_SRB ...@@ -1462,8 +1462,8 @@ int8_t nr_rrc_ue_decode_ccch( const protocol_ctxt_t *const ctxt_pP, const NR_SRB
nr_rrc_ue_process_RadioBearerConfig(ctxt_pP, nr_rrc_ue_process_RadioBearerConfig(ctxt_pP,
gNB_index, gNB_index,
&dl_ccch_msg->message.choice.c1->choice.rrcSetup->criticalExtensions.choice.rrcSetup->radioBearerConfig); &dl_ccch_msg->message.choice.c1->choice.rrcSetup->criticalExtensions.choice.rrcSetup->radioBearerConfig);
nr_rrc_set_state (ctxt_pP->module_id, RRC_STATE_CONNECTED); nr_rrc_set_state (ctxt_pP->module_id, RRC_STATE_CONNECTED_NR);
nr_rrc_set_sub_state (ctxt_pP->module_id, RRC_SUB_STATE_CONNECTED); nr_rrc_set_sub_state (ctxt_pP->module_id, RRC_SUB_STATE_CONNECTED_NR);
NR_UE_rrc_inst[ctxt_pP->module_id].Info[gNB_index].rnti = ctxt_pP->rnti; NR_UE_rrc_inst[ctxt_pP->module_id].Info[gNB_index].rnti = ctxt_pP->rnti;
rrc_ue_generate_RRCSetupComplete( rrc_ue_generate_RRCSetupComplete(
ctxt_pP, ctxt_pP,
......
...@@ -167,6 +167,64 @@ gNBs = ...@@ -167,6 +167,64 @@ gNBs =
); );
# Dedicated Serving Cell Configuration
servingCellConfigDedicated = ({
# BWP-Downlink
# BWP 1 Configuration
dl_bwp-Id_1 = 1;
dl_bwp1_locationAndBandwidth = 28875; // RBstart=0, L=106 (40 MHz BW)
# subcarrierSpacing
# 0=kHz15, 1=kHz30, 2=kHz60, 3=kHz120
dl_bwp1_subcarrierSpacing = 1;
# BWP 2 Configuration
dl_bwp-Id_2 = 2;
dl_bwp2_locationAndBandwidth = 13750; // RBstart=0, L=51 (20 MHz BW)
# subcarrierSpacing
# 0=kHz15, 1=kHz30, 2=kHz60, 3=kHz120
dl_bwp2_subcarrierSpacing = 1;
# BWP 3 Configuration
dl_bwp-Id_3 = 3;
dl_bwp3_locationAndBandwidth = 6325; // RBstart=0, L=24 (10 MHz BW)
# subcarrierSpacing
# 0=kHz15, 1=kHz30, 2=kHz60, 3=kHz120
dl_bwp3_subcarrierSpacing = 1;
firstActiveDownlinkBWP-Id = 1; #BWP-Id
defaultDownlinkBWP-Id = 1; #BWP-Id
# bwp-InactivityTimer ENUMERATED {ms2, ms3, ms4, ms5, ms6, ms8, ms10, ms20, ms30,
# ms40,ms50, ms60, ms80,ms100, ms200,ms300, ms500,
# ms750, ms1280, ms1920, ms2560, spare10, spare9, spare8,
# spare7, spare6, spare5, spare4, spare3, spare2, spare1 }
# UplinkConfig
# BWP-Uplink
# BWP 1 Configuration
ul_bwp-Id_1 = 1;
ul_bwp1_locationAndBandwidth = 28875; // RBstart=0, L=106 (40 MHz BW)
# subcarrierSpacing
# 0=kHz15, 1=kHz30, 2=kHz60, 3=kHz120
ul_bwp1_subcarrierSpacing = 1;
# BWP 2 Configuration
ul_bwp-Id_2 = 2;
ul_bwp2_locationAndBandwidth = 13750; // RBstart=0, L=51 (20 MHz BW)
# subcarrierSpacing
# 0=kHz15, 1=kHz30, 2=kHz60, 3=kHz120
ul_bwp2_subcarrierSpacing = 1;
# BWP 3 Configuration
ul_bwp-Id_3 = 3;
ul_bwp3_locationAndBandwidth = 6325; // RBstart=0, L=24 (10 MHz BW)
# subcarrierSpacing
# 0=kHz15, 1=kHz30, 2=kHz60, 3=kHz120
ul_bwp3_subcarrierSpacing = 1;
firstActiveUplinkBWP-Id = 1; #BWP-Id
}
);
# ------- SCTP definitions # ------- SCTP definitions
SCTP : SCTP :
......
...@@ -68,7 +68,7 @@ gNBs = ...@@ -68,7 +68,7 @@ gNBs =
# 0=kHz15, 1=kHz30, 2=kHz60, 3=kHz120 # 0=kHz15, 1=kHz30, 2=kHz60, 3=kHz120
initialDLBWPsubcarrierSpacing = 1; initialDLBWPsubcarrierSpacing = 1;
#pdcch-ConfigCommon #pdcch-ConfigCommon
initialDLBWPcontrolResourceSetZero = 11; initialDLBWPcontrolResourceSetZero = 12;
initialDLBWPsearchSpaceZero = 0; initialDLBWPsearchSpaceZero = 0;
#uplinkConfigCommon #uplinkConfigCommon
...@@ -169,6 +169,64 @@ gNBs = ...@@ -169,6 +169,64 @@ gNBs =
); );
# Dedicated Serving Cell Configuration
servingCellConfigDedicated = ({
# BWP-Downlink
# BWP 1 Configuration
dl_bwp-Id_1 = 1;
dl_bwp1_locationAndBandwidth = 28875; // RBstart=0, L=106 (40 MHz BW)
# subcarrierSpacing
# 0=kHz15, 1=kHz30, 2=kHz60, 3=kHz120
dl_bwp1_subcarrierSpacing = 1;
# BWP 2 Configuration
dl_bwp-Id_2 = 2;
dl_bwp2_locationAndBandwidth = 13750; // RBstart=0, L=51 (20 MHz BW)
# subcarrierSpacing
# 0=kHz15, 1=kHz30, 2=kHz60, 3=kHz120
dl_bwp2_subcarrierSpacing = 1;
# BWP 3 Configuration
dl_bwp-Id_3 = 3;
dl_bwp3_locationAndBandwidth = 6325; // RBstart=0, L=24 (10 MHz BW)
# subcarrierSpacing
# 0=kHz15, 1=kHz30, 2=kHz60, 3=kHz120
dl_bwp3_subcarrierSpacing = 1;
firstActiveDownlinkBWP-Id = 1; #BWP-Id
defaultDownlinkBWP-Id = 1; #BWP-Id
# bwp-InactivityTimer ENUMERATED {ms2, ms3, ms4, ms5, ms6, ms8, ms10, ms20, ms30,
# ms40,ms50, ms60, ms80,ms100, ms200,ms300, ms500,
# ms750, ms1280, ms1920, ms2560, spare10, spare9, spare8,
# spare7, spare6, spare5, spare4, spare3, spare2, spare1 }
# UplinkConfig
# BWP-Uplink
# BWP 1 Configuration
ul_bwp-Id_1 = 1;
ul_bwp1_locationAndBandwidth = 28875; // RBstart=0, L=106 (40 MHz BW)
# subcarrierSpacing
# 0=kHz15, 1=kHz30, 2=kHz60, 3=kHz120
ul_bwp1_subcarrierSpacing = 1;
# BWP 2 Configuration
ul_bwp-Id_2 = 2;
ul_bwp2_locationAndBandwidth = 13750; // RBstart=0, L=51 (20 MHz BW)
# subcarrierSpacing
# 0=kHz15, 1=kHz30, 2=kHz60, 3=kHz120
ul_bwp2_subcarrierSpacing = 1;
# BWP 3 Configuration
ul_bwp-Id_3 = 3;
ul_bwp3_locationAndBandwidth = 6325; // RBstart=0, L=24 (10 MHz BW)
# subcarrierSpacing
# 0=kHz15, 1=kHz30, 2=kHz60, 3=kHz120
ul_bwp3_subcarrierSpacing = 1;
firstActiveUplinkBWP-Id = 1; #BWP-Id
}
);
# ------- SCTP definitions # ------- SCTP definitions
SCTP : SCTP :
......
...@@ -166,6 +166,64 @@ gNBs = ...@@ -166,6 +166,64 @@ gNBs =
); );
# Dedicated Serving Cell Configuration
servingCellConfigDedicated = ({
# BWP-Downlink
# BWP 1 Configuration
dl_bwp-Id_1 = 1;
dl_bwp1_locationAndBandwidth = 28875; // RBstart=0, L=106 (40 MHz BW)
# subcarrierSpacing
# 0=kHz15, 1=kHz30, 2=kHz60, 3=kHz120
dl_bwp1_subcarrierSpacing = 1;
# BWP 2 Configuration
dl_bwp-Id_2 = 2;
dl_bwp2_locationAndBandwidth = 13750; // RBstart=0, L=51 (20 MHz BW)
# subcarrierSpacing
# 0=kHz15, 1=kHz30, 2=kHz60, 3=kHz120
dl_bwp2_subcarrierSpacing = 1;
# BWP 3 Configuration
dl_bwp-Id_3 = 3;
dl_bwp3_locationAndBandwidth = 6325; // RBstart=0, L=24 (10 MHz BW)
# subcarrierSpacing
# 0=kHz15, 1=kHz30, 2=kHz60, 3=kHz120
dl_bwp3_subcarrierSpacing = 1;
firstActiveDownlinkBWP-Id = 1; #BWP-Id
defaultDownlinkBWP-Id = 1; #BWP-Id
# bwp-InactivityTimer ENUMERATED {ms2, ms3, ms4, ms5, ms6, ms8, ms10, ms20, ms30,
# ms40,ms50, ms60, ms80,ms100, ms200,ms300, ms500,
# ms750, ms1280, ms1920, ms2560, spare10, spare9, spare8,
# spare7, spare6, spare5, spare4, spare3, spare2, spare1 }
# UplinkConfig
# BWP-Uplink
# BWP 1 Configuration
ul_bwp-Id_1 = 1;
ul_bwp1_locationAndBandwidth = 28875; // RBstart=0, L=106 (40 MHz BW)
# subcarrierSpacing
# 0=kHz15, 1=kHz30, 2=kHz60, 3=kHz120
ul_bwp1_subcarrierSpacing = 1;
# BWP 2 Configuration
ul_bwp-Id_2 = 2;
ul_bwp2_locationAndBandwidth = 13750; // RBstart=0, L=51 (20 MHz BW)
# subcarrierSpacing
# 0=kHz15, 1=kHz30, 2=kHz60, 3=kHz120
ul_bwp2_subcarrierSpacing = 1;
# BWP 3 Configuration
ul_bwp-Id_3 = 3;
ul_bwp3_locationAndBandwidth = 6325; // RBstart=0, L=24 (10 MHz BW)
# subcarrierSpacing
# 0=kHz15, 1=kHz30, 2=kHz60, 3=kHz120
ul_bwp3_subcarrierSpacing = 1;
firstActiveUplinkBWP-Id = 1; #BWP-Id
}
);
# ------- SCTP definitions # ------- SCTP definitions
SCTP : SCTP :
......
...@@ -21,17 +21,18 @@ gNBs = ...@@ -21,17 +21,18 @@ gNBs =
sd = 0x1; // 0 false, else true sd = 0x1; // 0 false, else true
} }
); );
}); });
nr_cellid = 12345678L; nr_cellid = 12345678L;
////////// Physical parameters: ////////// Physical parameters:
ssb_SubcarrierOffset = 0; ssb_SubcarrierOffset = 0;
pdsch_AntennaPorts_N1 = 1; pdsch_AntennaPorts_XP = 1;
pusch_AntennaPorts = 2; pusch_AntennaPorts = 2;
ul_prbblacklist = "79,80,81,82" do_CSIRS = 0;
ul_prbblacklist = "79,80,81,82"
pdcch_ConfigSIB1 = ( pdcch_ConfigSIB1 = (
{ {
controlResourceSetZero = 12; controlResourceSetZero = 12;
...@@ -66,21 +67,8 @@ gNBs = ...@@ -66,21 +67,8 @@ gNBs =
# 0=kHz15, 1=kHz30, 2=kHz60, 3=kHz120 # 0=kHz15, 1=kHz30, 2=kHz60, 3=kHz120
initialDLBWPsubcarrierSpacing = 1; initialDLBWPsubcarrierSpacing = 1;
#pdcch-ConfigCommon #pdcch-ConfigCommon
initialDLBWPcontrolResourceSetZero = 11; initialDLBWPcontrolResourceSetZero = 12;
initialDLBWPsearchSpaceZero = 10; initialDLBWPsearchSpaceZero = 10;
#pdsch-ConfigCommon
#pdschTimeDomainAllocationList (up to 16 entries)
initialDLBWPk0_0 = 0;
#initialULBWPmappingType
#0=typeA,1=typeB
initialDLBWPmappingType_0 = 0;
#this is SS=1,L=13
initialDLBWPstartSymbolAndLength_0 = 40;
initialDLBWPk0_1 = 0;
initialDLBWPmappingType_1 = 0;
#this is SS=1,L=5
initialDLBWPstartSymbolAndLength_1 = 57;
#uplinkConfigCommon #uplinkConfigCommon
#frequencyInfoUL #frequencyInfoUL
...@@ -135,22 +123,6 @@ gNBs = ...@@ -135,22 +123,6 @@ gNBs =
# 0=unrestricted, 1=restricted type A, 2=restricted type B # 0=unrestricted, 1=restricted type A, 2=restricted type B
restrictedSetConfig = 0, restrictedSetConfig = 0,
# pusch-ConfigCommon (up to 16 elements)
initialULBWPk2_0 = 2;
initialULBWPmappingType_0 = 1
# this is SS=2 L=13
initialULBWPstartSymbolAndLength_0 = 41;
initialULBWPk2_1 = 2;
initialULBWPmappingType_1 = 1;
# this is SS=0 L=4
initialULBWPstartSymbolAndLength_1 = 52;
initialULBWPk2_2 = 7;
initialULBWPmappingType_2 = 1;
# this is SS=10 L=4
initialULBWPstartSymbolAndLength_2 = 52;
msg3_DeltaPreamble = 1; msg3_DeltaPreamble = 1;
p0_NominalWithGrant =-90; p0_NominalWithGrant =-90;
...@@ -243,16 +215,16 @@ L1s = ( ...@@ -243,16 +215,16 @@ L1s = (
num_cc = 1; num_cc = 1;
tr_n_preference = "local_mac"; tr_n_preference = "local_mac";
prach_dtx_threshold = 120; prach_dtx_threshold = 120;
pucch0_dtx_threshold = 100; pucch0_dtx_threshold = 80;
} }
); );
RUs = ( RUs = (
{ {
local_rf = "yes" local_rf = "yes"
nb_tx = 2 nb_tx = 2;
nb_rx = 2 nb_rx = 2;
att_tx = 0 att_tx = 0;
att_rx = 0; att_rx = 0;
bands = [78]; bands = [78];
max_pdschReferenceSignalPower = -27; max_pdschReferenceSignalPower = -27;
......
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