Commit 7b242076 authored by Raphael Defosseux's avatar Raphael Defosseux

Merge remote-tracking branch 'origin/NR_UE_reworking_UCI_procedures' into integration_2021_w32

parents efc696cc 39307247
...@@ -1506,7 +1506,6 @@ set(SCHED_SRC_NR_UE ...@@ -1506,7 +1506,6 @@ set(SCHED_SRC_NR_UE
${OPENAIR1_DIR}/SCHED_NR_UE/phy_frame_config_nr_ue.c ${OPENAIR1_DIR}/SCHED_NR_UE/phy_frame_config_nr_ue.c
${OPENAIR1_DIR}/SCHED_NR_UE/harq_nr.c ${OPENAIR1_DIR}/SCHED_NR_UE/harq_nr.c
${OPENAIR1_DIR}/SCHED_NR_UE/pucch_uci_ue_nr.c ${OPENAIR1_DIR}/SCHED_NR_UE/pucch_uci_ue_nr.c
${OPENAIR1_DIR}/SCHED_NR_UE/pucch_power_control_ue_nr.c
) )
add_library(SCHED_NR_UE_LIB ${SCHED_SRC_NR_UE}) add_library(SCHED_NR_UE_LIB ${SCHED_SRC_NR_UE})
......
...@@ -220,7 +220,6 @@ static void UE_synch(void *arg) { ...@@ -220,7 +220,6 @@ static void UE_synch(void *arg) {
LOG_I(PHY, "[UE thread Synch] Running Initial Synch (mode %d)\n",UE->mode); LOG_I(PHY, "[UE thread Synch] Running Initial Synch (mode %d)\n",UE->mode);
uint64_t dl_carrier, ul_carrier; uint64_t dl_carrier, ul_carrier;
double rx_gain_off = 0;
nr_get_carrier_frequencies(&UE->frame_parms, &dl_carrier, &ul_carrier); nr_get_carrier_frequencies(&UE->frame_parms, &dl_carrier, &ul_carrier);
if (nr_initial_sync(&syncD->proc, UE, 2) == 0) { if (nr_initial_sync(&syncD->proc, UE, 2) == 0) {
...@@ -230,7 +229,7 @@ static void UE_synch(void *arg) { ...@@ -230,7 +229,7 @@ static void UE_synch(void *arg) {
// rerun with new cell parameters and frequency-offset // rerun with new cell parameters and frequency-offset
// todo: the freq_offset computed on DL shall be scaled before being applied to UL // todo: the freq_offset computed on DL shall be scaled before being applied to UL
nr_rf_card_config(&openair0_cfg[UE->rf_map.card], rx_gain_off, ul_carrier, dl_carrier, freq_offset); nr_rf_card_config_freq(&openair0_cfg[UE->rf_map.card], ul_carrier, dl_carrier, freq_offset);
LOG_I(PHY,"Got synch: hw_slot_offset %d, carrier off %d Hz, rxgain %f (DL %f Hz, UL %f Hz)\n", LOG_I(PHY,"Got synch: hw_slot_offset %d, carrier off %d Hz, rxgain %f (DL %f Hz, UL %f Hz)\n",
hw_slot_offset, hw_slot_offset,
...@@ -264,7 +263,7 @@ static void UE_synch(void *arg) { ...@@ -264,7 +263,7 @@ static void UE_synch(void *arg) {
freq_offset *= -1; freq_offset *= -1;
nr_rf_card_config(&openair0_cfg[UE->rf_map.card], rx_gain_off, ul_carrier, dl_carrier, freq_offset); nr_rf_card_config_freq(&openair0_cfg[UE->rf_map.card], ul_carrier, dl_carrier, freq_offset);
LOG_I(PHY, "Initial sync failed: trying carrier off %d Hz\n", freq_offset); LOG_I(PHY, "Initial sync failed: trying carrier off %d Hz\n", freq_offset);
...@@ -307,11 +306,12 @@ void processSlotTX(void *arg) { ...@@ -307,11 +306,12 @@ void processSlotTX(void *arg) {
ul_indication.frame_tx = proc->frame_tx; ul_indication.frame_tx = proc->frame_tx;
ul_indication.slot_tx = proc->nr_slot_tx; ul_indication.slot_tx = proc->nr_slot_tx;
ul_indication.thread_id = proc->thread_id; ul_indication.thread_id = proc->thread_id;
ul_indication.ue_sched_mode = rxtxD->ue_sched_mode;
UE->if_inst->ul_indication(&ul_indication); UE->if_inst->ul_indication(&ul_indication);
} }
if (UE->mode != loop_through_memory) { if ((UE->mode != loop_through_memory) && (rxtxD->ue_sched_mode != NOT_PUSCH)) {
phy_procedures_nrUE_TX(UE,proc,0); phy_procedures_nrUE_TX(UE,proc,0);
} }
} }
...@@ -358,6 +358,9 @@ void processSlotRX(void *arg) { ...@@ -358,6 +358,9 @@ void processSlotRX(void *arg) {
nr_pdcp_tick(proc->frame_rx, proc->nr_slot_rx / UE->frame_parms.slots_per_subframe); nr_pdcp_tick(proc->frame_rx, proc->nr_slot_rx / UE->frame_parms.slots_per_subframe);
} }
} }
// calling UL_indication to schedule things other than PUSCH (eg, PUCCH)
rxtxD->ue_sched_mode = NOT_PUSCH;
processSlotTX(rxtxD);
// Wait for PUSCH processing to finish // Wait for PUSCH processing to finish
notifiedFIFO_elt_t *res; notifiedFIFO_elt_t *res;
...@@ -365,6 +368,7 @@ void processSlotRX(void *arg) { ...@@ -365,6 +368,7 @@ void processSlotRX(void *arg) {
delNotifiedFIFO_elt(res); delNotifiedFIFO_elt(res);
} else { } else {
rxtxD->ue_sched_mode = SCHED_ALL;
processSlotTX(rxtxD); processSlotTX(rxtxD);
} }
...@@ -373,8 +377,7 @@ void processSlotRX(void *arg) { ...@@ -373,8 +377,7 @@ void processSlotRX(void *arg) {
if (get_softmodem_params()->usim_test==0) { if (get_softmodem_params()->usim_test==0) {
pucch_procedures_ue_nr(UE, pucch_procedures_ue_nr(UE,
gNB_id, gNB_id,
proc, proc);
FALSE);
} }
LOG_D(PHY, "Sending Uplink data \n"); LOG_D(PHY, "Sending Uplink data \n");
......
...@@ -372,7 +372,8 @@ void init_openair0(void) { ...@@ -372,7 +372,8 @@ void init_openair0(void) {
nr_get_carrier_frequencies(frame_parms, &dl_carrier, &ul_carrier); nr_get_carrier_frequencies(frame_parms, &dl_carrier, &ul_carrier);
nr_rf_card_config(&openair0_cfg[card], rx_gain_off, ul_carrier, dl_carrier, freq_off); nr_rf_card_config_freq(&openair0_cfg[card], ul_carrier, dl_carrier, freq_off);
nr_rf_card_config_gain(&openair0_cfg[card], rx_gain_off);
openair0_cfg[card].configFilename = get_softmodem_params()->rf_config_file; openair0_cfg[card].configFilename = get_softmodem_params()->rf_config_file;
......
...@@ -181,6 +181,16 @@ int init_nr_ue_signal(PHY_VARS_NR_UE *ue, ...@@ -181,6 +181,16 @@ int init_nr_ue_signal(PHY_VARS_NR_UE *ue,
} }
} }
/////////////////////////PUCCH init/////////////////////////
///////////
for (th_id = 0; th_id < RX_NB_TH_MAX; th_id++) {
for (gNB_id = 0; gNB_id < ue->n_connected_gNB; gNB_id++) {
ue->pucch_vars[th_id][gNB_id] = (NR_UE_PUCCH *)malloc16(sizeof(NR_UE_PUCCH));
for (i=0; i<2; i++)
ue->pucch_vars[th_id][gNB_id]->active[i] = false;
}
}
/////////// ///////////
//////////////////////////////////////////////////////////////////////////////////////////// ////////////////////////////////////////////////////////////////////////////////////////////
......
...@@ -129,8 +129,10 @@ int nr_pusch_channel_estimation(PHY_VARS_gNB *gNB, ...@@ -129,8 +129,10 @@ int nr_pusch_channel_estimation(PHY_VARS_gNB *gNB,
//------------------generate DMRS------------------// //------------------generate DMRS------------------//
if (pusch_pdu->transform_precoding == transform_precoder_disabled) { // transform precoding = 1 means disabled
nr_pusch_dmrs_rx(gNB, Ns, gNB->nr_gold_pusch_dmrs[pusch_pdu->scid][Ns][symbol], &pilot[0], 1000, 0, nb_rb_pusch, (pusch_pdu->bwp_start + pusch_pdu->rb_start)*NR_NB_SC_PER_RB, pusch_pdu->dmrs_config_type); if (pusch_pdu->transform_precoding == 1) {
nr_pusch_dmrs_rx(gNB, Ns, gNB->nr_gold_pusch_dmrs[pusch_pdu->scid][Ns][symbol], &pilot[0], 1000, 0, nb_rb_pusch,
(pusch_pdu->bwp_start + pusch_pdu->rb_start)*NR_NB_SC_PER_RB, pusch_pdu->dmrs_config_type);
} }
else { // if transform precoding or SC-FDMA is enabled in Uplink else { // if transform precoding or SC-FDMA is enabled in Uplink
......
...@@ -1317,7 +1317,8 @@ int nr_rx_pusch(PHY_VARS_gNB *gNB, ...@@ -1317,7 +1317,8 @@ int nr_rx_pusch(PHY_VARS_gNB *gNB,
rel15_ul->rb_size); rel15_ul->rb_size);
stop_meas(&gNB->ulsch_mrc_stats); stop_meas(&gNB->ulsch_mrc_stats);
if (rel15_ul->transform_precoding == transform_precoder_enabled) { // transform precoding = 0 means enabled
if (rel15_ul->transform_precoding == 0) {
#ifdef __AVX2__ #ifdef __AVX2__
// For odd number of resource blocks need byte alignment to multiple of 8 // For odd number of resource blocks need byte alignment to multiple of 8
......
...@@ -963,7 +963,8 @@ uint8_t nr_dci_decoding_procedure(PHY_VARS_NR_UE *ue, ...@@ -963,7 +963,8 @@ uint8_t nr_dci_decoding_procedure(PHY_VARS_NR_UE *ue,
currentPtrDCI); currentPtrDCI);
n_rnti = rel15->rnti; n_rnti = rel15->rnti;
LOG_D(PHY, "(%i.%i) dci indication (rnti %x,dci format %s,n_CCE %d,payloadSize %d)\n", proc->frame_rx, proc->nr_slot_rx,n_rnti,nr_dci_format_string[rel15->dci_format_options[k]],CCEind,dci_length); LOG_D(PHY, "(%i.%i) dci indication (rnti %x,dci format %s,n_CCE %d,payloadSize %d)\n",
proc->frame_rx, proc->nr_slot_rx,n_rnti,nr_dci_format_string[rel15->dci_format_options[k]],CCEind,dci_length);
if (crc == n_rnti) { if (crc == n_rnti) {
LOG_D(PHY, "(%i.%i) Received dci indication (rnti %x,dci format %s,n_CCE %d,payloadSize %d,payload %llx)\n", LOG_D(PHY, "(%i.%i) Received dci indication (rnti %x,dci format %s,n_CCE %d,payloadSize %d,payload %llx)\n",
proc->frame_rx, proc->nr_slot_rx,n_rnti,nr_dci_format_string[rel15->dci_format_options[k]],CCEind,dci_length,*(unsigned long long*)dci_estimation); proc->frame_rx, proc->nr_slot_rx,n_rnti,nr_dci_format_string[rel15->dci_format_options[k]],CCEind,dci_length,*(unsigned long long*)dci_estimation);
...@@ -978,6 +979,7 @@ uint8_t nr_dci_decoding_procedure(PHY_VARS_NR_UE *ue, ...@@ -978,6 +979,7 @@ uint8_t nr_dci_decoding_procedure(PHY_VARS_NR_UE *ue,
dci_ind->slot = proc->nr_slot_rx; dci_ind->slot = proc->nr_slot_rx;
dci_ind->dci_list[dci_ind->number_of_dcis].rnti = n_rnti; dci_ind->dci_list[dci_ind->number_of_dcis].rnti = n_rnti;
dci_ind->dci_list[dci_ind->number_of_dcis].n_CCE = CCEind; dci_ind->dci_list[dci_ind->number_of_dcis].n_CCE = CCEind;
dci_ind->dci_list[dci_ind->number_of_dcis].N_CCE = L;
dci_ind->dci_list[dci_ind->number_of_dcis].dci_format = rel15->dci_format_options[k]; dci_ind->dci_list[dci_ind->number_of_dcis].dci_format = rel15->dci_format_options[k];
dci_ind->dci_list[dci_ind->number_of_dcis].payloadSize = dci_length; dci_ind->dci_list[dci_ind->number_of_dcis].payloadSize = dci_length;
memcpy((void*)dci_ind->dci_list[dci_ind->number_of_dcis].payloadBits,(void*)dci_estimation,8); memcpy((void*)dci_ind->dci_list[dci_ind->number_of_dcis].payloadBits,(void*)dci_estimation,8);
......
...@@ -625,9 +625,7 @@ uint32_t nr_dlsch_decoding(PHY_VARS_NR_UE *phy_vars_ue, ...@@ -625,9 +625,7 @@ uint32_t nr_dlsch_decoding(PHY_VARS_NR_UE *phy_vars_ue,
LOG_D(PHY,"[UE %d] DLSCH: Setting NAK for SFN/SF %d/%d (pid %d, status %d, round %d, TBS %d, mcs %d) Kr %d r %d harq_process->round %d\n", LOG_D(PHY,"[UE %d] DLSCH: Setting NAK for SFN/SF %d/%d (pid %d, status %d, round %d, TBS %d, mcs %d) Kr %d r %d harq_process->round %d\n",
phy_vars_ue->Mod_id, frame, nr_slot_rx, harq_pid,harq_process->status, harq_process->round,harq_process->TBS,harq_process->mcs,Kr,r,harq_process->round); phy_vars_ue->Mod_id, frame, nr_slot_rx, harq_pid,harq_process->status, harq_process->round,harq_process->TBS,harq_process->mcs,Kr,r,harq_process->round);
harq_process->harq_ack.ack = 0; harq_process->ack = 0;
harq_process->harq_ack.harq_id = harq_pid;
harq_process->harq_ack.send_harq_status = 1;
harq_process->errors[harq_process->round]++; harq_process->errors[harq_process->round]++;
if (harq_process->round >= dlsch->Mlimit) { if (harq_process->round >= dlsch->Mlimit) {
...@@ -650,9 +648,7 @@ uint32_t nr_dlsch_decoding(PHY_VARS_NR_UE *phy_vars_ue, ...@@ -650,9 +648,7 @@ uint32_t nr_dlsch_decoding(PHY_VARS_NR_UE *phy_vars_ue,
harq_process->status = SCH_IDLE; harq_process->status = SCH_IDLE;
harq_process->round = 0; harq_process->round = 0;
harq_process->harq_ack.ack = 1; harq_process->ack = 1;
harq_process->harq_ack.harq_id = harq_pid;
harq_process->harq_ack.send_harq_status = 1;
//LOG_D(PHY,"[UE %d] DLSCH: Setting ACK for SFN/SF %d/%d (pid %d, status %d, round %d, TBS %d, mcs %d)\n", //LOG_D(PHY,"[UE %d] DLSCH: Setting ACK for SFN/SF %d/%d (pid %d, status %d, round %d, TBS %d, mcs %d)\n",
// phy_vars_ue->Mod_id, frame, subframe, harq_pid, harq_process->status, harq_process->round,harq_process->TBS,harq_process->mcs); // phy_vars_ue->Mod_id, frame, subframe, harq_pid, harq_process->status, harq_process->round,harq_process->TBS,harq_process->mcs);
...@@ -1170,9 +1166,7 @@ uint32_t nr_dlsch_decoding_mthread(PHY_VARS_NR_UE *phy_vars_ue, ...@@ -1170,9 +1166,7 @@ uint32_t nr_dlsch_decoding_mthread(PHY_VARS_NR_UE *phy_vars_ue,
if (LOG_DEBUGFLAG(DEBUG_DLSCH_DECOD)) if (LOG_DEBUGFLAG(DEBUG_DLSCH_DECOD))
LOG_I(PHY,"[UE %d] DLSCH: Setting NAK for SFN/SF %d/%d (pid %d, status %d, round %d, TBS %d, mcs %d) Kr %d r %d harq_process->round %d\n", LOG_I(PHY,"[UE %d] DLSCH: Setting NAK for SFN/SF %d/%d (pid %d, status %d, round %d, TBS %d, mcs %d) Kr %d r %d harq_process->round %d\n",
phy_vars_ue->Mod_id, frame, nr_slot_rx, harq_pid,harq_process->status, harq_process->round,harq_process->TBS,harq_process->mcs,Kr,r,harq_process->round); phy_vars_ue->Mod_id, frame, nr_slot_rx, harq_pid,harq_process->status, harq_process->round,harq_process->TBS,harq_process->mcs,Kr,r,harq_process->round);
harq_process->harq_ack.ack = 0; harq_process->ack = 0;
harq_process->harq_ack.harq_id = harq_pid;
harq_process->harq_ack.send_harq_status = 1;
harq_process->errors[harq_process->round]++; harq_process->errors[harq_process->round]++;
harq_process->round++; harq_process->round++;
...@@ -1194,9 +1188,7 @@ uint32_t nr_dlsch_decoding_mthread(PHY_VARS_NR_UE *phy_vars_ue, ...@@ -1194,9 +1188,7 @@ uint32_t nr_dlsch_decoding_mthread(PHY_VARS_NR_UE *phy_vars_ue,
harq_process->status = SCH_IDLE; harq_process->status = SCH_IDLE;
harq_process->round = 0; harq_process->round = 0;
harq_process->harq_ack.ack = 1; harq_process->ack = 1;
harq_process->harq_ack.harq_id = harq_pid;
harq_process->harq_ack.send_harq_status = 1;
//LOG_I(PHY,"[UE %d] DLSCH: Setting ACK for SFN/SF %d/%d (pid %d, status %d, round %d, TBS %d, mcs %d)\n", //LOG_I(PHY,"[UE %d] DLSCH: Setting ACK for SFN/SF %d/%d (pid %d, status %d, round %d, TBS %d, mcs %d)\n",
// phy_vars_ue->Mod_id, frame, subframe, harq_pid, harq_process->status, harq_process->round,harq_process->TBS,harq_process->mcs); // phy_vars_ue->Mod_id, frame, subframe, harq_pid, harq_process->status, harq_process->round,harq_process->TBS,harq_process->mcs);
......
...@@ -607,7 +607,7 @@ int nr_rx_pbch( PHY_VARS_NR_UE *ue, ...@@ -607,7 +607,7 @@ int nr_rx_pbch( PHY_VARS_NR_UE *ue,
uint16_t number_pdus = 1; uint16_t number_pdus = 1;
nr_fill_dl_indication(&dl_indication, NULL, &rx_ind, proc, ue, gNB_id); nr_fill_dl_indication(&dl_indication, NULL, &rx_ind, proc, ue, gNB_id);
nr_fill_rx_indication(&rx_ind, FAPI_NR_RX_PDU_TYPE_SSB, gNB_id, ue, NULL, number_pdus); nr_fill_rx_indication(&rx_ind, FAPI_NR_RX_PDU_TYPE_SSB, gNB_id, ue, NULL, NULL, number_pdus);
if (ue->if_inst && ue->if_inst->dl_indication) if (ue->if_inst && ue->if_inst->dl_indication)
ue->if_inst->dl_indication(&dl_indication, NULL); ue->if_inst->dl_indication(&dl_indication, NULL);
......
...@@ -1475,11 +1475,13 @@ void nr_get_carrier_frequencies(NR_DL_FRAME_PARMS *fp, ...@@ -1475,11 +1475,13 @@ void nr_get_carrier_frequencies(NR_DL_FRAME_PARMS *fp,
@param dl_Carrier DL carrier to be set @param dl_Carrier DL carrier to be set
@param freq_offset Freq offset to be set @param freq_offset Freq offset to be set
*/ */
void nr_rf_card_config(openair0_config_t *openair0_cfg, void nr_rf_card_config_gain(openair0_config_t *openair0_cfg,
double rx_gain_off, double rx_gain_off);
uint64_t ul_Carrier,
uint64_t dl_Carrier, void nr_rf_card_config_freq(openair0_config_t *openair0_cfg,
int freq_offset); uint64_t ul_Carrier,
uint64_t dl_Carrier,
int freq_offset);
void print_CQI(void *o,UCI_format_t uci_format,uint8_t eNB_id,int N_RB_DL); void print_CQI(void *o,UCI_format_t uci_format,uint8_t eNB_id,int N_RB_DL);
......
...@@ -56,34 +56,6 @@ typedef enum { ...@@ -56,34 +56,6 @@ typedef enum {
RETRANSMISSION_HARQ RETRANSMISSION_HARQ
} harq_result_t; } harq_result_t;
//#if defined(UPGRADE_RAT_NR)
#if 1
typedef struct {
/// HARQ process id
uint8_t harq_id;
/// HARQ rx status
harq_result_t rx_status;
/// ACK bits (after decoding) 0:NACK / 1:ACK / 2:DTX
uint8_t ack;
/// send status (for PUCCH)
uint8_t send_harq_status;
/// nCCE (for PUCCH)
uint8_t nCCE;
/// DAI value detected from DCI1/1a/1b/1d/2/2a/2b/2c. 0xff indicates not touched
uint8_t vDAI_DL;
/// DAI value detected from DCI0/4. 0xff indicates not touched
uint8_t vDAI_UL;
/// allow to define pucch parameters TS 38.213 9.2.3 UE procedure for reporting HARQ-ACK
uint8_t pucch_resource_indicator;
/// slot on which feedback ack should be send to network
uint16_t slot_for_feedback_ack;
/// index of a first CCE for the PDCCH reception
uint8_t n_CCE;
/// number of CCEs in a control resource set of a PDCCH reception conveying DCI format 1_0
uint8_t N_CCE;
} NR_UE_HARQ_STATUS_t;
#endif
typedef struct { typedef struct {
/// NDAPI struct for UE /// NDAPI struct for UE
nfapi_nr_ue_pusch_pdu_t pusch_pdu; nfapi_nr_ue_pusch_pdu_t pusch_pdu;
...@@ -319,7 +291,7 @@ typedef struct { ...@@ -319,7 +291,7 @@ typedef struct {
/// codeword this transport block is mapped to /// codeword this transport block is mapped to
uint8_t codeword; uint8_t codeword;
/// HARQ-ACKs /// HARQ-ACKs
NR_UE_HARQ_STATUS_t harq_ack; uint8_t ack;
/// PTRS Frequency Density /// PTRS Frequency Density
uint8_t PTRSFreqDensity; uint8_t PTRSFreqDensity;
/// PTRS Time Density /// PTRS Time Density
......
...@@ -48,11 +48,9 @@ void nr_get_carrier_frequencies(NR_DL_FRAME_PARMS *fp, uint64_t *dl_carrier, uin ...@@ -48,11 +48,9 @@ void nr_get_carrier_frequencies(NR_DL_FRAME_PARMS *fp, uint64_t *dl_carrier, uin
} }
void nr_rf_card_config(openair0_config_t *openair0_cfg,
double rx_gain_offset, void nr_rf_card_config_gain(openair0_config_t *openair0_cfg,
uint64_t ul_carrier, double rx_gain_off){
uint64_t dl_carrier,
int freq_offset){
uint8_t mod_id = 0; uint8_t mod_id = 0;
uint8_t cc_id = 0; uint8_t cc_id = 0;
...@@ -61,6 +59,36 @@ void nr_rf_card_config(openair0_config_t *openair0_cfg, ...@@ -61,6 +59,36 @@ void nr_rf_card_config(openair0_config_t *openair0_cfg,
double rx_gain = ue->rx_total_gain_dB; double rx_gain = ue->rx_total_gain_dB;
double tx_gain = ue->tx_total_gain_dB; double tx_gain = ue->tx_total_gain_dB;
for (int i = rf_chain; i < rf_chain + 4; i++) {
if (tx_gain)
openair0_cfg->tx_gain[i] = tx_gain;
if (rx_gain)
openair0_cfg->rx_gain[i] = rx_gain - rx_gain_off;
openair0_cfg->autocal[i] = 1;
if (i < openair0_cfg->rx_num_channels) {
LOG_I(PHY, "HW: Configuring channel %d (rf_chain %d): setting tx_gain %f, rx_gain %f\n",
i,
rf_chain,
openair0_cfg->tx_gain[i],
openair0_cfg->rx_gain[i]);
}
}
}
void nr_rf_card_config_freq(openair0_config_t *openair0_cfg,
uint64_t ul_carrier,
uint64_t dl_carrier,
int freq_offset){
uint8_t mod_id = 0;
uint8_t cc_id = 0;
PHY_VARS_NR_UE *ue = PHY_vars_UE_g[mod_id][cc_id];
int rf_chain = ue->rf_map.chain;
for (int i = rf_chain; i < rf_chain + 4; i++) { for (int i = rf_chain; i < rf_chain + 4; i++) {
if (i < openair0_cfg->rx_num_channels) if (i < openair0_cfg->rx_num_channels)
...@@ -73,22 +101,15 @@ void nr_rf_card_config(openair0_config_t *openair0_cfg, ...@@ -73,22 +101,15 @@ void nr_rf_card_config(openair0_config_t *openair0_cfg,
else else
openair0_cfg->tx_freq[i] = 0.0; openair0_cfg->tx_freq[i] = 0.0;
if (tx_gain)
openair0_cfg->tx_gain[i] = tx_gain;
if (rx_gain)
openair0_cfg->rx_gain[i] = rx_gain - rx_gain_offset;
openair0_cfg->autocal[i] = 1; openair0_cfg->autocal[i] = 1;
if (i < openair0_cfg->rx_num_channels) { if (i < openair0_cfg->rx_num_channels) {
LOG_I(PHY, "HW: Configuring channel %d (rf_chain %d): setting tx_gain %f, rx_gain %f, tx_freq %f Hz, rx_freq %f Hz\n", LOG_I(PHY, "HW: Configuring channel %d (rf_chain %d): setting tx_freq %f Hz, rx_freq %f Hz\n",
i, i,
rf_chain, rf_chain,
openair0_cfg->tx_gain[i],
openair0_cfg->rx_gain[i],
openair0_cfg->tx_freq[i], openair0_cfg->tx_freq[i],
openair0_cfg->rx_freq[i]); openair0_cfg->rx_freq[i]);
} }
} }
} }
\ No newline at end of file
...@@ -252,14 +252,15 @@ void nr_ue_ulsch_procedures(PHY_VARS_NR_UE *UE, ...@@ -252,14 +252,15 @@ void nr_ue_ulsch_procedures(PHY_VARS_NR_UE *UE,
uint8_t u = 0, v = 0; uint8_t u = 0, v = 0;
int16_t *dmrs_seq = NULL; int16_t *dmrs_seq = NULL;
if (pusch_pdu->transform_precoding == transform_precoder_enabled) { // if transform precoding is enbaled (value 0)
if (pusch_pdu->transform_precoding == 0) {
uint32_t nb_re_pusch=nb_rb * NR_NB_SC_PER_RB; uint32_t nb_re_pusch=nb_rb * NR_NB_SC_PER_RB;
uint32_t y_offset = 0; uint32_t y_offset = 0;
uint16_t num_dmrs_res_per_symbol = nb_rb*(NR_NB_SC_PER_RB/2); uint16_t num_dmrs_res_per_symbol = nb_rb*(NR_NB_SC_PER_RB/2);
// Calculate index to dmrs seq array based on number of DMRS Subcarriers on this symbol // Calculate index to dmrs seq array based on number of DMRS Subcarriers on this symbol
index = get_index_for_dmrs_lowpapr_seq(num_dmrs_res_per_symbol); index = get_index_for_dmrs_lowpapr_seq(num_dmrs_res_per_symbol);
u = pusch_pdu->dfts_ofdm.low_papr_group_number; u = pusch_pdu->dfts_ofdm.low_papr_group_number;
v = pusch_pdu->dfts_ofdm.low_papr_sequence_number; v = pusch_pdu->dfts_ofdm.low_papr_sequence_number;
dmrs_seq = dmrs_lowpaprtype1_ul_ref_sig[u][v][index]; dmrs_seq = dmrs_lowpaprtype1_ul_ref_sig[u][v][index];
...@@ -297,7 +298,7 @@ void nr_ue_ulsch_procedures(PHY_VARS_NR_UE *UE, ...@@ -297,7 +298,7 @@ void nr_ue_ulsch_procedures(PHY_VARS_NR_UE *UE,
} }
printf("NR_ULSCH_UE: numSym: %d, num_dmrs_sym: %d", number_of_symbols,number_dmrs_symbols); printf("NR_ULSCH_UE: numSym: %d, num_dmrs_sym: %d", number_of_symbols,number_dmrs_symbols);
for (int ll = 0; ll < (number_of_symbols-number_dmrs_symbols); ll++) { for (int ll = 0; ll < (number_of_symbols-number_dmrs_symbols); ll++) {
nr_idft(&debug_symbols[offset], nb_re_pusch); nr_idft(&debug_symbols[offset], nb_re_pusch);
...@@ -353,8 +354,8 @@ void nr_ue_ulsch_procedures(PHY_VARS_NR_UE *UE, ...@@ -353,8 +354,8 @@ void nr_ue_ulsch_procedures(PHY_VARS_NR_UE *UE,
if ((ul_dmrs_symb_pos >> l) & 0x01) { if ((ul_dmrs_symb_pos >> l) & 0x01) {
is_dmrs_sym = 1; is_dmrs_sym = 1;
// transform precoding disabled (value 1)
if (pusch_pdu->transform_precoding == transform_precoder_disabled){ if (pusch_pdu->transform_precoding == 1){
if (dmrs_type == pusch_dmrs_type1) if (dmrs_type == pusch_dmrs_type1)
dmrs_idx = (pusch_pdu->bwp_start + start_rb)*6; dmrs_idx = (pusch_pdu->bwp_start + start_rb)*6;
...@@ -371,9 +372,9 @@ void nr_ue_ulsch_procedures(PHY_VARS_NR_UE *UE, ...@@ -371,9 +372,9 @@ void nr_ue_ulsch_procedures(PHY_VARS_NR_UE *UE,
} }
} else if (pusch_pdu->pdu_bit_map & PUSCH_PDU_BITMAP_PUSCH_PTRS) { } else if (pusch_pdu->pdu_bit_map & PUSCH_PDU_BITMAP_PUSCH_PTRS) {
AssertFatal(pusch_pdu->transform_precoding == transform_precoder_disabled, "PTRS NOT SUPPORTED IF TRANSFORM PRECODING IS ENABLED\n"); AssertFatal(pusch_pdu->transform_precoding == 1, "PTRS NOT SUPPORTED IF TRANSFORM PRECODING IS ENABLED\n");
if(is_ptrs_symbol(l, ulsch_ue->ptrs_symbols)) { if(is_ptrs_symbol(l, ulsch_ue->ptrs_symbols)) {
is_ptrs_sym = 1; is_ptrs_sym = 1;
...@@ -404,8 +405,8 @@ void nr_ue_ulsch_procedures(PHY_VARS_NR_UE *UE, ...@@ -404,8 +405,8 @@ void nr_ue_ulsch_procedures(PHY_VARS_NR_UE *UE,
} }
if (is_dmrs == 1) { if (is_dmrs == 1) {
// if transform precoding is enabled
if (pusch_pdu->transform_precoding == transform_precoder_enabled) { if (pusch_pdu->transform_precoding == 0) {
((int16_t*)txdataF[ap])[(sample_offsetF)<<1] = (Wt[l_prime[0]]*Wf[k_prime]*AMP*dmrs_seq[2*dmrs_idx]) >> 15; ((int16_t*)txdataF[ap])[(sample_offsetF)<<1] = (Wt[l_prime[0]]*Wf[k_prime]*AMP*dmrs_seq[2*dmrs_idx]) >> 15;
((int16_t*)txdataF[ap])[((sample_offsetF)<<1) + 1] = (Wt[l_prime[0]]*Wf[k_prime]*AMP*dmrs_seq[(2*dmrs_idx) + 1]) >> 15; ((int16_t*)txdataF[ap])[((sample_offsetF)<<1) + 1] = (Wt[l_prime[0]]*Wf[k_prime]*AMP*dmrs_seq[(2*dmrs_idx) + 1]) >> 15;
......
This diff is collapsed.
...@@ -49,65 +49,30 @@ ...@@ -49,65 +49,30 @@
void nr_generate_pucch0(PHY_VARS_NR_UE *ue, void nr_generate_pucch0(PHY_VARS_NR_UE *ue,
int32_t **txdataF, int32_t **txdataF,
NR_DL_FRAME_PARMS *frame_parms, NR_DL_FRAME_PARMS *frame_parms,
long pucch_GroupHopping,
long hoppingId,
int16_t amp, int16_t amp,
int nr_slot_tx, int nr_slot_tx,
uint8_t m0, fapi_nr_ul_config_pucch_pdu *pucch_pdu);
uint8_t mcs,
uint8_t nrofSymbols,
uint8_t startingSymbolIndex,
uint16_t startingPRB,
uint16_t secondHopPRB);
void nr_generate_pucch1(PHY_VARS_NR_UE *ue, void nr_generate_pucch1(PHY_VARS_NR_UE *ue,
int32_t **txdataF, int32_t **txdataF,
NR_DL_FRAME_PARMS *frame_parms, NR_DL_FRAME_PARMS *frame_parms,
PUCCH_CONFIG_DEDICATED *pucch_config_dedicated,
uint64_t payload,
int16_t amp, int16_t amp,
int nr_slot_tx, int nr_slot_tx,
uint8_t m0, fapi_nr_ul_config_pucch_pdu *pucch_pdu);
uint8_t nrofSymbols,
uint8_t startingSymbolIndex,
uint16_t startingPRB,
uint16_t startingPRB_intraSlotHopping,
uint8_t timeDomainOCC,
uint8_t nr_bit);
void nr_generate_pucch2(PHY_VARS_NR_UE *ue, void nr_generate_pucch2(PHY_VARS_NR_UE *ue,
uint16_t crnti,
uint32_t dmrs_scrambling_id,
uint32_t data_scrambling_id,
int32_t **txdataF, int32_t **txdataF,
NR_DL_FRAME_PARMS *frame_parms, NR_DL_FRAME_PARMS *frame_parms,
PUCCH_CONFIG_DEDICATED *pucch_config_dedicated,
uint64_t payload,
int16_t amp, int16_t amp,
int nr_slot_tx, int nr_slot_tx,
uint8_t nrofSymbols, fapi_nr_ul_config_pucch_pdu *pucch_pdu);
uint8_t startingSymbolIndex,
uint8_t nrofPRB,
uint16_t startingPRB,
uint8_t nr_bit);
void nr_generate_pucch3_4(PHY_VARS_NR_UE *ue, void nr_generate_pucch3_4(PHY_VARS_NR_UE *ue,
uint16_t crnti,
int32_t **txdataF, int32_t **txdataF,
NR_DL_FRAME_PARMS *frame_parms, NR_DL_FRAME_PARMS *frame_parms,
pucch_format_nr_t fmt,
PUCCH_CONFIG_DEDICATED *pucch_config_dedicated,
uint64_t payload,
int16_t amp, int16_t amp,
int nr_slot_tx, int nr_slot_tx,
uint8_t nrofSymbols, fapi_nr_ul_config_pucch_pdu *pucch_pdu);
uint8_t startingSymbolIndex,
uint8_t nrofPRB,
uint16_t startingPRB,
uint16_t startingPRB_intraSlotHopping,
uint8_t nr_bit,
uint8_t occ_length_format4,
uint8_t occ_index_format4);
// tables for mcs values for different payloads // tables for mcs values for different payloads
static const uint8_t table1_mcs[]={0,6,3,9}; static const uint8_t table1_mcs[]={0,6,3,9};
......
...@@ -235,6 +235,11 @@ typedef struct { ...@@ -235,6 +235,11 @@ typedef struct {
int32_t *txdataF_layers[NR_MAX_NB_LAYERS]; int32_t *txdataF_layers[NR_MAX_NB_LAYERS];
} NR_UE_PUSCH; } NR_UE_PUSCH;
typedef struct {
bool active[2];
fapi_nr_ul_config_pucch_pdu pucch_pdu[2];
} NR_UE_PUCCH;
typedef struct { typedef struct {
/// \brief Holds the transmit data in time domain. /// \brief Holds the transmit data in time domain.
/// For IFFT_FPGA this points to the same memory as PHY_vars->tx_vars[a].TX_DMA_BUFFER. /// For IFFT_FPGA this points to the same memory as PHY_vars->tx_vars[a].TX_DMA_BUFFER.
...@@ -810,6 +815,7 @@ typedef struct { ...@@ -810,6 +815,7 @@ typedef struct {
NR_UE_PDCCH *pdcch_vars[RX_NB_TH_MAX][NUMBER_OF_CONNECTED_gNB_MAX]; NR_UE_PDCCH *pdcch_vars[RX_NB_TH_MAX][NUMBER_OF_CONNECTED_gNB_MAX];
NR_UE_PRACH *prach_vars[NUMBER_OF_CONNECTED_gNB_MAX]; NR_UE_PRACH *prach_vars[NUMBER_OF_CONNECTED_gNB_MAX];
NR_UE_PUSCH *pusch_vars[RX_NB_TH_MAX][NUMBER_OF_CONNECTED_gNB_MAX]; NR_UE_PUSCH *pusch_vars[RX_NB_TH_MAX][NUMBER_OF_CONNECTED_gNB_MAX];
NR_UE_PUCCH *pucch_vars[RX_NB_TH_MAX][NUMBER_OF_CONNECTED_gNB_MAX];
NR_UE_DLSCH_t *dlsch[RX_NB_TH_MAX][NUMBER_OF_CONNECTED_gNB_MAX][NR_MAX_NB_CODEWORDS]; // two RxTx Threads NR_UE_DLSCH_t *dlsch[RX_NB_TH_MAX][NUMBER_OF_CONNECTED_gNB_MAX][NR_MAX_NB_CODEWORDS]; // two RxTx Threads
NR_UE_ULSCH_t *ulsch[RX_NB_TH_MAX][NUMBER_OF_CONNECTED_gNB_MAX][NR_MAX_NB_CODEWORDS]; // two code words NR_UE_ULSCH_t *ulsch[RX_NB_TH_MAX][NUMBER_OF_CONNECTED_gNB_MAX][NR_MAX_NB_CODEWORDS]; // two code words
NR_UE_DLSCH_t *dlsch_SI[NUMBER_OF_CONNECTED_gNB_MAX]; NR_UE_DLSCH_t *dlsch_SI[NUMBER_OF_CONNECTED_gNB_MAX];
...@@ -957,15 +963,10 @@ typedef struct { ...@@ -957,15 +963,10 @@ typedef struct {
/// PUSCH contention-based access vars /// PUSCH contention-based access vars
PUSCH_CA_CONFIG_DEDICATED pusch_ca_config_dedicated[NUMBER_OF_eNB_MAX]; // lola PUSCH_CA_CONFIG_DEDICATED pusch_ca_config_dedicated[NUMBER_OF_eNB_MAX]; // lola
/// PUCCH variables
PUCCH_CONFIG_DEDICATED pucch_config_dedicated[NUMBER_OF_CONNECTED_gNB_MAX];
//#if defined(UPGRADE_RAT_NR) //#if defined(UPGRADE_RAT_NR)
#if 1 #if 1
SystemInformationBlockType1_nr_t systemInformationBlockType1_nr; SystemInformationBlockType1_nr_t systemInformationBlockType1_nr;
PUCCH_ConfigCommon_nr_t pucch_config_common_nr[NUMBER_OF_CONNECTED_gNB_MAX];
PUCCH_Config_t pucch_config_dedicated_nr[NUMBER_OF_CONNECTED_gNB_MAX];
#endif #endif
uint8_t ncs_cell[20][7]; uint8_t ncs_cell[20][7];
...@@ -1068,6 +1069,7 @@ typedef struct { ...@@ -1068,6 +1069,7 @@ typedef struct {
typedef struct nr_rxtx_thread_data_s { typedef struct nr_rxtx_thread_data_s {
UE_nr_rxtx_proc_t proc; UE_nr_rxtx_proc_t proc;
PHY_VARS_NR_UE *UE; PHY_VARS_NR_UE *UE;
NR_UE_SCHED_MODE_t ue_sched_mode;
notifiedFIFO_t txFifo; notifiedFIFO_t txFifo;
} nr_rxtx_thread_data_t; } nr_rxtx_thread_data_t;
......
...@@ -427,23 +427,10 @@ typedef struct { ...@@ -427,23 +427,10 @@ typedef struct {
* *
************************************************************************/ ************************************************************************/
#define MAX_NR_OF_PUCCH_P0_PER_SET (8)
#define NUMBER_PUCCH_FORMAT_NR (5) #define NUMBER_PUCCH_FORMAT_NR (5)
typedef int8_t power_level_t; /* INTEGER (-16..15) */ typedef int8_t power_level_t; /* INTEGER (-16..15) */
typedef struct {
uint8_t p0_PUCCH_Id; /* INTEGER (1..8) */
power_level_t p0_PUCCH_Value;
} P0_PUCCH_t;
typedef struct {
power_level_t deltaF_PUCCH_f[NUMBER_PUCCH_FORMAT_NR];
P0_PUCCH_t *p0_Set[MAX_NR_OF_PUCCH_P0_PER_SET];
// pathlossReferenceRSs SEQUENCE (SIZE (1..maxNrofPUCCH-PathlossReferenceRSs)) OF PUCCH-PathlossReferenceRS OPTIONAL, -- Need M
int8_t twoPUCCH_PC_AdjustmentStates;
} PUCCH_PowerControl_t;
/*********************************************************************** /***********************************************************************
* *
...@@ -633,9 +620,10 @@ typedef struct { ...@@ -633,9 +620,10 @@ typedef struct {
PUCCH_FormatConfig_t *formatConfig[NUMBER_PUCCH_FORMAT_NR-1]; /* format 0 is not there */ PUCCH_FormatConfig_t *formatConfig[NUMBER_PUCCH_FORMAT_NR-1]; /* format 0 is not there */
uint8_t dl_DataToUL_ACK[NB_DL_DATA_TO_UL_ACK]; /* table TS 38.213 Table 9.2.3-1: Mapping of PSDCH-to-HARQ_feedback timing indicator field values to numbers of slots */ uint8_t dl_DataToUL_ACK[NB_DL_DATA_TO_UL_ACK]; /* table TS 38.213 Table 9.2.3-1: Mapping of PSDCH-to-HARQ_feedback timing indicator field values to numbers of slots */
void *spatial_Relation_Info[MAX_NR_OF_SPATIAL_RELATION_INFOS]; void *spatial_Relation_Info[MAX_NR_OF_SPATIAL_RELATION_INFOS];
PUCCH_PowerControl_t pucch_PowerControl;
} PUCCH_Config_t; } PUCCH_Config_t;
/*********************************************************************** /***********************************************************************
* *
* FUNCTIONALITY : Scheduling Request Configuration (SR) * FUNCTIONALITY : Scheduling Request Configuration (SR)
......
...@@ -417,6 +417,7 @@ void nr_fill_rx_indication(fapi_nr_rx_indication_t *rx_ind, ...@@ -417,6 +417,7 @@ void nr_fill_rx_indication(fapi_nr_rx_indication_t *rx_ind,
uint8_t gNB_id, uint8_t gNB_id,
PHY_VARS_NR_UE *ue, PHY_VARS_NR_UE *ue,
NR_UE_DLSCH_t *dlsch0, NR_UE_DLSCH_t *dlsch0,
NR_UE_DLSCH_t *dlsch1,
uint16_t n_pdus); uint16_t n_pdus);
......
...@@ -47,6 +47,7 @@ const char *ul_pdu_type[]={"PRACH", "PUCCH", "PUSCH", "SRS"}; ...@@ -47,6 +47,7 @@ const char *ul_pdu_type[]={"PRACH", "PUCCH", "PUSCH", "SRS"};
int8_t nr_ue_scheduled_response(nr_scheduled_response_t *scheduled_response){ int8_t nr_ue_scheduled_response(nr_scheduled_response_t *scheduled_response){
bool found = false;
if(scheduled_response != NULL){ if(scheduled_response != NULL){
module_id_t module_id = scheduled_response->module_id; module_id_t module_id = scheduled_response->module_id;
...@@ -59,7 +60,7 @@ int8_t nr_ue_scheduled_response(nr_scheduled_response_t *scheduled_response){ ...@@ -59,7 +60,7 @@ int8_t nr_ue_scheduled_response(nr_scheduled_response_t *scheduled_response){
NR_UE_DLSCH_t *dlsch0 = NULL; NR_UE_DLSCH_t *dlsch0 = NULL;
NR_UE_PDCCH *pdcch_vars = PHY_vars_UE_g[module_id][cc_id]->pdcch_vars[thread_id][0]; NR_UE_PDCCH *pdcch_vars = PHY_vars_UE_g[module_id][cc_id]->pdcch_vars[thread_id][0];
NR_UE_ULSCH_t *ulsch0 = PHY_vars_UE_g[module_id][cc_id]->ulsch[thread_id][0][0]; NR_UE_ULSCH_t *ulsch0 = PHY_vars_UE_g[module_id][cc_id]->ulsch[thread_id][0][0];
NR_DL_FRAME_PARMS frame_parms = PHY_vars_UE_g[module_id][cc_id]->frame_parms; NR_UE_PUCCH *pucch_vars = PHY_vars_UE_g[module_id][cc_id]->pucch_vars[thread_id][0];
if(scheduled_response->dl_config != NULL){ if(scheduled_response->dl_config != NULL){
fapi_nr_dl_config_request_t *dl_config = scheduled_response->dl_config; fapi_nr_dl_config_request_t *dl_config = scheduled_response->dl_config;
...@@ -118,26 +119,19 @@ int8_t nr_ue_scheduled_response(nr_scheduled_response_t *scheduled_response){ ...@@ -118,26 +119,19 @@ int8_t nr_ue_scheduled_response(nr_scheduled_response_t *scheduled_response){
dlsch0_harq->mcs = dlsch_config_pdu->mcs; dlsch0_harq->mcs = dlsch_config_pdu->mcs;
dlsch0_harq->rvidx = dlsch_config_pdu->rv; dlsch0_harq->rvidx = dlsch_config_pdu->rv;
dlsch0->g_pucch = dlsch_config_pdu->accumulated_delta_PUCCH; dlsch0->g_pucch = dlsch_config_pdu->accumulated_delta_PUCCH;
dlsch0_harq->harq_ack.pucch_resource_indicator = dlsch_config_pdu->pucch_resource_id;
dlsch0_harq->harq_ack.slot_for_feedback_ack = (slot+dlsch_config_pdu->pdsch_to_harq_feedback_time_ind)%frame_parms.slots_per_frame;
//get nrOfLayers from DCI info //get nrOfLayers from DCI info
uint8_t Nl = 0; uint8_t Nl = 0;
for (i = 0; i < 4; i++) { for (i = 0; i < 4; i++) {
if (dlsch_config_pdu->dmrs_ports[i] >= i) Nl += 1; if (dlsch_config_pdu->dmrs_ports[i] >= i) Nl += 1;
} }
dlsch0_harq->Nl = Nl; dlsch0_harq->Nl = Nl;
dlsch0_harq->mcs_table=dlsch_config_pdu->mcs_table; dlsch0_harq->mcs_table=dlsch_config_pdu->mcs_table;
dlsch0_harq->harq_ack.rx_status = downlink_harq_process(dlsch0_harq, dlsch0->current_harq_pid, dlsch_config_pdu->ndi, dlsch0->rnti_type); downlink_harq_process(dlsch0_harq, dlsch0->current_harq_pid, dlsch_config_pdu->ndi, dlsch0->rnti_type);
if (dlsch0_harq->status != ACTIVE) { if (dlsch0_harq->status != ACTIVE) {
// dlsch0_harq->status not ACTIVE may be due to false retransmission. Reset the // dlsch0_harq->status not ACTIVE may be due to false retransmission. Reset the
// following flag to skip PDSCH procedures in that case. // following flag to skip PDSCH procedures in that case.
dlsch0->active = 0; dlsch0->active = 0;
dlsch0_harq->harq_ack.ack = 1;
dlsch0_harq->harq_ack.send_harq_status = 1;
} }
dlsch0_harq->harq_ack.vDAI_DL = dlsch_config_pdu->dai;
/* PTRS */ /* PTRS */
dlsch0_harq->PTRSFreqDensity = dlsch_config_pdu->PTRSFreqDensity; dlsch0_harq->PTRSFreqDensity = dlsch_config_pdu->PTRSFreqDensity;
dlsch0_harq->PTRSTimeDensity = dlsch_config_pdu->PTRSTimeDensity; dlsch0_harq->PTRSTimeDensity = dlsch_config_pdu->PTRSTimeDensity;
...@@ -145,7 +139,7 @@ int8_t nr_ue_scheduled_response(nr_scheduled_response_t *scheduled_response){ ...@@ -145,7 +139,7 @@ int8_t nr_ue_scheduled_response(nr_scheduled_response_t *scheduled_response){
dlsch0_harq->nEpreRatioOfPDSCHToPTRS = dlsch_config_pdu->nEpreRatioOfPDSCHToPTRS; dlsch0_harq->nEpreRatioOfPDSCHToPTRS = dlsch_config_pdu->nEpreRatioOfPDSCHToPTRS;
dlsch0_harq->PTRSReOffset = dlsch_config_pdu->PTRSReOffset; dlsch0_harq->PTRSReOffset = dlsch_config_pdu->PTRSReOffset;
dlsch0_harq->pduBitmap = dlsch_config_pdu->pduBitmap; dlsch0_harq->pduBitmap = dlsch_config_pdu->pduBitmap;
LOG_D(MAC, ">>>> \tdlsch0->g_pucch = %d\tdlsch0_harq.mcs = %d\tpdsch_to_harq_feedback_time_ind = %d\tslot_for_feedback_ack = %d\n", dlsch0->g_pucch, dlsch0_harq->mcs, dlsch_config_pdu->pdsch_to_harq_feedback_time_ind, dlsch0_harq->harq_ack.slot_for_feedback_ack); LOG_D(MAC, ">>>> \tdlsch0->g_pucch = %d\tdlsch0_harq.mcs = %d\n", dlsch0->g_pucch, dlsch0_harq->mcs);
} }
} }
} }
...@@ -161,7 +155,7 @@ int8_t nr_ue_scheduled_response(nr_scheduled_response_t *scheduled_response){ ...@@ -161,7 +155,7 @@ int8_t nr_ue_scheduled_response(nr_scheduled_response_t *scheduled_response){
AssertFatal(ul_config->ul_config_list[i].pdu_type <= FAPI_NR_UL_CONFIG_TYPES,"pdu_type %d out of bounds\n",ul_config->ul_config_list[i].pdu_type); AssertFatal(ul_config->ul_config_list[i].pdu_type <= FAPI_NR_UL_CONFIG_TYPES,"pdu_type %d out of bounds\n",ul_config->ul_config_list[i].pdu_type);
LOG_D(PHY, "In %s: processing %s PDU of %d total UL PDUs (ul_config %p) \n", __FUNCTION__, ul_pdu_type[ul_config->ul_config_list[i].pdu_type - 1], ul_config->number_pdus, ul_config); LOG_D(PHY, "In %s: processing %s PDU of %d total UL PDUs (ul_config %p) \n", __FUNCTION__, ul_pdu_type[ul_config->ul_config_list[i].pdu_type - 1], ul_config->number_pdus, ul_config);
uint8_t pdu_type = ul_config->ul_config_list[i].pdu_type, pucch_resource_id, current_harq_pid, format, gNB_id = 0; uint8_t pdu_type = ul_config->ul_config_list[i].pdu_type, current_harq_pid, gNB_id = 0;
/* PRACH */ /* PRACH */
//NR_PRACH_RESOURCES_t *prach_resources; //NR_PRACH_RESOURCES_t *prach_resources;
fapi_nr_ul_config_prach_pdu *prach_config_pdu; fapi_nr_ul_config_prach_pdu *prach_config_pdu;
...@@ -169,9 +163,6 @@ int8_t nr_ue_scheduled_response(nr_scheduled_response_t *scheduled_response){ ...@@ -169,9 +163,6 @@ int8_t nr_ue_scheduled_response(nr_scheduled_response_t *scheduled_response){
nfapi_nr_ue_pusch_pdu_t *pusch_config_pdu; nfapi_nr_ue_pusch_pdu_t *pusch_config_pdu;
/* PUCCH */ /* PUCCH */
fapi_nr_ul_config_pucch_pdu *pucch_config_pdu; fapi_nr_ul_config_pucch_pdu *pucch_config_pdu;
PUCCH_ConfigCommon_nr_t *pucch_config_common_nr;
PUCCH_Config_t *pucch_config_dedicated_nr;
PUCCH_format_t *format_params;
switch (pdu_type){ switch (pdu_type){
...@@ -209,47 +200,19 @@ int8_t nr_ue_scheduled_response(nr_scheduled_response_t *scheduled_response){ ...@@ -209,47 +200,19 @@ int8_t nr_ue_scheduled_response(nr_scheduled_response_t *scheduled_response){
break; break;
case (FAPI_NR_UL_CONFIG_TYPE_PUCCH): case (FAPI_NR_UL_CONFIG_TYPE_PUCCH):
// pucch config pdu found = false;
pucch_config_pdu = &ul_config->ul_config_list[i].pucch_config_pdu; pucch_config_pdu = &ul_config->ul_config_list[i].pucch_config_pdu;
pucch_resource_id = 0; //FIXME!!! for(int j=0; j<2; j++) {
format = 1; // FIXME!!! if(pucch_vars->active[j] == false) {
pucch_config_common_nr = &PHY_vars_UE_g[module_id][cc_id]->pucch_config_common_nr[0]; LOG_D(PHY,"%d.%d Copying pucch pdu to UE PHY\n",scheduled_response->frame,slot);
pucch_config_dedicated_nr = &PHY_vars_UE_g[module_id][cc_id]->pucch_config_dedicated_nr[0]; memcpy((void*)&(pucch_vars->pucch_pdu[j]), (void*)pucch_config_pdu, sizeof(fapi_nr_ul_config_pucch_pdu));
format_params = &pucch_config_dedicated_nr->PUCCH_Resource[pucch_resource_id]->format_parameters; pucch_vars->active[j] = true;
found = true;
format_params->initialCyclicShift = pucch_config_pdu->initialCyclicShift; break;
format_params->nrofSymbols = pucch_config_pdu->nrofSymbols; }
format_params->startingSymbolIndex = pucch_config_pdu->startingSymbolIndex; }
format_params->nrofPRBs = pucch_config_pdu->nrofPRBs; if (!found)
format_params->timeDomainOCC = pucch_config_pdu->timeDomainOCC; LOG_E(PHY, "Couldn't find allocation for PUCCH PDU in PUCCH VARS\n");
format_params->occ_length = pucch_config_pdu->occ_length;
format_params->occ_Index = pucch_config_pdu->occ_Index;
pucch_config_dedicated_nr->PUCCH_Resource[pucch_resource_id]->startingPRB = pucch_config_pdu->startingPRB;
pucch_config_dedicated_nr->PUCCH_Resource[pucch_resource_id]->intraSlotFrequencyHopping = pucch_config_pdu->intraSlotFrequencyHopping;
pucch_config_dedicated_nr->PUCCH_Resource[pucch_resource_id]->secondHopPRB = pucch_config_pdu->secondHopPRB; // Not sure this parameter is used
pucch_config_dedicated_nr->formatConfig[format - 1]->additionalDMRS = pucch_config_pdu->additionalDMRS; // At this point we need to know which format is going to be used
pucch_config_dedicated_nr->formatConfig[format - 1]->pi2PBSK = pucch_config_pdu->pi2PBSK;
pucch_config_common_nr->pucch_GroupHopping = pucch_config_pdu->pucch_GroupHopping;
pucch_config_common_nr->hoppingId = pucch_config_pdu->hoppingId;
pucch_config_common_nr->p0_nominal = pucch_config_pdu->p0_nominal;
/* pucch_config_dedicated->PUCCH_Resource[pucch_resource_id]->format_parameters.initialCyclicShift = pucch_config_pdu->initialCyclicShift;
pucch_config_dedicated->PUCCH_Resource[pucch_resource_id]->format_parameters.nrofSymbols = pucch_config_pdu->nrofSymbols;
pucch_config_dedicated->PUCCH_Resource[pucch_resource_id]->format_parameters.startingSymbolIndex = pucch_config_pdu->startingSymbolIndex;
pucch_config_dedicated->PUCCH_Resource[pucch_resource_id]->format_parameters.nrofPRBs = pucch_config_pdu->nrofPRBs;
pucch_config_dedicated->PUCCH_Resource[pucch_resource_id]->startingPRB = pucch_config_pdu->startingPRB;
pucch_config_dedicated->PUCCH_Resource[pucch_resource_id]->format_parameters.timeDomainOCC = pucch_config_pdu->timeDomainOCC;
pucch_config_dedicated->PUCCH_Resource[pucch_resource_id]->format_parameters.occ_length = pucch_config_pdu->occ_length;
pucch_config_dedicated->PUCCH_Resource[pucch_resource_id]->format_parameters.occ_Index = pucch_config_pdu->occ_Index;
pucch_config_dedicated->PUCCH_Resource[pucch_resource_id]->intraSlotFrequencyHopping = pucch_config_pdu->intraSlotFrequencyHopping;
pucch_config_dedicated->PUCCH_Resource[pucch_resource_id]->secondHopPRB = pucch_config_pdu->secondHopPRB; // Not sure this parameter is used
pucch_config_dedicated->formatConfig[format-1]->additionalDMRS = pucch_config_pdu->additionalDMRS; // At this point we need to know which format is going to be used
pucch_config_dedicated->formatConfig[format-1]->pi2PBSK = pucch_config_pdu->pi2PBSK;
pucch_config_common->pucch_GroupHopping = pucch_config_pdu->pucch_GroupHopping;
pucch_config_common->hoppingId = pucch_config_pdu->hoppingId;
pucch_config_common->p0_nominal = pucch_config_pdu->p0_nominal;*/
break; break;
case (FAPI_NR_UL_CONFIG_TYPE_PRACH): case (FAPI_NR_UL_CONFIG_TYPE_PRACH):
......
...@@ -98,43 +98,6 @@ ...@@ -98,43 +98,6 @@
#define DL_DCI (1) #define DL_DCI (1)
#define UL_DCI (0) #define UL_DCI (0)
/*******************************************************************
*
* NAME : get_dci_info_for_harq
*
* PARAMETERS : pointer to ue context
* id of current gNB
* number of uplink processes
* maximum number of uplink retransmissions
* RETURN : none
*
* DESCRIPTION : update HARQ entity with information from DCI
* TS 38.212 7.3.1.2 DCI formats for scheduling PDSCH
*
*********************************************************************/
void get_dci_info_for_harq(PHY_VARS_NR_UE *ue, NR_DCI_INFO_EXTRACTED_t *nr_dci_info_extracted,
NR_UE_DLSCH_t **dlsch, NR_UE_ULSCH_t *ulsch, uint8_t slot, uint8_t tx_offset)
{
if (nr_dci_info_extracted->identifier_dci_formats == DL_DCI) {
dlsch[0]->current_harq_pid = nr_dci_info_extracted->harq_process_number;
NR_DL_UE_HARQ_t *dl_harq = dlsch[0]->harq_processes[dlsch[0]->current_harq_pid];
dl_harq->harq_ack.vDAI_DL = nr_dci_info_extracted->dai+1;
dl_harq->harq_ack.pucch_resource_indicator = nr_dci_info_extracted->pucch_resource_ind;
dl_harq->harq_ack.slot_for_feedback_ack = (slot + nr_dci_info_extracted->pdsch_to_harq_feedback_time_ind)%ue->frame_parms.slots_per_subframe;
dl_harq->harq_ack.harq_id = nr_dci_info_extracted->harq_process_number;
dl_harq->harq_ack.rx_status = downlink_harq_process(dl_harq, dlsch[0]->current_harq_pid, nr_dci_info_extracted->ndi, dlsch[0]->rnti_type);
}
else if (nr_dci_info_extracted->identifier_dci_formats == UL_DCI) {
/* store harq id for which pusch should be transmitted at rx_slot + tx_offset */
set_tx_harq_id(ulsch, nr_dci_info_extracted->harq_process_number, (slot + tx_offset)%ue->frame_parms.slots_per_subframe);
ulsch->harq_processes[nr_dci_info_extracted->harq_process_number]->tx_status = uplink_harq_process(ulsch, nr_dci_info_extracted->harq_process_number, nr_dci_info_extracted->ndi, ulsch->rnti_type);
}
}
/******************************************************************* /*******************************************************************
* *
...@@ -345,96 +308,7 @@ void init_downlink_harq_status(NR_DL_UE_HARQ_t *dl_harq) ...@@ -345,96 +308,7 @@ void init_downlink_harq_status(NR_DL_UE_HARQ_t *dl_harq)
dl_harq->status = SCH_IDLE; dl_harq->status = SCH_IDLE;
dl_harq->first_tx = 1; dl_harq->first_tx = 1;
dl_harq->round = 0; dl_harq->round = 0;
dl_harq->harq_ack.ack = DL_ACKNACK_NO_SET; dl_harq->ack = DL_ACKNACK_NO_SET;
dl_harq->harq_ack.send_harq_status = 0;
dl_harq->harq_ack.vDAI_UL = UL_DAI_NO_SET;
dl_harq->harq_ack.vDAI_DL = DL_DAI_NO_SET;
dl_harq->harq_ack.slot_for_feedback_ack = NR_MAX_SLOTS_PER_FRAME;
dl_harq->harq_ack.pucch_resource_indicator = MAX_PUCCH_RESOURCE_INDICATOR;
dl_harq->harq_ack.n_CCE = 0;
dl_harq->harq_ack.N_CCE = 0;;
}
/*******************************************************************
*
* NAME : config_downlink_harq_process
*
* PARAMETERS : pointer to ue context
* id of current gNB
* number of downlink processes
*
* RETURN : none
*
* DESCRIPTION : configuration of downlink HARQ entity
*
*********************************************************************/
void config_downlink_harq_process(PHY_VARS_NR_UE *ue, int gNB_id, int TB_id, int execution_thread_number, uint8_t number_harq_processes_for_pdsch)
{
NR_UE_DLSCH_t *dlsch;
dlsch = (NR_UE_DLSCH_t *)malloc16(sizeof(NR_UE_DLSCH_t));
if (dlsch != NULL) {
memset(dlsch,0,sizeof(NR_UE_DLSCH_t));
ue->dlsch[execution_thread_number][gNB_id][TB_id] = dlsch;
}
else {
LOG_E(PHY, "Fatal memory allocation problem at line %d in function %s of file %s \n", __LINE__ , __func__, __FILE__);
assert(0);
}
dlsch->Mdlharq = number_harq_processes_for_pdsch; /* an additional HARQ is reserved for PBCCH */
dlsch->number_harq_processes_for_pdsch = number_harq_processes_for_pdsch;
/* allocation of HARQ process context */
for (int harq_pid = 0; harq_pid < number_harq_processes_for_pdsch; harq_pid++) {
//dlsch->harq_processes[harq_pid] = (NR_DL_UE_HARQ_t *)malloc16(sizeof(NR_DL_UE_HARQ_t));
/*if (dlsch->harq_processes[harq_pid] == NULL) {
LOG_E(PHY, "Fatal memory allocation problem at line %d in function %s of file %s \n", __LINE__ , __func__, __FILE__);
assert(0);
}*/
memset(&dlsch->harq_processes[harq_pid],0,sizeof(NR_DL_UE_HARQ_t));
NR_DL_UE_HARQ_t *dl_harq = dlsch->harq_processes[harq_pid];
init_downlink_harq_status(dl_harq);
}
}
/*******************************************************************
*
* NAME : release_downlink_harq_process
*
* PARAMETERS : pointer to ue context
* id of current gNB
* TB_id transport block identity 0 or 1
* execution_thread_number thread number for current downlink processing
* RETURN : none
*
* DESCRIPTION : release of HARQ downlink entity
*
*********************************************************************/
void release_downlink_harq_process(PHY_VARS_NR_UE *ue, int gNB_id, int TB_id, int execution_thread_number)
{
NR_UE_DLSCH_t *dlsch = ue->dlsch[execution_thread_number][gNB_id][TB_id];
/*for (int process_id = 0; process_id < dlsch->Mdlharq; process_id++) {
free16(dlsch->harq_processes[process_id],sizeof(NR_DL_UE_HARQ_t));
dlsch->harq_processes[process_id] = NULL;
}*/
free16(dlsch,sizeof(NR_UE_DLSCH_t));
ue->dlsch[execution_thread_number][gNB_id][TB_id] = NULL;
} }
/******************************************************************* /*******************************************************************
...@@ -454,18 +328,15 @@ void release_downlink_harq_process(PHY_VARS_NR_UE *ue, int gNB_id, int TB_id, in ...@@ -454,18 +328,15 @@ void release_downlink_harq_process(PHY_VARS_NR_UE *ue, int gNB_id, int TB_id, in
* *
*********************************************************************/ *********************************************************************/
harq_result_t downlink_harq_process(NR_DL_UE_HARQ_t *dl_harq, int harq_pid, int ndi, uint8_t rnti_type) void downlink_harq_process(NR_DL_UE_HARQ_t *dl_harq, int harq_pid, int ndi, uint8_t rnti_type) {
{
harq_result_t result_harq = RETRANSMISSION_HARQ;
if (rnti_type == _CS_RNTI_) if (rnti_type == _CS_RNTI_) {
{
LOG_E(PHY, "Fatal error in HARQ entity due to not supported CS_RNTI at line %d in function %s of file %s \n", __LINE__ , __func__, __FILE__); LOG_E(PHY, "Fatal error in HARQ entity due to not supported CS_RNTI at line %d in function %s of file %s \n", __LINE__ , __func__, __FILE__);
return(NEW_TRANSMISSION_HARQ); return;
} }
else if ((rnti_type != _C_RNTI_) && (rnti_type != _TC_RNTI_)) { else if ((rnti_type != _C_RNTI_) && (rnti_type != _TC_RNTI_)) {
/* harq mechanism is not relevant for other rnti */ /* harq mechanism is not relevant for other rnti */
return(NEW_TRANSMISSION_HARQ); return;
} }
if (dl_harq->first_tx == 1) { if (dl_harq->first_tx == 1) {
...@@ -474,8 +345,6 @@ harq_result_t downlink_harq_process(NR_DL_UE_HARQ_t *dl_harq, int harq_pid, int ...@@ -474,8 +345,6 @@ harq_result_t downlink_harq_process(NR_DL_UE_HARQ_t *dl_harq, int harq_pid, int
dl_harq->DCINdi = ndi; dl_harq->DCINdi = ndi;
dl_harq->first_tx = 0; dl_harq->first_tx = 0;
result_harq = NEW_TRANSMISSION_HARQ;
LOG_D(PHY, "[HARQ-DL-PDSCH harqId : %d] first new reception \n", harq_pid); LOG_D(PHY, "[HARQ-DL-PDSCH harqId : %d] first new reception \n", harq_pid);
} }
else if (dl_harq->DCINdi != ndi) { else if (dl_harq->DCINdi != ndi) {
...@@ -483,20 +352,15 @@ harq_result_t downlink_harq_process(NR_DL_UE_HARQ_t *dl_harq, int harq_pid, int ...@@ -483,20 +352,15 @@ harq_result_t downlink_harq_process(NR_DL_UE_HARQ_t *dl_harq, int harq_pid, int
dl_harq->status = ACTIVE; dl_harq->status = ACTIVE;
dl_harq->DCINdi = ndi; dl_harq->DCINdi = ndi;
result_harq = NEW_TRANSMISSION_HARQ;
LOG_D(PHY, "[HARQ-DL-PDSCH harqId : %d] new reception due to toogle of ndi \n", harq_pid); LOG_D(PHY, "[HARQ-DL-PDSCH harqId : %d] new reception due to toogle of ndi \n", harq_pid);
} }
else { else {
dl_harq->round++; dl_harq->round++;
if (dl_harq->harq_ack.ack) dl_harq->status = SCH_IDLE; if (dl_harq->ack) dl_harq->status = SCH_IDLE;
result_harq = RETRANSMISSION_HARQ;
LOG_D(PHY, "[HARQ-DL-PDSCH harqId : %d] reception of a retransmission \n", harq_pid); LOG_D(PHY, "[HARQ-DL-PDSCH harqId : %d] reception of a retransmission \n", harq_pid);
} }
return (result_harq);
} }
...@@ -46,8 +46,6 @@ ...@@ -46,8 +46,6 @@
#define NR_DEFAULT_DLSCH_HARQ_PROCESSES (8) /* TS 38.214 5.1 */ #define NR_DEFAULT_DLSCH_HARQ_PROCESSES (8) /* TS 38.214 5.1 */
#define NR_DL_MAX_DAI (4) /* TS 38.213 table 9.1.3-1 Value of counter DAI for DCI format 1_0 and 1_1 */
#define NR_DL_MAX_NB_CW (2) /* number of downlink code word */
#define DL_ACKNACK_NO_SET (2) #define DL_ACKNACK_NO_SET (2)
#define DL_NACK (0) #define DL_NACK (0)
#define DL_ACK (1) #define DL_ACK (1)
...@@ -68,18 +66,6 @@ ...@@ -68,18 +66,6 @@
/*************** FUNCTIONS ****************************************/ /*************** FUNCTIONS ****************************************/
/** \brief This function updates HARQ context according to dci
@param PHY_VARS_NR_UE ue context
@param nr_dci_info_extracted extracted information from dci
@param dlsch downlink context
@param ulsch uplink context
@param nr_slot_rx rx slot
@param tx_offset slot offset for tx
@returns none */
void get_dci_info_for_harq(PHY_VARS_NR_UE *ue, NR_DCI_INFO_EXTRACTED_t *nr_dci_info_extracted,
NR_UE_DLSCH_t **dlsch, NR_UE_ULSCH_t *ulsch, uint8_t nr_slot_rx, uint8_t tx_offset);
/** \brief This function configures uplink HARQ context /** \brief This function configures uplink HARQ context
@param PHY_VARS_NR_UE ue context @param PHY_VARS_NR_UE ue context
@param gNB_id gNodeB identifier @param gNB_id gNodeB identifier
...@@ -127,24 +113,6 @@ harq_result_t uplink_harq_process(NR_UE_ULSCH_t *ulsch, int harq_pid, int ndi, u ...@@ -127,24 +113,6 @@ harq_result_t uplink_harq_process(NR_UE_ULSCH_t *ulsch, int harq_pid, int ndi, u
void init_downlink_harq_status(NR_DL_UE_HARQ_t *dl_harq); void init_downlink_harq_status(NR_DL_UE_HARQ_t *dl_harq);
/** \brief This function configures downlink HARQ context
@param PHY_VARS_NR_UE ue context
@param gNB_id gNodeB identifier
@param TB_id transport block identifier
@param execution_thread_number thread_number
@param number_harq_processes maximum number of downlink HARQ processes
@returns none */
void config_downlink_harq_process(PHY_VARS_NR_UE *ue, int gNB_id, int TB_id, int execution_thread_number, uint8_t number_harq_processes);
/** \brief This function releases downlink HARQ context
@param PHY_VARS_NR_UE ue context
@param gNB_id gNodeB identifier
@param TB_id transport block identifier
@param execution_thread_number thread_number
@returns none */
void release_downlink_harq_process(PHY_VARS_NR_UE *ue, int gNB_id, int TB_id, int execution_thread_number);
/** \brief This function update downlink harq context and return reception type (new transmission or retransmission) /** \brief This function update downlink harq context and return reception type (new transmission or retransmission)
@param dlsch downlink harq context @param dlsch downlink harq context
...@@ -152,7 +120,7 @@ void release_downlink_harq_process(PHY_VARS_NR_UE *ue, int gNB_id, int TB_id, in ...@@ -152,7 +120,7 @@ void release_downlink_harq_process(PHY_VARS_NR_UE *ue, int gNB_id, int TB_id, in
@param rnti_type type of rnti @param rnti_type type of rnti
@returns retransmission or new transmission */ @returns retransmission or new transmission */
harq_result_t downlink_harq_process(NR_DL_UE_HARQ_t *dlsch, int harq_pid, int ndi, uint8_t rnti_type); void downlink_harq_process(NR_DL_UE_HARQ_t *dlsch, int harq_pid, int ndi, uint8_t rnti_type);
#undef EXTERN #undef EXTERN
#undef INIT_VARIABLES_HARQ_NR_H #undef INIT_VARIABLES_HARQ_NR_H
......
This diff is collapsed.
/*
* Licensed to the OpenAirInterface (OAI) Software Alliance under one or more
* contributor license agreements. See the NOTICE file distributed with
* this work for additional information regarding copyright ownership.
* The OpenAirInterface Software Alliance licenses this file to You under
* the OAI Public License, Version 1.1 (the "License"); you may not use this file
* except in compliance with the License.
* You may obtain a copy of the License at
*
* http://www.openairinterface.org/?page_id=698
*
* Unless required by applicable law or agreed to in writing, software
* distributed under the License is distributed on an "AS IS" BASIS,
* WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
* See the License for the specific language governing permissions and
* limitations under the License.
*-------------------------------------------------------------------------------
* For more information about the OpenAirInterface (OAI) Software Alliance:
* contact@openairinterface.org
*/
/************************************************************************
*
* MODULE : PUCCH power control for UE NR
*
* DESCRIPTION : functions related to PUCCH Transmit power
* TS 38.213 7.2.1 UE behaviour
*
**************************************************************************/
#include "PHY/NR_REFSIG/ss_pbch_nr.h"
#include "PHY/defs_nr_UE.h"
#include "SCHED_NR_UE/pucch_uci_ue_nr.h"
#include "SCHED_NR_UE/pucch_power_control_ue_nr.h"
#include <openair1/PHY/LTE_ESTIMATION/lte_estimation.h>
#include <openair1/PHY/NR_UE_ESTIMATION/nr_estimation.h>
/**************** defines **************************************/
/**************** variables **************************************/
/**************** functions **************************************/
/*******************************************************************
*
* NAME : get_pucch_tx_power_ue
*
* PARAMETERS : ue context
* gNB_id identity
* slots for rx and tx
* pucch_format_nr_t pucch format
* nb_of_prbs number of prb allocated to pucch
* N_sc_ctrl_RB subcarrier control rb related to current pucch format
* N_symb_PUCCH number of pucch symbols excluding those reserved for dmrs
* O_UCI number of bits for UCI Uplink Control Information
* O_SR number of bits for SR scheduling Request
* O_UCI number of bits for CSI Channel State Information
* O_ACK number of bits for HARQ-ACK
* O_CRC number of bits for CRC
* n_HARQ_ACK use for obtaining a PUCCH transmission power
*
* RETURN : pucch power level in dBm
*
* DESCRIPTION : determines pucch transmission power in dBm
* TS 38.213 7.2.1 UE behaviour
*
*********************************************************************/
int16_t get_pucch_tx_power_ue(PHY_VARS_NR_UE *ue,
uint8_t gNB_id,
UE_nr_rxtx_proc_t *proc,
pucch_format_nr_t pucch_format,
int nb_of_prbs,
int N_sc_ctrl_RB,
int N_symb_PUCCH,
int O_UCI,
int O_SR,
int O_CSI,
int O_ACK,
int O_CRC,
int n_HARQ_ACK) {
int16_t P_O_NOMINAL_PUCCH = ue->pucch_config_common_nr[gNB_id].p0_nominal;
PUCCH_PowerControl_t *power_config = &ue->pucch_config_dedicated_nr[gNB_id].pucch_PowerControl;
int16_t P_O_UE_PUCCH;
int16_t G_b_f_c = 0;
if (ue->pucch_config_dedicated_nr[gNB_id].spatial_Relation_Info[0] != NULL) { /* FFS TODO NR */
LOG_E(PHY,"PUCCH Spatial relation infos are not yet implemented : at line %d in function %s of file %s \n", LINE_FILE , __func__, __FILE__);
return (PUCCH_POWER_DEFAULT);
}
if (power_config->p0_Set[0] != NULL) {
P_O_UE_PUCCH = power_config->p0_Set[0]->p0_PUCCH_Value; /* get from index 0 if no spatial relation set */
G_b_f_c = 0;
}
else {
G_b_f_c = ue->dlsch[proc->thread_id][gNB_id][0]->g_pucch;
LOG_D(PHY,"PUCCH Transmit power control command not yet implemented for NR : at line %d in function %s of file %s \n", LINE_FILE , __func__, __FILE__);
return (PUCCH_POWER_DEFAULT);
}
int P_O_PUCCH = P_O_NOMINAL_PUCCH + P_O_UE_PUCCH;
int16_t PL = get_nr_PL(ue->Mod_id, ue->CC_id, gNB_id); /* LTE function because NR path loss not yet implemented FFS TODO NR */
int16_t delta_F_PUCCH = power_config->deltaF_PUCCH_f[pucch_format];
int DELTA_TF;
uint16_t N_ref_PUCCH;
/* computing of pucch transmission power adjustment */
switch (pucch_format) {
case pucch_format0_nr:
{
N_ref_PUCCH = 2;
DELTA_TF = 10 * log10(N_ref_PUCCH/N_symb_PUCCH);
break;
}
case pucch_format1_nr:
{
N_ref_PUCCH = N_SYMB_SLOT;
DELTA_TF = 10 * log10(N_ref_PUCCH/N_symb_PUCCH);
break;
}
case pucch_format2_nr:
case pucch_format3_nr:
case pucch_format4_nr:
{
float N_RE = nb_of_prbs * N_sc_ctrl_RB * N_symb_PUCCH;
float K1 = 6;
/* initial phase so no higher layer parameters */
if (ue->UE_mode[gNB_id] != PUSCH) {
if (O_ACK == 0) {
n_HARQ_ACK = 0;
}
else {
n_HARQ_ACK = 1;
}
}
if (O_UCI < 12) {
DELTA_TF = 10 * log10((double)(((K1 * (n_HARQ_ACK + O_SR + O_CSI))/N_RE)));
}
else {
float K2 = 2.4;
float BPRE = (O_ACK + O_SR + O_CSI + O_CRC)/N_RE;
DELTA_TF = 10 * log10((double)(pow(2,(K2*BPRE)) - 1));
}
break;
}
default:
{
LOG_E(PHY,"PUCCH unknown pucch format : at line %d in function %s of file %s \n", LINE_FILE , __func__, __FILE__);
return (0);
}
}
if (power_config->twoPUCCH_PC_AdjustmentStates > 1) {
LOG_E(PHY,"PUCCH power control adjustment states with 2 states not yet implemented : at line %d in function %s of file %s \n", LINE_FILE , __func__, __FILE__);
return (PUCCH_POWER_DEFAULT);
}
#if 0
int k2;
/* response to a detection by the UE of a DCI format 1_0 or DCI format 1_1 */
//int K_PUCCH = 0;
if (O_ACK != 0) {
/* it assumes that PDCCH is in the first symbol of receive slot FFS TDDO NR */
//int slots_gap = (proc->nr_slot_tx > proc->nr_slot_rx ? (proc->nr_slot_tx - proc->nr_slot_rx - 1) : ((proc->nr_slot_tx + ue->frame_parms.slots_per_subframe) - proc->nr_slot_rx - 1));
//K_PUCCH = (slots_gap * (ue->frame_parms.symbols_per_tti)) - 1;
}
else {
/* field k2 is not present - to check k2 of pucch from upper layer FFS TDDO NR */
if (ue->pusch_config.pusch_TimeDomainResourceAllocation[0] == NULL) {
if (ue->frame_parms.numerology_index == 0) {
k2 = 1;
}
else {
k2 = ue->frame_parms.numerology_index;
}
}
else
{
/* get minimum value of k2 */
int i = 0;
int k2_min = 32; /* max value of k2 */
do {
k2 = ue->pusch_config.pusch_TimeDomainResourceAllocation[i]->k2;
if (k2 < k2_min) {
k2_min = k2;
}
i++;
if (i >= MAX_NR_OF_UL_ALLOCATIONS) {
break;
}
} while(ue->pusch_config.pusch_TimeDomainResourceAllocation[i] != NULL);
k2 = k2_min;
}
//K_PUCCH = N_SYMB_SLOT * k2; /* the product of a number of symbols per slot and the minimum of the values provided by higher layer parameter k2 */
}
#endif
int contributor = (10 * log10((double)(pow(2,(ue->frame_parms.numerology_index)) * nb_of_prbs)));
int16_t pucch_power = P_O_PUCCH + contributor + PL + delta_F_PUCCH + DELTA_TF + G_b_f_c;
if (pucch_power > ue->tx_power_max_dBm) {
pucch_power = ue->tx_power_max_dBm;
}
NR_TST_PHY_PRINTF("PUCCH ( Tx power : %d dBm ) ( 10Log(...) : %d ) ( from Path Loss : %d ) ( delta_F_PUCCH : %d ) ( DELTA_TF : %d ) ( G_b_f_c : %d ) \n",
pucch_power, contributor, PL, delta_F_PUCCH, DELTA_TF, G_b_f_c);
return (pucch_power);
}
/*
* Licensed to the OpenAirInterface (OAI) Software Alliance under one or more
* contributor license agreements. See the NOTICE file distributed with
* this work for additional information regarding copyright ownership.
* The OpenAirInterface Software Alliance licenses this file to You under
* the OAI Public License, Version 1.1 (the "License"); you may not use this file
* except in compliance with the License.
* You may obtain a copy of the License at
*
* http://www.openairinterface.org/?page_id=698
*
* Unless required by applicable law or agreed to in writing, software
* distributed under the License is distributed on an "AS IS" BASIS,
* WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
* See the License for the specific language governing permissions and
* limitations under the License.
*-------------------------------------------------------------------------------
* For more information about the OpenAirInterface (OAI) Software Alliance:
* contact@openairinterface.org
*/
/************************************************************************
*
* MODULE : PUCCH power control for UE NR
*
* DESCRIPTION : functions related to PUCCH Transmit power
* TS 38.213 7.2.1 UE behaviour
*
**************************************************************************/
#ifndef PUCCH_POWER_CONTROL_H
#define PUCCH_POWER_CONTROL_H
/*************** INCLUDE *******************************************/
/*************** DEFINE ********************************************/
#define PUCCH_POWER_DEFAULT (0) /* in dBm */
/*************** VARIABLES *****************************************/
/*************** FUNCTIONS *****************************************/
/** \brief This function returns pucch power level in dBm
@param ue context
@param gNB_id identity
@param slots for rx and tx
@param pucch_format_nr_t pucch format
@param nb_of_prbs number of prb allocated to pucch
@param N_sc_ctrl_RB subcarrier control rb related to current pucch format
@param N_symb_PUCCH number of pucch symbols excluding those reserved for dmrs
@param O_UCI number of bits for UCI Uplink Control Information
@param O_SR number of bits for SR scheduling Request
@param int O_UCI number of bits for CSI Channel State Information
@param O_ACK number of bits for HARQ-ACK
@param O_CRC number of bits for CRC
@param n_HARQ_ACK use for obtaining a PUCCH transmission power
@returns pucch power level in dBm */
int16_t get_pucch_tx_power_ue(PHY_VARS_NR_UE *ue, uint8_t gNB_id, UE_nr_rxtx_proc_t *proc, pucch_format_nr_t pucch_format,
int nb_of_prbs, int N_sc_ctrl_RB, int N_symb_PUCCH, int O_UCI, int O_SR, int O_CSI, int O_ACK,
int O_CRC, int n_HARQ_ACK);
#endif /* PUCCH_POWER_CONTROL_H */
This diff is collapsed.
...@@ -58,51 +58,12 @@ ...@@ -58,51 +58,12 @@
#define BITS_PER_SYMBOL_BPSK (1) /* 1 bit per symbol for bpsk modulation */ #define BITS_PER_SYMBOL_BPSK (1) /* 1 bit per symbol for bpsk modulation */
#define BITS_PER_SYMBOL_QPSK (2) /* 2 bits per symbol for bpsk modulation */ #define BITS_PER_SYMBOL_QPSK (2) /* 2 bits per symbol for bpsk modulation */
/************** VARIABLES *****************************************/
#define NB_SYMBOL_MINUS_FOUR (11)
#define I_PUCCH_NO_ADDITIONAL_DMRS (0)
#define I_PUCCH_ADDITIONAL_DMRS (1)
#define I_PUCCH_NO_HOPPING (0)
#define I_PUCCH_HOPING (1)
/*************** FUNCTIONS ****************************************/ /*************** FUNCTIONS ****************************************/
bool pucch_procedures_ue_nr(PHY_VARS_NR_UE *ue, uint8_t gNB_id, UE_nr_rxtx_proc_t *proc, bool reset_harq); void pucch_procedures_ue_nr(PHY_VARS_NR_UE *ue,
uint8_t gNB_id,
/** \brief This function return number of downlink acknowledgement and its bitmap UE_nr_rxtx_proc_t *proc);
@param ue context
@param gNB_id identity
@param slots for rx and tx
@param o_ACK HARQ-ACK information bits
@param n_HARQ_ACK use for obtaining a PUCCH transmission power
@param do_reset reset downlink HARQ context
@returns number of bits of o_ACK */
uint8_t get_downlink_ack(PHY_VARS_NR_UE *ue, uint8_t gNB_id, UE_nr_rxtx_proc_t *proc, uint32_t *o_ACK,
int *n_HARQ_ACK, bool do_reset);
/** \brief This function selects a pucch resource
@param ue context
@param gNB_id identity
@param uci size number of uci bits
@param pucch_resource_indicator is from downlink DCI
@param initial_pucch_id pucch resource id for initial phase
@param resource_set_id pucch resource set if any
@param resource_id pucch resource id if any
@returns TRUE a pucch resource has been found FALSE no valid pucch resource */
boolean_t select_pucch_resource(PHY_VARS_NR_UE *ue, NR_UE_MAC_INST_t *mac, uint8_t gNB_id, int uci_size, int pucch_resource_indicator,
int *initial_pucch_id, int *resource_set_id, int *resource_id, NR_UE_HARQ_STATUS_t *harq_status);
/** \brief This function select a pucch resource set
@param ue context
@param gNB_id identity
@param uci size number of uci bits
@returns number of the pucch resource set */
int find_pucch_resource_set(NR_UE_MAC_INST_t *mac, uint8_t gNB_id, int uci_size);
/** \brief This function check pucch format /** \brief This function check pucch format
@param ue context @param ue context
...@@ -115,14 +76,6 @@ int find_pucch_resource_set(NR_UE_MAC_INST_t *mac, uint8_t gNB_id, int uci_size) ...@@ -115,14 +76,6 @@ int find_pucch_resource_set(NR_UE_MAC_INST_t *mac, uint8_t gNB_id, int uci_size)
boolean_t check_pucch_format(NR_UE_MAC_INST_t *mac, uint8_t gNB_id, pucch_format_nr_t format_pucch, int nb_symbols_for_tx, boolean_t check_pucch_format(NR_UE_MAC_INST_t *mac, uint8_t gNB_id, pucch_format_nr_t format_pucch, int nb_symbols_for_tx,
int uci_size); int uci_size);
/** \brief This function selects a pucch resource
@param ue context
@param gNB_id identity
@param slots for rx and tx
@returns TRUE a scheduling request is triggered */
int trigger_periodic_scheduling_request(PHY_VARS_NR_UE *ue, uint8_t gNB_id, UE_nr_rxtx_proc_t *proc);
/** \brief This function reads current CSI /** \brief This function reads current CSI
@param ue context @param ue context
@param gNB_id identity @param gNB_id identity
......
...@@ -758,7 +758,7 @@ int main(int argc, char **argv) ...@@ -758,7 +758,7 @@ int main(int argc, char **argv)
prepare_scd(scd); prepare_scd(scd);
fill_default_secondaryCellGroup(scc, scd, secondaryCellGroup, 0, 1, n_tx, 0, 0); fill_default_secondaryCellGroup(scc, scd, secondaryCellGroup, 0, 1, n_tx, 0, 0, 0);
/* RRC parameter validation for secondaryCellGroup */ /* RRC parameter validation for secondaryCellGroup */
fix_scd(scd); fix_scd(scd);
...@@ -1003,12 +1003,12 @@ int main(int argc, char **argv) ...@@ -1003,12 +1003,12 @@ int main(int argc, char **argv)
NR_gNB_DLSCH_t *gNB_dlsch = gNB->dlsch[0][0]; NR_gNB_DLSCH_t *gNB_dlsch = gNB->dlsch[0][0];
nfapi_nr_dl_tti_pdsch_pdu_rel15_t *rel15 = &gNB_dlsch->harq_process.pdsch_pdu.pdsch_pdu_rel15; nfapi_nr_dl_tti_pdsch_pdu_rel15_t *rel15 = &gNB_dlsch->harq_process.pdsch_pdu.pdsch_pdu_rel15;
UE_harq_process->harq_ack.ack = 0; UE_harq_process->ack = 0;
round = 0; round = 0;
UE_harq_process->round = round; UE_harq_process->round = round;
UE_harq_process->first_tx = 1; UE_harq_process->first_tx = 1;
while ((round<num_rounds) && (UE_harq_process->harq_ack.ack==0)) { while ((round<num_rounds) && (UE_harq_process->ack==0)) {
memset(RC.nrmac[0]->cce_list[1][0],0,MAX_NUM_CCE*sizeof(int)); memset(RC.nrmac[0]->cce_list[1][0],0,MAX_NUM_CCE*sizeof(int));
memset(RC.nrmac[0]->cce_list[1][1],0,MAX_NUM_CCE*sizeof(int)); memset(RC.nrmac[0]->cce_list[1][1],0,MAX_NUM_CCE*sizeof(int));
clear_nr_nfapi_information(RC.nrmac[0], 0, frame, slot); clear_nr_nfapi_information(RC.nrmac[0], 0, frame, slot);
...@@ -1242,7 +1242,7 @@ int main(int argc, char **argv) ...@@ -1242,7 +1242,7 @@ int main(int argc, char **argv)
printf("errors_bit = %u (trial %d)\n", errors_bit, trial); printf("errors_bit = %u (trial %d)\n", errors_bit, trial);
} }
roundStats[snrRun]+=((float)round); roundStats[snrRun]+=((float)round);
if (UE_harq_process->harq_ack.ack==1) effRate += ((float)TBS)/round; if (UE_harq_process->ack==1) effRate += ((float)TBS)/round;
} // noise trials } // noise trials
blerStats[snrRun] = (float) n_errors / (float) n_trials; blerStats[snrRun] = (float) n_errors / (float) n_trials;
......
...@@ -27,4 +27,5 @@ void nr_fill_rx_indication(fapi_nr_rx_indication_t *rx_ind, ...@@ -27,4 +27,5 @@ void nr_fill_rx_indication(fapi_nr_rx_indication_t *rx_ind,
uint8_t gNB_id, uint8_t gNB_id,
PHY_VARS_NR_UE *ue, PHY_VARS_NR_UE *ue,
NR_UE_DLSCH_t *dlsch0, NR_UE_DLSCH_t *dlsch0,
NR_UE_DLSCH_t *dlsch1,
uint16_t n_pdus) {} uint16_t n_pdus) {}
...@@ -457,32 +457,8 @@ int main(int argc, char **argv) ...@@ -457,32 +457,8 @@ int main(int argc, char **argv)
bzero(rxdataF[i],14*frame_parms->ofdm_symbol_size*sizeof(int)); bzero(rxdataF[i],14*frame_parms->ofdm_symbol_size*sizeof(int));
} }
//configure UE
UE = malloc(sizeof(PHY_VARS_NR_UE));
memcpy(&UE->frame_parms,frame_parms,sizeof(NR_DL_FRAME_PARMS));
UE->pucch_config_common_nr->hoppingId = Nid_cell;
//phy_init_nr_top(UE); //called from init_nr_ue_signal
UE->perfect_ce = 0;
if(eps!=0.0)
UE->UE_fo_compensation = 1; // if a frequency offset is set then perform fo estimation and compensation
if (init_nr_ue_signal(UE, 1, 0) != 0)
{
printf("Error at UE NR initialisation\n");
exit(-1);
}
uint8_t mcs=0; uint8_t mcs=0;
startingPRB_intraSlotHopping=N_RB_DL-1;
pucch_GroupHopping_t PUCCH_GroupHopping=UE->pucch_config_common_nr->pucch_GroupHopping;
uint32_t hopping_id=UE->pucch_config_common_nr->hoppingId;
uint32_t dmrs_scrambling_id = 0, data_scrambling_id=0;
//t_nrPolar_params *currentPtr;
int shift = 0; int shift = 0;
if(format==0){ if(format==0){
if (sr_flag) if (sr_flag)
shift = 1<<nr_bit; shift = 1<<nr_bit;
...@@ -496,6 +472,63 @@ int main(int argc, char **argv) ...@@ -496,6 +472,63 @@ int main(int argc, char **argv)
} }
else if (format == 2 && nr_bit > 11) gNB->uci_polarParams = nr_polar_params(2, nr_bit, nrofPRB, 1, NULL); else if (format == 2 && nr_bit > 11) gNB->uci_polarParams = nr_polar_params(2, nr_bit, nrofPRB, 1, NULL);
startingPRB_intraSlotHopping=N_RB_DL-1;
uint32_t hopping_id=Nid_cell;
uint32_t dmrs_scrambling_id = 0, data_scrambling_id=0;
//configure UE
UE = malloc(sizeof(PHY_VARS_NR_UE));
memcpy(&UE->frame_parms,frame_parms,sizeof(NR_DL_FRAME_PARMS));
fapi_nr_ul_config_pucch_pdu pucch_tx_pdu;
if (format==0) {
pucch_tx_pdu.format_type = 0;
pucch_tx_pdu.nr_of_symbols = nrofSymbols;
pucch_tx_pdu.start_symbol_index = startingSymbolIndex;
pucch_tx_pdu.bwp_start = 0;
pucch_tx_pdu.prb_start = startingPRB;
pucch_tx_pdu.hopping_id = hopping_id;
pucch_tx_pdu.group_hop_flag = 0;
pucch_tx_pdu.sequence_hop_flag = 0;
pucch_tx_pdu.freq_hop_flag = 0;
pucch_tx_pdu.mcs = mcs;
pucch_tx_pdu.initial_cyclic_shift = 0;
pucch_tx_pdu.second_hop_prb = startingPRB_intraSlotHopping;
}
if (format==2) {
pucch_tx_pdu.format_type = 2;
pucch_tx_pdu.rnti = 0x1234;
pucch_tx_pdu.n_bit = nr_bit;
pucch_tx_pdu.payload = actual_payload;
pucch_tx_pdu.nr_of_symbols = nrofSymbols;
pucch_tx_pdu.start_symbol_index = startingSymbolIndex;
pucch_tx_pdu.bwp_start = 0;
pucch_tx_pdu.prb_start = startingPRB;
pucch_tx_pdu.prb_size = nrofPRB;
pucch_tx_pdu.hopping_id = hopping_id;
pucch_tx_pdu.group_hop_flag = 0;
pucch_tx_pdu.sequence_hop_flag = 0;
pucch_tx_pdu.freq_hop_flag = 0;
pucch_tx_pdu.dmrs_scrambling_id = dmrs_scrambling_id;
pucch_tx_pdu.data_scrambling_id = data_scrambling_id;
pucch_tx_pdu.second_hop_prb = startingPRB_intraSlotHopping;
}
UE->perfect_ce = 0;
if(eps!=0.0)
UE->UE_fo_compensation = 1; // if a frequency offset is set then perform fo estimation and compensation
if (init_nr_ue_signal(UE, 1, 0) != 0)
{
printf("Error at UE NR initialisation\n");
exit(-1);
}
pucch_GroupHopping_t PUCCH_GroupHopping = pucch_tx_pdu.group_hop_flag + (pucch_tx_pdu.sequence_hop_flag<<1);
//t_nrPolar_params *currentPtr;
for(SNR=snr0;SNR<=snr1;SNR=SNR+1){ for(SNR=snr0;SNR<=snr1;SNR=SNR+1){
ack_nack_errors=0; ack_nack_errors=0;
sr_errors=0; sr_errors=0;
...@@ -503,13 +536,28 @@ int main(int argc, char **argv) ...@@ -503,13 +536,28 @@ int main(int argc, char **argv)
for (trial=0; trial<n_trials; trial++) { for (trial=0; trial<n_trials; trial++) {
bzero(txdataF[aa],frame_parms->ofdm_symbol_size*sizeof(int)); bzero(txdataF[aa],frame_parms->ofdm_symbol_size*sizeof(int));
if(format==0){ if(format==0){
nr_generate_pucch0(UE,txdataF,frame_parms,PUCCH_GroupHopping,hopping_id,amp,nr_slot_tx,m0,mcs,nrofSymbols,startingSymbolIndex,startingPRB, 0); nr_generate_pucch0(UE,
txdataF,
frame_parms,
amp,
nr_slot_tx,
&pucch_tx_pdu);
} }
else if (format == 1){ else if (format == 1){
nr_generate_pucch1(UE,txdataF,frame_parms,UE->pucch_config_dedicated,actual_payload,amp,nr_slot_tx,m0,nrofSymbols,startingSymbolIndex,startingPRB,startingPRB_intraSlotHopping,0,nr_bit); nr_generate_pucch1(UE,
txdataF,
frame_parms,
amp,
nr_slot_tx,
&pucch_tx_pdu);
} }
else { else {
nr_generate_pucch2(UE,0x1234,dmrs_scrambling_id,data_scrambling_id,txdataF,frame_parms,UE->pucch_config_dedicated,actual_payload,amp,nr_slot_tx,nrofSymbols,startingSymbolIndex,nrofPRB,startingPRB,nr_bit); nr_generate_pucch2(UE,
txdataF,
frame_parms,
amp,
nr_slot_tx,
&pucch_tx_pdu);
} }
int txlev = signal_energy(&txdataF[aa][startingSymbolIndex*frame_parms->ofdm_symbol_size], int txlev = signal_energy(&txdataF[aa][startingSymbolIndex*frame_parms->ofdm_symbol_size],
......
...@@ -309,7 +309,7 @@ int main(int argc, char **argv) ...@@ -309,7 +309,7 @@ int main(int argc, char **argv)
uint16_t ptrsSymbPerSlot = 0; uint16_t ptrsSymbPerSlot = 0;
uint16_t ptrsRePerSymb = 0; uint16_t ptrsRePerSymb = 0;
uint8_t transform_precoding = transform_precoder_disabled; // 0 - ENABLE, 1 - DISABLE uint8_t transform_precoding = 1; // 0 - ENABLE, 1 - DISABLE
uint8_t num_dmrs_cdm_grps_no_data = 1; uint8_t num_dmrs_cdm_grps_no_data = 1;
uint8_t mcs_table = 0; uint8_t mcs_table = 0;
...@@ -566,7 +566,7 @@ int main(int argc, char **argv) ...@@ -566,7 +566,7 @@ int main(int argc, char **argv)
case 'Z': case 'Z':
transform_precoding = transform_precoder_enabled; transform_precoding = 0; // enabled
num_dmrs_cdm_grps_no_data = 2; num_dmrs_cdm_grps_no_data = 2;
mcs_table = 3; mcs_table = 3;
...@@ -697,7 +697,7 @@ int main(int argc, char **argv) ...@@ -697,7 +697,7 @@ int main(int argc, char **argv)
prepare_scd(scd); prepare_scd(scd);
fill_default_secondaryCellGroup(scc, scd, secondaryCellGroup, 0, 1, n_tx, 0, 0); fill_default_secondaryCellGroup(scc, scd, secondaryCellGroup, 0, 1, n_tx, 0, 0, 0);
// xer_fprint(stdout, &asn_DEF_NR_CellGroupConfig, (const void*)secondaryCellGroup); // xer_fprint(stdout, &asn_DEF_NR_CellGroupConfig, (const void*)secondaryCellGroup);
...@@ -840,7 +840,8 @@ int main(int argc, char **argv) ...@@ -840,7 +840,8 @@ int main(int argc, char **argv)
uint16_t number_dmrs_symbols = get_dmrs_symbols_in_slot(l_prime_mask, nb_symb_sch); uint16_t number_dmrs_symbols = get_dmrs_symbols_in_slot(l_prime_mask, nb_symb_sch);
uint8_t nb_re_dmrs = (dmrs_config_type == pusch_dmrs_type1) ? 6 : 4; uint8_t nb_re_dmrs = (dmrs_config_type == pusch_dmrs_type1) ? 6 : 4;
if (transform_precoding == transform_precoder_enabled) { // if transform precoding is enabled
if (transform_precoding == 0) {
AssertFatal(enable_ptrs == 0, "PTRS NOT SUPPORTED IF TRANSFORM PRECODING IS ENABLED\n"); AssertFatal(enable_ptrs == 0, "PTRS NOT SUPPORTED IF TRANSFORM PRECODING IS ENABLED\n");
...@@ -1045,7 +1046,8 @@ int main(int argc, char **argv) ...@@ -1045,7 +1046,8 @@ int main(int argc, char **argv)
pusch_pdu->pusch_ptrs.ptrs_ports_list = (nfapi_nr_ptrs_ports_t *) malloc(2*sizeof(nfapi_nr_ptrs_ports_t)); pusch_pdu->pusch_ptrs.ptrs_ports_list = (nfapi_nr_ptrs_ports_t *) malloc(2*sizeof(nfapi_nr_ptrs_ports_t));
pusch_pdu->pusch_ptrs.ptrs_ports_list[0].ptrs_re_offset = 0; pusch_pdu->pusch_ptrs.ptrs_ports_list[0].ptrs_re_offset = 0;
if (transform_precoding == transform_precoder_enabled) { // if transform precoding is enabled
if (transform_precoding == 0) {
pusch_pdu->dfts_ofdm.low_papr_group_number = *scc->physCellId % 30; // U as defined in 38.211 section 6.4.1.1.1.2 pusch_pdu->dfts_ofdm.low_papr_group_number = *scc->physCellId % 30; // U as defined in 38.211 section 6.4.1.1.1.2
pusch_pdu->dfts_ofdm.low_papr_sequence_number = 0; // V as defined in 38.211 section 6.4.1.1.1.2 pusch_pdu->dfts_ofdm.low_papr_sequence_number = 0; // V as defined in 38.211 section 6.4.1.1.1.2
...@@ -1105,7 +1107,8 @@ int main(int argc, char **argv) ...@@ -1105,7 +1107,8 @@ int main(int argc, char **argv)
ul_config.ul_config_list[0].pusch_config_pdu.transform_precoding = transform_precoding; ul_config.ul_config_list[0].pusch_config_pdu.transform_precoding = transform_precoding;
if (transform_precoding == transform_precoder_enabled) { // if transform precoding is enabled
if (transform_precoding == 0) {
ul_config.ul_config_list[0].pusch_config_pdu.dfts_ofdm.low_papr_group_number = *scc->physCellId % 30;// U as defined in 38.211 section 6.4.1.1.1.2 ul_config.ul_config_list[0].pusch_config_pdu.dfts_ofdm.low_papr_group_number = *scc->physCellId % 30;// U as defined in 38.211 section 6.4.1.1.1.2
ul_config.ul_config_list[0].pusch_config_pdu.dfts_ofdm.low_papr_sequence_number = 0;// V as defined in 38.211 section 6.4.1.1.1.2 ul_config.ul_config_list[0].pusch_config_pdu.dfts_ofdm.low_papr_sequence_number = 0;// V as defined in 38.211 section 6.4.1.1.1.2
...@@ -1215,7 +1218,7 @@ int main(int argc, char **argv) ...@@ -1215,7 +1218,7 @@ int main(int argc, char **argv)
} }
if (n_trials == 1 && round==0) { if (n_trials == 1 && round==0) {
#ifdef __AVX2__ #ifdef __AVX2__
int off = ((nb_rb&1) == 1)? 4:0; int off = ((nb_rb&1) == 1)? 4:0;
#else #else
......
...@@ -411,6 +411,7 @@ typedef struct NRRrcConfigurationReq_s { ...@@ -411,6 +411,7 @@ typedef struct NRRrcConfigurationReq_s {
int ssb_SubcarrierOffset; int ssb_SubcarrierOffset;
int pdsch_AntennaPorts; int pdsch_AntennaPorts;
int pusch_AntennaPorts; int pusch_AntennaPorts;
int do_CSIRS;
int pusch_TargetSNRx10; int pusch_TargetSNRx10;
int pucch_TargetSNRx10; int pucch_TargetSNRx10;
} gNB_RrcConfigurationReq; } gNB_RrcConfigurationReq;
......
...@@ -1045,6 +1045,8 @@ void RCconfig_NRRRC(MessageDef *msg_p, uint32_t i, gNB_RRC_INST *rrc) { ...@@ -1045,6 +1045,8 @@ void RCconfig_NRRRC(MessageDef *msg_p, uint32_t i, gNB_RRC_INST *rrc) {
NRRRC_CONFIGURATION_REQ (msg_p).pdsch_AntennaPorts = *GNBParamList.paramarray[i][GNB_PDSCH_ANTENNAPORTS_IDX].iptr; NRRRC_CONFIGURATION_REQ (msg_p).pdsch_AntennaPorts = *GNBParamList.paramarray[i][GNB_PDSCH_ANTENNAPORTS_IDX].iptr;
printf("pusch_AntennaPorts %d\n",*GNBParamList.paramarray[i][GNB_PUSCH_ANTENNAPORTS_IDX].iptr); printf("pusch_AntennaPorts %d\n",*GNBParamList.paramarray[i][GNB_PUSCH_ANTENNAPORTS_IDX].iptr);
NRRRC_CONFIGURATION_REQ (msg_p).pusch_AntennaPorts = *GNBParamList.paramarray[i][GNB_PUSCH_ANTENNAPORTS_IDX].iptr; NRRRC_CONFIGURATION_REQ (msg_p).pusch_AntennaPorts = *GNBParamList.paramarray[i][GNB_PUSCH_ANTENNAPORTS_IDX].iptr;
printf("Do CSI-RS %d\n",*GNBParamList.paramarray[i][GNB_DO_CSIRS_IDX].iptr);
NRRRC_CONFIGURATION_REQ (msg_p).do_CSIRS = *GNBParamList.paramarray[i][GNB_DO_CSIRS_IDX].iptr;
NRRRC_CONFIGURATION_REQ (msg_p).scc = scc; NRRRC_CONFIGURATION_REQ (msg_p).scc = scc;
NRRRC_CONFIGURATION_REQ (msg_p).scd = scd; NRRRC_CONFIGURATION_REQ (msg_p).scd = scd;
......
...@@ -116,6 +116,7 @@ typedef enum { ...@@ -116,6 +116,7 @@ typedef enum {
#define GNB_CONFIG_STRING_SSBSUBCARRIEROFFSET "ssb_SubcarrierOffset" #define GNB_CONFIG_STRING_SSBSUBCARRIEROFFSET "ssb_SubcarrierOffset"
#define GNB_CONFIG_STRING_PDSCHANTENNAPORTS "pdsch_AntennaPorts" #define GNB_CONFIG_STRING_PDSCHANTENNAPORTS "pdsch_AntennaPorts"
#define GNB_CONFIG_STRING_PUSCHANTENNAPORTS "pusch_AntennaPorts" #define GNB_CONFIG_STRING_PUSCHANTENNAPORTS "pusch_AntennaPorts"
#define GNB_CONFIG_STRING_DOCSIRS "do_CSIRS"
#define GNB_CONFIG_STRING_NRCELLID "nr_cellid" #define GNB_CONFIG_STRING_NRCELLID "nr_cellid"
/*-----------------------------------------------------------------------------------------------------------------------------------------*/ /*-----------------------------------------------------------------------------------------------------------------------------------------*/
...@@ -140,7 +141,8 @@ typedef enum { ...@@ -140,7 +141,8 @@ typedef enum {
{GNB_CONFIG_STRING_SSBSUBCARRIEROFFSET, NULL, 0, iptr:NULL, defintval:31, TYPE_INT, 0}, \ {GNB_CONFIG_STRING_SSBSUBCARRIEROFFSET, NULL, 0, iptr:NULL, defintval:31, TYPE_INT, 0}, \
{GNB_CONFIG_STRING_PDSCHANTENNAPORTS, NULL, 0, iptr:NULL, defintval:1, TYPE_INT, 0}, \ {GNB_CONFIG_STRING_PDSCHANTENNAPORTS, NULL, 0, iptr:NULL, defintval:1, TYPE_INT, 0}, \
{GNB_CONFIG_STRING_PUSCHANTENNAPORTS, NULL, 0, iptr:NULL, defintval:1, TYPE_INT, 0}, \ {GNB_CONFIG_STRING_PUSCHANTENNAPORTS, NULL, 0, iptr:NULL, defintval:1, TYPE_INT, 0}, \
{GNB_CONFIG_STRING_NRCELLID , NULL, 0, u64ptr:NULL, defint64val:1, TYPE_UINT64, 0}, \ {GNB_CONFIG_STRING_DOCSIRS, NULL, 0, iptr:NULL, defintval:0, TYPE_INT, 0}, \
{GNB_CONFIG_STRING_NRCELLID , NULL, 0, u64ptr:NULL, defint64val:1, TYPE_UINT64, 0}, \
} }
#define GNB_GNB_ID_IDX 0 #define GNB_GNB_ID_IDX 0
...@@ -160,7 +162,8 @@ typedef enum { ...@@ -160,7 +162,8 @@ typedef enum {
#define GNB_SSB_SUBCARRIEROFFSET_IDX 14 #define GNB_SSB_SUBCARRIEROFFSET_IDX 14
#define GNB_PDSCH_ANTENNAPORTS_IDX 15 #define GNB_PDSCH_ANTENNAPORTS_IDX 15
#define GNB_PUSCH_ANTENNAPORTS_IDX 16 #define GNB_PUSCH_ANTENNAPORTS_IDX 16
#define GNB_NRCELLID_IDX 17 #define GNB_DO_CSIRS_IDX 17
#define GNB_NRCELLID_IDX 18
#define TRACKING_AREA_CODE_OKRANGE {0x0001,0xFFFD} #define TRACKING_AREA_CODE_OKRANGE {0x0001,0xFFFD}
#define GNBPARAMS_CHECK { \ #define GNBPARAMS_CHECK { \
......
...@@ -139,8 +139,25 @@ void get_type0_PDCCH_CSS_config_parameters(NR_Type0_PDCCH_CSS_config_t *type0_PD ...@@ -139,8 +139,25 @@ void get_type0_PDCCH_CSS_config_parameters(NR_Type0_PDCCH_CSS_config_t *type0_PD
uint16_t get_ssb_start_symbol(const long band, NR_SubcarrierSpacing_t scs, int i_ssb); uint16_t get_ssb_start_symbol(const long band, NR_SubcarrierSpacing_t scs, int i_ssb);
uint16_t compute_pucch_prb_size(uint8_t format,
uint8_t nr_prbs,
uint16_t O_tot,
uint16_t O_csi,
NR_PUCCH_MaxCodeRate_t *maxCodeRate,
uint8_t Qm,
uint8_t n_symb,
uint8_t n_re_ctrl);
int16_t get_N_RA_RB (int delta_f_RA_PRACH,int delta_f_PUSCH); int16_t get_N_RA_RB (int delta_f_RA_PRACH,int delta_f_PUSCH);
void find_period_offest_SR (NR_SchedulingRequestResourceConfig_t *SchedulingReqRec, int *period, int *offset);
void csi_period_offset(NR_CSI_ReportConfig_t *csirep,
NR_NZP_CSI_RS_Resource_t *nzpcsi,
int *period, int *offset);
void reverse_n_bits(uint8_t *value, uint16_t bitlen);
bool set_dl_ptrs_values(NR_PTRS_DownlinkConfig_t *ptrs_config, bool set_dl_ptrs_values(NR_PTRS_DownlinkConfig_t *ptrs_config,
uint16_t rbSize, uint8_t mcsIndex, uint8_t mcsTable, uint16_t rbSize, uint8_t mcsIndex, uint8_t mcsTable,
uint8_t *K_ptrs, uint8_t *L_ptrs,uint8_t *portIndex, uint8_t *K_ptrs, uint8_t *L_ptrs,uint8_t *portIndex,
......
...@@ -302,6 +302,20 @@ typedef struct { ...@@ -302,6 +302,20 @@ typedef struct {
} RA_config_t; } RA_config_t;
typedef struct {
bool active;
bool ack_received;
uint8_t pucch_resource_indicator;
uint16_t feedback_to_ul;
frame_t dl_frame;
int dl_slot;
uint8_t ack;
uint8_t dai;
int n_CCE;
int N_CCE;
int8_t delta_pucch;
} NR_UE_HARQ_STATUS_t;
typedef struct { typedef struct {
uint8_t freq_hopping; uint8_t freq_hopping;
...@@ -311,6 +325,22 @@ typedef struct { ...@@ -311,6 +325,22 @@ typedef struct {
} RAR_grant_t; } RAR_grant_t;
typedef struct {
int n_HARQ_ACK;
uint32_t ack_payload;
uint8_t sr_payload;
uint32_t csi_part1_payload;
uint32_t csi_part2_payload;
int resource_indicator;
int resource_set_id;
int initial_pucch_id;
NR_PUCCH_Resource_t *pucch_resource;
int n_CCE;
int N_CCE;
int8_t delta_pucch;
} PUCCH_sched_t;
/*!\brief Top level UE MAC structure */ /*!\brief Top level UE MAC structure */
typedef struct { typedef struct {
...@@ -362,6 +392,9 @@ typedef struct { ...@@ -362,6 +392,9 @@ typedef struct {
RA_config_t ra; RA_config_t ra;
/// SSB index from MIB decoding /// SSB index from MIB decoding
uint8_t mib_ssb; uint8_t mib_ssb;
/// measured SSB RSRP in dBm
short ssb_rsrp_dBm;
/// Last NDI of UL HARQ processes /// Last NDI of UL HARQ processes
uint8_t UL_ndi[NR_MAX_HARQ_PROCESSES]; uint8_t UL_ndi[NR_MAX_HARQ_PROCESSES];
/// first ULTX of UL HARQ processes /// first ULTX of UL HARQ processes
...@@ -388,6 +421,8 @@ typedef struct { ...@@ -388,6 +421,8 @@ typedef struct {
dci_pdu_rel15_t def_dci_pdu_rel15[8]; dci_pdu_rel15_t def_dci_pdu_rel15[8];
NR_UE_HARQ_STATUS_t dl_harq_info[16];
} NR_UE_MAC_INST_t; } NR_UE_MAC_INST_t;
typedef enum seach_space_mask_e { typedef enum seach_space_mask_e {
......
...@@ -37,6 +37,9 @@ ...@@ -37,6 +37,9 @@
#include "PHY/defs_nr_UE.h" #include "PHY/defs_nr_UE.h"
#include "RRC/NR_UE/rrc_defs.h" #include "RRC/NR_UE/rrc_defs.h"
#define NR_DL_MAX_DAI (4) /* TS 38.213 table 9.1.3-1 Value of counter DAI for DCI format 1_0 and 1_1 */
#define NR_DL_MAX_NB_CW (2) /* number of downlink code word */
/**\brief decode mib pdu in NR_UE, from if_module ul_ind with P7 tx_ind message /**\brief decode mib pdu in NR_UE, from if_module ul_ind with P7 tx_ind message
\param module_id module id \param module_id module id
\param cc_id component carrier id \param cc_id component carrier id
...@@ -65,11 +68,11 @@ int8_t nr_ue_decode_mib( ...@@ -65,11 +68,11 @@ int8_t nr_ue_decode_mib(
\param pduP pointer to pdu \param pduP pointer to pdu
\param pdu_length length of pdu */ \param pdu_length length of pdu */
int8_t nr_ue_decode_BCCH_DL_SCH(module_id_t module_id, int8_t nr_ue_decode_BCCH_DL_SCH(module_id_t module_id,
int cc_id, int cc_id,
unsigned int gNB_index, unsigned int gNB_index,
uint32_t sibs_mask, uint8_t ack_nack,
uint8_t *pduP, uint8_t *pduP,
uint32_t pdu_len); uint32_t pdu_len);
/**\brief primitive from RRC layer to MAC layer for configuration L1/L2, now supported 4 rrc messages: MIB, cell_group_config for MAC/PHY, spcell_config(serving cell config) /**\brief primitive from RRC layer to MAC layer for configuration L1/L2, now supported 4 rrc messages: MIB, cell_group_config for MAC/PHY, spcell_config(serving cell config)
\param module_id module id \param module_id module id
...@@ -122,25 +125,35 @@ void fill_scheduled_response(nr_scheduled_response_t *scheduled_response, ...@@ -122,25 +125,35 @@ void fill_scheduled_response(nr_scheduled_response_t *scheduled_response,
int slot, int slot,
int thread_id); int thread_id);
/* \brief Get SR payload (0,1) from UE MAC int8_t nr_ue_get_SR(module_id_t module_idP, frame_t frameP, int slotP);
@param Mod_id Instance id of UE in machine
@param CC_id Component Carrier index
@param eNB_id Index of eNB that UE is attached to
@param rnti C_RNTI of UE
@param subframe subframe number
@returns 0 for no SR, 1 for SR
*/
uint32_t ue_get_SR(module_id_t module_idP, int CC_id, frame_t frameP,
uint8_t eNB_id, rnti_t rnti, sub_frame_t subframe);
int8_t nr_ue_get_SR(module_id_t module_idP, int CC_id, frame_t frameP, uint8_t eNB_id, uint16_t rnti, sub_frame_t subframe);
int8_t nr_ue_process_dci(module_id_t module_id, int cc_id, uint8_t gNB_index, frame_t frame, int slot, dci_pdu_rel15_t *dci, uint16_t rnti, uint8_t dci_format); int8_t nr_ue_process_dci(module_id_t module_id, int cc_id, uint8_t gNB_index, frame_t frame, int slot, dci_pdu_rel15_t *dci, fapi_nr_dci_indication_pdu_t *dci_ind);
int nr_ue_process_dci_indication_pdu(module_id_t module_id, int cc_id, int gNB_index, frame_t frame, int slot, fapi_nr_dci_indication_pdu_t *dci); int nr_ue_process_dci_indication_pdu(module_id_t module_id, int cc_id, int gNB_index, frame_t frame, int slot, fapi_nr_dci_indication_pdu_t *dci);
uint32_t get_ssb_frame(uint32_t test); uint32_t get_ssb_frame(uint32_t test);
uint32_t mr_ue_get_SR(module_id_t module_idP, int CC_id, frame_t frameP, uint8_t eNB_id, uint16_t rnti, sub_frame_t subframe); bool trigger_periodic_scheduling_request(NR_UE_MAC_INST_t *mac,
PUCCH_sched_t *pucch,
frame_t frame,
int slot);
uint8_t nr_get_csi_measurements(NR_UE_MAC_INST_t *mac,
frame_t frame,
int slot,
PUCCH_sched_t *pucch);
uint8_t get_ssb_rsrp_payload(NR_UE_MAC_INST_t *mac,
PUCCH_sched_t *pucch,
struct NR_CSI_ReportConfig *csi_reportconfig,
NR_CSI_ResourceConfigId_t csi_ResourceConfigId,
NR_CSI_MeasConfig_t *csi_MeasConfig);
uint8_t nr_get_csi_payload(NR_UE_MAC_INST_t *mac,
PUCCH_sched_t *pucch,
NR_CSI_MeasConfig_t *csi_MeasConfig);
uint8_t get_rsrp_index(int rsrp);
uint8_t get_rsrp_diff_index(int best_rsrp,int current_rsrp);
/* \brief Get payload (MAC PDU) from UE PHY /* \brief Get payload (MAC PDU) from UE PHY
@param dl_info pointer to dl indication @param dl_info pointer to dl indication
...@@ -197,6 +210,58 @@ int set_tdd_config_nr_ue(fapi_nr_config_request_t *cfg, int mu, ...@@ -197,6 +210,58 @@ int set_tdd_config_nr_ue(fapi_nr_config_request_t *cfg, int mu,
int nrofDownlinkSlots, int nrofDownlinkSymbols, int nrofDownlinkSlots, int nrofDownlinkSymbols,
int nrofUplinkSlots, int nrofUplinkSymbols); int nrofUplinkSlots, int nrofUplinkSymbols);
void set_harq_status(NR_UE_MAC_INST_t *mac,
uint8_t pucch_id,
uint8_t harq_id,
int8_t delta_pucch,
uint8_t data_toul_fb,
uint8_t dai,
int n_CCE,
int N_CCE,
frame_t frame,
int slot);
void update_harq_status(nr_downlink_indication_t *dl_info,
int pdu_id);
uint8_t get_downlink_ack(NR_UE_MAC_INST_t *mac,
frame_t frame,
int slot,
PUCCH_sched_t *pucch);
int find_pucch_resource_set(NR_UE_MAC_INST_t *mac, int uci_size);
void select_pucch_resource(NR_UE_MAC_INST_t *mac,
PUCCH_sched_t *pucch);
int16_t get_pucch_tx_power_ue(NR_UE_MAC_INST_t *mac,
NR_PUCCH_Config_t *pucch_Config,
PUCCH_sched_t *pucch,
uint8_t format_type,
uint16_t nb_of_prbs,
uint8_t freq_hop_flag,
uint8_t add_dmrs_flag,
uint8_t N_symb_PUCCH,
int subframe_number,
int O_ACK, int O_SR,
int O_CSI, int O_CRC);
int get_deltatf(uint16_t nb_of_prbs,
uint8_t N_symb_PUCCH,
uint8_t freq_hop_flag,
uint8_t add_dmrs_flag,
int N_sc_ctrl_RB,
int n_HARQ_ACK,
int O_ACK, int O_SR,
int O_CSI, int O_CRC);
void nr_ue_configure_pucch(NR_UE_MAC_INST_t *mac,
int slot,
uint16_t rnti,
PUCCH_sched_t *pucch,
fapi_nr_ul_config_pucch_pdu *pucch_pdu,
int O_SR, int O_ACK, int O_CSI);
/** \brief Function for UE/PHY to compute PUSCH transmit power in power-control procedure. /** \brief Function for UE/PHY to compute PUSCH transmit power in power-control procedure.
@param Mod_id Module id of UE @param Mod_id Module id of UE
@returns Po_NOMINAL_PUSCH (PREAMBLE_RECEIVED_TARGET_POWER+DELTA_PREAMBLE @returns Po_NOMINAL_PUSCH (PREAMBLE_RECEIVED_TARGET_POWER+DELTA_PREAMBLE
...@@ -226,6 +291,7 @@ and fills the PRACH PDU per each FD occasion. ...@@ -226,6 +291,7 @@ and fills the PRACH PDU per each FD occasion.
@returns void @returns void
*/ */
void nr_ue_prach_scheduler(module_id_t module_idP, frame_t frameP, sub_frame_t slotP, int thread_id); void nr_ue_prach_scheduler(module_id_t module_idP, frame_t frameP, sub_frame_t slotP, int thread_id);
void nr_ue_pucch_scheduler(module_id_t module_idP, frame_t frameP, int slotP, int thread_id);
/* \brief This function schedules the Msg3 transmission /* \brief This function schedules the Msg3 transmission
@param @param
......
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...@@ -457,7 +457,7 @@ int rrc_mac_config_req_gNB(module_id_t Mod_idP, ...@@ -457,7 +457,7 @@ int rrc_mac_config_req_gNB(module_id_t Mod_idP,
ssb_SubcarrierOffset, ssb_SubcarrierOffset,
pdsch_AntennaPorts, pdsch_AntennaPorts,
pusch_AntennaPorts, pusch_AntennaPorts,
scc); scc);
LOG_D(NR_MAC, "%s() %s:%d RC.nrmac[Mod_idP]->if_inst->NR_PHY_config_req:%p\n", __FUNCTION__, __FILE__, __LINE__, RC.nrmac[Mod_idP]->if_inst->NR_PHY_config_req); LOG_D(NR_MAC, "%s() %s:%d RC.nrmac[Mod_idP]->if_inst->NR_PHY_config_req:%p\n", __FUNCTION__, __FILE__, __LINE__, RC.nrmac[Mod_idP]->if_inst->NR_PHY_config_req);
// if in nFAPI mode // if in nFAPI mode
......
...@@ -183,10 +183,6 @@ void nr_csirs_scheduling(int Mod_idP, ...@@ -183,10 +183,6 @@ void nr_csirs_scheduling(int Mod_idP,
sub_frame_t slot, sub_frame_t slot,
int n_slots_frame); int n_slots_frame);
void csi_period_offset(NR_CSI_ReportConfig_t *csirep,
NR_NZP_CSI_RS_Resource_t *nzpcsi,
int *period, int *offset);
void nr_csi_meas_reporting(int Mod_idP, void nr_csi_meas_reporting(int Mod_idP,
frame_t frameP, frame_t frameP,
sub_frame_t slotP); sub_frame_t slotP);
...@@ -333,15 +329,6 @@ int allocate_nr_CCEs(gNB_MAC_INST *nr_mac, ...@@ -333,15 +329,6 @@ int allocate_nr_CCEs(gNB_MAC_INST *nr_mac,
int m, int m,
int nr_of_candidates); int nr_of_candidates);
uint16_t compute_pucch_prb_size(uint8_t format,
uint8_t nr_prbs,
uint16_t O_tot,
uint16_t O_csi,
NR_PUCCH_MaxCodeRate_t *maxCodeRate,
uint8_t Qm,
uint8_t n_symb,
uint8_t n_re_ctrl);
int nr_get_default_pucch_res(int pucch_ResourceCommon); int nr_get_default_pucch_res(int pucch_ResourceCommon);
void compute_csi_bitlen(NR_CSI_MeasConfig_t *csi_MeasConfig, NR_UE_info_t *UE_info, int UE_id, module_id_t Mod_idP); void compute_csi_bitlen(NR_CSI_MeasConfig_t *csi_MeasConfig, NR_UE_info_t *UE_info, int UE_id, module_id_t Mod_idP);
...@@ -431,8 +418,4 @@ bool nr_find_nb_rb(uint16_t Qm, ...@@ -431,8 +418,4 @@ bool nr_find_nb_rb(uint16_t Qm,
void nr_sr_reporting(int Mod_idP, frame_t frameP, sub_frame_t slotP); void nr_sr_reporting(int Mod_idP, frame_t frameP, sub_frame_t slotP);
void periodicity__SRR (NR_SchedulingRequestResourceConfig_t *SchedulingReqRecconf,
int *period,
int *offset);
#endif /*__LAYER2_NR_MAC_PROTO_H__*/ #endif /*__LAYER2_NR_MAC_PROTO_H__*/
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...@@ -448,6 +448,7 @@ typedef struct { ...@@ -448,6 +448,7 @@ typedef struct {
int pusch_AntennaPorts; int pusch_AntennaPorts;
int pusch_TargetSNRx10; int pusch_TargetSNRx10;
int pucch_TargetSNRx10; int pucch_TargetSNRx10;
int do_CSIRS;
NR_BCCH_DL_SCH_Message_t *siblock1; NR_BCCH_DL_SCH_Message_t *siblock1;
NR_ServingCellConfigCommon_t *servingcellconfigcommon; NR_ServingCellConfigCommon_t *servingcellconfigcommon;
NR_PDCCH_ConfigSIB1_t *pdcch_ConfigSIB1; NR_PDCCH_ConfigSIB1_t *pdcch_ConfigSIB1;
......
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