Commit 0d313542 authored by Remi Hardy's avatar Remi Hardy

Integration 2021 wk13 a

-MR !1052 : Nr fapi beamindex ssb ro
This branch completes RA procedure for FR2 and includes improvements for beam index communication through FAPI interface.

-fix_rb_corruption:
A memcpy() introduced to optimize for the case of no precoding corrupted RBs which are not allocated to PDSCH in the common txdataF array.
So instead, fall back to memcpy() for each PDSCH RB.

-benetel configuration files update
parents f1762541 80bd171a
...@@ -23,6 +23,7 @@ gNBs = ...@@ -23,6 +23,7 @@ gNBs =
ssb_SubcarrierOffset = 31; //0; ssb_SubcarrierOffset = 31; //0;
pdsch_AntennaPorts = 1; pdsch_AntennaPorts = 1;
pusch_AntennaPorts = 1;
#pusch_TargetSNRx10 = 200; #pusch_TargetSNRx10 = 200;
#pucch_TargetSNRx10 = 200; #pucch_TargetSNRx10 = 200;
pusch_TargetSNRx10 = 200; pusch_TargetSNRx10 = 200;
...@@ -50,7 +51,7 @@ gNBs = ...@@ -50,7 +51,7 @@ gNBs =
#initialDownlinkBWP #initialDownlinkBWP
#genericParameters #genericParameters
# this is RBstart=84,L=13 (275*(L-1))+RBstart # this is RBstart=84,L=13 (275*(L-1))+RBstart
initialDLBWPlocationAndBandwidth = 6366; //28875; //6366; #6407; #3384; initialDLBWPlocationAndBandwidth = 6368;
# subcarrierSpacing # subcarrierSpacing
# 0=kHz15, 1=kHz30, 2=kHz60, 3=kHz120 # 0=kHz15, 1=kHz30, 2=kHz60, 3=kHz120
initialDLBWPsubcarrierSpacing = 1; initialDLBWPsubcarrierSpacing = 1;
...@@ -59,27 +60,14 @@ gNBs = ...@@ -59,27 +60,14 @@ gNBs =
initialDLBWPsearchSpaceZero = 0; initialDLBWPsearchSpaceZero = 0;
#pdsch-ConfigCommon #pdsch-ConfigCommon
#pdschTimeDomainAllocationList (up to 16 entries) #pdschTimeDomainAllocationList (up to 16 entries)
initialDLBWPk0_0 = 0; initialDLBWPk0_0 = 0; #for DL slot
#initialULBWPmappingType initialDLBWPmappingType_0 = 0; #0=typeA,1=typeB
#0=typeA,1=typeB initialDLBWPstartSymbolAndLength_0 = 40; #this is SS=1,L=13
initialDLBWPmappingType_0 = 0;
#this is SS=1,L=13 initialDLBWPk0_1 = 0; #for mixed slot
initialDLBWPstartSymbolAndLength_0 = 40; initialDLBWPmappingType_1 = 0;
initialDLBWPstartSymbolAndLength_1 = 57; #this is SS=1,L=5
initialDLBWPk0_1 = 0;
initialDLBWPmappingType_1 = 0;
#this is SS=2,L=12
initialDLBWPstartSymbolAndLength_1 = 53;
initialDLBWPk0_2 = 0;
initialDLBWPmappingType_2 = 0;
#this is SS=1,L=12
initialDLBWPstartSymbolAndLength_2 = 54;
initialDLBWPk0_3 = 0;
initialDLBWPmappingType_3 = 0;
#this is SS=1,L=4 //5 (4 is for 43, 5 is for 57)
initialDLBWPstartSymbolAndLength_3 = 57; //43; //57;
#uplinkConfigCommon #uplinkConfigCommon
#frequencyInfoUL #frequencyInfoUL
ul_frequencyBand = 78; ul_frequencyBand = 78;
...@@ -92,7 +80,7 @@ gNBs = ...@@ -92,7 +80,7 @@ gNBs =
pMax = 20; pMax = 20;
#initialUplinkBWP #initialUplinkBWP
#genericParameters #genericParameters
initialULBWPlocationAndBandwidth = 6366; //28875; //6366; #6407; #3384; initialULBWPlocationAndBandwidth = 6368;
# subcarrierSpacing # subcarrierSpacing
# 0=kHz15, 1=kHz30, 2=kHz60, 3=kHz120 # 0=kHz15, 1=kHz30, 2=kHz60, 3=kHz120
initialULBWPsubcarrierSpacing = 1; initialULBWPsubcarrierSpacing = 1;
...@@ -136,20 +124,18 @@ gNBs = ...@@ -136,20 +124,18 @@ gNBs =
# 0=unrestricted, 1=restricted type A, 2=restricted type B # 0=unrestricted, 1=restricted type A, 2=restricted type B
restrictedSetConfig = 0, restrictedSetConfig = 0,
# pusch-ConfigCommon (up to 16 elements) # pusch-ConfigCommon (up to 16 elements)
initialULBWPk2_0 = 2; initialULBWPk2_0 = 6; # used for UL slot
initialULBWPmappingType_0 = 1 initialULBWPmappingType_0 = 1
# this is SS=0 L=11 initialULBWPstartSymbolAndLength_0 = 55; # this is SS=0 L=12
initialULBWPstartSymbolAndLength_0 = 55;
initialULBWPk2_1 = 6; # used for mixed slot
initialULBWPk2_1 = 2;
initialULBWPmappingType_1 = 1; initialULBWPmappingType_1 = 1;
# this is SS=0 L=12 initialULBWPstartSymbolAndLength_1 = 24; # this is SS=10 L=2
initialULBWPstartSymbolAndLength_1 = 69;
initialULBWPk2_2 = 7; initialULBWPk2_2 = 7; # used for Msg.3 during RA
initialULBWPmappingType_2 = 1; initialULBWPmappingType_2 = 1;
# this is SS=10 L=4 initialULBWPstartSymbolAndLength_2 = 52; # this is SS=10 L=4
initialULBWPstartSymbolAndLength_2 = 52;
msg3_DeltaPreamble = 1; msg3_DeltaPreamble = 1;
#p0_NominalWithGrant =-90; #p0_NominalWithGrant =-90;
......
This diff is collapsed.
...@@ -749,6 +749,77 @@ function report_test { ...@@ -749,6 +749,77 @@ function report_test {
echo " </tr>" >> ./test_simulator_results.html echo " </tr>" >> ./test_simulator_results.html
EPC_CONFIGS=("noS1") EPC_CONFIGS=("noS1")
TRANS_MODES=("tdd")
FR_MODE=("FR2")
BW_CASES=(32)
for CN_CONFIG in ${EPC_CONFIGS[@]}
do
for TMODE in ${TRANS_MODES[@]}
do
for BW in ${BW_CASES[@]}
do
echo " <tr bgcolor = \"#8FBC8F\" >" >> ./test_simulator_results.html
if [[ $CN_CONFIG =~ .*wS1.* ]]
then
echo " <td align = \"center\" colspan = 4 >Test with EPC (aka withS1): ${TMODE} -- ${BW}PRB -- ${FR_MODE}</td>" >> ./test_simulator_results.html
else
echo " <td align = \"center\" colspan = 4 >Test without EPC (aka noS1): ${TMODE} -- ${BW}PRB -- ${FR_MODE}</td>" >> ./test_simulator_results.html
fi
echo " </tr>" >> ./test_simulator_results.html
#FR2 RA test (--do-ra option)
#build log files names tdd_${PRB}prb_${CN_CONFIG}_gnb_ra_fr2_test.log
RA_ENB_LOG=$ARCHIVES_LOC/${TMODE}_${BW}prb_${CN_CONFIG}_gnb_ra_fr2_test.log
RA_UE_LOG=$ARCHIVES_LOC/${TMODE}_${BW}prb_${CN_CONFIG}_ue_ra_fr2_test.log
if [ -f $RA_ENB_LOG ] && [ -f $RA_UE_LOG ]
then
#get rid of full path
NAME_ENB=`echo $RA_ENB_LOG | sed -e "s#$ARCHIVES_LOC/##"`
NAME_UE=`echo $RA_UE_LOG | sed -e "s#$ARCHIVES_LOC/##"`
echo " <tr>" >> ./test_simulator_results.html
echo " <td>$NAME_ENB --- $NAME_UE</td>" >> ./test_simulator_results.html
echo " <td>Check if FR2 RA proc succeeded</td>" >> ./test_simulator_results.html
#gNB RA check
GNB_RECEIVED=`egrep -c "\[RAPROC\] PUSCH with TC_RNTI (.+) received correctly" $RA_ENB_LOG`
#UE RA check
UE_RA_PROC_OK=`egrep -c "\[RAPROC\] RA procedure succeeded" $RA_UE_LOG`
if [ $GNB_RECEIVED -gt 0 ] && [ $UE_RA_PROC_OK -gt 0 ]
then
echo " <td bgcolor = \"green\" >OK</td>" >> ./test_simulator_results.html
else
echo " <td bgcolor = \"red\" >KO</td>" >> ./test_simulator_results.html
fi
echo " <td><pre>" >> ./test_simulator_results.html
if [ $GNB_RECEIVED -gt 0 ]
then
echo "<font color = \"blue\">- gNB --> RA received</font>" >> ./test_simulator_results.html
else
echo "<font color = \"red\"><b>- gNB RA NOT RECEIVED</b></font>" >> ./test_simulator_results.html
fi
if [ $UE_RA_PROC_OK -gt 0 ]
then
echo "<font color = \"blue\">- NR UE --> RA procedure succeded</font>" >> ./test_simulator_results.html
else
echo "<font color = \"red\"><b>- NR UE RA procedure failed</b></font>" >> ./test_simulator_results.html
fi
echo " </pre></td>" >> ./test_simulator_results.html
echo " </tr>" >> ./test_simulator_results.html
fi
done
done
done
EPC_CONFIGS=("noS1")
FR_MODE=("FR1")
TRANS_MODES=("fdd" "tdd") TRANS_MODES=("fdd" "tdd")
BW_CASES=(106) BW_CASES=(106)
for CN_CONFIG in ${EPC_CONFIGS[@]} for CN_CONFIG in ${EPC_CONFIGS[@]}
...@@ -760,13 +831,14 @@ function report_test { ...@@ -760,13 +831,14 @@ function report_test {
echo " <tr bgcolor = \"#8FBC8F\" >" >> ./test_simulator_results.html echo " <tr bgcolor = \"#8FBC8F\" >" >> ./test_simulator_results.html
if [[ $CN_CONFIG =~ .*wS1.* ]] if [[ $CN_CONFIG =~ .*wS1.* ]]
then then
echo " <td align = \"center\" colspan = 4 >Test with EPC (aka withS1): ${TMODE} -- ${BW}PRB </td>" >> ./test_simulator_results.html echo " <td align = \"center\" colspan = 4 >Test with EPC (aka withS1): ${TMODE} -- ${BW}PRB -- ${FR_MODE}</td>" >> ./test_simulator_results.html
else else
echo " <td align = \"center\" colspan = 4 >Test without EPC (aka noS1): ${TMODE} -- ${BW}PRB </td>" >> ./test_simulator_results.html echo " <td align = \"center\" colspan = 4 >Test without EPC (aka noS1): ${TMODE} -- ${BW}PRB -- ${FR_MODE}</td>" >> ./test_simulator_results.html
fi fi
echo " </tr>" >> ./test_simulator_results.html echo " </tr>" >> ./test_simulator_results.html
#RA test (--do-ra option)
#FR1 RA test (--do-ra option)
#build log files names #build log files names
RA_ENB_LOG=$ARCHIVES_LOC/${TMODE}_${BW}prb_${CN_CONFIG}_gnb_ra_test.log RA_ENB_LOG=$ARCHIVES_LOC/${TMODE}_${BW}prb_${CN_CONFIG}_gnb_ra_test.log
...@@ -778,7 +850,7 @@ function report_test { ...@@ -778,7 +850,7 @@ function report_test {
NAME_UE=`echo $RA_UE_LOG | sed -e "s#$ARCHIVES_LOC/##"` NAME_UE=`echo $RA_UE_LOG | sed -e "s#$ARCHIVES_LOC/##"`
echo " <tr>" >> ./test_simulator_results.html echo " <tr>" >> ./test_simulator_results.html
echo " <td>$NAME_ENB --- $NAME_UE</td>" >> ./test_simulator_results.html echo " <td>$NAME_ENB --- $NAME_UE</td>" >> ./test_simulator_results.html
echo " <td>Check if RA proc succeeded</td>" >> ./test_simulator_results.html echo " <td>Check if FR1 RA proc succeeded</td>" >> ./test_simulator_results.html
#gNB RA check #gNB RA check
GNB_RECEIVED=`egrep -c "\[RAPROC\] PUSCH with TC_RNTI (.+) received correctly" $RA_ENB_LOG` GNB_RECEIVED=`egrep -c "\[RAPROC\] PUSCH with TC_RNTI (.+) received correctly" $RA_ENB_LOG`
......
...@@ -2189,6 +2189,98 @@ function run_test_on_vm { ...@@ -2189,6 +2189,98 @@ function run_test_on_vm {
if [[ "$RUN_OPTIONS" == "complex" ]] && [[ $VM_NAME =~ .*-rf-sim.* ]] if [[ "$RUN_OPTIONS" == "complex" ]] && [[ $VM_NAME =~ .*-rf-sim.* ]]
then then
echo "############################################################"
echo "RA TEST FR2"
echo "############################################################"
#RA FR2 test, attention : has a different config file from the rest of the test
CN_CONFIG="noS1"
CONF_FILE=gnb.band261.tm1.32PRB.usrpn300.conf
S1_NOS1_CFG=0
PRB=32
FREQUENCY=28000 #28GHz
if [ ! -d $ARCHIVES_LOC ]
then
mkdir --parents $ARCHIVES_LOC
fi
local try_cnt=0
NR_STATUS=0
######### start of RA TEST loop
while [ $try_cnt -lt 5 ] #5 because it hardly succeed within CI
do
SYNC_STATUS=0
RA_FR2_STATUS=0
rm -f $ARCHIVES_LOC/tdd_${PRB}prb_${CN_CONFIG}*ra_fr2_test.log
echo "############################################################"
echo "${CN_CONFIG} : Starting the gNB"
echo "############################################################"
CURRENT_GNB_LOG_FILE=tdd_${PRB}prb_${CN_CONFIG}_gnb_ra_fr2_test.log
#last argument = 1 is to enable --do-ra for RA test
start_rf_sim_gnb $GNB_VM_CMDS "$GNB_VM_IP_ADDR" $CURRENT_GNB_LOG_FILE $PRB $CONF_FILE $S1_NOS1_CFG 1
echo "############################################################"
echo "${CN_CONFIG} : Starting the NR-UE"
echo "############################################################"
CURRENT_NR_UE_LOG_FILE=tdd_${PRB}prb_${CN_CONFIG}_ue_ra_fr2_test.log
#last argument = 1 is to enable --do-ra for RA test
start_rf_sim_nr_ue $NR_UE_VM_CMDS $NR_UE_VM_IP_ADDR $GNB_VM_IP_ADDR $CURRENT_NR_UE_LOG_FILE $PRB $FREQUENCY $S1_NOS1_CFG 1
if [ $NR_UE_SYNC -eq 0 ]
then
echo "Problem w/ gNB and NR-UE not syncing"
terminate_enb_ue_basic_sim $NR_UE_VM_CMDS $NR_UE_VM_IP_ADDR 2
terminate_enb_ue_basic_sim $GNB_VM_CMDS $GNB_VM_IP_ADDR 1
scp -o StrictHostKeyChecking=no ubuntu@$GNB_VM_IP_ADDR:/home/ubuntu/tmp/cmake_targets/log/$CURRENT_GNB_LOG_FILE $ARCHIVES_LOC
scp -o StrictHostKeyChecking=no ubuntu@$NR_UE_VM_IP_ADDR:/home/ubuntu/tmp/cmake_targets/log/$CURRENT_NR_UE_LOG_FILE $ARCHIVES_LOC
SYNC_STATUS=-1
try_cnt=$((try_cnt+1))
continue
fi
echo "############################################################"
echo "${CN_CONFIG} : Terminate gNB/NR-UE simulators"
echo "############################################################"
sleep 20
terminate_enb_ue_basic_sim $NR_UE_VM_CMDS $NR_UE_VM_IP_ADDR 2
terminate_enb_ue_basic_sim $GNB_VM_CMDS $GNB_VM_IP_ADDR 1
scp -o StrictHostKeyChecking=no ubuntu@$GNB_VM_IP_ADDR:/home/ubuntu/tmp/cmake_targets/log/$CURRENT_GNB_LOG_FILE $ARCHIVES_LOC
scp -o StrictHostKeyChecking=no ubuntu@$NR_UE_VM_IP_ADDR:/home/ubuntu/tmp/cmake_targets/log/$CURRENT_NR_UE_LOG_FILE $ARCHIVES_LOC
#check RA markers in gNB and NR UE log files
echo "############################################################"
echo "${CN_CONFIG} : Checking FR2 RA on gNB / NR-UE"
echo "############################################################"
# Proper check to be done when RA test is working!
check_ra_result $ARCHIVES_LOC/$CURRENT_GNB_LOG_FILE $ARCHIVES_LOC/$CURRENT_NR_UE_LOG_FILE
if [ $RA_FR2_STATUS -ne 0 ]
then
echo "RA FR2 test NOT OK"
echo "try_cnt = " $try_cnt
try_cnt=$((try_cnt+1))
else
try_cnt=$((try_cnt+10))
fi
done
########### end RA FR2 test
sleep 30
echo "############################################################"
echo "RA TEST FR1"
echo "############################################################"
######### redefine config for the rest of the test
CN_CONFIG="noS1"
CONF_FILE=gnb.band78.tm1.106PRB.usrpn300.conf
S1_NOS1_CFG=0
PRB=106
FREQUENCY=3510
if [ ! -d $ARCHIVES_LOC ] if [ ! -d $ARCHIVES_LOC ]
then then
mkdir --parents $ARCHIVES_LOC mkdir --parents $ARCHIVES_LOC
...@@ -2258,14 +2350,14 @@ function run_test_on_vm { ...@@ -2258,14 +2350,14 @@ function run_test_on_vm {
#check RA markers in gNB and NR UE log files #check RA markers in gNB and NR UE log files
echo "############################################################" echo "############################################################"
echo "${CN_CONFIG} : Checking RA on gNB / NR-UE" echo "${CN_CONFIG} : Checking FR1 RA on gNB / NR-UE"
echo "############################################################" echo "############################################################"
# Proper check to be done when RA test is working! # Proper check to be done when RA test is working!
check_ra_result $ARCHIVES_LOC/$CURRENT_GNB_LOG_FILE $ARCHIVES_LOC/$CURRENT_NR_UE_LOG_FILE check_ra_result $ARCHIVES_LOC/$CURRENT_GNB_LOG_FILE $ARCHIVES_LOC/$CURRENT_NR_UE_LOG_FILE
if [ $RA_STATUS -ne 0 ] if [ $RA_STATUS -ne 0 ]
then then
echo "RA test NOT OK" echo "RA FR1 test NOT OK"
echo "try_cnt = " $try_cnt echo "try_cnt = " $try_cnt
try_cnt=$((try_cnt+1)) try_cnt=$((try_cnt+1))
else else
...@@ -2401,6 +2493,7 @@ function run_test_on_vm { ...@@ -2401,6 +2493,7 @@ function run_test_on_vm {
echo "Checking run status" echo "Checking run status"
echo "############################################################" echo "############################################################"
if [ $RA_FR2_STATUS -ne 0 ]; then NR_STATUS=-1; fi
if [ $RA_STATUS -ne 0 ]; then NR_STATUS=-1; fi if [ $RA_STATUS -ne 0 ]; then NR_STATUS=-1; fi
if [ $SYNC_STATUS -ne 0 ]; then NR_STATUS=-1; fi if [ $SYNC_STATUS -ne 0 ]; then NR_STATUS=-1; fi
if [ $PING_STATUS -ne 0 ]; then NR_STATUS=-1; fi if [ $PING_STATUS -ne 0 ]; then NR_STATUS=-1; fi
......
...@@ -469,17 +469,16 @@ void init_gNB(int single_thread_flag,int wait_for_sync) { ...@@ -469,17 +469,16 @@ void init_gNB(int single_thread_flag,int wait_for_sync) {
if (RC.gNB == NULL) { if (RC.gNB == NULL) {
RC.gNB = (PHY_VARS_gNB **) malloc((1+RC.nb_nr_L1_inst)*sizeof(PHY_VARS_gNB *)); RC.gNB = (PHY_VARS_gNB **) malloc((1+RC.nb_nr_L1_inst)*sizeof(PHY_VARS_gNB *));
for (inst=0; inst<RC.nb_nr_L1_inst; inst++) { LOG_I(PHY,"gNB L1 structure RC.gNB allocated @ %p\n",RC.gNB);
RC.gNB[inst] = (PHY_VARS_gNB *) malloc(sizeof(PHY_VARS_gNB));
memset((void*)RC.gNB[inst],0,sizeof(PHY_VARS_gNB));
}
} }
LOG_I(PHY,"gNB L1 structure RC.gNB allocated @ %p\n",RC.gNB);
for (inst=0; inst<RC.nb_nr_L1_inst; inst++) { for (inst=0; inst<RC.nb_nr_L1_inst; inst++) {
LOG_I(PHY,"[lte-softmodem.c] gNB structure RC.gNB[%d] allocated @ %p\n",inst,RC.gNB[inst]); if (RC.gNB[inst] == NULL) {
RC.gNB[inst] = (PHY_VARS_gNB *) malloc(sizeof(PHY_VARS_gNB));
memset((void*)RC.gNB[inst],0,sizeof(PHY_VARS_gNB));
LOG_I(PHY,"[nr-gnb.c] gNB structure RC.gNB[%d] allocated @ %p\n",inst,RC.gNB[inst]);
}
gNB = RC.gNB[inst]; gNB = RC.gNB[inst];
gNB->abstraction_flag = 0; gNB->abstraction_flag = 0;
gNB->single_thread_flag = single_thread_flag; gNB->single_thread_flag = single_thread_flag;
...@@ -509,7 +508,7 @@ void init_gNB(int single_thread_flag,int wait_for_sync) { ...@@ -509,7 +508,7 @@ void init_gNB(int single_thread_flag,int wait_for_sync) {
} }
LOG_I(PHY,"[nr-softmodem.c] gNB structure allocated\n"); LOG_I(PHY,"[nr-gnb.c] gNB structure allocated\n");
} }
......
...@@ -755,17 +755,25 @@ void tx_rf(RU_t *ru,int frame,int slot, uint64_t timestamp) { ...@@ -755,17 +755,25 @@ void tx_rf(RU_t *ru,int frame,int slot, uint64_t timestamp) {
if (fp->freq_range==nr_FR2) { if (fp->freq_range==nr_FR2) {
// the beam index is written in bits 8-10 of the flags // the beam index is written in bits 8-10 of the flags
// bit 11 enables the gpio programming // bit 11 enables the gpio programming
// currently we switch beams every 10 slots (should = 1 TDD period in FR2) and we take the beam index of the first symbol of the first slot of this period
int beam=0; int beam=0;
//if (slot==0) beam = 11; //3 for boresight & 8 to enable if (slot%10==0) {
if (ru->common.beam_id[0][slot*fp->symbols_per_slot] < 8) {
beam = ru->common.beam_id[0][slot*fp->symbols_per_slot] | 8;
}
}
/* /*
if (slot==0 || slot==40) beam=0&8; if (slot==0 || slot==40) beam=0|8;
if (slot==10 || slot==50) beam=1&8; if (slot==10 || slot==50) beam=1|8;
if (slot==20 || slot==60) beam=2&8; if (slot==20 || slot==60) beam=2|8;
if (slot==30 || slot==70) beam=3&8; if (slot==30 || slot==70) beam=3|8;
*/ */
flags |= beam<<8; flags |= beam<<8;
}
LOG_D(HW,"slot %d, beam %d\n",slot,ru->common.beam_id[0][slot*fp->symbols_per_slot]);
}
VCD_SIGNAL_DUMPER_DUMP_VARIABLE_BY_NAME( VCD_SIGNAL_DUMPER_VARIABLES_TRX_WRITE_FLAGS, flags ); VCD_SIGNAL_DUMPER_DUMP_VARIABLE_BY_NAME( VCD_SIGNAL_DUMPER_VARIABLES_TRX_WRITE_FLAGS, flags );
VCD_SIGNAL_DUMPER_DUMP_VARIABLE_BY_NAME( VCD_SIGNAL_DUMPER_VARIABLES_FRAME_NUMBER_TX0_RU, frame ); VCD_SIGNAL_DUMPER_DUMP_VARIABLE_BY_NAME( VCD_SIGNAL_DUMPER_VARIABLES_FRAME_NUMBER_TX0_RU, frame );
VCD_SIGNAL_DUMPER_DUMP_VARIABLE_BY_NAME( VCD_SIGNAL_DUMPER_VARIABLES_TTI_NUMBER_TX0_RU, slot ); VCD_SIGNAL_DUMPER_DUMP_VARIABLE_BY_NAME( VCD_SIGNAL_DUMPER_VARIABLES_TTI_NUMBER_TX0_RU, slot );
...@@ -1721,11 +1729,9 @@ void set_function_spec_param(RU_t *ru) { ...@@ -1721,11 +1729,9 @@ void set_function_spec_param(RU_t *ru) {
ru->nr_start_if = NULL; // no if interface ru->nr_start_if = NULL; // no if interface
ru->rfdevice.host_type = RAU_HOST; ru->rfdevice.host_type = RAU_HOST;
// FK this here looks messed up. The following lines should be part of the if (ru->function == gNodeB_3GPP), shouldn't they? ru->fh_south_in = rx_rf; // local synchronous RF RX
ru->fh_south_out = tx_rf; // local synchronous RF TX
ru->fh_south_in = rx_rf; // local synchronous RF RX ru->start_rf = start_rf; // need to start the local RF interface
ru->fh_south_out = tx_rf; // local synchronous RF TX
ru->start_rf = start_rf; // need to start the local RF interface
ru->stop_rf = stop_rf; ru->stop_rf = stop_rf;
ru->start_write_thread = start_write_thread; // starting RF TX in different thread ru->start_write_thread = start_write_thread; // starting RF TX in different thread
printf("configuring ru_id %u (start_rf %p)\n", ru->idx, start_rf); printf("configuring ru_id %u (start_rf %p)\n", ru->idx, start_rf);
......
...@@ -717,12 +717,11 @@ if(!IS_SOFTMODEM_NOS1) ...@@ -717,12 +717,11 @@ if(!IS_SOFTMODEM_NOS1)
if(IS_SOFTMODEM_NOS1) if(IS_SOFTMODEM_NOS1)
init_pdcp(); init_pdcp();
if (RC.nb_nr_L1_inst > 0)
RCconfig_NR_L1();
if (RC.nb_nr_inst > 0) { if (RC.nb_nr_inst > 0) {
// don't create if node doesn't connect to RRC/S1/GTP // don't create if node doesn't connect to RRC/S1/GTP
AssertFatal(create_gNB_tasks(1) == 0,"cannot create ITTI tasks\n"); AssertFatal(create_gNB_tasks(1) == 0,"cannot create ITTI tasks\n");
} else {
printf("No ITTI, Initializing L1\n");
RCconfig_NR_L1();
} }
/* Start the agent. If it is turned off in the configuration, it won't start */ /* Start the agent. If it is turned off in the configuration, it won't start */
......
...@@ -85,12 +85,6 @@ ...@@ -85,12 +85,6 @@
* *
*/ */
#ifndef NO_RAT_NR
#define DURATION_RX_TO_TX (NR_UE_CAPABILITY_SLOT_RX_TO_TX) /* for NR this will certainly depends to such UE capability which is not yet defined */
#else
#define DURATION_RX_TO_TX (6) /* For LTE, this duration is fixed to 4 and it is linked to LTE standard for both modes FDD/TDD */
#endif
typedef enum { typedef enum {
pss = 0, pss = 0,
pbch = 1, pbch = 1,
...@@ -632,8 +626,8 @@ void *UE_thread(void *arg) { ...@@ -632,8 +626,8 @@ void *UE_thread(void *arg) {
} }
curMsg->proc.timestamp_tx = timestamp+ curMsg->proc.timestamp_tx = timestamp+
UE->frame_parms.get_samples_slot_timestamp(slot_nr, UE->frame_parms.get_samples_slot_timestamp(slot_nr,&UE->frame_parms,DURATION_RX_TO_TX)
&UE->frame_parms,DURATION_RX_TO_TX) - firstSymSamp; - firstSymSamp;
notifiedFIFO_elt_t *res; notifiedFIFO_elt_t *res;
...@@ -655,8 +649,10 @@ void *UE_thread(void *arg) { ...@@ -655,8 +649,10 @@ void *UE_thread(void *arg) {
decoded_frame_rx, curMsg->proc.frame_rx ); decoded_frame_rx, curMsg->proc.frame_rx );
// use previous timing_advance value to compute writeTimestamp // use previous timing_advance value to compute writeTimestamp
writeTimestamp = timestamp + UE->frame_parms.get_samples_slot_timestamp(slot_nr, &UE->frame_parms,DURATION_RX_TO_TX - RX_NB_TH) - writeTimestamp = timestamp+
firstSymSamp - openair0_cfg[0].tx_sample_advance - UE->N_TA_offset - timing_advance; UE->frame_parms.get_samples_slot_timestamp(slot_nr,&UE->frame_parms,DURATION_RX_TO_TX
- RX_NB_TH) - firstSymSamp - openair0_cfg[0].tx_sample_advance -
UE->N_TA_offset - timing_advance;
// but use current UE->timing_advance value to compute writeBlockSize // but use current UE->timing_advance value to compute writeBlockSize
if (UE->timing_advance != timing_advance) { if (UE->timing_advance != timing_advance) {
...@@ -685,14 +681,14 @@ void *UE_thread(void *arg) { ...@@ -685,14 +681,14 @@ void *UE_thread(void *arg) {
} }
if (flags || IS_SOFTMODEM_RFSIM) if (flags || IS_SOFTMODEM_RFSIM)
AssertFatal( writeBlockSize == AssertFatal(writeBlockSize ==
UE->rfdevice.trx_write_func(&UE->rfdevice, UE->rfdevice.trx_write_func(&UE->rfdevice,
writeTimestamp, writeTimestamp,
txp, txp,
writeBlockSize, writeBlockSize,
UE->frame_parms.nb_antennas_tx, UE->frame_parms.nb_antennas_tx,
flags),""); flags),"");
for (int i=0; i<UE->frame_parms.nb_antennas_tx; i++) for (int i=0; i<UE->frame_parms.nb_antennas_tx; i++)
memset(txp[i], 0, writeBlockSize); memset(txp[i], 0, writeBlockSize);
...@@ -731,23 +727,6 @@ void init_NR_UE(int nb_inst, char* rrc_config_path) { ...@@ -731,23 +727,6 @@ void init_NR_UE(int nb_inst, char* rrc_config_path) {
AssertFatal((rrc_inst = nr_l3_init_ue(rrc_config_path)) != NULL, "can not initialize RRC module\n"); AssertFatal((rrc_inst = nr_l3_init_ue(rrc_config_path)) != NULL, "can not initialize RRC module\n");
AssertFatal((mac_inst = nr_l2_init_ue(rrc_inst)) != NULL, "can not initialize L2 module\n"); AssertFatal((mac_inst = nr_l2_init_ue(rrc_inst)) != NULL, "can not initialize L2 module\n");
AssertFatal((mac_inst->if_module = nr_ue_if_module_init(inst)) != NULL, "can not initialize IF module\n"); AssertFatal((mac_inst->if_module = nr_ue_if_module_init(inst)) != NULL, "can not initialize IF module\n");
NR_PUSCH_TimeDomainResourceAllocationList_t *pusch_TimeDomainAllocationList = NULL;
if (mac_inst->ULbwp[0]->bwp_Dedicated->pusch_Config->choice.setup->pusch_TimeDomainAllocationList) {
pusch_TimeDomainAllocationList = mac_inst->ULbwp[0]->bwp_Dedicated->pusch_Config->choice.setup->pusch_TimeDomainAllocationList->choice.setup;
}
else if (mac_inst->ULbwp[0]->bwp_Common->pusch_ConfigCommon->choice.setup->pusch_TimeDomainAllocationList) {
pusch_TimeDomainAllocationList = mac_inst->ULbwp[0]->bwp_Common->pusch_ConfigCommon->choice.setup->pusch_TimeDomainAllocationList;
}
if (pusch_TimeDomainAllocationList) {
for(int i = 0; i < pusch_TimeDomainAllocationList->list.count; i++) {
AssertFatal(*pusch_TimeDomainAllocationList->list.array[i]->k2 >= DURATION_RX_TO_TX,
"Slot offset K2 (%ld) cannot be less than DURATION_RX_TO_TX (%d)\n",
*pusch_TimeDomainAllocationList->list.array[i]->k2,
DURATION_RX_TO_TX);
}
}
} }
} }
......
...@@ -398,13 +398,13 @@ typedef struct ...@@ -398,13 +398,13 @@ typedef struct
{ {
nfapi_uint32_tlv_t ssb_mask;//Bitmap for actually transmitted SSB. MSB->LSB of first 32 bit number corresponds to SSB 0 to SSB 31 MSB->LSB of second 32 bit number corresponds to SSB 32 to SSB 63 Value for each bit: 0: not transmitted 1: transmitted nfapi_uint32_tlv_t ssb_mask;//Bitmap for actually transmitted SSB. MSB->LSB of first 32 bit number corresponds to SSB 0 to SSB 31 MSB->LSB of second 32 bit number corresponds to SSB 32 to SSB 63 Value for each bit: 0: not transmitted 1: transmitted
} nfapi_nr_ssb_mask_size_2_t; } nfapi_nr_ssb_mask_list_t;
typedef struct typedef struct
{ {
nfapi_uint8_tlv_t beam_id[64];//BeamID for each SSB in SsbMask. For example, if SSB mask bit 26 is set to 1, then BeamId[26] will be used to indicate beam ID of SSB 26. Value: from 0 to 63 nfapi_uint8_tlv_t beam_id;//BeamID for each SSB in SsbMask. For example, if SSB mask bit 26 is set to 1, then BeamId[26] will be used to indicate beam ID of SSB 26. Value: from 0 to 63
} nfapi_nr_ssb_mask_size_64_t; } nfapi_nr_ssb_beam_id_list_t;
typedef struct typedef struct
{ {
...@@ -413,8 +413,8 @@ typedef struct ...@@ -413,8 +413,8 @@ typedef struct
nfapi_uint8_tlv_t ssb_period;//SSB periodicity in msec Value: 0: ms5 1: ms10 2: ms20 3: ms40 4: ms80 5: ms160 nfapi_uint8_tlv_t ssb_period;//SSB periodicity in msec Value: 0: ms5 1: ms10 2: ms20 3: ms40 4: ms80 5: ms160
nfapi_uint8_tlv_t ssb_subcarrier_offset;//ssbSubcarrierOffset or 𝑘𝑆𝑆𝐵 (38.211, section 7.4.3.1) Value: 0->31 nfapi_uint8_tlv_t ssb_subcarrier_offset;//ssbSubcarrierOffset or 𝑘𝑆𝑆𝐵 (38.211, section 7.4.3.1) Value: 0->31
nfapi_uint32_tlv_t MIB;//MIB payload, where the 24 MSB are used and represent the MIB in [38.331 MIB IE] and represent 0 1 2 3 1 , , , ,..., A− a a a a a [38.212, sec 7.1.1] nfapi_uint32_tlv_t MIB;//MIB payload, where the 24 MSB are used and represent the MIB in [38.331 MIB IE] and represent 0 1 2 3 1 , , , ,..., A− a a a a a [38.212, sec 7.1.1]
nfapi_nr_ssb_mask_size_2_t ssb_mask_list[2]; nfapi_nr_ssb_mask_list_t ssb_mask_list[2];
nfapi_nr_ssb_mask_size_64_t* ssb_beam_id_list;//64 nfapi_nr_ssb_beam_id_list_t ssb_beam_id_list[64];
nfapi_uint8_tlv_t ss_pbch_multiple_carriers_in_a_band;//0 = disabled 1 = enabled nfapi_uint8_tlv_t ss_pbch_multiple_carriers_in_a_band;//0 = disabled 1 = enabled
nfapi_uint8_tlv_t multiple_cells_ss_pbch_in_a_carrier;//Indicates that multiple cells will be supported in a single carrier 0 = disabled 1 = enabled nfapi_uint8_tlv_t multiple_cells_ss_pbch_in_a_carrier;//Indicates that multiple cells will be supported in a single carrier 0 = disabled 1 = enabled
...@@ -678,7 +678,7 @@ typedef struct { ...@@ -678,7 +678,7 @@ typedef struct {
} nfapi_nr_slot_indication_scf_t; } nfapi_nr_slot_indication_scf_t;
// 3.4.2 // 3.4.2
//for pdcch_pdu: //for pdcch_pdu:
...@@ -691,11 +691,10 @@ typedef struct ...@@ -691,11 +691,10 @@ typedef struct
typedef struct typedef struct
{ {
uint16_t pm_idx;//Index to precoding matrix (PM) pre-stored at cell configuration. Note: If precoding is not used this parameter should be set to 0. Value: 0->65535. uint16_t pm_idx;//Index to precoding matrix (PM) pre-stored at cell configuration. Note: If precoding is not used this parameter should be set to 0. Value: 0->65535.
nfapi_nr_dig_bf_interface_t* dig_bf_interface_list; nfapi_nr_dig_bf_interface_t dig_bf_interface_list[255];//max dig_bf_interfaces
}nfapi_nr_tx_precoding_and_beamforming_number_of_prgs_t; }nfapi_nr_tx_precoding_and_beamforming_number_of_prgs_t;
/*
//table 3-43 //table 3-43
typedef struct typedef struct
{ {
...@@ -703,23 +702,10 @@ typedef struct ...@@ -703,23 +702,10 @@ typedef struct
uint16_t prg_size;//Size in RBs of a precoding resource block group (PRG) – to which same precoding and digital beamforming gets applied. Value: 1->275 uint16_t prg_size;//Size in RBs of a precoding resource block group (PRG) – to which same precoding and digital beamforming gets applied. Value: 1->275
//watchout: dig_bf_interfaces here, in table 3-53 it's dig_bf_interface //watchout: dig_bf_interfaces here, in table 3-53 it's dig_bf_interface
uint8_t dig_bf_interfaces;//Number of STD ant ports (parallel streams) feeding into the digBF Value: 0->255 uint8_t dig_bf_interfaces;//Number of STD ant ports (parallel streams) feeding into the digBF Value: 0->255
nfapi_nr_tx_precoding_and_beamforming_number_of_prgs_t* prgs_list;// nfapi_nr_tx_precoding_and_beamforming_number_of_prgs_t prgs_list[275];//max prg_size
}nfapi_nr_tx_precoding_and_beamforming_t; }nfapi_nr_tx_precoding_and_beamforming_t;
*/
typedef struct {
/// Number of PRGs spanning this allocation. Value : 1->275
uint16_t numPRGs;
/// Size in RBs of a precoding resource block group (PRG) – to which same precoding and digital beamforming gets applied. Value: 1->275
uint16_t prgSize;
/// Number of STD ant ports (parallel streams) feeding into the digBF Value: 0->255
uint8_t digBFInterfaces;
// Depends on numPRGs
uint16_t PMIdx[275];
// Depends on digBFInterfaces
uint16_t beamIdx[256];
} nfapi_nr_tx_precoding_and_beamforming_t;
//table 3-37 //table 3-37
...@@ -755,16 +741,6 @@ typedef struct { ...@@ -755,16 +741,6 @@ typedef struct {
} nfapi_nr_dl_dci_pdu_t; } nfapi_nr_dl_dci_pdu_t;
typedef struct {
/// Number of PRGs spanning this allocation. Value : 1->275
uint16_t numPRGs;
/// Size in RBs of a precoding resource block group (PRG) – to which same precoding and digital beamforming gets applied. Value: 1->275
uint16_t prgSize;
/// Number of STD ant ports (parallel streams) feeding into the digBF Value: 0->255
uint8_t digBFInterfaces;
uint16_t PMIdx[275];
uint16_t *beamIdx[275];
} nr_beamforming_t;
typedef struct { typedef struct {
///Bandwidth part size [TS38.213 sec12]. Number of contiguous PRBs allocated to the BWP,Value: 1->275 ///Bandwidth part size [TS38.213 sec12]. Number of contiguous PRBs allocated to the BWP,Value: 1->275
...@@ -1028,7 +1004,7 @@ typedef struct { ...@@ -1028,7 +1004,7 @@ typedef struct {
typedef struct { typedef struct {
uint16_t PDUType; uint16_t PDUType;
uint16_t PDUSize; uint32_t PDUSize;
union { union {
nfapi_nr_dl_tti_pdcch_pdu pdcch_pdu; nfapi_nr_dl_tti_pdcch_pdu pdcch_pdu;
......
This diff is collapsed.
...@@ -142,6 +142,8 @@ int phy_init_nr_gNB(PHY_VARS_gNB *gNB, ...@@ -142,6 +142,8 @@ int phy_init_nr_gNB(PHY_VARS_gNB *gNB,
uint32_t ***pdcch_dmrs = gNB->nr_gold_pdcch_dmrs; uint32_t ***pdcch_dmrs = gNB->nr_gold_pdcch_dmrs;
AssertFatal(pdcch_dmrs!=NULL, "NR init: pdcch_dmrs malloc failed\n"); AssertFatal(pdcch_dmrs!=NULL, "NR init: pdcch_dmrs malloc failed\n");
gNB->bad_pucch = 0;
for (int slot=0; slot<fp->slots_per_frame; slot++) { for (int slot=0; slot<fp->slots_per_frame; slot++) {
pdcch_dmrs[slot] = (uint32_t **)malloc16(fp->symbols_per_slot*sizeof(uint32_t *)); pdcch_dmrs[slot] = (uint32_t **)malloc16(fp->symbols_per_slot*sizeof(uint32_t *));
AssertFatal(pdcch_dmrs[slot]!=NULL, "NR init: pdcch_dmrs for slot %d - malloc failed\n", slot); AssertFatal(pdcch_dmrs[slot]!=NULL, "NR init: pdcch_dmrs for slot %d - malloc failed\n", slot);
...@@ -231,13 +233,15 @@ int phy_init_nr_gNB(PHY_VARS_gNB *gNB, ...@@ -231,13 +233,15 @@ int phy_init_nr_gNB(PHY_VARS_gNB *gNB,
common_vars->rxdata = (int32_t **)malloc16(Prx*sizeof(int32_t*)); common_vars->rxdata = (int32_t **)malloc16(Prx*sizeof(int32_t*));
common_vars->txdataF = (int32_t **)malloc16(Ptx*sizeof(int32_t*)); common_vars->txdataF = (int32_t **)malloc16(Ptx*sizeof(int32_t*));
common_vars->rxdataF = (int32_t **)malloc16(Prx*sizeof(int32_t*)); common_vars->rxdataF = (int32_t **)malloc16(Prx*sizeof(int32_t*));
common_vars->beam_id = (uint8_t **)malloc16(Ptx*sizeof(uint8_t*));
for (i=0;i<Ptx;i++){ for (i=0;i<Ptx;i++){
common_vars->txdataF[i] = (int32_t*)malloc16_clear(fp->samples_per_frame_wCP*sizeof(int32_t)); // [hna] samples_per_frame without CP common_vars->txdataF[i] = (int32_t*)malloc16_clear(fp->samples_per_frame_wCP*sizeof(int32_t)); // [hna] samples_per_frame without CP
LOG_D(PHY,"[INIT] common_vars->txdataF[%d] = %p (%lu bytes)\n", LOG_D(PHY,"[INIT] common_vars->txdataF[%d] = %p (%lu bytes)\n",
i,common_vars->txdataF[i], i,common_vars->txdataF[i],
fp->samples_per_frame_wCP*sizeof(int32_t)); fp->samples_per_frame_wCP*sizeof(int32_t));
common_vars->beam_id[i] = (uint8_t*)malloc16_clear(fp->symbols_per_slot*fp->slots_per_frame*sizeof(uint8_t));
memset(common_vars->beam_id[i],255,fp->symbols_per_slot*fp->slots_per_frame);
} }
for (i=0;i<Prx;i++){ for (i=0;i<Prx;i++){
common_vars->rxdataF[i] = (int32_t*)malloc16_clear(fp->samples_per_frame_wCP*sizeof(int32_t)); common_vars->rxdataF[i] = (int32_t*)malloc16_clear(fp->samples_per_frame_wCP*sizeof(int32_t));
...@@ -474,7 +478,8 @@ void nr_phy_config_request_sim(PHY_VARS_gNB *gNB, ...@@ -474,7 +478,8 @@ void nr_phy_config_request_sim(PHY_VARS_gNB *gNB,
fp->nr_band = 261; fp->nr_band = 261;
// fp->threequarter_fs= 0; // fp->threequarter_fs= 0;
} }
fp->threequarter_fs = 0;
gNB_config->carrier_config.dl_bandwidth.value = config_bandwidth(mu, N_RB_DL, fp->nr_band); gNB_config->carrier_config.dl_bandwidth.value = config_bandwidth(mu, N_RB_DL, fp->nr_band);
nr_init_frame_parms(gNB_config, fp); nr_init_frame_parms(gNB_config, fp);
......
...@@ -138,7 +138,7 @@ int nr_phy_init_RU(RU_t *ru) { ...@@ -138,7 +138,7 @@ int nr_phy_init_RU(RU_t *ru) {
for (j=0; j<ru->nb_tx; j++) { for (j=0; j<ru->nb_tx; j++) {
ru->beam_weights[i][p][j] = (int32_t *)malloc16_clear(fp->ofdm_symbol_size*sizeof(int32_t)); ru->beam_weights[i][p][j] = (int32_t *)malloc16_clear(fp->ofdm_symbol_size*sizeof(int32_t));
for (re=0; re<fp->ofdm_symbol_size; re++) for (re=0; re<fp->ofdm_symbol_size; re++)
ru->beam_weights[i][p][j][re] = ru->bw_list[i][l_ind]; ru->beam_weights[i][p][j][re] = ru->bw_list[j][l_ind];
//printf("Beam Weight %08x for beam %d and tx %d\n",ru->bw_list[i][l_ind],p,j); //printf("Beam Weight %08x for beam %d and tx %d\n",ru->bw_list[i][l_ind],p,j);
l_ind++; l_ind++;
} // for j } // for j
...@@ -146,6 +146,12 @@ int nr_phy_init_RU(RU_t *ru) { ...@@ -146,6 +146,12 @@ int nr_phy_init_RU(RU_t *ru) {
} // for p } // for p
} //for i } //for i
} }
ru->common.beam_id = (uint8_t**)malloc16_clear(ru->nb_tx*sizeof(uint8_t*));
for(i=0; i< ru->nb_tx; ++i) {
ru->common.beam_id[i] = (uint8_t*)malloc16_clear(fp->symbols_per_slot*fp->slots_per_frame*sizeof(uint8_t));
memset(ru->common.beam_id[i],255,fp->symbols_per_slot*fp->slots_per_frame);
}
} // !=IF5 } // !=IF5
ru->common.sync_corr = (uint32_t*)malloc16_clear( LTE_NUMBER_OF_SUBFRAMES_PER_FRAME*sizeof(uint32_t)*fp->samples_per_subframe_wCP ); ru->common.sync_corr = (uint32_t*)malloc16_clear( LTE_NUMBER_OF_SUBFRAMES_PER_FRAME*sizeof(uint32_t)*fp->samples_per_subframe_wCP );
......
...@@ -292,7 +292,10 @@ int init_nr_ue_signal(PHY_VARS_NR_UE *ue, ...@@ -292,7 +292,10 @@ int init_nr_ue_signal(PHY_VARS_NR_UE *ue,
} }
} }
//PDSCH DMRS init (gNB offset = 0) ue->scramblingID_pdcch = fp->Nid_cell;
nr_gold_pdcch(ue,fp->Nid_cell);
//PDSCH DMRS init (eNB offset = 0)
ue->nr_gold_pdsch[0] = (uint32_t ****)malloc16(fp->slots_per_frame*sizeof(uint32_t ***)); ue->nr_gold_pdsch[0] = (uint32_t ****)malloc16(fp->slots_per_frame*sizeof(uint32_t ***));
uint32_t ****pdsch_dmrs = ue->nr_gold_pdsch[0]; uint32_t ****pdsch_dmrs = ue->nr_gold_pdsch[0];
...@@ -311,6 +314,12 @@ int init_nr_ue_signal(PHY_VARS_NR_UE *ue, ...@@ -311,6 +314,12 @@ int init_nr_ue_signal(PHY_VARS_NR_UE *ue,
} }
} }
// initializing the scrambling IDs for PDSCH DMRS
for (int i=0; i<2; i++)
ue->scramblingID[i]=fp->Nid_cell;
nr_gold_pdsch(ue,ue->scramblingID);
// DLSCH // DLSCH
for (gNB_id = 0; gNB_id < ue->n_connected_gNB; gNB_id++) { for (gNB_id = 0; gNB_id < ue->n_connected_gNB; gNB_id++) {
for (th_id=0; th_id<RX_NB_TH_MAX; th_id++) { for (th_id=0; th_id<RX_NB_TH_MAX; th_id++) {
......
...@@ -52,22 +52,15 @@ void nr_gold_pbch(PHY_VARS_NR_UE* ue) ...@@ -52,22 +52,15 @@ void nr_gold_pbch(PHY_VARS_NR_UE* ue)
} }
void nr_gold_pdcch(PHY_VARS_NR_UE* ue, void nr_gold_pdcch(PHY_VARS_NR_UE* ue,
unsigned short n_idDMRS, unsigned short nid)
unsigned short length_dmrs)
{ {
unsigned char ns,l; unsigned char ns,l;
unsigned int n,x1,x2,x2tmp0; unsigned int n,x1,x2,x2tmp0;
unsigned int nid;
uint8_t reset; uint8_t reset;
if (n_idDMRS)
nid = n_idDMRS;
else
nid = ue->frame_parms.Nid_cell;
for (ns=0; ns<ue->frame_parms.slots_per_frame; ns++) { for (ns=0; ns<ue->frame_parms.slots_per_frame; ns++) {
for (l=0; l<length_dmrs; l++) { for (l=0; l<ue->frame_parms.symbols_per_slot; l++) {
reset = 1; reset = 1;
x2tmp0 = ((ue->frame_parms.symbols_per_slot*ns+l+1)*((nid<<1)+1))<<17; x2tmp0 = ((ue->frame_parms.symbols_per_slot*ns+l+1)*((nid<<1)+1))<<17;
...@@ -82,11 +75,10 @@ void nr_gold_pdcch(PHY_VARS_NR_UE* ue, ...@@ -82,11 +75,10 @@ void nr_gold_pdcch(PHY_VARS_NR_UE* ue,
} }
void nr_gold_pdsch(PHY_VARS_NR_UE* ue, void nr_gold_pdsch(PHY_VARS_NR_UE* ue,
unsigned char ns,
unsigned short *n_idDMRS) unsigned short *n_idDMRS)
{ {
unsigned char l; unsigned char l;
unsigned int n,x1,x2,x2tmp0; unsigned int n,x1,x2,x2tmp0,ns;
int nscid; int nscid;
unsigned int nid; unsigned int nid;
uint8_t reset; uint8_t reset;
...@@ -95,23 +87,21 @@ void nr_gold_pdsch(PHY_VARS_NR_UE* ue, ...@@ -95,23 +87,21 @@ void nr_gold_pdsch(PHY_VARS_NR_UE* ue,
//unsigned short lbar = 0; //unsigned short lbar = 0;
for (nscid=0; nscid<2; nscid++) { for (nscid=0; nscid<2; nscid++) {
if (n_idDMRS) for (ns=0; ns<ue->frame_parms.slots_per_frame; ns++) {
nid = n_idDMRS[nscid];
else
nid = ue->frame_parms.Nid_cell;
//printf("gold pdsch nid %d lbar %d\n",nid,lbar); nid = n_idDMRS[nscid];
for (l=0; l<ue->frame_parms.symbols_per_slot; l++) { for (l=0; l<ue->frame_parms.symbols_per_slot; l++) {
reset = 1; reset = 1;
x2tmp0 = ((ue->frame_parms.symbols_per_slot*ns+l+1)*((nid<<1)+1))<<17; x2tmp0 = ((ue->frame_parms.symbols_per_slot*ns+l+1)*((nid<<1)+1))<<17;
x2 = (x2tmp0+(nid<<1)+nscid)%(1<<31); //cinit x2 = (x2tmp0+(nid<<1)+nscid)%(1<<31); //cinit
LOG_D(PHY,"UE DMRS slot %d, symb %d, x2 %x, nscid %d\n",ns,l,x2,nscid); LOG_D(PHY,"UE DMRS slot %d, symb %d, x2 %x, nscid %d\n",ns,l,x2,nscid);
for (n=0; n<NR_MAX_PDSCH_DMRS_INIT_LENGTH_DWORD; n++) { for (n=0; n<NR_MAX_PDSCH_DMRS_INIT_LENGTH_DWORD; n++) {
ue->nr_gold_pdsch[0][ns][l][nscid][n] = lte_gold_generic(&x1, &x2, reset); ue->nr_gold_pdsch[0][ns][l][nscid][n] = lte_gold_generic(&x1, &x2, reset);
reset = 0; reset = 0;
}
} }
} }
} }
......
...@@ -57,11 +57,9 @@ int nr_pdsch_dmrs_rx(PHY_VARS_NR_UE *ue, ...@@ -57,11 +57,9 @@ int nr_pdsch_dmrs_rx(PHY_VARS_NR_UE *ue,
void nr_gold_pbch(PHY_VARS_NR_UE* ue); void nr_gold_pbch(PHY_VARS_NR_UE* ue);
void nr_gold_pdcch(PHY_VARS_NR_UE* ue, void nr_gold_pdcch(PHY_VARS_NR_UE* ue,
unsigned short n_idDMRS, unsigned short n_idDMRS);
unsigned short length_dmrs);
void nr_gold_pdsch(PHY_VARS_NR_UE* ue, void nr_gold_pdsch(PHY_VARS_NR_UE* ue,
unsigned char ns,
unsigned short *n_idDMRS); unsigned short *n_idDMRS);
void nr_init_pusch_dmrs(PHY_VARS_NR_UE* ue, void nr_init_pusch_dmrs(PHY_VARS_NR_UE* ue,
......
...@@ -228,6 +228,7 @@ void nr_generate_dci(PHY_VARS_gNB *gNB, ...@@ -228,6 +228,7 @@ void nr_generate_dci(PHY_VARS_gNB *gNB,
printf("PDCCH: l %d position %d => (%d,%d)\n",l,k,((int16_t *)txdataF)[(l*frame_parms.ofdm_symbol_size + k)<<1], printf("PDCCH: l %d position %d => (%d,%d)\n",l,k,((int16_t *)txdataF)[(l*frame_parms.ofdm_symbol_size + k)<<1],
((int16_t *)txdataF)[((l*frame_parms.ofdm_symbol_size + k)<<1)+1]); ((int16_t *)txdataF)[((l*frame_parms.ofdm_symbol_size + k)<<1)+1]);
#endif #endif
dci_idx++; dci_idx++;
} }
......
...@@ -412,9 +412,9 @@ uint8_t nr_generate_pdsch(PHY_VARS_gNB *gNB, ...@@ -412,9 +412,9 @@ uint8_t nr_generate_pdsch(PHY_VARS_gNB *gNB,
///Layer Precoding and Antenna port mapping ///Layer Precoding and Antenna port mapping
// tx_layers 1-8 are mapped on antenna ports 1000-1007 // tx_layers 1-8 are mapped on antenna ports 1000-1007
// The precoding info is supported by nfapi such as numPRGs, prgSize, and PMIdx // The precoding info is supported by nfapi such as num_prgs, prg_size, prgs_list and pm_idx
// The same precoding matrix is applied on prgSize RBs, Thus // The same precoding matrix is applied on prg_size RBs, Thus
// pmi = PMIdx[rbidx/prgSize], rbidx =0,...,rbSize-1 // pmi = prgs_list[rbidx/prg_size].pm_idx, rbidx =0,...,rbSize-1
// The Precoding matrix: // The Precoding matrix:
// The Codebook Type I and Type II are not supported yet. // The Codebook Type I and Type II are not supported yet.
// We adopt the precoding matrices of PUSCH for 4 layers. // We adopt the precoding matrices of PUSCH for 4 layers.
...@@ -426,8 +426,8 @@ uint8_t nr_generate_pdsch(PHY_VARS_gNB *gNB, ...@@ -426,8 +426,8 @@ uint8_t nr_generate_pdsch(PHY_VARS_gNB *gNB,
for (int rb=0; rb<rel15->rbSize; rb++) { for (int rb=0; rb<rel15->rbSize; rb++) {
//get pmi info //get pmi info
uint8_t pmi; uint8_t pmi;
if (rel15->precodingAndBeamforming.prgSize > 0) if (rel15->precodingAndBeamforming.prg_size > 0)
pmi = rel15->precodingAndBeamforming.PMIdx[(int)rb/rel15->precodingAndBeamforming.prgSize]; pmi = rel15->precodingAndBeamforming.prgs_list[(int)rb/rel15->precodingAndBeamforming.prg_size].pm_idx;
else else
pmi = 0;//no precoding pmi = 0;//no precoding
...@@ -493,7 +493,25 @@ uint8_t nr_generate_pdsch(PHY_VARS_gNB *gNB, ...@@ -493,7 +493,25 @@ uint8_t nr_generate_pdsch(PHY_VARS_gNB *gNB,
}// port loop }// port loop
dlsch->slot_tx[slot]=0; dlsch->slot_tx[slot]=0;
// TODO: handle precoding
// this maps the layers onto antenna ports
// handle beamforming ID
// each antenna port is assigned a beam_index
// since PHY can only handle BF on slot basis we set the whole slot
// first check if this slot has not already been allocated to another beam
if (gNB->common_vars.beam_id[0][slot*frame_parms->symbols_per_slot]==255) {
for (int j=0;j<frame_parms->symbols_per_slot;j++)
gNB->common_vars.beam_id[0][slot*frame_parms->symbols_per_slot+j] = rel15->precodingAndBeamforming.prgs_list[0].dig_bf_interface_list[0].beam_idx;
}
else {
LOG_W(PHY,"beam index for PDSCH allocation already taken\n");
}
}// dlsch loop }// dlsch loop
return 0; return 0;
} }
......
...@@ -108,8 +108,6 @@ void free_gNB_dlsch(NR_gNB_DLSCH_t **dlschptr, uint16_t N_RB) ...@@ -108,8 +108,6 @@ void free_gNB_dlsch(NR_gNB_DLSCH_t **dlschptr, uint16_t N_RB)
harq->d[r] = NULL; harq->d[r] = NULL;
} }
} }
free16(harq, sizeof(NR_DL_gNB_HARQ_t));
harq = NULL;
} }
} }
......
...@@ -390,6 +390,7 @@ void nr_decode_pucch0(PHY_VARS_gNB *gNB, ...@@ -390,6 +390,7 @@ void nr_decode_pucch0(PHY_VARS_gNB *gNB,
if ((xrtmag_dB<(11+dB_fixed(no_corr))) || (dB_fixed(av_corr)<(13+gNB->measurements.n0_power_tot_dB))) //TODO these are temporary threshold based on measurments with the phone if ((xrtmag_dB<(11+dB_fixed(no_corr))) || (dB_fixed(av_corr)<(13+gNB->measurements.n0_power_tot_dB))) //TODO these are temporary threshold based on measurments with the phone
no_conf=true; no_conf=true;
} }
gNB->bad_pucch += no_conf;
// first bit of bitmap for sr presence and second bit for acknack presence // first bit of bitmap for sr presence and second bit for acknack presence
uci_pdu->pduBitmap = pucch_pdu->sr_flag | ((pucch_pdu->bit_len_harq>0)<<1); uci_pdu->pduBitmap = pucch_pdu->sr_flag | ((pucch_pdu->bit_len_harq>0)<<1);
uci_pdu->pucch_format = 0; // format 0 uci_pdu->pucch_format = 0; // format 0
......
...@@ -512,6 +512,13 @@ int nr_pdcch_channel_estimation(PHY_VARS_NR_UE *ue, ...@@ -512,6 +512,13 @@ int nr_pdcch_channel_estimation(PHY_VARS_NR_UE *ue,
fr = filt16a_r1; fr = filt16a_r1;
// checking if re-initialization of scrambling IDs is needed (should be done here but scrambling ID for PDCCH is not taken from RRC)
/* if (( != ue->scramblingID_pdcch){
ue->scramblingID_pdcch=;
nr_gold_pdsch(ue,ue->scramblingID_pdcch);
}*/
// generate pilot // generate pilot
int pilot[nb_rb_coreset * 3] __attribute__((aligned(16))); int pilot[nb_rb_coreset * 3] __attribute__((aligned(16)));
nr_pdcch_dmrs_rx(ue,eNB_offset,Ns,ue->nr_gold_pdcch[eNB_offset][Ns][symbol], &pilot[0],2000,nb_rb_coreset); nr_pdcch_dmrs_rx(ue,eNB_offset,Ns,ue->nr_gold_pdcch[eNB_offset][Ns][symbol], &pilot[0],2000,nb_rb_coreset);
...@@ -690,6 +697,14 @@ int nr_pdsch_channel_estimation(PHY_VARS_NR_UE *ue, ...@@ -690,6 +697,14 @@ int nr_pdsch_channel_estimation(PHY_VARS_NR_UE *ue,
uint16_t rb_offset = (bwp_start_subcarrier - ue->frame_parms.first_carrier_offset) / 12 - BWPStart; uint16_t rb_offset = (bwp_start_subcarrier - ue->frame_parms.first_carrier_offset) / 12 - BWPStart;
uint8_t config_type = ue->dmrs_DownlinkConfig.pdsch_dmrs_type; uint8_t config_type = ue->dmrs_DownlinkConfig.pdsch_dmrs_type;
int8_t delta = get_delta(p, config_type); int8_t delta = get_delta(p, config_type);
// checking if re-initialization of scrambling IDs is needed
if ((ue->dmrs_DownlinkConfig.scramblingID0 != ue->scramblingID[0]) || (ue->dmrs_DownlinkConfig.scramblingID1 != ue->scramblingID[1])){
ue->scramblingID[0]=ue->dmrs_DownlinkConfig.scramblingID0;
ue->scramblingID[1]=ue->dmrs_DownlinkConfig.scramblingID1;
nr_gold_pdsch(ue,ue->scramblingID);
}
nr_pdsch_dmrs_rx(ue,Ns,ue->nr_gold_pdsch[eNB_offset][Ns][symbol][0], &pilot[0],1000+p,0,nb_rb_pdsch+rb_offset); nr_pdsch_dmrs_rx(ue,Ns,ue->nr_gold_pdsch[eNB_offset][Ns][symbol][0], &pilot[0],1000+p,0,nb_rb_pdsch+rb_offset);
if (config_type == pdsch_dmrs_type1){ if (config_type == pdsch_dmrs_type1){
......
...@@ -316,7 +316,6 @@ int nr_initial_sync(UE_nr_rxtx_proc_t *proc, PHY_VARS_NR_UE *ue, int n_frames) ...@@ -316,7 +316,6 @@ int nr_initial_sync(UE_nr_rxtx_proc_t *proc, PHY_VARS_NR_UE *ue, int n_frames)
ue->init_sync_frame = is; ue->init_sync_frame = is;
} }
nr_gold_pdcch(ue,0, 2);
/* /*
int nb_prefix_samples0 = fp->nb_prefix_samples0; int nb_prefix_samples0 = fp->nb_prefix_samples0;
fp->nb_prefix_samples0 = fp->nb_prefix_samples; fp->nb_prefix_samples0 = fp->nb_prefix_samples;
......
...@@ -213,7 +213,7 @@ void generate_pss_nr(NR_DL_FRAME_PARMS *fp,int N_ID_2) ...@@ -213,7 +213,7 @@ void generate_pss_nr(NR_DL_FRAME_PARMS *fp,int N_ID_2)
} }
for (int n=0; n < LENGTH_PSS_NR; n++) { for (int n=0; n < LENGTH_PSS_NR; n++) {
int m = (n + 43*N_ID_2)%(LENGTH_PSS_NR); int m = (n + 43*N_ID_2)%(LENGTH_PSS_NR);
d_pss[n] = 1 - 2*x[m]; d_pss[n] = 1 - 2*x[m];
} }
......
...@@ -92,17 +92,17 @@ typedef enum { ...@@ -92,17 +92,17 @@ typedef enum {
typedef struct { typedef struct {
/// \brief Holds the transmit data in the frequency domain. /// \brief Holds the transmit data in the frequency domain (1 frame).
/// - first index: rx antenna [0..nb_antennas_rx[ /// - first index: rx antenna [0..nb_antennas_rx[
/// - second index: ? [0..2*ofdm_symbol_size*frame_parms->symbols_per_tti[ /// - second index: ? [0..samples_per_frame[
int32_t **txdata; int32_t **txdata;
/// \brief holds the transmit data after beamforming in the frequency domain. /// \brief holds the transmit data after beamforming in the frequency domain (1 slot).
/// - first index: tx antenna [0..nb_antennas_tx[ /// - first index: tx antenna [0..nb_antennas_tx[
/// - second index: sample [0..] /// - second index: sample [0..samples_per_slot_woCP]
int32_t **txdataF_BF; int32_t **txdataF_BF;
/// \brief holds the transmit data before beamforming in the frequency domain. /// \brief holds the transmit data before beamforming in the frequency domain (1 frame).
/// - first index: tx antenna [0..nb_antennas_tx[ /// - first index: tx antenna [0..nb_antenna_ports[
/// - second index: sample [0..] /// - second index: sample [0..samples_per_frame_woCP]
int32_t **txdataF; int32_t **txdataF;
/// \brief holds the transmit data before beamforming for epdcch/mpdcch /// \brief holds the transmit data before beamforming for epdcch/mpdcch
/// - first index : tx antenna [0..nb_epdcch_antenna_ports[ /// - first index : tx antenna [0..nb_epdcch_antenna_ports[
...@@ -128,6 +128,10 @@ typedef struct { ...@@ -128,6 +128,10 @@ typedef struct {
/// - second index: tx antenna [0..nb_antennas_tx[ /// - second index: tx antenna [0..nb_antennas_tx[
/// - third index: frequency [0..] /// - third index: frequency [0..]
int32_t **tdd_calib_coeffs; int32_t **tdd_calib_coeffs;
/// \brief Anaglogue beam ID for each OFDM symbol (used when beamforming not done in RU)
/// - first index: antenna port
/// - second index: beam_id [0.. symbols_per_frame[
uint8_t **beam_id;
} RU_COMMON; } RU_COMMON;
......
...@@ -387,8 +387,12 @@ typedef struct { ...@@ -387,8 +387,12 @@ typedef struct {
/// For IFFT_FPGA this points to the same memory as PHY_vars->rx_vars[a].RX_DMA_BUFFER. //? /// For IFFT_FPGA this points to the same memory as PHY_vars->rx_vars[a].RX_DMA_BUFFER. //?
/// - first index: eNB id [0..2] (hard coded) /// - first index: eNB id [0..2] (hard coded)
/// - second index: tx antenna [0..14[ where 14 is the total supported antenna ports. /// - second index: tx antenna [0..14[ where 14 is the total supported antenna ports.
/// - third index: sample [0..] /// - third index: sample [0..samples_per_frame_woCP]
int32_t **txdataF; int32_t **txdataF;
/// \brief Anaglogue beam ID for each OFDM symbol (used when beamforming not done in RU)
/// - first index: antenna port
/// - second index: beam_id [0.. symbols_per_frame[
uint8_t **beam_id;
int32_t *debugBuff; int32_t *debugBuff;
int32_t debugBuff_sample_offset; int32_t debugBuff_sample_offset;
} NR_gNB_COMMON; } NR_gNB_COMMON;
...@@ -793,6 +797,7 @@ typedef struct PHY_VARS_gNB_s { ...@@ -793,6 +797,7 @@ typedef struct PHY_VARS_gNB_s {
int prach_energy_counter; int prach_energy_counter;
int pucch0_thres; int pucch0_thres;
uint64_t bad_pucch;
/* /*
time_stats_t phy_proc; time_stats_t phy_proc;
*/ */
......
...@@ -840,9 +840,15 @@ typedef struct { ...@@ -840,9 +840,15 @@ typedef struct {
/// PDSCH DMRS /// PDSCH DMRS
uint32_t ****nr_gold_pdsch[NUMBER_OF_CONNECTED_eNB_MAX]; uint32_t ****nr_gold_pdsch[NUMBER_OF_CONNECTED_eNB_MAX];
// Scrambling IDs used in PDSCH DMRS
uint16_t scramblingID[2];
/// PDCCH DMRS /// PDCCH DMRS
uint32_t ***nr_gold_pdcch[NUMBER_OF_CONNECTED_eNB_MAX]; uint32_t ***nr_gold_pdcch[NUMBER_OF_CONNECTED_eNB_MAX];
// Scrambling IDs used in PDCCH DMRS
uint16_t scramblingID_pdcch;
/// PUSCH DMRS sequence /// PUSCH DMRS sequence
uint32_t ****nr_gold_pusch_dmrs; uint32_t ****nr_gold_pusch_dmrs;
......
...@@ -275,6 +275,12 @@ ...@@ -275,6 +275,12 @@
#define NR_UE_CAPABILITY_SLOT_RX_TO_TX (6) /* FFS_NR_TODO it defines ue capability which is the number of slots */ #define NR_UE_CAPABILITY_SLOT_RX_TO_TX (6) /* FFS_NR_TODO it defines ue capability which is the number of slots */
/* - between reception of pdsch and tarnsmission of its acknowlegment */ /* - between reception of pdsch and tarnsmission of its acknowlegment */
/* - between reception of un uplink grant and its related transmission */ /* - between reception of un uplink grant and its related transmission */
#ifndef NO_RAT_NR
#define DURATION_RX_TO_TX (NR_UE_CAPABILITY_SLOT_RX_TO_TX) /* for NR this will certainly depends to such UE capability which is not yet defined */
#else
#define DURATION_RX_TO_TX (6) /* For LTE, this duration is fixed to 4 and it is linked to LTE standard for both modes FDD/TDD */
#endif
#define NR_MAX_HARQ_PROCESSES (16) #define NR_MAX_HARQ_PROCESSES (16)
#define NR_MAX_ULSCH_HARQ_PROCESSES (NR_MAX_HARQ_PROCESSES) /* cf 38.214 6.1 UE procedure for receiving the physical uplink shared channel */ #define NR_MAX_ULSCH_HARQ_PROCESSES (NR_MAX_HARQ_PROCESSES) /* cf 38.214 6.1 UE procedure for receiving the physical uplink shared channel */
......
...@@ -208,6 +208,7 @@ void nr_feptx_ofdm_2thread(RU_t *ru,int frame_tx,int tti_tx) { ...@@ -208,6 +208,7 @@ void nr_feptx_ofdm_2thread(RU_t *ru,int frame_tx,int tti_tx) {
memcpy((void*)&ru->common.txdataF[i][j*fp->ofdm_symbol_size], memcpy((void*)&ru->common.txdataF[i][j*fp->ofdm_symbol_size],
(void*)&gNB->common_vars.txdataF[i][j*fp->ofdm_symbol_size + txdataF_offset], (void*)&gNB->common_vars.txdataF[i][j*fp->ofdm_symbol_size + txdataF_offset],
fp->ofdm_symbol_size*sizeof(int32_t)); fp->ofdm_symbol_size*sizeof(int32_t));
} }
}//num_gNB == 1 }//num_gNB == 1
...@@ -304,11 +305,20 @@ static void *nr_feptx_thread(void *param) { ...@@ -304,11 +305,20 @@ static void *nr_feptx_thread(void *param) {
txdataF_offset = ((slot%2)*fp->samples_per_slot_wCP); txdataF_offset = ((slot%2)*fp->samples_per_slot_wCP);
////////////precoding//////////// ////////////precoding////////////
VCD_SIGNAL_DUMPER_DUMP_FUNCTION_BY_NAME(VCD_SIGNAL_DUMPER_FUNCTIONS_PHY_PROCEDURES_RU_FEPTX_PREC+feptx->index+1 , 1); VCD_SIGNAL_DUMPER_DUMP_FUNCTION_BY_NAME(VCD_SIGNAL_DUMPER_FUNCTIONS_PHY_PROCEDURES_RU_FEPTX_PREC+feptx->index+1 , 1);
start_meas(&ru->precoding_stats); start_meas(&ru->precoding_stats);
for(i=0; i<ru->nb_log_antennas; ++i) {
memcpy((void*) &ru->common.beam_id[i][slot*fp->symbols_per_slot+l],
(void*) &ru->gNB_list[0]->common_vars.beam_id[i][slot*fp->symbols_per_slot+l],
(fp->symbols_per_slot>>1)*sizeof(uint8_t));
}
if (ru->nb_tx == 1 && ru->nb_log_antennas == 1) { if (ru->nb_tx == 1 && ru->nb_log_antennas == 1) {
memcpy((void*)&ru->common.txdataF_BF[0][l*fp->ofdm_symbol_size], memcpy((void*)&ru->common.txdataF_BF[0][l*fp->ofdm_symbol_size],
(void*)&ru->gNB_list[0]->common_vars.txdataF[0][txdataF_offset + l*fp->ofdm_symbol_size], (void*)&ru->gNB_list[0]->common_vars.txdataF[0][txdataF_offset + l*fp->ofdm_symbol_size],
(fp->samples_per_slot_wCP>>1)*sizeof(int32_t)); (fp->samples_per_slot_wCP>>1)*sizeof(int32_t));
} }
else { else {
bw = ru->beam_weights[0]; bw = ru->beam_weights[0];
...@@ -458,10 +468,14 @@ void nr_feptx_prec(RU_t *ru,int frame_tx,int tti_tx) { ...@@ -458,10 +468,14 @@ void nr_feptx_prec(RU_t *ru,int frame_tx,int tti_tx) {
if (nr_slot_select(cfg,frame_tx,slot_tx) == NR_UPLINK_SLOT) return; if (nr_slot_select(cfg,frame_tx,slot_tx) == NR_UPLINK_SLOT) return;
for(i=0; i<ru->nb_log_antennas; ++i) for(i=0; i<ru->nb_log_antennas; ++i) {
memcpy((void*)ru->common.txdataF[i], memcpy((void*)ru->common.txdataF[i],
(void*)&gNB->common_vars.txdataF[i][txdataF_offset], (void*)&gNB->common_vars.txdataF[i][txdataF_offset],
fp->samples_per_slot_wCP*sizeof(int32_t)); fp->samples_per_slot_wCP*sizeof(int32_t));
memcpy((void*)&ru->common.beam_id[i][slot_tx*fp->symbols_per_slot],
(void*)&gNB->common_vars.beam_id[i][slot_tx*fp->symbols_per_slot],
fp->symbols_per_slot*sizeof(uint8_t));
}
if (ru->nb_tx == 1 && ru->nb_log_antennas == 1) { if (ru->nb_tx == 1 && ru->nb_log_antennas == 1) {
......
...@@ -41,7 +41,7 @@ ...@@ -41,7 +41,7 @@
* *
* OUTPUT: table of uplink symbol for each slot for 2 frames * OUTPUT: table of uplink symbol for each slot for 2 frames
* *
* RETURN : 0 if tdd has been properly configurated * RETURN : nb_periods_per_frame if tdd has been properly configurated
* -1 tdd configuration can not be done * -1 tdd configuration can not be done
* *
* DESCRIPTION : generate bit map for uplink symbol for each slot for several frames * DESCRIPTION : generate bit map for uplink symbol for each slot for several frames
...@@ -179,7 +179,7 @@ int set_tdd_config_nr( nfapi_nr_config_request_scf_t *cfg, ...@@ -179,7 +179,7 @@ int set_tdd_config_nr( nfapi_nr_config_request_scf_t *cfg,
LOG_E(PHY,"set_tdd_configuration_nr: additionnal tdd configuration 2 is not supported for tdd configuration \n"); LOG_E(PHY,"set_tdd_configuration_nr: additionnal tdd configuration 2 is not supported for tdd configuration \n");
return (-1); return (-1);
}*/ }*/
return (0); return (nb_periods_per_frame);
} }
/******************************************************************* /*******************************************************************
......
...@@ -72,7 +72,7 @@ void nr_common_signal_procedures (PHY_VARS_gNB *gNB,int frame, int slot) { ...@@ -72,7 +72,7 @@ void nr_common_signal_procedures (PHY_VARS_gNB *gNB,int frame, int slot) {
NR_DL_FRAME_PARMS *fp=&gNB->frame_parms; NR_DL_FRAME_PARMS *fp=&gNB->frame_parms;
nfapi_nr_config_request_scf_t *cfg = &gNB->gNB_config; nfapi_nr_config_request_scf_t *cfg = &gNB->gNB_config;
int **txdataF = gNB->common_vars.txdataF; int **txdataF = gNB->common_vars.txdataF;
uint8_t ssb_index, n_hf; uint8_t ssb_index, ssb_per_slot=0, n_hf;
uint16_t ssb_start_symbol, rel_slot; uint16_t ssb_start_symbol, rel_slot;
int txdataF_offset = (slot%2)*fp->samples_per_slot_wCP; int txdataF_offset = (slot%2)*fp->samples_per_slot_wCP;
uint16_t slots_per_hf = (fp->slots_per_frame)>>1; uint16_t slots_per_hf = (fp->slots_per_frame)>>1;
...@@ -94,11 +94,12 @@ void nr_common_signal_procedures (PHY_VARS_gNB *gNB,int frame, int slot) { ...@@ -94,11 +94,12 @@ void nr_common_signal_procedures (PHY_VARS_gNB *gNB,int frame, int slot) {
if(rel_slot<38 && rel_slot>=0) { // there is no SSB beyond slot 37 if(rel_slot<38 && rel_slot>=0) { // there is no SSB beyond slot 37
for (int i=0; i<2; i++) { // max two SSB per frame for (int i=0; i<2; i++) { // max two SSB per slot
ssb_index = i + SSB_Table[rel_slot]; // computing the ssb_index ssb_index = i + SSB_Table[rel_slot]; // computing the ssb_index
if ((ssb_index<64) && ((fp->L_ssb >> (63-ssb_index)) & 0x01)) { // generating the ssb only if the bit of L_ssb at current ssb index is 1 if ((ssb_index<64) && ((fp->L_ssb >> (63-ssb_index)) & 0x01)) { // generating the ssb only if the bit of L_ssb at current ssb index is 1
ssb_per_slot++;
fp->ssb_index = ssb_index; fp->ssb_index = ssb_index;
int ssb_start_symbol_abs = nr_get_ssb_start_symbol(fp); // computing the starting symbol for current ssb int ssb_start_symbol_abs = nr_get_ssb_start_symbol(fp); // computing the starting symbol for current ssb
ssb_start_symbol = ssb_start_symbol_abs % fp->symbols_per_slot; // start symbol wrt slot ssb_start_symbol = ssb_start_symbol_abs % fp->symbols_per_slot; // start symbol wrt slot
...@@ -130,6 +131,16 @@ void nr_common_signal_procedures (PHY_VARS_gNB *gNB,int frame, int slot) { ...@@ -130,6 +131,16 @@ void nr_common_signal_procedures (PHY_VARS_gNB *gNB,int frame, int slot) {
ssb_start_symbol, ssb_start_symbol,
n_hf, frame, cfg, fp); n_hf, frame, cfg, fp);
// SSB beamforming is handled at PHY
// currently our PHY does not support switching more than once a slot.
if (ssb_per_slot>1) {
LOG_W(PHY,"beamforming currently not supported for more than one SSB per slot\n");
}
else if (ssb_per_slot==1) {
LOG_D(PHY,"slot %d, ssb_index %d, beam %d\n",slot,ssb_index,cfg->ssb_table.ssb_beam_id_list[ssb_index].beam_id.value);
for (int j=0;j<fp->symbols_per_slot;j++)
gNB->common_vars.beam_id[0][slot*fp->symbols_per_slot+j] = cfg->ssb_table.ssb_beam_id_list[ssb_index].beam_id.value;
}
} }
} }
} }
...@@ -155,9 +166,10 @@ void phy_procedures_gNB_TX(PHY_VARS_gNB *gNB, ...@@ -155,9 +166,10 @@ void phy_procedures_gNB_TX(PHY_VARS_gNB *gNB,
if (do_meas==1) start_meas(&gNB->phy_proc_tx); if (do_meas==1) start_meas(&gNB->phy_proc_tx);
// clear the transmit data array for the current subframe // clear the transmit data array and beam index for the current slot
for (aa=0; aa<cfg->carrier_config.num_tx_ant.value; aa++) { for (aa=0; aa<cfg->carrier_config.num_tx_ant.value; aa++) {
memset(&gNB->common_vars.txdataF[aa][txdataF_offset],0,fp->samples_per_slot_wCP*sizeof(int32_t)); memset(&gNB->common_vars.txdataF[aa][txdataF_offset],0,fp->samples_per_slot_wCP*sizeof(int32_t));
memset(&gNB->common_vars.beam_id[aa][slot*fp->symbols_per_slot],255,fp->symbols_per_slot*sizeof(uint8_t));
} }
VCD_SIGNAL_DUMPER_DUMP_FUNCTION_BY_NAME(VCD_SIGNAL_DUMPER_FUNCTIONS_PHY_PROCEDURES_gNB_COMMON_TX,1); VCD_SIGNAL_DUMPER_DUMP_FUNCTION_BY_NAME(VCD_SIGNAL_DUMPER_FUNCTIONS_PHY_PROCEDURES_gNB_COMMON_TX,1);
...@@ -673,7 +685,10 @@ void phy_procedures_gNB_uespec_RX(PHY_VARS_gNB *gNB, int frame_rx, int slot_rx) ...@@ -673,7 +685,10 @@ void phy_procedures_gNB_uespec_RX(PHY_VARS_gNB *gNB, int frame_rx, int slot_rx)
} }
} }
// figure out a better way to choose slot_rx, 19 is ok for a particular TDD configuration with 30kHz SCS // figure out a better way to choose slot_rx, 19 is ok for a particular TDD configuration with 30kHz SCS
if ((frame_rx&127) == 0 && slot_rx==19) dump_pusch_stats(gNB); if ((frame_rx&127) == 0 && slot_rx==19) {
dump_pusch_stats(gNB);
LOG_I(PHY, "Number of bad PUCCH received: %lu\n", gNB->bad_pucch);
}
if (pucch_decode_done || pusch_decode_done) { if (pucch_decode_done || pusch_decode_done) {
T(T_GNB_PHY_PUCCH_PUSCH_IQ, T_INT(frame_rx), T_INT(slot_rx), T_BUFFER(&gNB->common_vars.rxdataF[0][0], gNB->frame_parms.symbols_per_slot * gNB->frame_parms.ofdm_symbol_size * 4)); T(T_GNB_PHY_PUCCH_PUSCH_IQ, T_INT(frame_rx), T_INT(slot_rx), T_BUFFER(&gNB->common_vars.rxdataF[0][0], gNB->frame_parms.symbols_per_slot * gNB->frame_parms.ofdm_symbol_size * 4));
......
...@@ -1696,7 +1696,6 @@ int phy_procedures_nrUE_RX(PHY_VARS_NR_UE *ue, ...@@ -1696,7 +1696,6 @@ int phy_procedures_nrUE_RX(PHY_VARS_NR_UE *ue,
} }
#ifdef NR_PDCCH_SCHED #ifdef NR_PDCCH_SCHED
nr_gold_pdcch(ue, 0, 2);
LOG_D(PHY," ------ --> PDCCH ChannelComp/LLR Frame.slot %d.%d ------ \n", frame_rx%1024, nr_slot_rx); LOG_D(PHY," ------ --> PDCCH ChannelComp/LLR Frame.slot %d.%d ------ \n", frame_rx%1024, nr_slot_rx);
VCD_SIGNAL_DUMPER_DUMP_FUNCTION_BY_NAME(VCD_SIGNAL_DUMPER_FUNCTIONS_UE_SLOT_FEP_PDCCH, VCD_FUNCTION_IN); VCD_SIGNAL_DUMPER_DUMP_FUNCTION_BY_NAME(VCD_SIGNAL_DUMPER_FUNCTIONS_UE_SLOT_FEP_PDCCH, VCD_FUNCTION_IN);
...@@ -1754,16 +1753,10 @@ int phy_procedures_nrUE_RX(PHY_VARS_NR_UE *ue, ...@@ -1754,16 +1753,10 @@ int phy_procedures_nrUE_RX(PHY_VARS_NR_UE *ue,
NR_DL_UE_HARQ_t *dlsch0_harq = dlsch->harq_processes[harq_pid]; NR_DL_UE_HARQ_t *dlsch0_harq = dlsch->harq_processes[harq_pid];
uint16_t nb_symb_sch = dlsch0_harq->nb_symbols; uint16_t nb_symb_sch = dlsch0_harq->nb_symbols;
uint16_t start_symb_sch = dlsch0_harq->start_symbol; uint16_t start_symb_sch = dlsch0_harq->start_symbol;
int symb_dmrs = -1;
LOG_D(PHY," ------ --> PDSCH ChannelComp/LLR Frame.slot %d.%d ------ \n", frame_rx%1024, nr_slot_rx); LOG_D(PHY," ------ --> PDSCH ChannelComp/LLR Frame.slot %d.%d ------ \n", frame_rx%1024, nr_slot_rx);
//to update from pdsch config //to update from pdsch config
for (int i=0;i<4;i++) if (((1<<i)&dlsch0_harq->dlDmrsSymbPos) > 0) {symb_dmrs=i;break;}
AssertFatal(symb_dmrs>=0,"no dmrs in 0..3\n");
LOG_D(PHY,"Initializing dmrs for slot %d DMRS mask %x\n", nr_slot_rx, dlsch0_harq->dlDmrsSymbPos);
nr_gold_pdsch(ue, nr_slot_rx, 0);
for (uint16_t m=start_symb_sch;m<(nb_symb_sch+start_symb_sch) ; m++){ for (uint16_t m=start_symb_sch;m<(nb_symb_sch+start_symb_sch) ; m++){
nr_slot_fep(ue, nr_slot_fep(ue,
proc, proc,
......
...@@ -831,7 +831,7 @@ int main(int argc, char **argv) ...@@ -831,7 +831,7 @@ int main(int argc, char **argv)
init_nr_ue_transport(UE,0); init_nr_ue_transport(UE,0);
nr_gold_pbch(UE); nr_gold_pbch(UE);
nr_gold_pdcch(UE,0,2); nr_gold_pdcch(UE,0);
nr_l2_init_ue(NULL); nr_l2_init_ue(NULL);
UE_mac = get_mac_inst(0); UE_mac = get_mac_inst(0);
......
...@@ -149,13 +149,13 @@ void fill_scc(NR_ServingCellConfigCommon_t *scc,uint64_t *ssb_bitmap,int N_RB_DL ...@@ -149,13 +149,13 @@ void fill_scc(NR_ServingCellConfigCommon_t *scc,uint64_t *ssb_bitmap,int N_RB_DL
scc->uplinkConfigCommon->initialUplinkBWP->rach_ConfigCommon->choice.setup->prach_RootSequenceIndex.present=NR_RACH_ConfigCommon__prach_RootSequenceIndex_PR_l139; scc->uplinkConfigCommon->initialUplinkBWP->rach_ConfigCommon->choice.setup->prach_RootSequenceIndex.present=NR_RACH_ConfigCommon__prach_RootSequenceIndex_PR_l139;
scc->uplinkConfigCommon->initialUplinkBWP->rach_ConfigCommon->choice.setup->prach_RootSequenceIndex.choice.l139=0; scc->uplinkConfigCommon->initialUplinkBWP->rach_ConfigCommon->choice.setup->prach_RootSequenceIndex.choice.l139=0;
scc->uplinkConfigCommon->initialUplinkBWP->rach_ConfigCommon->choice.setup->restrictedSetConfig=NR_RACH_ConfigCommon__restrictedSetConfig_unrestrictedSet; scc->uplinkConfigCommon->initialUplinkBWP->rach_ConfigCommon->choice.setup->restrictedSetConfig=NR_RACH_ConfigCommon__restrictedSetConfig_unrestrictedSet;
*scc->uplinkConfigCommon->initialUplinkBWP->pusch_ConfigCommon->choice.setup->pusch_TimeDomainAllocationList->list.array[0]->k2=2; *scc->uplinkConfigCommon->initialUplinkBWP->pusch_ConfigCommon->choice.setup->pusch_TimeDomainAllocationList->list.array[0]->k2=6;
scc->uplinkConfigCommon->initialUplinkBWP->pusch_ConfigCommon->choice.setup->pusch_TimeDomainAllocationList->list.array[0]->mappingType=NR_PUSCH_TimeDomainResourceAllocation__mappingType_typeB; scc->uplinkConfigCommon->initialUplinkBWP->pusch_ConfigCommon->choice.setup->pusch_TimeDomainAllocationList->list.array[0]->mappingType=NR_PUSCH_TimeDomainResourceAllocation__mappingType_typeB;
scc->uplinkConfigCommon->initialUplinkBWP->pusch_ConfigCommon->choice.setup->pusch_TimeDomainAllocationList->list.array[0]->startSymbolAndLength=55; scc->uplinkConfigCommon->initialUplinkBWP->pusch_ConfigCommon->choice.setup->pusch_TimeDomainAllocationList->list.array[0]->startSymbolAndLength=55;
*scc->uplinkConfigCommon->initialUplinkBWP->pusch_ConfigCommon->choice.setup->pusch_TimeDomainAllocationList->list.array[1]->k2=2; *scc->uplinkConfigCommon->initialUplinkBWP->pusch_ConfigCommon->choice.setup->pusch_TimeDomainAllocationList->list.array[1]->k2=6;
scc->uplinkConfigCommon->initialUplinkBWP->pusch_ConfigCommon->choice.setup->pusch_TimeDomainAllocationList->list.array[1]->mappingType=NR_PUSCH_TimeDomainResourceAllocation__mappingType_typeB; scc->uplinkConfigCommon->initialUplinkBWP->pusch_ConfigCommon->choice.setup->pusch_TimeDomainAllocationList->list.array[1]->mappingType=NR_PUSCH_TimeDomainResourceAllocation__mappingType_typeB;
scc->uplinkConfigCommon->initialUplinkBWP->pusch_ConfigCommon->choice.setup->pusch_TimeDomainAllocationList->list.array[1]->startSymbolAndLength=69; scc->uplinkConfigCommon->initialUplinkBWP->pusch_ConfigCommon->choice.setup->pusch_TimeDomainAllocationList->list.array[1]->startSymbolAndLength=69;
*scc->uplinkConfigCommon->initialUplinkBWP->pusch_ConfigCommon->choice.setup->pusch_TimeDomainAllocationList->list.array[2]->k2=2; *scc->uplinkConfigCommon->initialUplinkBWP->pusch_ConfigCommon->choice.setup->pusch_TimeDomainAllocationList->list.array[2]->k2=6;
scc->uplinkConfigCommon->initialUplinkBWP->pusch_ConfigCommon->choice.setup->pusch_TimeDomainAllocationList->list.array[2]->mappingType=NR_PUSCH_TimeDomainResourceAllocation__mappingType_typeB; scc->uplinkConfigCommon->initialUplinkBWP->pusch_ConfigCommon->choice.setup->pusch_TimeDomainAllocationList->list.array[2]->mappingType=NR_PUSCH_TimeDomainResourceAllocation__mappingType_typeB;
scc->uplinkConfigCommon->initialUplinkBWP->pusch_ConfigCommon->choice.setup->pusch_TimeDomainAllocationList->list.array[2]->startSymbolAndLength=55; scc->uplinkConfigCommon->initialUplinkBWP->pusch_ConfigCommon->choice.setup->pusch_TimeDomainAllocationList->list.array[2]->startSymbolAndLength=55;
*scc->uplinkConfigCommon->initialUplinkBWP->pusch_ConfigCommon->choice.setup->pusch_TimeDomainAllocationList->list.array[3]->k2=33; *scc->uplinkConfigCommon->initialUplinkBWP->pusch_ConfigCommon->choice.setup->pusch_TimeDomainAllocationList->list.array[3]->k2=33;
......
...@@ -147,8 +147,6 @@ void *gNB_app_task(void *args_p) ...@@ -147,8 +147,6 @@ void *gNB_app_task(void *args_p)
LOG_I(PHY, "%s() Task ready initialize structures\n", __FUNCTION__); LOG_I(PHY, "%s() Task ready initialize structures\n", __FUNCTION__);
RCconfig_NR_L1();
RCconfig_nr_macrlc(); RCconfig_nr_macrlc();
LOG_I(PHY, "%s() RC.nb_nr_L1_inst:%d\n", __FUNCTION__, RC.nb_nr_L1_inst); LOG_I(PHY, "%s() RC.nb_nr_L1_inst:%d\n", __FUNCTION__, RC.nb_nr_L1_inst);
......
...@@ -581,15 +581,17 @@ void RCconfig_NR_L1(void) { ...@@ -581,15 +581,17 @@ void RCconfig_NR_L1(void) {
RC.nb_nr_CC = (int *)malloc((1+RC.nb_nr_inst)*sizeof(int)); RC.nb_nr_CC = (int *)malloc((1+RC.nb_nr_inst)*sizeof(int));
RC.nb_nr_CC[0]=1; RC.nb_nr_CC[0]=1;
RC.nb_nr_inst =1; // DJP - feptx_prec uses num_gNB but phy_init_RU uses nb_nr_inst
LOG_I(PHY,"%s() NFAPI PNF mode - RC.nb_nr_inst=1 this is because phy_init_RU() uses that to index and not RC.num_gNB - why the 2 similar variables?\n", __FUNCTION__); LOG_I(PHY,"%s() NFAPI PNF mode - RC.nb_nr_inst=1 this is because phy_init_RU() uses that to index and not RC.num_gNB - why the 2 similar variables?\n", __FUNCTION__);
LOG_I(PHY,"%s() NFAPI PNF mode - RC.nb_nr_CC[0]=%d for init_gNB_afterRU()\n", __FUNCTION__, RC.nb_nr_CC[0]); LOG_I(PHY,"%s() NFAPI PNF mode - RC.nb_nr_CC[0]=%d for init_gNB_afterRU()\n", __FUNCTION__, RC.nb_nr_CC[0]);
LOG_I(PHY,"%s() NFAPI PNF mode - RC.nb_nr_macrlc_inst:%d because used by mac_top_init_gNB()\n", __FUNCTION__, RC.nb_nr_macrlc_inst); LOG_I(PHY,"%s() NFAPI PNF mode - RC.nb_nr_macrlc_inst:%d because used by mac_top_init_gNB()\n", __FUNCTION__, RC.nb_nr_macrlc_inst);
mac_top_init_gNB(); mac_top_init_gNB();
configure_nr_nfapi_pnf(RC.gNB[j]->eth_params_n.remote_addr, RC.gNB[j]->eth_params_n.remote_portc, RC.gNB[j]->eth_params_n.my_addr, RC.gNB[j]->eth_params_n.my_portd, RC.gNB[j]->eth_params_n .remote_portd); configure_nr_nfapi_pnf(RC.gNB[j]->eth_params_n.remote_addr,
RC.gNB[j]->eth_params_n.remote_portc,
RC.gNB[j]->eth_params_n.my_addr,
RC.gNB[j]->eth_params_n.my_portd,
RC.gNB[j]->eth_params_n.remote_portd);
}else { // other midhaul }else { // other midhaul
} }
}// for (j = 0; j < RC.nb_nr_L1_inst; j++) }// for (j = 0; j < RC.nb_nr_L1_inst; j++)
......
...@@ -2273,7 +2273,7 @@ uint8_t get_L_ptrs(uint8_t mcs1, uint8_t mcs2, uint8_t mcs3, uint8_t I_mcs, uint ...@@ -2273,7 +2273,7 @@ uint8_t get_L_ptrs(uint8_t mcs1, uint8_t mcs2, uint8_t mcs3, uint8_t I_mcs, uint
mcs4 = 28; mcs4 = 28;
if (I_mcs < mcs1) { if (I_mcs < mcs1) {
LOG_I(PHY, "PUSH PT-RS is not present.\n"); LOG_D(PHY, "PUSH PT-RS is not present.\n");
return -1; return -1;
} else if (I_mcs >= mcs1 && I_mcs < mcs2) } else if (I_mcs >= mcs1 && I_mcs < mcs2)
return 2; return 2;
...@@ -2303,7 +2303,7 @@ uint8_t get_L_ptrs(uint8_t mcs1, uint8_t mcs2, uint8_t mcs3, uint8_t I_mcs, uint ...@@ -2303,7 +2303,7 @@ uint8_t get_L_ptrs(uint8_t mcs1, uint8_t mcs2, uint8_t mcs3, uint8_t I_mcs, uint
uint8_t get_K_ptrs(uint16_t nrb0, uint16_t nrb1, uint16_t N_RB) { uint8_t get_K_ptrs(uint16_t nrb0, uint16_t nrb1, uint16_t N_RB) {
if (N_RB < nrb0) { if (N_RB < nrb0) {
LOG_I(PHY,"PUSH PT-RS is not present.\n"); LOG_D(PHY,"PUSH PT-RS is not present.\n");
return -1; return -1;
} else if (N_RB >= nrb0 && N_RB < nrb1) } else if (N_RB >= nrb0 && N_RB < nrb1)
return 2; return 2;
......
...@@ -101,7 +101,7 @@ int8_t nr_ue_decode_mib(module_id_t module_id, ...@@ -101,7 +101,7 @@ int8_t nr_ue_decode_mib(module_id_t module_id,
void *pduP, void *pduP,
uint16_t cell_id) uint16_t cell_id)
{ {
LOG_I(MAC,"[L2][MAC] decode mib\n"); LOG_D(MAC,"[L2][MAC] decode mib\n");
NR_UE_MAC_INST_t *mac = get_mac_inst(module_id); NR_UE_MAC_INST_t *mac = get_mac_inst(module_id);
...@@ -449,8 +449,9 @@ int nr_ue_process_dci_indication_pdu(module_id_t module_id,int cc_id, int gNB_in ...@@ -449,8 +449,9 @@ int nr_ue_process_dci_indication_pdu(module_id_t module_id,int cc_id, int gNB_in
LOG_D(MAC,"Received dci indication (rnti %x,dci format %d,n_CCE %d,payloadSize %d,payload %llx)\n", LOG_D(MAC,"Received dci indication (rnti %x,dci format %d,n_CCE %d,payloadSize %d,payload %llx)\n",
dci->rnti,dci->dci_format,dci->n_CCE,dci->payloadSize,*(unsigned long long*)dci->payloadBits); dci->rnti,dci->dci_format,dci->n_CCE,dci->payloadSize,*(unsigned long long*)dci->payloadBits);
uint32_t dci_format = nr_extract_dci_info(mac, dci->dci_format, dci->payloadSize, dci->rnti, (uint64_t *)dci->payloadBits, def_dci_pdu_rel15); if (nr_extract_dci_info(mac, dci->dci_format, dci->payloadSize, dci->rnti, (uint64_t *)dci->payloadBits, def_dci_pdu_rel15))
return (nr_ue_process_dci(module_id, cc_id, gNB_index, frame, slot, def_dci_pdu_rel15, dci->rnti, dci_format)); return -1;
return (nr_ue_process_dci(module_id, cc_id, gNB_index, frame, slot, def_dci_pdu_rel15, dci->rnti, dci->dci_format));
} }
int8_t nr_ue_process_dci(module_id_t module_id, int cc_id, uint8_t gNB_index, frame_t frame, int slot, dci_pdu_rel15_t *dci, uint16_t rnti, uint8_t dci_format){ int8_t nr_ue_process_dci(module_id_t module_id, int cc_id, uint8_t gNB_index, frame_t frame, int slot, dci_pdu_rel15_t *dci, uint16_t rnti, uint8_t dci_format){
...@@ -1129,11 +1130,11 @@ int get_n_rb(NR_UE_MAC_INST_t *mac, int rnti_type){ ...@@ -1129,11 +1130,11 @@ int get_n_rb(NR_UE_MAC_INST_t *mac, int rnti_type){
} }
uint8_t nr_extract_dci_info(NR_UE_MAC_INST_t *mac, uint8_t nr_extract_dci_info(NR_UE_MAC_INST_t *mac,
uint8_t dci_format, uint8_t dci_format,
uint8_t dci_size, uint8_t dci_size,
uint16_t rnti, uint16_t rnti,
uint64_t *dci_pdu, uint64_t *dci_pdu,
dci_pdu_rel15_t *dci_pdu_rel15) { dci_pdu_rel15_t *dci_pdu_rel15) {
int rnti_type = get_rnti_type(mac, rnti); int rnti_type = get_rnti_type(mac, rnti);
...@@ -1147,32 +1148,6 @@ uint8_t nr_extract_dci_info(NR_UE_MAC_INST_t *mac, ...@@ -1147,32 +1148,6 @@ uint8_t nr_extract_dci_info(NR_UE_MAC_INST_t *mac,
int pos=0; int pos=0;
int fsize=0; int fsize=0;
if (rnti_type == NR_RNTI_C) {
// First find out the DCI format from the first bit (UE performed blind decoding)
pos++;
dci_pdu_rel15->format_indicator = (*dci_pdu>>(dci_size-pos))&1;
#ifdef DEBUG_EXTRACT_DCI
LOG_D(MAC,"Format indicator %d (%d bits) N_RB_BWP %d => %d (0x%lx)\n",dci_pdu_rel15->format_indicator,1,N_RB,dci_size-pos,*dci_pdu);
#endif
if (dci_format == NR_UL_DCI_FORMAT_0_0 || dci_format == NR_DL_DCI_FORMAT_1_0) {
if (dci_pdu_rel15->format_indicator == 0)
dci_format = NR_UL_DCI_FORMAT_0_0;
else
dci_format = NR_DL_DCI_FORMAT_1_0;
}
else if (dci_format == NR_UL_DCI_FORMAT_0_1 || dci_format == NR_DL_DCI_FORMAT_1_1) {
// In case the sizes of formats 0_1 and 1_1 happen to be the same
if (dci_pdu_rel15->format_indicator == 0)
dci_format = NR_UL_DCI_FORMAT_0_1;
else
dci_format = NR_DL_DCI_FORMAT_1_1;
}
}
#ifdef DEBUG_EXTRACT_DCI
LOG_D(MAC, "DCI format is %d\n", dci_format);
#endif
switch(dci_format) { switch(dci_format) {
case NR_DL_DCI_FORMAT_1_0: case NR_DL_DCI_FORMAT_1_0:
...@@ -1213,7 +1188,15 @@ uint8_t nr_extract_dci_info(NR_UE_MAC_INST_t *mac, ...@@ -1213,7 +1188,15 @@ uint8_t nr_extract_dci_info(NR_UE_MAC_INST_t *mac,
break; break;
case NR_RNTI_C: case NR_RNTI_C:
//Identifier for DCI formats
pos++;
dci_pdu_rel15->format_indicator = (*dci_pdu>>(dci_size-pos))&1;
if (dci_pdu_rel15->format_indicator == 0)
return 1; // discard dci, format indicator not corresponding to dci_format
#ifdef DEBUG_EXTRACT_DCI
LOG_D(MAC,"Format indicator %d (%d bits) N_RB_BWP %d => %d (0x%lx)\n",dci_pdu_rel15->format_indicator,1,N_RB,dci_size-pos,*dci_pdu);
#endif
// Freq domain assignment (275rb >> fsize = 16) // Freq domain assignment (275rb >> fsize = 16)
fsize = (int)ceil( log2( (N_RB*(N_RB+1))>>1 ) ); fsize = (int)ceil( log2( (N_RB*(N_RB+1))>>1 ) );
pos+=fsize; pos+=fsize;
...@@ -1395,6 +1378,8 @@ uint8_t nr_extract_dci_info(NR_UE_MAC_INST_t *mac, ...@@ -1395,6 +1378,8 @@ uint8_t nr_extract_dci_info(NR_UE_MAC_INST_t *mac,
// indicating a DL DCI format 1bit // indicating a DL DCI format 1bit
pos++; pos++;
dci_pdu_rel15->format_indicator = (*dci_pdu>>(dci_size-pos))&1; dci_pdu_rel15->format_indicator = (*dci_pdu>>(dci_size-pos))&1;
if (dci_pdu_rel15->format_indicator == 0)
return 1; // discard dci, format indicator not corresponding to dci_format
// Freq domain assignment 0-16 bit // Freq domain assignment 0-16 bit
fsize = (int)ceil( log2( (N_RB*(N_RB+1))>>1 ) ); fsize = (int)ceil( log2( (N_RB*(N_RB+1))>>1 ) );
pos+=fsize; pos+=fsize;
...@@ -1433,6 +1418,11 @@ uint8_t nr_extract_dci_info(NR_UE_MAC_INST_t *mac, ...@@ -1433,6 +1418,11 @@ uint8_t nr_extract_dci_info(NR_UE_MAC_INST_t *mac,
switch(rnti_type) switch(rnti_type)
{ {
case NR_RNTI_C: case NR_RNTI_C:
//Identifier for DCI formats
pos++;
dci_pdu_rel15->format_indicator = (*dci_pdu>>(dci_size-pos))&1;
if (dci_pdu_rel15->format_indicator == 1)
return 1; // discard dci, format indicator not corresponding to dci_format
fsize = (int)ceil( log2( (N_RB_UL*(N_RB_UL+1))>>1 ) ); fsize = (int)ceil( log2( (N_RB_UL*(N_RB_UL+1))>>1 ) );
pos+=fsize; pos+=fsize;
dci_pdu_rel15->frequency_domain_assignment.val = (*dci_pdu>>(dci_size-pos))&((1<<fsize)-1); dci_pdu_rel15->frequency_domain_assignment.val = (*dci_pdu>>(dci_size-pos))&((1<<fsize)-1);
...@@ -1508,6 +1498,11 @@ uint8_t nr_extract_dci_info(NR_UE_MAC_INST_t *mac, ...@@ -1508,6 +1498,11 @@ uint8_t nr_extract_dci_info(NR_UE_MAC_INST_t *mac,
switch(rnti_type) switch(rnti_type)
{ {
case NR_RNTI_C: case NR_RNTI_C:
//Identifier for DCI formats
pos++;
dci_pdu_rel15->format_indicator = (*dci_pdu>>(dci_size-pos))&1;
if (dci_pdu_rel15->format_indicator == 0)
return 1; // discard dci, format indicator not corresponding to dci_format
// Carrier indicator // Carrier indicator
pos+=dci_pdu_rel15->carrier_indicator.nbits; pos+=dci_pdu_rel15->carrier_indicator.nbits;
dci_pdu_rel15->carrier_indicator.val = (*dci_pdu>>(dci_size-pos))&((1<<dci_pdu_rel15->carrier_indicator.nbits)-1); dci_pdu_rel15->carrier_indicator.val = (*dci_pdu>>(dci_size-pos))&((1<<dci_pdu_rel15->carrier_indicator.nbits)-1);
...@@ -1593,6 +1588,11 @@ uint8_t nr_extract_dci_info(NR_UE_MAC_INST_t *mac, ...@@ -1593,6 +1588,11 @@ uint8_t nr_extract_dci_info(NR_UE_MAC_INST_t *mac,
switch(rnti_type) switch(rnti_type)
{ {
case NR_RNTI_C: case NR_RNTI_C:
//Identifier for DCI formats
pos++;
dci_pdu_rel15->format_indicator = (*dci_pdu>>(dci_size-pos))&1;
if (dci_pdu_rel15->format_indicator == 1)
return 1; // discard dci, format indicator not corresponding to dci_format
// Carrier indicator // Carrier indicator
pos+=dci_pdu_rel15->carrier_indicator.nbits; pos+=dci_pdu_rel15->carrier_indicator.nbits;
dci_pdu_rel15->carrier_indicator.val = (*dci_pdu>>(dci_size-pos))&((1<<dci_pdu_rel15->carrier_indicator.nbits)-1); dci_pdu_rel15->carrier_indicator.val = (*dci_pdu>>(dci_size-pos))&((1<<dci_pdu_rel15->carrier_indicator.nbits)-1);
...@@ -1701,7 +1701,7 @@ uint8_t nr_extract_dci_info(NR_UE_MAC_INST_t *mac, ...@@ -1701,7 +1701,7 @@ uint8_t nr_extract_dci_info(NR_UE_MAC_INST_t *mac,
break; break;
} }
return dci_format; return 0;
} }
/////////////////////////////////// ///////////////////////////////////
......
...@@ -109,7 +109,11 @@ long get_k2(NR_UE_MAC_INST_t *mac, uint8_t time_domain_ind) { ...@@ -109,7 +109,11 @@ long get_k2(NR_UE_MAC_INST_t *mac, uint8_t time_domain_ind) {
} }
k2 = *pusch_TimeDomainAllocationList->list.array[time_domain_ind]->k2; k2 = *pusch_TimeDomainAllocationList->list.array[time_domain_ind]->k2;
} }
AssertFatal(k2 >= DURATION_RX_TO_TX,
"Slot offset K2 (%ld) cannot be less than DURATION_RX_TO_TX (%d)\n",
k2,DURATION_RX_TO_TX);
LOG_D(MAC, "get_k2(): k2 is %ld\n", k2); LOG_D(MAC, "get_k2(): k2 is %ld\n", k2);
return k2; return k2;
} }
...@@ -997,6 +1001,10 @@ int nr_ue_pusch_scheduler(NR_UE_MAC_INST_t *mac, ...@@ -997,6 +1001,10 @@ int nr_ue_pusch_scheduler(NR_UE_MAC_INST_t *mac,
break; break;
} }
AssertFatal((k2+delta) >= DURATION_RX_TO_TX,
"Slot offset (%d) for Msg3 cannot be less than DURATION_RX_TO_TX (%d)\n",
k2+delta,DURATION_RX_TO_TX);
*slot_tx = (current_slot + k2 + delta) % nr_slots_per_frame[mu]; *slot_tx = (current_slot + k2 + delta) % nr_slots_per_frame[mu];
if (current_slot + k2 + delta > nr_slots_per_frame[mu]){ if (current_slot + k2 + delta > nr_slots_per_frame[mu]){
*frame_tx = (current_frame + 1) % 1024; *frame_tx = (current_frame + 1) % 1024;
......
...@@ -264,15 +264,28 @@ void config_common(int Mod_idP, int pdsch_AntennaPorts, int pusch_AntennaPorts, ...@@ -264,15 +264,28 @@ void config_common(int Mod_idP, int pdsch_AntennaPorts, int pusch_AntennaPorts,
cfg->ssb_table.ssb_mask_list[0].ssb_mask.tl.tag = NFAPI_NR_CONFIG_SSB_MASK_TAG; cfg->ssb_table.ssb_mask_list[0].ssb_mask.tl.tag = NFAPI_NR_CONFIG_SSB_MASK_TAG;
cfg->ssb_table.ssb_mask_list[1].ssb_mask.tl.tag = NFAPI_NR_CONFIG_SSB_MASK_TAG; cfg->ssb_table.ssb_mask_list[1].ssb_mask.tl.tag = NFAPI_NR_CONFIG_SSB_MASK_TAG;
cfg->num_tlv++; cfg->num_tlv+=2;
cfg->carrier_config.num_tx_ant.value = pdsch_AntennaPorts; cfg->carrier_config.num_tx_ant.value = pdsch_AntennaPorts;
AssertFatal(pdsch_AntennaPorts > 0 && pdsch_AntennaPorts < 13, "pdsch_AntennaPorts in 1...12\n"); AssertFatal(pdsch_AntennaPorts > 0 && pdsch_AntennaPorts < 13, "pdsch_AntennaPorts in 1...12\n");
cfg->carrier_config.num_tx_ant.tl.tag = NFAPI_NR_CONFIG_NUM_TX_ANT_TAG; cfg->carrier_config.num_tx_ant.tl.tag = NFAPI_NR_CONFIG_NUM_TX_ANT_TAG;
int num_ssb=0; int num_ssb=0;
for (int i=0;i<32;i++) { for (int i=0;i<32;i++) {
num_ssb += (cfg->ssb_table.ssb_mask_list[0].ssb_mask.value>>i)&1; cfg->ssb_table.ssb_beam_id_list[i].beam_id.tl.tag = NFAPI_NR_CONFIG_BEAM_ID_TAG;
num_ssb += (cfg->ssb_table.ssb_mask_list[1].ssb_mask.value>>i)&1; if ((cfg->ssb_table.ssb_mask_list[0].ssb_mask.value>>(31-i))&1) {
cfg->ssb_table.ssb_beam_id_list[i].beam_id.value = num_ssb;
num_ssb++;
}
cfg->num_tlv++;
}
for (int i=0;i<32;i++) {
cfg->ssb_table.ssb_beam_id_list[32+i].beam_id.tl.tag = NFAPI_NR_CONFIG_BEAM_ID_TAG;
if ((cfg->ssb_table.ssb_mask_list[1].ssb_mask.value>>(31-i))&1) {
cfg->ssb_table.ssb_beam_id_list[32+i].beam_id.value = num_ssb;
num_ssb++;
}
cfg->num_tlv++;
} }
cfg->carrier_config.num_rx_ant.value = pusch_AntennaPorts; cfg->carrier_config.num_rx_ant.value = pusch_AntennaPorts;
...@@ -296,17 +309,19 @@ void config_common(int Mod_idP, int pdsch_AntennaPorts, int pusch_AntennaPorts, ...@@ -296,17 +309,19 @@ void config_common(int Mod_idP, int pdsch_AntennaPorts, int pusch_AntennaPorts,
} }
if(cfg->cell_config.frame_duplex_type.value == TDD){ if(cfg->cell_config.frame_duplex_type.value == TDD){
LOG_I(MAC,"Setting TDD configuration period to %d\n",cfg->tdd_table.tdd_period.value); LOG_I(MAC,"Setting TDD configuration period to %d\n",cfg->tdd_table.tdd_period.value);
int return_tdd = set_tdd_config_nr(cfg, int periods_per_frame = set_tdd_config_nr(cfg,
scc->uplinkConfigCommon->frequencyInfoUL->scs_SpecificCarrierList.list.array[0]->subcarrierSpacing, scc->uplinkConfigCommon->frequencyInfoUL->scs_SpecificCarrierList.list.array[0]->subcarrierSpacing,
scc->tdd_UL_DL_ConfigurationCommon->pattern1.nrofDownlinkSlots, scc->tdd_UL_DL_ConfigurationCommon->pattern1.nrofDownlinkSlots,
scc->tdd_UL_DL_ConfigurationCommon->pattern1.nrofDownlinkSymbols, scc->tdd_UL_DL_ConfigurationCommon->pattern1.nrofDownlinkSymbols,
scc->tdd_UL_DL_ConfigurationCommon->pattern1.nrofUplinkSlots, scc->tdd_UL_DL_ConfigurationCommon->pattern1.nrofUplinkSlots,
scc->tdd_UL_DL_ConfigurationCommon->pattern1.nrofUplinkSymbols); scc->tdd_UL_DL_ConfigurationCommon->pattern1.nrofUplinkSymbols);
if (return_tdd != 0) if (periods_per_frame < 0)
LOG_E(MAC,"TDD configuration can not be done\n"); LOG_E(MAC,"TDD configuration can not be done\n");
else else {
LOG_I(MAC,"TDD has been properly configurated\n"); LOG_I(MAC,"TDD has been properly configurated\n");
RC.nrmac[Mod_idP]->tdd_beam_association = (int16_t *)malloc16(periods_per_frame*sizeof(int16_t));
}
} }
} }
......
...@@ -301,6 +301,7 @@ void schedule_nr_SRS(module_id_t module_idP, frame_t frameP, sub_frame_t subfram ...@@ -301,6 +301,7 @@ void schedule_nr_SRS(module_id_t module_idP, frame_t frameP, sub_frame_t subfram
bool is_xlsch_in_slot(uint64_t bitmap, sub_frame_t slot) { bool is_xlsch_in_slot(uint64_t bitmap, sub_frame_t slot) {
if (slot>64) return false; //quickfix for FR2 where there are more than 64 slots (bitmap to be removed)
return (bitmap >> slot) & 0x01; return (bitmap >> slot) & 0x01;
} }
...@@ -357,6 +358,12 @@ void gNB_dlsch_ulsch_scheduler(module_id_t module_idP, ...@@ -357,6 +358,12 @@ void gNB_dlsch_ulsch_scheduler(module_id_t module_idP,
AssertFatal(1==0,"Undefined tdd period %ld\n", scc->tdd_UL_DL_ConfigurationCommon->pattern1.dl_UL_TransmissionPeriodicity); AssertFatal(1==0,"Undefined tdd period %ld\n", scc->tdd_UL_DL_ConfigurationCommon->pattern1.dl_UL_TransmissionPeriodicity);
} }
if (slot==0 && (*scc->downlinkConfigCommon->frequencyInfoDL->frequencyBandList.list.array[0]>=257)) {
// re-initialization of tdd_beam_association at beginning of frame (only for FR2)
for (int i=0; i<nb_periods_per_frame; i++)
gNB->tdd_beam_association[i] = -1;
}
int num_slots_per_tdd = (nr_slots_per_frame[*scc->ssbSubcarrierSpacing])/nb_periods_per_frame; int num_slots_per_tdd = (nr_slots_per_frame[*scc->ssbSubcarrierSpacing])/nb_periods_per_frame;
const int nr_ulmix_slots = tdd_pattern->nrofUplinkSlots + (tdd_pattern->nrofUplinkSymbols!=0); const int nr_ulmix_slots = tdd_pattern->nrofUplinkSlots + (tdd_pattern->nrofUplinkSymbols!=0);
...@@ -410,7 +417,7 @@ void gNB_dlsch_ulsch_scheduler(module_id_t module_idP, ...@@ -410,7 +417,7 @@ void gNB_dlsch_ulsch_scheduler(module_id_t module_idP,
// This schedules MIB // This schedules MIB
schedule_nr_mib(module_idP, frame, slot, nr_slots_per_frame[*scc->ssbSubcarrierSpacing]); schedule_nr_mib(module_idP, frame, slot, nr_slots_per_frame[*scc->ssbSubcarrierSpacing],nb_periods_per_frame);
// This schedules SIB1 // This schedules SIB1
if ( get_softmodem_params()->sa == 1 ) if ( get_softmodem_params()->sa == 1 )
......
...@@ -385,7 +385,9 @@ void nr_schedule_msg2(uint16_t rach_frame, uint16_t rach_slot, ...@@ -385,7 +385,9 @@ void nr_schedule_msg2(uint16_t rach_frame, uint16_t rach_slot,
uint16_t *msg2_frame, uint16_t *msg2_slot, uint16_t *msg2_frame, uint16_t *msg2_slot,
NR_ServingCellConfigCommon_t *scc, NR_ServingCellConfigCommon_t *scc,
uint16_t monitoring_slot_period, uint16_t monitoring_slot_period,
uint16_t monitoring_offset,uint8_t index,uint8_t num_active_ssb){ uint16_t monitoring_offset,uint8_t beam_index,
uint8_t num_active_ssb,
int16_t *tdd_beam_association){
// preferentially we schedule the msg2 in the mixed slot or in the last dl slot // preferentially we schedule the msg2 in the mixed slot or in the last dl slot
// if they are allowed by search space configuration // if they are allowed by search space configuration
...@@ -402,18 +404,6 @@ void nr_schedule_msg2(uint16_t rach_frame, uint16_t rach_slot, ...@@ -402,18 +404,6 @@ void nr_schedule_msg2(uint16_t rach_frame, uint16_t rach_slot,
if ((scc->tdd_UL_DL_ConfigurationCommon->pattern1.nrofDownlinkSymbols > 0) || (scc->tdd_UL_DL_ConfigurationCommon->pattern1.nrofUplinkSymbols > 0)) if ((scc->tdd_UL_DL_ConfigurationCommon->pattern1.nrofDownlinkSymbols > 0) || (scc->tdd_UL_DL_ConfigurationCommon->pattern1.nrofUplinkSymbols > 0))
tdd_period_slot++; tdd_period_slot++;
// computing start of next period
uint8_t start_next_period = (rach_slot-(rach_slot%tdd_period_slot)+tdd_period_slot)%nr_slots_per_frame[mu];
*msg2_slot = start_next_period + last_dl_slot_period; // initializing scheduling of slot to next mixed (or last dl) slot
*msg2_frame = (*msg2_slot>(rach_slot))? rach_frame : (rach_frame +1);
// we can't schedule msg2 before sl_ahead since prach
int eff_slot = *msg2_slot+(*msg2_frame-rach_frame)*nr_slots_per_frame[mu];
if ((eff_slot-rach_slot)<=sl_ahead) {
*msg2_slot = (*msg2_slot+tdd_period_slot)%nr_slots_per_frame[mu];
*msg2_frame = (*msg2_slot>(rach_slot))? rach_frame : (rach_frame +1);
}
switch(response_window){ switch(response_window){
case NR_RACH_ConfigGeneric__ra_ResponseWindow_sl1: case NR_RACH_ConfigGeneric__ra_ResponseWindow_sl1:
slot_window = 1; slot_window = 1;
...@@ -448,6 +438,31 @@ void nr_schedule_msg2(uint16_t rach_frame, uint16_t rach_slot, ...@@ -448,6 +438,31 @@ void nr_schedule_msg2(uint16_t rach_frame, uint16_t rach_slot,
uint8_t slot_limit = (rach_slot + slot_window)%nr_slots_per_frame[mu]; uint8_t slot_limit = (rach_slot + slot_window)%nr_slots_per_frame[mu];
uint8_t frame_limit = (slot_limit>(rach_slot))? rach_frame : (rach_frame +1); uint8_t frame_limit = (slot_limit>(rach_slot))? rach_frame : (rach_frame +1);
// computing start of next period
int FR = *scc->downlinkConfigCommon->frequencyInfoDL->frequencyBandList.list.array[0] >= 257 ? nr_FR2 : nr_FR1;
uint8_t start_next_period = (rach_slot-(rach_slot%tdd_period_slot)+tdd_period_slot)%nr_slots_per_frame[mu];
*msg2_slot = start_next_period + last_dl_slot_period; // initializing scheduling of slot to next mixed (or last dl) slot
*msg2_frame = (*msg2_slot>(rach_slot))? rach_frame : (rach_frame +1);
// we can't schedule msg2 before sl_ahead since prach
int eff_slot = *msg2_slot+(*msg2_frame-rach_frame)*nr_slots_per_frame[mu];
if ((eff_slot-rach_slot)<=sl_ahead) {
*msg2_slot = (*msg2_slot+tdd_period_slot)%nr_slots_per_frame[mu];
*msg2_frame = (*msg2_slot>(rach_slot))? rach_frame : (rach_frame +1);
}
if (FR==nr_FR2) {
int num_tdd_period = *msg2_slot/tdd_period_slot;
while((tdd_beam_association[num_tdd_period]!=-1)&&(tdd_beam_association[num_tdd_period]!=beam_index)) {
*msg2_slot = (*msg2_slot+tdd_period_slot)%nr_slots_per_frame[mu];
*msg2_frame = (*msg2_slot>(rach_slot))? rach_frame : (rach_frame +1);
num_tdd_period = *msg2_slot/tdd_period_slot;
}
if(tdd_beam_association[num_tdd_period] == -1)
tdd_beam_association[num_tdd_period] = beam_index;
}
// go to previous slot if the current scheduled slot is beyond the response window // go to previous slot if the current scheduled slot is beyond the response window
// and if the slot is not among the PDCCH monitored ones (38.213 10.1) // and if the slot is not among the PDCCH monitored ones (38.213 10.1)
while (((*msg2_slot>slot_limit)&&(*msg2_frame>frame_limit)) || ((*msg2_frame*nr_slots_per_frame[mu]+*msg2_slot-monitoring_offset)%monitoring_slot_period !=0)) { while (((*msg2_slot>slot_limit)&&(*msg2_frame>frame_limit)) || ((*msg2_frame*nr_slots_per_frame[mu]+*msg2_slot-monitoring_offset)%monitoring_slot_period !=0)) {
...@@ -499,7 +514,6 @@ void nr_initiate_ra_proc(module_id_t module_idP, ...@@ -499,7 +514,6 @@ void nr_initiate_ra_proc(module_id_t module_idP,
break; break;
} }
} }
if (pr_found == 0) { if (pr_found == 0) {
continue; continue;
} }
...@@ -570,7 +584,8 @@ void nr_initiate_ra_proc(module_id_t module_idP, ...@@ -570,7 +584,8 @@ void nr_initiate_ra_proc(module_id_t module_idP,
monitoring_slot_period, monitoring_slot_period,
monitoring_offset, monitoring_offset,
beam_index, beam_index,
cc->num_active_ssb); cc->num_active_ssb,
nr_mac->tdd_beam_association);
ra->Msg2_frame = msg2_frame; ra->Msg2_frame = msg2_frame;
ra->Msg2_slot = msg2_slot; ra->Msg2_slot = msg2_slot;
...@@ -645,7 +660,8 @@ void nr_get_Msg3alloc(module_id_t module_id, ...@@ -645,7 +660,8 @@ void nr_get_Msg3alloc(module_id_t module_id,
NR_BWP_Uplink_t *ubwp, NR_BWP_Uplink_t *ubwp,
sub_frame_t current_slot, sub_frame_t current_slot,
frame_t current_frame, frame_t current_frame,
NR_RA_t *ra) { NR_RA_t *ra,
int16_t *tdd_beam_association) {
// msg3 is schedulend in mixed slot in the following TDD period // msg3 is schedulend in mixed slot in the following TDD period
...@@ -675,6 +691,18 @@ void nr_get_Msg3alloc(module_id_t module_id, ...@@ -675,6 +691,18 @@ void nr_get_Msg3alloc(module_id_t module_id,
else else
ra->Msg3_frame = current_frame + (temp_slot/nr_slots_per_frame[mu]); ra->Msg3_frame = current_frame + (temp_slot/nr_slots_per_frame[mu]);
// beam association for FR2
if (*scc->downlinkConfigCommon->frequencyInfoDL->frequencyBandList.list.array[0] >= 257) {
uint8_t tdd_period_slot = scc->tdd_UL_DL_ConfigurationCommon->pattern1.nrofDownlinkSlots + scc->tdd_UL_DL_ConfigurationCommon->pattern1.nrofUplinkSlots;
if ((scc->tdd_UL_DL_ConfigurationCommon->pattern1.nrofDownlinkSymbols > 0) || (scc->tdd_UL_DL_ConfigurationCommon->pattern1.nrofUplinkSymbols > 0))
tdd_period_slot++;
int num_tdd_period = ra->Msg3_slot/tdd_period_slot;
if((tdd_beam_association[num_tdd_period]!=-1)&&(tdd_beam_association[num_tdd_period]!=ra->beam_id))
AssertFatal(1==0,"Cannot schedule MSG3\n");
else
tdd_beam_association[num_tdd_period] = ra->beam_id;
}
LOG_I(MAC, "[RAPROC] Msg3 slot %d: current slot %u Msg3 frame %u k2 %u Msg3_tda_id %u start symbol index %u\n", ra->Msg3_slot, current_slot, ra->Msg3_frame, k2,ra->Msg3_tda_id, StartSymbolIndex); LOG_I(MAC, "[RAPROC] Msg3 slot %d: current slot %u Msg3 frame %u k2 %u Msg3_tda_id %u start symbol index %u\n", ra->Msg3_slot, current_slot, ra->Msg3_frame, k2,ra->Msg3_tda_id, StartSymbolIndex);
uint16_t *vrb_map_UL = uint16_t *vrb_map_UL =
&RC.nrmac[module_id]->common_channels[CC_id].vrb_map_UL[ra->Msg3_slot * MAX_BWP_SIZE]; &RC.nrmac[module_id]->common_channels[CC_id].vrb_map_UL[ra->Msg3_slot * MAX_BWP_SIZE];
...@@ -987,6 +1015,12 @@ void nr_generate_Msg2(module_id_t module_idP, int CC_id, frame_t frameP, sub_fra ...@@ -987,6 +1015,12 @@ void nr_generate_Msg2(module_id_t module_idP, int CC_id, frame_t frameP, sub_fra
pdsch_pdu_rel15->NrOfSymbols = NrOfSymbols; pdsch_pdu_rel15->NrOfSymbols = NrOfSymbols;
pdsch_pdu_rel15->dlDmrsSymbPos = fill_dmrs_mask(NULL, scc->dmrs_TypeA_Position, NrOfSymbols); pdsch_pdu_rel15->dlDmrsSymbPos = fill_dmrs_mask(NULL, scc->dmrs_TypeA_Position, NrOfSymbols);
pdsch_pdu_rel15->precodingAndBeamforming.num_prgs=1;
pdsch_pdu_rel15->precodingAndBeamforming.prg_size=275;
pdsch_pdu_rel15->precodingAndBeamforming.dig_bf_interfaces=1;
pdsch_pdu_rel15->precodingAndBeamforming.prgs_list[0].pm_idx = 0;
pdsch_pdu_rel15->precodingAndBeamforming.prgs_list[0].dig_bf_interface_list[0].beam_idx = ra->beam_id;
/* Fill PDCCH DL DCI PDU */ /* Fill PDCCH DL DCI PDU */
nfapi_nr_dl_dci_pdu_t *dci_pdu = &pdcch_pdu_rel15->dci_pdu[pdcch_pdu_rel15->numDlDci]; nfapi_nr_dl_dci_pdu_t *dci_pdu = &pdcch_pdu_rel15->dci_pdu[pdcch_pdu_rel15->numDlDci];
pdcch_pdu_rel15->numDlDci++; pdcch_pdu_rel15->numDlDci++;
...@@ -1003,7 +1037,7 @@ void nr_generate_Msg2(module_id_t module_idP, int CC_id, frame_t frameP, sub_fra ...@@ -1003,7 +1037,7 @@ void nr_generate_Msg2(module_id_t module_idP, int CC_id, frame_t frameP, sub_fra
dci_pdu_rel15_t dci_payload; dci_pdu_rel15_t dci_payload;
dci_payload.frequency_domain_assignment.val = PRBalloc_to_locationandbandwidth0(pdsch_pdu_rel15->rbSize, dci_payload.frequency_domain_assignment.val = PRBalloc_to_locationandbandwidth0(pdsch_pdu_rel15->rbSize,
pdsch_pdu_rel15->rbStart,dci10_bw); pdsch_pdu_rel15->rbStart,dci10_bw);
dci_payload.time_domain_assignment.val = time_domain_assignment; dci_payload.time_domain_assignment.val = time_domain_assignment;
dci_payload.vrb_to_prb_mapping.val = 0; dci_payload.vrb_to_prb_mapping.val = 0;
dci_payload.mcs = pdsch_pdu_rel15->mcsIndex[0]; dci_payload.mcs = pdsch_pdu_rel15->mcsIndex[0];
...@@ -1054,11 +1088,11 @@ void nr_generate_Msg2(module_id_t module_idP, int CC_id, frame_t frameP, sub_fra ...@@ -1054,11 +1088,11 @@ void nr_generate_Msg2(module_id_t module_idP, int CC_id, frame_t frameP, sub_fra
nr_mac->TX_req[CC_id].Slot = slotP; nr_mac->TX_req[CC_id].Slot = slotP;
// Program UL processing for Msg3 // Program UL processing for Msg3
nr_get_Msg3alloc(module_idP, CC_id, scc, ubwp, slotP, frameP, ra); nr_get_Msg3alloc(module_idP, CC_id, scc, ubwp, slotP, frameP, ra, nr_mac->tdd_beam_association);
LOG_I(MAC, "Frame %d, Subframe %d: Setting Msg3 reception for Frame %d Subframe %d\n", frameP, slotP, ra->Msg3_frame, ra->Msg3_slot); LOG_I(MAC, "Frame %d, Slot %d: Setting Msg3 reception for Frame %d Slot %d\n", frameP, slotP, ra->Msg3_frame, ra->Msg3_slot);
nr_add_msg3(module_idP, CC_id, frameP, slotP, ra, (uint8_t *) &tx_req->TLVs[0].value.direct[0]); nr_add_msg3(module_idP, CC_id, frameP, slotP, ra, (uint8_t *) &tx_req->TLVs[0].value.direct[0]);
ra->state = WAIT_Msg3; ra->state = WAIT_Msg3;
LOG_I(MAC,"[gNB %d][RAPROC] Frame %d, Subframe %d: RA state %d\n", module_idP, frameP, slotP, ra->state); LOG_I(MAC,"[gNB %d][RAPROC] Frame %d, Slot %d: RA state %d\n", module_idP, frameP, slotP, ra->state);
x_Overhead = 0; x_Overhead = 0;
nr_get_tbs_dl(&dl_tti_pdsch_pdu->pdsch_pdu, x_Overhead, pdsch_pdu_rel15->numDmrsCdmGrpsNoData, dci_payload.tb_scaling); nr_get_tbs_dl(&dl_tti_pdsch_pdu->pdsch_pdu, x_Overhead, pdsch_pdu_rel15->numDmrsCdmGrpsNoData, dci_payload.tb_scaling);
......
...@@ -85,7 +85,11 @@ void nr_simple_dlsch_preprocessor(module_id_t module_id, ...@@ -85,7 +85,11 @@ void nr_simple_dlsch_preprocessor(module_id_t module_id,
frame_t frame, frame_t frame,
sub_frame_t slot); sub_frame_t slot);
void schedule_nr_mib(module_id_t module_idP, frame_t frameP, sub_frame_t subframeP, uint8_t slots_per_frame); void schedule_nr_mib(module_id_t module_idP,
frame_t frameP,
sub_frame_t subframeP,
uint8_t slots_per_frame,
int nb_periods_per_frame);
/// uplink scheduler /// uplink scheduler
void nr_schedule_ulsch(module_id_t module_id, void nr_schedule_ulsch(module_id_t module_id,
...@@ -126,7 +130,8 @@ void nr_get_Msg3alloc(module_id_t module_id, ...@@ -126,7 +130,8 @@ void nr_get_Msg3alloc(module_id_t module_id,
NR_BWP_Uplink_t *ubwp, NR_BWP_Uplink_t *ubwp,
sub_frame_t current_subframe, sub_frame_t current_subframe,
frame_t current_frame, frame_t current_frame,
NR_RA_t *ra); NR_RA_t *ra,
int16_t *tdd_beam_association);
/* \brief Function in gNB to fill RAR pdu when requested by PHY. /* \brief Function in gNB to fill RAR pdu when requested by PHY.
@param ra Instance of RA resources of gNB @param ra Instance of RA resources of gNB
...@@ -264,7 +269,6 @@ NR_SearchSpace_t *get_searchspace( ...@@ -264,7 +269,6 @@ NR_SearchSpace_t *get_searchspace(
NR_BWP_Downlink_t *bwp, NR_BWP_Downlink_t *bwp,
NR_SearchSpace__searchSpaceType_PR target_ss); NR_SearchSpace__searchSpaceType_PR target_ss);
long get_K2(NR_BWP_Uplink_t *ubwp, int time_domain_assignment, int mu); long get_K2(NR_BWP_Uplink_t *ubwp, int time_domain_assignment, int mu);
void nr_save_pusch_fields(const NR_ServingCellConfigCommon_t *scc, void nr_save_pusch_fields(const NR_ServingCellConfigCommon_t *scc,
......
...@@ -664,11 +664,12 @@ typedef struct gNB_MAC_INST_s { ...@@ -664,11 +664,12 @@ typedef struct gNB_MAC_INST_s {
time_stats_t schedule_pch; time_stats_t schedule_pch;
/// CCE lists /// CCE lists
int cce_list[MAX_NUM_BWP][MAX_NUM_CORESET][MAX_NUM_CCE]; int cce_list[MAX_NUM_BWP][MAX_NUM_CORESET][MAX_NUM_CCE];
/// list of allocated beams per period
int16_t *tdd_beam_association;
/// PUCCH: keep track of the resources has already been used by saving the /// PUCCH: keep track of the resources has already been used by saving the
/// highest index not yet been used in a given slot. Dynamically allocated /// highest index not yet been used in a given slot. Dynamically allocated
/// so we can have it for every slot as a function of the numerology /// so we can have it for every slot as a function of the numerology
int *pucch_index_used[MAX_NUM_BWP]; int *pucch_index_used[MAX_NUM_BWP];
/// DL preprocessor for differentiated scheduling /// DL preprocessor for differentiated scheduling
nr_pp_impl_dl pre_processor_dl; nr_pp_impl_dl pre_processor_dl;
/// UL preprocessor for differentiated scheduling /// UL preprocessor for differentiated scheduling
......
...@@ -250,7 +250,8 @@ mac_rlc_status_resp_t mac_rlc_status_ind( ...@@ -250,7 +250,8 @@ mac_rlc_status_resp_t mac_rlc_status_ind(
+ buf_stat.retx_size + buf_stat.retx_size
+ buf_stat.tx_size; + buf_stat.tx_size;
} else { } else {
LOG_W(RLC, "[%s] Radio Bearer (channel ID %d) is NULL for UE with rntiP %x\n", __FUNCTION__, channel_idP, rntiP); if (!(frameP%128)) //to supress this warning message
LOG_W(RLC, "[%s] Radio Bearer (channel ID %d) is NULL for UE with rntiP %x\n", __FUNCTION__, channel_idP, rntiP);
ret.bytes_in_buffer = 0; ret.bytes_in_buffer = 0;
} }
......
...@@ -561,14 +561,14 @@ uint8_t do_SIB1_NR(rrc_gNB_carrier_data_t *carrier, ...@@ -561,14 +561,14 @@ uint8_t do_SIB1_NR(rrc_gNB_carrier_data_t *carrier,
case NR_ServingCellConfigCommon__ssb_PositionsInBurst_PR_mediumBitmap: case NR_ServingCellConfigCommon__ssb_PositionsInBurst_PR_mediumBitmap:
sib1->servingCellConfigCommon->ssb_PositionsInBurst.inOneGroup = configuration->scc->ssb_PositionsInBurst->choice.mediumBitmap; sib1->servingCellConfigCommon->ssb_PositionsInBurst.inOneGroup = configuration->scc->ssb_PositionsInBurst->choice.mediumBitmap;
break; break;
/* /*
groupPresence: This field is present when maximum number of SS/PBCH blocks per half frame equals to 64 as defined in TS 38.213 [13], clause 4.1. groupPresence: This field is present when maximum number of SS/PBCH blocks per half frame equals to 64 as defined in TS 38.213 [13], clause 4.1.
The first/leftmost bit corresponds to the SS/PBCH index 0-7, the second bit corresponds to SS/PBCH block 8-15, and so on. The first/leftmost bit corresponds to the SS/PBCH index 0-7, the second bit corresponds to SS/PBCH block 8-15, and so on.
Value 0 in the bitmap indicates that the SSBs according to inOneGroup are absent. Value 1 indicates that the SS/PBCH blocks are transmitted in accordance with inOneGroup. Value 0 in the bitmap indicates that the SSBs according to inOneGroup are absent. Value 1 indicates that the SS/PBCH blocks are transmitted in accordance with inOneGroup.
inOneGroup: When maximum number of SS/PBCH blocks per half frame equals to 64 as defined in TS 38.213 [13], clause 4.1, all 8 bit are valid; inOneGroup: When maximum number of SS/PBCH blocks per half frame equals to 64 as defined in TS 38.213 [13], clause 4.1, all 8 bit are valid;
The first/ leftmost bit corresponds to the first SS/PBCH block index in the group (i.e., to SSB index 0, 8, and so on); the second bit corresponds to the second SS/PBCH block index in the group The first/ leftmost bit corresponds to the first SS/PBCH block index in the group (i.e., to SSB index 0, 8, and so on); the second bit corresponds to the second SS/PBCH block index in the group
(i.e., to SSB index 1, 9, and so on), and so on. Value 0 in the bitmap indicates that the corresponding SS/PBCH block is not transmitted while value 1 indicates that the corresponding SS/PBCH block is transmitted. (i.e., to SSB index 1, 9, and so on), and so on. Value 0 in the bitmap indicates that the corresponding SS/PBCH block is not transmitted while value 1 indicates that the corresponding SS/PBCH block is transmitted.
*/ */
case NR_ServingCellConfigCommon__ssb_PositionsInBurst_PR_longBitmap: case NR_ServingCellConfigCommon__ssb_PositionsInBurst_PR_longBitmap:
sib1->servingCellConfigCommon->ssb_PositionsInBurst.inOneGroup.size = 1; sib1->servingCellConfigCommon->ssb_PositionsInBurst.inOneGroup.size = 1;
sib1->servingCellConfigCommon->ssb_PositionsInBurst.inOneGroup.bits_unused = 0; sib1->servingCellConfigCommon->ssb_PositionsInBurst.inOneGroup.bits_unused = 0;
......
...@@ -242,41 +242,18 @@ void fill_default_secondaryCellGroup(NR_ServingCellConfigCommon_t *servingcellco ...@@ -242,41 +242,18 @@ void fill_default_secondaryCellGroup(NR_ServingCellConfigCommon_t *servingcellco
secondaryCellGroup->spCellConfig->reconfigurationWithSync->rach_ConfigDedicated->choice.uplink->cfra->resources.present = NR_CFRA__resources_PR_ssb; secondaryCellGroup->spCellConfig->reconfigurationWithSync->rach_ConfigDedicated->choice.uplink->cfra->resources.present = NR_CFRA__resources_PR_ssb;
secondaryCellGroup->spCellConfig->reconfigurationWithSync->rach_ConfigDedicated->choice.uplink->cfra->resources.choice.ssb = calloc(1,sizeof(struct NR_CFRA__resources__ssb)); secondaryCellGroup->spCellConfig->reconfigurationWithSync->rach_ConfigDedicated->choice.uplink->cfra->resources.choice.ssb = calloc(1,sizeof(struct NR_CFRA__resources__ssb));
secondaryCellGroup->spCellConfig->reconfigurationWithSync->rach_ConfigDedicated->choice.uplink->cfra->resources.choice.ssb->ra_ssb_OccasionMaskIndex = 0; secondaryCellGroup->spCellConfig->reconfigurationWithSync->rach_ConfigDedicated->choice.uplink->cfra->resources.choice.ssb->ra_ssb_OccasionMaskIndex = 0;
struct NR_CFRA_SSB_Resource *ssbElem[8];
ssbElem[0] = calloc(1,sizeof(struct NR_CFRA_SSB_Resource)); int n_ssb = 0;
ssbElem[0]->ssb = 0; struct NR_CFRA_SSB_Resource *ssbElem[64];
ssbElem[0]->ra_PreambleIndex = 63; for (int i=0;i<64;i++) {
ASN_SEQUENCE_ADD(&secondaryCellGroup->spCellConfig->reconfigurationWithSync->rach_ConfigDedicated->choice.uplink->cfra->resources.choice.ssb->ssb_ResourceList.list,ssbElem[0]); if ((bitmap>>(63-i))&0x01){
#if 0 ssbElem[n_ssb] = calloc(1,sizeof(struct NR_CFRA_SSB_Resource));
ssbElem[1] = calloc(1,sizeof(struct NR_CFRA_SSB_Resource)); ssbElem[n_ssb]->ssb = i;
ssbElem[1]->ssb = 1; ssbElem[n_ssb]->ra_PreambleIndex = 63;
ssbElem[1]->ra_PreambleIndex = 62; ASN_SEQUENCE_ADD(&secondaryCellGroup->spCellConfig->reconfigurationWithSync->rach_ConfigDedicated->choice.uplink->cfra->resources.choice.ssb->ssb_ResourceList.list,ssbElem[n_ssb]);
ASN_SEQUENCE_ADD(&secondaryCellGroup->spCellConfig->reconfigurationWithSync->rach_ConfigDedicated->choice.uplink->cfra->resources.choice.ssb->ssb_ResourceList.list,ssbElem[1]); n_ssb++;
ssbElem[2] = calloc(1,sizeof(struct NR_CFRA_SSB_Resource)); }
ssbElem[2]->ssb = 2; }
ssbElem[2]->ra_PreambleIndex = 63;
ASN_SEQUENCE_ADD(&secondaryCellGroup->spCellConfig->reconfigurationWithSync->rach_ConfigDedicated->choice.uplink->cfra->resources.choice.ssb->ssb_ResourceList.list,ssbElem[2]);
ssbElem[3] = calloc(1,sizeof(struct NR_CFRA_SSB_Resource));
ssbElem[3]->ssb = 3;
ssbElem[3]->ra_PreambleIndex = 63;
ASN_SEQUENCE_ADD(&secondaryCellGroup->spCellConfig->reconfigurationWithSync->rach_ConfigDedicated->choice.uplink->cfra->resources.choice.ssb->ssb_ResourceList.list,ssbElem[3]);
ssbElem[4] = calloc(1,sizeof(struct NR_CFRA_SSB_Resource));
ssbElem[4]->ssb = 4;
ssbElem[4]->ra_PreambleIndex = 63;
ASN_SEQUENCE_ADD(&secondaryCellGroup->spCellConfig->reconfigurationWithSync->rach_ConfigDedicated->choice.uplink->cfra->resources.choice.ssb->ssb_ResourceList.list,ssbElem[4]);
ssbElem[5] = calloc(1,sizeof(struct NR_CFRA_SSB_Resource));
ssbElem[5]->ssb = 5;
ssbElem[5]->ra_PreambleIndex = 63;
ASN_SEQUENCE_ADD(&secondaryCellGroup->spCellConfig->reconfigurationWithSync->rach_ConfigDedicated->choice.uplink->cfra->resources.choice.ssb->ssb_ResourceList.list,ssbElem[5]);
ssbElem[6] = calloc(1,sizeof(struct NR_CFRA_SSB_Resource));
ssbElem[6]->ssb = 6;
ssbElem[6]->ra_PreambleIndex = 63;
ASN_SEQUENCE_ADD(&secondaryCellGroup->spCellConfig->reconfigurationWithSync->rach_ConfigDedicated->choice.uplink->cfra->resources.choice.ssb->ssb_ResourceList.list,ssbElem[6]);
ssbElem[7] = calloc(1,sizeof(struct NR_CFRA_SSB_Resource));
ssbElem[7]->ssb = 7;
ssbElem[7]->ra_PreambleIndex = 63;
ASN_SEQUENCE_ADD(&secondaryCellGroup->spCellConfig->reconfigurationWithSync->rach_ConfigDedicated->choice.uplink->cfra->resources.choice.ssb->ssb_ResourceList.list,ssbElem[7]);
#endif
secondaryCellGroup->spCellConfig->reconfigurationWithSync->rach_ConfigDedicated->choice.uplink->cfra->ext1 = NULL; secondaryCellGroup->spCellConfig->reconfigurationWithSync->rach_ConfigDedicated->choice.uplink->cfra->ext1 = NULL;
secondaryCellGroup->spCellConfig->rlf_TimersAndConstants = calloc(1,sizeof(*secondaryCellGroup->spCellConfig->rlf_TimersAndConstants)); secondaryCellGroup->spCellConfig->rlf_TimersAndConstants = calloc(1,sizeof(*secondaryCellGroup->spCellConfig->rlf_TimersAndConstants));
secondaryCellGroup->spCellConfig->rlf_TimersAndConstants->present = NR_SetupRelease_RLF_TimersAndConstants_PR_setup; secondaryCellGroup->spCellConfig->rlf_TimersAndConstants->present = NR_SetupRelease_RLF_TimersAndConstants_PR_setup;
...@@ -317,7 +294,7 @@ void fill_default_secondaryCellGroup(NR_ServingCellConfigCommon_t *servingcellco ...@@ -317,7 +294,7 @@ void fill_default_secondaryCellGroup(NR_ServingCellConfigCommon_t *servingcellco
secondaryCellGroup->spCellConfig->spCellConfigDedicated->initialDownlinkBWP->pdsch_Config->choice.setup->tci_StatesToAddModList=calloc(1,sizeof(*secondaryCellGroup->spCellConfig->spCellConfigDedicated->initialDownlinkBWP->pdsch_Config->choice.setup->tci_StatesToAddModList)); secondaryCellGroup->spCellConfig->spCellConfigDedicated->initialDownlinkBWP->pdsch_Config->choice.setup->tci_StatesToAddModList=calloc(1,sizeof(*secondaryCellGroup->spCellConfig->spCellConfigDedicated->initialDownlinkBWP->pdsch_Config->choice.setup->tci_StatesToAddModList));
int n_ssb = 0; n_ssb = 0;
NR_TCI_State_t *tcic[64]; NR_TCI_State_t *tcic[64];
for (int i=0;i<64;i++) { for (int i=0;i<64;i++) {
if ((bitmap>>(63-i))&0x01){ if ((bitmap>>(63-i))&0x01){
......
...@@ -312,14 +312,13 @@ l2fwd_simple_forward(struct rte_mbuf *m, unsigned portid, benetel_t *bs) ...@@ -312,14 +312,13 @@ l2fwd_simple_forward(struct rte_mbuf *m, unsigned portid, benetel_t *bs)
oai_slot = tx_subframe * 2 + tx_slot; oai_slot = tx_subframe * 2 + tx_slot;
lock_dl_buffer(bs->buffers, oai_slot); lock_dl_buffer(bs->buffers, oai_slot);
if (!(bs->buffers->dl_busy[a][oai_slot] & (1 << tx_symbol))) { if (!(bs->buffers->dl_busy[a][oai_slot] & (1 << tx_symbol))) {
printf("%s: warning, DL underflow (antenna %d sl.symbol %d.%d)\n", __FUNCTION__, //printf("%s: warning, DL underflow (antenna %d sl.symbol %d.%d)\n", __FUNCTION__,a, oai_slot, tx_symbol);
a, oai_slot, tx_symbol);
memset(IQ_ptr, 0, 1272 * 4); memset(IQ_ptr, 0, 1272 * 4);
} else { } else {
memcpy(IQ_ptr, bs->buffers->dl[a][oai_slot] + tx_symbol * 1272*4, memcpy(IQ_ptr, bs->buffers->dl[a][oai_slot] + tx_symbol * 1272*4,
1272*4); 1272*4);
} }
//printf("DL buffer f sf slot symbol %d %d %d %d (sf %d)\n", tx_frame, tx_subframe, tx_slot, tx_symbol, (int)sf); //printf("DL buffer f sf slot symbol %d %d %d %d (sf %d)\n", tx_frame, tx_subframe, tx_slot, tx_symbol, (int)sf);
bs->buffers->dl_busy[a][oai_slot] &= ~(1 << tx_symbol); bs->buffers->dl_busy[a][oai_slot] &= ~(1 << tx_symbol);
unlock_dl_buffer(bs->buffers, oai_slot); unlock_dl_buffer(bs->buffers, oai_slot);
} }
......
...@@ -60,27 +60,14 @@ gNBs = ...@@ -60,27 +60,14 @@ gNBs =
initialDLBWPsearchSpaceZero = 0; initialDLBWPsearchSpaceZero = 0;
#pdsch-ConfigCommon #pdsch-ConfigCommon
#pdschTimeDomainAllocationList (up to 16 entries) #pdschTimeDomainAllocationList (up to 16 entries)
initialDLBWPk0_0 = 0; initialDLBWPk0_0 = 0; #for DL slot
#initialULBWPmappingType initialDLBWPmappingType_0 = 0; #0=typeA,1=typeB
#0=typeA,1=typeB initialDLBWPstartSymbolAndLength_0 = 40; #this is SS=1,L=13
initialDLBWPmappingType_0 = 0;
#this is SS=1,L=13 initialDLBWPk0_1 = 0; #for mixed slot
initialDLBWPstartSymbolAndLength_0 = 40; initialDLBWPmappingType_1 = 0;
initialDLBWPstartSymbolAndLength_1 = 57; #this is SS=1,L=5
initialDLBWPk0_1 = 0;
initialDLBWPmappingType_1 = 0;
#this is SS=2,L=12
initialDLBWPstartSymbolAndLength_1 = 53;
initialDLBWPk0_2 = 0;
initialDLBWPmappingType_2 = 0;
#this is SS=1,L=12
initialDLBWPstartSymbolAndLength_2 = 54;
initialDLBWPk0_3 = 0;
initialDLBWPmappingType_3 = 0;
#this is SS=1,L=4 //5 (4 is for 43, 5 is for 57)
initialDLBWPstartSymbolAndLength_3 = 57; //43; //57;
#uplinkConfigCommon #uplinkConfigCommon
#frequencyInfoUL #frequencyInfoUL
ul_frequencyBand = 78; ul_frequencyBand = 78;
...@@ -137,20 +124,18 @@ gNBs = ...@@ -137,20 +124,18 @@ gNBs =
# 0=unrestricted, 1=restricted type A, 2=restricted type B # 0=unrestricted, 1=restricted type A, 2=restricted type B
restrictedSetConfig = 0, restrictedSetConfig = 0,
# pusch-ConfigCommon (up to 16 elements) # pusch-ConfigCommon (up to 16 elements)
initialULBWPk2_0 = 2; initialULBWPk2_0 = 6; # used for UL slot
initialULBWPmappingType_0 = 1 initialULBWPmappingType_0 = 1
# this is SS=0 L=11 initialULBWPstartSymbolAndLength_0 = 55; # this is SS=0 L=12
initialULBWPstartSymbolAndLength_0 = 55;
initialULBWPk2_1 = 6; # used for mixed slot
initialULBWPk2_1 = 2;
initialULBWPmappingType_1 = 1; initialULBWPmappingType_1 = 1;
# this is SS=0 L=12 initialULBWPstartSymbolAndLength_1 = 24; # this is SS=10 L=2
initialULBWPstartSymbolAndLength_1 = 69;
initialULBWPk2_2 = 7; initialULBWPk2_2 = 7; # used for Msg.3 during RA
initialULBWPmappingType_2 = 1; initialULBWPmappingType_2 = 1;
# this is SS=10 L=4 initialULBWPstartSymbolAndLength_2 = 52; # this is SS=10 L=4
initialULBWPstartSymbolAndLength_2 = 52;
msg3_DeltaPreamble = 1; msg3_DeltaPreamble = 1;
#p0_NominalWithGrant =-90; #p0_NominalWithGrant =-90;
......
...@@ -24,6 +24,8 @@ gNBs = ...@@ -24,6 +24,8 @@ gNBs =
ssb_SubcarrierOffset = 0; ssb_SubcarrierOffset = 0;
pdsch_AntennaPorts = 1; pdsch_AntennaPorts = 1;
pusch_AntennaPorts = 1; pusch_AntennaPorts = 1;
pusch_TargetSNRx10 = 200;
pucch_TargetSNRx10 = 200;
servingCellConfigCommon = ( servingCellConfigCommon = (
{ {
...@@ -34,10 +36,10 @@ gNBs = ...@@ -34,10 +36,10 @@ gNBs =
# downlinkConfigCommon # downlinkConfigCommon
#frequencyInfoDL #frequencyInfoDL
# this is pointA + 23 PRBs@120kHz SCS (same as initial BWP) # this is pointA + 23 PRBs@120kHz SCS (same as initial BWP)
absoluteFrequencySSB = 2077907; absoluteFrequencySSB = 2071241;
dl_frequencyBand = 257; dl_frequencyBand = 257;
# this is 27.900 GHz # this is 27.900 GHz
dl_absoluteFrequencyPointA = 2077499; dl_absoluteFrequencyPointA = 2070833;
#scs-SpecificCarrierList #scs-SpecificCarrierList
dl_offstToCarrier = 0; dl_offstToCarrier = 0;
# subcarrierSpacing # subcarrierSpacing
...@@ -111,8 +113,8 @@ gNBs = ...@@ -111,8 +113,8 @@ gNBs =
#1,2,4,8,10,20,40,80 #1,2,4,8,10,20,40,80
ra_ResponseWindow = 7; ra_ResponseWindow = 7;
#ssb_perRACH_OccasionAndCB_PreamblesPerSSB_PR #ssb_perRACH_OccasionAndCB_PreamblesPerSSB_PR
#0=oneeighth,1=onefourth,2=half,3=one,4=two,5=four,6=eight,7=sixteen #1=oneeighth,2=onefourth,3=half,4=one,5=two,6=four,7=eight,8=sixteen
ssb_perRACH_OccasionAndCB_PreamblesPerSSB_PR = 4; ssb_perRACH_OccasionAndCB_PreamblesPerSSB_PR = 3;
#oneHalf (0..15) 4,8,12,16,...60,64 #oneHalf (0..15) 4,8,12,16,...60,64
ssb_perRACH_OccasionAndCB_PreamblesPerSSB = 7; ssb_perRACH_OccasionAndCB_PreamblesPerSSB = 7;
#ra_ContentionResolutionTimer #ra_ContentionResolutionTimer
...@@ -141,7 +143,7 @@ gNBs = ...@@ -141,7 +143,7 @@ gNBs =
# this is SS=0 L=12 # this is SS=0 L=12
initialULBWPstartSymbolAndLength_1 = 69; initialULBWPstartSymbolAndLength_1 = 69;
initialULBWPk2_2 = 14; initialULBWPk2_2 = 4;
initialULBWPmappingType_2 = 1; initialULBWPmappingType_2 = 1;
# this is SS=10 L=4 # this is SS=10 L=4
initialULBWPstartSymbolAndLength_2 = 52; initialULBWPstartSymbolAndLength_2 = 52;
...@@ -158,7 +160,7 @@ gNBs = ...@@ -158,7 +160,7 @@ gNBs =
# ssb_PositionsInBurs_BitmapPR # ssb_PositionsInBurs_BitmapPR
# 1=short, 2=medium, 3=long # 1=short, 2=medium, 3=long
ssb_PositionsInBurst_PR = 3; ssb_PositionsInBurst_PR = 3;
ssb_PositionsInBurst_Bitmap = 0x100000001L; ssb_PositionsInBurst_Bitmap = 0x0001000100010001L;
# ssb_periodicityServingCell # ssb_periodicityServingCell
# 0 = ms5, 1=ms10, 2=ms20, 3=ms40, 4=ms80, 5=ms160, 6=spare2, 7=spare1 # 0 = ms5, 1=ms10, 2=ms20, 3=ms40, 4=ms80, 5=ms160, 6=spare2, 7=spare1
...@@ -217,6 +219,7 @@ gNBs = ...@@ -217,6 +219,7 @@ gNBs =
GNB_INTERFACE_NAME_FOR_S1U = "eth0"; GNB_INTERFACE_NAME_FOR_S1U = "eth0";
GNB_IPV4_ADDRESS_FOR_S1U = "192.168.12.111/24"; GNB_IPV4_ADDRESS_FOR_S1U = "192.168.12.111/24";
GNB_PORT_FOR_S1U = 2152; # Spec 2152 GNB_PORT_FOR_S1U = 2152; # Spec 2152
}; };
} }
); );
...@@ -248,9 +251,9 @@ RUs = ( ...@@ -248,9 +251,9 @@ RUs = (
max_rxgain = 75; max_rxgain = 75;
eNB_instances = [0]; eNB_instances = [0];
sdr_addrs = "addr=192.168.10.2,second_addr=192.168.20.2"; sdr_addrs = "addr=192.168.10.2,second_addr=192.168.20.2";
if_freq = 5300000000L; if_freq = 5124520000L;
#time_source = "external"; clock_src = "external";
clock_source = "external"; time_src = "external";
} }
); );
......
...@@ -113,8 +113,8 @@ gNBs = ...@@ -113,8 +113,8 @@ gNBs =
#1,2,4,8,10,20,40,80 #1,2,4,8,10,20,40,80
ra_ResponseWindow = 7; ra_ResponseWindow = 7;
#ssb_perRACH_OccasionAndCB_PreamblesPerSSB_PR #ssb_perRACH_OccasionAndCB_PreamblesPerSSB_PR
#0=oneeighth,1=onefourth,2=half,3=one,4=two,5=four,6=eight,7=sixteen #1=oneeighth,2=onefourth,3=half,4=one,5=two,6=four,7=eight,8=sixteen
ssb_perRACH_OccasionAndCB_PreamblesPerSSB_PR = 4; ssb_perRACH_OccasionAndCB_PreamblesPerSSB_PR = 3;
#oneHalf (0..15) 4,8,12,16,...60,64 #oneHalf (0..15) 4,8,12,16,...60,64
ssb_perRACH_OccasionAndCB_PreamblesPerSSB = 7; ssb_perRACH_OccasionAndCB_PreamblesPerSSB = 7;
#ra_ContentionResolutionTimer #ra_ContentionResolutionTimer
...@@ -143,7 +143,7 @@ gNBs = ...@@ -143,7 +143,7 @@ gNBs =
# this is SS=0 L=12 # this is SS=0 L=12
initialULBWPstartSymbolAndLength_1 = 69; initialULBWPstartSymbolAndLength_1 = 69;
initialULBWPk2_2 = 14; initialULBWPk2_2 = 4;
initialULBWPmappingType_2 = 1; initialULBWPmappingType_2 = 1;
# this is SS=10 L=4 # this is SS=10 L=4
initialULBWPstartSymbolAndLength_2 = 52; initialULBWPstartSymbolAndLength_2 = 52;
...@@ -250,6 +250,7 @@ L1s = ( ...@@ -250,6 +250,7 @@ L1s = (
{ {
num_cc = 1; num_cc = 1;
tr_n_preference = "local_mac"; tr_n_preference = "local_mac";
pusch_proc_threads = 8;
} }
); );
......
...@@ -159,7 +159,7 @@ gNBs = ...@@ -159,7 +159,7 @@ gNBs =
# ssb_PositionsInBurs_BitmapPR # ssb_PositionsInBurs_BitmapPR
# 1=short, 2=medium, 3=long # 1=short, 2=medium, 3=long
ssb_PositionsInBurst_PR = 2; ssb_PositionsInBurst_PR = 2;
ssb_PositionsInBurst_Bitmap = 1; ssb_PositionsInBurst_Bitmap = 0x1;
# ssb_periodicityServingCell # ssb_periodicityServingCell
# 0 = ms5, 1=ms10, 2=ms20, 3=ms40, 4=ms80, 5=ms160, 6=spare2, 7=spare1 # 0 = ms5, 1=ms10, 2=ms20, 3=ms40, 4=ms80, 5=ms160, 6=spare2, 7=spare1
......
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