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Michael Black
OpenXG UE
Commits
45d53425
Commit
45d53425
authored
Jul 24, 2018
by
Guy De Souza
Browse files
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structures changes/ does not compile
parent
4391f49f
Changes
8
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8 changed files
with
149 additions
and
102 deletions
+149
-102
nfapi/oai_integration/nfapi_vnf.c
nfapi/oai_integration/nfapi_vnf.c
+0
-1
nfapi/open-nFAPI/nfapi/public_inc/nfapi_nr_interface.h
nfapi/open-nFAPI/nfapi/public_inc/nfapi_nr_interface.h
+70
-36
openair1/PHY/NR_TRANSPORT/nr_dci.c
openair1/PHY/NR_TRANSPORT/nr_dci.c
+14
-12
openair1/PHY/NR_TRANSPORT/nr_dci.h
openair1/PHY/NR_TRANSPORT/nr_dci.h
+0
-47
openair1/PHY/defs_gNB.h
openair1/PHY/defs_gNB.h
+19
-1
openair1/PHY/defs_nr_common.h
openair1/PHY/defs_nr_common.h
+26
-3
openair1/SCHED_NR/fapi_nr_l1.c
openair1/SCHED_NR/fapi_nr_l1.c
+19
-0
openair2/LAYER2/NR_MAC_gNB/gNB_scheduler.c
openair2/LAYER2/NR_MAC_gNB/gNB_scheduler.c
+1
-2
No files found.
nfapi/oai_integration/nfapi_vnf.c
View file @
45d53425
...
@@ -1169,7 +1169,6 @@ int oai_nfapi_nr_dl_config_req(nfapi_nr_dl_config_request_t *dl_config_req)
...
@@ -1169,7 +1169,6 @@ int oai_nfapi_nr_dl_config_req(nfapi_nr_dl_config_request_t *dl_config_req)
int
retval
=
nfapi_vnf_p7_dl_config_req
(
p7_config
,
dl_config_req
);
int
retval
=
nfapi_vnf_p7_dl_config_req
(
p7_config
,
dl_config_req
);
dl_config_req
->
dl_config_request_body
.
number_pdcch_ofdm_symbols
=
1
;
dl_config_req
->
dl_config_request_body
.
number_dci
=
0
;
dl_config_req
->
dl_config_request_body
.
number_dci
=
0
;
dl_config_req
->
dl_config_request_body
.
number_pdu
=
0
;
dl_config_req
->
dl_config_request_body
.
number_pdu
=
0
;
dl_config_req
->
dl_config_request_body
.
number_pdsch_rnti
=
0
;
dl_config_req
->
dl_config_request_body
.
number_pdsch_rnti
=
0
;
...
...
nfapi/open-nFAPI/nfapi/public_inc/nfapi_nr_interface.h
View file @
45d53425
...
@@ -6,6 +6,17 @@
...
@@ -6,6 +6,17 @@
#define NFAPI_NR_MAX_NB_CCE_AGGREGATION_LEVELS 5
#define NFAPI_NR_MAX_NB_CCE_AGGREGATION_LEVELS 5
// Extension to the generic structures for single tlv values
typedef
struct
{
nfapi_tl_t
tl
;
int32_t
value
;
}
nfapi_int32_tlv_t
;
typedef
struct
{
nfapi_tl_t
tl
;
uint32_t
value
;
}
nfapi_uint32_tlv_t
;
// nFAPI enums
// nFAPI enums
typedef
enum
{
typedef
enum
{
NFAPI_NR_DL_CONFIG_DCI_DL_PDU_TYPE
=
0
,
NFAPI_NR_DL_CONFIG_DCI_DL_PDU_TYPE
=
0
,
...
@@ -203,7 +214,7 @@ typedef struct {
...
@@ -203,7 +214,7 @@ typedef struct {
typedef
struct
{
typedef
struct
{
nfapi_p4_p5_message_header_t
header
;
nfapi_p4_p5_message_header_t
header
;
uint8_t
num_tlv
;
uint8_t
num_tlv
;
nfapi_nr_subframe_config_t
subframe_config
;
nfapi_nr_subframe_config_t
subframe_config
;
nfapi_nr_rf_config_t
rf_config
;
nfapi_nr_rf_config_t
rf_config
;
nfapi_nr_sch_config_t
sch_config
;
nfapi_nr_sch_config_t
sch_config
;
...
@@ -220,21 +231,18 @@ typedef struct {
...
@@ -220,21 +231,18 @@ typedef struct {
}
nfapi_nr_config_request_t
;
}
nfapi_nr_config_request_t
;
typedef
enum
{
typedef
enum
{
NFAPI_NR_DL_DCI_FORMAT_1_0
=
0
,
NFAPI_NR_DL_DCI_FORMAT_1_0
=
0
,
NFAPI_NR_DL_DCI_FORMAT_1_1
,
NFAPI_NR_DL_DCI_FORMAT_1_1
,
NFAPI_NR_DL_DCI_FORMAT_2_0
,
NFAPI_NR_DL_DCI_FORMAT_2_0
,
NFAPI_NR_DL_DCI_FORMAT_2_1
,
NFAPI_NR_DL_DCI_FORMAT_2_1
,
NFAPI_NR_DL_DCI_FORMAT_2_2
,
NFAPI_NR_DL_DCI_FORMAT_2_2
,
NFAPI_NR_DL_DCI_FORMAT_2_3
NFAPI_NR_DL_DCI_FORMAT_2_3
,
}
nfapi_nr_dl_dci_format_e
;
NFAPI_NR_UL_DCI_FORMAT_0_0
,
NFAPI_NR_UL_DCI_FORMAT_1_0
typedef
enum
{
}
nfapi_nr_dci_format_e
;
NFAPI_NR_UL_DCI_FORMAT_0_0
=
0
,
NFAPI_NR_UL_DCI_FORMAT_1_0
,
}
nfapi_nr_ul_dci_format_e
;
typedef
enum
{
typedef
enum
{
NFAPI_NR_RNTI_new
=
0
,
NFAPI_NR_RNTI_new
=
0
,
NFAPI_NR_RNTI_C
,
NFAPI_NR_RNTI_C
,
NFAPI_NR_RNTI_RA
,
NFAPI_NR_RNTI_RA
,
NFAPI_NR_RNTI_P
,
NFAPI_NR_RNTI_P
,
...
@@ -247,7 +255,17 @@ typedef enum {
...
@@ -247,7 +255,17 @@ typedef enum {
NFAPI_NR_RNTI_TPC_PUSCH
,
NFAPI_NR_RNTI_TPC_PUSCH
,
NFAPI_NR_RNTI_TPC_PUCCH
,
NFAPI_NR_RNTI_TPC_PUCCH
,
NFAPI_NR_RNTI_TPC_SRS
NFAPI_NR_RNTI_TPC_SRS
}
nfapi_nr_rnti_type_e
;
}
nfapi_nr_rnti_type_e
;
typedef
enum
{
NFAPI_NR_USS_FORMAT_0_0_AND_1_0
,
NFAPI_NR_USS_FORMAT_0_1_AND_1_1
,
}
nfapi_nr_uss_dci_formats_e
;
typedef
enum
{
NFAPI_NR_SEARCH_SPACE_TYPE_COMMON
=
0
,
NFAPI_NR_SEARCH_SPACE_TYPE_UE_SPECIFIC
}
nfapi_nr_search_space_type_e
;
// P7 Sub Structures
// P7 Sub Structures
//formats 0_0 and 0_1
//formats 0_0 and 0_1
...
@@ -348,35 +366,52 @@ uint8_t *block_numbers;
...
@@ -348,35 +366,52 @@ uint8_t *block_numbers;
typedef
struct
{
typedef
struct
{
nfapi_uint16_tlv_t
coreset_id
;
///// L1 parameter 'CORESET-ID'
nfapi_uint16_tlv_t
coreset_id
;
nfapi_uint16_tlv_t
frequency_domain_resources
;
///// L1 parameter 'CORESET-freq-dom'
nfapi_uint16_tlv_t
frequency_domain_resources
;
nfapi_uint16_tlv_t
duration
;
///// L1 parameter 'CORESET-time-duration'
nfapi_uint16_tlv_t
duration
;
nfapi_uint16_tlv_t
cce_reg_mapping_
ype
;
///// L1 parameter 'CORESET-CCE-REG-mapping-type'
nfapi_uint16_tlv_t
cce_reg_mapping_
type
;
nfapi_uint16_tlv_t
reg_bundle_size
;
///// L1 parameter 'CORESET-REG-bundle-size'
nfapi_uint16_tlv_t
reg_bundle_size
;
nfapi_uint16_tlv_t
interleaver_size
;
///// L1 parameter 'CORESET-interleaver-size'
nfapi_uint16_tlv_t
interleaver_size
;
nfapi_uint16_tlv_t
shift_index
;
///// L1 parameter 'CORESET-shift-index'
nfapi_uint16_tlv_t
shift_index
;
nfapi_uint16_tlv_t
precoder_granularity
;
///// L1 parameter 'CORESET-precoder-granuality'
nfapi_uint16_tlv_t
precoder_granularity
;
nfapi_uint16_tlv_t
tci_state_id
;
///// L1 parameter 'TCI-StatesPDCCH'
nfapi_uint16_tlv_t
tci_state_id
;
nfapi_uint16_tlv_t
tci_present_in_dci
;
///// L1 parameter 'TCI-PresentInDCI'
nfapi_uint16_tlv_t
tci_present_in_dci
;
nfapi_uint16_tlv_t
pdcch_dmrs_scrambling_id
;
///// L1 parameter 'PDCCH-DMRS-Scrambling-ID'
nfapi_uint16_tlv_t
pdcch_dmrs_scrambling_id
;
}
nfapi_nr_coreset_t
;
}
nfapi_nr_coreset_t
;
typedef
struct
{
typedef
struct
{
nfapi_uint16_tlv_t
search_space_id
;
nfapi_uint8_tlv_t
search_space_id
;
nfapi_uint16_tlv_t
coreset_id
;
nfapi_uint8_tlv_t
coreset_id
;
nfapi_uint16_tlv_t
monitoring_slot_periodicity_and_offset
;
///// L1 parameters 'Montoring-periodicity-PDCCH-slot'
nfapi_uint8_tlv_t
search_space_type
;
nfapi_uint16_tlv_t
monitoring_symbols_within_slot
;
///// L1 parameter 'Montoring-symbols-PDCCH-within-slot'
nfapi_uint8_tlv_t
duration
;
nfapi_uint16_tlv_t
number_of_candidates
[
NFAPI_NR_MAX_NB_CCE_AGGREGATION_LEVELS
];
///// L1 parameter 'Aggregation-level-1/2/4/8/16'
nfapi_uint8_tlv_t
css_formats_0_0_and_1_0
;
nfapi_uint16_tlv_t
Com_dci_Format2_0_nrofCand_SFI_And_aggLevel
;
///// L1 parameters 'SFI-Num-PDCCH-cand' and 'SFI-Aggregation-Level'
nfapi_uint8_tlv_t
css_format_2_0
;
nfapi_uint16_tlv_t
Com_dci_Format2_3_monitoringPeriodicity
;
///// L1 parameter 'SRS-monitoring-periodicity'
nfapi_uint8_tlv_t
css_format_2_1
;
nfapi_uint16_tlv_t
Com_dci_Format2_3_nrofPDCCH_Candidates
;
///// L1 parameter 'SRS-Num-PDCCH-cand'
nfapi_uint8_tlv_t
css_format_2_2
;
nfapi_uint16_tlv_t
ue_Specific_dci_Formats
;
nfapi_uint8_tlv_t
css_format_2_3
;
nfapi_uint8_tlv_t
uss_dci_formats
;
nfapi_uint8_tlv_t
srs_monitoring_periodicity
;
nfapi_uint8_tlv_t
slot_monitoring_periodicity
;
nfapi_uint8_tlv_t
slot_monitoring_offset
;
nfapi_uint16_tlv_t
monitoring_symbols_in_slot
;
nfapi_uint16_tlv_t
number_of_candidates
[
NFAPI_NR_MAX_NB_CCE_AGGREGATION_LEVELS
];
}
nfapi_nr_search_space_t
;
}
nfapi_nr_search_space_t
;
typedef
struct
{
typedef
struct
{
nfapi_tl_t
tl
;
nfapi_tl_t
tl
;
nfapi_nr_coreset_t
coreset
;
uint8_t
n_rb
;
nfapi_nr_search_space_t
search_space
;
uint8_t
n_symb
;
uint8_t
rb_offset
;
uint8_t
cr_mapping_type
;
uint8_t
mux_pattern
;
uint8_t
precoder_granularity
;
uint8_t
config_type
;
uint8_t
first_slot
;
uint8_t
first_symbol
;
uint8_t
nb_ss_sets_per_slot
;
uint8_t
sfn_mod2
;
uint8_t
search_space_type
;
nfapi_bf_vector_t
bf_vector
;
}
nfapi_nr_dl_config_pdcch_parameters_rel15_t
;
}
nfapi_nr_dl_config_pdcch_parameters_rel15_t
;
typedef
struct
{
typedef
struct
{
...
@@ -384,7 +419,7 @@ typedef struct {
...
@@ -384,7 +419,7 @@ typedef struct {
uint16_t
length
;
uint16_t
length
;
uint16_t
pdu_index
;
uint16_t
pdu_index
;
uint16_t
transmission_power
;
uint16_t
transmission_power
;
}
nfapi_nr_dl_config_bch_pdu_rel15_t
;
}
nfapi_nr_dl_config_bch_pdu_rel15_t
;
#define NFAPI_NR_DL_CONFIG_REQUEST_BCH_PDU_REL15_TAG 0x5025
#define NFAPI_NR_DL_CONFIG_REQUEST_BCH_PDU_REL15_TAG 0x5025
...
@@ -437,9 +472,8 @@ typedef struct {
...
@@ -437,9 +472,8 @@ typedef struct {
typedef
struct
{
typedef
struct
{
nfapi_tl_t
tl
;
nfapi_tl_t
tl
;
uint8_t
number_pdcch_ofdm_symbols
;
uint8_t
number_dci
;
uint8_t
number_dci
;
uint
16_t
number_pdu
;
uint
8_t
number_pdu
;
uint8_t
number_pdsch_rnti
;
uint8_t
number_pdsch_rnti
;
nfapi_nr_dl_config_request_pdu_t
*
dl_config_pdu_list
;
nfapi_nr_dl_config_request_pdu_t
*
dl_config_pdu_list
;
}
nfapi_nr_dl_config_request_body_t
;
}
nfapi_nr_dl_config_request_body_t
;
...
...
openair1/PHY/NR_TRANSPORT/nr_dci.c
View file @
45d53425
...
@@ -169,7 +169,18 @@ uint8_t nr_generate_dci_top(NR_gNB_DCI_ALLOC_t dci_alloc,
...
@@ -169,7 +169,18 @@ uint8_t nr_generate_dci_top(NR_gNB_DCI_ALLOC_t dci_alloc,
int
k
,
l
,
k_prime
,
dci_idx
,
dmrs_idx
;
int
k
,
l
,
k_prime
,
dci_idx
,
dmrs_idx
;
nr_cce_t
cce
;
nr_cce_t
cce
;
uint8_t
n_rb
=
pdcch_vars
.
coreset_params
.
n_rb
;
uint8_t
rb_offset
=
pdcch_vars
.
coreset_params
.
n_symb
;
uint8_t
n_symb
=
pdcch_vars
.
coreset_params
.
rb_offset
;
uint8_t
first_slot
=
pdcch_vars
.
first_slot
;
uint8_t
first_symb
=
pdcch_vars
.
ss_params
.
first_symbol_idx
;
/// DMRS QPSK modulation
/// DMRS QPSK modulation
/*There is a need to shift from which index the pregenerated DMRS sequence is used
* see 38211 r15.2.0 section 7.4.1.3.2: assumption is the reference point for k refers to the DMRS sequence*/
if
(
pdcch_vars
.
coreset_params
.
config_type
==
nr_cset_config_pdcch_config
)
gold_pdcch_dmrs
+=
((
int
)
floor
(
frame_parms
.
ssb_start_subcarrier
/
NR_NB_SC_PER_RB
)
+
rb_offset
)
*
3
/
32
;
for
(
int
i
=
0
;
i
<
NR_MAX_PDCCH_DMRS_LENGTH
>>
1
;
i
++
)
{
for
(
int
i
=
0
;
i
<
NR_MAX_PDCCH_DMRS_LENGTH
>>
1
;
i
++
)
{
idx
=
((((
gold_pdcch_dmrs
[(
i
<<
1
)
>>
5
])
>>
((
i
<<
1
)
&
0x1f
))
&
1
)
<<
1
)
^
(((
gold_pdcch_dmrs
[((
i
<<
1
)
+
1
)
>>
5
])
>>
(((
i
<<
1
)
+
1
)
&
0x1f
))
&
1
);
idx
=
((((
gold_pdcch_dmrs
[(
i
<<
1
)
>>
5
])
>>
((
i
<<
1
)
&
0x1f
))
&
1
)
<<
1
)
^
(((
gold_pdcch_dmrs
[((
i
<<
1
)
+
1
)
>>
5
])
>>
(((
i
<<
1
)
+
1
)
&
0x1f
))
&
1
);
mod_dmrs
[
i
<<
1
]
=
nr_mod_table
[(
NR_MOD_TABLE_QPSK_OFFSET
+
idx
)
<<
1
];
mod_dmrs
[
i
<<
1
]
=
nr_mod_table
[(
NR_MOD_TABLE_QPSK_OFFSET
+
idx
)
<<
1
];
...
@@ -197,17 +208,14 @@ uint8_t nr_generate_dci_top(NR_gNB_DCI_ALLOC_t dci_alloc,
...
@@ -197,17 +208,14 @@ uint8_t nr_generate_dci_top(NR_gNB_DCI_ALLOC_t dci_alloc,
/// Resource mapping
/// Resource mapping
a
=
(
config
.
rf_config
.
tx_antenna_ports
.
value
==
1
)
?
amp
:
(
amp
*
ONE_OVER_SQRT2_Q15
)
>>
15
;
a
=
(
config
.
rf_config
.
tx_antenna_ports
.
value
==
1
)
?
amp
:
(
amp
*
ONE_OVER_SQRT2_Q15
)
>>
15
;
uint8_t
n_rb
=
pdcch_vars
.
coreset_params
.
n_rb
;
uint8_t
rb_offset
=
pdcch_vars
.
coreset_params
.
n_symb
;
uint8_t
n_symb
=
pdcch_vars
.
coreset_params
.
rb_offset
;
uint8_t
first_slot
=
pdcch_vars
.
first_slot
;
uint8_t
first_symb
=
pdcch_vars
.
ss_params
.
first_symbol_idx
;
/*The coreset is initialised
/*The coreset is initialised
* in frequency: the first subcarrier is obtained by adding the first CRB overlapping the SSB and the rb_offset
* in frequency: the first subcarrier is obtained by adding the first CRB overlapping the SSB and the rb_offset
* in time: by its first slot and its first symbol*/
* in time: by its first slot and its first symbol*/
uint8_t
cset_start_sc
=
frame_parms
.
first_carrier_offset
+
((
int
)
floor
(
frame_parms
.
ssb_start_subcarrier
/
NR_NB_SC_PER_RB
)
+
rb_offset
)
*
NR_NB_SC_PER_RB
;
uint8_t
cset_start_sc
=
frame_parms
.
first_carrier_offset
+
((
int
)
floor
(
frame_parms
.
ssb_start_subcarrier
/
NR_NB_SC_PER_RB
)
+
rb_offset
)
*
NR_NB_SC_PER_RB
;
uint8_t
cset_start_symb
=
first_slot
*
frame_parms
.
symbols_per_slot
+
first_symb
;
uint8_t
cset_start_symb
=
first_slot
*
frame_parms
.
symbols_per_slot
+
first_symb
;
dci_idx
=
0
;
dmrs_idx
=
0
;
for
(
int
aa
=
0
;
aa
<
config
.
rf_config
.
tx_antenna_ports
.
value
;
aa
++
)
for
(
int
aa
=
0
;
aa
<
config
.
rf_config
.
tx_antenna_ports
.
value
;
aa
++
)
{
{
...
@@ -216,16 +224,10 @@ uint8_t nr_generate_dci_top(NR_gNB_DCI_ALLOC_t dci_alloc,
...
@@ -216,16 +224,10 @@ uint8_t nr_generate_dci_top(NR_gNB_DCI_ALLOC_t dci_alloc,
if
(
pdcch_vars
.
coreset_params
.
precoder_granularity
==
nr_cset_same_as_reg_bundle
)
{
if
(
pdcch_vars
.
coreset_params
.
precoder_granularity
==
nr_cset_same_as_reg_bundle
)
{
dci_idx
=
0
;
dmrs_idx
=
0
;
for
(
int
cce_idx
=
0
;
cce_idx
<
dci_alloc
.
L
;
cce_idx
++
){
for
(
int
cce_idx
=
0
;
cce_idx
<
dci_alloc
.
L
;
cce_idx
++
){
cce
=
pdcch_vars
.
cce_list
[
cce_idx
];
cce
=
pdcch_vars
.
cce_list
[
cce_idx
];
for
(
int
reg_idx
=
0
;
reg_idx
<
NR_NB_REG_PER_CCE
;
reg_idx
++
)
{
for
(
int
reg_idx
=
0
;
reg_idx
<
NR_NB_REG_PER_CCE
;
reg_idx
++
)
{
if
(
pdcch_vars
.
coreset_params
.
config_type
==
nr_cset_config_mib_sib1
)
k
=
cset_start_sc
+
cce
.
reg_list
[
reg_idx
].
start_sc_idx
;
k
=
cset_start_sc
+
cce
.
reg_list
[
reg_idx
].
start_sc_idx
;
else
k
=
frame_parms
.
first_carrier_offset
;
// Not clear, to review
l
=
cset_start_symb
+
cce
.
reg_list
[
reg_idx
].
symb_idx
;
l
=
cset_start_symb
+
cce
.
reg_list
[
reg_idx
].
symb_idx
;
k_prime
=
0
;
k_prime
=
0
;
for
(
int
m
=
0
;
m
<
NR_NB_SC_PER_RB
;
m
++
)
{
for
(
int
m
=
0
;
m
<
NR_NB_SC_PER_RB
;
m
++
)
{
...
...
openair1/PHY/NR_TRANSPORT/nr_dci.h
View file @
45d53425
...
@@ -45,43 +45,11 @@ typedef enum {
...
@@ -45,43 +45,11 @@ typedef enum {
nr_rnti_type_P_RNTI
nr_rnti_type_P_RNTI
}
nr_rnti_type_e
;
}
nr_rnti_type_e
;
// PDCCH search space types css: common, uss: ue specific
typedef
enum
{
nr_pdcch_css_type_0
=
0
,
nr_pdcch_css_type_0_A
,
nr_pdcch_css_type_1
,
nr_pdcch_css_type_2
,
nr_pdcch_css_type_3
,
nr_pdcch_uss_type
}
nr_pdcch_ss_type_e
;
typedef
enum
{
nr_ssb_and_cset_mux_pattern_type_1
=
0
,
nr_ssb_and_cset_mux_pattern_type_2
,
nr_ssb_and_cset_mux_pattern_type_3
}
nr_ssb_and_cset_mux_pattern_type_e
;
typedef
enum
{
nr_cce_reg_mapping_interleaved
=
0
,
nr_cce_reg_mapping_non_interleaved
}
nr_cce_reg_mapping_type_e
;
typedef
enum
{
nr_cset_config_mib_sib1
=
0
,
nr_cset_config_pdcch_config
}
nr_coreset_config_type_e
;
typedef
enum
{
nr_cset_same_as_reg_bundle
=
0
,
nr_cset_all_contiguous_rbs
}
nr_coreset_precoder_granularity_type_e
;
typedef
struct
{
typedef
struct
{
uint8_t
param_O
;
uint8_t
param_O
;
uint8_t
param_M
;
uint8_t
param_M
;
uint8_t
nb_ss_sets_per_slot
;
uint8_t
nb_ss_sets_per_slot
;
uint8_t
first_symbol_idx
;
uint8_t
first_symbol_idx
;
nr_pdcch_ss_type_e
ss_type
;
}
nr_pdcch_ss_params_t
;
}
nr_pdcch_ss_params_t
;
typedef
struct
{
typedef
struct
{
...
@@ -115,21 +83,6 @@ typedef struct {
...
@@ -115,21 +83,6 @@ typedef struct {
nr_pdcch_coreset_params_t
coreset_params
;
nr_pdcch_coreset_params_t
coreset_params
;
}
nr_pdcch_vars_t
;
}
nr_pdcch_vars_t
;
typedef
struct
{
/// Length of DCI in bits
uint8_t
size
;
/// Aggregation level
uint8_t
L
;
/// rnti type
nr_rnti_type_e
rnti
;
/// Format
nr_dci_format_e
format
;
/// type
nr_pdcch_ss_type_e
ss_type
;
/// DCI pdu
uint32_t
dci_pdu
[
4
];
}
NR_gNB_DCI_ALLOC_t
;
typedef
unsigned
__int128
uint128_t
;
typedef
unsigned
__int128
uint128_t
;
uint8_t
nr_get_dci_size
(
nr_dci_format_e
format
,
uint8_t
nr_get_dci_size
(
nr_dci_format_e
format
,
...
...
openair1/PHY/defs_gNB.h
View file @
45d53425
...
@@ -45,6 +45,24 @@ typedef struct {
...
@@ -45,6 +45,24 @@ typedef struct {
uint8_t
pbch_e
[
NR_POLAR_PBCH_E
];
uint8_t
pbch_e
[
NR_POLAR_PBCH_E
];
}
NR_gNB_PBCH
;
}
NR_gNB_PBCH
;
typedef
struct
{
/// Length of DCI in bits
uint8_t
size
;
/// Aggregation level
uint8_t
L
;
/// rnti type
nfapi_nr_rnti_type_e
rnti
;
/// Format
nfapi_nr_dci_format_e
format
;
/// DCI pdu
uint32_t
dci_pdu
[
4
];
}
NR_gNB_DCI_ALLOC_t
;
typedef
struct
{
uint8_t
num_dci
;
NR_gNB_DCI_ALLOC_t
dci_alloc
[
32
];
}
NR_gNB_PDCCH
;
typedef
struct
{
typedef
struct
{
/// \brief Pointers (dynamic) to the received data in the time domain.
/// \brief Pointers (dynamic) to the received data in the time domain.
/// - first index: rx antenna [0..nb_antennas_rx[
/// - first index: rx antenna [0..nb_antennas_rx[
...
@@ -265,7 +283,7 @@ typedef struct PHY_VARS_gNB_s {
...
@@ -265,7 +283,7 @@ typedef struct PHY_VARS_gNB_s {
nfapi_preamble_pdu_t
preamble_list
[
MAX_NUM_RX_PRACH_PREAMBLES
];
nfapi_preamble_pdu_t
preamble_list
[
MAX_NUM_RX_PRACH_PREAMBLES
];
Sched_Rsp_t
Sched_INFO
;
Sched_Rsp_t
Sched_INFO
;
LTE_e
NB_PDCCH
pdcch_vars
[
2
];
NR_g
NB_PDCCH
pdcch_vars
[
2
];
LTE_eNB_PHICH
phich_vars
[
2
];
LTE_eNB_PHICH
phich_vars
[
2
];
NR_gNB_COMMON
common_vars
;
NR_gNB_COMMON
common_vars
;
...
...
openair1/PHY/defs_nr_common.h
View file @
45d53425
...
@@ -42,6 +42,8 @@
...
@@ -42,6 +42,8 @@
#define MAX_NUM_SUBCARRIER_SPACING 5
#define MAX_NUM_SUBCARRIER_SPACING 5
#define NR_MAX_NB_RB 275
#define NR_NB_SC_PER_RB 12
#define NR_NB_SC_PER_RB 12
#define NR_NB_REG_PER_CCE 6
#define NR_NB_REG_PER_CCE 6
...
@@ -58,10 +60,10 @@
...
@@ -58,10 +60,10 @@
#define NR_SSS_LENGTH 127
#define NR_SSS_LENGTH 127
#define NR_PBCH_DMRS_LENGTH 144 // in mod symbols
#define NR_PBCH_DMRS_LENGTH 144 // in mod symbols
#define NR_PBCH_DMRS_LENGTH_DWORD 10 //
roundup
(2(QPSK)*NR_PBCH_DMRS_LENGTH/32)
#define NR_PBCH_DMRS_LENGTH_DWORD 10 //
ceil
(2(QPSK)*NR_PBCH_DMRS_LENGTH/32)
#define NR_MAX_PDCCH_DMRS_LENGTH
100
#define NR_MAX_PDCCH_DMRS_LENGTH
((NR_MAX_NB_RB<<1)*3) // 3 symbols *2(QPSK)
#define NR_MAX_PDCCH_DMRS_LENGTH_DWORD 5
#define NR_MAX_PDCCH_DMRS_LENGTH_DWORD 5
2 // ceil(NR_MAX_PDCCH_DMRS_LENGTH/32)
#define NR_MAX_DCI_PAYLOAD_SIZE 64
#define NR_MAX_DCI_PAYLOAD_SIZE 64
#define NR_MAX_DCI_SIZE 200 //random values
#define NR_MAX_DCI_SIZE 200 //random values
...
@@ -110,6 +112,27 @@ typedef struct NR_BWP_PARMS {
...
@@ -110,6 +112,27 @@ typedef struct NR_BWP_PARMS {
uint16_t
ofdm_symbol_size
;
uint16_t
ofdm_symbol_size
;
}
NR_BWP_PARMS
;
}
NR_BWP_PARMS
;
typedef
enum
{
nr_ssb_and_cset_mux_pattern_type_1
=
0
,
nr_ssb_and_cset_mux_pattern_type_2
,
nr_ssb_and_cset_mux_pattern_type_3
}
nr_ssb_and_cset_mux_pattern_type_e
;
typedef
enum
{
nr_cce_reg_mapping_interleaved
=
0
,
nr_cce_reg_mapping_non_interleaved
}
nr_cce_reg_mapping_type_e
;
typedef
enum
{
nr_cset_config_mib_sib1
=
0
,
nr_cset_config_pdcch_config
}
nr_coreset_config_type_e
;
typedef
enum
{
nr_cset_same_as_reg_bundle
=
0
,
nr_cset_all_contiguous_rbs
}
nr_coreset_precoder_granularity_type_e
;
typedef
struct
NR_DL_FRAME_PARMS
{
typedef
struct
NR_DL_FRAME_PARMS
{
/// frequency range
/// frequency range
nr_frequency_range_e
freq_range
;
nr_frequency_range_e
freq_range
;
...
...
openair1/SCHED_NR/fapi_nr_l1.c
View file @
45d53425
...
@@ -53,6 +53,25 @@ void handle_nr_nfapi_bch_pdu(PHY_VARS_gNB *gNB,
...
@@ -53,6 +53,25 @@ void handle_nr_nfapi_bch_pdu(PHY_VARS_gNB *gNB,
// adjust transmit amplitude here based on NFAPI info
// adjust transmit amplitude here based on NFAPI info
}
}
void
handle_nfapi_nr_dci_dl_pdu
(
PHY_VARS_gNB
*
gNB
,
int
frame
,
int
subframe
,
gNB_rxtx_proc_t
*
proc
,
nfapi_nr_dl_config_request_pdu_t
*
dl_config_pdu
)
{
int
idx
=
subframe
&
1
;
NR_gNB_PDCCH
*
pdcch_vars
=
&
gNB
->
pdcch_vars
[
idx
];
nfapi_nr_dl_config_dci_dl_pdu
*
pdu
=
&
dl_config_pdu
->
dci_dl_pdu
;
LOG_D
(
PHY
,
"Frame %d, Subframe %d: DCI processing - populating pdcch_vars->dci_alloc[%d] proc:subframe_tx:%d idx:%d pdcch_vars->num_dci:%d
\n
"
,
frame
,
subframe
,
pdcch_vars
->
num_dci
,
proc
->
subframe_tx
,
idx
,
pdcch_vars
->
num_dci
);
// copy dci configuration into gNB structure
nr_fill_dci_and_dlsch
(
eNB
,
frame
,
subframe
,
proc
,
&
pdcch_vars
->
dci_alloc
[
pdcch_vars
->
num_dci
],
pdu
);
LOG_D
(
PHY
,
"Frame %d, Subframe %d: DCI processing - populated pdcch_vars->dci_alloc[%d] proc:subframe_tx:%d idx:%d pdcch_vars->num_dci:%d
\n
"
,
proc
->
frame_tx
,
proc
->
subframe_tx
,
pdcch_vars
->
num_dci
,
proc
->
subframe_tx
,
idx
,
pdcch_vars
->
num_dci
);
}
void
nr_schedule_response
(
NR_Sched_Rsp_t
*
Sched_INFO
){
void
nr_schedule_response
(
NR_Sched_Rsp_t
*
Sched_INFO
){
PHY_VARS_gNB
*
gNB
;
PHY_VARS_gNB
*
gNB
;
gNB_rxtx_proc_t
*
proc
;
gNB_rxtx_proc_t
*
proc
;
...
...
openair2/LAYER2/NR_MAC_gNB/gNB_scheduler.c
View file @
45d53425
...
@@ -81,7 +81,6 @@ void clear_nr_nfapi_information(gNB_MAC_INST * gNB,
...
@@ -81,7 +81,6 @@ void clear_nr_nfapi_information(gNB_MAC_INST * gNB,
if
(
nfapi_mode
==
0
||
nfapi_mode
==
1
)
{
// monolithic or PNF
if
(
nfapi_mode
==
0
||
nfapi_mode
==
1
)
{
// monolithic or PNF
DL_req
[
CC_idP
].
dl_config_request_body
.
number_pdcch_ofdm_symbols
=
1
;
DL_req
[
CC_idP
].
dl_config_request_body
.
number_dci
=
0
;
DL_req
[
CC_idP
].
dl_config_request_body
.
number_dci
=
0
;
DL_req
[
CC_idP
].
dl_config_request_body
.
number_pdu
=
0
;
DL_req
[
CC_idP
].
dl_config_request_body
.
number_pdu
=
0
;
DL_req
[
CC_idP
].
dl_config_request_body
.
number_pdsch_rnti
=
0
;
DL_req
[
CC_idP
].
dl_config_request_body
.
number_pdsch_rnti
=
0
;
...
@@ -456,4 +455,4 @@ void gNB_dlsch_ulsch_scheduler(module_id_t module_idP,
...
@@ -456,4 +455,4 @@ void gNB_dlsch_ulsch_scheduler(module_id_t module_idP,
*/
*/
VCD_SIGNAL_DUMPER_DUMP_FUNCTION_BY_NAME
(
VCD_SIGNAL_DUMPER_FUNCTIONS_ENB_DLSCH_ULSCH_SCHEDULER
,
VCD_FUNCTION_OUT
);
VCD_SIGNAL_DUMPER_DUMP_FUNCTION_BY_NAME
(
VCD_SIGNAL_DUMPER_FUNCTIONS_ENB_DLSCH_ULSCH_SCHEDULER
,
VCD_FUNCTION_OUT
);
}
}
\ No newline at end of file
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