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Michael Black
OpenXG UE
Commits
82d32195
Commit
82d32195
authored
Jun 20, 2014
by
Raymond Knopp
Browse files
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Plain Diff
git-svn-id:
http://svn.eurecom.fr/openair4G/trunk@5415
818b1a75-f10b-46b9-bf7c-635c3b92a50f
parent
d4982322
Changes
4
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Showing
4 changed files
with
23 additions
and
15 deletions
+23
-15
openair1/PHY/defs.h
openair1/PHY/defs.h
+10
-1
openair1/SCHED/defs.h
openair1/SCHED/defs.h
+2
-0
openair1/SCHED/phy_procedures_lte_eNb.c
openair1/SCHED/phy_procedures_lte_eNb.c
+10
-13
openair1/SIMULATION/LTE_PHY/Makefile
openair1/SIMULATION/LTE_PHY/Makefile
+1
-1
No files found.
openair1/PHY/defs.h
View file @
82d32195
...
...
@@ -151,7 +151,7 @@
//#include "PHY/LTE_ESTIMATION/defs.h"
#include "PHY/LTE_TRANSPORT/defs.h"
#include <pthread.h>
#define NUM_DCI_MAX 32
...
...
@@ -178,10 +178,19 @@ enum transmission_access_mode{
}
ral_threshold_phy_t
;
#endif
typedef
struct
{
uint8_t
instance_cnt
;
pthread_t
pthread
;
pthread_cond_t
cond
;
pthread_mutex_t
mutex
;
uint8_t
subframe
;
}
eNB_proc_t
;
/// Top-level PHY Data Structure for eNB
typedef
struct
PHY_VARS_eNB_s
{
/// Module ID indicator for this instance
module_id_t
Mod_id
;
eNB_proc_t
proc
[
10
];
uint8_t
local_flag
;
uint32_t
rx_total_gain_eNB_dB
;
frame_t
frame
;
...
...
openair1/SCHED/defs.h
View file @
82d32195
...
...
@@ -9,6 +9,7 @@
#include "PHY/defs.h"
enum
THREAD_INDEX
{
OPENAIR_THREAD_INDEX
=
0
,
TOP_LEVEL_SCHEDULER_THREAD_INDEX
,
DLC_SCHED_THREAD_INDEX
,
...
...
@@ -57,6 +58,7 @@ enum openair_SYNCH_STATUS {
#define DAQ_AGC_OFF 0
typedef
struct
{
boolean_t
is_eNB
;
uint8_t
mode
;
...
...
openair1/SCHED/phy_procedures_lte_eNb.c
View file @
82d32195
...
...
@@ -1010,6 +1010,8 @@ void phy_eNB_lte_check_measurement_thresholds(instance_t instanceP, ral_threshol
# endif
#endif
void
phy_procedures_eNB_TX
(
unsigned
char
next_slot
,
PHY_VARS_eNB
*
phy_vars_eNB
,
uint8_t
abstraction_flag
,
relaying_type_t
r_type
,
PHY_VARS_RN
*
phy_vars_rn
)
{
uint8_t
*
pbch_pdu
=&
phy_vars_eNB
->
pbch_pdu
[
0
];
...
...
@@ -1062,14 +1064,8 @@ void phy_procedures_eNB_TX(unsigned char next_slot,PHY_VARS_eNB *phy_vars_eNB,ui
if
(
next_slot
%
2
==
0
)
{
for
(
aa
=
0
;
aa
<
phy_vars_eNB
->
lte_frame_parms
.
nb_antennas_tx_eNB
;
aa
++
)
{
#ifdef IFFT_FPGA
memset
(
&
phy_vars_eNB
->
lte_eNB_common_vars
.
txdataF
[
sect_id
][
aa
][
next_slot
*
(
phy_vars_eNB
->
lte_frame_parms
.
N_RB_DL
*
12
)
*
(
phy_vars_eNB
->
lte_frame_parms
.
symbols_per_tti
>>
1
)],
0
,(
phy_vars_eNB
->
lte_frame_parms
.
N_RB_DL
*
12
)
*
(
phy_vars_eNB
->
lte_frame_parms
.
symbols_per_tti
)
*
sizeof
(
mod_sym_t
));
#else
memset
(
&
phy_vars_eNB
->
lte_eNB_common_vars
.
txdataF
[
sect_id
][
aa
][
next_slot
*
phy_vars_eNB
->
lte_frame_parms
.
ofdm_symbol_size
*
(
phy_vars_eNB
->
lte_frame_parms
.
symbols_per_tti
>>
1
)],
0
,
phy_vars_eNB
->
lte_frame_parms
.
ofdm_symbol_size
*
(
phy_vars_eNB
->
lte_frame_parms
.
symbols_per_tti
)
*
sizeof
(
mod_sym_t
));
#endif
}
}
}
...
...
@@ -1149,9 +1145,10 @@ void phy_procedures_eNB_TX(unsigned char next_slot,PHY_VARS_eNB *phy_vars_eNB,ui
}
else
{
vcd_signal_dumper_dump_function_by_name
(
VCD_SIGNAL_DUMPER_FUNCTIONS_PHY_ENB_RS_TX
,
1
);
if
(
abstraction_flag
==
0
){
vcd_signal_dumper_dump_function_by_name
(
VCD_SIGNAL_DUMPER_FUNCTIONS_PHY_ENB_RS_TX
,
1
);
generate_pilots_slot
(
phy_vars_eNB
,
phy_vars_eNB
->
lte_eNB_common_vars
.
txdataF
[
sect_id
],
AMP
,
...
...
@@ -3820,22 +3817,22 @@ void phy_procedures_eNB_lte(unsigned char last_slot, unsigned char next_slot,PHY
#endif
if
((((
phy_vars_eNB
->
lte_frame_parms
.
frame_type
==
TDD
)
&&
(
subframe_select
(
&
phy_vars_eNB
->
lte_frame_parms
,
next_slot
>>
1
)
==
SF_DL
))
||
(
phy_vars_eNB
->
lte_frame_parms
.
frame_type
==
FDD
))
&&
((
next_slot
&
1
)
==
0
))
{
(
phy_vars_eNB
->
lte_frame_parms
.
frame_type
==
FDD
))
&&
((
next_slot
&
1
)
==
1
))
{
#ifdef Rel10
if
(
phy_procedures_RN_eNB_TX
(
last_slot
,
next_slot
,
r_type
)
!=
0
)
if
(
phy_procedures_RN_eNB_TX
(
last_slot
,
(
next_slot
+
1
)
%
20
,
r_type
)
!=
0
)
#endif
phy_procedures_eNB_TX
(
next_slot
,
phy_vars_eNB
,
abstraction_flag
,
r_type
,
phy_vars_rn
);
phy_procedures_eNB_TX
(
(
next_slot
+
1
)
%
20
,
phy_vars_eNB
,
abstraction_flag
,
r_type
,
phy_vars_rn
);
}
if
((((
phy_vars_eNB
->
lte_frame_parms
.
frame_type
==
TDD
)
&&
(
subframe_select
(
&
phy_vars_eNB
->
lte_frame_parms
,
last_slot
>>
1
)
==
SF_UL
))
||
(
phy_vars_eNB
->
lte_frame_parms
.
frame_type
==
FDD
))
&&
((
last_slot
&
1
)
==
1
)){
phy_procedures_eNB_RX
(
last_slot
,
phy_vars_eNB
,
abstraction_flag
,
r_type
);
}
if
((
subframe_select
(
&
phy_vars_eNB
->
lte_frame_parms
,
next_slot
>>
1
)
==
SF_S
)
&&
((
next_slot
&
1
)
==
0
))
{
((
next_slot
&
1
)
==
1
))
{
#ifdef Rel10
if
(
phy_procedures_RN_eNB_TX
(
last_slot
,
next_slot
,
r_type
)
!=
0
)
if
(
phy_procedures_RN_eNB_TX
(
last_slot
,
(
next_slot
+
1
)
%
20
,
r_type
)
!=
0
)
#endif
phy_procedures_eNB_TX
(
next_slot
,
phy_vars_eNB
,
abstraction_flag
,
r_type
,
phy_vars_rn
);
phy_procedures_eNB_TX
(
(
next_slot
+
1
)
%
20
,
phy_vars_eNB
,
abstraction_flag
,
r_type
,
phy_vars_rn
);
}
if
((
subframe_select
(
&
phy_vars_eNB
->
lte_frame_parms
,
last_slot
>>
1
)
==
SF_S
)
&&
((
last_slot
&
1
)
==
0
)){
...
...
openair1/SIMULATION/LTE_PHY/Makefile
View file @
82d32195
...
...
@@ -10,7 +10,7 @@ OPENAIR1_TOP = $(OPENAIR1_DIR)
OPENAIR2_TOP
=
$(OPENAIR2_DIR)
OPENAIR3
=
$(OPENAIR3_DIR)
CFLAGS
=
-g
-O
2
-Wno-strict-aliasing
-rdynamic
-Wall
-DPHYSIM
-DNODE_RG
-DUSER_MODE
-DNB_ANTENNAS_RX
=
2
-DNB_ANTENNAS_TXRX
=
2
-DNB_ANTENNAS_TX
=
2
-DPHY_CONTEXT
=
1
$(CPUFLAGS)
-DMALLOC_CHECK_
=
1
-DENABLE_VCD_FIFO
# -Wno-packed-bitfield-compat
CFLAGS
=
-g
-O
3
-Wno-strict-aliasing
-rdynamic
-Wall
-DPHYSIM
-DNODE_RG
-DUSER_MODE
-DNB_ANTENNAS_RX
=
2
-DNB_ANTENNAS_TXRX
=
2
-DNB_ANTENNAS_TX
=
2
-DPHY_CONTEXT
=
1
$(CPUFLAGS)
-DMALLOC_CHECK_
=
1
-DENABLE_VCD_FIFO
# -Wno-packed-bitfield-compat
# DCI Debug
...
...
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