Commit 5ca900fd authored by francescomani's avatar francescomani

handle TDD pattern2 at UE

parent 0e641650
...@@ -504,36 +504,25 @@ static void RU_write(nr_rxtx_thread_data_t *rxtxD) { ...@@ -504,36 +504,25 @@ static void RU_write(nr_rxtx_thread_data_t *rxtxD) {
UE_nr_rxtx_proc_t *proc = &rxtxD->proc; UE_nr_rxtx_proc_t *proc = &rxtxD->proc;
void *txp[NB_ANTENNAS_TX]; void *txp[NB_ANTENNAS_TX];
int slot = proc->nr_slot_tx;
for (int i=0; i<UE->frame_parms.nb_antennas_tx; i++) for (int i=0; i<UE->frame_parms.nb_antennas_tx; i++)
txp[i] = (void *)&UE->common_vars.txdata[i][UE->frame_parms.get_samples_slot_timestamp( txp[i] = (void *)&UE->common_vars.txdata[i][UE->frame_parms.get_samples_slot_timestamp(
proc->nr_slot_tx, &UE->frame_parms, 0)]; slot, &UE->frame_parms, 0)];
radio_tx_burst_flag_t flags = TX_BURST_INVALID; radio_tx_burst_flag_t flags = TX_BURST_INVALID;
NR_UE_MAC_INST_t *mac = get_mac_inst(0);
if (openair0_cfg[0].duplex_mode == duplex_mode_TDD && !get_softmodem_params()->continuous_tx) { if (openair0_cfg[0].duplex_mode == duplex_mode_TDD && !get_softmodem_params()->continuous_tx) {
uint8_t tdd_period = mac->phy_config.config_req.tdd_table.tdd_period_in_slots; int slots_frame = UE->frame_parms.slots_per_frame;
int nrofUplinkSlots, nrofUplinkSymbols; int curr_slot = nr_ue_slot_select(&UE->nrUE_config, slot);
if (mac->scc) { int next_slot = nr_ue_slot_select(&UE->nrUE_config, (slot + 1) % slots_frame);
nrofUplinkSlots = mac->scc->tdd_UL_DL_ConfigurationCommon->pattern1.nrofUplinkSlots; int prev_slot = nr_ue_slot_select(&UE->nrUE_config, (slot + slots_frame - 1) % slots_frame);
nrofUplinkSymbols = mac->scc->tdd_UL_DL_ConfigurationCommon->pattern1.nrofUplinkSymbols;
}
else {
nrofUplinkSlots = mac->scc_SIB->tdd_UL_DL_ConfigurationCommon->pattern1.nrofUplinkSlots;
nrofUplinkSymbols = mac->scc_SIB->tdd_UL_DL_ConfigurationCommon->pattern1.nrofUplinkSymbols;
}
int slot_tx_usrp = proc->nr_slot_tx;
uint8_t num_UL_slots = nrofUplinkSlots + (nrofUplinkSymbols != 0);
uint8_t first_tx_slot = tdd_period - num_UL_slots;
if (slot_tx_usrp % tdd_period == first_tx_slot) if (curr_slot != NR_DOWNLINK_SLOT && prev_slot == NR_DOWNLINK_SLOT)
flags = TX_BURST_START; flags = TX_BURST_START;
else if (slot_tx_usrp % tdd_period == first_tx_slot + num_UL_slots - 1) else if (curr_slot != NR_DOWNLINK_SLOT && next_slot == NR_DOWNLINK_SLOT)
flags = TX_BURST_END; flags = TX_BURST_END;
else if (slot_tx_usrp % tdd_period > first_tx_slot) else
flags = TX_BURST_MIDDLE; flags = TX_BURST_MIDDLE;
} else { } else {
flags = TX_BURST_MIDDLE; flags = TX_BURST_MIDDLE;
...@@ -873,8 +862,8 @@ void *UE_thread(void *arg) { ...@@ -873,8 +862,8 @@ void *UE_thread(void *arg) {
curMsg.proc.nr_slot_tx = (absolute_slot + DURATION_RX_TO_TX) % nb_slot_frame; curMsg.proc.nr_slot_tx = (absolute_slot + DURATION_RX_TO_TX) % nb_slot_frame;
curMsg.proc.frame_rx = (absolute_slot/nb_slot_frame) % MAX_FRAME_NUMBER; curMsg.proc.frame_rx = (absolute_slot/nb_slot_frame) % MAX_FRAME_NUMBER;
curMsg.proc.frame_tx = ((absolute_slot+DURATION_RX_TO_TX)/nb_slot_frame) % MAX_FRAME_NUMBER; curMsg.proc.frame_tx = ((absolute_slot+DURATION_RX_TO_TX)/nb_slot_frame) % MAX_FRAME_NUMBER;
curMsg.proc.rx_slot_type = nr_ue_slot_select(cfg, curMsg.proc.frame_rx, curMsg.proc.nr_slot_rx); curMsg.proc.rx_slot_type = nr_ue_slot_select(cfg, curMsg.proc.nr_slot_rx);
curMsg.proc.tx_slot_type = nr_ue_slot_select(cfg, curMsg.proc.frame_tx, curMsg.proc.nr_slot_tx); curMsg.proc.tx_slot_type = nr_ue_slot_select(cfg, curMsg.proc.nr_slot_tx);
curMsg.proc.decoded_frame_rx=-1; curMsg.proc.decoded_frame_rx=-1;
//LOG_I(PHY,"Process slot %d total gain %d\n", slot_nr, UE->rx_total_gain_dB); //LOG_I(PHY,"Process slot %d total gain %d\n", slot_nr, UE->rx_total_gain_dB);
......
...@@ -621,13 +621,12 @@ typedef struct ...@@ -621,13 +621,12 @@ typedef struct
typedef struct typedef struct
{ {
fapi_nr_max_num_of_symbol_per_slot_t* max_num_of_symbol_per_slot_list; fapi_nr_max_num_of_symbol_per_slot_t *max_num_of_symbol_per_slot_list;
} fapi_nr_max_tdd_periodicity_t; } fapi_nr_max_tdd_periodicity_t;
typedef struct typedef struct
{ {
uint8_t tdd_period;//DL UL Transmission Periodicity. Value:0: ms0p5 1: ms0p625 2: ms1 3: ms1p25 4: ms2 5: ms2p5 6: ms5 7: ms10 8: ms3 9: ms4
uint8_t tdd_period_in_slots; uint8_t tdd_period_in_slots;
fapi_nr_max_tdd_periodicity_t* max_tdd_periodicity_list; fapi_nr_max_tdd_periodicity_t* max_tdd_periodicity_list;
...@@ -668,7 +667,8 @@ typedef struct { ...@@ -668,7 +667,8 @@ typedef struct {
fapi_nr_cell_config_t cell_config; fapi_nr_cell_config_t cell_config;
fapi_nr_ssb_config_t ssb_config; fapi_nr_ssb_config_t ssb_config;
fapi_nr_ssb_table_t ssb_table; fapi_nr_ssb_table_t ssb_table;
fapi_nr_tdd_table_t tdd_table; fapi_nr_tdd_table_t tdd_table_1;
fapi_nr_tdd_table_t *tdd_table_2;
fapi_nr_prach_config_t prach_config; fapi_nr_prach_config_t prach_config;
} fapi_nr_config_request_t; } fapi_nr_config_request_t;
......
...@@ -72,7 +72,7 @@ int slot_select_nr(NR_DL_FRAME_PARMS *frame_parms, int nr_frame, int nr_slot); ...@@ -72,7 +72,7 @@ int slot_select_nr(NR_DL_FRAME_PARMS *frame_parms, int nr_frame, int nr_slot);
* @param nr_slot : slot number * @param nr_slot : slot number
@returns int : downlink, uplink or mixed slot type */ @returns int : downlink, uplink or mixed slot type */
int nr_ue_slot_select(fapi_nr_config_request_t *cfg, int nr_frame, int nr_slot); int nr_ue_slot_select(fapi_nr_config_request_t *cfg, int nr_slot);
/** \brief This function frees tdd configuration for nr /** \brief This function frees tdd configuration for nr
* @param frame_parms NR DL Frame parameters * @param frame_parms NR DL Frame parameters
......
...@@ -39,63 +39,40 @@ ...@@ -39,63 +39,40 @@
* *
*********************************************************************/ *********************************************************************/
int nr_ue_slot_select(fapi_nr_config_request_t *cfg, int nr_frame, int nr_slot) { int nr_ue_slot_select(fapi_nr_config_request_t *cfg, int nr_slot)
/* for FFD all slot can be considered as an uplink */ {
int mu = cfg->ssb_config.scs_common, check_slot = 0; if (cfg->cell_config.frame_duplex_type == FDD)
return NR_UPLINK_SLOT | NR_DOWNLINK_SLOT;
if (cfg->cell_config.frame_duplex_type == FDD) { int period = cfg->tdd_table_1.tdd_period_in_slots +
return (NR_UPLINK_SLOT | NR_DOWNLINK_SLOT); (cfg->tdd_table_2 ? cfg->tdd_table_2->tdd_period_in_slots : 0);
int rel_slot = nr_slot % period;
fapi_nr_tdd_table_t *tdd_table = &cfg->tdd_table_1;
if (cfg->tdd_table_2 && rel_slot >= tdd_table->tdd_period_in_slots) {
rel_slot -= tdd_table->tdd_period_in_slots;
tdd_table = cfg->tdd_table_2;
} }
if (cfg->tdd_table.max_tdd_periodicity_list == NULL) // this happens before receiving TDD configuration
return (NR_DOWNLINK_SLOT);
if (nr_frame%2 == 0) { if (tdd_table->max_tdd_periodicity_list == NULL) // this happens before receiving TDD configuration
for(int symbol_count=0; symbol_count<NR_NUMBER_OF_SYMBOLS_PER_SLOT; symbol_count++) { return NR_DOWNLINK_SLOT;
if (cfg->tdd_table.max_tdd_periodicity_list[nr_slot].max_num_of_symbol_per_slot_list[symbol_count].slot_config == 1) {
check_slot++;
}
}
if(check_slot == NR_NUMBER_OF_SYMBOLS_PER_SLOT) {
return (NR_UPLINK_SLOT);
}
check_slot = 0;
for(int symbol_count=0; symbol_count<NR_NUMBER_OF_SYMBOLS_PER_SLOT; symbol_count++) {
if (cfg->tdd_table.max_tdd_periodicity_list[nr_slot].max_num_of_symbol_per_slot_list[symbol_count].slot_config == 0) {
check_slot++;
}
}
if(check_slot == NR_NUMBER_OF_SYMBOLS_PER_SLOT) { fapi_nr_max_tdd_periodicity_t *current_slot = &tdd_table->max_tdd_periodicity_list[rel_slot];
return (NR_DOWNLINK_SLOT);
} else {
return (NR_MIXED_SLOT);
}
} else {
for(int symbol_count=0; symbol_count<NR_NUMBER_OF_SYMBOLS_PER_SLOT; symbol_count++) {
if (cfg->tdd_table.max_tdd_periodicity_list[((1<<mu) * NR_NUMBER_OF_SUBFRAMES_PER_FRAME) + nr_slot].max_num_of_symbol_per_slot_list[symbol_count].slot_config == 1) {
check_slot++;
}
}
if(check_slot == NR_NUMBER_OF_SYMBOLS_PER_SLOT) {
return (NR_UPLINK_SLOT);
}
check_slot = 0; // if the 1st symbol is UL the whole slot is UL
if (current_slot->max_num_of_symbol_per_slot_list[0].slot_config == 1)
return NR_UPLINK_SLOT;
for(int symbol_count=0; symbol_count<NR_NUMBER_OF_SYMBOLS_PER_SLOT; symbol_count++) { // if the 1st symbol is flexible the whole slot is mixed
if (cfg->tdd_table.max_tdd_periodicity_list[((1<<mu) * NR_NUMBER_OF_SUBFRAMES_PER_FRAME) + nr_slot].max_num_of_symbol_per_slot_list[symbol_count].slot_config == 0) { if (current_slot->max_num_of_symbol_per_slot_list[0].slot_config == 2)
check_slot++; return NR_MIXED_SLOT;
}
}
if(check_slot == NR_NUMBER_OF_SYMBOLS_PER_SLOT) { for (int i = 1; i < NR_NUMBER_OF_SYMBOLS_PER_SLOT; i++) {
return (NR_DOWNLINK_SLOT); // if the 1st symbol is DL and any other is not, the slot is mixed
} else { if (current_slot->max_num_of_symbol_per_slot_list[i].slot_config != 0) {
return (NR_MIXED_SLOT); return NR_MIXED_SLOT;
} }
} }
// if here, all the symbols where DL
return NR_DOWNLINK_SLOT;
} }
...@@ -3658,8 +3658,8 @@ int ul_ant_bits(NR_DMRS_UplinkConfig_t *NR_DMRS_UplinkConfig, long transformPrec ...@@ -3658,8 +3658,8 @@ int ul_ant_bits(NR_DMRS_UplinkConfig_t *NR_DMRS_UplinkConfig, long transformPrec
int tdd_period_to_num[8] = {500,625,1000,1250,2000,2500,5000,10000}; int tdd_period_to_num[8] = {500,625,1000,1250,2000,2500,5000,10000};
int is_nr_DL_slot(NR_TDD_UL_DL_ConfigCommon_t *tdd_UL_DL_ConfigurationCommon,slot_t slot) { int is_nr_DL_slot(NR_TDD_UL_DL_ConfigCommon_t *tdd_UL_DL_ConfigurationCommon, slot_t slot)
{
int period,period1,period2=0; int period,period1,period2=0;
if (tdd_UL_DL_ConfigurationCommon==NULL) return(1); if (tdd_UL_DL_ConfigurationCommon==NULL) return(1);
......
...@@ -39,21 +39,19 @@ ...@@ -39,21 +39,19 @@
#include "executables/softmodem-common.h" #include "executables/softmodem-common.h"
#include "SCHED_NR/phy_frame_config_nr.h" #include "SCHED_NR/phy_frame_config_nr.h"
void set_tdd_config_nr_ue(fapi_nr_config_request_t *cfg, void set_tdd_config_nr_ue(fapi_nr_tdd_table_t *tdd_table,
int mu, int mu,
NR_TDD_UL_DL_ConfigCommon_t *tdd_config) { NR_TDD_UL_DL_Pattern_t *pattern)
{
const int nrofDownlinkSlots = tdd_config->pattern1.nrofDownlinkSlots; const int nrofDownlinkSlots = pattern->nrofDownlinkSlots;
const int nrofDownlinkSymbols = tdd_config->pattern1.nrofDownlinkSymbols; const int nrofDownlinkSymbols = pattern->nrofDownlinkSymbols;
const int nrofUplinkSlots = tdd_config->pattern1.nrofUplinkSlots; const int nrofUplinkSlots = pattern->nrofUplinkSlots;
const int nrofUplinkSymbols = tdd_config->pattern1.nrofUplinkSymbols; const int nrofUplinkSymbols = pattern->nrofUplinkSymbols;
int slot_number = 0; const int nb_periods_per_frame = get_nb_periods_per_frame(pattern->dl_UL_TransmissionPeriodicity);
const int nb_periods_per_frame = get_nb_periods_per_frame(tdd_config->pattern1.dl_UL_TransmissionPeriodicity); const int nb_slots_per_period = ((1 << mu) * NR_NUMBER_OF_SUBFRAMES_PER_FRAME) / nb_periods_per_frame;
const int nb_slots_to_set = TDD_CONFIG_NB_FRAMES*(1<<mu)*NR_NUMBER_OF_SUBFRAMES_PER_FRAME; tdd_table->tdd_period_in_slots = nb_slots_per_period;
const int nb_slots_per_period = ((1<<mu) * NR_NUMBER_OF_SUBFRAMES_PER_FRAME)/nb_periods_per_frame;
cfg->tdd_table.tdd_period_in_slots = nb_slots_per_period; if ((nrofDownlinkSymbols + nrofUplinkSymbols) == 0)
if ( (nrofDownlinkSymbols + nrofUplinkSymbols) == 0 )
AssertFatal(nb_slots_per_period == (nrofDownlinkSlots + nrofUplinkSlots), AssertFatal(nb_slots_per_period == (nrofDownlinkSlots + nrofUplinkSlots),
"set_tdd_configuration_nr: given period is inconsistent with current tdd configuration, nrofDownlinkSlots %d, nrofUplinkSlots %d, nb_slots_per_period %d \n", "set_tdd_configuration_nr: given period is inconsistent with current tdd configuration, nrofDownlinkSlots %d, nrofUplinkSlots %d, nb_slots_per_period %d \n",
nrofDownlinkSlots,nrofUplinkSlots,nb_slots_per_period); nrofDownlinkSlots,nrofUplinkSlots,nb_slots_per_period);
...@@ -64,57 +62,43 @@ void set_tdd_config_nr_ue(fapi_nr_config_request_t *cfg, ...@@ -64,57 +62,43 @@ void set_tdd_config_nr_ue(fapi_nr_config_request_t *cfg,
nrofDownlinkSlots,nrofUplinkSlots,nb_slots_per_period); nrofDownlinkSlots,nrofUplinkSlots,nb_slots_per_period);
} }
cfg->tdd_table.max_tdd_periodicity_list = (fapi_nr_max_tdd_periodicity_t *) malloc(nb_slots_to_set*sizeof(fapi_nr_max_tdd_periodicity_t)); tdd_table->max_tdd_periodicity_list = (fapi_nr_max_tdd_periodicity_t *) malloc(nb_slots_per_period * sizeof(fapi_nr_max_tdd_periodicity_t));
for(int memory_alloc =0 ; memory_alloc<nb_slots_to_set; memory_alloc++) for(int memory_alloc = 0 ; memory_alloc < nb_slots_per_period; memory_alloc++)
cfg->tdd_table.max_tdd_periodicity_list[memory_alloc].max_num_of_symbol_per_slot_list = (fapi_nr_max_num_of_symbol_per_slot_t *) malloc(NR_NUMBER_OF_SYMBOLS_PER_SLOT*sizeof( tdd_table->max_tdd_periodicity_list[memory_alloc].max_num_of_symbol_per_slot_list =
fapi_nr_max_num_of_symbol_per_slot_t)); (fapi_nr_max_num_of_symbol_per_slot_t *) malloc(NR_NUMBER_OF_SYMBOLS_PER_SLOT*sizeof(fapi_nr_max_num_of_symbol_per_slot_t));
while(slot_number != nb_slots_to_set) { int slot_number = 0;
while(slot_number != nb_slots_per_period) {
if(nrofDownlinkSlots != 0) { if(nrofDownlinkSlots != 0) {
for (int number_of_symbol = 0; number_of_symbol < nrofDownlinkSlots*NR_NUMBER_OF_SYMBOLS_PER_SLOT; number_of_symbol++) { for (int number_of_symbol = 0; number_of_symbol < nrofDownlinkSlots * NR_NUMBER_OF_SYMBOLS_PER_SLOT; number_of_symbol++) {
cfg->tdd_table.max_tdd_periodicity_list[slot_number].max_num_of_symbol_per_slot_list[number_of_symbol%NR_NUMBER_OF_SYMBOLS_PER_SLOT].slot_config= 0; tdd_table->max_tdd_periodicity_list[slot_number].max_num_of_symbol_per_slot_list[number_of_symbol % NR_NUMBER_OF_SYMBOLS_PER_SLOT].slot_config = 0;
if((number_of_symbol + 1) % NR_NUMBER_OF_SYMBOLS_PER_SLOT == 0)
if((number_of_symbol+1)%NR_NUMBER_OF_SYMBOLS_PER_SLOT == 0)
slot_number++; slot_number++;
} }
} }
if (nrofDownlinkSymbols != 0 || nrofUplinkSymbols != 0) { if (nrofDownlinkSymbols != 0 || nrofUplinkSymbols != 0) {
for(int number_of_symbol =0; number_of_symbol < nrofDownlinkSymbols; number_of_symbol++) { for(int number_of_symbol = 0; number_of_symbol < nrofDownlinkSymbols; number_of_symbol++) {
cfg->tdd_table.max_tdd_periodicity_list[slot_number].max_num_of_symbol_per_slot_list[number_of_symbol].slot_config= 0; tdd_table->max_tdd_periodicity_list[slot_number].max_num_of_symbol_per_slot_list[number_of_symbol].slot_config = 0;
} }
for(int number_of_symbol = nrofDownlinkSymbols; number_of_symbol < NR_NUMBER_OF_SYMBOLS_PER_SLOT - nrofUplinkSymbols; number_of_symbol++) {
for(int number_of_symbol = nrofDownlinkSymbols; number_of_symbol < NR_NUMBER_OF_SYMBOLS_PER_SLOT-nrofUplinkSymbols; number_of_symbol++) { tdd_table->max_tdd_periodicity_list[slot_number].max_num_of_symbol_per_slot_list[number_of_symbol].slot_config = 2;
cfg->tdd_table.max_tdd_periodicity_list[slot_number].max_num_of_symbol_per_slot_list[number_of_symbol].slot_config= 2;
} }
for(int number_of_symbol = NR_NUMBER_OF_SYMBOLS_PER_SLOT - nrofUplinkSymbols; number_of_symbol < NR_NUMBER_OF_SYMBOLS_PER_SLOT; number_of_symbol++) {
for(int number_of_symbol = NR_NUMBER_OF_SYMBOLS_PER_SLOT-nrofUplinkSymbols; number_of_symbol < NR_NUMBER_OF_SYMBOLS_PER_SLOT; number_of_symbol++) { tdd_table->max_tdd_periodicity_list[slot_number].max_num_of_symbol_per_slot_list[number_of_symbol].slot_config = 1;
cfg->tdd_table.max_tdd_periodicity_list[slot_number].max_num_of_symbol_per_slot_list[number_of_symbol].slot_config= 1;
} }
slot_number++; slot_number++;
} }
if(nrofUplinkSlots != 0) { if(nrofUplinkSlots != 0) {
for (int number_of_symbol = 0; number_of_symbol < nrofUplinkSlots*NR_NUMBER_OF_SYMBOLS_PER_SLOT; number_of_symbol++) { for (int number_of_symbol = 0; number_of_symbol < nrofUplinkSlots * NR_NUMBER_OF_SYMBOLS_PER_SLOT; number_of_symbol++) {
cfg->tdd_table.max_tdd_periodicity_list[slot_number].max_num_of_symbol_per_slot_list[number_of_symbol%NR_NUMBER_OF_SYMBOLS_PER_SLOT].slot_config= 1; tdd_table->max_tdd_periodicity_list[slot_number].max_num_of_symbol_per_slot_list[number_of_symbol%NR_NUMBER_OF_SYMBOLS_PER_SLOT].slot_config = 1;
if((number_of_symbol + 1) % NR_NUMBER_OF_SYMBOLS_PER_SLOT == 0)
if((number_of_symbol+1)%NR_NUMBER_OF_SYMBOLS_PER_SLOT == 0)
slot_number++; slot_number++;
} }
} }
} }
if (tdd_config->pattern1.ext1 == NULL) {
cfg->tdd_table.tdd_period = tdd_config->pattern1.dl_UL_TransmissionPeriodicity;
} else {
AssertFatal(tdd_config->pattern1.ext1->dl_UL_TransmissionPeriodicity_v1530 != NULL, "scc->tdd_UL_DL_ConfigurationCommon->pattern1.ext1->dl_UL_TransmissionPeriodicity_v1530 is null\n");
cfg->tdd_table.tdd_period = *tdd_config->pattern1.ext1->dl_UL_TransmissionPeriodicity_v1530;
}
LOG_I(NR_MAC, "TDD has been properly configured\n");
} }
void config_common_ue_sa(NR_UE_MAC_INST_t *mac, void config_common_ue_sa(NR_UE_MAC_INST_t *mac,
...@@ -205,9 +189,15 @@ void config_common_ue_sa(NR_UE_MAC_INST_t *mac, ...@@ -205,9 +189,15 @@ void config_common_ue_sa(NR_UE_MAC_INST_t *mac,
// TDD Table Configuration // TDD Table Configuration
if (cfg->cell_config.frame_duplex_type == TDD){ if (cfg->cell_config.frame_duplex_type == TDD){
set_tdd_config_nr_ue(cfg, set_tdd_config_nr_ue(&cfg->tdd_table_1,
frequencyInfoUL->scs_SpecificCarrierList.list.array[0]->subcarrierSpacing, frequencyInfoUL->scs_SpecificCarrierList.list.array[0]->subcarrierSpacing,
scc->tdd_UL_DL_ConfigurationCommon); &scc->tdd_UL_DL_ConfigurationCommon->pattern1);
if (scc->tdd_UL_DL_ConfigurationCommon->pattern2) {
cfg->tdd_table_2 = (fapi_nr_tdd_table_t *) malloc(sizeof(fapi_nr_tdd_table_t));
set_tdd_config_nr_ue(cfg->tdd_table_2,
frequencyInfoUL->scs_SpecificCarrierList.list.array[0]->subcarrierSpacing,
scc->tdd_UL_DL_ConfigurationCommon->pattern2);
}
} }
// PRACH configuration // PRACH configuration
...@@ -376,9 +366,15 @@ void config_common_ue(NR_UE_MAC_INST_t *mac, ...@@ -376,9 +366,15 @@ void config_common_ue(NR_UE_MAC_INST_t *mac,
// TDD Table Configuration // TDD Table Configuration
if (cfg->cell_config.frame_duplex_type == TDD){ if (cfg->cell_config.frame_duplex_type == TDD){
set_tdd_config_nr_ue(cfg, set_tdd_config_nr_ue(&cfg->tdd_table_1,
frequencyInfoUL->scs_SpecificCarrierList.list.array[0]->subcarrierSpacing, frequencyInfoUL->scs_SpecificCarrierList.list.array[0]->subcarrierSpacing,
scc->tdd_UL_DL_ConfigurationCommon); &scc->tdd_UL_DL_ConfigurationCommon->pattern1);
if (scc->tdd_UL_DL_ConfigurationCommon->pattern2) {
cfg->tdd_table_2 = (fapi_nr_tdd_table_t *) malloc(sizeof(fapi_nr_tdd_table_t));
set_tdd_config_nr_ue(cfg->tdd_table_2,
frequencyInfoUL->scs_SpecificCarrierList.list.array[0]->subcarrierSpacing,
scc->tdd_UL_DL_ConfigurationCommon->pattern2);
}
} }
// PRACH configuration // PRACH configuration
......
...@@ -263,10 +263,6 @@ uint8_t nr_ue_get_sdu(module_id_t module_idP, ...@@ -263,10 +263,6 @@ uint8_t nr_ue_get_sdu(module_id_t module_idP,
uint8_t *ulsch_buffer, uint8_t *ulsch_buffer,
uint16_t buflen); uint16_t buflen);
void set_tdd_config_nr_ue(fapi_nr_config_request_t *cfg,
int mu,
NR_TDD_UL_DL_ConfigCommon_t *tdd_config);
void set_harq_status(NR_UE_MAC_INST_t *mac, void set_harq_status(NR_UE_MAC_INST_t *mac,
uint8_t pucch_id, uint8_t pucch_id,
uint8_t harq_id, uint8_t harq_id,
......
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