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OpenXG
OpenXG UE
Commits
206c8c51
Commit
206c8c51
authored
Sep 25, 2017
by
Raymond Knopp
Browse files
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Plain Diff
ULSCH debugging RK.
parent
82f03acf
Changes
4
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Showing
4 changed files
with
50 additions
and
64 deletions
+50
-64
openair1/PHY/LTE_TRANSPORT/dci.c
openair1/PHY/LTE_TRANSPORT/dci.c
+3
-3
openair2/LAYER2/MAC/eNB_scheduler.c
openair2/LAYER2/MAC/eNB_scheduler.c
+0
-2
openair2/LAYER2/MAC/eNB_scheduler_primitives.c
openair2/LAYER2/MAC/eNB_scheduler_primitives.c
+1
-1
openair2/LAYER2/MAC/eNB_scheduler_ulsch.c
openair2/LAYER2/MAC/eNB_scheduler_ulsch.c
+46
-58
No files found.
openair1/PHY/LTE_TRANSPORT/dci.c
View file @
206c8c51
...
@@ -2720,9 +2720,9 @@ void dci_decoding_procedure0(LTE_UE_PDCCH **pdcch_vars,
...
@@ -2720,9 +2720,9 @@ void dci_decoding_procedure0(LTE_UE_PDCCH **pdcch_vars,
printf("dci_decoded_output[%d] => %x\n",i,dci_decoded_output[i]);
printf("dci_decoded_output[%d] => %x\n",i,dci_decoded_output[i]);
*/
*/
crc
=
(
crc16
(
&
dci_decoded_output
[
subframe
&
0x1
][
0
],
sizeof_bits
)
>>
16
)
^
extract_crc
(
&
dci_decoded_output
[
subframe
&
0x1
][
0
],
sizeof_bits
);
crc
=
(
crc16
(
&
dci_decoded_output
[
subframe
&
0x1
][
0
],
sizeof_bits
)
>>
16
)
^
extract_crc
(
&
dci_decoded_output
[
subframe
&
0x1
][
0
],
sizeof_bits
);
#ifdef DEBUG_DCI_DECODING
//
#ifdef DEBUG_DCI_DECODING
printf
(
"crc =>%x
\n
"
,
crc
);
LOG_D
(
PHY
,
"crc =>%x
\n
"
,
crc
);
#endif
//
#endif
if
(((
L
>
1
)
&&
((
crc
==
si_rnti
)
||
if
(((
L
>
1
)
&&
((
crc
==
si_rnti
)
||
(
crc
==
p_rnti
)
||
(
crc
==
p_rnti
)
||
...
...
openair2/LAYER2/MAC/eNB_scheduler.c
View file @
206c8c51
...
@@ -504,9 +504,7 @@ void eNB_dlsch_ulsch_scheduler(module_id_t module_idP, frame_t frameP, sub_frame
...
@@ -504,9 +504,7 @@ void eNB_dlsch_ulsch_scheduler(module_id_t module_idP, frame_t frameP, sub_frame
schedule_SI
(
module_idP
,
frameP
,
subframeP
);
schedule_SI
(
module_idP
,
frameP
,
subframeP
);
// This schedules Random-Access for legacy LTE and eMTC starting in subframeP
// This schedules Random-Access for legacy LTE and eMTC starting in subframeP
schedule_RA
(
module_idP
,
frameP
,
subframeP
);
schedule_RA
(
module_idP
,
frameP
,
subframeP
);
// copy previously scheduled UL resources (ULSCH + HARQ)
// copy previously scheduled UL resources (ULSCH + HARQ)
copy_ulreq
(
module_idP
,
frameP
,
subframeP
);
copy_ulreq
(
module_idP
,
frameP
,
subframeP
);
// This schedules SRS in subframeP
// This schedules SRS in subframeP
schedule_SRS
(
module_idP
,
frameP
,
subframeP
);
schedule_SRS
(
module_idP
,
frameP
,
subframeP
);
...
...
openair2/LAYER2/MAC/eNB_scheduler_primitives.c
View file @
206c8c51
...
@@ -2713,7 +2713,7 @@ int allocate_CCEs(int module_idP,
...
@@ -2713,7 +2713,7 @@ int allocate_CCEs(int module_idP,
int
i
,
j
,
idci
;
int
i
,
j
,
idci
;
int
nCCE
=
0
;
int
nCCE
=
0
;
LOG_D
(
MAC
,
"Allocate CCEs subframe %d, test %d : (DL
%d,UL %d)
\n
"
,
subframeP
,
test_onlyP
,
DL_req
->
number_dci
,
HI_DCI0_req
->
number_of_dci
);
LOG_D
(
MAC
,
"Allocate CCEs subframe %d, test %d : (DL
PDU %d, DL DCI %d, UL %d)
\n
"
,
subframeP
,
test_onlyP
,
DL_req
->
number_pdu
,
DL_req
->
number_dci
,
HI_DCI0_req
->
number_of_dci
);
DL_req
->
number_pdcch_ofdm_symbols
=
1
;
DL_req
->
number_pdcch_ofdm_symbols
=
1
;
try_again:
try_again:
...
...
openair2/LAYER2/MAC/eNB_scheduler_ulsch.c
View file @
206c8c51
...
@@ -941,13 +941,11 @@ abort();
...
@@ -941,13 +941,11 @@ abort();
format0);
format0);
*/
*/
if
(
CCE_allocation_infeasible
(
module_idP
,
CC_id
,
0
,
subframeP
,
aggregation
,
rnti
))
{
if
(
CCE_allocation_infeasible
(
module_idP
,
CC_id
,
2
,
subframeP
,
aggregation
,
rnti
))
{
LOG_W
(
MAC
,
"[eNB %d] frame %d subframe %d, UE %d/%x CC %d: not enough nCCE
\n
"
,
module_idP
,
frameP
,
subframeP
,
UE_id
,
rnti
,
CC_id
);
LOG_W
(
MAC
,
"[eNB %d] frame %d subframe %d, UE %d/%x CC %d: not enough nCCE
\n
"
,
module_idP
,
frameP
,
subframeP
,
UE_id
,
rnti
,
CC_id
);
continue
;
// break;
continue
;
// break;
}
else
{
}
LOG_D
(
MAC
,
"[eNB %d] frame %d subframe %d,Scheduling PUSCH for UE %d/%x CC %d : aggregation level %d, N_RB_UL %d
\n
"
,
module_idP
,
frameP
,
subframeP
,
UE_id
,
rnti
,
CC_id
,
aggregation
,
N_RB_UL
);
}
// if (eNB_UE_stats->mode == PUSCH) { // ue has a ulsch channel
// if (eNB_UE_stats->mode == PUSCH) { // ue has a ulsch channel
...
@@ -957,15 +955,8 @@ abort();
...
@@ -957,15 +955,8 @@ abort();
harq_pid
=
subframe2harqpid
(
&
cc
[
CC_id
],
sched_frame
,
sched_subframeP
);
harq_pid
=
subframe2harqpid
(
&
cc
[
CC_id
],
sched_frame
,
sched_subframeP
);
round
=
UE_sched_ctrl
->
round_UL
[
CC_id
][
harq_pid
];
round
=
UE_sched_ctrl
->
round_UL
[
CC_id
][
harq_pid
];
AssertFatal
(
round
<
8
,
"round %d > 7 for UE %d/%x
\n
"
,
round
,
UE_id
,
rnti
);
AssertFatal
(
round
<
8
,
"round %d > 7 for UE %d/%x
\n
"
,
round
,
UE_id
,
rnti
);
/*
LOG_D
(
MAC
,
"[eNB %d] frame %d subframe %d,Checking PUSCH %d for UE %d/%x CC %d : aggregation level %d, N_RB_UL %d
\n
"
,
if (get_UL_harq_info(module_idP,CC_id,frameP,subframeP,&harq_pid,&round)<0) {
module_idP
,
frameP
,
subframeP
,
harq_pid
,
UE_id
,
rnti
,
CC_id
,
aggregation
,
N_RB_UL
);
LOG_W(MAC,"[eNB %d] Scheduler Frame %d, subframeP %d: candidate harq_pid from PHY for UE %d CC %d RNTI %x\n",
module_idP,frameP,subframeP, UE_id, CC_id, rnti);
continue;
} else
LOG_T(MAC,"[eNB %d] Frame %d, subframeP %d, UE %d CC %d : got harq pid %d round %d (rnti %x)\n",
module_idP,frameP,subframeP,UE_id,CC_id, harq_pid, round,rnti);
*/
RC
.
eNB
[
module_idP
][
CC_id
]
->
pusch_stats_BO
[
UE_id
][(
frameP
*
10
)
+
subframeP
]
=
UE_template
->
ul_total_buffer
;
RC
.
eNB
[
module_idP
][
CC_id
]
->
pusch_stats_BO
[
UE_id
][(
frameP
*
10
)
+
subframeP
]
=
UE_template
->
ul_total_buffer
;
VCD_SIGNAL_DUMPER_DUMP_VARIABLE_BY_NAME
(
VCD_SIGNAL_DUMPER_VARIABLES_UE0_BO
,
RC
.
eNB
[
module_idP
][
CC_id
]
->
pusch_stats_BO
[
UE_id
][(
frameP
*
10
)
+
subframeP
]);
VCD_SIGNAL_DUMPER_DUMP_VARIABLE_BY_NAME
(
VCD_SIGNAL_DUMPER_VARIABLES_UE0_BO
,
RC
.
eNB
[
module_idP
][
CC_id
]
->
pusch_stats_BO
[
UE_id
][(
frameP
*
10
)
+
subframeP
]);
...
@@ -1108,52 +1099,49 @@ abort();
...
@@ -1108,52 +1099,49 @@ abort();
hi_dci0_pdu
->
dci_pdu
.
dci_pdu_rel8
.
cqi_csi_request
=
cqi_req
;
hi_dci0_pdu
->
dci_pdu
.
dci_pdu_rel8
.
cqi_csi_request
=
cqi_req
;
hi_dci0_pdu
->
dci_pdu
.
dci_pdu_rel8
.
dl_assignment_index
=
UE_template
->
DAI_ul
[
sched_subframeP
];
hi_dci0_pdu
->
dci_pdu
.
dci_pdu_rel8
.
dl_assignment_index
=
UE_template
->
DAI_ul
[
sched_subframeP
];
if
(
!
CCE_allocation_infeasible
(
module_idP
,
CC_id
,
2
,
subframeP
,
aggregation
,
eNB
->
HI_DCI0_req
[
CC_id
].
hi_dci0_request_body
.
number_of_dci
++
;
rnti
))
{
LOG_D
(
MAC
,
"[PUSCH %d] Frame %d, Subframe %d: Adding UL CONFIG.Request for UE %d/%x, ulsch_frame %d, ulsch_subframe %d
\n
"
,
eNB
->
HI_DCI0_req
[
CC_id
].
hi_dci0_request_body
.
number_of_dci
++
;
harq_pid
,
frameP
,
subframeP
,
UE_id
,
rnti
,
sched_frame
,
sched_subframeP
);
LOG_D
(
MAC
,
"[PUSCH %d] Frame %d, Subframe %d: Adding UL CONFIG.Request for UE %d/%x, ulsch_frame %d, ulsch_subframe %d
\n
"
,
// Add UL_config PDUs
harq_pid
,
frameP
,
subframeP
,
UE_id
,
rnti
,
sched_frame
,
sched_subframeP
);
fill_nfapi_ulsch_config_request_rel8
(
&
ul_req_tmp
->
ul_config_pdu_list
[
ul_req_tmp
->
number_of_pdus
],
cqi_req
,
// Add UL_config PDUs
cc
,
fill_nfapi_ulsch_config_request_rel8
(
&
ul_req_tmp
->
ul_config_pdu_list
[
ul_req_tmp
->
number_of_pdus
],
UE_template
->
physicalConfigDedicated
,
cqi_req
,
get_tmode
(
module_idP
,
CC_id
,
UE_id
),
cc
,
eNB
->
ul_handle
,
UE_template
->
physicalConfigDedicated
,
rnti
,
get_tmode
(
module_idP
,
CC_id
,
UE_id
),
first_rb
[
CC_id
],
// resource_block_start
eNB
->
ul_handle
,
rb_table
[
rb_table_index
],
// number_of_resource_blocks
rnti
,
UE_template
->
mcs_UL
[
harq_pid
],
first_rb
[
CC_id
],
// resource_block_start
cshift
,
// cyclic_shift_2_for_drms
rb_table
[
rb_table_index
],
// number_of_resource_blocks
0
,
// frequency_hopping_enabled_flag
UE_template
->
mcs_UL
[
harq_pid
],
0
,
// frequency_hopping_bits
cshift
,
// cyclic_shift_2_for_drms
ndi
,
// new_data_indication
0
,
// frequency_hopping_enabled_flag
0
,
// redundancy_version
0
,
// frequency_hopping_bits
harq_pid
,
// harq_process_number
ndi
,
// new_data_indication
0
,
// ul_tx_mode
0
,
// redundancy_version
0
,
// current_tx_nb
harq_pid
,
// harq_process_number
0
,
// n_srs
0
,
// ul_tx_mode
get_TBS_UL
(
UE_template
->
mcs_UL
[
harq_pid
],
0
,
// current_tx_nb
rb_table
[
rb_table_index
])
0
,
// n_srs
);
get_TBS_UL
(
UE_template
->
mcs_UL
[
harq_pid
],
rb_table
[
rb_table_index
])
);
#ifdef Rel14
#ifdef Rel14
if
(
UE_template
->
rach_resource_type
>
0
)
{
// This is a BL/CE UE allocation
if
(
UE_template
->
rach_resource_type
>
0
)
{
// This is a BL/CE UE allocation
fill_nfapi_ulsch_config_request_emtc
(
&
ul_req_tmp
->
ul_config_pdu_list
[
ul_req_tmp
->
number_of_pdus
],
fill_nfapi_ulsch_config_request_emtc
(
&
ul_req_tmp
->
ul_config_pdu_list
[
ul_req_tmp
->
number_of_pdus
],
UE_template
->
rach_resource_type
>
2
?
2
:
1
,
UE_template
->
rach_resource_type
>
2
?
2
:
1
,
1
,
//total_number_of_repetitions
1
,
//total_number_of_repetitions
1
,
//repetition_number
1
,
//repetition_number
(
frameP
*
10
)
+
subframeP
);
(
frameP
*
10
)
+
subframeP
);
}
}
#endif
#endif
ul_req_tmp
->
number_of_pdus
++
;
ul_req_tmp
->
number_of_pdus
++
;
eNB
->
ul_handle
++
;
eNB
->
ul_handle
++
;
}
add_ue_ulsch_info
(
module_idP
,
add_ue_ulsch_info
(
module_idP
,
CC_id
,
CC_id
,
UE_id
,
UE_id
,
...
@@ -1162,7 +1150,7 @@ abort();
...
@@ -1162,7 +1150,7 @@ abort();
LOG_D
(
MAC
,
"[eNB %d] CC_id %d Frame %d, subframeP %d: Generated ULSCH DCI for next UE_id %d, format 0
\n
"
,
module_idP
,
CC_id
,
frameP
,
subframeP
,
UE_id
);
LOG_D
(
MAC
,
"[eNB %d] CC_id %d Frame %d, subframeP %d: Generated ULSCH DCI for next UE_id %d, format 0
\n
"
,
module_idP
,
CC_id
,
frameP
,
subframeP
,
UE_id
);
}
}
else
{
// round > 0 => retransmission
else
{
// round > 0 => retransmission
T
(
T_ENB_MAC_UE_UL_SCHEDULE_RETRANSMISSION
,
T_INT
(
module_idP
),
T_INT
(
CC_id
),
T_INT
(
rnti
),
T_INT
(
frameP
),
T
(
T_ENB_MAC_UE_UL_SCHEDULE_RETRANSMISSION
,
T_INT
(
module_idP
),
T_INT
(
CC_id
),
T_INT
(
rnti
),
T_INT
(
frameP
),
T_INT
(
subframeP
),
T_INT
(
harq_pid
),
T_INT
(
UE_template
->
mcs_UL
[
harq_pid
]),
T_INT
(
first_rb
[
CC_id
]),
T_INT
(
rb_table
[
rb_table_index
]),
T_INT
(
subframeP
),
T_INT
(
harq_pid
),
T_INT
(
UE_template
->
mcs_UL
[
harq_pid
]),
T_INT
(
first_rb
[
CC_id
]),
T_INT
(
rb_table
[
rb_table_index
]),
...
...
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