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OpenXG
OpenXG-RAN
Commits
11ac7400
Commit
11ac7400
authored
Apr 11, 2024
by
ndomingues
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Baseline implementation of RA 2-Step MsgA procedures at gNB
parent
33162dc1
Changes
3
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3 changed files
with
51 additions
and
29 deletions
+51
-29
openair2/LAYER2/NR_MAC_gNB/gNB_scheduler_RA.c
openair2/LAYER2/NR_MAC_gNB/gNB_scheduler_RA.c
+15
-5
openair2/LAYER2/NR_MAC_gNB/gNB_scheduler_ulsch.c
openair2/LAYER2/NR_MAC_gNB/gNB_scheduler_ulsch.c
+26
-19
openair2/LAYER2/NR_MAC_gNB/nr_mac_gNB.h
openair2/LAYER2/NR_MAC_gNB/nr_mac_gNB.h
+10
-5
No files found.
openair2/LAYER2/NR_MAC_gNB/gNB_scheduler_RA.c
View file @
11ac7400
...
...
@@ -640,18 +640,27 @@ void nr_initiate_ra_proc(module_id_t module_idP,
ra
->
rnti
=
trial
;
}
ra
->
ra_state
=
nrRA_Msg2
;
ra
->
preamble_frame
=
frameP
;
ra
->
preamble_slot
=
slotP
;
ra
->
preamble_index
=
preamble_index
;
ra
->
timing_offset
=
timing_offset
;
uint8_t
ul_carrier_id
=
0
;
// 0 for NUL 1 for SUL
ra
->
RA_rnti
=
nr_get_ra_rnti
(
symbol
,
slotP
,
freq_index
,
ul_carrier_id
);
NR_ServingCellConfigCommon_t
*
scc
=
cc
->
ServingCellConfigCommon
;
if
(
scc
->
uplinkConfigCommon
->
initialUplinkBWP
->
ext1
&&
scc
->
uplinkConfigCommon
->
initialUplinkBWP
->
ext1
->
msgA_ConfigCommon_r16
)
{
ra
->
ra_type
=
RA_2_STEP
;
ra
->
ra_state
=
nrRA_WAIT_MsgA_PUSCH
;
ra
->
MsgB_rnti
=
nr_get_MsgB_rnti
(
symbol
,
slotP
,
freq_index
,
ul_carrier_id
);
}
else
{
ra
->
ra_type
=
RA_4_STEP
;
ra
->
ra_state
=
nrRA_Msg2
;
}
int
index
=
ra
-
cc
->
ra
;
LOG_I
(
NR_MAC
,
"%d.%d UE RA-RNTI %04x TC-RNTI %04x: Activating RA process index %d
\n
"
,
frameP
,
slotP
,
ra
->
RA_rnti
,
ra
->
rnti
,
index
);
// Configure RA BWP
NR_ServingCellConfigCommon_t
*
scc
=
cc
->
ServingCellConfigCommon
;
configure_UE_BWP
(
nr_mac
,
scc
,
NULL
,
ra
,
NULL
,
-
1
,
-
1
);
uint8_t
beam_index
=
ssb_index_from_prach
(
module_idP
,
frameP
,
slotP
,
preamble_index
,
freq_index
,
symbol
);
...
...
@@ -1844,6 +1853,7 @@ static void nr_generate_Msg4(module_id_t module_idP,
NR_COMMON_channels_t
*
cc
=
&
nr_mac
->
common_channels
[
CC_id
];
NR_UE_DL_BWP_t
*
dl_bwp
=
&
ra
->
DL_BWP
;
AssertFatal
(
ra
->
ra_type
==
RA_4_STEP
,
"Scheduling of RA 2-Step MsgB not implemented yet!
\n
"
);
// if it is a DL slot, if the RA is in MSG4 state
if
(
is_xlsch_in_slot
(
nr_mac
->
dlsch_slot_bitmap
[
slotP
/
64
],
slotP
))
{
...
...
@@ -2085,7 +2095,7 @@ static void nr_generate_Msg4(module_id_t module_idP,
vrb_map
[
BWPStart
+
rb
+
rbStart
]
|=
SL_to_bitmap
(
msg4_tda
.
startSymbolIndex
,
msg4_tda
.
nrOfSymbols
);
}
ra
->
ra_state
=
nrRA_WAIT_Msg4_ACK
;
ra
->
ra_state
=
nrRA_WAIT_Msg4_
MsgB_
ACK
;
LOG_I
(
NR_MAC
,
"UE %04x Generate msg4: feedback at %4d.%2d, payload %d bytes, next state WAIT_Msg4_ACK
\n
"
,
ra
->
rnti
,
pucch
->
frame
,
pucch
->
ul_slot
,
harq
->
tb_size
);
}
}
...
...
@@ -2278,7 +2288,7 @@ void nr_schedule_RA(module_id_t module_idP,
LOG_D
(
NR_MAC
,
"RA[state:%d]
\n
"
,
ra
->
ra_state
);
// Check RA Contention Resolution timer
if
(
ra
->
ra_state
>=
nrRA_WAIT_Msg3
)
{
if
(
ra
->
ra_
type
==
RA_4_STEP
&&
ra
->
ra_
state
>=
nrRA_WAIT_Msg3
)
{
ra
->
contention_resolution_timer
--
;
if
(
ra
->
contention_resolution_timer
<
0
)
{
LOG_W
(
NR_MAC
,
"(%d.%d) RA Contention Resolution timer expired for UE 0x%04x, RA procedure failed...
\n
"
,
frameP
,
slotP
,
ra
->
rnti
);
...
...
@@ -2298,7 +2308,7 @@ void nr_schedule_RA(module_id_t module_idP,
case
nrRA_Msg4
:
nr_generate_Msg4
(
module_idP
,
CC_id
,
frameP
,
slotP
,
ra
,
DL_req
,
TX_req
);
break
;
case
nrRA_WAIT_Msg4_ACK
:
case
nrRA_WAIT_Msg4_
MsgB_
ACK
:
nr_check_Msg4_Ack
(
module_idP
,
CC_id
,
frameP
,
slotP
,
ra
);
break
;
default:
...
...
openair2/LAYER2/NR_MAC_gNB/gNB_scheduler_ulsch.c
View file @
11ac7400
...
...
@@ -522,7 +522,7 @@ void handle_nr_ul_harq(const int CC_idP,
}
}
NR_SCHED_UNLOCK
(
&
nrmac
->
sched_lock
);
LOG_
E
(
NR_MAC
,
"no RA proc for RNTI 0x%04x in Msg3/PUSCH
\n
"
,
crc_pdu
->
rnti
);
LOG_
D
(
NR_MAC
,
"no RA proc for RNTI 0x%04x in Msg3/PUSCH
\n
"
,
crc_pdu
->
rnti
);
return
;
}
NR_UE_sched_ctrl_t
*
sched_ctrl
=
&
UE
->
UE_sched_ctrl
;
...
...
@@ -712,7 +712,7 @@ static void _nr_rx_sdu(const module_id_t gnb_mod_idP,
* it. */
for
(
int
i
=
0
;
i
<
NR_NB_RA_PROC_MAX
;
++
i
)
{
NR_RA_t
*
ra
=
&
gNB_mac
->
common_channels
[
CC_idP
].
ra
[
i
];
if
(
ra
->
ra_state
!=
nrRA_WAIT_Msg3
)
if
(
ra
->
ra_
type
==
RA_4_STEP
&&
ra
->
ra_
state
!=
nrRA_WAIT_Msg3
)
continue
;
if
(
no_sig
)
{
...
...
@@ -720,22 +720,29 @@ static void _nr_rx_sdu(const module_id_t gnb_mod_idP,
nr_clear_ra_proc
(
ra
);
continue
;
}
// random access pusch with TC-RNTI
if
(
ra
->
rnti
!=
current_rnti
)
{
LOG_D
(
NR_MAC
,
"expected TC_RNTI %04x to match current RNTI %04x
\n
"
,
ra
->
rnti
,
current_rnti
);
if
((
frameP
==
ra
->
Msg3_frame
)
&&
(
slotP
==
ra
->
Msg3_slot
))
{
LOG_W
(
NR_MAC
,
"Random Access %i failed at state %s (TC_RNTI %04x RNTI %04x)
\n
"
,
i
,
nrra_text
[
ra
->
ra_state
],
ra
->
rnti
,
current_rnti
);
nr_clear_ra_proc
(
ra
);
if
(
ra
->
ra_type
==
RA_2_STEP
)
{
// random access pusch with RA-RNTI
if
(
ra
->
RA_rnti
!=
current_rnti
)
{
LOG_E
(
NR_MAC
,
"expected TC_RNTI %04x to match current RNTI %04x
\n
"
,
ra
->
RA_rnti
,
current_rnti
);
continue
;
}
}
else
{
// random access pusch with TC-RNTI
if
(
ra
->
rnti
!=
current_rnti
)
{
LOG_D
(
NR_MAC
,
"expected TC_RNTI %04x to match current RNTI %04x
\n
"
,
ra
->
rnti
,
current_rnti
);
if
((
frameP
==
ra
->
Msg3_frame
)
&&
(
slotP
==
ra
->
Msg3_slot
))
{
LOG_W
(
NR_MAC
,
"Random Access %i failed at state %s (TC_RNTI %04x RNTI %04x)
\n
"
,
i
,
nrra_text
[
ra
->
ra_state
],
ra
->
rnti
,
current_rnti
);
nr_clear_ra_proc
(
ra
);
}
continue
;
continue
;
}
}
UE
=
UE
?
UE
:
add_new_nr_ue
(
gNB_mac
,
ra
->
rnti
,
ra
->
CellGroup
);
...
...
@@ -782,8 +789,8 @@ static void _nr_rx_sdu(const module_id_t gnb_mod_idP,
process_CellGroup
(
ra
->
CellGroup
,
UE
);
}
else
{
LOG_A
(
NR_MAC
,
"[RAPROC] RA
-Msg3 received (sdu_lenP %d)
\n
"
,
sdu_lenP
);
LOG_D
(
NR_MAC
,
"[RAPROC] Received
Msg3:
\n
"
);
LOG_A
(
NR_MAC
,
"[RAPROC] RA
%s received (sdu_lenP %d)
\n
"
,
ra
->
ra_type
==
RA_2_STEP
?
"MsgA-PUSCH"
:
"Msg3
"
,
sdu_lenP
);
LOG_D
(
NR_MAC
,
"[RAPROC] Received
%s:
\n
"
,
ra
->
ra_type
==
RA_2_STEP
?
"MsgA-PUSCH"
:
"Msg3
"
);
for
(
int
k
=
0
;
k
<
sdu_lenP
;
k
++
)
{
LOG_D
(
NR_MAC
,
"(%i): 0x%x
\n
"
,
k
,
sduP
[
k
]);
}
...
...
@@ -869,7 +876,7 @@ static void _nr_rx_sdu(const module_id_t gnb_mod_idP,
return
;
}
LOG_D
(
NR_MAC
,
"Random Access %i Msg3 CRC did not pass
)
\n
"
,
i
);
LOG_D
(
NR_MAC
,
"Random Access %i Msg3 CRC did not pass
\n
"
,
i
);
ra
->
msg3_round
++
;
ra
->
ra_state
=
nrRA_Msg3_retransmission
;
...
...
openair2/LAYER2/NR_MAC_gNB/nr_mac_gNB.h
View file @
11ac7400
...
...
@@ -114,13 +114,15 @@ typedef struct {
typedef
enum
{
nrRA_gNB_IDLE
=
0
,
nrRA_Msg2
=
1
,
nrRA_WAIT_Msg3
=
2
,
nrRA_Msg3_retransmission
=
3
,
nrRA_Msg4
=
4
,
nrRA_WAIT_Msg4_ACK
=
5
,
nrRA_WAIT_MsgA_PUSCH
=
2
,
nrRA_WAIT_Msg3
=
3
,
nrRA_Msg3_retransmission
=
4
,
nrRA_Msg4
=
5
,
nrRA_MsgB
=
6
,
nrRA_WAIT_Msg4_MsgB_ACK
=
7
,
}
RA_gNB_state_t
;
static
const
char
*
const
nrra_text
[]
=
{
"IDLE"
,
"Msg2"
,
"WAIT_Msg
3"
,
"Msg3_retransmission"
,
"Msg3_dcch_dtch"
,
"Msg4
"
,
"WAIT_Msg4_ACK"
};
{
"IDLE"
,
"Msg2"
,
"WAIT_Msg
A_PUSCH"
,
"WAIT_Msg3"
,
"Msg3_retransmission"
,
"Msg3_dcch_dtch"
,
"Msg4"
,
"MsgB
"
,
"WAIT_Msg4_ACK"
};
typedef
struct
nr_pdsch_AntennaPorts_t
{
int
N1
;
int
N2
;
...
...
@@ -188,6 +190,8 @@ typedef struct {
rnti_t
rnti
;
/// RA RNTI allocated from received PRACH
uint16_t
RA_rnti
;
/// MsgB RNTI allocated from received PRACH
uint16_t
MsgB_rnti
;
/// Received UE Contention Resolution Identifier
uint8_t
cont_res_id
[
6
];
/// Msg3 first RB
...
...
@@ -216,6 +220,7 @@ typedef struct {
/// Preambles for contention-free access
NR_preamble_ue_t
preambles
;
int
contention_resolution_timer
;
nr_ra_type_t
ra_type
;
/// CFRA flag
bool
cfra
;
// BWP for RA
...
...
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