wrong? Switch FAPI CCE REG Mapping order

nfapi/open-nFAPI/nfapi/public_inc/nfapi_nr_interface.h

@@ -279,8 +279,8 @@ typedef enum {
 } nfapi_nr_ssb_and_cset_mux_pattern_type_e;
 
 typedef enum {
-  NFAPI_NR_CCE_REG_MAPPING_INTERLEAVED=1,
-  NFAPI_NR_CCE_REG_MAPPING_NON_INTERLEAVED=0
+  NFAPI_NR_CCE_REG_MAPPING_INTERLEAVED=0,
+  NFAPI_NR_CCE_REG_MAPPING_NON_INTERLEAVED=1
 } nfapi_nr_cce_reg_mapping_type_e;
 
 typedef enum {

openair2/LAYER2/NR_MAC_gNB/gNB_scheduler_primitives.c

@@ -1134,10 +1134,10 @@ void fill_dci_pdu_rel15(const NR_ServingCellConfigCommon_t *scc,
                         int bwp_id,
                         NR_SearchSpace_t *ss,
                         NR_ControlResourceSet_t *coreset,
-                        uint16_t cset0_bwp_size)
-{
+                        uint16_t cset0_bwp_size) {
+  uint8_t fsize = 0, pos = 0;	
+  gNB_MAC_INST *gNB_mac = RC.nrmac[0];
 
-  uint8_t fsize = 0, pos = 0;
   uint64_t *dci_pdu = (uint64_t *)pdcch_dci_pdu->Payload;
   *dci_pdu = 0;
   uint16_t alt_size = 0;
@@ -1352,8 +1352,13 @@ void fill_dci_pdu_rel15(const NR_ServingCellConfigCommon_t *scc,
       // Time domain assignment 4 bit
       for (int i = 0; i < 4; i++)
         *dci_pdu |= (((uint64_t)dci_pdu_rel15->time_domain_assignment.val >> (3 - i)) & 1) << (dci_size - pos++);
+
       LOG_D(NR_MAC, "dci_pdu_rel15->time_domain_assignment.val = %i\n", dci_pdu_rel15->time_domain_assignment.val);
       // VRB to PRB mapping 1 bit
+      if (gNB_mac->sched_ctrlCommon->sched_pdcch.CceRegMappingType) {
+	      dci_pdu_rel15->vrb_to_prb_mapping.val = 1;
+      }
+
       *dci_pdu |= ((uint64_t)dci_pdu_rel15->vrb_to_prb_mapping.val & 1) << (dci_size - pos++);
       LOG_D(NR_MAC, "dci_pdu_rel15->vrb_to_prb_mapping.val = %i\n", dci_pdu_rel15->vrb_to_prb_mapping.val);
       // MCS 5bit  //bit over 32, so dci_pdu ++