Commit 67b4cf30 authored by hsum's avatar hsum

add check receives scheduling request and Remove print log.

parent e604c3f3
......@@ -961,7 +961,7 @@ static uint8_t pack_ul_tti_request_prach_pdu(nfapi_nr_prach_pdu_t *prach_pdu, ui
static uint8_t pack_ul_tti_request_pucch_pdu(nfapi_nr_pucch_pdu_t *pucch_pdu, uint8_t **ppWritePackedMsg, uint8_t *end)
{
LOG_I(PHY,"pucch_pdu->sr_flag: %d\n",pucch_pdu->sr_flag);
// LOG_I(PHY,"pucch_pdu->sr_flag: %d\n",pucch_pdu->sr_flag);
if (!(push16(pucch_pdu->rnti, ppWritePackedMsg, end)
&& push32(pucch_pdu->handle, ppWritePackedMsg, end)
&& push16(pucch_pdu->bwp_size, ppWritePackedMsg, end)
......@@ -1665,7 +1665,7 @@ static uint8_t pack_ul_config_request_body_value(void *tlv, uint8_t **ppWritePac
static uint8_t pack_ul_tti_request(void *msg, uint8_t **ppWritePackedMsg, uint8_t *end, nfapi_p7_codec_config_t *config)
{
nfapi_nr_ul_tti_request_t *pNfapiMsg = (nfapi_nr_ul_tti_request_t *)msg;
LOG_I(PHY,"pack_ul_tti_request SFN/Slot:%d.%d\n",pNfapiMsg->SFN,pNfapiMsg->Slot);
// LOG_I(PHY,"pack_ul_tti_request SFN/Slot:%d.%d\n",pNfapiMsg->SFN,pNfapiMsg->Slot);
pNfapiMsg->n_ulcch = 0;
pNfapiMsg->n_ulsch = 0;
for (int i = 0; i < pNfapiMsg->n_pdus; i++) {
......
......@@ -925,7 +925,7 @@ int pnf_p7_slot_ind(pnf_p7_t* pnf_p7, uint16_t phy_id, uint16_t sfn, uint16_t sl
{
DevAssert(pnf_p7->_public.tx_data_req_fn != NULL);
LOG_I(PHY, "Process tx_data SFN/slot %d.%d buffer index: %d \n",sfn_tx,slot_tx,buffer_index_tx);
LOG_D(PHY, "Process tx_data SFN/slot %d.%d buffer index: %d \n",sfn_tx,slot_tx,buffer_index_tx);
// pnf_phy_tx_data_req()
(pnf_p7->_public.tx_data_req_fn)(&(pnf_p7->_public), &tx_slot_buffer->tx_data_req);
//tx_slot_buffer->tx_data_req.SFN = -1; // to make sure it might not get
......
......@@ -383,7 +383,7 @@ void nr_decode_pucch0(PHY_VARS_gNB *gNB,
uci_pdu->timing_advance = 0xffff; // currently not valid
uci_pdu->rssi = 1280 - (10 * dB_fixed(32767 * 32767)) - dB_fixed_times10(signal_energy_ant0);
LOG_I(PHY,"(%d/%d) uci_pdu->pduBitmap:%d\n",frame,slot,uci_pdu->pduBitmap);
// LOG_I(PHY,"(%d/%d) uci_pdu->pduBitmap:%d\n",frame,slot,uci_pdu->pduBitmap);
if (pucch_pdu->bit_len_harq==0) {
uci_pdu->sr.sr_confidence_level = SNRtimes10 < uci_stats->pucch0_thres;
uci_stats->pucch0_sr_trials++;
......
......@@ -1386,7 +1386,7 @@ void nr_schedule_ue_spec(module_id_t module_id,
TX_req->Number_of_PDUs++;
TX_req->SFN = frame;
TX_req->Slot = slot;
LOG_I(NFAPI_VNF,"[t1] scheduler_dlsch fill TX_D , %d/%d \n",frame,slot);
// LOG_I(NFAPI_VNF,"[t1] scheduler_dlsch fill TX_D , %d/%d \n",frame,slot);
/* mark UE as scheduled */
sched_pdsch->rbSize = 0;
}
......
......@@ -1020,7 +1020,7 @@ void handle_nr_uci_pucch_0_1(module_id_t mod_id,
return;
}
NR_UE_sched_ctrl_t *sched_ctrl = &UE->UE_sched_ctrl;
LOG_I(NR_MAC,"(%d/%d)uci_01->pduBitmap:%d\n",frame,slot,uci_01->pduBitmap);
// LOG_I(NR_MAC,"(%d/%d)uci_01->pduBitmap:%d\n",frame,slot,uci_01->pduBitmap);
if (((uci_01->pduBitmap >> 1) & 0x01)) {
// iterate over received harq bits
......@@ -1055,7 +1055,7 @@ void handle_nr_uci_pucch_0_1(module_id_t mod_id,
if (uci_01->sr.sr_indication && uci_01->sr.sr_confidence_level == 0 && uci_01->ul_cqi >= 148) {
// SR detected with SNR >= 10dB
sched_ctrl->SR |= true;
LOG_D(NR_MAC, "SR UE %04x ul_cqi %d\n", uci_01->rnti, uci_01->ul_cqi);
LOG_I(NR_MAC, "SR UE %04x ul_cqi %d\n", uci_01->rnti, uci_01->ul_cqi);
}
}
......
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