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OpenXG
OpenXG-RAN
Commits
74690ceb
Commit
74690ceb
authored
Dec 15, 2025
by
francescomani
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fix CORESET start PRB according to standard at OAI UE
parent
b916c6d8
Changes
3
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3 changed files
with
21 additions
and
12 deletions
+21
-12
nfapi/open-nFAPI/nfapi/public_inc/fapi_nr_ue_interface.h
nfapi/open-nFAPI/nfapi/public_inc/fapi_nr_ue_interface.h
+1
-0
openair1/PHY/NR_UE_TRANSPORT/dci_nr.c
openair1/PHY/NR_UE_TRANSPORT/dci_nr.c
+11
-12
openair2/LAYER2/NR_MAC_UE/nr_ue_dci_configuration.c
openair2/LAYER2/NR_MAC_UE/nr_ue_dci_configuration.c
+9
-0
No files found.
nfapi/open-nFAPI/nfapi/public_inc/fapi_nr_ue_interface.h
View file @
74690ceb
...
@@ -73,6 +73,7 @@ typedef struct {
...
@@ -73,6 +73,7 @@ typedef struct {
typedef
struct
{
typedef
struct
{
/// frequency_domain_resource;
/// frequency_domain_resource;
uint8_t
frequency_domain_resource
[
6
];
uint8_t
frequency_domain_resource
[
6
];
uint32_t
rb_offset
;
uint8_t
StartSymbolIndex
;
uint8_t
StartSymbolIndex
;
uint16_t
StartSymbolBitmap
;
uint16_t
StartSymbolBitmap
;
uint8_t
duration
;
uint8_t
duration
;
...
...
openair1/PHY/NR_UE_TRANSPORT/dci_nr.c
View file @
74690ceb
...
@@ -204,6 +204,7 @@ static void nr_pdcch_extract_rbs_single(uint32_t rxdataF_sz,
...
@@ -204,6 +204,7 @@ static void nr_pdcch_extract_rbs_single(uint32_t rxdataF_sz,
c16_t
dl_ch_estimates_ext
[][
arraySz
],
c16_t
dl_ch_estimates_ext
[][
arraySz
],
NR_DL_FRAME_PARMS
*
frame_parms
,
NR_DL_FRAME_PARMS
*
frame_parms
,
uint8_t
*
coreset_freq_dom
,
uint8_t
*
coreset_freq_dom
,
uint32_t
rb_offset
,
uint32_t
coreset_nbr_rb
,
uint32_t
coreset_nbr_rb
,
uint32_t
n_BWP_start
)
uint32_t
n_BWP_start
)
{
{
...
@@ -250,7 +251,7 @@ static void nr_pdcch_extract_rbs_single(uint32_t rxdataF_sz,
...
@@ -250,7 +251,7 @@ static void nr_pdcch_extract_rbs_single(uint32_t rxdataF_sz,
continue
;
continue
;
}
}
for
(
int
rb
=
0
;
rb
<
6
;
rb
++
)
{
for
(
int
rb
=
0
;
rb
<
6
;
rb
++
)
{
int
c_rb
=
rb_group
*
6
+
rb
;
int
c_rb
=
rb_group
*
6
+
rb
+
rb_offset
;
c16_t
*
rxF
=
NULL
;
c16_t
*
rxF
=
NULL
;
if
((
frame_parms
->
N_RB_DL
&
1
)
==
0
)
{
if
((
frame_parms
->
N_RB_DL
&
1
)
==
0
)
{
if
((
c_rb
+
n_BWP_start
)
<
frame_parms
->
N_RB_DL
/
2
)
if
((
c_rb
+
n_BWP_start
)
<
frame_parms
->
N_RB_DL
/
2
)
...
@@ -338,10 +339,9 @@ static void nr_rx_pdcch_symbol(PHY_VARS_NR_UE *ue,
...
@@ -338,10 +339,9 @@ static void nr_rx_pdcch_symbol(PHY_VARS_NR_UE *ue,
fapi_nr_coreset_t
*
coreset
=
&
phy_pdcch_config
->
pdcch_config
[
ss_idx
].
coreset
;
fapi_nr_coreset_t
*
coreset
=
&
phy_pdcch_config
->
pdcch_config
[
ss_idx
].
coreset
;
int32_t
pdcch_est_size
=
ceil_mod
(
fp
->
ofdm_symbol_size
+
LTE_CE_FILTER_LENGTH
,
16
);
int32_t
pdcch_est_size
=
ceil_mod
(
fp
->
ofdm_symbol_size
+
LTE_CE_FILTER_LENGTH
,
16
);
__attribute__
((
aligned
(
16
)))
c16_t
pdcch_dl_ch_estimates
[
fp
->
nb_antennas_rx
][
pdcch_est_size
];
__attribute__
((
aligned
(
16
)))
c16_t
pdcch_dl_ch_estimates
[
fp
->
nb_antennas_rx
][
pdcch_est_size
];
int
n_rb
;
int
n_rb
,
cset_start
;
int
rb_offset
;
get_coreset_rballoc
(
coreset
->
frequency_domain_resource
,
&
n_rb
,
&
cset_start
);
get_coreset_rballoc
(
coreset
->
frequency_domain_resource
,
&
n_rb
,
&
rb_offset
);
int
rb_offset
=
cset_start
+
coreset
->
rb_offset
;
unsigned
short
scrambling_id
=
coreset
->
pdcch_dmrs_scrambling_id
;
unsigned
short
scrambling_id
=
coreset
->
pdcch_dmrs_scrambling_id
;
int
dmrs_ref
=
0
;
int
dmrs_ref
=
0
;
if
(
coreset
->
CoreSetType
==
NFAPI_NR_CSET_CONFIG_PDCCH_CONFIG
)
if
(
coreset
->
CoreSetType
==
NFAPI_NR_CSET_CONFIG_PDCCH_CONFIG
)
...
@@ -376,6 +376,7 @@ static void nr_rx_pdcch_symbol(PHY_VARS_NR_UE *ue,
...
@@ -376,6 +376,7 @@ static void nr_rx_pdcch_symbol(PHY_VARS_NR_UE *ue,
pdcch_dl_ch_estimates_ext
,
pdcch_dl_ch_estimates_ext
,
fp
,
fp
,
coreset
->
frequency_domain_resource
,
coreset
->
frequency_domain_resource
,
coreset
->
rb_offset
,
n_rb
,
n_rb
,
phy_pdcch_config
->
pdcch_config
[
ss_idx
].
BWPStart
);
phy_pdcch_config
->
pdcch_config
[
ss_idx
].
BWPStart
);
...
@@ -509,10 +510,8 @@ void nr_pdcch_dci_indication(const UE_nr_rxtx_proc_t *proc,
...
@@ -509,10 +510,8 @@ void nr_pdcch_dci_indication(const UE_nr_rxtx_proc_t *proc,
uint8_t
unused_start_symb
[
NR_SYMBOLS_PER_SLOT
]
=
{
0
};
uint8_t
unused_start_symb
[
NR_SYMBOLS_PER_SLOT
]
=
{
0
};
const
int
num_monitoring_occ
=
get_pdcch_mon_occasions_slot
(
rel15
,
unused_start_symb
);
const
int
num_monitoring_occ
=
get_pdcch_mon_occasions_slot
(
rel15
,
unused_start_symb
);
const
int
llr_stride
=
llr_size
/
rel15
->
coreset
.
duration
;
const
int
llr_stride
=
llr_size
/
rel15
->
coreset
.
duration
;
int
n_rb
,
cset_start
;
int
n_rb
;
get_coreset_rballoc
(
rel15
->
coreset
.
frequency_domain_resource
,
&
n_rb
,
&
cset_start
);
int
rb_offset
;
get_coreset_rballoc
(
rel15
->
coreset
.
frequency_domain_resource
,
&
n_rb
,
&
rb_offset
);
for
(
int
m
=
0
;
m
<
num_monitoring_occ
;
m
++
)
{
for
(
int
m
=
0
;
m
<
num_monitoring_occ
;
m
++
)
{
/// PDCCH/DCI e-sequence (input to rate matching).
/// PDCCH/DCI e-sequence (input to rate matching).
...
@@ -643,9 +642,9 @@ static void nr_dci_decoding_procedure(PHY_VARS_NR_UE *ue,
...
@@ -643,9 +642,9 @@ static void nr_dci_decoding_procedure(PHY_VARS_NR_UE *ue,
.
ss_type
=
rel15
->
ss_type_options
[
k
],
.
ss_type
=
rel15
->
ss_type_options
[
k
],
.
coreset_type
=
rel15
->
coreset
.
CoreSetType
,
.
coreset_type
=
rel15
->
coreset
.
CoreSetType
,
};
};
int
n_rb
,
rb_offse
t
;
int
n_rb
,
cset_star
t
;
get_coreset_rballoc
(
rel15
->
coreset
.
frequency_domain_resource
,
&
n_rb
,
&
rb_offse
t
);
get_coreset_rballoc
(
rel15
->
coreset
.
frequency_domain_resource
,
&
n_rb
,
&
cset_star
t
);
dci
->
cset_start
=
rel15
->
BWPStart
+
rb_offset
;
dci
->
cset_start
=
rel15
->
BWPStart
+
cset_start
+
rel15
->
coreset
.
rb_offset
;
dci
->
payloadSize
=
dci_length
;
dci
->
payloadSize
=
dci_length
;
memcpy
(
dci
->
payloadBits
,
dci_estimation
,
(
dci_length
+
7
)
/
8
);
memcpy
(
dci
->
payloadBits
,
dci_estimation
,
(
dci_length
+
7
)
/
8
);
dci_ind
->
number_of_dcis
++
;
dci_ind
->
number_of_dcis
++
;
...
...
openair2/LAYER2/NR_MAC_UE/nr_ue_dci_configuration.c
View file @
74690ceb
...
@@ -122,9 +122,18 @@ static void config_dci_pdu(NR_UE_MAC_INST_t *mac,
...
@@ -122,9 +122,18 @@ static void config_dci_pdu(NR_UE_MAC_INST_t *mac,
if
(
coreset_id
>
0
)
{
if
(
coreset_id
>
0
)
{
coreset
=
ue_get_coreset
(
pdcch_config
,
coreset_id
);
coreset
=
ue_get_coreset
(
pdcch_config
,
coreset_id
);
rel15
->
coreset
.
CoreSetType
=
NFAPI_NR_CSET_CONFIG_PDCCH_CONFIG
;
rel15
->
coreset
.
CoreSetType
=
NFAPI_NR_CSET_CONFIG_PDCCH_CONFIG
;
if
(
coreset
->
ext1
&&
coreset
->
ext1
->
rb_Offset_r16
)
rel15
->
coreset
.
rb_offset
=
*
coreset
->
ext1
->
rb_Offset_r16
;
else
{
// first common RB of the first group of 6 PRBs has common RB index equal to
// 6 * ⌈BWP_start / 6⌉ if rb-Offset is not provided
int
start_common
=
(
current_DL_BWP
->
BWPStart
+
5
)
/
6
*
6
;
rel15
->
coreset
.
rb_offset
=
start_common
-
current_DL_BWP
->
BWPStart
;
}
}
else
{
}
else
{
coreset
=
mac
->
coreset0
;
coreset
=
mac
->
coreset0
;
rel15
->
coreset
.
CoreSetType
=
NFAPI_NR_CSET_CONFIG_MIB_SIB1
;
rel15
->
coreset
.
CoreSetType
=
NFAPI_NR_CSET_CONFIG_MIB_SIB1
;
rel15
->
coreset
.
rb_offset
=
0
;
}
}
rel15
->
coreset
.
duration
=
coreset
->
duration
;
rel15
->
coreset
.
duration
=
coreset
->
duration
;
...
...
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