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OpenXG
OpenXG-RAN
Commits
83367ee7
Commit
83367ee7
authored
Nov 15, 2024
by
Teodora
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Add 2x2 100MHz VVDN config file
parent
cd259132
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targets/PROJECTS/GENERIC-NR-5GC/CONF/gnb.sa.band77.273prb.fhi72.2x2-vvdn.conf
...ERIC-NR-5GC/CONF/gnb.sa.band77.273prb.fhi72.2x2-vvdn.conf
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targets/PROJECTS/GENERIC-NR-5GC/CONF/gnb.sa.band77.273prb.fhi72.2x2-vvdn.conf
0 → 100644
View file @
83367ee7
Active_gNBs
= (
"gNB-OAI"
);
# Asn1_verbosity, choice in: none, info, annoying
Asn1_verbosity
=
"none"
;
gNBs
=
(
{
//////////
Identification
parameters
:
gNB_ID
=
0
xe00
;
gNB_name
=
"gNB-OAI"
;
//
Tracking
area
code
,
0
x0000
and
0
xfffe
are
reserved
values
tracking_area_code
=
1
;
plmn_list
= ({
mcc
=
208
;
mnc
=
99
;
mnc_length
=
2
;
snssaiList
= ( {
sst
=
1
; }); });
nr_cellid
=
1
;
//////////
Physical
parameters
:
pdsch_AntennaPorts_XP
=
2
;
pusch_AntennaPorts
=
2
;
do_CSIRS
=
1
;
do_SRS
=
0
;
sib1_tda
=
15
;
pdcch_ConfigSIB1
= (
{
controlResourceSetZero
=
11
;
searchSpaceZero
=
0
;
}
);
servingCellConfigCommon
= (
{
#spCellConfigCommon
physCellId
=
0
;
# n_TimingAdvanceOffset = 0;
# downlinkConfigCommon
#frequencyInfoDL
# center frequency = 3999.36 MHz
# selected SSB frequency = 3999.36 MHz
absoluteFrequencySSB
=
666624
;
dl_frequencyBand
=
77
;
# frequency point A = 3950.22 MHz
dl_absoluteFrequencyPointA
=
663348
;
#scs-SpecificCarrierList
dl_offstToCarrier
=
0
;
# subcarrierSpacing
# 0=kHz15, 1=kHz30, 2=kHz60, 3=kHz120
dl_subcarrierSpacing
=
1
;
dl_carrierBandwidth
=
273
;
#initialDownlinkBWP
#genericParameters
initialDLBWPlocationAndBandwidth
=
1099
;
#38.101-1 Table 5.3.2-1
#
# subcarrierSpacing
# 0=kHz15, 1=kHz30, 2=kHz60, 3=kHz120
initialDLBWPsubcarrierSpacing
=
1
;
#pdcch-ConfigCommon
initialDLBWPcontrolResourceSetZero
=
11
;
initialDLBWPsearchSpaceZero
=
0
;
#uplinkConfigCommon
#frequencyInfoUL
ul_frequencyBand
=
77
;
#scs-SpecificCarrierList
ul_offstToCarrier
=
0
;
# subcarrierSpacing
# 0=kHz15, 1=kHz30, 2=kHz60, 3=kHz120
ul_subcarrierSpacing
=
1
;
ul_carrierBandwidth
=
273
;
pMax
=
23
;
#initialUplinkBWP
#genericParameters
initialULBWPlocationAndBandwidth
=
1099
;
# subcarrierSpacing
# 0=kHz15, 1=kHz30, 2=kHz60, 3=kHz120
initialULBWPsubcarrierSpacing
=
1
;
#rach-ConfigCommon
#rach-ConfigGeneric
prach_ConfigurationIndex
=
159
;
#prach_msg1_FDM
#0 = one, 1=two, 2=four, 3=eight
prach_msg1_FDM
=
0
;
prach_msg1_FrequencyStart
=
0
;
zeroCorrelationZoneConfig
=
0
;
preambleReceivedTargetPower
= -
100
;
#preamblTransMax (0...10) = (3,4,5,6,7,8,10,20,50,100,200)
preambleTransMax
=
7
;
#powerRampingStep
# 0=dB0,1=dB2,2=dB4,3=dB6
powerRampingStep
=
2
;
#ra_ReponseWindow
#1,2,4,8,10,20,40,80
ra_ResponseWindow
=
5
;
#ssb_perRACH_OccasionAndCB_PreamblesPerSSB_PR
#1=oneeighth,2=onefourth,3=half,4=one,5=two,6=four,7=eight,8=sixteen
ssb_perRACH_OccasionAndCB_PreamblesPerSSB_PR
=
3
;
#oneHalf (0..15) 4,8,12,16,...60,64
ssb_perRACH_OccasionAndCB_PreamblesPerSSB
=
15
;
#ra_ContentionResolutionTimer
#(0..7) 8,16,24,32,40,48,56,64
ra_ContentionResolutionTimer
=
7
;
rsrp_ThresholdSSB
=
19
;
#prach-RootSequenceIndex_PR
#1 = 839, 2 = 139
prach_RootSequenceIndex_PR
=
2
;
prach_RootSequenceIndex
=
1
;
# SCS for msg1, can only be 15 for 30 kHz < 6 GHz, takes precendence over the one derived from prach-ConfigIndex
#
msg1_SubcarrierSpacing
=
1
,
# restrictedSetConfig
# 0=unrestricted, 1=restricted type A, 2=restricted type B
restrictedSetConfig
=
0
,
# this is the offset between the last PRACH preamble power and the Msg3 PUSCH, 2 times the field value in dB
msg3_DeltaPreamble
=
2
;
p0_NominalWithGrant
= -
100
;
# pucch-ConfigCommon setup :
# pucchGroupHopping
# 0 = neither, 1= group hopping, 2=sequence hopping
pucchGroupHopping
=
0
;
hoppingId
=
0
;
p0_nominal
= -
96
;
ssb_PositionsInBurst_Bitmap
=
0
x1
;
# ssb_periodicityServingCell
# 0 = ms5, 1=ms10, 2=ms20, 3=ms40, 4=ms80, 5=ms160, 6=spare2, 7=spare1
ssb_periodicityServingCell
=
2
;
# dmrs_TypeA_position
# 0 = pos2, 1 = pos3
dmrs_TypeA_Position
=
0
;
# subcarrierSpacing
# 0=kHz15, 1=kHz30, 2=kHz60, 3=kHz120
subcarrierSpacing
=
1
;
#tdd-UL-DL-ConfigurationCommon
# subcarrierSpacing
# 0=kHz15, 1=kHz30, 2=kHz60, 3=kHz120
referenceSubcarrierSpacing
=
1
;
# pattern1
# dl_UL_TransmissionPeriodicity
# 0=ms0p5, 1=ms0p625, 2=ms1, 3=ms1p25, 4=ms2, 5=ms2p5, 6=ms5, 7=ms10
dl_UL_TransmissionPeriodicity
=
5
;
nrofDownlinkSlots
=
3
;
nrofDownlinkSymbols
=
6
;
nrofUplinkSlots
=
1
;
nrofUplinkSymbols
=
4
;
ssPBCH_BlockPower
=
0
;
}
);
# ------- SCTP definitions
SCTP
:
{
# Number of streams to use in input/output
SCTP_INSTREAMS
=
2
;
SCTP_OUTSTREAMS
=
2
;
};
//////////
AMF
parameters
:
amf_ip_address
= ({
ipv4
=
"172.21.6.5"
; });
NETWORK_INTERFACES
:
{
GNB_IPV4_ADDRESS_FOR_NG_AMF
=
"172.21.16.51"
;
GNB_IPV4_ADDRESS_FOR_NGU
=
"172.21.16.51"
;
GNB_PORT_FOR_S1U
=
2152
;
# Spec 2152
};
}
);
MACRLCs
= (
{
num_cc
=
1
;
tr_s_preference
=
"local_L1"
;
tr_n_preference
=
"local_RRC"
;
pusch_TargetSNRx10
=
180
;
pucch_TargetSNRx10
=
250
;
# dl_bler_target_upper = .35;
# dl_bler_target_lower = .15;
ul_bler_target_upper
= .
35
;
ul_bler_target_lower
= .
15
;
pusch_FailureThres
=
100
;
}
);
L1s
= (
{
num_cc
=
1
;
tr_n_preference
=
"local_mac"
;
prach_dtx_threshold
=
130
pucch0_dtx_threshold
=
80
;
pusch_dtx_threshold
= -
100
;
# thread_pool_size = 8;
tx_amp_backoff_dB
=
3
;
L1_rx_thread_core
=
8
;
L1_tx_thread_core
=
10
;
phase_compensation
=
0
;
# needs to match O-RU configuration
}
);
RUs
= (
{
local_rf
=
"no"
;
nb_tx
=
2
;
nb_rx
=
2
;
att_tx
=
0
;
att_rx
=
0
;
bands
= [
77
];
max_pdschReferenceSignalPower
= -
27
;
max_rxgain
=
75
;
sf_extension
=
0
;
eNB_instances
= [
0
];
ru_thread_core
=
9
;
sl_ahead
=
5
;
tr_preference
=
"raw_if4p5"
;
# important: activate FHI7.2
do_precoding
=
0
;
# needs to match O-RU configuration
}
);
security
= {
# preferred ciphering algorithms
# the first one of the list that an UE supports in chosen
# valid values: nea0, nea1, nea2, nea3
ciphering_algorithms
= (
"nea0"
);
# preferred integrity algorithms
# the first one of the list that an UE supports in chosen
# valid values: nia0, nia1, nia2, nia3
integrity_algorithms
= (
"nia2"
,
"nia0"
);
# setting 'drb_ciphering' to "no" disables ciphering for DRBs, no matter
# what 'ciphering_algorithms' configures; same thing for 'drb_integrity'
drb_ciphering
=
"yes"
;
drb_integrity
=
"no"
;
};
log_config
:
{
global_log_level
=
"info"
;
hw_log_level
=
"info"
;
phy_log_level
=
"info"
;
mac_log_level
=
"info"
;
rlc_log_level
=
"info"
;
pdcp_log_level
=
"info"
;
rrc_log_level
=
"info"
;
ngap_log_level
=
"info"
;
f1ap_log_level
=
"info"
;
};
fhi_72
= {
dpdk_devices
= (
"0000:c1:11.0"
,
"0000:c1:11.1"
);
# one VF can be used as well
system_core
=
0
;
io_core
=
1
;
worker_cores
= (
2
);
ru_addr
= (
"98:ae:71:01:c5:eb"
,
"98:ae:71:01:c5:eb"
);
mtu
=
9600
;
fh_config
= ({
Tadv_cp_dl
=
125
;
T2a_cp_dl
= (
285
,
429
);
T2a_cp_ul
= (
285
,
429
);
T2a_up
= (
125
,
428
);
Ta3
= (
130
,
170
);
T1a_cp_dl
= (
285
,
470
);
T1a_cp_ul
= (
285
,
429
);
T1a_up
= (
125
,
350
);
Ta4
= (
110
,
180
);
ru_config
= {
iq_width
=
16
;
iq_width_prach
=
16
;
};
});
};
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