Commit 96554bef authored by luis_pereira87's avatar luis_pereira87

Merge remote-tracking branch 'origin/develop' into ue-phy-sync-improvements

# Conflicts:
#	openair1/PHY/NR_UE_TRANSPORT/nr_dlsch_demodulation.c
#	openair1/SCHED_NR_UE/phy_procedures_nr_ue.c
parents 22754562 264e8299
......@@ -88,7 +88,15 @@ pipeline {
// booleanParam(name: 'eNB_mergeRequest', value: Boolean.valueOf(ALLOW_MERGE))
//]
//calling OAIUE N310
build job: "RAN-SA-OAIUE-N310-CN5G", wait : true, propagate : false, parameters: [
//build job: "RAN-SA-OAIUE-N310-CN5G", wait : true, propagate : false, parameters: [
// string(name: 'eNB_MR', value: String.valueOf(MR)),
// string(name: 'eNB_Branch', value: String.valueOf(SRC_BRANCH)),
// string(name: 'eNB_CommitID', value: String.valueOf(COMMIT_ID)),
// string(name: 'eNB_TargetBranch', value: String.valueOf(TARGET_BRANCH)),
// booleanParam(name: 'eNB_mergeRequest', value: Boolean.valueOf(ALLOW_MERGE))
//]
//calling OAIUE N310-X300
build job: "RAN-SA-OAIUE-N310-X300-CN5G", wait : true, propagate : false, parameters: [
string(name: 'eNB_MR', value: String.valueOf(MR)),
string(name: 'eNB_Branch', value: String.valueOf(SRC_BRANCH)),
string(name: 'eNB_CommitID', value: String.valueOf(COMMIT_ID)),
......@@ -96,7 +104,6 @@ pipeline {
booleanParam(name: 'eNB_mergeRequest', value: Boolean.valueOf(ALLOW_MERGE))
]
}
}
}
......
......@@ -77,7 +77,7 @@ then
IS_NFAPI=`echo $FILE | egrep -c "nfapi/open-nFAPI|nfapi/oai_integration/vendor_ext" || true`
IS_OAI_LICENCE_PRESENT=`egrep -c "OAI Public License" $FILE || true`
IS_BSD_LICENCE_PRESENT=`egrep -c "the terms of the BSD Licence|License-Identifier: BSD-2-Clause" $FILE || true`
IS_EXCEPTION=`echo $FILE | egrep -c "common/utils/collection/tree.h|common/utils/collection/queue.h|common/utils/itti_analyzer/common/queue.h|openair3/UTILS/tree.h|openair3/UTILS/queue.h|openair3/GTPV1-U/nw-gtpv1u|openair2/UTIL/OPT/ws_|openair2/UTIL/OPT/packet-rohc.h|openair3/NAS/COMMON/milenage.h" || true`
IS_EXCEPTION=`echo $FILE | egrep -c "common/utils/collection/tree.h|common/utils/collection/queue.h|common/utils/itti_analyzer/common/queue.h|openair3/UTILS/tree.h|openair3/UTILS/queue.h|openair3/GTPV1-U/nw-gtpv1u|openair2/UTIL/OPT/ws_|openair2/UTIL/OPT/packet-rohc.h|openair3/NAS/COMMON/milenage.h|openair1/PHY/CODING/crc|openair1/PHY/CODING/types.h" || true`
if [ $IS_OAI_LICENCE_PRESENT -eq 0 ] && [ $IS_BSD_LICENCE_PRESENT -eq 0 ]
then
if [ $IS_NFAPI -eq 0 ] && [ $IS_EXCEPTION -eq 0 ]
......@@ -198,7 +198,7 @@ do
IS_NFAPI=`echo $FULLFILE | egrep -c "nfapi/open-nFAPI|nfapi/oai_integration/vendor_ext" || true`
IS_OAI_LICENCE_PRESENT=`egrep -c "OAI Public License" $FULLFILE || true`
IS_BSD_LICENCE_PRESENT=`egrep -c "the terms of the BSD Licence|License-Identifier: BSD-2-Clause" $FULLFILE || true`
IS_EXCEPTION=`echo $FULLFILE | egrep -c "common/utils/collection/tree.h|common/utils/collection/queue.h|common/utils/itti_analyzer/common/queue.h|openair3/UTILS/tree.h|openair3/UTILS/queue.h|openair3/GTPV1-U/nw-gtpv1u|openair2/UTIL/OPT/ws_|openair2/UTIL/OPT/packet-rohc.h|openair3/NAS/COMMON/milenage.h" || true`
IS_EXCEPTION=`echo $FULLFILE | egrep -c "common/utils/collection/tree.h|common/utils/collection/queue.h|common/utils/itti_analyzer/common/queue.h|openair3/UTILS/tree.h|openair3/UTILS/queue.h|openair3/GTPV1-U/nw-gtpv1u|openair2/UTIL/OPT/ws_|openair2/UTIL/OPT/packet-rohc.h|openair3/NAS/COMMON/milenage.h|openair1/PHY/CODING/crc|openair1/PHY/CODING/types.h" || true`
if [ $IS_OAI_LICENCE_PRESENT -eq 0 ] && [ $IS_BSD_LICENCE_PRESENT -eq 0 ]
then
if [ $IS_NFAPI -eq 0 ] && [ $IS_EXCEPTION -eq 0 ]
......
......@@ -54,15 +54,6 @@ gNBs =
#pdcch-ConfigCommon
initialDLBWPcontrolResourceSetZero = 0;
initialDLBWPsearchSpaceZero = 0;
#pdsch-ConfigCommon
#pdschTimeDomainAllocationList (up to 16 entries)
initialDLBWPk0_0 = 0; #for DL slot
initialDLBWPmappingType_0 = 0; #0=typeA,1=typeB
initialDLBWPstartSymbolAndLength_0 = 40; #this is SS=1,L=13
initialDLBWPk0_1 = 0; #for mixed slot
initialDLBWPmappingType_1 = 0;
initialDLBWPstartSymbolAndLength_1 = 57; #this is SS=1,L=5
#uplinkConfigCommon
#frequencyInfoUL
......@@ -119,19 +110,6 @@ gNBs =
# restrictedSetConfig
# 0=unrestricted, 1=restricted type A, 2=restricted type B
restrictedSetConfig = 0,
# pusch-ConfigCommon (up to 16 elements)
initialULBWPk2_0 = 2; # used for UL slot
initialULBWPmappingType_0 = 1
initialULBWPstartSymbolAndLength_0 = 55; # this is SS=0 L=12
initialULBWPk2_1 = 2; # used for mixed slot
initialULBWPmappingType_1 = 1;
initialULBWPstartSymbolAndLength_1 = 69; # this is SS=10 L=2
initialULBWPk2_2 = 7; # used for Msg.3 during RA
initialULBWPmappingType_2 = 1;
initialULBWPstartSymbolAndLength_2 = 52; # this is SS=10 L=4
msg3_DeltaPreamble = 1;
#p0_NominalWithGrant =-90;
......
......@@ -237,7 +237,7 @@ RUs = (
max_pdschReferenceSignalPower = -27;
max_rxgain = 75;
eNB_instances = [0];
sdr_addrs = "mgmt_addr=192.168.18.241,addr=192.168.20.2,second_addr=192.168.10.2";
sdr_addrs = "mgmt_addr=192.168.18.241,addr=192.168.10.2";
}
);
......
......@@ -237,7 +237,7 @@ RUs = (
max_pdschReferenceSignalPower = -27;
max_rxgain = 75;
eNB_instances = [0];
sdr_addrs = "mgmt_addr=192.168.18.241,addr=192.168.20.2,second_addr=192.168.10.2";
sdr_addrs = "mgmt_addr=192.168.18.241,addr=192.168.10.2";
}
);
......
......@@ -89,19 +89,6 @@ gNBs =
#pdcch-ConfigCommon
initialDLBWPcontrolResourceSetZero = 11;
initialDLBWPsearchSpaceZero = 0;
#pdsch-ConfigCommon
#pdschTimeDomainAllocationList (up to 16 entries)
initialDLBWPk0_0 = 0;
#initialULBWPmappingType
#0=typeA,1=typeB
initialDLBWPmappingType_0 = 0;
#this is SS=1,L=13
initialDLBWPstartSymbolAndLength_0 = 40;
initialDLBWPk0_1 = 0;
initialDLBWPmappingType_1 = 0;
#this is SS=1,L=5
initialDLBWPstartSymbolAndLength_1 = 57;
#uplinkConfigCommon
#frequencyInfoUL
......@@ -156,22 +143,6 @@ gNBs =
# 0=unrestricted, 1=restricted type A, 2=restricted type B
restrictedSetConfig = 0,
# pusch-ConfigCommon (up to 16 elements)
initialULBWPk2_0 = 2;
initialULBWPmappingType_0 = 1
# this is SS=2 L=13
initialULBWPstartSymbolAndLength_0 = 41;
initialULBWPk2_1 = 2;
initialULBWPmappingType_1 = 1;
# this is SS=0 L=4
initialULBWPstartSymbolAndLength_1 = 52;
initialULBWPk2_2 = 7;
initialULBWPmappingType_2 = 1;
# this is SS=10 L=4
initialULBWPstartSymbolAndLength_2 = 52;
msg3_DeltaPreamble = 1;
p0_NominalWithGrant =-90;
......
......@@ -86,19 +86,6 @@ gNBs =
#pdcch-ConfigCommon
initialDLBWPcontrolResourceSetZero = 10;
initialDLBWPsearchSpaceZero = 0;
#pdsch-ConfigCommon
#pdschTimeDomainAllocationList (up to 16 entries)
initialDLBWPk0_0 = 0;
#initialULBWPmappingType
#0=typeA,1=typeB
initialDLBWPmappingType_0 = 0;
#this is SS=1,L=13
initialDLBWPstartSymbolAndLength_0 = 40;
initialDLBWPk0_1 = 0;
initialDLBWPmappingType_1 = 0;
#this is SS=1,L=5
initialDLBWPstartSymbolAndLength_1 = 57;
#uplinkConfigCommon
#frequencyInfoUL
......@@ -153,22 +140,6 @@ gNBs =
# 0=unrestricted, 1=restricted type A, 2=restricted type B
restrictedSetConfig = 0,
# pusch-ConfigCommon (up to 16 elements)
initialULBWPk2_0 = 6;
initialULBWPmappingType_0 = 1
# this is SS=2 L=13
initialULBWPstartSymbolAndLength_0 = 41;
initialULBWPk2_1 = 6;
initialULBWPmappingType_1 = 1;
# this is SS=0 L=4
initialULBWPstartSymbolAndLength_1 = 52;
initialULBWPk2_2 = 7;
initialULBWPmappingType_2 = 1;
# this is SS=10 L=4
initialULBWPstartSymbolAndLength_2 = 52;
msg3_DeltaPreamble = 1;
p0_NominalWithGrant =-90;
......
......@@ -24,7 +24,7 @@ gNBs =
ssb_SubcarrierOffset = 0;
pdsch_AntennaPorts = 1;
pusch_AntennaPorts = 1;
min_rxtxtime_pdsch = 6;
min_rxtxtime = 6;
servingCellConfigCommon = (
{
......@@ -55,15 +55,6 @@ gNBs =
#pdcch-ConfigCommon
initialDLBWPcontrolResourceSetZero = 12;
initialDLBWPsearchSpaceZero = 0;
#pdsch-ConfigCommon
#pdschTimeDomainAllocationList (up to 16 entries)
initialDLBWPk0_0 = 0; #for DL slot
initialDLBWPmappingType_0 = 0; #0=typeA,1=typeB
initialDLBWPstartSymbolAndLength_0 = 40; #this is SS=1,L=13
initialDLBWPk0_3 = 0; #for mixed slot
initialDLBWPmappingType_3 = 0;
initialDLBWPstartSymbolAndLength_3 = 57; #this is SS=1,L=5
#uplinkConfigCommon
#frequencyInfoUL
......@@ -118,21 +109,6 @@ gNBs =
# restrictedSetConfig
# 0=unrestricted, 1=restricted type A, 2=restricted type B
restrictedSetConfig = 0,
# pusch-ConfigCommon (up to 16 elements)
initialULBWPk2_0 = 6;
initialULBWPmappingType_0 = 1
# this is SS=0 L=11
initialULBWPstartSymbolAndLength_0 = 41;
initialULBWPk2_1 = 6;
initialULBWPmappingType_1 = 1;
# this is SS=0 L=12
initialULBWPstartSymbolAndLength_1 = 69;
initialULBWPk2_2 = 14;
initialULBWPmappingType_2 = 1;
# this is SS=10 L=4
initialULBWPstartSymbolAndLength_2 = 52;
msg3_DeltaPreamble = 1;
p0_NominalWithGrant =-90;
......
......@@ -24,6 +24,7 @@ gNBs =
ssb_SubcarrierOffset = 0;
pdsch_AntennaPorts = 1;
pusch_AntennaPorts = 1;
min_rxtxtime = 6;
servingCellConfigCommon = (
{
......@@ -54,15 +55,6 @@ gNBs =
#pdcch-ConfigCommon
initialDLBWPcontrolResourceSetZero = 12;
initialDLBWPsearchSpaceZero = 0;
#pdsch-ConfigCommon
#pdschTimeDomainAllocationList (up to 16 entries)
initialDLBWPk0_0 = 0; #for DL slot
initialDLBWPmappingType_0 = 0; #0=typeA,1=typeB
initialDLBWPstartSymbolAndLength_0 = 40; #this is SS=1,L=13
initialDLBWPk0_3 = 0; #for mixed slot
initialDLBWPmappingType_3 = 0;
initialDLBWPstartSymbolAndLength_3 = 57; #this is SS=1,L=5
#uplinkConfigCommon
#frequencyInfoUL
......@@ -118,18 +110,6 @@ gNBs =
# restrictedSetConfig
# 0=unrestricted, 1=restricted type A, 2=restricted type B
restrictedSetConfig = 0,
# pusch-ConfigCommon (up to 16 elements)
initialULBWPk2_0 = 6; # used for UL slot
initialULBWPmappingType_0 = 1
initialULBWPstartSymbolAndLength_0 = 41; # this is SS=0 L=13
initialULBWPk2_1 = 6; # used for mixed slot
initialULBWPmappingType_1 = 1;
initialULBWPstartSymbolAndLength_1 = 69; # this is SS=10 L=2
initialULBWPk2_2 = 7; # used for Msg.3 during RA
initialULBWPmappingType_2 = 1;
initialULBWPstartSymbolAndLength_2 = 52; # this is SS=10 L=4
msg3_DeltaPreamble = 1;
p0_NominalWithGrant =-90;
......
......@@ -55,15 +55,6 @@ gNBs =
#pdcch-ConfigCommon
initialDLBWPcontrolResourceSetZero = 0;
initialDLBWPsearchSpaceZero = 0;
#pdsch-ConfigCommon
#pdschTimeDomainAllocationList (up to 16 entries)
initialDLBWPk0_0 = 0; #for DL slot
initialDLBWPmappingType_0 = 0; #0=typeA,1=typeB
initialDLBWPstartSymbolAndLength_0 = 40; #this is SS=1,L=13
initialDLBWPk0_1 = 0; #for mixed slot
initialDLBWPmappingType_1 = 0;
initialDLBWPstartSymbolAndLength_1 = 57; #this is SS=1,L=5
#uplinkConfigCommon
#frequencyInfoUL
......@@ -118,18 +109,6 @@ gNBs =
# restrictedSetConfig
# 0=unrestricted, 1=restricted type A, 2=restricted type B
restrictedSetConfig = 0,
# pusch-ConfigCommon (up to 16 elements)
initialULBWPk2_0 = 2; # used for UL slot
initialULBWPmappingType_0 = 1
initialULBWPstartSymbolAndLength_0 = 41; # this is SS=0 L=13
initialULBWPk2_1 = 2; # used for mixed slot
initialULBWPmappingType_1 = 1;
initialULBWPstartSymbolAndLength_1 = 24; # this is SS=10 L=2
initialULBWPk2_2 = 7; # used for Msg.3 during RA
initialULBWPmappingType_2 = 1;
initialULBWPstartSymbolAndLength_2 = 52; # this is SS=10 L=4
msg3_DeltaPreamble = 1;
p0_NominalWithGrant =-90;
......
......@@ -90,19 +90,6 @@ gNBs =
#pdcch-ConfigCommon
initialDLBWPcontrolResourceSetZero = 11;
initialDLBWPsearchSpaceZero = 0;
#pdsch-ConfigCommon
#pdschTimeDomainAllocationList (up to 16 entries)
initialDLBWPk0_0 = 0;
#initialULBWPmappingType
#0=typeA,1=typeB
initialDLBWPmappingType_0 = 0;
#this is SS=1,L=13
initialDLBWPstartSymbolAndLength_0 = 40;
initialDLBWPk0_1 = 0;
initialDLBWPmappingType_1 = 0;
#this is SS=1,L=5
initialDLBWPstartSymbolAndLength_1 = 57;
#uplinkConfigCommon
#frequencyInfoUL
......@@ -157,22 +144,6 @@ gNBs =
# 0=unrestricted, 1=restricted type A, 2=restricted type B
restrictedSetConfig = 0,
# pusch-ConfigCommon (up to 16 elements)
initialULBWPk2_0 = 6;
initialULBWPmappingType_0 = 1
# this is SS=2 L=13
initialULBWPstartSymbolAndLength_0 = 41;
initialULBWPk2_1 = 6;
initialULBWPmappingType_1 = 1;
# this is SS=0 L=4
initialULBWPstartSymbolAndLength_1 = 52;
initialULBWPk2_2 = 7;
initialULBWPmappingType_2 = 1;
# this is SS=10 L=4
initialULBWPstartSymbolAndLength_2 = 52;
msg3_DeltaPreamble = 1;
p0_NominalWithGrant =-90;
......
This diff is collapsed.
......@@ -24,7 +24,7 @@ gNBs =
ssb_SubcarrierOffset = 0;
pdsch_AntennaPorts = 1;
pusch_AntennaPorts = 1;
min_rxtxtime_pdsch = 6;
min_rxtxtime = 6;
servingCellConfigCommon = (
{
......@@ -55,15 +55,6 @@ gNBs =
#pdcch-ConfigCommon
initialDLBWPcontrolResourceSetZero = 12;
initialDLBWPsearchSpaceZero = 0;
#pdsch-ConfigCommon
#pdschTimeDomainAllocationList (up to 16 entries)
initialDLBWPk0_0 = 0; #for DL slot
initialDLBWPmappingType_0 = 0; #0=typeA,1=typeB
initialDLBWPstartSymbolAndLength_0 = 40; #this is SS=1,L=13
initialDLBWPk0_1 = 0; #for mixed slot
initialDLBWPmappingType_1 = 0;
initialDLBWPstartSymbolAndLength_1 = 57; #this is SS=1,L=5
#uplinkConfigCommon
#frequencyInfoUL
......@@ -118,19 +109,6 @@ gNBs =
# 0=unrestricted, 1=restricted type A, 2=restricted type B
restrictedSetConfig = 0,
# pusch-ConfigCommon (up to 16 elements)
initialULBWPk2_0 = 6; # used for UL slot
initialULBWPmappingType_0 = 1
initialULBWPstartSymbolAndLength_0 = 41; # this is SS=0 L=13
initialULBWPk2_1 = 6; # used for mixed slot
initialULBWPmappingType_1 = 1;
initialULBWPstartSymbolAndLength_1 = 38; # this is SS=10 L=3
initialULBWPk2_2 = 7; # used for Msg.3 during RA
initialULBWPmappingType_2 = 1;
initialULBWPstartSymbolAndLength_2 = 52; # this is SS=10 L=4
msg3_DeltaPreamble = 1;
p0_NominalWithGrant =-90;
......
......@@ -52,15 +52,6 @@ gNBs =
#pdcch-ConfigCommon
initialDLBWPcontrolResourceSetZero = 0;
initialDLBWPsearchSpaceZero = 0;
#pdsch-ConfigCommon
#pdschTimeDomainAllocationList (up to 16 entries)
initialDLBWPk0_0 = 0; #for DL slot
initialDLBWPmappingType_0 = 0; #0=typeA,1=typeB
initialDLBWPstartSymbolAndLength_0 = 40; #this is SS=1,L=13
initialDLBWPk0_1 = 0; #for mixed slot
initialDLBWPmappingType_1 = 0;
initialDLBWPstartSymbolAndLength_1 = 57; #this is SS=1,L=5
#uplinkConfigCommon
#frequencyInfoUL
......@@ -115,18 +106,6 @@ gNBs =
# restrictedSetConfig
# 0=unrestricted, 1=restricted type A, 2=restricted type B
restrictedSetConfig = 0,
# pusch-ConfigCommon (up to 16 elements)
initialULBWPk2_0 = 6; # used for UL slot
initialULBWPmappingType_0 = 1
initialULBWPstartSymbolAndLength_0 = 41; # this is SS=0 L=13
initialULBWPk2_1 = 6; # used for mixed slot
initialULBWPmappingType_1 = 1;
initialULBWPstartSymbolAndLength_1 = 52; # this is SS=10 L=4
initialULBWPk2_2 = 7; # used for Msg.3 during RA
initialULBWPmappingType_2 = 1;
initialULBWPstartSymbolAndLength_2 = 52; # this is SS=10 L=4
msg3_DeltaPreamble = 1;
p0_NominalWithGrant =-90;
......
......@@ -53,19 +53,6 @@ gNBs =
#pdcch-ConfigCommon
initialDLBWPcontrolResourceSetZero = 0;
initialDLBWPsearchSpaceZero = 0;
#pdsch-ConfigCommon
#pdschTimeDomainAllocationList (up to 16 entries)
initialDLBWPk0_0 = 0;
#initialULBWPmappingType
#0=typeA,1=typeB
initialDLBWPmappingType_0 = 0;#for DL slot
#this is SS=1,L=13
initialDLBWPstartSymbolAndLength_0 = 40;
initialDLBWPk0_1 = 0;#for mixed slot
initialDLBWPmappingType_1 = 0;
#this is SS=1,L=5
initialDLBWPstartSymbolAndLength_1 = 57;
#uplinkConfigCommon
#frequencyInfoUL
......@@ -120,21 +107,6 @@ gNBs =
# restrictedSetConfig
# 0=unrestricted, 1=restricted type A, 2=restricted type B
restrictedSetConfig = 0,
# pusch-ConfigCommon (up to 16 elements)
initialULBWPk2_0 = 2;
initialULBWPmappingType_0 = 1
# this is SS=0 L=11
initialULBWPstartSymbolAndLength_0 = 41;
initialULBWPk2_1 = 2;
initialULBWPmappingType_1 = 1;
# this is SS=0 L=12
initialULBWPstartSymbolAndLength_1 = 69;
initialULBWPk2_2 = 7;
initialULBWPmappingType_2 = 1;
# this is SS=10 L=4
initialULBWPstartSymbolAndLength_2 = 52;
msg3_DeltaPreamble = 1;
p0_NominalWithGrant =-90;
......
......@@ -24,7 +24,7 @@
<htmlTabRef>TEST-NSA-FR1-TM2-Tab1</htmlTabRef>
<htmlTabName>NSA 2x2 Ping DL UL with QUECTEL</htmlTabName>
<htmlTabIcon>tasks</htmlTabIcon>
<repeatCount>5</repeatCount>
<repeatCount>1</repeatCount>
<TestCaseRequestedList>
030000
040000
......
......@@ -24,7 +24,7 @@
<htmlTabRef>TEST-NSA-FR1-TM2-Tab2</htmlTabRef>
<htmlTabName>NSA 2x2 Attach-Detach with QUECTEL</htmlTabName>
<htmlTabIcon>tasks</htmlTabIcon>
<repeatCount>5</repeatCount>
<repeatCount>1</repeatCount>
<TestCaseRequestedList>
031000
041000
......
......@@ -22,7 +22,7 @@
-->
<testCaseList>
<htmlTabRef>TEST-SA-FR1-Tab1</htmlTabRef>
<htmlTabName>SA Ping DL UL with OAI NR UE</htmlTabName>
<htmlTabName>SA Ping DL UL with OAI NR UE (N310)</htmlTabName>
<htmlTabIcon>tasks</htmlTabIcon>
<repeatCount>1</repeatCount>
<TestCaseRequestedList>
......@@ -40,9 +40,9 @@
<testCase id="010000">
<class>Initialize_OAI_UE</class>
<desc>Initialize OAI UE</desc>
<desc>Initialize OAI UE (N310)</desc>
<air_interface>nr</air_interface>
<Initialize_OAI_UE_args>--sa -O ../../../ci-scripts/conf_files/ue.sa.conf --usrp-args "mgmt_addr=192.168.18.241,addr=192.168.20.2,second_addr=192.168.10.2" --numerology 1 -r 106 --band 78 -C 3319680000 --nokrnmod 1 --ue-txgain 0 --ue-rxgain 70 --ue-fo-compensation </Initialize_OAI_UE_args>
<Initialize_OAI_UE_args>--sa -O ../../../ci-scripts/conf_files/ue.sa.conf --usrp-args "mgmt_addr=192.168.18.241,second_addr=192.168.10.2" --numerology 1 -r 106 --band 78 -C 3319680000 --nokrnmod 1 --ue-txgain 0 --ue-rxgain 70 --ue-fo-compensation </Initialize_OAI_UE_args>
</testCase>
<testCase id="010002">
......
<!--
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this work for additional information regarding copyright ownership.
The OpenAirInterface Software Alliance licenses this file to You under
the OAI Public License, Version 1.1 (the "License"); you may not use this file
except in compliance with the License.
You may obtain a copy of the License at
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Unless required by applicable law or agreed to in writing, software
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WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
See the License for the specific language governing permissions and
limitations under the License.
For more information about the OpenAirInterface (OAI) Software Alliance:
contact@openairinterface.org
-->
<testCaseList>
<htmlTabRef>TEST-SA-FR1-Tab2</htmlTabRef>
<htmlTabName>SA Ping DL UL with OAI NR UE (X300)</htmlTabName>
<htmlTabIcon>tasks</htmlTabIcon>
<repeatCount>1</repeatCount>
<TestCaseRequestedList>
040000
000002
010000
000002
050000
050001
000001
010002
080000
</TestCaseRequestedList>
<TestCaseExclusionList></TestCaseExclusionList>
<testCase id="010000">
<class>Initialize_OAI_UE</class>
<desc>Initialize OAI UE (X300)</desc>
<air_interface>nr</air_interface>
<Initialize_OAI_UE_args>--sa -O ../../../ci-scripts/conf_files/ue.sa.conf --usrp-args "addr=192.168.60.2" --numerology 1 -r 106 --band 78 -C 3319680000 --nokrnmod 1 --ue-txgain 0 --ue-rxgain 70 --ue-fo-compensation </Initialize_OAI_UE_args>
</testCase>
<testCase id="010002">
<class>Terminate_OAI_UE</class>
<desc>Terminate OAI UE</desc>
</testCase>
<testCase id="040000">
<class>Initialize_eNB</class>
<desc>Initialize gNB</desc>
<Initialize_eNB_args>-O ci-scripts/conf_files/gnb.band78.sa.fr1.106PRB.usrpn310.conf --sa --usrp-tx-thread-config 1</Initialize_eNB_args>
<eNB_instance>0</eNB_instance>
<eNB_serverId>0</eNB_serverId>
<air_interface>nr</air_interface>
<eNB_Trace>yes</eNB_Trace>
<eNB_Stats>yes</eNB_Stats>
<USRP_IPAddress>192.168.18.240</USRP_IPAddress>
</testCase>
<testCase id="000001">
<class>IdleSleep</class>
<desc>Sleep</desc>
<idle_sleep_time_in_sec>5</idle_sleep_time_in_sec>
</testCase>
<testCase id="000002">
<class>IdleSleep</class>
<desc>Sleep</desc>
<idle_sleep_time_in_sec>20</idle_sleep_time_in_sec>
</testCase>
<testCase id="050000">
<class>Ping</class>
<desc>Ping from CN to UE: 20pings in 20sec</desc>
<ping_args>-c 20</ping_args>
<ping_packetloss_threshold>5</ping_packetloss_threshold>
</testCase>
<testCase id="050001">
<class>Ping</class>
<desc>Ping from CN to UE: 100pings in 20sec</desc>
<ping_args>-c 100 -i 0.2</ping_args>
<ping_packetloss_threshold>5</ping_packetloss_threshold>
</testCase>
<testCase id="070000">
<class>Iperf</class>
<desc>iperf (DL/60Mbps/UDP)(60 sec)(single-ue profile)</desc>
<iperf_args>-u -b 60M -t 60</iperf_args>
<direction>DL</direction>
<id>nrmodule2_quectel</id>
<iperf_packetloss_threshold>5</iperf_packetloss_threshold>
<iperf_profile>single-ue</iperf_profile>
</testCase>
<testCase id="070001">
<class>Iperf</class>
<desc>iperf (UL/3Mbps/UDP)(60 sec)(single-ue profile)</desc>
<iperf_args>-u -b 3M -t 60</iperf_args>
<direction>UL</direction>
<id>nrmodule2_quectel</id>
<iperf_packetloss_threshold>5</iperf_packetloss_threshold>
<iperf_profile>single-ue</iperf_profile>
</testCase>
<testCase id="080000">
<class>Terminate_eNB</class>
<desc>Terminate gNB</desc>
<eNB_instance>0</eNB_instance>
<eNB_serverId>0</eNB_serverId>
<air_interface>nr</air_interface>
</testCase>
</testCaseList>
<!--
Licensed to the OpenAirInterface (OAI) Software Alliance under one or more
contributor license agreements. See the NOTICE file distributed with
this work for additional information regarding copyright ownership.
The OpenAirInterface Software Alliance licenses this file to You under
the OAI Public License, Version 1.1 (the "License"); you may not use this file
except in compliance with the License.
You may obtain a copy of the License at
http://www.openairinterface.org/?page_id=698
Unless required by applicable law or agreed to in writing, software
distributed under the License is distributed on an "AS IS" BASIS,
WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
See the License for the specific language governing permissions and
limitations under the License.
For more information about the OpenAirInterface (OAI) Software Alliance:
contact@openairinterface.org
-->
<testCaseList>
<htmlTabRef>TEST-SA-FR1-Tab3</htmlTabRef>
<htmlTabName>SA Ping DL UL with QUECTEL</htmlTabName>
<htmlTabIcon>tasks</htmlTabIcon>
<repeatCount>1</repeatCount>
<TestCaseRequestedList>
040000
000002
010000
000001
050000
050001
070000
070001
000001
010002
080000
</TestCaseRequestedList>
<TestCaseExclusionList></TestCaseExclusionList>
<testCase id="010000">
<class>Initialize_UE</class>
<desc>Initialize Quectel</desc>
<id>nrmodule2_quectel</id>
<UE_Trace>yes</UE_Trace>
</testCase>
<testCase id="010002">
<class>Terminate_UE</class>
<desc>Terminate Quectel</desc>
<id>nrmodule2_quectel</id>
</testCase>
<testCase id="040000">
<class>Initialize_eNB</class>
<desc>Initialize gNB</desc>
<Initialize_eNB_args>-O ci-scripts/conf_files/gnb.band78.sa.fr1.162PRB.2x2.usrpn310.conf --sa -q --usrp-tx-thread-config 1</Initialize_eNB_args>
<eNB_instance>0</eNB_instance>
<eNB_serverId>0</eNB_serverId>
<air_interface>nr</air_interface>
<eNB_Trace>yes</eNB_Trace>
<eNB_Stats>yes</eNB_Stats>
<USRP_IPAddress>192.168.18.240</USRP_IPAddress>
</testCase>
<testCase id="000001">
<class>IdleSleep</class>
<desc>Sleep</desc>
<idle_sleep_time_in_sec>5</idle_sleep_time_in_sec>
</testCase>
<testCase id="000002">
<class>IdleSleep</class>
<desc>Sleep</desc>
<idle_sleep_time_in_sec>20</idle_sleep_time_in_sec>
</testCase>
<testCase id="050000">
<class>Ping</class>
<desc>Ping: 20pings in 20sec</desc>
<id>nrmodule2_quectel</id>
<ping_args>-c 20</ping_args>
<ping_packetloss_threshold>5</ping_packetloss_threshold>
</testCase>
<testCase id="050001">
<class>Ping</class>
<desc>Ping: 100pings in 20sec</desc>
<id>nrmodule2_quectel</id>
<ping_args>-c 100 -i 0,2</ping_args>
<ping_packetloss_threshold>5</ping_packetloss_threshold>
</testCase>
<testCase id="070000">
<class>Iperf</class>
<desc>iperf (DL/140Mbps/UDP)(60 sec)(single-ue profile)</desc>
<iperf_args>-u -b 140M -t 60</iperf_args>
<direction>DL</direction>
<id>nrmodule2_quectel</id>
<iperf_packetloss_threshold>5</iperf_packetloss_threshold>
<iperf_profile>single-ue</iperf_profile>
</testCase>
<testCase id="070001">
<class>Iperf</class>
<desc>iperf (UL/3Mbps/UDP)(60 sec)(single-ue profile)</desc>
<iperf_args>-u -b 3M -t 60</iperf_args>
<direction>UL</direction>
<id>nrmodule2_quectel</id>
<iperf_packetloss_threshold>5</iperf_packetloss_threshold>
<iperf_profile>single-ue</iperf_profile>
</testCase>
<testCase id="080000">
<class>Terminate_eNB</class>
<desc>Terminate gNB</desc>
<eNB_instance>0</eNB_instance>
<eNB_serverId>0</eNB_serverId>
<air_interface>nr</air_interface>
</testCase>
</testCaseList>
<!--
Licensed to the OpenAirInterface (OAI) Software Alliance under one or more
contributor license agreements. See the NOTICE file distributed with
this work for additional information regarding copyright ownership.
The OpenAirInterface Software Alliance licenses this file to You under
the OAI Public License, Version 1.1 (the "License"); you may not use this file
except in compliance with the License.
You may obtain a copy of the License at
http://www.openairinterface.org/?page_id=698
Unless required by applicable law or agreed to in writing, software
distributed under the License is distributed on an "AS IS" BASIS,
WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
See the License for the specific language governing permissions and
limitations under the License.
For more information about the OpenAirInterface (OAI) Software Alliance:
contact@openairinterface.org
-->
<testCaseList>
<htmlTabRef>TEST-SA-FR1-Tab4</htmlTabRef>
<htmlTabName>SA Staged DL with QUECTEL</htmlTabName>
<htmlTabIcon>tasks</htmlTabIcon>
<repeatCount>1</repeatCount>
<TestCaseRequestedList>
040000
000002
010000
000001
050000
000001
070000
000001
070001
000001
070002
000001
070003
000001
070004
000001
070005
000001
010002
080000
</TestCaseRequestedList>
<TestCaseExclusionList></TestCaseExclusionList>
<testCase id="010000">
<class>Initialize_UE</class>
<desc>Initialize Quectel</desc>
<id>nrmodule2_quectel</id>
<UE_Trace>yes</UE_Trace>
</testCase>
<testCase id="010002">
<class>Terminate_UE</class>
<desc>Terminate Quectel</desc>
<id>nrmodule2_quectel</id>
</testCase>
<testCase id="040000">
<class>Initialize_eNB</class>
<desc>Initialize gNB</desc>
<Initialize_eNB_args>-O ci-scripts/conf_files/gnb.band78.sa.fr1.162PRB.2x2.usrpn310.conf --sa -q --usrp-tx-thread-config 1</Initialize_eNB_args>
<eNB_instance>0</eNB_instance>
<eNB_serverId>0</eNB_serverId>
<air_interface>nr</air_interface>
<eNB_Trace>yes</eNB_Trace>
<eNB_Stats>yes</eNB_Stats>
<USRP_IPAddress>192.168.18.240</USRP_IPAddress>
</testCase>
<testCase id="000001">
<class>IdleSleep</class>
<desc>Sleep</desc>
<idle_sleep_time_in_sec>5</idle_sleep_time_in_sec>
</testCase>
<testCase id="000002">
<class>IdleSleep</class>
<desc>Sleep</desc>
<idle_sleep_time_in_sec>20</idle_sleep_time_in_sec>
</testCase>
<testCase id="050000">
<class>Ping</class>
<desc>Ping: 20pings in 20sec</desc>
<id>nrmodule2_quectel</id>
<ping_args>-c 20</ping_args>
<ping_packetloss_threshold>5</ping_packetloss_threshold>
</testCase>
<testCase id="070000">
<class>Iperf</class>
<desc>iperf (DL/10Mbps/UDP)(30 sec)(single-ue profile)</desc>
<iperf_args>-u -b 10M -t 30</iperf_args>
<direction>DL</direction>
<id>nrmodule2_quectel</id>
<iperf_packetloss_threshold>5</iperf_packetloss_threshold>
<iperf_profile>single-ue</iperf_profile>
</testCase>
<testCase id="070001">
<class>Iperf</class>
<desc>iperf (DL/20Mbps/UDP)(30 sec)(single-ue profile)</desc>
<iperf_args>-u -b 20M -t 30</iperf_args>
<direction>DL</direction>
<id>nrmodule2_quectel</id>
<iperf_packetloss_threshold>5</iperf_packetloss_threshold>
<iperf_profile>single-ue</iperf_profile>
</testCase>
<testCase id="070002">
<class>Iperf</class>
<desc>iperf (DL/40Mbps/UDP)(30 sec)(single-ue profile)</desc>
<iperf_args>-u -b 40M -t 30</iperf_args>
<direction>DL</direction>
<id>nrmodule2_quectel</id>
<iperf_packetloss_threshold>5</iperf_packetloss_threshold>
<iperf_profile>single-ue</iperf_profile>
</testCase>
<testCase id="070003">
<class>Iperf</class>
<desc>iperf (DL/60Mbps/UDP)(30 sec)(single-ue profile)</desc>
<iperf_args>-u -b 60M -t 30</iperf_args>
<direction>DL</direction>
<id>nrmodule2_quectel</id>
<iperf_packetloss_threshold>5</iperf_packetloss_threshold>
<iperf_profile>single-ue</iperf_profile>
</testCase>
<testCase id="070004">
<class>Iperf</class>
<desc>iperf (DL/90Mbps/UDP)(30 sec)(single-ue profile)</desc>
<iperf_args>-u -b 90M -t 30</iperf_args>
<direction>DL</direction>
<id>nrmodule2_quectel</id>
<iperf_packetloss_threshold>5</iperf_packetloss_threshold>
<iperf_profile>single-ue</iperf_profile>
</testCase>
<testCase id="070005">
<class>Iperf</class>
<desc>iperf (DL/140Mbps/UDP)(30 sec)(single-ue profile)</desc>
<iperf_args>-u -b 140M -t 30</iperf_args>
<direction>DL</direction>
<id>nrmodule2_quectel</id>
<iperf_packetloss_threshold>5</iperf_packetloss_threshold>
<iperf_profile>single-ue</iperf_profile>
</testCase>
<testCase id="080000">
<class>Terminate_eNB</class>
<desc>Terminate gNB</desc>
<eNB_instance>0</eNB_instance>
<eNB_serverId>0</eNB_serverId>
<air_interface>nr</air_interface>
</testCase>
</testCaseList>
#/*
#/*
# * Licensed to the OpenAirInterface (OAI) Software Alliance under one or more
# * contributor license agreements. See the NOTICE file distributed with
# * this work for additional information regarding copyright ownership.
......@@ -308,7 +308,7 @@ else (CMAKE_SYSTEM_PROCESSOR STREQUAL "armv7l")
set(COMPILATION_AVX2 "False")
endif()
if (CPUINFO MATCHES "sse4_1")
set(C_FLAGS_PROCESSOR "${C_FLAGS_PROCESSOR} -msse4.1")
set(C_FLAGS_PROCESSOR "${C_FLAGS_PROCESSOR} -msse4.1 -mpclmul")
endif()
if (CPUINFO MATCHES "ssse3")
set(C_FLAGS_PROCESSOR "${C_FLAGS_PROCESSOR} -mssse3")
......@@ -889,7 +889,7 @@ set(HWLIB_BENETEL_4G_SOURCE
)
add_library(benetel_4g MODULE ${HWLIB_BENETEL_4G_SOURCE} )
set_target_properties(benetel_4g PROPERTIES COMPILE_FLAGS "-fvisibility=hidden -march=native -I$ENV{RTE_SDK}/$ENV{RTE_TARGET}/include")
set_target_properties(benetel_4g PROPERTIES COMPILE_FLAGS "-fvisibility=hidden -I$ENV{RTE_SDK}/$ENV{RTE_TARGET}/include")
SET(DPDK_LIBS "-Wl,-rpath,$ENV{RTE_SDK}/$ENV{RTE_TARGET}/lib -Wl,--whole-archive -L$ENV{RTE_SDK}/$ENV{RTE_TARGET}/lib -ldpdk -Wl,--no-whole-archive")
TARGET_LINK_LIBRARIES(benetel_4g ${DPDK_LIBS})
......@@ -907,7 +907,7 @@ set(HWLIB_BENETEL_5G_SOURCE
)
add_library(benetel_5g MODULE ${HWLIB_BENETEL_5G_SOURCE} )
set_target_properties(benetel_5g PROPERTIES COMPILE_FLAGS "-fvisibility=hidden -march=native -I$ENV{RTE_SDK}/$ENV{RTE_TARGET}/include")
set_target_properties(benetel_5g PROPERTIES COMPILE_FLAGS "-fvisibility=hidden -I$ENV{RTE_SDK}/$ENV{RTE_TARGET}/include")
SET(DPDK_LIBS "-Wl,-rpath,$ENV{RTE_SDK}/$ENV{RTE_TARGET}/lib -Wl,--whole-archive -L$ENV{RTE_SDK}/$ENV{RTE_TARGET}/lib -ldpdk -Wl,--no-whole-archive")
TARGET_LINK_LIBRARIES(benetel_5g ${DPDK_LIBS})
......@@ -993,7 +993,6 @@ add_boolean_option(TRACE_RLC_AM_HOLE False "TRACE for RLC AM, TO BE CHANGE
add_boolean_option(TRACE_RLC_AM_PDU False "TRACE for RLC AM, TO BE CHANGED IN A MORE GENERAL FLAG")
add_boolean_option(TRACE_RLC_AM_RESEGMENT False "TRACE for RLC AM, TO BE CHANGED IN A MORE GENERAL FLAG")
add_boolean_option(TRACE_RLC_AM_RX False "TRACE for RLC AM, TO BE CHANGED IN A MORE GENERAL FLAG")
add_boolean_option(TRACE_RLC_AM_RX_DECODE False "TRACE for RLC AM, TO BE CHANGED IN A MORE GENERAL FLAG")
add_boolean_option(TRACE_RLC_AM_TX False "TRACE for RLC AM, TO BE CHANGED IN A MORE GENERAL FLAG")
add_boolean_option(TRACE_RLC_AM_TX_STATUS False "TRACE for RLC AM, TO BE CHANGED IN A MORE GENERAL FLAG")
add_boolean_option(TRACE_RLC_AM_STATUS_CREATION False "TRACE for RLC AM, TO BE CHANGED IN A MORE GENERAL FLAG")
......@@ -1572,7 +1571,6 @@ set(PHY_SRC_COMMON
${OPENAIR1_DIR}/PHY/LTE_TRANSPORT/prach_common.c
${OPENAIR1_DIR}/PHY/LTE_TRANSPORT/pucch_common.c
${OPENAIR1_DIR}/PHY/LTE_TRANSPORT/dlsch_scrambling.c
${OPENAIR1_DIR}/PHY/LTE_TRANSPORT/lte_gold_generic.c
${OPENAIR1_DIR}/PHY/LTE_UE_TRANSPORT/srs_modulation.c
${OPENAIR1_DIR}/PHY/MODULATION/ofdm_mod.c
${OPENAIR1_DIR}/PHY/LTE_ESTIMATION/lte_sync_time.c
......
......@@ -257,6 +257,48 @@ void get_coreset_rballoc(uint8_t *FreqDomainResource,int *n_rb,int *rb_offset) {
*n_rb = 6*count;
}
int get_nb_periods_per_frame(uint8_t tdd_period) {
int nb_periods_per_frame;
switch(tdd_period) {
case 0:
nb_periods_per_frame = 20; // 10ms/0p5ms
break;
case 1:
nb_periods_per_frame = 16; // 10ms/0p625ms
break;
case 2:
nb_periods_per_frame = 10; // 10ms/1ms
break;
case 3:
nb_periods_per_frame = 8; // 10ms/1p25ms
break;
case 4:
nb_periods_per_frame = 5; // 10ms/2ms
break;
case 5:
nb_periods_per_frame = 4; // 10ms/2p5ms
break;
case 6:
nb_periods_per_frame = 2; // 10ms/5ms
break;
case 7:
nb_periods_per_frame = 1; // 10ms/10ms
break;
default:
AssertFatal(1==0,"Undefined tdd period %d\n", tdd_period);
}
return nb_periods_per_frame;
}
int get_dmrs_port(int nl, uint16_t dmrs_ports) {
......@@ -276,14 +318,6 @@ int get_dmrs_port(int nl, uint16_t dmrs_ports) {
return p;
}
int get_num_dmrs(uint16_t dmrs_mask ) {
int num_dmrs=0;
for (int i=0;i<16;i++) num_dmrs+=((dmrs_mask>>i)&1);
return(num_dmrs);
}
lte_frame_type_t get_frame_type(uint16_t current_band, uint8_t scs_index)
{
lte_frame_type_t current_type;
......@@ -472,6 +506,10 @@ int get_subband_size(int NPRB,int size) {
}
int get_SLIV(uint8_t S, uint8_t L) {
return ( (uint16_t)(((L-1)<=7)? (14*(L-1)+S) : (14*(15-L)+(13-S))) );
}
void SLIV2SL(int SLIV,int *S,int *L) {
int SLIVdiv14 = SLIV/14;
......
......@@ -50,9 +50,17 @@ typedef struct nr_bandentry_s {
extern const size_t nr_bandtable_size;
extern nr_bandentry_t nr_bandtable[];
static inline int get_num_dmrs(uint16_t dmrs_mask ) {
int num_dmrs=0;
for (int i=0;i<16;i++) num_dmrs+=((dmrs_mask>>i)&1);
return(num_dmrs);
}
int get_SLIV(uint8_t S, uint8_t L);
void get_coreset_rballoc(uint8_t *FreqDomainResource,int *n_rb,int *rb_offset);
int get_num_dmrs(uint16_t dmrs_mask);
uint16_t config_bandwidth(int mu, int nb_rb, int nr_band);
int get_nr_table_idx(int nr_bandP, uint8_t scs_index);
int32_t get_delta_duplex(int nr_bandP, uint8_t scs_index);
......@@ -71,6 +79,7 @@ uint32_t nr_get_code_rate(uint8_t Imcs, uint8_t table_idx);
int get_subband_size(int NPRB,int size);
void SLIV2SL(int SLIV,int *S,int *L);
int get_dmrs_port(int nl, uint16_t dmrs_ports);
int get_nb_periods_per_frame(uint8_t tdd_period);
#define CEILIDIV(a,b) ((a+b-1)/b)
#define ROUNDIDIV(a,b) (((a<<1)+b)/(b<<1))
......
all:
measurement_display thread-pool-test
measurement_display:
measurement_display.c thread-pool.h
gcc measurement_display.c -I $ {OPENAIR_DIR}/ -I $ {OPENAIR_DIR}/common/utils/ -I. $ {OPENAIR_DIR}/common/utils/backtrace.c -lpthread -D TEST_THREAD_POOL -I../LOG -I../../utils/T -o
measurement_display
thread-pool-test:
thread-pool.c thread-pool.h
gcc -g thread-pool.c -I $ {OPENAIR_DIR}/ -I $ {OPENAIR_DIR}/common/utils/ -I. $ {OPENAIR_DIR}/common/utils/backtrace.c -I $ {OPENAIR_DIR}/openair2/COMMON $ {OPENAIR_DIR}/common/utils/LOG/log.c $ {OPENAIR_DIR}/common/config/config_userapi.c
$ {OPENAIR_DIR}/common/config/config_load_configmodule.c $ {OPENAIR_DIR}/common/config/config_cmdline.c -lpthread -ldl -D TEST_THREAD_POOL -I../LOG -I../../utils/T -o thread-pool-test
thread-pool-test: thread-pool.c thread-pool.h
gcc -g -O3 thread-pool.c -I ${OPENAIR_DIR}/nfapi/open-nFAPI/nfapi/public_inc -I ${OPENAIR_DIR}/ -I ${OPENAIR_DIR}/common/utils/ -I. ${OPENAIR_DIR}/common/utils/backtrace.c -I ${OPENAIR_DIR}/openair2/COMMON ${OPENAIR_DIR}/common/utils/system.c ${OPENAIR_DIR}/common/utils/LOG/log.c ${OPENAIR_DIR}/common/config/config_userapi.c ${OPENAIR_DIR}/common/config/config_load_configmodule.c ${OPENAIR_DIR}/common/config/config_cmdline.c -lpthread -ldl -D TEST_THREAD_POOL -DMAX_NUM_CCs=1 -I../LOG -I../../utils/T -o thread-pool-test
......@@ -155,21 +155,24 @@ void initNamedTpool(char *params,tpool_t *pool, bool performanceMeas, char *name
}
#ifdef TEST_THREAD_POOL
volatile int oai_exit=0;
void exit_function(const char *file, const char *function, const int line, const char *s) {
}
struct testData {
int id;
int sleepTime;
char txt[30];
};
void processing(void *arg) {
struct testData *in=(struct testData *)arg;
printf("doing: %d, %s, in thr %ld\n",in->id, in->txt,pthread_self() );
//printf("doing: %d, %s, in thr %ld\n",in->id, in->txt,pthread_self() );
sprintf(in->txt,"Done by %ld, job %d", pthread_self(), in->id);
usleep(rand()%100);
printf("done: %d, %s, in thr %ld\n",in->id, in->txt,pthread_self() );
in->sleepTime=rand()%1000;
usleep(in->sleepTime);
//printf("done: %d, %s, in thr %ld\n",in->id, in->txt,pthread_self() );
}
int main() {
......@@ -208,11 +211,43 @@ int main() {
} while(tmp);
tpool_t pool;
char params[]="1,2,3,u";
char params[]="1,2,3,4,5";
initTpool(params,&pool, true);
notifiedFIFO_t worker_back;
initNotifiedFIFO(&worker_back);
sleep(1);
int cumulProcessTime=0, cumulTime=0;
struct timespec st,end;
clock_gettime(CLOCK_MONOTONIC, &st);
int nb_jobs=4;
for (int i=0; i <1000 ; i++) {
int parall=nb_jobs;
for (int j=0; j <parall ; j++) {
notifiedFIFO_elt_t *work=newNotifiedFIFO_elt(sizeof(struct testData), i, &worker_back, processing);
struct testData *x=(struct testData *)NotifiedFifoData(work);
x->id=i;
pushTpool(&pool, work);
}
int sleepmax=0;
while (parall) {
tmp=pullTpool(&worker_back,&pool);
if (tmp) {
parall--;
struct testData *dd=NotifiedFifoData(tmp);
if (dd->sleepTime > sleepmax)
sleepmax=dd->sleepTime;
delNotifiedFIFO_elt(tmp);
}
}
cumulProcessTime+=sleepmax;
}
clock_gettime(CLOCK_MONOTONIC, &end);
long long dur=(end.tv_sec-st.tv_sec)*1000*1000+(end.tv_nsec-st.tv_nsec)/1000;
printf("In µs, Total time per group of %d job:%lld, work time per job %d, overhead per job %lld\n",
nb_jobs, dur/1000, cumulProcessTime/1000, (dur-cumulProcessTime)/(1000*nb_jobs));
/*
for (int i=0; i <1000 ; i++) {
notifiedFIFO_elt_t *work=newNotifiedFIFO_elt(sizeof(struct testData), i, &worker_back, processing);
struct testData *x=(struct testData *)NotifiedFifoData(work);
......@@ -232,7 +267,7 @@ int main() {
abortTpool(&pool,510);
} while(tmp);
*/
return 0;
}
#endif
......@@ -31,6 +31,7 @@
#include <assertions.h>
#include <LOG/log.h>
#include <common/utils/system.h>
//#include <stdatomic.h>
#ifdef DEBUG
#define THREADINIT PTHREAD_ERRORCHECK_MUTEX_INITIALIZER_NP
......@@ -50,7 +51,7 @@
AssertFatal(ret==0,"ret=%d\n",ret);}
#define condbroadcast(signal) {int ret=pthread_cond_broadcast(&signal); \
AssertFatal(ret==0,"ret=%d\n",ret);}
#define condsignal(signal) {int ret=pthread_cond_broadcast(&signal); \
#define condsignal(signal) {int ret=pthread_cond_signal(&signal); \
AssertFatal(ret==0,"ret=%d\n",ret);}
#define tpool_nbthreads(tpool) (tpool.nbThreads)
typedef struct notifiedFIFO_elt_s {
......@@ -130,7 +131,7 @@ static inline void pushNotifiedFIFO_nothreadSafe(notifiedFIFO_t *nf, notifiedFIF
static inline void pushNotifiedFIFO(notifiedFIFO_t *nf, notifiedFIFO_elt_t *msg) {
mutexlock(nf->lockF);
pushNotifiedFIFO_nothreadSafe(nf,msg);
condbroadcast(nf->notifF);
condsignal(nf->notifF);
mutexunlock(nf->lockF);
}
......
......@@ -53,29 +53,7 @@ gNBs =
#pdcch-ConfigCommon
initialDLBWPcontrolResourceSetZero = 0;
initialDLBWPsearchSpaceZero = 0;
#pdsch-ConfigCommon
#pdschTimeDomainAllocationList (up to 16 entries)
initialDLBWPk0_0 = 0;
#initialULBWPmappingType
#0=typeA,1=typeB
initialDLBWPmappingType_0 = 0;
#this is SS=1,L=13
initialDLBWPstartSymbolAndLength_0 = 40;
initialDLBWPk0_1 = 0;
initialDLBWPmappingType_1 = 0;
#this is SS=2,L=12
initialDLBWPstartSymbolAndLength_1 = 53;
initialDLBWPk0_2 = 0;
initialDLBWPmappingType_2 = 0;
#this is SS=1,L=12
initialDLBWPstartSymbolAndLength_2 = 54;
initialDLBWPk0_3 = 0;
initialDLBWPmappingType_3 = 0;
#this is SS=1,L=4 //5 (4 is for 43, 5 is for 57)
initialDLBWPstartSymbolAndLength_3 = 57; //43; //57;
#uplinkConfigCommon
#frequencyInfoUL
ul_frequencyBand = 78;
......@@ -129,21 +107,6 @@ gNBs =
# restrictedSetConfig
# 0=unrestricted, 1=restricted type A, 2=restricted type B
restrictedSetConfig = 0,
# pusch-ConfigCommon (up to 16 elements)
initialULBWPk2_0 = 2;
initialULBWPmappingType_0 = 1
# this is SS=0 L=11
initialULBWPstartSymbolAndLength_0 = 55;
initialULBWPk2_1 = 2;
initialULBWPmappingType_1 = 1;
# this is SS=0 L=12
initialULBWPstartSymbolAndLength_1 = 69;
initialULBWPk2_2 = 7;
initialULBWPmappingType_2 = 1;
# this is SS=10 L=4
initialULBWPstartSymbolAndLength_2 = 52;
msg3_DeltaPreamble = 1;
p0_NominalWithGrant =-90;
......
......@@ -401,15 +401,15 @@ void init_gNB_Tpool(int inst) {
LOG_I(PHY,"Number of threads requested in config file: %d, Number of threads available on this machine: %d\n",gNB->pusch_proc_threads,numCPU);
int threadCnt = min(numCPU, gNB->pusch_proc_threads);
if (threadCnt < 2) LOG_E(PHY,"Number of threads for gNB should be more than 1. Allocated only %d\n",threadCnt);
char ul_pool[80];
sprintf(ul_pool,"-1");
char pool[80];
sprintf(pool,"-1");
int s_offset = 0;
for (int icpu=1; icpu<threadCnt; icpu++) {
sprintf(ul_pool+2+s_offset,",-1");
sprintf(pool+2+s_offset,",-1");
s_offset += 3;
}
if (getenv("noThreads")) strcpy(ul_pool, "n");
initTpool(ul_pool, gNB->threadPool, false);
if (getenv("noThreads")) strcpy(pool, "n");
initTpool(pool, gNB->threadPool, false);
// ULSCH decoder result FIFO
gNB->respDecode = (notifiedFIFO_t*) malloc(sizeof(notifiedFIFO_t));
initNotifiedFIFO(gNB->respDecode);
......
......@@ -786,7 +786,7 @@ void init_NR_UE_threads(int nb_inst) {
/* HACK: this function is needed to compile the UE
* fix it somehow
*/
int8_t find_dlsch(uint16_t rnti,
int find_dlsch(uint16_t rnti,
PHY_VARS_eNB *eNB,
find_type_t type)
{
......
This diff is collapsed.
......@@ -30,10 +30,17 @@
Modified in June, 2001, to include the length non multiple of 8
*/
#ifndef __SSE4_1__
#define USE_INTEL_CRC 0
#else
#define USE_INTEL_CRC __SSE4_1__
#endif
#include "coding_defs.h"
#include "assertions.h"
#if USE_INTEL_CRC
#include "crc.h"
#endif
/*ref 36-212 v8.6.0 , pp 8-9 */
/* the highest degree is set by default */
......@@ -94,6 +101,28 @@ static unsigned short crc11Table[256];
static unsigned char crc8Table[256];
static unsigned char crc6Table[256];
#if USE_INTEL_CRC
static DECLARE_ALIGNED(struct crc_pclmulqdq_ctx lte_crc24a_pclmulqdq, 16) = {
0x64e4d700, /**< k1 */
0x2c8c9d00, /**< k2 */
0xd9fe8c00, /**< k3 */
0xf845fe24, /**< q */
0x864cfb00, /**< p */
0ULL /**< res */
};
__m128i crc_xmm_be_le_swap128;
DECLARE_ALIGNED(const uint8_t crc_xmm_shift_tab[48], 16) = {
0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
0x00, 0x01, 0x02, 0x03, 0x04, 0x05, 0x06, 0x07,
0x08, 0x09, 0x0a, 0x0b, 0x0c, 0x0d, 0x0e, 0x0f,
0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff
};
#endif
void crcTableInit (void)
{
unsigned char c = 0;
......@@ -108,23 +137,29 @@ void crcTableInit (void)
crc8Table[c] = (unsigned char) (crcbit (&c, 1, poly8) >> 24);
crc6Table[c] = (unsigned char) (crcbit (&c, 1, poly6) >> 24);
} while (++c);
#if USE_INTEL_CRC
crc_xmm_be_le_swap128 = _mm_setr_epi32(0x0c0d0e0f, 0x08090a0b,
0x04050607, 0x00010203);
#endif
}
/*********************************************************
Byte by byte implementations,
Byte by byte LUT implementations,
assuming initial byte is 0 padded (in MSB) if necessary
can use SIMD optimized Intel CRC for LTE/NR 24a/24b variants
*********************************************************/
unsigned int crc24a (unsigned char * inptr,
int bitlen)
{
int octetlen = bitlen / 8; /* Change in octets */
int octetlen, resbit;
unsigned int crc = 0;
octetlen = bitlen / 8; /* Change in octets */
resbit = (bitlen % 8);
if ( bitlen % 8 || !USE_INTEL_CRC ) {
unsigned int crc = 0;
int resbit= (bitlen % 8);
while (octetlen-- > 0) {
// printf("crc24a: in %x => crc %x\n",crc,*inptr);
crc = (crc << 8) ^ crc24aTable[(*inptr++) ^ (crc >> 24)];
......@@ -132,17 +167,35 @@ unsigned int crc24a (unsigned char * inptr,
if (resbit > 0)
crc = (crc << resbit) ^ crc24aTable[((*inptr) >> (8 - resbit)) ^ (crc >> (32 - resbit))];
return crc;
}
#if USE_INTEL_CRC
else {
return crc32_calc_pclmulqdq(inptr, octetlen, 0,
&lte_crc24a_pclmulqdq);
}
#endif
}
#if USE_INTEL_CRC
static DECLARE_ALIGNED(struct crc_pclmulqdq_ctx lte_crc24b_pclmulqdq, 16) = {
0x80140500, /**< k1 */
0x42000100, /**< k2 */
0x90042100, /**< k3 */
0xffff83ff, /**< q */
0x80006300, /**< p */
0ULL /**< res */
};
#endif
unsigned int crc24b (unsigned char * inptr,
int bitlen)
int bitlen)
{
int octetlen, resbit;
int octetlen = bitlen / 8; /* Change in octets */
if ( bitlen % 8 || !USE_INTEL_CRC ) {
unsigned int crc = 0;
octetlen = bitlen / 8; /* Change in octets */
resbit = (bitlen % 8);
int resbit = (bitlen % 8);
while (octetlen-- > 0) {
// printf("crc24b: in %x => crc %x (%x)\n",crc,*inptr,crc24bTable[(*inptr) ^ (crc >> 24)]);
......@@ -153,6 +206,13 @@ unsigned int crc24b (unsigned char * inptr,
crc = (crc << resbit) ^ crc24bTable[((*inptr) >> (8 - resbit)) ^ (crc >> (32 - resbit))];
return crc;
}
#if USE_INTEL_CRC
else {
return crc32_calc_pclmulqdq(inptr, octetlen, 0,
&lte_crc24b_pclmulqdq);
}
#endif
}
unsigned int crc24c (unsigned char * inptr,
......
/*******************************************************************************
Copyright (c) 2009-2018, Intel Corporation
Redistribution and use in source and binary forms, with or without
modification, are permitted provided that the following conditions are met:
* Redistributions of source code must retain the above copyright notice,
this list of conditions and the following disclaimer.
* Redistributions in binary form must reproduce the above copyright
notice, this list of conditions and the following disclaimer in the
documentation and/or other materials provided with the distribution.
* Neither the name of Intel Corporation nor the names of its contributors
may be used to endorse or promote products derived from this software
without specific prior written permission.
THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE
FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
*******************************************************************************/
/**
* Header file with CRC external definitions
*
*/
#ifndef __CRCEXT_H__
#define __CRCEXT_H__
#include <x86intrin.h>
#include "types.h"
/**
* Flag indicating availability of PCLMULQDQ instruction
* Only valid after running CRCInit() function.
*/
extern int pclmulqdq_available;
/**
* Flag indicating availability of PCLMULQDQ instruction
* Only valid after running CRCInit() function.
*/
extern __m128i crc_xmm_be_le_swap128;
extern const uint8_t crc_xmm_shift_tab[48];
/**
* @brief Shifts right 128 bit register by specified number of bytes
*
* @param reg 128 bit value
* @param num number of bytes to shift right \a reg by (0-16)
*
* @return \a reg >> (\a num * 8)
*/
__forceinline
__m128i xmm_shift_right(__m128i reg, const unsigned int num)
{
const __m128i *p = (const __m128i *)(crc_xmm_shift_tab + 16 + num);
return _mm_shuffle_epi8(reg, _mm_loadu_si128(p));
}
/**
* @brief Shifts left 128 bit register by specified number of bytes
*
* @param reg 128 bit value
* @param num number of bytes to shift left \a reg by (0-16)
*
* @return \a reg << (\a num * 8)
*/
__forceinline
__m128i xmm_shift_left(__m128i reg, const unsigned int num)
{
const __m128i *p = (const __m128i *)(crc_xmm_shift_tab + 16 - num);
return _mm_shuffle_epi8(reg, _mm_loadu_si128(p));
}
/**
* @brief Initializes CRC module.
* @note It is mandatory to run it before using any of CRC API's.
*/
extern void CRCInit(void);
#endif /* __CRCEXT_H__ */
......@@ -22,6 +22,7 @@
// encoder interface
#ifndef __NRLDPC_DEFS__H__
#define __NRLDPC_DEFS__H__
#include <openair1/PHY/defs_nr_common.h>
#include "openair1/PHY/CODING/nrLDPC_decoder/nrLDPC_types.h"
/**
\brief LDPC encoder
......@@ -36,17 +37,31 @@
\param 9-12 time_stats_t *tinput,*tprep, *tparity,*toutput
*/
typedef struct {
int n_segments; // optim8seg
unsigned int macro_num; // optim8segmulti
unsigned char gen_code; //orig
time_stats_t *tinput;
time_stats_t *tprep;
time_stats_t *tparity;
time_stats_t *toutput;
}encoder_implemparams_t;
unsigned int n_segments; // optim8seg
unsigned int macro_num; // optim8segmulti
unsigned char gen_code; //orig
time_stats_t *tinput;
time_stats_t *tprep;
time_stats_t *tparity;
time_stats_t *toutput;
int Kr;
uint32_t Kb;
uint32_t *Zc;
void *harq;
/// Encoder BG
uint8_t BG;
/// Interleaver outputs
unsigned char *output;
/// Number of bits in "small" code segments
uint32_t K;
/// Number of "Filler" bits
uint32_t F;
/// LDPC-code outputs
uint8_t *d[MAX_NUM_NR_DLSCH_SEGMENTS];
} encoder_implemparams_t;
#define INIT0_LDPCIMPLEMPARAMS {0,0,0,NULL,NULL,NULL,NULL}
typedef void(*nrLDPC_initcallfunc_t)(t_nrLDPC_dec_params* p_decParams, int8_t* p_llr, int8_t* p_out);
typedef int(*nrLDPC_encoderfunc_t)(unsigned char **,unsigned char **,int,int,short, short, encoder_implemparams_t*);
typedef void(*nrLDPC_initcallfunc_t)(t_nrLDPC_dec_params *p_decParams, int8_t *p_llr, int8_t *p_out);
typedef int(*nrLDPC_encoderfunc_t)(unsigned char **,unsigned char **,int,int,short, short, encoder_implemparams_t *);
//============================================================================================================================
// decoder interface
/**
......@@ -56,5 +71,5 @@ typedef int(*nrLDPC_encoderfunc_t)(unsigned char **,unsigned char **,int,int,sho
\param p_llrOut Output vector
\param p_profiler LDPC profiler statistics
*/
typedef int32_t(*nrLDPC_decoderfunc_t)(t_nrLDPC_dec_params* , int8_t*, int8_t* , t_nrLDPC_procBuf* , t_nrLDPC_time_stats* );
typedef int32_t(*nrLDPC_decoderfunc_t)(t_nrLDPC_dec_params *, int8_t *, int8_t *, t_nrLDPC_procBuf *, t_nrLDPC_time_stats * );
#endif
......@@ -38,8 +38,6 @@
#include "common/utils/LOG/log.h"
//#define DEBUG_LDPC
#include "ldpc384_byte.c"
#include "ldpc352_byte.c"
#include "ldpc320_byte.c"
......@@ -73,9 +71,18 @@
static inline void encode_parity_check_part_optim(uint8_t *c,uint8_t *d, short BG,short Zc,short Kb)
static void encode_parity_check_part_optim(uint8_t *cc,uint8_t *d, short BG,short Zc,short Kb, int simd_size, int ncols)
{
unsigned char c[2*22*Zc*simd_size] __attribute__((aligned(32))); //double size matrix of c
for (int i1=0; i1 < ncols; i1++) {
memcpy(&c[2*i1*Zc], &cc[i1*Zc], Zc*sizeof(unsigned char));
memcpy(&c[(2*i1+1)*Zc], &cc[i1*Zc], Zc*sizeof(unsigned char));
}
for (int i1=1;i1<simd_size;i1++) {
memcpy(&c[(2*ncols*Zc*i1)], &c[i1], (2*ncols*Zc*sizeof(unsigned char))-i1);
}
if (BG==1)
{
switch (Zc)
......
......@@ -39,8 +39,6 @@
#include "PHY/TOOLS/time_meas.h"
#include "defs.h"
//#define DEBUG_LDPC
#include "ldpc384_byte.c"
#include "ldpc352_byte.c"
#include "ldpc320_byte.c"
......
......@@ -40,9 +40,6 @@
#include "openair1/PHY/CODING/nrLDPC_defs.h"
#include "ldpc_encode_parity_check.c"
#include "ldpc_generate_coefficient.c"
//#define DEBUG_LDPC
......@@ -50,7 +47,7 @@ int nrLDPC_encod(unsigned char **test_input,unsigned char **channel_input,int Zc
{
short nrows=0,ncols=0;
int i,i1,rate=3;
int rate=3;
int no_punctured_columns,removed_bit;
int simd_size;
......@@ -86,8 +83,6 @@ int nrLDPC_encod(unsigned char **test_input,unsigned char **channel_input,int Zc
unsigned char c[22*Zc] __attribute__((aligned(32))); //padded input, unpacked, max size
unsigned char d[46*Zc] __attribute__((aligned(32))); //coded parity part output, unpacked, max size
unsigned char c_extension[2*22*Zc*simd_size] __attribute__((aligned(32))); //double size matrix of c
// calculate number of punctured bits
no_punctured_columns=(int)((nrows-2)*Zc+block_length-block_length*rate)/Zc;
removed_bit=(nrows-no_punctured_columns-2) * Zc+block_length-(int)(block_length*rate);
......@@ -98,7 +93,7 @@ int nrLDPC_encod(unsigned char **test_input,unsigned char **channel_input,int Zc
memset(d,0,sizeof(unsigned char) * nrows * Zc);
if(impp->tinput != NULL) start_meas(impp->tinput);
for (i=0; i<block_length; i++) {
for (int i=0; i<block_length; i++) {
c[i] = (test_input[0][i/8]&(128>>(i&7)))>>(7-(i&7));
//printf("c(%d,%d)=%d\n",j,i,temp);
}
......@@ -108,24 +103,10 @@ int nrLDPC_encod(unsigned char **test_input,unsigned char **channel_input,int Zc
if ((BG==1 && Zc>176) || (BG==2 && Zc>64)) {
// extend matrix
if(impp->tprep != NULL) start_meas(impp->tprep);
for (i1=0; i1 < ncols; i1++)
{
memcpy(&c_extension[2*i1*Zc], &c[i1*Zc], Zc*sizeof(unsigned char));
memcpy(&c_extension[(2*i1+1)*Zc], &c[i1*Zc], Zc*sizeof(unsigned char));
}
for (i1=1;i1<simd_size;i1++) {
memcpy(&c_extension[(2*ncols*Zc*i1)], &c_extension[i1], (2*ncols*Zc*sizeof(unsigned char))-i1);
// memset(&c_extension[(2*ncols*Zc*i1)],0,i1);
/*
printf("shift %d: ",i1);
for (int j=0;j<64;j++) printf("%d ",c_extension[(2*ncols*Zc*i1)+j]);
printf("\n");
*/
}
if(impp->tprep != NULL) stop_meas(impp->tprep);
//parity check part
if(impp->tparity != NULL) start_meas(impp->tparity);
encode_parity_check_part_optim(c_extension, d, BG, Zc, Kb);
encode_parity_check_part_optim(c, d, BG, Zc, Kb,simd_size, ncols);
if(impp->tparity != NULL) stop_meas(impp->tparity);
}
else {
......
......@@ -38,7 +38,6 @@
#include "common/utils/LOG/log.h"
#include "PHY/TOOLS/time_meas.h"
#include "openair1/PHY/CODING/nrLDPC_defs.h"
//#define DEBUG_LDPC
#include "ldpc_encode_parity_check.c"
#include "ldpc_generate_coefficient.c"
......@@ -102,7 +101,6 @@ int nrLDPC_encod(unsigned char **test_input,unsigned char **channel_input,int Zc
unsigned char c[22*Zc] __attribute__((aligned(32))); //padded input, unpacked, max size
unsigned char d[46*Zc] __attribute__((aligned(32))); //coded parity part output, unpacked, max size
unsigned char c_extension[2*22*Zc*simd_size] __attribute__((aligned(32))); //double size matrix of c
// calculate number of punctured bits
no_punctured_columns=(int)((nrows-2)*Zc+block_length-block_length*rate)/Zc;
......@@ -151,24 +149,10 @@ int nrLDPC_encod(unsigned char **test_input,unsigned char **channel_input,int Zc
if ((BG==1 && Zc>176) || (BG==2 && Zc>64)) {
// extend matrix
if(impp->tprep != NULL) start_meas(impp->tprep);
for (i1=0; i1 < ncols; i1++)
{
memcpy(&c_extension[2*i1*Zc], &c[i1*Zc], Zc*sizeof(unsigned char));
memcpy(&c_extension[(2*i1+1)*Zc], &c[i1*Zc], Zc*sizeof(unsigned char));
}
for (i1=1;i1<simd_size;i1++) {
memcpy(&c_extension[(2*ncols*Zc*i1)], &c_extension[i1], (2*ncols*Zc*sizeof(unsigned char))-i1);
// memset(&c_extension[(2*ncols*Zc*i1)],0,i1);
/*
printf("shift %d: ",i1);
for (int j=0;j<64;j++) printf("%d ",c_extension[(2*ncols*Zc*i1)+j]);
printf("\n");
*/
}
if(impp->tprep != NULL) stop_meas(impp->tprep);
//parity check part
if(impp->tparity != NULL) start_meas(impp->tparity);
encode_parity_check_part_optim(c_extension, d, BG, Zc, Kb);
encode_parity_check_part_optim(c, d, BG, Zc, Kb, simd_size, ncols);
if(impp->tparity != NULL) stop_meas(impp->tparity);
}
else {
......
......@@ -39,17 +39,17 @@
#include "PHY/TOOLS/time_meas.h"
#include "openair1/PHY/CODING/nrLDPC_defs.h"
//#define DEBUG_LDPC
#include "ldpc_encode_parity_check.c"
#include "ldpc_generate_coefficient.c"
int nrLDPC_encod(unsigned char **test_input,unsigned char **channel_input,int Zc,int Kb,short block_length, short BG, encoder_implemparams_t *impp)
int nrLDPC_encod(unsigned char **input,unsigned char **output,int Zc,int Kb,short block_length, short BG, encoder_implemparams_t *impp)
{
//set_log(PHY, 4);
short nrows=0,ncols=0;
int i,i1,j,rate=3;
int nrows=0,ncols=0;
int rate=3;
int no_punctured_columns,removed_bit;
//Table of possible lifting sizes
char temp;
......@@ -95,8 +95,8 @@ int nrLDPC_encod(unsigned char **test_input,unsigned char **channel_input,int Zc
}
#ifdef DEBUG_LDPC
LOG_D(PHY,"ldpc_encoder_optim_8seg: BG %d, Zc %d, Kb %d, block_length %d, segments %d\n",BG,Zc,Kb,block_length,n_segments);
LOG_D(PHY,"ldpc_encoder_optim_8seg: PDU (seg 0) %x %x %x %x\n",test_input[0][0],test_input[0][1],test_input[0][2],test_input[0][3]);
LOG_D(PHY,"ldpc_encoder_optim_8seg: BG %d, Zc %d, Kb %d, block_length %d, segments %d\n",BG,Zc,Kb,block_length,impp->n_segments);
LOG_D(PHY,"ldpc_encoder_optim_8seg: PDU (seg 0) %x %x %x %x\n",input[0][0],input[0][1],input[0][2],input[0][3]);
#endif
AssertFatal(Zc>0,"no valid Zc found for block length %d\n",block_length);
......@@ -104,10 +104,8 @@ int nrLDPC_encod(unsigned char **test_input,unsigned char **channel_input,int Zc
if ((Zc&31) > 0) simd_size = 16;
else simd_size = 32;
unsigned char c[22*Zc] __attribute__((aligned(32))); //padded input, unpacked, max size
unsigned char d[46*Zc] __attribute__((aligned(32))); //coded parity part output, unpacked, max size
unsigned char c_extension[2*22*Zc*simd_size] __attribute__((aligned(32))); //double size matrix of c
unsigned char cc[22*Zc] __attribute__((aligned(32))); //padded input, unpacked, max size
unsigned char dd[46*Zc] __attribute__((aligned(32))); //coded parity part output, unpacked, max size
// calculate number of punctured bits
no_punctured_columns=(int)((nrows-2)*Zc+block_length-block_length*rate)/Zc;
......@@ -115,8 +113,8 @@ int nrLDPC_encod(unsigned char **test_input,unsigned char **channel_input,int Zc
//printf("%d\n",no_punctured_columns);
//printf("%d\n",removed_bit);
// unpack input
memset(c,0,sizeof(unsigned char) * ncols * Zc);
memset(d,0,sizeof(unsigned char) * nrows * Zc);
memset(cc,0,sizeof(unsigned char) * ncols * Zc);
memset(dd,0,sizeof(unsigned char) * nrows * Zc);
if(impp->tinput != NULL) start_meas(impp->tinput);
#if 0
......@@ -124,29 +122,29 @@ int nrLDPC_encod(unsigned char **test_input,unsigned char **channel_input,int Zc
//for (j=0; j<n_segments; j++) {
for (j=macro_segment; j < macro_segment_end; j++) {
temp = (test_input[j][i/8]&(1<<(i&7)))>>(i&7);
temp = (input[j][i/8]&(1<<(i&7)))>>(i&7);
//printf("c(%d,%d)=%d\n",j,i,temp);
c[i] |= (temp << (j-macro_segment));
}
}
#else
#ifdef __AVX2__
for (i=0; i<block_length>>5; i++) {
c256 = _mm256_and_si256(_mm256_cmpeq_epi8(_mm256_andnot_si256(_mm256_shuffle_epi8(_mm256_set1_epi32(((uint32_t*)test_input[macro_segment])[i]), shufmask),andmask),zero256),masks[0]);
for (int i=0; i<block_length>>5; i++) {
c256 = _mm256_and_si256(_mm256_cmpeq_epi8(_mm256_andnot_si256(_mm256_shuffle_epi8(_mm256_set1_epi32(((uint32_t*)input[macro_segment])[i]), shufmask),andmask),zero256),masks[0]);
//for (j=1; j<n_segments; j++) {
for (j=macro_segment+1; j < macro_segment_end; j++) {
c256 = _mm256_or_si256(_mm256_and_si256(_mm256_cmpeq_epi8(_mm256_andnot_si256(_mm256_shuffle_epi8(_mm256_set1_epi32(((uint32_t*)test_input[j])[i]), shufmask),andmask),zero256),masks[j-macro_segment]),c256);
for (int j=macro_segment+1; j < macro_segment_end; j++) {
c256 = _mm256_or_si256(_mm256_and_si256(_mm256_cmpeq_epi8(_mm256_andnot_si256(_mm256_shuffle_epi8(_mm256_set1_epi32(((uint32_t*)input[j])[i]), shufmask),andmask),zero256),masks[j-macro_segment]),c256);
}
((__m256i *)c)[i] = c256;
((__m256i *)cc)[i] = c256;
}
for (i=(block_length>>5)<<5;i<block_length;i++) {
for (int i=(block_length>>5)<<5;i<block_length;i++) {
//for (j=0; j<n_segments; j++) {
for (j=macro_segment; j < macro_segment_end; j++) {
for (int j=macro_segment; j < macro_segment_end; j++) {
temp = (test_input[j][i/8]&(128>>(i&7)))>>(7-(i&7));
temp = (input[j][i/8]&(128>>(i&7)))>>(7-(i&7));
//printf("c(%d,%d)=%d\n",j,i,temp);
c[i] |= (temp << (j-macro_segment));
cc[i] |= (temp << (j-macro_segment));
}
}
#else
......@@ -159,28 +157,14 @@ int nrLDPC_encod(unsigned char **test_input,unsigned char **channel_input,int Zc
if ((BG==1 && Zc>176) || (BG==2 && Zc>64)) {
// extend matrix
if(impp->tprep != NULL) start_meas(impp->tprep);
for (i1=0; i1 < ncols; i1++)
{
memcpy(&c_extension[2*i1*Zc], &c[i1*Zc], Zc*sizeof(unsigned char));
memcpy(&c_extension[(2*i1+1)*Zc], &c[i1*Zc], Zc*sizeof(unsigned char));
}
for (i1=1;i1<simd_size;i1++) {
memcpy(&c_extension[(2*ncols*Zc*i1)], &c_extension[i1], (2*ncols*Zc*sizeof(unsigned char))-i1);
// memset(&c_extension[(2*ncols*Zc*i1)],0,i1);
/*
printf("shift %d: ",i1);
for (int j=0;j<64;j++) printf("%d ",c_extension[(2*ncols*Zc*i1)+j]);
printf("\n");
*/
}
if(impp->tprep != NULL) stop_meas(impp->tprep);
//parity check part
if(impp->tparity != NULL) start_meas(impp->tparity);
encode_parity_check_part_optim(c_extension, d, BG, Zc, Kb);
encode_parity_check_part_optim(cc, dd, BG, Zc, Kb, simd_size, ncols);
if(impp->tparity != NULL) stop_meas(impp->tparity);
}
else {
if (encode_parity_check_part_orig(c, d, BG, Zc, Kb, block_length)!=0) {
if (encode_parity_check_part_orig(cc, dd, BG, Zc, Kb, block_length)!=0) {
printf("Problem with encoder\n");
return(-1);
}
......@@ -188,8 +172,8 @@ int nrLDPC_encod(unsigned char **test_input,unsigned char **channel_input,int Zc
if(impp->toutput != NULL) start_meas(impp->toutput);
// information part and puncture columns
/*
memcpy(&channel_input[0], &c[2*Zc], (block_length-2*Zc)*sizeof(unsigned char));
memcpy(&channel_input[block_length-2*Zc], &d[0], ((nrows-no_punctured_columns) * Zc-removed_bit)*sizeof(unsigned char));
memcpy(&output[0], &c[2*Zc], (block_length-2*Zc)*sizeof(unsigned char));
memcpy(&output[block_length-2*Zc], &d[0], ((nrows-no_punctured_columns) * Zc-removed_bit)*sizeof(unsigned char));
*/
#ifdef __AVX2__
if ((((2*Zc)&31) == 0) && (((block_length-(2*Zc))&31) == 0)) {
......@@ -197,34 +181,34 @@ int nrLDPC_encod(unsigned char **test_input,unsigned char **channel_input,int Zc
//AssertFatal(((block_length-(2*Zc))&31) == 0,"block_length-(2*Zc) needs to be a multiple of 32 for now\n");
uint32_t l1 = (block_length-(2*Zc))>>5;
uint32_t l2 = ((nrows-no_punctured_columns) * Zc-removed_bit)>>5;
__m256i *c256p = (__m256i *)&c[2*Zc];
__m256i *d256p = (__m256i *)&d[0];
__m256i *c256p = (__m256i *)&cc[2*Zc];
__m256i *d256p = (__m256i *)&dd[0];
// if (((block_length-(2*Zc))&31)>0) l1++;
for (i=0;i<l1;i++)
//for (j=0;j<n_segments;j++) ((__m256i *)channel_input[j])[i] = _mm256_and_si256(_mm256_srai_epi16(c256p[i],j),masks[0]);
for (j=macro_segment; j < macro_segment_end; j++) ((__m256i *)channel_input[j])[i] = _mm256_and_si256(_mm256_srai_epi16(c256p[i],j-macro_segment),masks[0]);
for (int i=0;i<l1;i++)
//for (j=0;j<n_segments;j++) ((__m256i *)output[j])[i] = _mm256_and_si256(_mm256_srai_epi16(c256p[i],j),masks[0]);
for (int j=macro_segment; j < macro_segment_end; j++) ((__m256i *)output[j])[i] = _mm256_and_si256(_mm256_srai_epi16(c256p[i],j-macro_segment),masks[0]);
// if ((((nrows-no_punctured_columns) * Zc-removed_bit)&31)>0) l2++;
for (i1=0;i1<l2;i1++,i++)
//for (j=0;j<n_segments;j++) ((__m256i *)channel_input[j])[i] = _mm256_and_si256(_mm256_srai_epi16(d256p[i1],j),masks[0]);
for (j=macro_segment; j < macro_segment_end; j++) ((__m256i *)channel_input[j])[i] = _mm256_and_si256(_mm256_srai_epi16(d256p[i1],j-macro_segment),masks[0]);
for (int i1=0, i=l1;i1<l2;i1++,i++)
//for (j=0;j<n_segments;j++) ((__m256i *)output[j])[i] = _mm256_and_si256(_mm256_srai_epi16(d256p[i1],j),masks[0]);
for (int j=macro_segment; j < macro_segment_end; j++) ((__m256i *)output[j])[i] = _mm256_and_si256(_mm256_srai_epi16(d256p[i1],j-macro_segment),masks[0]);
}
else {
#ifdef DEBUG_LDPC
LOG_W(PHY,"using non-optimized version\n");
#endif
// do non-SIMD version
for (i=0;i<(block_length-2*Zc);i++)
for (int i=0;i<(block_length-2*Zc);i++)
//for (j=0; j<n_segments; j++)
for (j=macro_segment; j < macro_segment_end; j++)
channel_input[j][i] = (c[2*Zc+i]>>(j-macro_segment))&1;
for (i=0;i<((nrows-no_punctured_columns) * Zc-removed_bit);i++)
for (int j=macro_segment; j < macro_segment_end; j++)
output[j][i] = (cc[2*Zc+i]>>(j-macro_segment))&1;
for (int i=0;i<((nrows-no_punctured_columns) * Zc-removed_bit);i++)
//for (j=0; j<n_segments; j++)
for (j=macro_segment; j < macro_segment_end; j++)
channel_input[j][block_length-2*Zc+i] = (d[i]>>(j-macro_segment))&1;
for (int j=macro_segment; j < macro_segment_end; j++)
output[j][block_length-2*Zc+i] = (dd[i]>>(j-macro_segment))&1;
}
#else
......
/*******************************************************************************
Copyright (c) 2009-2018, Intel Corporation
Redistribution and use in source and binary forms, with or without
modification, are permitted provided that the following conditions are met:
* Redistributions of source code must retain the above copyright notice,
this list of conditions and the following disclaimer.
* Redistributions in binary form must reproduce the above copyright
notice, this list of conditions and the following disclaimer in the
documentation and/or other materials provided with the distribution.
* Neither the name of Intel Corporation nor the names of its contributors
may be used to endorse or promote products derived from this software
without specific prior written permission.
THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE
FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
*******************************************************************************/
/* Common data types, macros and functions used across the CRC library */
#ifndef CRC_TYPES_H_
#define CRC_TYPES_H_
#ifdef __KERNEL__
#include <asm/i387.h>
#include <linux/types.h>
typedef uint32_t uint_fast32_t;
typedef uint16_t uint_fast16_t;
typedef uint8_t uint_fast8_t;
#else
#include <stdint.h>
#include <stddef.h>
#endif
/* Declare variable at address aligned to a boundary */
#define DECLARE_ALIGNED(_declaration, _boundary) \
_declaration __attribute__((aligned(_boundary)))
/* Macro to make function to be always inlined */
#ifndef DEBUG
#define __forceinline \
static inline __attribute__((always_inline))
#else
#define __forceinline \
static
#endif
/* Likely & unliekly hints for the compiler */
#define likely(x) __builtin_expect(!!(x), 1)
#define unlikely(x) __builtin_expect(!!(x), 0)
/* Macro to get dimension of an array */
#ifndef DIM
#define DIM(x) (sizeof(x)/sizeof(x[0]))
#endif
/**
* Common functions
*/
/**
* @brief Swaps bytes in 16 bit word
*
* @param val 16 bit data value
*
* @return byte swapped value
*/
__forceinline uint16_t bswap2(const uint16_t val)
{
return (uint16_t) ((val >> 8) | (val << 8));
}
/**
* @brief Swaps bytes in 32 bit word
* ABCD -> DCBA
*
* @param val 32 bit data value
*
* @return byte swapped value
*/
__forceinline uint32_t bswap4(const uint32_t val)
{
return ((val >> 24) | /**< A*/
((val & 0xff0000) >> 8) | /**< B*/
((val & 0xff00) << 8) | /**< C*/
(val << 24)); /**< D*/
}
#endif /* CRC_TYPES_H_ */
......@@ -458,7 +458,7 @@ int init_nr_ue_signal(PHY_VARS_NR_UE *ue,
ue->decode_SIB = 1;
init_nr_prach_tables(839);
init_symbol_rotation(fp);
return 0;
}
......
......@@ -209,7 +209,6 @@ uint32_t get_samples_per_slot(int slot, NR_DL_FRAME_PARMS* fp)
return samp_count;
}
uint32_t get_slot_from_timestamp(openair0_timestamp timestamp_rx, NR_DL_FRAME_PARMS* fp)
{
uint32_t slot_idx = 0;
......
......@@ -36,8 +36,7 @@
\param reset resets the generator
\return 32 bits of the gold sequence
*/
uint32_t lte_gold_generic(uint32_t *x1, uint32_t *x2, uint8_t reset);
#include <openair1/PHY/LTE_TRANSPORT/transport_proto.h>
/*!\brief This function generates the LTE Gold sequence (36-211, Sec 7.2), specifically for DL reference signals.
@param frame_parms LTE DL Frame parameters
......
/*
* Licensed to the OpenAirInterface (OAI) Software Alliance under one or more
* contributor license agreements. See the NOTICE file distributed with
* this work for additional information regarding copyright ownership.
* The OpenAirInterface Software Alliance licenses this file to You under
* the OAI Public License, Version 1.1 (the "License"); you may not use this file
* except in compliance with the License.
* You may obtain a copy of the License at
*
* http://www.openairinterface.org/?page_id=698
*
* Unless required by applicable law or agreed to in writing, software
* distributed under the License is distributed on an "AS IS" BASIS,
* WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
* See the License for the specific language governing permissions and
* limitations under the License.
*-------------------------------------------------------------------------------
* For more information about the OpenAirInterface (OAI) Software Alliance:
* contact@openairinterface.org
*/
#include "PHY/types.h"
/**
\brief Gold Sequence Generation defined in 3x.211
\param x1 x1 shift register
\param x2 x2 shift register / cinit if reset is set
\param reset Reset flag / reinitialize the generator
\return c 32 bits of gold output
*/
extern inline uint32_t lte_gold_generic(uint32_t *x1, uint32_t *x2, uint8_t reset)
{
int32_t n;
// 3GPP 3x.211
// Nc = 1600
// c(n) = [x1(n+Nc) + x2(n+Nc)]mod2
// x1(n+31) = [x1(n+3) + x1(n)]mod2
// x2(n+31) = [x2(n+3) + x2(n+2) + x2(n+1) + x2(n)]mod2
if (reset)
{
// Init value for x1: x1(0) = 1, x1(n) = 0, n=1,2,...,30
// x1(31) = [x1(3) + x1(0)]mod2 = 1
*x1 = 1 + (1U<<31);
// Init value for x2: cinit = sum_{i=0}^30 x2*2^i
// x2(31) = [x2(3) + x2(2) + x2(1) + x2(0)]mod2
// = (*x2>>3) ^ (*x2>>2) + (*x2>>1) + *x2
*x2 = *x2 ^ ((*x2 ^ (*x2>>1) ^ (*x2>>2) ^ (*x2>>3))<<31);
// x1 and x2 contain bits n = 0,1,...,31
// Nc = 1600 bits are skipped at the beginning
// i.e., 1600 / 32 = 50 32bit words
for (n = 1; n < 50; n++)
{
// Compute x1(0),...,x1(27)
*x1 = (*x1>>1) ^ (*x1>>4);
// Compute x1(28),..,x1(31) and xor
*x1 = *x1 ^ (*x1<<31) ^ (*x1<<28);
// Compute x2(0),...,x2(27)
*x2 = (*x2>>1) ^ (*x2>>2) ^ (*x2>>3) ^ (*x2>>4);
// Compute x2(28),..,x2(31) and xor
*x2 = *x2 ^ (*x2<<31) ^ (*x2<<30) ^ (*x2<<29) ^ (*x2<<28);
}
}
*x1 = (*x1>>1) ^ (*x1>>4);
*x1 = *x1 ^ (*x1<<31) ^ (*x1<<28);
*x2 = (*x2>>1) ^ (*x2>>2) ^ (*x2>>3) ^ (*x2>>4);
*x2 = *x2 ^ (*x2<<31) ^ (*x2<<30) ^ (*x2<<29) ^ (*x2<<28);
// c(n) = [x1(n+Nc) + x2(n+Nc)]mod2
return(*x1^*x2);
}
......@@ -147,10 +147,10 @@ uint32_t get_TBS_UL(uint8_t mcs, uint16_t nb_rb) {
}
}
int adjust_G2(LTE_DL_FRAME_PARMS *frame_parms, uint32_t *rb_alloc, uint8_t mod_order, uint8_t subframe, uint8_t symbol) {
int adjust_G2(int Ncp, int frame_type, int N_RB_DL, uint32_t *rb_alloc, uint8_t mod_order, uint8_t subframe, uint8_t symbol) {
int rb,re_pbch_sss=0;
int rb_alloc_ind,nsymb;
nsymb = (frame_parms->Ncp==NORMAL) ? 14 : 12;
nsymb = (Ncp==NORMAL) ? 14 : 12;
// printf("adjust_G2 : symbol %d, subframe %d\n",symbol,subframe);
if ((subframe!=0) && (subframe!=5) && (subframe!=6)) // if not PBCH/SSS or SSS
......@@ -158,12 +158,12 @@ int adjust_G2(LTE_DL_FRAME_PARMS *frame_parms, uint32_t *rb_alloc, uint8_t mod_o
//first half of slot and TDD (no adjustments in first slot except for subframe 6 - PSS)
if ((symbol<(nsymb>>1))&&
(frame_parms->frame_type == TDD)&&
(frame_type == TDD)&&
(subframe!=6))
return(0);
// after PBCH
if (frame_parms->frame_type==TDD) { //TDD
if (frame_type==TDD) { //TDD
if ((symbol>((nsymb>>1)+3)) &&
(symbol!=(nsymb-1))) ///SSS
return(0);
......@@ -185,9 +185,9 @@ int adjust_G2(LTE_DL_FRAME_PARMS *frame_parms, uint32_t *rb_alloc, uint8_t mod_o
return(0);
}
if ((frame_parms->N_RB_DL&1) == 1) { // ODD N_RB_DL
for (rb=((frame_parms->N_RB_DL>>1)-3);
rb<=((frame_parms->N_RB_DL>>1)+3);
if ((N_RB_DL&1) == 1) { // ODD N_RB_DL
for (rb=((N_RB_DL>>1)-3);
rb<=((N_RB_DL>>1)+3);
rb++) {
if (rb < 32)
rb_alloc_ind = (rb_alloc[0]>>rb) & 1;
......@@ -201,16 +201,16 @@ int adjust_G2(LTE_DL_FRAME_PARMS *frame_parms, uint32_t *rb_alloc, uint8_t mod_o
rb_alloc_ind = 0;
if (rb_alloc_ind==1) {
if ((rb==(frame_parms->N_RB_DL>>1)-3) ||
(rb==((frame_parms->N_RB_DL>>1)+3))) {
if ((rb==(N_RB_DL>>1)-3) ||
(rb==((N_RB_DL>>1)+3))) {
re_pbch_sss += 6;
} else
re_pbch_sss += 12;
}
}
} else {
for (rb=((frame_parms->N_RB_DL>>1)-3);
rb<((frame_parms->N_RB_DL>>1)+3);
for (rb=((N_RB_DL>>1)-3);
rb<((N_RB_DL>>1)+3);
rb++) {
if (rb < 32)
rb_alloc_ind = (rb_alloc[0]>>rb) & 1;
......
......@@ -44,7 +44,7 @@ void pcfich_scrambling(LTE_DL_FRAME_PARMS *frame_parms,
{
uint32_t i;
uint8_t reset;
uint32_t x1, x2, s=0;
uint32_t x1=0, x2, s=0;
reset = 1;
// x1 is set in lte_gold_generic
......
......@@ -895,7 +895,7 @@ uint32_t rx_pucch(PHY_VARS_eNB *eNB,
int frame,
uint8_t subframe,
uint8_t pucch1_thres,
uint8_t br_flag
int br_flag
)
//-----------------------------------------------------------------------------
{
......
......@@ -101,7 +101,7 @@ int get_G(LTE_DL_FRAME_PARMS *frame_parms,uint16_t nb_rb,uint32_t *rb_alloc,uint
int get_G_khz_1dot25(LTE_DL_FRAME_PARMS *frame_parms,uint16_t nb_rb,uint32_t *rb_alloc,uint8_t mod_order,uint8_t Nl,uint8_t num_pdcch_symbols,int frame,uint8_t subframe, uint8_t beamforming_mode);
int adjust_G(LTE_DL_FRAME_PARMS *frame_parms,uint32_t *rb_alloc,uint8_t mod_order,uint8_t subframe);
int adjust_G2(LTE_DL_FRAME_PARMS *frame_parms,uint32_t *rb_alloc,uint8_t mod_order,uint8_t subframe,uint8_t symbol);
int adjust_G2(int Ncp, int frame_type, int N_RB_DL, uint32_t *rb_alloc,uint8_t mod_order,uint8_t subframe,uint8_t symbol);
#ifndef modOrder
......
......@@ -700,7 +700,51 @@ int find_ulsch(uint16_t rnti, PHY_VARS_eNB *eNB,find_type_t type);
int find_uci(uint16_t rnti, int frame, int subframe, PHY_VARS_eNB *eNB,find_type_t type);
uint32_t lte_gold_generic(uint32_t *x1, uint32_t *x2, uint8_t reset);
static inline uint32_t lte_gold_generic(uint32_t *x1, uint32_t *x2, uint8_t reset)
{
int32_t n;
// 3GPP 3x.211
// Nc = 1600
// c(n) = [x1(n+Nc) + x2(n+Nc)]mod2
// x1(n+31) = [x1(n+3) + x1(n)]mod2
// x2(n+31) = [x2(n+3) + x2(n+2) + x2(n+1) + x2(n)]mod2
if (reset)
{
// Init value for x1: x1(0) = 1, x1(n) = 0, n=1,2,...,30
// x1(31) = [x1(3) + x1(0)]mod2 = 1
*x1 = 1 + (1U<<31);
// Init value for x2: cinit = sum_{i=0}^30 x2*2^i
// x2(31) = [x2(3) + x2(2) + x2(1) + x2(0)]mod2
// = (*x2>>3) ^ (*x2>>2) + (*x2>>1) + *x2
*x2 = *x2 ^ ((*x2 ^ (*x2>>1) ^ (*x2>>2) ^ (*x2>>3))<<31);
// x1 and x2 contain bits n = 0,1,...,31
// Nc = 1600 bits are skipped at the beginning
// i.e., 1600 / 32 = 50 32bit words
for (n = 1; n < 50; n++)
{
// Compute x1(0),...,x1(27)
*x1 = (*x1>>1) ^ (*x1>>4);
// Compute x1(28),..,x1(31) and xor
*x1 = *x1 ^ (*x1<<31) ^ (*x1<<28);
// Compute x2(0),...,x2(27)
*x2 = (*x2>>1) ^ (*x2>>2) ^ (*x2>>3) ^ (*x2>>4);
// Compute x2(28),..,x2(31) and xor
*x2 = *x2 ^ (*x2<<31) ^ (*x2<<30) ^ (*x2<<29) ^ (*x2<<28);
}
}
*x1 = (*x1>>1) ^ (*x1>>4);
*x1 = *x1 ^ (*x1<<31) ^ (*x1<<28);
*x2 = (*x2>>1) ^ (*x2>>2) ^ (*x2>>3) ^ (*x2>>4);
*x2 = *x2 ^ (*x2<<31) ^ (*x2<<30) ^ (*x2<<29) ^ (*x2<<28);
// c(n) = [x1(n+Nc) + x2(n+Nc)]mod2
return(*x1^*x2);
}
/**@}*/
......
......@@ -1293,7 +1293,7 @@ void compute_llr_offset(LTE_DL_FRAME_PARMS *frame_parms,
}
granted_re = nb_rb_alloc * (12-crs_re);
pbch_pss_sss_re = adjust_G2(frame_parms,dlsch0_harq->rb_alloc_even,dlsch0_harq->Qm,subframe,symbol);
pbch_pss_sss_re = adjust_G2(frame_parms->Ncp,frame_parms->frame_type, frame_parms->N_RB_DL,dlsch0_harq->rb_alloc_even,dlsch0_harq->Qm,subframe,symbol);
pbch_pss_sss_re = (double)pbch_pss_sss_re * ((double)(12-crs_re)/12);
data_re = granted_re - pbch_pss_sss_re;
llr_offset = data_re * dlsch0_harq->Qm * 2;
......
......@@ -746,7 +746,7 @@ int32_t dlsch_qpsk_llr_SIC(LTE_DL_FRAME_PARMS *frame_parms,
amp_tmp=amp_tmp<<1; // to compensate for >> 1 shift in modulation
pbch_pss_sss_adjust=adjust_G2(frame_parms,&rb_alloc,2,subframe,symbol);
pbch_pss_sss_adjust=adjust_G2(frame_parms->Ncp,frame_parms->frame_type, frame_parms->N_RB_DL ,&rb_alloc,2,subframe,symbol);
if ((symbol_mod==0) || (symbol_mod==(4-frame_parms->Ncp))) {
if (frame_parms->nb_antenna_ports_eNB!=1)
......@@ -981,7 +981,7 @@ void dlsch_16qam_llr_SIC (LTE_DL_FRAME_PARMS *frame_parms,
symbol_mod = (symbol>=(7-frame_parms->Ncp)) ? symbol-(7-frame_parms->Ncp) : symbol;
pbch_pss_sss_adjust=adjust_G2(frame_parms,&rb_alloc,4,subframe,symbol);
pbch_pss_sss_adjust=adjust_G2(frame_parms->Ncp,frame_parms->frame_type, frame_parms->N_RB_DL,&rb_alloc,4,subframe,symbol);
if ((symbol_mod==0) || (symbol_mod==(4-frame_parms->Ncp))) {
amp_tmp=0x1fff;//dlsch0->sqrt_rho_b; already taken into account
......@@ -1281,7 +1281,7 @@ void dlsch_64qam_llr_SIC(LTE_DL_FRAME_PARMS *frame_parms,
symbol_mod = (symbol>=(7-frame_parms->Ncp)) ? symbol-(7-frame_parms->Ncp) : symbol;
pbch_pss_sss_adjust=adjust_G2(frame_parms,&rb_alloc,6,subframe,symbol);
pbch_pss_sss_adjust=adjust_G2(frame_parms->Ncp,frame_parms->frame_type, frame_parms->N_RB_DL,&rb_alloc,6,subframe,symbol);
if ((symbol_mod==0) || (symbol_mod==(4-frame_parms->Ncp))) {
amp_tmp = 0x1fff;//dlsch0->sqrt_rho_b; already taken into account
......
......@@ -336,8 +336,8 @@ void generate_pucch1x(int32_t **txdataF,
inline void pucch2x_scrambling(LTE_DL_FRAME_PARMS *fp,int subframe,uint16_t rnti,uint32_t B,uint8_t *btilde) __attribute__((always_inline));
inline void pucch2x_scrambling(LTE_DL_FRAME_PARMS *fp,int subframe,uint16_t rnti,uint32_t B,uint8_t *btilde) {
static inline void pucch2x_scrambling(LTE_DL_FRAME_PARMS *fp,int subframe,uint16_t rnti,uint32_t B,uint8_t *btilde) __attribute__((always_inline));
static inline void pucch2x_scrambling(LTE_DL_FRAME_PARMS *fp,int subframe,uint16_t rnti,uint32_t B,uint8_t *btilde) {
uint32_t x1, x2, s=0;
int i;
......
......@@ -1303,7 +1303,7 @@ uint32_t conv_nprb(uint8_t ra_header,uint32_t rb_alloc,int N_RB_DL);
int get_G(LTE_DL_FRAME_PARMS *frame_parms,uint16_t nb_rb,uint32_t *rb_alloc,uint8_t mod_order,uint8_t Nl,uint8_t num_pdcch_symbols,int frame,uint8_t subframe, uint8_t beamforming_mode);
int adjust_G(LTE_DL_FRAME_PARMS *frame_parms,uint32_t *rb_alloc,uint8_t mod_order,uint8_t subframe);
int adjust_G2(LTE_DL_FRAME_PARMS *frame_parms,uint32_t *rb_alloc,uint8_t mod_order,uint8_t subframe,uint8_t symbol);
#ifndef modOrder
......
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......@@ -43,8 +43,6 @@ void nr_check_time_alloc(uint8_t S, uint8_t L,nfapi_nr_dl_tti_pdsch_pdu_rel15_t
uint16_t get_RIV(uint16_t rb_start, uint16_t L, uint16_t N_RB);
uint16_t get_SLIV(uint8_t S, uint8_t L);
uint8_t nr_get_S(uint8_t row_idx, uint8_t CP, uint8_t time_alloc_type, uint8_t dmrs_typeA_position);
void nr_get_rbg_parms(NR_BWP_PARMS* bwp, uint8_t config_type);
......@@ -85,6 +83,7 @@ int nr_dlsch_encoding(PHY_VARS_gNB *gNB,
uint8_t slot,
NR_gNB_DLSCH_t *dlsch,
NR_DL_FRAME_PARMS* frame_parms,
unsigned char * output,
time_stats_t *tinput,
time_stats_t *tprep,
time_stats_t *tparity,
......
This diff is collapsed.
......@@ -96,11 +96,6 @@ void nr_get_time_domain_allocation_type(nfapi_nr_config_request_t config,
}
}
uint16_t get_SLIV(uint8_t S, uint8_t L) {
return ( (uint16_t)(((L-1)<=7)? (14*(L-1)+S) : (14*(15-L)+(13-S))) );
}
static inline uint8_t get_K0(uint8_t row_idx, uint8_t time_alloc_type) {
return ( (time_alloc_type == NFAPI_NR_PDSCH_TIME_DOMAIN_ALLOC_TYPE_DEFAULT_A)||
(time_alloc_type == NFAPI_NR_PDSCH_TIME_DOMAIN_ALLOC_TYPE_DEFAULT_C)? 0 :
......
......@@ -376,9 +376,11 @@ int nr_rx_pdsch(PHY_VARS_NR_UE *ue,
len = (pilots==1)? ((config_type==NFAPI_NR_DMRS_TYPE1)?nb_rb*(12-6*dlsch0_harq->n_dmrs_cdm_groups): nb_rb*(12-4*dlsch0_harq->n_dmrs_cdm_groups)):(nb_rb*12);
stop_meas(&ue->generic_stat_bis[proc->thread_id][slot]);
#ifdef DEBUG_PDSCH_RX
LOG_I(PHY, "[AbsSFN %u.%d] Slot%d Symbol %d type %d: Pilot/Data extraction %5.2f \n",
#if DISABLE_LOG_X
printf("[AbsSFN %u.%d] Slot%d Symbol %d type %d: Pilot/Data extraction %5.2f \n",
frame,nr_slot_rx,slot,symbol,type,ue->generic_stat_bis[proc->thread_id][slot].p_time/(cpuf*1000.0));
#else
LOG_D(PHY, "[AbsSFN %u.%d] Slot%d Symbol %d type %d: Pilot/Data extraction %5.2f \n",
frame,nr_slot_rx,slot,symbol,type,ue->generic_stat_bis[proc->thread_id][slot].p_time/(cpuf*1000.0));
#endif
......@@ -397,11 +399,11 @@ int nr_rx_pdsch(PHY_VARS_NR_UE *ue,
nb_rb_pdsch);
stop_meas(&ue->generic_stat_bis[proc->thread_id][slot]);
#ifdef DEBUG_PDSCH_RX
LOG_I(PHY, "[AbsSFN %u.%d] Slot%d Symbol %d: Channel Scale %5.2f \n",frame,nr_slot_rx,slot,symbol,ue->generic_stat_bis[proc->thread_id][slot].p_time/(cpuf*1000.0));
#if DISABLE_LOG_X
printf("[AbsSFN %u.%d] Slot%d Symbol %d: Channel Scale %5.2f \n",frame,nr_slot_rx,slot,symbol,ue->generic_stat_bis[proc->thread_id][slot].p_time/(cpuf*1000.0));
#else
LOG_D(PHY, "[AbsSFN %u.%d] Slot%d Symbol %d: Channel Scale %5.2f \n",frame,nr_slot_rx,slot,symbol,ue->generic_stat_bis[proc->thread_id][slot].p_time/(cpuf*1000.0));
#endif
start_meas(&ue->generic_stat_bis[proc->thread_id][slot]);
if (first_symbol_flag==1) {
if (beamforming_mode==0){
......@@ -458,9 +460,10 @@ int nr_rx_pdsch(PHY_VARS_NR_UE *ue,
#endif
stop_meas(&ue->generic_stat_bis[proc->thread_id][slot]);
#ifdef DEBUG_PDSCH_RX
LOG_I(PHY, "[AbsSFN %u.%d] Slot%d Symbol %d first_symbol_flag %d: Channel Level %5.2f \n",frame,nr_slot_rx,slot,symbol,first_symbol_flag,ue->generic_stat_bis[proc->thread_id][slot].p_time/(cpuf*1000.0));
#if DISABLE_LOG_X
printf("[AbsSFN %u.%d] Slot%d Symbol %d first_symbol_flag %d: Channel Level %5.2f \n",frame,nr_slot_rx,slot,symbol,first_symbol_flag,ue->generic_stat_bis[proc->thread_id][slot].p_time/(cpuf*1000.0));
#else
LOG_D(PHY, "[AbsSFN %u.%d] Slot%d Symbol %d first_symbol_flag %d: Channel Level %5.2f \n",frame,nr_slot_rx,slot,symbol,first_symbol_flag,ue->generic_stat_bis[proc->thread_id][slot].p_time/(cpuf*1000.0));
#endif
start_meas(&ue->generic_stat_bis[proc->thread_id][slot]);
......@@ -509,11 +512,11 @@ int nr_rx_pdsch(PHY_VARS_NR_UE *ue,
}
stop_meas(&ue->generic_stat_bis[proc->thread_id][slot]);
#ifdef DEBUG_PDSCH_RX
LOG_I(PHY, "[AbsSFN %u.%d] Slot%d Symbol %d log2_maxh %d channel_level %d: Channel Comp %5.2f \n", frame, nr_slot_rx, slot, symbol, pdsch_vars[gNB_id]->log2_maxh, proc->channel_level, ue->generic_stat_bis[proc->thread_id][slot].p_time/(cpuf*1000.0));
#if DISABLE_LOG_X
printf("[AbsSFN %u.%d] Slot%d Symbol %d log2_maxh %d channel_level %d: Channel Comp %5.2f \n", frame, nr_slot_rx, slot, symbol, pdsch_vars[gNB_id]->log2_maxh, proc->channel_level, ue->generic_stat_bis[proc->thread_id][slot].p_time/(cpuf*1000.0));
#else
LOG_D(PHY, "[AbsSFN %u.%d] Slot%d Symbol %d log2_maxh %d channel_level %d: Channel Comp %5.2f \n", frame, nr_slot_rx, slot, symbol, pdsch_vars[gNB_id]->log2_maxh, proc->channel_level, ue->generic_stat_bis[proc->thread_id][slot].p_time/(cpuf*1000.0));
#endif
start_meas(&ue->generic_stat_bis[proc->thread_id][slot]);
if (frame_parms->nb_antennas_rx > 1) {
......@@ -568,11 +571,11 @@ int nr_rx_pdsch(PHY_VARS_NR_UE *ue,
}
stop_meas(&ue->generic_stat_bis[proc->thread_id][slot]);
#ifdef DEBUG_PDSCH_RX
LOG_I(PHY, "[AbsSFN %u.%d] Slot%d Symbol %d: Channel Combine %5.2f \n",frame,nr_slot_rx,slot,symbol,ue->generic_stat_bis[proc->thread_id][slot].p_time/(cpuf*1000.0));
#if DISABLE_LOG_X
printf("[AbsSFN %u.%d] Slot%d Symbol %d: Channel Combine %5.2f \n",frame,nr_slot_rx,slot,symbol,ue->generic_stat_bis[proc->thread_id][slot].p_time/(cpuf*1000.0));
#else
LOG_D(PHY, "[AbsSFN %u.%d] Slot%d Symbol %d: Channel Combine %5.2f \n",frame,nr_slot_rx,slot,symbol,ue->generic_stat_bis[proc->thread_id][slot].p_time/(cpuf*1000.0));
#endif
start_meas(&ue->generic_stat_bis[proc->thread_id][slot]);
/* Store the valid DL RE's */
pdsch_vars[gNB_id]->dl_valid_re[symbol-1] = len;
......@@ -651,9 +654,10 @@ int nr_rx_pdsch(PHY_VARS_NR_UE *ue,
}
stop_meas(&ue->generic_stat_bis[proc->thread_id][slot]);
#ifdef DEBUG_PDSCH_RX
LOG_I(PHY, "[AbsSFN %u.%d] Slot%d Symbol %d: LLR Computation %5.2f \n",frame,nr_slot_rx,slot,symbol,ue->generic_stat_bis[proc->thread_id][slot].p_time/(cpuf*1000.0));
#if DISABLE_LOG_X
printf("[AbsSFN %u.%d] Slot%d Symbol %d: LLR Computation %5.2f \n",frame,nr_slot_rx,slot,symbol,ue->generic_stat_bis[proc->thread_id][slot].p_time/(cpuf*1000.0));
#else
LOG_D(PHY, "[AbsSFN %u.%d] Slot%d Symbol %d: LLR Computation %5.2f \n",frame,nr_slot_rx,slot,symbol,ue->generic_stat_bis[proc->thread_id][slot].p_time/(cpuf*1000.0));
#endif
// Please keep it: useful for debugging
......
......@@ -947,7 +947,7 @@ void nr_dlsch_64qam_llr_SIC(NR_DL_FRAME_PARMS *frame_parms,
symbol_mod = (symbol>=(7-frame_parms->Ncp)) ? symbol-(7-frame_parms->Ncp) : symbol;
pbch_pss_sss_adjust=adjust_G2(frame_parms,&rb_alloc,6,subframe,symbol);
pbch_pss_sss_adjust=adjust_G2(frame_parms->Ncp,frame_parms->frame_type, frame_parms->N_RB_DL,&rb_alloc,6,subframe,symbol);
if ((symbol_mod==0) || (symbol_mod==(4-frame_parms->Ncp))) {
amp_tmp = 0x1fff;//dlsch0->sqrt_rho_b; already taken into account
......
......@@ -105,7 +105,8 @@ void nr_ue_ulsch_procedures(PHY_VARS_NR_UE *UE,
uint32_t scrambled_output[NR_MAX_NB_CODEWORDS][NR_MAX_PDSCH_ENCODED_LENGTH>>5];
int16_t **tx_layers;
int32_t **txdataF;
int8_t Wf[2], Wt[2], l_prime[2], delta;
int8_t Wf[2], Wt[2];
int l_prime[2], delta;
uint8_t nb_dmrs_re_per_rb;
int ap, i;
int sample_offsetF, N_RE_prime;
......@@ -411,7 +412,7 @@ void nr_ue_ulsch_procedures(PHY_VARS_NR_UE *UE,
if (is_dmrs == 1) {
// if transform precoding is enabled
if (pusch_pdu->transform_precoding == 0) {
((int16_t*)txdataF[ap])[(sample_offsetF)<<1] = (Wt[l_prime[0]]*Wf[k_prime]*AMP*dmrs_seq[2*dmrs_idx]) >> 15;
((int16_t*)txdataF[ap])[((sample_offsetF)<<1) + 1] = (Wt[l_prime[0]]*Wf[k_prime]*AMP*dmrs_seq[(2*dmrs_idx) + 1]) >> 15;
......
......@@ -805,8 +805,8 @@ void nr_generate_pucch1_old(PHY_VARS_NR_UE *ue,
}
#endif //0
inline void nr_pucch2_3_4_scrambling(uint16_t M_bit,uint16_t rnti,uint16_t n_id,uint64_t *B64,uint8_t *btilde) __attribute__((always_inline));
inline void nr_pucch2_3_4_scrambling(uint16_t M_bit,uint16_t rnti,uint16_t n_id,uint64_t *B64,uint8_t *btilde) {
static inline void nr_pucch2_3_4_scrambling(uint16_t M_bit,uint16_t rnti,uint16_t n_id,uint64_t *B64,uint8_t *btilde) __attribute__((always_inline));
static inline void nr_pucch2_3_4_scrambling(uint16_t M_bit,uint16_t rnti,uint16_t n_id,uint64_t *B64,uint8_t *btilde) {
uint32_t x1, x2, s=0;
int i;
uint8_t c;
......
......@@ -96,20 +96,6 @@ typedef struct {
uint32_t subframe;
/// MIMO mode for this DLSCH
MIMO_mode_t mimo_mode;
/// Concatenated sequences
uint8_t *e;
/// LDPC-code outputs
uint8_t *d[MAX_NUM_NR_DLSCH_SEGMENTS];
/// Interleaver outputs
uint8_t *f;
/// Number of code segments
uint32_t C;
/// Number of bits in "small" code segments
uint32_t K;
/// Number of "Filler" bits
uint32_t F;
/// Encoder BG
uint8_t BG;
/// LDPC lifting size
uint32_t Z;
} NR_DL_gNB_HARQ_t;
......@@ -868,6 +854,9 @@ typedef struct PHY_VARS_gNB_s {
time_stats_t dlsch_encoding_stats;
time_stats_t dlsch_modulation_stats;
time_stats_t dlsch_scrambling_stats;
time_stats_t dlsch_resource_mapping_stats;
time_stats_t dlsch_layer_mapping_stats;
time_stats_t dlsch_precoding_stats;
time_stats_t tinput;
time_stats_t tprep;
time_stats_t tparity;
......
......@@ -263,7 +263,7 @@ void nr_postDecode(PHY_VARS_gNB *gNB, notifiedFIFO_elt_t *req) {
nr_fill_indication(gNB,ulsch_harq->frame, ulsch_harq->slot, rdata->ulsch_id, rdata->harq_pid, 0,0);
//dumpsig=1;
} else {
LOG_I(PHY,"[gNB %d] ULSCH: Setting NAK for SFN/SF %d/%d (pid %d, ndi %d, status %d, round %d, RV %d, prb_start %d, prb_size %d, TBS %d) r %d\n",
LOG_D(PHY,"[gNB %d] ULSCH: Setting NAK for SFN/SF %d/%d (pid %d, ndi %d, status %d, round %d, RV %d, prb_start %d, prb_size %d, TBS %d) r %d\n",
gNB->Mod_id, ulsch_harq->frame, ulsch_harq->slot,
rdata->harq_pid, pusch_pdu->pusch_data.new_data_indicator, ulsch_harq->status,
ulsch_harq->round,
......@@ -358,10 +358,11 @@ void nr_ulsch_procedures(PHY_VARS_gNB *gNB, int frame_rx, int slot_rx, int ULSCH
number_dmrs_symbols, // number of dmrs symbols irrespective of single or double symbol dmrs
pusch_pdu->qam_mod_order,
pusch_pdu->nrOfLayers);
LOG_D(PHY,"rb_size %d, number_symbols %d, nb_re_dmrs %d, number_dmrs_symbols %d, qam_mod_order %d, nrOfLayer %d\n",
LOG_D(PHY,"rb_size %d, number_symbols %d, nb_re_dmrs %d, dmrs symbol positions %d, number_dmrs_symbols %d, qam_mod_order %d, nrOfLayer %d\n",
pusch_pdu->rb_size,
number_symbols,
nb_re_dmrs,
pusch_pdu->ul_dmrs_symb_pos,
number_dmrs_symbols, // number of dmrs symbols irrespective of single or double symbol dmrs
pusch_pdu->qam_mod_order,
pusch_pdu->nrOfLayers);
......
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......@@ -412,7 +412,7 @@ typedef struct NRRrcConfigurationReq_s {
int sib1_tda;
int pdsch_AntennaPorts;
int pusch_AntennaPorts;
int minRXTXTIMEpdsch;
int minRXTXTIME;
int do_CSIRS;
int pusch_TargetSNRx10;
int pucch_TargetSNRx10;
......
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......@@ -129,7 +129,7 @@ long get_k2(NR_UE_MAC_INST_t *mac, uint8_t time_domain_ind) {
}
AssertFatal(k2 >= DURATION_RX_TO_TX,
"Slot offset K2 (%ld) cannot be less than DURATION_RX_TO_TX (%d)\n",
"Slot offset K2 (%ld) cannot be less than DURATION_RX_TO_TX (%d). K2 set according to min_rxtxtime in config file.\n",
k2,DURATION_RX_TO_TX);
LOG_D(NR_MAC, "get_k2(): k2 is %ld\n", k2);
......
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