Commit d017fe11 authored by Laurent THOMAS's avatar Laurent THOMAS

2754 Introduce gold sequence cache

parent 4fd8844d
...@@ -1030,6 +1030,7 @@ set(PHY_SRC_UE ...@@ -1030,6 +1030,7 @@ set(PHY_SRC_UE
${OPENAIR1_DIR}/PHY/NR_TRANSPORT/nr_csi_rs.c ${OPENAIR1_DIR}/PHY/NR_TRANSPORT/nr_csi_rs.c
${OPENAIR1_DIR}/PHY/NR_TRANSPORT/nr_scrambling.c ${OPENAIR1_DIR}/PHY/NR_TRANSPORT/nr_scrambling.c
${OPENAIR1_DIR}/PHY/NR_REFSIG/scrambling_luts.c ${OPENAIR1_DIR}/PHY/NR_REFSIG/scrambling_luts.c
${OPENAIR1_DIR}/PHY/NR_REFSIG/refsig.c
${OPENAIR1_DIR}/PHY/NR_UE_TRANSPORT/srs_modulation_nr.c ${OPENAIR1_DIR}/PHY/NR_UE_TRANSPORT/srs_modulation_nr.c
) )
......
...@@ -140,109 +140,27 @@ int phy_init_nr_gNB(PHY_VARS_gNB *gNB) ...@@ -140,109 +140,27 @@ int phy_init_nr_gNB(PHY_VARS_gNB *gNB)
gNB->max_nb_pdsch = MAX_MOBILES_PER_GNB; gNB->max_nb_pdsch = MAX_MOBILES_PER_GNB;
init_delay_table(fp->ofdm_symbol_size, MAX_DELAY_COMP, NR_MAX_OFDM_SYMBOL_SIZE, fp->delay_table); init_delay_table(fp->ofdm_symbol_size, MAX_DELAY_COMP, NR_MAX_OFDM_SYMBOL_SIZE, fp->delay_table);
// PBCH DMRS gold sequences generation
nr_init_pbch_dmrs(gNB);
//PDCCH DMRS init
gNB->nr_gold_pdcch_dmrs = (uint32_t ***)malloc16(fp->slots_per_frame*sizeof(uint32_t **));
uint32_t ***pdcch_dmrs = gNB->nr_gold_pdcch_dmrs;
AssertFatal(pdcch_dmrs!=NULL, "NR init: pdcch_dmrs malloc failed\n");
gNB->bad_pucch = 0; gNB->bad_pucch = 0;
if (gNB->TX_AMP == 0) if (gNB->TX_AMP == 0)
gNB->TX_AMP = AMP; gNB->TX_AMP = AMP;
// ceil(((NB_RB<<1)*3)/32) // 3 RE *2(QPSK) // ceil(((NB_RB<<1)*3)/32) // 3 RE *2(QPSK)
int pdcch_dmrs_init_length = (((fp->N_RB_DL<<1)*3)>>5)+1;
for (int slot=0; slot<fp->slots_per_frame; slot++) {
pdcch_dmrs[slot] = (uint32_t **)malloc16(fp->symbols_per_slot*sizeof(uint32_t *));
AssertFatal(pdcch_dmrs[slot]!=NULL, "NR init: pdcch_dmrs for slot %d - malloc failed\n", slot);
for (int symb=0; symb<fp->symbols_per_slot; symb++) {
pdcch_dmrs[slot][symb] = (uint32_t *)malloc16(pdcch_dmrs_init_length*sizeof(uint32_t));
LOG_D(PHY,"pdcch_dmrs[%d][%d] %p\n",slot,symb,pdcch_dmrs[slot][symb]);
AssertFatal(pdcch_dmrs[slot][symb]!=NULL, "NR init: pdcch_dmrs for slot %d symbol %d - malloc failed\n", slot, symb);
}
}
nr_generate_modulation_table(); nr_generate_modulation_table();
gNB->pdcch_gold_init = cfg->cell_config.phy_cell_id.value; gNB->pdcch_gold_init = cfg->cell_config.phy_cell_id.value;
nr_init_pdcch_dmrs(gNB, cfg->cell_config.phy_cell_id.value);
nr_init_pbch_interleaver(gNB->nr_pbch_interleaver); nr_init_pbch_interleaver(gNB->nr_pbch_interleaver);
//PDSCH DMRS init
gNB->nr_gold_pdsch_dmrs = (uint32_t ****)malloc16(fp->slots_per_frame*sizeof(uint32_t ***));
uint32_t ****pdsch_dmrs = gNB->nr_gold_pdsch_dmrs;
// ceil(((NB_RB*12(k)*2(QPSK)/32) // 3 RE *2(QPSK)
const int pdsch_dmrs_init_length = ((fp->N_RB_DL*24)>>5)+1;
for (int slot=0; slot<fp->slots_per_frame; slot++) {
pdsch_dmrs[slot] = (uint32_t ***)malloc16(fp->symbols_per_slot*sizeof(uint32_t **));
AssertFatal(pdsch_dmrs[slot]!=NULL, "NR init: pdsch_dmrs for slot %d - malloc failed\n", slot);
for (int symb=0; symb<fp->symbols_per_slot; symb++) {
pdsch_dmrs[slot][symb] = (uint32_t **)malloc16(NR_NB_NSCID*sizeof(uint32_t *));
AssertFatal(pdsch_dmrs[slot][symb]!=NULL, "NR init: pdsch_dmrs for slot %d symbol %d - malloc failed\n", slot, symb);
for (int q=0; q<NR_NB_NSCID; q++) {
pdsch_dmrs[slot][symb][q] = malloc16(pdsch_dmrs_init_length * sizeof(uint32_t));
AssertFatal(pdsch_dmrs[slot][symb][q]!=NULL, "NR init: pdsch_dmrs for slot %d symbol %d nscid %d - malloc failed\n", slot, symb, q);
memset(pdsch_dmrs[slot][symb][q], 0, sizeof(uint32_t) * pdsch_dmrs_init_length);
}
}
}
for (int nscid = 0; nscid < NR_NB_NSCID; nscid++) { for (int nscid = 0; nscid < NR_NB_NSCID; nscid++) {
gNB->pdsch_gold_init[nscid] = cfg->cell_config.phy_cell_id.value; gNB->pdsch_gold_init[nscid] = cfg->cell_config.phy_cell_id.value;
nr_init_pdsch_dmrs(gNB, nscid, cfg->cell_config.phy_cell_id.value);
}
//PUSCH DMRS init
gNB->nr_gold_pusch_dmrs = (uint32_t ****)malloc16(NR_NB_NSCID*sizeof(uint32_t ***));
uint32_t ****pusch_dmrs = gNB->nr_gold_pusch_dmrs;
int pusch_dmrs_init_length = ((fp->N_RB_UL*12)>>5)+1;
for(int nscid=0; nscid<NR_NB_NSCID; nscid++) {
pusch_dmrs[nscid] = (uint32_t ***)malloc16(fp->slots_per_frame*sizeof(uint32_t **));
AssertFatal(pusch_dmrs[nscid]!=NULL, "NR init: pusch_dmrs for nscid %d - malloc failed\n", nscid);
for (int slot=0; slot<fp->slots_per_frame; slot++) {
pusch_dmrs[nscid][slot] = (uint32_t **)malloc16(fp->symbols_per_slot*sizeof(uint32_t *));
AssertFatal(pusch_dmrs[nscid][slot]!=NULL, "NR init: pusch_dmrs for slot %d - malloc failed\n", slot);
for (int symb=0; symb<fp->symbols_per_slot; symb++) {
pusch_dmrs[nscid][slot][symb] = (uint32_t *)malloc16(pusch_dmrs_init_length*sizeof(uint32_t));
AssertFatal(pusch_dmrs[nscid][slot][symb]!=NULL, "NR init: pusch_dmrs for slot %d symbol %d - malloc failed\n", slot, symb);
}
}
} }
for (int nscid=0; nscid<NR_NB_NSCID; nscid++) { for (int nscid=0; nscid<NR_NB_NSCID; nscid++) {
gNB->pusch_gold_init[nscid] = cfg->cell_config.phy_cell_id.value; gNB->pusch_gold_init[nscid] = cfg->cell_config.phy_cell_id.value;
nr_gold_pusch(gNB, nscid, gNB->pusch_gold_init[nscid]);
} }
// CSI RS init // CSI RS init
// ceil((NB_RB*8(max allocation per RB)*2(QPSK))/32) // ceil((NB_RB*8(max allocation per RB)*2(QPSK))/32)
int csi_dmrs_init_length = ((fp->N_RB_DL<<4)>>5)+1;
gNB->nr_csi_info = (nr_csi_info_t *)malloc16_clear(sizeof(nr_csi_info_t)); gNB->nr_csi_info = (nr_csi_info_t *)malloc16_clear(sizeof(nr_csi_info_t));
gNB->nr_csi_info->nr_gold_csi_rs = (uint32_t ***)malloc16(fp->slots_per_frame * sizeof(uint32_t **));
AssertFatal(gNB->nr_csi_info->nr_gold_csi_rs != NULL, "NR init: csi reference signal malloc failed\n");
for (int slot=0; slot<fp->slots_per_frame; slot++) {
gNB->nr_csi_info->nr_gold_csi_rs[slot] = (uint32_t **)malloc16(fp->symbols_per_slot * sizeof(uint32_t *));
AssertFatal(gNB->nr_csi_info->nr_gold_csi_rs[slot] != NULL, "NR init: csi reference signal for slot %d - malloc failed\n", slot);
for (int symb=0; symb<fp->symbols_per_slot; symb++) {
gNB->nr_csi_info->nr_gold_csi_rs[slot][symb] = (uint32_t *)malloc16(csi_dmrs_init_length * sizeof(uint32_t));
AssertFatal(gNB->nr_csi_info->nr_gold_csi_rs[slot][symb] != NULL, "NR init: csi reference signal for slot %d symbol %d - malloc failed\n", slot, symb);
}
}
gNB->nr_csi_info->csi_gold_init = cfg->cell_config.phy_cell_id.value; gNB->nr_csi_info->csi_gold_init = cfg->cell_config.phy_cell_id.value;
nr_init_csi_rs(&gNB->frame_parms, gNB->nr_csi_info->nr_gold_csi_rs, cfg->cell_config.phy_cell_id.value);
//PRS init
nr_init_prs(gNB);
generate_ul_reference_signal_sequences(SHRT_MAX); generate_ul_reference_signal_sequences(SHRT_MAX);
...@@ -327,7 +245,6 @@ int phy_init_nr_gNB(PHY_VARS_gNB *gNB) ...@@ -327,7 +245,6 @@ int phy_init_nr_gNB(PHY_VARS_gNB *gNB)
void phy_free_nr_gNB(PHY_VARS_gNB *gNB) void phy_free_nr_gNB(PHY_VARS_gNB *gNB)
{ {
NR_DL_FRAME_PARMS* const fp = &gNB->frame_parms;
const int Ptx = gNB->gNB_config.carrier_config.num_tx_ant.value; const int Ptx = gNB->gNB_config.carrier_config.num_tx_ant.value;
const int Prx = gNB->gNB_config.carrier_config.num_rx_ant.value; const int Prx = gNB->gNB_config.carrier_config.num_rx_ant.value;
const int max_ul_mimo_layers = 4; // taken from phy_init_nr_gNB() const int max_ul_mimo_layers = 4; // taken from phy_init_nr_gNB()
...@@ -339,43 +256,6 @@ void phy_free_nr_gNB(PHY_VARS_gNB *gNB) ...@@ -339,43 +256,6 @@ void phy_free_nr_gNB(PHY_VARS_gNB *gNB)
free_and_zero(meas->n0_subband_power); free_and_zero(meas->n0_subband_power);
free_and_zero(meas->n0_subband_power_dB); free_and_zero(meas->n0_subband_power_dB);
uint32_t ***pdcch_dmrs = gNB->nr_gold_pdcch_dmrs;
for (int slot = 0; slot < fp->slots_per_frame; slot++) {
for (int symb = 0; symb < fp->symbols_per_slot; symb++)
free_and_zero(pdcch_dmrs[slot][symb]);
free_and_zero(pdcch_dmrs[slot]);
}
free_and_zero(pdcch_dmrs);
uint32_t ****pdsch_dmrs = gNB->nr_gold_pdsch_dmrs;
for (int slot = 0; slot < fp->slots_per_frame; slot++) {
for (int symb = 0; symb < fp->symbols_per_slot; symb++) {
for (int q = 0; q < NR_NB_NSCID; q++)
free_and_zero(pdsch_dmrs[slot][symb][q]);
free_and_zero(pdsch_dmrs[slot][symb]);
}
free_and_zero(pdsch_dmrs[slot]);
}
free_and_zero(gNB->nr_gold_pdsch_dmrs);
uint32_t ****pusch_dmrs = gNB->nr_gold_pusch_dmrs;
for(int nscid = 0; nscid < 2; nscid++) {
for (int slot = 0; slot < fp->slots_per_frame; slot++) {
for (int symb = 0; symb < fp->symbols_per_slot; symb++)
free_and_zero(pusch_dmrs[nscid][slot][symb]);
free_and_zero(pusch_dmrs[nscid][slot]);
}
free_and_zero(pusch_dmrs[nscid]);
}
free_and_zero(pusch_dmrs);
uint32_t ***nr_gold_csi_rs = gNB->nr_csi_info->nr_gold_csi_rs;
for (int slot = 0; slot < fp->slots_per_frame; slot++) {
for (int symb = 0; symb < fp->symbols_per_slot; symb++)
free_and_zero(nr_gold_csi_rs[slot][symb]);
free_and_zero(nr_gold_csi_rs[slot]);
}
free_and_zero(nr_gold_csi_rs);
free_and_zero(gNB->nr_csi_info); free_and_zero(gNB->nr_csi_info);
for (int id = 0; id < gNB->max_nb_srs; id++) { for (int id = 0; id < gNB->max_nb_srs; id++) {
...@@ -398,17 +278,6 @@ void phy_free_nr_gNB(PHY_VARS_gNB *gNB) ...@@ -398,17 +278,6 @@ void phy_free_nr_gNB(PHY_VARS_gNB *gNB)
free_and_zero(common_vars->beam_id[i]); free_and_zero(common_vars->beam_id[i]);
} }
for (int rsc=0; rsc < gNB->prs_vars.NumPRSResources; rsc++) {
for (int slot=0; slot<fp->slots_per_frame; slot++) {
for (int symb=0; symb<fp->symbols_per_slot; symb++) {
free_and_zero(gNB->nr_gold_prs[rsc][slot][symb]);
}
free_and_zero(gNB->nr_gold_prs[rsc][slot]);
}
free_and_zero(gNB->nr_gold_prs[rsc]);
}
free_and_zero(gNB->nr_gold_prs);
/* Do NOT free per-antenna txdataF/rxdataF: the gNB gets a pointer to the /* Do NOT free per-antenna txdataF/rxdataF: the gNB gets a pointer to the
* RU's txdataF/rxdataF, and the RU will free that */ * RU's txdataF/rxdataF, and the RU will free that */
free_and_zero(common_vars->txdataF); free_and_zero(common_vars->txdataF);
......
This diff is collapsed.
...@@ -104,14 +104,13 @@ int nr_pusch_channel_estimation(PHY_VARS_gNB *gNB, ...@@ -104,14 +104,13 @@ int nr_pusch_channel_estimation(PHY_VARS_gNB *gNB,
if(pusch_pdu->ul_dmrs_scrambling_id != gNB->pusch_gold_init[pusch_pdu->scid]) { if(pusch_pdu->ul_dmrs_scrambling_id != gNB->pusch_gold_init[pusch_pdu->scid]) {
gNB->pusch_gold_init[pusch_pdu->scid] = pusch_pdu->ul_dmrs_scrambling_id; gNB->pusch_gold_init[pusch_pdu->scid] = pusch_pdu->ul_dmrs_scrambling_id;
nr_gold_pusch(gNB, pusch_pdu->scid, pusch_pdu->ul_dmrs_scrambling_id);
} }
if (pusch_pdu->transform_precoding == transformPrecoder_disabled) { if (pusch_pdu->transform_precoding == transformPrecoder_disabled) {
// Note: pilot returned by the following function is already the complex conjugate of the transmitted DMRS // Note: pilot returned by the following function is already the complex conjugate of the transmitted DMRS
nr_pusch_dmrs_rx(gNB, nr_pusch_dmrs_rx(gNB,
Ns, Ns,
gNB->nr_gold_pusch_dmrs[pusch_pdu->scid][Ns][symbol], nr_gold_pusch(gNB, pusch_pdu->scid, Ns, symbol),
pilot, pilot,
(1000 + p), (1000 + p),
0, 0,
...@@ -559,7 +558,7 @@ void nr_pusch_ptrs_processing(PHY_VARS_gNB *gNB, ...@@ -559,7 +558,7 @@ void nr_pusch_ptrs_processing(PHY_VARS_gNB *gNB,
symbol, symbol,
frame_parms->ofdm_symbol_size, frame_parms->ofdm_symbol_size,
(int16_t *)&pusch_vars->rxdataF_comp[aarx][(symbol * nb_re_pusch)], (int16_t *)&pusch_vars->rxdataF_comp[aarx][(symbol * nb_re_pusch)],
gNB->nr_gold_pusch_dmrs[rel15_ul->scid][nr_tti_rx][symbol], nr_gold_pusch(gNB, rel15_ul->scid, nr_tti_rx, symbol),
(int16_t *)&phase_per_symbol[symbol], (int16_t *)&phase_per_symbol[symbol],
ptrs_re_symbol); ptrs_re_symbol);
} }
......
...@@ -20,150 +20,62 @@ ...@@ -20,150 +20,62 @@
*/ */
#include "nr_refsig.h" #include "nr_refsig.h"
#include "nr_refsig_common.h"
void nr_init_pbch_dmrs(PHY_VARS_gNB* gNB) uint32_t* nr_init_pbch_dmrs(PHY_VARS_gNB* gNB, int n_hf, int ssb)
{ {
unsigned int x1 = 0, x2 = 0;
uint16_t Nid, i_ssb, i_ssb2;
unsigned char Lmax, l, n_hf, N_hf;
nfapi_nr_config_request_scf_t *cfg = &gNB->gNB_config;
NR_DL_FRAME_PARMS *fp = &gNB->frame_parms; NR_DL_FRAME_PARMS *fp = &gNB->frame_parms;
uint8_t reset; int Nid = gNB->gNB_config.cell_config.phy_cell_id.value;
Nid = cfg->cell_config.phy_cell_id.value;
Lmax = fp->Lmax;
N_hf = (Lmax == 4)? 2:1;
for (n_hf = 0; n_hf < N_hf; n_hf++) {
for (l = 0; l < Lmax ; l++) {
i_ssb = l & (Lmax-1);
i_ssb2 = i_ssb + (n_hf<<2);
reset = 1;
x2 = (1<<11) * (i_ssb2 + 1) * ((Nid>>2) + 1) + (1<<6) * (i_ssb2 + 1) + (Nid&3);
for (uint8_t n=0; n<NR_PBCH_DMRS_LENGTH_DWORD; n++) {
gNB->nr_gold_pbch_dmrs[n_hf][l][n] = lte_gold_generic(&x1, &x2, reset);
reset = 0;
}
}
}
int Lmax = fp->Lmax;
int i_ssb = ssb & (Lmax - 1);
int i_ssb2 = i_ssb + (n_hf << 2);
uint32_t x2 = (1 << 11) * (i_ssb2 + 1) * ((Nid >> 2) + 1) + (1 << 6) * (i_ssb2 + 1) + (Nid & 3);
return gold_cache(x2, NR_PBCH_DMRS_LENGTH_DWORD);
} }
void nr_init_pdcch_dmrs(PHY_VARS_gNB* gNB, uint32_t Nid) uint32_t* nr_init_pdcch_dmrs(PHY_VARS_gNB* gNB, int Nid, int slot, int symb)
{ {
NR_DL_FRAME_PARMS *fp = &gNB->frame_parms; NR_DL_FRAME_PARMS* fp = &gNB->frame_parms;
uint32_t ***pdcch_dmrs = gNB->nr_gold_pdcch_dmrs;
int pdcch_dmrs_init_length = (((fp->N_RB_DL << 1) * 3) >> 5) + 1; int pdcch_dmrs_init_length = (((fp->N_RB_DL << 1) * 3) >> 5) + 1;
uint64_t temp_x2 = ((1UL << 17) * (fp->symbols_per_slot * slot + symb + 1) * ((Nid << 1) + 1) + (Nid << 1));
for (int slot = 0; slot < fp->slots_per_frame; slot++) { uint32_t x2 = temp_x2 % (1U << 31);
for (int symb = 0; symb < fp->symbols_per_slot; symb++) { LOG_D(PHY, "PDCCH DMRS slot %d, symb %d, Nid %d, x2 %x\n", slot, symb, Nid, x2);
uint8_t reset = 1; return gold_cache(x2, pdcch_dmrs_init_length);
uint32_t x1 = 0;
uint64_t temp_x2 = ((1UL << 17) * (fp->symbols_per_slot * slot + symb + 1) * ((Nid << 1) + 1) + (Nid << 1));
uint32_t x2 = temp_x2 % (1U << 31);
LOG_D(PHY,"PDCCH DMRS slot %d, symb %d, Nid %d, x2 %x\n", slot, symb, Nid, x2);
for (uint32_t n = 0; n < pdcch_dmrs_init_length; n++) {
pdcch_dmrs[slot][symb][n] = lte_gold_generic(&x1, &x2, reset);
reset = 0;
}
}
}
} }
uint32_t* nr_gold_pdsch_dmrs(PHY_VARS_gNB* gNB, uint nscid, int Nid, int slot, int symb)
void nr_init_pdsch_dmrs(PHY_VARS_gNB* gNB, uint8_t nscid, uint32_t Nid)
{ {
NR_DL_FRAME_PARMS *fp = &gNB->frame_parms; NR_DL_FRAME_PARMS* fp = &gNB->frame_parms;
uint32_t ****pdsch_dmrs = gNB->nr_gold_pdsch_dmrs; int pdsch_dmrs_init_length = ((fp->N_RB_DL * 24) >> 5) + 1;
int pdsch_dmrs_init_length = ((fp->N_RB_DL * 12) >> 5) + 1; uint64_t temp_x2 = ((1UL << 17) * (fp->symbols_per_slot * slot + symb + 1) * ((Nid << 1) + 1) + ((Nid << 1) + nscid));
for (int slot = 0; slot < fp->slots_per_frame; slot++) { uint32_t x2 = temp_x2 % (1U << 31);
for (int symb = 0; symb < fp->symbols_per_slot; symb++) { LOG_D(PHY, "PDSCH DMRS slot %d, symb %d, Nid %d, nscid %d, x2 %x\n", slot, symb, Nid, nscid, x2);
uint8_t reset = 1; return gold_cache(x2, pdsch_dmrs_init_length);
uint32_t x1 = 0;
uint64_t temp_x2 = ((1UL << 17) * (fp->symbols_per_slot * slot + symb + 1) * ((Nid << 1) + 1) + ((Nid << 1) + nscid));
uint32_t x2 = temp_x2 % (1U << 31);
LOG_D(PHY,"PDSCH DMRS slot %d, symb %d, Nid %d, nscid %d, x2 %x\n",slot, symb, Nid, nscid, x2);
for (uint32_t n = 0; n < pdsch_dmrs_init_length; n++) {
pdsch_dmrs[slot][symb][nscid][n] = lte_gold_generic(&x1, &x2, reset);
reset = 0;
}
}
}
} }
uint32_t* nr_gold_pusch(PHY_VARS_gNB* gNB, int nscid, int ns, int l)
void nr_gold_pusch(PHY_VARS_gNB* gNB, int nscid, uint32_t nid)
{ {
NR_DL_FRAME_PARMS *fp = &gNB->frame_parms; NR_DL_FRAME_PARMS *fp = &gNB->frame_parms;
int Nid = gNB->gNB_config.cell_config.phy_cell_id.value;
int pusch_dmrs_init_length = ((fp->N_RB_UL * 12) >> 5) + 1; int pusch_dmrs_init_length = ((fp->N_RB_UL * 12) >> 5) + 1;
for (int ns = 0; ns < fp->slots_per_frame; ns++) { uint64_t temp_x2 = ((1UL << 17) * (fp->symbols_per_slot * ns + l + 1) * ((Nid << 1) + 1) + ((Nid << 1) + nscid));
for (int l = 0; l < fp->symbols_per_slot; l++) { uint32_t x2 = temp_x2 % (1U << 31);
int reset = 1; LOG_D(PHY, "DMRS slot %d, symb %d, nscid %d, nid %d, x2 %x\n", ns, l, nscid, Nid, x2);
uint32_t x1 = 0; return gold_cache(x2, pusch_dmrs_init_length);
uint64_t temp_x2 = ((1UL << 17) * (fp->symbols_per_slot * ns + l + 1) * ((nid << 1) + 1) + ((nid << 1) + nscid));
uint32_t x2 = temp_x2 % (1U << 31);
LOG_D(PHY,"DMRS slot %d, symb %d, nscid %d, nid %d, x2 %x\n", ns, l, nscid, nid, x2);
for (int n = 0; n < pusch_dmrs_init_length; n++) {
gNB->nr_gold_pusch_dmrs[nscid][ns][l][n] = lte_gold_generic(&x1, &x2, reset);
reset = 0;
}
}
}
} }
uint32_t* nr_init_prs(PHY_VARS_gNB* gNB, int rsc_id, int slotNum, int symNum)
void nr_init_prs(PHY_VARS_gNB* gNB)
{ {
unsigned int x1 = 0, x2 = 0; int Nid = gNB->prs_vars.prs_cfg[rsc_id].NPRSID; // seed value
uint16_t Nid; LOG_I(PHY, "Initiaized NR-PRS sequence with PRS_ID %3d for resource %d\n", Nid, rsc_id);
uint32_t pow22 = 1 << 22;
NR_DL_FRAME_PARMS *fp = &gNB->frame_parms; uint32_t pow10 = 1 << 10;
gNB->nr_gold_prs = (uint32_t ****)malloc16(gNB->prs_vars.NumPRSResources*sizeof(uint32_t ***)); uint32_t c_init1 = pow22 * ceil(Nid / 1024);
uint32_t ****prs = gNB->nr_gold_prs; uint32_t c_init2 = pow10 * (slotNum + symNum + 1) * (2 * (Nid % 1024) + 1);
AssertFatal(prs!=NULL, "NR init: positioning reference signal malloc failed\n"); uint32_t c_init3 = Nid % 1024;
for (int rsc=0; rsc < gNB->prs_vars.NumPRSResources; rsc++) { uint32_t x2 = c_init1 + c_init2 + c_init3;
prs[rsc] = (uint32_t ***)malloc16(fp->slots_per_frame*sizeof(uint32_t **)); return gold_cache(x2, NR_MAX_PRS_INIT_LENGTH_DWORD);
AssertFatal(prs[rsc]!=NULL, "NR init: positioning reference signal for rsc %d - malloc failed\n", rsc); }
for (int slot=0; slot<fp->slots_per_frame; slot++) {
prs[rsc][slot] = (uint32_t **)malloc16(fp->symbols_per_slot*sizeof(uint32_t *));
AssertFatal(prs[rsc][slot]!=NULL, "NR init: positioning reference signal for slot %d - malloc failed\n", slot);
for (int symb=0; symb<fp->symbols_per_slot; symb++) {
prs[rsc][slot][symb] = (uint32_t *)malloc16(NR_MAX_PRS_INIT_LENGTH_DWORD*sizeof(uint32_t));
AssertFatal(prs[rsc][slot][symb]!=NULL, "NR init: positioning reference signal for rsc %d slot %d symbol %d - malloc failed\n", rsc, slot, symb);
}
}
}
uint8_t reset;
uint8_t slotNum, symNum, rsc_id;
for (rsc_id = 0; rsc_id < gNB->prs_vars.NumPRSResources; rsc_id++) {
Nid = gNB->prs_vars.prs_cfg[rsc_id].NPRSID; // seed value
LOG_I(PHY, "Initiaized NR-PRS sequence with PRS_ID %3d for resource %d\n", Nid, rsc_id);
for (slotNum = 0; slotNum < fp->slots_per_frame; slotNum++) {
for (symNum = 0; symNum < fp->symbols_per_slot ; symNum++) {
reset = 1;
// initial x2 for prs as ts138.211
uint32_t c_init1, c_init2, c_init3;
uint32_t pow22=1<<22;
uint32_t pow10=1<<10;
c_init1 = pow22*ceil(Nid/1024);
c_init2 = pow10*(slotNum+symNum+1)*(2*(Nid%1024)+1);
c_init3 = Nid%1024;
x2 = c_init1 + c_init2 + c_init3;
for (uint8_t n=0; n<NR_MAX_PRS_INIT_LENGTH_DWORD; n++) {
gNB->nr_gold_prs[rsc_id][slotNum][symNum][n] = lte_gold_generic(&x1, &x2, reset);
reset = 0;
//printf("%d \n",gNB->nr_gold_prs[slotNum][symNum][n]);
}
}
}
}
}
...@@ -20,133 +20,48 @@ ...@@ -20,133 +20,48 @@
*/ */
#include "refsig_defs_ue.h" #include "refsig_defs_ue.h"
#include "nr_refsig.h"
#include "nr_refsig_common.h"
void nr_gold_pbch(PHY_VARS_NR_UE* ue) uint32_t* nr_gold_pbch(PHY_VARS_NR_UE* ue, int n_hf, int l)
{ {
unsigned int n = 0, x1 = 0, x2 = 0; int Nid = ue->frame_parms.Nid_cell;
unsigned int Nid, i_ssb, i_ssb2; int Lmax = ue->frame_parms.Lmax;
unsigned char Lmax, l, n_hf, N_hf; int i_ssb = l & (Lmax - 1);
uint8_t reset; int i_ssb2 = i_ssb + (n_hf << 2);
uint32_t x2 = (1 << 11) * (i_ssb2 + 1) * ((Nid >> 2) + 1) + (1 << 6) * (i_ssb2 + 1) + (Nid & 3);
Nid = ue->frame_parms.Nid_cell; return gold_cache(x2, NR_PBCH_DMRS_LENGTH_DWORD);
Lmax = ue->frame_parms.Lmax;
N_hf = (Lmax == 4)? 2:1;
for (n_hf = 0; n_hf < N_hf; n_hf++) {
for (l = 0; l < Lmax ; l++) {
i_ssb = l & (Lmax-1);
i_ssb2 = i_ssb + (n_hf<<2);
reset = 1;
x2 = (1<<11) * (i_ssb2 + 1) * ((Nid>>2) + 1) + (1<<6) * (i_ssb2 + 1) + (Nid&3);
for (n=0; n<NR_PBCH_DMRS_LENGTH_DWORD; n++) {
ue->nr_gold_pbch[n_hf][l][n] = lte_gold_generic(&x1, &x2, reset);
reset = 0;
}
}
}
} }
void nr_gold_pdcch(PHY_VARS_NR_UE* ue, uint32_t* nr_gold_pdcch(PHY_VARS_NR_UE* ue, unsigned short nid, int ns, int l)
unsigned short nid)
{ {
int pdcch_dmrs_init_length = (((ue->frame_parms.N_RB_DL << 1) * 3) >> 5) + 1; int pdcch_dmrs_init_length = (((ue->frame_parms.N_RB_DL << 1) * 3) >> 5) + 1;
for (int ns = 0; ns < ue->frame_parms.slots_per_frame; ns++) { uint64_t x2tmp0 = ((ue->frame_parms.symbols_per_slot * ns + l + 1) * ((nid << 1) + 1));
for (int l = 0; l < ue->frame_parms.symbols_per_slot; l++) { x2tmp0 <<= 17;
uint8_t reset = 1; x2tmp0 += (nid << 1);
uint64_t x2tmp0 = ((ue->frame_parms.symbols_per_slot * ns + l + 1) * ((nid << 1) + 1)); uint32_t x2 = x2tmp0 % (1U << 31); // cinit
x2tmp0 <<= 17; LOG_D(PHY, "PDCCH DMRS slot %d, symb %d, Nid %d, x2 %x\n", ns, l, nid, x2);
x2tmp0 += (nid << 1); return gold_cache(x2, pdcch_dmrs_init_length);
uint32_t x1 = 0;
uint32_t x2 = x2tmp0 % (1U << 31); //cinit
LOG_D(PHY,"PDCCH DMRS slot %d, symb %d, Nid %d, x2 %x\n", ns, l, nid, x2);
for (int n = 0; n < pdcch_dmrs_init_length; n++) {
ue->nr_gold_pdcch[0][ns][l][n] = lte_gold_generic(&x1, &x2, reset);
reset = 0;
}
}
}
} }
void nr_gold_pdsch(PHY_VARS_NR_UE* ue, uint32_t* nr_gold_pdsch(PHY_VARS_NR_UE* ue, int nscid, int slot, int symbol)
int nscid,
uint32_t nid)
{ {
int pdsch_dmrs_init_length = ((ue->frame_parms.N_RB_DL * 12) >> 5) + 1; int pdsch_dmrs_init_length = ((ue->frame_parms.N_RB_DL * 12) >> 5) + 1;
for (int ns=0; ns<ue->frame_parms.slots_per_frame; ns++) { int nid = ue->frame_parms.Nid_cell;
for (int l=0; l<ue->frame_parms.symbols_per_slot; l++) { uint64_t x2tmp0 = ((ue->frame_parms.symbols_per_slot * slot + symbol + 1) * ((nid << 1) + 1)) << 17;
uint8_t reset = 1; uint32_t x2 = (x2tmp0 + (nid << 1) + nscid) % (1U << 31); // cinit
uint64_t x2tmp0 = ((ue->frame_parms.symbols_per_slot * ns + l + 1) * ((nid << 1) + 1)) << 17; LOG_D(PHY, "UE DMRS slot %d, symb %d, nscid %d, x2 %x\n", slot, symbol, nscid, x2);
uint32_t x1 = 0; return gold_cache(x2, pdsch_dmrs_init_length);
uint32_t x2 = (x2tmp0 + (nid << 1) + nscid) % (1U << 31); //cinit
LOG_D(PHY,"UE DMRS slot %d, symb %d, nscid %d, x2 %x\n", ns, l, nscid, x2);
for (int n = 0; n < pdsch_dmrs_init_length; n++) {
ue->nr_gold_pdsch[0][ns][l][nscid][n] = lte_gold_generic(&x1, &x2, reset);
reset = 0;
}
}
}
} }
void nr_init_pusch_dmrs(PHY_VARS_NR_UE* ue, uint16_t N_n_scid, uint8_t n_scid) uint32_t* nr_init_pusch_dmrs(PHY_VARS_NR_UE* ue, uint n_scid, uint N_n_scid, int slot, int symb)
{ {
NR_DL_FRAME_PARMS *fp = &ue->frame_parms; NR_DL_FRAME_PARMS* fp = &ue->frame_parms;
uint32_t ****pusch_dmrs = ue->nr_gold_pusch_dmrs;
int pusch_dmrs_init_length = ((fp->N_RB_UL * 12) >> 5) + 1; int pusch_dmrs_init_length = ((fp->N_RB_UL * 12) >> 5) + 1;
for (int slot = 0; slot < fp->slots_per_frame; slot++) { uint64_t t_x2 = ((1UL << 17) * (fp->symbols_per_slot * slot + symb + 1) * ((N_n_scid << 1) + 1) + ((N_n_scid << 1) + n_scid));
for (int symb = 0; symb < fp->symbols_per_slot; symb++) { uint32_t x2 = t_x2 % (1U << 31);
int reset = 1; LOG_D(PHY, "DMRS slot %d, symb %d, N_n_scid %d, n_scid %d, x2 %x\n", slot, symb, N_n_scid, n_scid, x2);
uint32_t x1 = 0; return gold_cache(x2, pusch_dmrs_init_length);
uint64_t t_x2 = ((1UL << 17) * (fp->symbols_per_slot*slot + symb + 1) * ((N_n_scid << 1) + 1) + ((N_n_scid << 1) + n_scid));
uint32_t x2 = t_x2 % (1U << 31);
LOG_D(PHY,"DMRS slot %d, symb %d, N_n_scid %d, n_scid %d, x2 %x\n", slot, symb, N_n_scid, n_scid, x2);
for (int n = 0; n < pusch_dmrs_init_length; n++) {
pusch_dmrs[slot][symb][n_scid][n] = lte_gold_generic(&x1, &x2, reset);
reset = 0;
}
}
}
}
void init_nr_gold_prs(PHY_VARS_NR_UE* ue)
{
unsigned int x1 = 0, x2 = 0;
uint16_t Nid;
NR_DL_FRAME_PARMS *fp = &ue->frame_parms;
uint8_t reset;
uint8_t slotNum, symNum, gnb, rsc;
for(gnb = 0; gnb < ue->prs_active_gNBs; gnb++) {
for(rsc = 0; rsc < ue->prs_vars[gnb]->NumPRSResources; rsc++) {
Nid = ue->prs_vars[gnb]->prs_resource[rsc].prs_cfg.NPRSID; // seed value
LOG_I(PHY,"Initialised NR-PRS sequence with PRS_ID %3d for resource %d\n",Nid, rsc);
for (slotNum = 0; slotNum < fp->slots_per_frame; slotNum++) {
for (symNum = 0; symNum < fp->symbols_per_slot ; symNum++) {
reset = 1;
// initial x2 for prs as ts138.211
uint32_t c_init1, c_init2, c_init3;
uint32_t pow22=1<<22;
uint32_t pow10=1<<10;
c_init1 = pow22*ceil(Nid/1024);
c_init2 = pow10*(slotNum+symNum+1)*(2*(Nid%1024)+1);
c_init3 = Nid%1024;
x2 = c_init1 + c_init2 + c_init3;
for (uint8_t n=0; n<NR_MAX_PRS_INIT_LENGTH_DWORD; n++) {
ue->nr_gold_prs[gnb][rsc][slotNum][symNum][n] = lte_gold_generic(&x1, &x2, reset);
reset = 0;
//printf("%d \n",gNB->nr_gold_prs[slotNum][symNum][n]);
}
}
}
} // for rsc
} // for gnb
} }
void sl_init_psbch_dmrs_gold_sequences(PHY_VARS_NR_UE *UE) void sl_init_psbch_dmrs_gold_sequences(PHY_VARS_NR_UE *UE)
......
...@@ -27,27 +27,26 @@ ...@@ -27,27 +27,26 @@
#include "PHY/defs_gNB.h" #include "PHY/defs_gNB.h"
#include "PHY/LTE_REFSIG/lte_refsig.h" #include "PHY/LTE_REFSIG/lte_refsig.h"
#include "PHY/sse_intrin.h" #include "PHY/sse_intrin.h"
#include "nr_refsig_common.h"
/*!\brief This function generates the NR Gold sequence (38-211, Sec 5.2.1) for the PBCH DMRS. /*!\brief This function generates the NR Gold sequence (38-211, Sec 5.2.1) for the PBCH DMRS.
@param PHY_VARS_gNB* gNB structure provides configuration, frame parameters and the pointers to the 32 bits sequence storage tables @param PHY_VARS_gNB* gNB structure provides configuration, frame parameters and the pointers to the 32 bits sequence storage tables
*/ */
void nr_init_pbch_dmrs(PHY_VARS_gNB* gNB); uint32_t *nr_init_pbch_dmrs(PHY_VARS_gNB *gNB, int n_hf, int ssb);
/* /*
This function generates NR Gold Sequence(ts 138.211) for the PRS. This function generates NR Gold Sequence(ts 138.211) for the PRS.
@param PHY_VARS_gNB* gNB structure provides configuration, frame parameters and the pointers to the 32 bits sequence storage tables @param PHY_VARS_gNB* gNB structure provides configuration, frame parameters and the pointers to the 32 bits sequence storage tables
*/ */
void nr_init_prs(PHY_VARS_gNB* gNB); uint32_t *nr_init_prs(PHY_VARS_gNB *gNB, int rsc_id, int slotNum, int symNum);
/*!\brief This function generates the NR Gold sequence (38-211, Sec 5.2.1) for the PDCCH DMRS. /*!\brief This function generates the NR Gold sequence (38-211, Sec 5.2.1) for the PDCCH DMRS.
@param PHY_VARS_gNB* gNB structure provides configuration, frame parameters and the pointers to the 32 bits sequence storage tables @param PHY_VARS_gNB* gNB structure provides configuration, frame parameters and the pointers to the 32 bits sequence storage tables
@param Nid is used for the initialization of x2, Physical cell Id by default or upper layer configured pdcch_scrambling_ID @param Nid is used for the initialization of x2, Physical cell Id by default or upper layer configured pdcch_scrambling_ID
*/ */
void nr_init_pdcch_dmrs(PHY_VARS_gNB* gNB, uint32_t Nid); uint32_t *nr_init_pdcch_dmrs(PHY_VARS_gNB *gNB, int Nid, int slot, int symbol);
void nr_init_pdsch_dmrs(PHY_VARS_gNB* gNB, uint8_t nscid, uint32_t Nid); uint32_t *nr_gold_pdsch_dmrs(PHY_VARS_gNB *gNB, uint nscid, int Nid, int slot, int symbol);
void nr_init_csi_rs(const NR_DL_FRAME_PARMS *fp, uint32_t ***csi_rs, uint32_t Nid); uint32_t *nr_init_csi_rs(const NR_DL_FRAME_PARMS *fp, int slot, int symbol, uint32_t Nid);
uint32_t *nr_gold_pusch(PHY_VARS_gNB *gNB, int nscid, int slot, int symbol);
void nr_gold_pusch(PHY_VARS_gNB* gNB, int nscid, uint32_t nid);
int nr_pusch_dmrs_delta(uint8_t dmrs_config_type, unsigned short p); int nr_pusch_dmrs_delta(uint8_t dmrs_config_type, unsigned short p);
......
/*
* Licensed to the OpenAirInterface (OAI) Software Alliance under one or more
* contributor license agreements. See the NOTICE file distributed with
* this work for additional information regarding copyright ownership.
* The OpenAirInterface Software Alliance licenses this file to You under
* the OAI Public License, Version 1.1 (the "License"); you may not use this file
* except in compliance with the License.
* You may obtain a copy of the License at
*
* http://www.openairinterface.org/?page_id=698
*
* Unless required by applicable law or agreed to in writing, software
* distributed under the License is distributed on an "AS IS" BASIS,
* WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
* See the License for the specific language governing permissions and
* limitations under the License.
*-------------------------------------------------------------------------------
* For more information about the OpenAirInterface (OAI) Software Alliance:
* contact@openairinterface.org
*/
/* Definitions for LTE Reference signals */
/* Author R. Knopp / EURECOM / OpenAirInterface.org */
#ifndef __NR_REFSIG_COMMON_H__
#define __NR_REFSIG_COMMON_H__
uint32_t* gold_cache(uint32_t key, int length);
uint32_t *nr_init_csi_rs(const NR_DL_FRAME_PARMS *fp, int slot, int symb, uint32_t Nid);
uint32_t *init_nr_gold_prs(int nid, int slot, int symbol);
#endif
/*
* Licensed to the OpenAirInterface (OAI) Software Alliance under one or more
* contributor license agreements. See the NOTICE file distributed with
* this work for additional information regarding copyright ownership.
* The OpenAirInterface Software Alliance licenses this file to You under
* the OAI Public License, Version 1.1 (the "License"); you may not use this file
* except in compliance with the License.
* You may obtain a copy of the License at
*
* http://www.openairinterface.org/?page_id=698
*
* Unless required by applicable law or agreed to in writing, software
* distributed under the License is distributed on an "AS IS" BASIS,
* WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
* See the License for the specific language governing permissions and
* limitations under the License.
*-------------------------------------------------------------------------------
* For more information about the OpenAirInterface (OAI) Software Alliance:
* contact@openairinterface.org
*/
#include "nr_refsig.h"
uint32_t* gold_cache(uint32_t key, int length)
{
typedef struct {
int key;
int length;
int usage;
uint32_t* sequence;
} gold_cache_t;
#define GOLD_CACHE_SZ PAGE_SIZE / sizeof(gold_cache_t)
static __thread gold_cache_t table[GOLD_CACHE_SZ] = {0};
static __thread int calls = 0;
calls++;
// check if already cached
for (int i = 0; i < GOLD_CACHE_SZ; i++)
if (table[i].length && table[i].key == key) {
if (table[i].length >= length) {
table[i].usage++;
return table[i].sequence;
} else {
// cached, but too short, let's recompute it
free(table[i].sequence);
table[i].length = 0;
}
}
// cleanup unused entries since last adding
if (calls > GOLD_CACHE_SZ)
for (int i = 0; i < GOLD_CACHE_SZ; i++) {
if (table[i].length && !table[i].usage) {
free(table[i].sequence);
table[i].length = 0;
}
table[i].usage = 0;
}
calls = 0;
// We will add a new entry
for (int i = 0; i < GOLD_CACHE_SZ; i++)
if (table[i].length == 0) {
table[i].key = key;
table[i].length = length;
table[i].usage = 1;
table[i].sequence = malloc(length * sizeof(*table[i].sequence));
unsigned int x1 = 0, x2 = key;
table[i].sequence[0] = lte_gold_generic(&x1, &x2, 1);
for (int n = 1; n < length; n++)
table[i].sequence[n] = lte_gold_generic(&x1, &x2, 0);
LOG_D(PHY, "created a gold sequence, start %d; len %d\n", key, length);
return table[i].sequence;
}
AssertFatal(PHY, "gold sequence table full\n");
}
uint32_t *nr_init_csi_rs(const NR_DL_FRAME_PARMS *fp, int slot, int symb, uint32_t Nid)
{
int csi_dmrs_init_length = ((fp->N_RB_DL<<4)>>5)+1;
uint32_t x2 = ((1<<10) * (fp->symbols_per_slot*slot+symb+1) * ((Nid<<1)+1) + (Nid));
return gold_cache(x2, csi_dmrs_init_length);
}
uint32_t* init_nr_gold_prs(int Nid, int slotNum, int symNum)
{
LOG_I(PHY, "Initialised NR-PRS sequence for PCI %d\n", Nid);
// initial x2 for prs as ts138.211
uint32_t pow22 = 1 << 22;
uint32_t pow10 = 1 << 10;
uint32_t c_init1 = pow22 * ceil(Nid / 1024);
uint32_t c_init2 = pow10 * (slotNum + symNum + 1) * (2 * (Nid % 1024) + 1);
uint32_t c_init3 = Nid % 1024;
uint32_t x2 = c_init1 + c_init2 + c_init3;
return gold_cache(x2, NR_MAX_PRS_INIT_LENGTH_DWORD);
}
...@@ -26,6 +26,7 @@ ...@@ -26,6 +26,7 @@
#include "PHY/defs_nr_UE.h" #include "PHY/defs_nr_UE.h"
#include "PHY/LTE_REFSIG/lte_refsig.h" #include "PHY/LTE_REFSIG/lte_refsig.h"
#include "nr_refsig_common.h"
/*!\brief This function generates the NR Gold sequence (38-211, Sec 5.2.1) for the PBCH DMRS. /*!\brief This function generates the NR Gold sequence (38-211, Sec 5.2.1) for the PBCH DMRS.
@param PHY_VARS_NR_UE* ue structure provides configuration, frame parameters and the pointers to the 32 bits sequence storage tables @param PHY_VARS_NR_UE* ue structure provides configuration, frame parameters and the pointers to the 32 bits sequence storage tables
...@@ -51,21 +52,12 @@ int nr_pdsch_dmrs_rx(PHY_VARS_NR_UE *ue, ...@@ -51,21 +52,12 @@ int nr_pdsch_dmrs_rx(PHY_VARS_NR_UE *ue,
unsigned short nb_pdsch_rb, unsigned short nb_pdsch_rb,
uint8_t config_type); uint8_t config_type);
void nr_gold_pbch(PHY_VARS_NR_UE* ue); uint32_t *nr_gold_pbch(PHY_VARS_NR_UE *ue, int, int);
void nr_gold_pdcch(PHY_VARS_NR_UE* ue, uint32_t *nr_gold_pdcch(PHY_VARS_NR_UE *ue, unsigned short n_idDMRS, int ns, int l);
unsigned short n_idDMRS);
void nr_gold_pdsch(PHY_VARS_NR_UE* ue, uint32_t *nr_gold_pdsch(PHY_VARS_NR_UE *ue, int nscid, int slot, int symbol);
int nscid, uint32_t *nr_init_pusch_dmrs(PHY_VARS_NR_UE *ue, uint, uint, int slot, int symbol);
uint32_t nid);
void nr_init_pusch_dmrs(PHY_VARS_NR_UE* ue,
uint16_t N_n_scid,
uint8_t n_scid);
void nr_init_csi_rs(const NR_DL_FRAME_PARMS *fp, uint32_t ***csi_rs, uint32_t Nid);
void init_nr_gold_prs(PHY_VARS_NR_UE* ue);
void sl_generate_pss(SL_NR_UE_INIT_PARAMS_t *sl_init_params, uint8_t n_sl_id2, uint16_t scaling); void sl_generate_pss(SL_NR_UE_INIT_PARAMS_t *sl_init_params, uint8_t n_sl_id2, uint16_t scaling);
void sl_generate_pss_ifft_samples(sl_nr_ue_phy_params_t *sl_ue_params, SL_NR_UE_INIT_PARAMS_t *sl_init_params); void sl_generate_pss_ifft_samples(sl_nr_ue_phy_params_t *sl_ue_params, SL_NR_UE_INIT_PARAMS_t *sl_init_params);
void sl_generate_sss(SL_NR_UE_INIT_PARAMS_t *sl_init_params, uint16_t slss_id, uint16_t scaling); void sl_generate_sss(SL_NR_UE_INIT_PARAMS_t *sl_init_params, uint16_t slss_id, uint16_t scaling);
......
...@@ -26,23 +26,6 @@ ...@@ -26,23 +26,6 @@
//#define NR_CSIRS_DEBUG //#define NR_CSIRS_DEBUG
void nr_init_csi_rs(const NR_DL_FRAME_PARMS *fp, uint32_t ***csi_rs, uint32_t Nid) {
uint32_t x1 = 0, x2 = 0;
uint8_t reset;
int csi_dmrs_init_length = ((fp->N_RB_DL<<4)>>5)+1;
for (uint8_t slot=0; slot<fp->slots_per_frame; slot++) {
for (uint8_t symb=0; symb<fp->symbols_per_slot; symb++) {
reset = 1;
x2 = ((1<<10) * (fp->symbols_per_slot*slot+symb+1) * ((Nid<<1)+1) + (Nid));
for (uint32_t n=0; n<csi_dmrs_init_length; n++) {
csi_rs[slot][symb][n] = lte_gold_generic(&x1, &x2, reset);
reset = 0;
}
}
}
}
void nr_generate_csi_rs(const NR_DL_FRAME_PARMS *frame_parms, void nr_generate_csi_rs(const NR_DL_FRAME_PARMS *frame_parms,
int32_t **dataF, int32_t **dataF,
const int16_t amp, const int16_t amp,
...@@ -75,8 +58,7 @@ void nr_generate_csi_rs(const NR_DL_FRAME_PARMS *frame_parms, ...@@ -75,8 +58,7 @@ void nr_generate_csi_rs(const NR_DL_FRAME_PARMS *frame_parms,
LOG_I(NR_PHY, "csi_params->power_control_offset_ss = %i\n", csi_params->power_control_offset_ss); LOG_I(NR_PHY, "csi_params->power_control_offset_ss = %i\n", csi_params->power_control_offset_ss);
#endif #endif
int dataF_offset = slot*frame_parms->samples_per_slot_wCP; int dataF_offset = slot * frame_parms->samples_per_slot_wCP;
uint32_t **nr_gold_csi_rs = nr_csi_info->nr_gold_csi_rs[slot];
//*8(max allocation per RB)*2(QPSK)) //*8(max allocation per RB)*2(QPSK))
int csi_rs_length = frame_parms->N_RB_DL<<4; int csi_rs_length = frame_parms->N_RB_DL<<4;
int16_t mod_csi[frame_parms->symbols_per_slot][csi_rs_length>>1] __attribute__((aligned(16))); int16_t mod_csi[frame_parms->symbols_per_slot][csi_rs_length>>1] __attribute__((aligned(16)));
...@@ -96,7 +78,6 @@ void nr_generate_csi_rs(const NR_DL_FRAME_PARMS *frame_parms, ...@@ -96,7 +78,6 @@ void nr_generate_csi_rs(const NR_DL_FRAME_PARMS *frame_parms,
// if the scrambling id is not the one previously used to initialize we need to re-initialize the rs // if the scrambling id is not the one previously used to initialize we need to re-initialize the rs
if (csi_params->scramb_id != nr_csi_info->csi_gold_init) { if (csi_params->scramb_id != nr_csi_info->csi_gold_init) {
nr_csi_info->csi_gold_init = csi_params->scramb_id; nr_csi_info->csi_gold_init = csi_params->scramb_id;
nr_init_csi_rs(frame_parms, nr_csi_info->nr_gold_csi_rs, csi_params->scramb_id);
} }
switch (csi_params->row) { switch (csi_params->row) {
...@@ -580,14 +561,14 @@ void nr_generate_csi_rs(const NR_DL_FRAME_PARMS *frame_parms, ...@@ -580,14 +561,14 @@ void nr_generate_csi_rs(const NR_DL_FRAME_PARMS *frame_parms,
for (lp=0; lp<=lprime; lp++){ for (lp=0; lp<=lprime; lp++){
symb = csi_params->symb_l0; symb = csi_params->symb_l0;
nr_modulation(nr_gold_csi_rs[symb+lp], csi_length, DMRS_MOD_ORDER, mod_csi[symb+lp]); nr_modulation(nr_init_csi_rs(frame_parms, slot, symb + lp, csi_params->scramb_id), csi_length, DMRS_MOD_ORDER, mod_csi[symb + lp]);
if ((csi_params->row == 5) || (csi_params->row == 7) || (csi_params->row == 11) || (csi_params->row == 13) || (csi_params->row == 16)) if ((csi_params->row == 5) || (csi_params->row == 7) || (csi_params->row == 11) || (csi_params->row == 13) || (csi_params->row == 16))
nr_modulation(nr_gold_csi_rs[symb+1], csi_length, DMRS_MOD_ORDER, mod_csi[symb+1]); nr_modulation(nr_init_csi_rs(frame_parms, slot, symb + 1, csi_params->scramb_id), csi_length, DMRS_MOD_ORDER, mod_csi[symb + 1]);
if ((csi_params->row == 14) || (csi_params->row == 13) || (csi_params->row == 16) || (csi_params->row == 17)) { if ((csi_params->row == 14) || (csi_params->row == 13) || (csi_params->row == 16) || (csi_params->row == 17)) {
symb = csi_params->symb_l1; symb = csi_params->symb_l1;
nr_modulation(nr_gold_csi_rs[symb+lp], csi_length, DMRS_MOD_ORDER, mod_csi[symb+lp]); nr_modulation(nr_init_csi_rs(frame_parms, slot, symb + lp, csi_params->scramb_id), csi_length, DMRS_MOD_ORDER, mod_csi[symb + lp]);
if ((csi_params->row == 13) || (csi_params->row == 16)) if ((csi_params->row == 13) || (csi_params->row == 16))
nr_modulation(nr_gold_csi_rs[symb+1], csi_length, DMRS_MOD_ORDER, mod_csi[symb+1]); nr_modulation(nr_init_csi_rs(frame_parms, slot, symb + 1, csi_params->scramb_id), csi_length, DMRS_MOD_ORDER, mod_csi[symb + 1]);
} }
} }
} }
......
...@@ -97,11 +97,8 @@ void nr_generate_dci(PHY_VARS_gNB *gNB, ...@@ -97,11 +97,8 @@ void nr_generate_dci(PHY_VARS_gNB *gNB,
if(dci_pdu->ScramblingId != gNB->pdcch_gold_init) { if(dci_pdu->ScramblingId != gNB->pdcch_gold_init) {
gNB->pdcch_gold_init = dci_pdu->ScramblingId; gNB->pdcch_gold_init = dci_pdu->ScramblingId;
nr_init_pdcch_dmrs(gNB, dci_pdu->ScramblingId);
} }
uint32_t **gold_pdcch_dmrs = gNB->nr_gold_pdcch_dmrs[slot];
cset_start_symb = pdcch_pdu_rel15->StartSymbolIndex; cset_start_symb = pdcch_pdu_rel15->StartSymbolIndex;
cset_nsymb = pdcch_pdu_rel15->DurationSymbols; cset_nsymb = pdcch_pdu_rel15->DurationSymbols;
dci_idx = 0; dci_idx = 0;
...@@ -131,9 +128,11 @@ void nr_generate_dci(PHY_VARS_gNB *gNB, ...@@ -131,9 +128,11 @@ void nr_generate_dci(PHY_VARS_gNB *gNB,
/// DMRS QPSK modulation /// DMRS QPSK modulation
for (int symb=cset_start_symb; symb<cset_start_symb + pdcch_pdu_rel15->DurationSymbols; symb++) { for (int symb=cset_start_symb; symb<cset_start_symb + pdcch_pdu_rel15->DurationSymbols; symb++) {
nr_modulation(nr_init_pdcch_dmrs(gNB, dci_pdu->ScramblingId, slot, symb),
dmrs_length,
DMRS_MOD_ORDER,
mod_dmrs[symb]); // Qm = 2 as DMRS is QPSK modulated
nr_modulation(gold_pdcch_dmrs[symb], dmrs_length, DMRS_MOD_ORDER, mod_dmrs[symb]); //Qm = 2 as DMRS is QPSK modulated
#ifdef DEBUG_PDCCH_DMRS #ifdef DEBUG_PDCCH_DMRS
if(dci_pdu->RNTI!=0xFFFF) { if(dci_pdu->RNTI!=0xFFFF) {
for (int i=0; i<dmrs_length>>1; i++) for (int i=0; i<dmrs_length>>1; i++)
......
...@@ -78,10 +78,8 @@ void nr_generate_pdsch(processingData_L1tx_t *msgTx, int frame, int slot) ...@@ -78,10 +78,8 @@ void nr_generate_pdsch(processingData_L1tx_t *msgTx, int frame, int slot)
if(rel15->dlDmrsScramblingId != gNB->pdsch_gold_init[rel15->SCID]) { if(rel15->dlDmrsScramblingId != gNB->pdsch_gold_init[rel15->SCID]) {
gNB->pdsch_gold_init[rel15->SCID] = rel15->dlDmrsScramblingId; gNB->pdsch_gold_init[rel15->SCID] = rel15->dlDmrsScramblingId;
nr_init_pdsch_dmrs(gNB, rel15->SCID, rel15->dlDmrsScramblingId);
} }
uint32_t ***pdsch_dmrs = gNB->nr_gold_pdsch_dmrs[slot];
const int dmrs_symbol_map = rel15->dlDmrsSymbPos; // single DMRS: 010000100 Double DMRS 110001100 const int dmrs_symbol_map = rel15->dlDmrsSymbPos; // single DMRS: 010000100 Double DMRS 110001100
const int xOverhead = 0; const int xOverhead = 0;
const int nb_re = const int nb_re =
...@@ -251,7 +249,7 @@ void nr_generate_pdsch(processingData_L1tx_t *msgTx, int frame, int slot) ...@@ -251,7 +249,7 @@ void nr_generate_pdsch(processingData_L1tx_t *msgTx, int frame, int slot)
l_prime = 0; l_prime = 0;
} }
/// DMRS QPSK modulation /// DMRS QPSK modulation
nr_modulation(pdsch_dmrs[l_symbol][rel15->SCID], nr_modulation(nr_gold_pdsch_dmrs(gNB, rel15->SCID, rel15->dlDmrsScramblingId, slot, l_symbol),
n_dmrs * DMRS_MOD_ORDER, n_dmrs * DMRS_MOD_ORDER,
DMRS_MOD_ORDER, DMRS_MOD_ORDER,
(int16_t *)mod_dmrs); // Qm = 2 as DMRS is QPSK modulated (int16_t *)mod_dmrs); // Qm = 2 as DMRS is QPSK modulated
...@@ -276,7 +274,10 @@ void nr_generate_pdsch(processingData_L1tx_t *msgTx, int frame, int slot) ...@@ -276,7 +274,10 @@ void nr_generate_pdsch(processingData_L1tx_t *msgTx, int frame, int slot)
if(ptrs_symbol) { if(ptrs_symbol) {
/* PTRS QPSK Modulation for each OFDM symbol in a slot */ /* PTRS QPSK Modulation for each OFDM symbol in a slot */
LOG_D(PHY, "Doing ptrs modulation for symbol %d, n_ptrs %d\n", l_symbol, n_ptrs); LOG_D(PHY, "Doing ptrs modulation for symbol %d, n_ptrs %d\n", l_symbol, n_ptrs);
nr_modulation(pdsch_dmrs[l_symbol][rel15->SCID], n_ptrs * DMRS_MOD_ORDER, DMRS_MOD_ORDER, (int16_t *)mod_ptrs); nr_modulation(nr_gold_pdsch_dmrs(gNB, rel15->SCID, rel15->dlDmrsScramblingId, slot, l_symbol),
n_ptrs * DMRS_MOD_ORDER,
DMRS_MOD_ORDER,
(int16_t *)mod_ptrs);
} }
} }
uint16_t k = start_sc; uint16_t k = start_sc;
......
...@@ -3,18 +3,18 @@ ...@@ -3,18 +3,18 @@
#include "PHY/LTE_REFSIG/lte_refsig.h" #include "PHY/LTE_REFSIG/lte_refsig.h"
#include "PHY/NR_REFSIG/nr_refsig.h" #include "PHY/NR_REFSIG/nr_refsig.h"
#include "PHY/sse_intrin.h" #include "PHY/sse_intrin.h"
#include "openair1/PHY/NR_REFSIG/refsig_defs_ue.h"
//#define DEBUG_PRS_MOD //#define DEBUG_PRS_MOD
//#define DEBUG_PRS_MAP //#define DEBUG_PRS_MAP
extern short nr_qpsk_mod_table[8]; extern short nr_qpsk_mod_table[8];
int nr_generate_prs(uint32_t **nr_gold_prs, int nr_generate_prs(int slot,
c16_t *txdataF, c16_t *txdataF,
int16_t amp, int16_t amp,
prs_config_t *prs_cfg, prs_config_t *prs_cfg,
nfapi_nr_config_request_scf_t *config, nfapi_nr_config_request_scf_t *config,
NR_DL_FRAME_PARMS *frame_parms) NR_DL_FRAME_PARMS *frame_parms)
{ {
int k_prime = 0, k = 0, idx; int k_prime = 0, k = 0, idx;
...@@ -42,8 +42,9 @@ int nr_generate_prs(uint32_t **nr_gold_prs, ...@@ -42,8 +42,9 @@ int nr_generate_prs(uint32_t **nr_gold_prs,
k = (prs_cfg->REOffset+k_prime) % prs_cfg->CombSize + prs_cfg->RBOffset*12 + frame_parms->first_carrier_offset; k = (prs_cfg->REOffset+k_prime) % prs_cfg->CombSize + prs_cfg->RBOffset*12 + frame_parms->first_carrier_offset;
// QPSK modulation // QPSK modulation
uint32_t *gold = init_nr_gold_prs(prs_cfg->NPRSID, slot, l);
for (int m = 0; m < (12/prs_cfg->CombSize) * prs_cfg->NumRB; m++) { for (int m = 0; m < (12/prs_cfg->CombSize) * prs_cfg->NumRB; m++) {
idx = (((nr_gold_prs[l][(m<<1)>>5])>>((m<<1)&0x1f))&3); idx = (((gold[(m << 1) >> 5]) >> ((m << 1) & 0x1f)) & 3);
mod_prs[m<<1] = nr_qpsk_mod_table[idx<<1]; mod_prs[m<<1] = nr_qpsk_mod_table[idx<<1];
mod_prs[(m<<1)+1] = nr_qpsk_mod_table[(idx<<1) + 1]; mod_prs[(m<<1)+1] = nr_qpsk_mod_table[(idx<<1) + 1];
......
...@@ -40,7 +40,7 @@ ...@@ -40,7 +40,7 @@
NR_gNB_PHY_STATS_t *get_phy_stats(PHY_VARS_gNB *gNB, uint16_t rnti); NR_gNB_PHY_STATS_t *get_phy_stats(PHY_VARS_gNB *gNB, uint16_t rnti);
int nr_generate_prs(uint32_t **nr_gold_prs, int nr_generate_prs(int slot,
c16_t *txdataF, c16_t *txdataF,
int16_t amp, int16_t amp,
prs_config_t *prs_cfg, prs_config_t *prs_cfg,
......
...@@ -89,9 +89,9 @@ int nr_prs_channel_estimation(uint8_t gNB_id, ...@@ -89,9 +89,9 @@ int nr_prs_channel_estimation(uint8_t gNB_id,
memset(ch_tmp_buf,0,sizeof(ch_tmp_buf)); memset(ch_tmp_buf,0,sizeof(ch_tmp_buf));
memset(chF_interpol,0,sizeof(chF_interpol)); memset(chF_interpol,0,sizeof(chF_interpol));
memset(chT_interpol,0,sizeof(chF_interpol)); memset(chT_interpol,0,sizeof(chF_interpol));
int slot_prs = (proc->nr_slot_rx - rep_num*prs_cfg->PRSResourceTimeGap + frame_params->slots_per_frame)%frame_params->slots_per_frame; int slot_prs =
uint32_t **nr_gold_prs = ue->nr_gold_prs[gNB_id][rsc_id][slot_prs]; (proc->nr_slot_rx - rep_num * prs_cfg->PRSResourceTimeGap + frame_params->slots_per_frame) % frame_params->slots_per_frame;
int16_t *rxF, *pil, mod_prs[NR_MAX_PRS_LENGTH << 1]; int16_t *rxF, *pil, mod_prs[NR_MAX_PRS_LENGTH << 1];
const int16_t *fl, *fm, *fmm, *fml, *fmr, *fr; const int16_t *fl, *fm, *fmm, *fml, *fmr, *fr;
...@@ -113,6 +113,7 @@ int nr_prs_channel_estimation(uint8_t gNB_id, ...@@ -113,6 +113,7 @@ int nr_prs_channel_estimation(uint8_t gNB_id,
int16_t k_prime_table[K_PRIME_TABLE_ROW_SIZE][K_PRIME_TABLE_COL_SIZE] = PRS_K_PRIME_TABLE; int16_t k_prime_table[K_PRIME_TABLE_ROW_SIZE][K_PRIME_TABLE_COL_SIZE] = PRS_K_PRIME_TABLE;
for(int l = prs_cfg->SymbolStart; l < prs_cfg->SymbolStart+prs_cfg->NumPRSSymbols; l++) for(int l = prs_cfg->SymbolStart; l < prs_cfg->SymbolStart+prs_cfg->NumPRSSymbols; l++)
{ {
uint32_t *nr_gold_prs = init_nr_gold_prs(ue->prs_vars[gNB_id]->prs_resource[rsc_id].prs_cfg.NPRSID, slot_prs, l);
int symInd = l-prs_cfg->SymbolStart; int symInd = l-prs_cfg->SymbolStart;
if (prs_cfg->CombSize == 2) { if (prs_cfg->CombSize == 2) {
k_prime = k_prime_table[0][symInd]; k_prime = k_prime_table[0][symInd];
...@@ -135,7 +136,7 @@ int nr_prs_channel_estimation(uint8_t gNB_id, ...@@ -135,7 +136,7 @@ int nr_prs_channel_estimation(uint8_t gNB_id,
AssertFatal(num_pilots > 0, "num_pilots needs to be gt 0 or mod_prs[0] UB"); AssertFatal(num_pilots > 0, "num_pilots needs to be gt 0 or mod_prs[0] UB");
for (int m = 0; m < num_pilots; m++) for (int m = 0; m < num_pilots; m++)
{ {
idx = (((nr_gold_prs[l][(m<<1)>>5])>>((m<<1)&0x1f))&3); idx = (((nr_gold_prs[(m << 1) >> 5]) >> ((m << 1) & 0x1f)) & 3);
mod_prs[m<<1] = nr_qpsk_mod_table[idx<<1]; mod_prs[m<<1] = nr_qpsk_mod_table[idx<<1];
mod_prs[(m<<1)+1] = nr_qpsk_mod_table[(idx<<1) + 1]; mod_prs[(m<<1)+1] = nr_qpsk_mod_table[(idx<<1) + 1];
} }
...@@ -677,7 +678,7 @@ int nr_pbch_channel_estimation(PHY_VARS_NR_UE *ue, ...@@ -677,7 +678,7 @@ int nr_pbch_channel_estimation(PHY_VARS_NR_UE *ue,
AssertFatal(dmrss >= 0 && dmrss < 3, "symbol %d is illegal for PBCH DM-RS \n", dmrss); AssertFatal(dmrss >= 0 && dmrss < 3, "symbol %d is illegal for PBCH DM-RS \n", dmrss);
gold_seq = ue->nr_gold_pbch[n_hf][ssb_index]; gold_seq = nr_gold_pbch(ue, n_hf, ssb_index);
lastsymbol = 2; lastsymbol = 2;
num_rbs = 20; num_rbs = 20;
} }
...@@ -846,9 +847,7 @@ void nr_pdcch_channel_estimation(PHY_VARS_NR_UE *ue, ...@@ -846,9 +847,7 @@ void nr_pdcch_channel_estimation(PHY_VARS_NR_UE *ue,
c16_t pdcch_dl_ch_estimates[][pdcch_est_size], c16_t pdcch_dl_ch_estimates[][pdcch_est_size],
c16_t rxdataF[][ue->frame_parms.samples_per_slot_wCP]) c16_t rxdataF[][ue->frame_parms.samples_per_slot_wCP])
{ {
int slot = proc->nr_slot_rx;
int Ns = proc->nr_slot_rx;
int gNB_id = proc->gNB_id;
unsigned char aarx; unsigned char aarx;
unsigned short k; unsigned short k;
unsigned int pilot_cnt; unsigned int pilot_cnt;
...@@ -872,8 +871,13 @@ void nr_pdcch_channel_estimation(PHY_VARS_NR_UE *ue, ...@@ -872,8 +871,13 @@ void nr_pdcch_channel_estimation(PHY_VARS_NR_UE *ue,
unsigned short coreset_start_subcarrier = first_carrier_offset+(BWPStart + coreset_start_rb)*12; unsigned short coreset_start_subcarrier = first_carrier_offset+(BWPStart + coreset_start_rb)*12;
#ifdef DEBUG_PDCCH #ifdef DEBUG_PDCCH
printf("PDCCH Channel Estimation : gNB_id %d ch_offset %d, OFDM size %d, Ncp=%d, Ns=%d, symbol %d\n", printf("PDCCH Channel Estimation : gNB_id %d ch_offset %d, OFDM size %d, Ncp=%d, slot=%d, symbol %d\n",
gNB_id,ch_offset,ue->frame_parms.ofdm_symbol_size,ue->frame_parms.Ncp,Ns,symbol); gNB_id,
ch_offset,
ue->frame_parms.ofdm_symbol_size,
ue->frame_parms.Ncp,
slot,
symbol);
#endif #endif
#if CH_INTERP #if CH_INTERP
...@@ -886,7 +890,6 @@ void nr_pdcch_channel_estimation(PHY_VARS_NR_UE *ue, ...@@ -886,7 +890,6 @@ void nr_pdcch_channel_estimation(PHY_VARS_NR_UE *ue,
// checking if re-initialization of scrambling IDs is needed (should be done here but scrambling ID for PDCCH is not taken from RRC) // checking if re-initialization of scrambling IDs is needed (should be done here but scrambling ID for PDCCH is not taken from RRC)
if (scrambling_id != ue->scramblingID_pdcch){ if (scrambling_id != ue->scramblingID_pdcch){
ue->scramblingID_pdcch = scrambling_id; ue->scramblingID_pdcch = scrambling_id;
nr_gold_pdcch(ue,ue->scramblingID_pdcch);
} }
int dmrs_ref = 0; int dmrs_ref = 0;
...@@ -895,7 +898,12 @@ void nr_pdcch_channel_estimation(PHY_VARS_NR_UE *ue, ...@@ -895,7 +898,12 @@ void nr_pdcch_channel_estimation(PHY_VARS_NR_UE *ue,
// generate pilot // generate pilot
int pilot[(nb_rb_coreset + dmrs_ref) * 3] __attribute__((aligned(16))); int pilot[(nb_rb_coreset + dmrs_ref) * 3] __attribute__((aligned(16)));
// Note: pilot returned by the following function is already the complex conjugate of the transmitted DMRS // Note: pilot returned by the following function is already the complex conjugate of the transmitted DMRS
nr_pdcch_dmrs_rx(ue, Ns, ue->nr_gold_pdcch[gNB_id][Ns][symbol], (c16_t *)pilot, 2000, (nb_rb_coreset + dmrs_ref)); nr_pdcch_dmrs_rx(ue,
slot,
nr_gold_pdcch(ue, ue->scramblingID_pdcch, slot, symbol),
(c16_t *)pilot,
2000,
(nb_rb_coreset + dmrs_ref));
for (aarx=0; aarx<ue->frame_parms.nb_antennas_rx; aarx++) { for (aarx=0; aarx<ue->frame_parms.nb_antennas_rx; aarx++) {
...@@ -1425,21 +1433,23 @@ int nr_pdsch_channel_estimation(PHY_VARS_NR_UE *ue, ...@@ -1425,21 +1433,23 @@ int nr_pdsch_channel_estimation(PHY_VARS_NR_UE *ue,
c16_t rxdataF[][rxdataFsize], c16_t rxdataF[][rxdataFsize],
uint32_t *nvar) uint32_t *nvar)
{ {
int gNB_id = proc->gNB_id; // int gNB_id = proc->gNB_id;
int Ns = proc->nr_slot_rx; int slot = proc->nr_slot_rx;
const int ch_offset = ue->frame_parms.ofdm_symbol_size * symbol; const int ch_offset = ue->frame_parms.ofdm_symbol_size * symbol;
const int symbol_offset = ue->frame_parms.ofdm_symbol_size * symbol; const int symbol_offset = ue->frame_parms.ofdm_symbol_size * symbol;
#ifdef DEBUG_PDSCH #ifdef DEBUG_PDSCH
printf("PDSCH Channel Estimation : gNB_id %d ch_offset %d, symbol_offset %d OFDM size %d, Ncp=%d, Ns=%d, bwp_start_subcarrier=%d symbol %d\n", printf(
gNB_id, "PDSCH Channel Estimation : gNB_id %d ch_offset %d, symbol_offset %d OFDM size %d, Ncp=%d, Ns=%d, bwp_start_subcarrier=%d "
ch_offset, "symbol %d\n",
symbol_offset, gNB_id,
ue->frame_parms.ofdm_symbol_size, ch_offset,
ue->frame_parms.Ncp, symbol_offset,
Ns, ue->frame_parms.ofdm_symbol_size,
bwp_start_subcarrier, ue->frame_parms.Ncp,
symbol); slot,
bwp_start_subcarrier,
symbol);
#endif #endif
// generate pilot for gNB port number 1000+p // generate pilot for gNB port number 1000+p
...@@ -1448,12 +1458,11 @@ int nr_pdsch_channel_estimation(PHY_VARS_NR_UE *ue, ...@@ -1448,12 +1458,11 @@ int nr_pdsch_channel_estimation(PHY_VARS_NR_UE *ue,
// checking if re-initialization of scrambling IDs is needed // checking if re-initialization of scrambling IDs is needed
if (scrambling_id != ue->scramblingID_dlsch[nscid]) { if (scrambling_id != ue->scramblingID_dlsch[nscid]) {
ue->scramblingID_dlsch[nscid] = scrambling_id; ue->scramblingID_dlsch[nscid] = scrambling_id;
nr_gold_pdsch(ue, nscid, scrambling_id);
} }
c16_t pilot[3280] __attribute__((aligned(16))); c16_t pilot[3280] __attribute__((aligned(16)));
// Note: pilot returned by the following function is already the complex conjugate of the transmitted DMRS // Note: pilot returned by the following function is already the complex conjugate of the transmitted DMRS
nr_pdsch_dmrs_rx(ue, Ns, ue->nr_gold_pdsch[gNB_id][Ns][symbol][nscid], pilot, 1000 + p, 0, nb_rb_pdsch + rb_offset, config_type); nr_pdsch_dmrs_rx(ue, slot, nr_gold_pdsch(ue, nscid, slot, symbol), pilot, 1000 + p, 0, nb_rb_pdsch + rb_offset, config_type);
delay_t delay = {0}; delay_t delay = {0};
...@@ -1649,8 +1658,8 @@ void nr_pdsch_ptrs_processing(PHY_VARS_NR_UE *ue, ...@@ -1649,8 +1658,8 @@ void nr_pdsch_ptrs_processing(PHY_VARS_NR_UE *ue,
symbol, symbol,
frame_parms->ofdm_symbol_size, frame_parms->ofdm_symbol_size,
(int16_t *)(rxdataF_comp[0][aarx] + symbol * nb_re_pdsch), (int16_t *)(rxdataF_comp[0][aarx] + symbol * nb_re_pdsch),
ue->nr_gold_pdsch[gNB_id][nr_slot_rx][symbol][nscid], nr_gold_pdsch(ue, nscid, nr_slot_rx, symbol),
(int16_t*)&phase_per_symbol[symbol], (int16_t *)&phase_per_symbol[symbol],
&ptrs_re_symbol[symbol]); &ptrs_re_symbol[symbol]);
} }
}// HARQ 0 }// HARQ 0
......
...@@ -81,7 +81,7 @@ static bool nr_pbch_detection(const UE_nr_rxtx_proc_t *proc, ...@@ -81,7 +81,7 @@ static bool nr_pbch_detection(const UE_nr_rxtx_proc_t *proc,
// computing correlation between received DMRS symbols and transmitted sequence for current i_ssb and n_hf // computing correlation between received DMRS symbols and transmitted sequence for current i_ssb and n_hf
cd_t cumul = {0}; cd_t cumul = {0};
for (int i = pbch_initial_symbol; i < pbch_initial_symbol + 3; i++) { for (int i = pbch_initial_symbol; i < pbch_initial_symbol + 3; i++) {
c32_t meas = nr_pbch_dmrs_correlation(ue, proc, i, i - pbch_initial_symbol, ue->nr_gold_pbch[hf][l], rxdataF); c32_t meas = nr_pbch_dmrs_correlation(ue, proc, i, i - pbch_initial_symbol, nr_gold_pbch(ue, hf, l), rxdataF);
csum(cumul, cumul, meas); csum(cumul, cumul, meas);
} }
*current_ssb = (NR_UE_SSB){.i_ssb = l, .n_hf = hf, .metric = squaredMod(cumul)}; *current_ssb = (NR_UE_SSB){.i_ssb = l, .n_hf = hf, .metric = squaredMod(cumul)};
...@@ -240,7 +240,6 @@ nr_initial_sync_t nr_initial_sync(UE_nr_rxtx_proc_t *proc, PHY_VARS_NR_UE *ue, i ...@@ -240,7 +240,6 @@ nr_initial_sync_t nr_initial_sync(UE_nr_rxtx_proc_t *proc, PHY_VARS_NR_UE *ue, i
} }
if (ret.cell_detected) { // we got sss channel if (ret.cell_detected) { // we got sss channel
nr_gold_pbch(ue);
ret.cell_detected = nr_pbch_detection(proc, ue, 1, rxdataF); // start pbch detection at first symbol after pss ret.cell_detected = nr_pbch_detection(proc, ue, 1, rxdataF); // start pbch detection at first symbol after pss
} }
...@@ -259,20 +258,14 @@ nr_initial_sync_t nr_initial_sync(UE_nr_rxtx_proc_t *proc, PHY_VARS_NR_UE *ue, i ...@@ -259,20 +258,14 @@ nr_initial_sync_t nr_initial_sync(UE_nr_rxtx_proc_t *proc, PHY_VARS_NR_UE *ue, i
// compute the scramblingID_pdcch and the gold pdcch // compute the scramblingID_pdcch and the gold pdcch
ue->scramblingID_pdcch = fp->Nid_cell; ue->scramblingID_pdcch = fp->Nid_cell;
nr_gold_pdcch(ue, fp->Nid_cell);
// compute the scrambling IDs for PDSCH DMRS // compute the scrambling IDs for PDSCH DMRS
for (int i = 0; i < NR_NB_NSCID; i++) { for (int i = 0; i < NR_NB_NSCID; i++) {
ue->scramblingID_dlsch[i] = fp->Nid_cell; ue->scramblingID_dlsch[i] = fp->Nid_cell;
nr_gold_pdsch(ue, i, ue->scramblingID_dlsch[i]);
} }
nr_init_csi_rs(fp, ue->nr_csi_info->nr_gold_csi_rs, fp->Nid_cell);
// initialize the pusch dmrs // initialize the pusch dmrs
for (int i = 0; i < NR_NB_NSCID; i++) { for (int i = 0; i < NR_NB_NSCID; i++) {
ue->scramblingID_ulsch[i] = fp->Nid_cell; ue->scramblingID_ulsch[i] = fp->Nid_cell;
nr_init_pusch_dmrs(ue, ue->scramblingID_ulsch[i], i);
} }
// we also need to take into account the shift by samples_per_frame in case the if is true // we also need to take into account the shift by samples_per_frame in case the if is true
......
...@@ -242,10 +242,8 @@ void nr_ue_ulsch_procedures(PHY_VARS_NR_UE *UE, ...@@ -242,10 +242,8 @@ void nr_ue_ulsch_procedures(PHY_VARS_NR_UE *UE,
if(pusch_pdu->ul_dmrs_scrambling_id != UE->scramblingID_ulsch[pusch_pdu->scid]) { if(pusch_pdu->ul_dmrs_scrambling_id != UE->scramblingID_ulsch[pusch_pdu->scid]) {
UE->scramblingID_ulsch[pusch_pdu->scid] = pusch_pdu->ul_dmrs_scrambling_id; UE->scramblingID_ulsch[pusch_pdu->scid] = pusch_pdu->ul_dmrs_scrambling_id;
nr_init_pusch_dmrs(UE, pusch_pdu->scid, pusch_pdu->ul_dmrs_scrambling_id);
} }
uint32_t ***pusch_dmrs = UE->nr_gold_pusch_dmrs[slot];
uint16_t n_dmrs = (pusch_pdu->bwp_start + start_rb + nb_rb)*((dmrs_type == pusch_dmrs_type1) ? 6:4); uint16_t n_dmrs = (pusch_pdu->bwp_start + start_rb + nb_rb)*((dmrs_type == pusch_dmrs_type1) ? 6:4);
c16_t mod_dmrs[n_dmrs] __attribute((aligned(16))); c16_t mod_dmrs[n_dmrs] __attribute((aligned(16)));
...@@ -382,7 +380,7 @@ void nr_ue_ulsch_procedures(PHY_VARS_NR_UE *UE, ...@@ -382,7 +380,7 @@ void nr_ue_ulsch_procedures(PHY_VARS_NR_UE *UE,
// TODO: performance improvement, we can skip the modulation of DMRS symbols outside the bandwidth part // TODO: performance improvement, we can skip the modulation of DMRS symbols outside the bandwidth part
// Perform this on gold sequence, not required when SC FDMA operation is done, // Perform this on gold sequence, not required when SC FDMA operation is done,
LOG_D(PHY,"DMRS in symbol %d\n",l); LOG_D(PHY,"DMRS in symbol %d\n",l);
nr_modulation(pusch_dmrs[l][pusch_pdu->scid], nr_modulation(nr_init_pusch_dmrs(UE, pusch_pdu->scid, pusch_pdu->ul_dmrs_scrambling_id, slot, l),
n_dmrs * 2, n_dmrs * 2,
DMRS_MOD_ORDER, DMRS_MOD_ORDER,
(int16_t *)mod_dmrs); // currently only codeword 0 is modulated. Qm = 2 as DMRS is QPSK modulated (int16_t *)mod_dmrs); // currently only codeword 0 is modulated. Qm = 2 as DMRS is QPSK modulated
...@@ -395,7 +393,10 @@ void nr_ue_ulsch_procedures(PHY_VARS_NR_UE *UE, ...@@ -395,7 +393,10 @@ void nr_ue_ulsch_procedures(PHY_VARS_NR_UE *UE,
if(is_ptrs_symbol(l, ulsch_ue->ptrs_symbols)) { if(is_ptrs_symbol(l, ulsch_ue->ptrs_symbols)) {
is_ptrs_sym = 1; is_ptrs_sym = 1;
nr_modulation(pusch_dmrs[l][pusch_pdu->scid], nb_rb, DMRS_MOD_ORDER, (int16_t *)mod_ptrs); nr_modulation(nr_init_pusch_dmrs(UE, pusch_pdu->scid, pusch_pdu->ul_dmrs_scrambling_id, slot, l),
nb_rb,
DMRS_MOD_ORDER,
(int16_t *)mod_ptrs);
} }
} }
......
...@@ -607,27 +607,12 @@ typedef struct PHY_VARS_gNB_s { ...@@ -607,27 +607,12 @@ typedef struct PHY_VARS_gNB_s {
// PUCCH0 Look-up table for cyclic-shifts // PUCCH0 Look-up table for cyclic-shifts
NR_gNB_PUCCH0_LUT_t pucch0_lut; NR_gNB_PUCCH0_LUT_t pucch0_lut;
/// PBCH DMRS sequence
uint32_t nr_gold_pbch_dmrs[2][64][NR_PBCH_DMRS_LENGTH_DWORD];
/// PBCH interleaver /// PBCH interleaver
uint8_t nr_pbch_interleaver[NR_POLAR_PBCH_PAYLOAD_BITS]; uint8_t nr_pbch_interleaver[NR_POLAR_PBCH_PAYLOAD_BITS];
/// PDCCH DMRS sequence
uint32_t ***nr_gold_pdcch_dmrs;
/// PDSCH DMRS sequence
uint32_t ****nr_gold_pdsch_dmrs;
/// PUSCH DMRS
uint32_t ****nr_gold_pusch_dmrs;
// Mask of occupied RBs, per symbol and PRB // Mask of occupied RBs, per symbol and PRB
uint32_t rb_mask_ul[14][9]; uint32_t rb_mask_ul[14][9];
/// PRS sequence
uint32_t ****nr_gold_prs;
/// PRACH root sequence /// PRACH root sequence
c16_t X_u[64][839]; c16_t X_u[64][839];
......
...@@ -401,32 +401,13 @@ typedef struct PHY_VARS_NR_UE_s { ...@@ -401,32 +401,13 @@ typedef struct PHY_VARS_NR_UE_s {
uint32_t dmrs_pbch_bitmap_nr[DMRS_PBCH_I_SSB][DMRS_PBCH_N_HF][DMRS_BITMAP_SIZE]; uint32_t dmrs_pbch_bitmap_nr[DMRS_PBCH_I_SSB][DMRS_PBCH_N_HF][DMRS_BITMAP_SIZE];
#endif #endif
/// PBCH DMRS sequence
uint32_t nr_gold_pbch[2][64][NR_PBCH_DMRS_LENGTH_DWORD];
/// PDSCH DMRS
uint32_t ****nr_gold_pdsch[NUMBER_OF_CONNECTED_eNB_MAX];
// Scrambling IDs used in PDSCH DMRS // Scrambling IDs used in PDSCH DMRS
uint16_t scramblingID_dlsch[2]; uint16_t scramblingID_dlsch[2];
// Scrambling IDs used in PUSCH DMRS // Scrambling IDs used in PUSCH DMRS
uint16_t scramblingID_ulsch[2]; uint16_t scramblingID_ulsch[2];
/// PDCCH DMRS
uint32_t ***nr_gold_pdcch[NUMBER_OF_CONNECTED_eNB_MAX];
// Scrambling IDs used in PDCCH DMRS // Scrambling IDs used in PDCCH DMRS
uint16_t scramblingID_pdcch; uint16_t scramblingID_pdcch;
/// PUSCH DMRS sequence
uint32_t ****nr_gold_pusch_dmrs;
// PRS sequence per gNB, per resource
uint32_t *****nr_gold_prs;
c16_t X_u[64][839]; c16_t X_u[64][839];
// flag to activate PRB based averaging of channel estimates // flag to activate PRB based averaging of channel estimates
......
...@@ -123,7 +123,6 @@ typedef struct { ...@@ -123,7 +123,6 @@ typedef struct {
typedef struct { typedef struct {
uint16_t csi_gold_init; uint16_t csi_gold_init;
uint32_t ***nr_gold_csi_rs;
uint8_t csi_rs_generated_signal_bits; uint8_t csi_rs_generated_signal_bits;
int32_t **csi_rs_generated_signal; int32_t **csi_rs_generated_signal;
bool csi_im_meas_computed; bool csi_im_meas_computed;
......
...@@ -109,14 +109,14 @@ void nr_common_signal_procedures(PHY_VARS_gNB *gNB,int frame,int slot, nfapi_nr_ ...@@ -109,14 +109,14 @@ void nr_common_signal_procedures(PHY_VARS_gNB *gNB,int frame,int slot, nfapi_nr_
nr_generate_sss(&txdataF[0][txdataF_offset], gNB->TX_AMP, ssb_start_symbol, cfg, fp); nr_generate_sss(&txdataF[0][txdataF_offset], gNB->TX_AMP, ssb_start_symbol, cfg, fp);
if (fp->Lmax == 4) if (fp->Lmax == 4)
nr_generate_pbch_dmrs(gNB->nr_gold_pbch_dmrs[n_hf][ssb_index & 7], nr_generate_pbch_dmrs(nr_init_pbch_dmrs(gNB, n_hf, ssb_index & 7),
&txdataF[0][txdataF_offset], &txdataF[0][txdataF_offset],
gNB->TX_AMP, gNB->TX_AMP,
ssb_start_symbol, ssb_start_symbol,
cfg, cfg,
fp); fp);
else else
nr_generate_pbch_dmrs(gNB->nr_gold_pbch_dmrs[0][ssb_index & 7], nr_generate_pbch_dmrs(nr_init_pbch_dmrs(gNB, 0, ssb_index & 7),
&txdataF[0][txdataF_offset], &txdataF[0][txdataF_offset],
gNB->TX_AMP, gNB->TX_AMP,
ssb_start_symbol, ssb_start_symbol,
...@@ -186,7 +186,7 @@ void phy_procedures_gNB_TX(processingData_L1tx_t *msgTx, ...@@ -186,7 +186,7 @@ void phy_procedures_gNB_TX(processingData_L1tx_t *msgTx,
{ {
slot_prs = (slot - i*prs_config->PRSResourceTimeGap + fp->slots_per_frame)%fp->slots_per_frame; slot_prs = (slot - i*prs_config->PRSResourceTimeGap + fp->slots_per_frame)%fp->slots_per_frame;
LOG_D(PHY,"gNB_TX: frame %d, slot %d, slot_prs %d, PRS Resource ID %d\n",frame, slot, slot_prs, rsc_id); LOG_D(PHY,"gNB_TX: frame %d, slot %d, slot_prs %d, PRS Resource ID %d\n",frame, slot, slot_prs, rsc_id);
nr_generate_prs(gNB->nr_gold_prs[rsc_id][slot_prs],&gNB->common_vars.txdataF[0][txdataF_offset], AMP, prs_config, cfg, fp); nr_generate_prs(slot_prs, &gNB->common_vars.txdataF[0][txdataF_offset], AMP, prs_config, cfg, fp);
} }
} }
} }
......
...@@ -980,7 +980,7 @@ int pbch_pdcch_processing(PHY_VARS_NR_UE *ue, const UE_nr_rxtx_proc_t *proc, nr_ ...@@ -980,7 +980,7 @@ int pbch_pdcch_processing(PHY_VARS_NR_UE *ue, const UE_nr_rxtx_proc_t *proc, nr_
} }
dci_cnt = dci_cnt + nr_ue_pdcch_procedures(ue, proc, pdcch_est_size, pdcch_dl_ch_estimates, phy_data, n_ss, rxdataF); dci_cnt = dci_cnt + nr_ue_pdcch_procedures(ue, proc, pdcch_est_size, pdcch_dl_ch_estimates, phy_data, n_ss, rxdataF);
} }
LOG_D(PHY,"[UE %d] Frame %d, nr_slot_rx %d: found %d DCIs\n", ue->Mod_id, frame_rx, nr_slot_rx, dci_cnt); LOG_D(PHY, "[UE %d] Frame %d, nr_slot_rx %d: found %d DCIs\n", ue->Mod_id, frame_rx, nr_slot_rx, dci_cnt);
phy_pdcch_config->nb_search_space = 0; phy_pdcch_config->nb_search_space = 0;
VCD_SIGNAL_DUMPER_DUMP_FUNCTION_BY_NAME(VCD_SIGNAL_DUMPER_FUNCTIONS_UE_SLOT_FEP_PDCCH, VCD_FUNCTION_OUT); VCD_SIGNAL_DUMPER_DUMP_FUNCTION_BY_NAME(VCD_SIGNAL_DUMPER_FUNCTIONS_UE_SLOT_FEP_PDCCH, VCD_FUNCTION_OUT);
return sampleShift; return sampleShift;
......
...@@ -830,16 +830,12 @@ int main(int argc, char **argv) ...@@ -830,16 +830,12 @@ int main(int argc, char **argv)
init_nr_ue_transport(UE); init_nr_ue_transport(UE);
nr_gold_pbch(UE);
// compute the scramblingID_pdcch and the gold pdcch // compute the scramblingID_pdcch and the gold pdcch
UE->scramblingID_pdcch = frame_parms->Nid_cell; UE->scramblingID_pdcch = frame_parms->Nid_cell;
nr_gold_pdcch(UE, frame_parms->Nid_cell);
// compute the scrambling IDs for PDSCH DMRS // compute the scrambling IDs for PDSCH DMRS
for (int i = 0; i < 2; i++) { for (int i = 0; i < 2; i++) {
UE->scramblingID_dlsch[i] = frame_parms->Nid_cell; UE->scramblingID_dlsch[i] = frame_parms->Nid_cell;
nr_gold_pdsch(UE, i, UE->scramblingID_dlsch[i]);
} }
nr_l2_init_ue(1); nr_l2_init_ue(1);
......
...@@ -615,8 +615,6 @@ int main(int argc, char **argv) ...@@ -615,8 +615,6 @@ int main(int argc, char **argv)
exit(-1); exit(-1);
} }
nr_gold_pbch(UE);
processingData_L1tx_t msgDataTx; processingData_L1tx_t msgDataTx;
// generate signal // generate signal
const uint32_t rxdataF_sz = UE->frame_parms.samples_per_slot_wCP; const uint32_t rxdataF_sz = UE->frame_parms.samples_per_slot_wCP;
......
...@@ -695,7 +695,6 @@ int main(int argc, char *argv[]) ...@@ -695,7 +695,6 @@ int main(int argc, char *argv[])
for(int n_scid = 0; n_scid<2; n_scid++) { for(int n_scid = 0; n_scid<2; n_scid++) {
UE->scramblingID_ulsch[n_scid] = frame_parms->Nid_cell; UE->scramblingID_ulsch[n_scid] = frame_parms->Nid_cell;
nr_init_pusch_dmrs(UE, frame_parms->Nid_cell, n_scid);
} }
//Configure UE //Configure UE
......
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