Commit d8d15205 authored by Laurent THOMAS's avatar Laurent THOMAS Committed by Robert Schmidt

reduce sl_ahead to catch the RACH Msg1 in time in 24PRB test

a bit difficult to understand: sl_ahead=6 => we systematically miss the
rach detection in the scheduler because the scheduler runs more than 6
slots ahead the rx slot processing (here > 11 slots because 6 (DL and UL
slots) + 4 (RU_RX_SLOT_DEPTH, so UL only))

so, reducing sl_ahead works better than large sl_ahead because the idea
behind is: the scheduler of slot+sl_ahead will never create work to do
in a UL slot before slot+sl_ahead+X (as minimum k2 is X, in the 24PRB CI
test: 6)
parent 0d083d83
...@@ -196,6 +196,7 @@ RUs = ( ...@@ -196,6 +196,7 @@ RUs = (
att_tx = 0 att_tx = 0
att_rx = 0; att_rx = 0;
bands = [78]; bands = [78];
sl_ahead=3;
max_pdschReferenceSignalPower = -27; max_pdschReferenceSignalPower = -27;
max_rxgain = 114; max_rxgain = 114;
sf_extension = 0; sf_extension = 0;
......
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