Commit e14786b3 authored by Raymond Knopp's avatar Raymond Knopp

Merge branch 'develop' of https://gitlab.eurecom.fr/oai/openairinterface5g into develop

parents d56a5060 39ab3c1e
This diff is collapsed.
#!/bin/bash
#/*
# * Licensed to the OpenAirInterface (OAI) Software Alliance under one or more
# * contributor license agreements. See the NOTICE file distributed with
# * this work for additional information regarding copyright ownership.
# * The OpenAirInterface Software Alliance licenses this file to You under
# * the OAI Public License, Version 1.1 (the "License"); you may not use this file
# * except in compliance with the License.
# * You may obtain a copy of the License at
# *
# * http://www.openairinterface.org/?page_id=698
# *
# * Unless required by applicable law or agreed to in writing, software
# * distributed under the License is distributed on an "AS IS" BASIS,
# * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
# * See the License for the specific language governing permissions and
# * limitations under the License.
# *-------------------------------------------------------------------------------
# * For more information about the OpenAirInterface (OAI) Software Alliance:
# * contact@openairinterface.org
# */
function usage {
echo "OAI GitLab merge request applying script"
echo " Original Author: Raphael Defosseux"
echo ""
echo "Usage:"
echo "------"
echo ""
echo " checkGitLabMergeRequestLabels.sh [OPTIONS]"
echo ""
echo "Options:"
echo "------------------"
echo ""
echo " --mr-id ####"
echo " Specify the ID of the merge request."
echo ""
echo " --help OR -h"
echo " Print this help message."
echo ""
}
if [ $# -ne 2 ] && [ $# -ne 1 ]
then
echo "Syntax Error: not the correct number of arguments"
echo ""
usage
exit 1
fi
while [[ $# -gt 0 ]]
do
key="$1"
case $key in
-h|--help)
shift
usage
exit 0
;;
--mr-id)
MERGE_REQUEST_ID="$2"
shift
shift
;;
*)
echo "Syntax Error: unknown option: $key"
echo ""
usage
exit 1
esac
done
LABELS=`curl --silent "https://gitlab.eurecom.fr/api/v4/projects/oai%2Fopenairinterface5g/merge_requests/$MERGE_REQUEST_ID" | jq '.labels' || true`
IS_MR_BUILD_ONLY=`echo $LABELS | grep -c BUILD-ONLY || true`
IS_MR_CI=`echo $LABELS | grep -c CI || true`
IS_MR_4G=`echo $LABELS | grep -c 4G-LTE || true`
IS_MR_5G=`echo $LABELS | grep -c 5G-NR || true`
# First case: none is present! No CI
if [ $IS_MR_BUILD_ONLY -eq 0 ] && [ $IS_MR_CI -eq 0 ] && [ $IS_MR_4G -eq 0 ] && [ $IS_MR_5G -eq 0 ]
then
echo "NONE"
exit 0
fi
# Second case: Build-Only
if [ $IS_MR_BUILD_ONLY -eq 1 ]
then
echo "BUILD-ONLY"
exit 0
fi
# Third case: CI or 4G label --> Full CI run
if [ $IS_MR_4G -eq 1 ] || [ $IS_MR_CI -eq 1 ]
then
echo "FULL"
exit 0
fi
# Fourth case: 5G label
if [ $IS_MR_BUILD_ONLY -eq 0 ] && [ $IS_MR_CI -eq 0 ] && [ $IS_MR_4G -eq 0 ] && [ $IS_MR_5G -eq 1 ]
then
echo "SHORTEN-5G"
exit 0
fi
Active_gNBs = ( "gNB-Eurecom-5GNRBox");
# Asn1_verbosity, choice in: none, info, annoying
Asn1_verbosity = "none";
Num_Threads_PUSCH = 8
gNBs =
......@@ -251,6 +250,7 @@ L1s = (
{
num_cc = 1;
tr_n_preference = "local_mac";
pusch_proc_threads = 8;
}
);
......
......@@ -52,7 +52,7 @@
<testCase id="090102">
<class>Initialize_OAI_UE</class>
<desc>Initialize NR UE USRP</desc>
<Initialize_OAI_UE_args>--phy-test --usrp-args "addr=192.168.30.2,second_addr=192.168.50.2,clock_source=external,time_source=external" --ue-rxgain 75 --rrc_config_path . --dlsch-parallel 4 </Initialize_OAI_UE_args>
<Initialize_OAI_UE_args>--phy-test --usrp-args "addr=192.168.30.2,second_addr=192.168.50.2,clock_source=external,time_source=external" --ue-rxgain 50 --rrc_config_path . --dlsch-parallel 4 </Initialize_OAI_UE_args>
<air_interface>NR</air_interface>
</testCase>
......
......@@ -485,7 +485,6 @@ add_custom_target (
add_library(NR_RRC_LIB ${nr_rrc_h} ${nr_rrc_source}
${OPENAIR2_DIR}/RRC/NR/MESSAGES/asn1_msg.c
${OPENAIR2_DIR}/RRC/NR/nr_ngap_gNB.c
)
add_dependencies(NR_RRC_LIB nr_rrc_flag)
include_directories ("${NR_RRC_FULL_DIR}")
......@@ -2110,10 +2109,10 @@ set (MAC_NR_SRC_UE
${NR_UE_MAC_DIR}/mac_vars.c
${NR_UE_MAC_DIR}/main_ue_nr.c
${NR_UE_MAC_DIR}/nr_ue_procedures.c
${NR_UE_MAC_DIR}/nr_ue_scheduler.c
${NR_UE_MAC_DIR}/nr_ue_dci_configuration.c
${NR_UE_MAC_DIR}/nr_l1_helpers.c
${NR_UE_MAC_DIR}/nr_ra_procedures.c
${NR_UE_MAC_DIR}/rar_tools_nrUE.c
)
set (ENB_APP_SRC
......@@ -2588,6 +2587,13 @@ if(ITTI_SIM)
set(libnrnas_emm_msg_OBJS
${NAS_SRC}COMMON/EMM/MSG/RegistrationRequest.c
${NAS_SRC}COMMON/EMM/MSG/RegistrationAccept.c
${NAS_SRC}COMMON/EMM/MSG/FGSIdentityResponse.c
${NAS_SRC}COMMON/EMM/MSG/FGSAuthenticationResponse.c
${NAS_SRC}COMMON/EMM/MSG/FGSNASSecurityModeComplete.c
${NAS_SRC}COMMON/EMM/MSG/RegistrationComplete.c
${NAS_SRC}COMMON/EMM/MSG/FGSUplinkNasTransport.c
${NAS_SRC}COMMON/ESM/MSG/PduSessionEstablishRequest.c
)
set(libnrnas_ies_OBJS
......@@ -2595,8 +2601,11 @@ if(ITTI_SIM)
${NAS_SRC}COMMON/IES/FGSMobileIdentity.c
${NAS_SRC}COMMON/IES/FGSRegistrationType.c
${NAS_SRC}COMMON/IES/SpareHalfOctet.c
${NAS_SRC}COMMON/IES/FGSRegistrationResult.c
${NAS_SRC}COMMON/IES/FGMMCapability.c
${NAS_SRC}COMMON/IES/NrUESecurityCapability.c
${NAS_SRC}COMMON/IES/FGCNasMessageContainer.c
${NAS_SRC}COMMON/IES/SORTransparentContainer.c
)
add_library(LIB_NAS_SIMUE
......@@ -3290,7 +3299,7 @@ add_executable(nr_dlsim
${SHLIB_LOADER_SOURCES}
)
target_link_libraries(nr_dlsim
-Wl,--start-group UTIL SIMU_COMMON SIMU PHY_COMMON PHY_NR_COMMON PHY_NR PHY_NR_UE SCHED_NR_LIB SCHED_NR_UE_LIB MAC_NR MAC_UE_NR MAC_NR_COMMON RRC_LIB NR_RRC_LIB CONFIG_LIB L2_LTE_NR L2_NR HASHTABLE X2AP_ENB X2AP_LIB SECU_CN -Wl,--end-group
-Wl,--start-group UTIL SIMU_COMMON SIMU PHY_COMMON PHY_NR_COMMON PHY_NR PHY_NR_UE SCHED_NR_LIB SCHED_NR_UE_LIB MAC_NR MAC_UE_NR MAC_NR_COMMON RRC_LIB NR_RRC_LIB CONFIG_LIB L2_LTE_NR L2_NR HASHTABLE X2AP_ENB X2AP_LIB SECU_CN NGAP_GNB -Wl,--end-group
m pthread ${ATLAS_LIBRARIES} ${T_LIB} ${ITTI_LIB} dl
)
target_compile_definitions(nr_dlsim PUBLIC -DPHYSICAL_SIMULATOR)
......@@ -3309,7 +3318,7 @@ add_executable(nr_prachsim
${T_SOURCE}
${SHLIB_LOADER_SOURCES})
target_link_libraries(nr_prachsim
-Wl,--start-group UTIL SIMU_COMMON SIMU PHY_COMMON PHY_NR_COMMON PHY_NR PHY_RU PHY_NR_UE MAC_NR_COMMON SCHED_NR_LIB SCHED_NR_UE_LIB MAC_NR MAC_UE_NR MAC_NR_COMMON RRC_LIB NR_RRC_LIB CONFIG_LIB L2_LTE_NR L2_NR HASHTABLE X2AP_ENB X2AP_LIB SECU_CN -Wl,--end-group
-Wl,--start-group UTIL SIMU_COMMON SIMU PHY_COMMON PHY_NR_COMMON PHY_NR PHY_RU PHY_NR_UE MAC_NR_COMMON SCHED_NR_LIB SCHED_NR_UE_LIB MAC_NR MAC_UE_NR MAC_NR_COMMON RRC_LIB NR_RRC_LIB CONFIG_LIB L2_LTE_NR L2_NR HASHTABLE X2AP_ENB X2AP_LIB SECU_CN NGAP_GNB -Wl,--end-group
m pthread ${ATLAS_LIBRARIES} ${T_LIB} ${ITTI_LIB} dl)
add_executable(nr_ulschsim
......@@ -3342,7 +3351,7 @@ add_executable(nr_ulsim
${SHLIB_LOADER_SOURCES}
)
target_link_libraries(nr_ulsim
-Wl,--start-group UTIL SIMU_COMMON SIMU PHY_COMMON PHY_NR_COMMON PHY_NR PHY_NR_UE SCHED_NR_LIB SCHED_NR_UE_LIB MAC_NR MAC_UE_NR MAC_NR_COMMON RRC_LIB NR_RRC_LIB CONFIG_LIB L2_LTE_NR L2_NR HASHTABLE X2AP_ENB X2AP_LIB SECU_CN -Wl,--end-group
-Wl,--start-group UTIL SIMU_COMMON SIMU PHY_COMMON PHY_NR_COMMON PHY_NR PHY_NR_UE SCHED_NR_LIB SCHED_NR_UE_LIB MAC_NR MAC_UE_NR MAC_NR_COMMON RRC_LIB NR_RRC_LIB CONFIG_LIB L2_LTE_NR L2_NR HASHTABLE X2AP_ENB X2AP_LIB SECU_CN NGAP_GNB -Wl,--end-group
m pthread ${ATLAS_LIBRARIES} ${T_LIB} ${ITTI_LIB} dl
)
target_compile_definitions(nr_ulsim PUBLIC -DPHYSICAL_SIMULATOR)
......
......@@ -47,6 +47,7 @@
#include "NwGtpv1uMsg.h"
#include "NwGtpv1uPrivate.h"
#include "gtpv1u_eNB_defs.h"
#include "gtpv1u_gNB_defs.h"
#include "PHY/defs_L1_NB_IoT.h"
#include "RRC/LTE/defs_NB_IoT.h"
......@@ -109,6 +110,8 @@ typedef struct {
struct gNB_MAC_INST_s **nrmac;
/// GTPu descriptor
gtpv1u_data_t *gtpv1u_data_g;
/// NR GTPu descriptor
nr_gtpv1u_data_t *nr_gtpv1u_data_g;
/// RU descriptors. These describe what each radio unit is supposed to do and contain the necessary functions for fronthaul interfaces
struct RU_t_s **ru;
/// Mask to indicate fronthaul setup status of RU (hard-limit to 64 RUs)
......
......@@ -48,12 +48,14 @@ typedef enum {
MSC_MAC_ENB,
MSC_RLC_ENB,
MSC_PDCP_ENB,
MSC_PDCP_GNB,
MSC_RRC_ENB,
MSC_RRC_GNB,
MSC_IP_ENB,
MSC_S1AP_ENB,
MSC_NGAP_GNB,
MSC_GTPU_ENB,
MSC_GTPU_GNB,
MSC_GTPU_SGW,
MSC_S1AP_MME,
MSC_NGAP_AMF,
......
......@@ -260,7 +260,6 @@ typedef struct IttiMsgText_s {
#include <openair3/GTPV1-U/gtpv1u_gNB_task.h>
void *rrc_enb_process_itti_msg(void *);
#include <openair3/SCTP/sctp_eNB_task.h>
#include <openair3/S1AP/s1ap_eNB.h>
#include <openair3/NGAP/ngap_gNB.h>
#ifdef ITTI_SIM
......
<table style="border-collapse: collapse; border: none;">
<tr style="border-collapse: collapse; border: none;">
<td style="border-collapse: collapse; border: none;">
<a href="http://www.openairinterface.org/">
<img src="./images/oai_final_logo.png" alt="" border=3 height=50 width=150>
</img>
</a>
</td>
<td style="border-collapse: collapse; border: none; vertical-align: center;">
<b><font size = "5">Running L3 ITTI simulator</font></b>
</td>
</tr>
</table>
This page is valid on the following branches:
- `develop` starting from tag `2020.w48`
# 1. Building the ITTI simulator.
The ITTI simulator is available directly from the standard build.
```bash
$ source oaienv
$ cd cmake_targets
$ sudo ./build_oai -x -w None -c -ittiSIM
```
# 2. Running the ITTI simulator.
The ITTI simulator establishes ITTI-threaded communication between the gNB RRC task and the UE RRC task.
This allows to test the sequence of NGAP/RRC/NAS messages.
The main limitations are:
- NAS is a simple stub that just sends and receives messages
- only initial Attach sequence
## 2.1. Starting the ITTI simulator
The ITTI simulator is able to run with a connected 5GC or without any.
The develop branch tag `2020.w48` only works RRC without 5GC connection.
```bash
$ sudo -E ./ran_build/build/nr-ittisim -O gnb.conf
```
......@@ -186,7 +186,7 @@ development], for FR2 does not exist yet.
3) allocate a CCE for the UE (and return if it is not possible)
4) Calculate DMRS stuff (nr_save_pusch_fields()) and the TBS.
5) Mark used resources in vrb_map_UL.
* loop through all users: get a free HARQ PID using select_ul_harq_pid() and
* loop through all users: get a free HARQ PID and
update statistics. Fill nFAPI structures directly for PUSCH, and call
config_uldci() and fill_dci_pdu_rel15() for DCI filling and PDCCH messages.
......
......@@ -873,10 +873,7 @@ void init_gNB_proc(int inst) {
gNB->threadPool = (tpool_t*)malloc(sizeof(tpool_t));
gNB->respDecode = (notifiedFIFO_t*) malloc(sizeof(notifiedFIFO_t));
int numCPU = sysconf(_SC_NPROCESSORS_ONLN);
uint32_t num_threads_pusch;
paramdef_t PUSCHThreads[] = NUM_THREADS_DESC;
config_get( PUSCHThreads,sizeof(PUSCHThreads)/sizeof(paramdef_t),NULL);
int threadCnt = min(numCPU, num_threads_pusch);
int threadCnt = min(numCPU, gNB->pusch_proc_threads);
char ul_pool[80];
sprintf(ul_pool,"-1");
int s_offset = 0;
......
......@@ -77,6 +77,7 @@
#define CONFIG_HLP_UE "Set the lte softmodem as a UE\n"
#define CONFIG_HLP_L2MONW "Enable L2 wireshark messages on localhost \n"
#define CONFIG_HLP_L2MONP "Enable L2 pcap messages on localhost \n"
#define CONFIG_HLP_MAC "Disable the MAC procedures at UE side (default is enabled)\n"
#define CONFIG_HLP_VCD "Enable VCD (generated file will is named openair_dump_eNB.vcd, read it with target/RT/USER/eNB.gtkw\n"
#define CONFIG_HLP_TQFS "Apply three-quarter of sampling frequency, 23.04 Msps to reduce the data rate on USB/PCIe transfers (only valid for 20 MHz)\n"
#define CONFIG_HLP_TPORT "tracer port\n"
......
......@@ -18,49 +18,16 @@
* For more information about the OpenAirInterface (OAI) Software Alliance:
* contact@openairinterface.org
*/
#include "executables/thread-common.h"
#include "executables/nr-uesoftmodem.h"
#include "NR_MAC_UE/mac.h"
//#include "RRC/LTE/rrc_extern.h"
#include "PHY_INTERFACE/phy_interface_extern.h"
#undef MALLOC //there are two conflicting definitions, so we better make sure we don't use it at all
//#undef FRAME_LENGTH_COMPLEX_SAMPLES //there are two conflicting definitions, so we better make sure we don't use it at all
#include "fapi_nr_ue_l1.h"
#include "executables/nr-uesoftmodem.h"
#include "PHY/phy_extern_nr_ue.h"
#include "PHY/INIT/phy_init.h"
#include "PHY/MODULATION/modulation_UE.h"
#include "NR_MAC_UE/mac_proto.h"
#include "RRC/NR_UE/rrc_proto.h"
#include "SCHED_NR_UE/phy_frame_config_nr.h"
#include "SCHED_NR_UE/defs.h"
#include "PHY/NR_UE_TRANSPORT/nr_transport_proto_ue.h"
#include "common/utils/LOG/log.h"
#include "common/utils/system.h"
#include "common/utils/LOG/vcd_signal_dumper.h"
#include "executables/nr-softmodem.h"
#include "T.h"
#ifdef XFORMS
#include "PHY/TOOLS/nr_phy_scope.h"
extern char do_forms;
#endif
// Missing stuff?
int next_ra_frame = 0;
module_id_t next_Mod_id = 0;
extern double cpuf;
//static nfapi_nr_config_request_t config_t;
//static nfapi_nr_config_request_t* config =&config_t;
/*
* NR SLOT PROCESSING SEQUENCE
*
......@@ -124,16 +91,12 @@ extern double cpuf;
#define DURATION_RX_TO_TX (6) /* For LTE, this duration is fixed to 4 and it is linked to LTE standard for both modes FDD/TDD */
#endif
#define FRAME_PERIOD 100000000ULL
#define DAQ_PERIOD 66667ULL
typedef enum {
pss=0,
pbch=1,
si=2
pss = 0,
pbch = 1,
si = 2
} sync_mode_t;
void init_nr_ue_vars(PHY_VARS_NR_UE *ue,
uint8_t UE_id,
uint8_t abstraction_flag)
......@@ -258,7 +221,7 @@ static void UE_synch(void *arg) {
double rx_gain_off = 0;
nr_get_carrier_frequencies(&UE->frame_parms, &dl_carrier, &ul_carrier);
if (nr_initial_sync( &syncD->proc, UE, UE->mode,2) == 0) {
if (nr_initial_sync(&syncD->proc, UE, 2) == 0) {
freq_offset = UE->common_vars.freq_offset; // frequency offset computed with pss in initial sync
hw_slot_offset = ((UE->rx_offset<<1) / UE->frame_parms.samples_per_subframe * UE->frame_parms.slots_per_subframe) +
round((float)((UE->rx_offset<<1) % UE->frame_parms.samples_per_subframe)/UE->frame_parms.samples_per_slot0);
......@@ -394,26 +357,17 @@ void processSlotRX( PHY_VARS_NR_UE *UE, UE_nr_rxtx_proc_t *proc) {
if(UE->if_inst != NULL && UE->if_inst->dl_indication != NULL) {
nr_downlink_indication_t dl_indication;
memset((void*)&dl_indication, 0, sizeof(dl_indication));
dl_indication.module_id = UE->Mod_id;
dl_indication.gNB_index = gNB_id;
dl_indication.cc_id = UE->CC_id;
dl_indication.frame = proc->frame_rx;
dl_indication.slot = proc->nr_slot_rx;
dl_indication.thread_id = proc->thread_id;
nr_fill_dl_indication(&dl_indication, NULL, NULL, proc, UE, gNB_id);
UE->if_inst->dl_indication(&dl_indication, NULL);
}
// Process Rx data for one sub-frame
#ifdef UE_SLOT_PARALLELISATION
phy_procedures_slot_parallelization_nrUE_RX( UE, proc, 0, 0, 1, UE->mode, no_relay, NULL );
phy_procedures_slot_parallelization_nrUE_RX( UE, proc, 0, 0, 1, no_relay, NULL );
#else
uint64_t a=rdtsc();
phy_procedures_nrUE_RX( UE, proc, 0, UE->mode,get_nrUE_params()->nr_dlsch_parallel);
LOG_D(PHY,"phy_procedures_nrUE_RX: slot:%d, time %lu\n", proc->nr_slot_rx, (rdtsc()-a)/3500);
//printf(">>> nr_ue_pdcch_procedures ended\n");
phy_procedures_nrUE_RX(UE, proc, gNB_id, get_nrUE_params()->nr_dlsch_parallel);
LOG_D(PHY, "In %s: slot %d, time %lu\n", __FUNCTION__, proc->nr_slot_rx, (rdtsc()-a)/3500);
#endif
if(IS_SOFTMODEM_NOS1){
......@@ -424,23 +378,6 @@ void processSlotRX( PHY_VARS_NR_UE *UE, UE_nr_rxtx_proc_t *proc) {
}
}
// no UL for now
/*
if (UE->mac_enabled==1) {
// trigger L2 to run ue_scheduler thru IF module
// [TODO] mapping right after NR initial sync
if(UE->if_inst != NULL && UE->if_inst->ul_indication != NULL) {
UE->ul_indication.module_id = 0;
UE->ul_indication.gNB_index = 0;
UE->ul_indication.cc_id = 0;
UE->ul_indication.frame = proc->frame_rx;
UE->ul_indication.slot = proc->nr_slot_rx;
UE->ul_indication.thread_id = proc->thread_id;
UE->if_inst->ul_indication(&UE->ul_indication);
}
}
*/
}
/*!
......@@ -705,8 +642,7 @@ void *UE_thread(void *arg) {
UE->rx_offset_diff = computeSamplesShift(UE);
readBlockSize=get_readBlockSize(slot_nr, &UE->frame_parms) -
UE->rx_offset_diff;
writeBlockSize=UE->frame_parms.get_samples_per_slot((slot_nr + DURATION_RX_TO_TX - RX_NB_TH) % nb_slot_frame, &UE->frame_parms)-
UE->rx_offset_diff;
writeBlockSize=UE->frame_parms.get_samples_per_slot((slot_nr + DURATION_RX_TO_TX - RX_NB_TH) % nb_slot_frame, &UE->frame_parms)- UE->rx_offset_diff;
}
AssertFatal(readBlockSize ==
......@@ -765,14 +701,28 @@ void *UE_thread(void *arg) {
timing_advance = UE->timing_advance;
}
AssertFatal( writeBlockSize ==
int flags = 0;
int slot_tx_usrp = slot_nr + DURATION_RX_TO_TX - RX_NB_TH;
uint8_t tdd_period = mac->phy_config.config_req.tdd_table.tdd_period_in_slots;
uint8_t num_UL_slots = mac->scc->tdd_UL_DL_ConfigurationCommon->pattern1.nrofUplinkSlots +
(mac->scc->tdd_UL_DL_ConfigurationCommon->pattern1.nrofUplinkSymbols!=0);
uint8_t first_tx_slot = tdd_period - num_UL_slots;
if (slot_tx_usrp%tdd_period==first_tx_slot)
flags=2;
else if (slot_tx_usrp%tdd_period==first_tx_slot+num_UL_slots-1)
flags = 3;
else if (slot_tx_usrp%tdd_period>first_tx_slot)
flags = 1;
if (flags || IS_SOFTMODEM_RFSIM)
AssertFatal( writeBlockSize ==
UE->rfdevice.trx_write_func(&UE->rfdevice,
writeTimestamp,
txp,
writeBlockSize,
UE->frame_parms.nb_antennas_tx,
1),"");
writeTimestamp,
txp,
writeBlockSize,
UE->frame_parms.nb_antennas_tx,
flags),"");
for (int i=0; i<UE->frame_parms.nb_antennas_tx; i++)
memset(txp[i], 0, writeBlockSize);
......@@ -780,7 +730,7 @@ void *UE_thread(void *arg) {
msgToPush->key=slot_nr;
pushTpool(&(get_nrUE_params()->Tpool), msgToPush);
if ( IS_SOFTMODEM_RFSIM || IS_SOFTMODEM_NOS1) { //getenv("RFSIMULATOR")
if (IS_SOFTMODEM_RFSIM) { //getenv("RFSIMULATOR")
// FixMe: Wait previous thread is done, because race conditions seems too bad
// in case of actual RF board, the overlap between threads mitigate the issue
// We must receive one message, that proves the slot processing is done
......
......@@ -284,7 +284,6 @@ void set_options(int CC_id, PHY_VARS_NR_UE *UE){
tx_gain[0][CC_id] = tx_gain[0][0];
// Set UE variables
UE->rx_total_gain_dB = (int)rx_gain[CC_id][0] + rx_gain_off;
UE->tx_total_gain_dB = (int)tx_gain[CC_id][0];
UE->tx_power_max_dBm = tx_max_power[CC_id];
......
......@@ -50,15 +50,15 @@
{"ue-rxgain", CONFIG_HLP_UERXG, 0, dblptr:&(rx_gain[0][0]), defdblval:0, TYPE_DOUBLE, 0}, \
{"ue-rxgain-off", CONFIG_HLP_UERXGOFF, 0, dblptr:&rx_gain_off, defdblval:0, TYPE_DOUBLE, 0}, \
{"ue-txgain", CONFIG_HLP_UETXG, 0, dblptr:&(tx_gain[0][0]), defdblval:0, TYPE_DOUBLE, 0}, \
{"ue-nb-ant-rx", CONFIG_HLP_UENANTR, 0, u8ptr:&(fp->nb_antennas_rx), defuintval:1, TYPE_UINT8, 0}, \
{"ue-nb-ant-tx", CONFIG_HLP_UENANTT, 0, u8ptr:&(fp->nb_antennas_tx), defuintval:1, TYPE_UINT8, 0}, \
{"ue-nb-ant-rx", CONFIG_HLP_UENANTR, 0, u8ptr:&(fp->nb_antennas_rx), defuintval:1, TYPE_UINT8, 0}, \
{"ue-nb-ant-tx", CONFIG_HLP_UENANTT, 0, u8ptr:&(fp->nb_antennas_tx), defuintval:1, TYPE_UINT8, 0}, \
{"ue-scan-carrier", CONFIG_HLP_UESCAN, PARAMFLAG_BOOL, iptr:&(UE->UE_scan_carrier), defintval:0, TYPE_INT, 0}, \
{"ue-fo-compensation", CONFIG_HLP_UEFO, PARAMFLAG_BOOL, iptr:&(UE->UE_fo_compensation), defintval:0, TYPE_INT, 0}, \
{"ue-max-power", NULL, 0, iptr:&(tx_max_power[0]), defintval:90, TYPE_INT, 0}, \
{"r" , CONFIG_HLP_PRB, 0, iptr:&(fp->N_RB_DL), defintval:25, TYPE_UINT, 0}, \
{"A" , CONFIG_HLP_TADV, 0, iptr:&(UE->timing_advance), defintval:0, TYPE_INT, 0}, \
{"A" , CONFIG_HLP_TADV, 0, iptr:&(UE->timing_advance), defintval:0, TYPE_INT, 0}, \
{"E" , CONFIG_HLP_TQFS, PARAMFLAG_BOOL, u8ptr:&(fp->threequarter_fs), defintval:0, TYPE_UINT8, 0}, \
{"T" , CONFIG_HLP_TDD, PARAMFLAG_BOOL, iptr:&tddflag, defintval:0, TYPE_INT, 0}, \
{"T" , CONFIG_HLP_TDD, PARAMFLAG_BOOL, iptr:&tddflag, defintval:0, TYPE_INT, 0}, \
{"ue-timing-correction-disable", CONFIG_HLP_DISABLETIMECORR, PARAMFLAG_BOOL, iptr:&(UE->no_timing_correction), defintval:0, TYPE_INT, 0}, \
}
......
......@@ -1019,6 +1019,7 @@ typedef struct
typedef struct
{
uint8_t tdd_period;//DL UL Transmission Periodicity. Value:0: ms0p5 1: ms0p625 2: ms1 3: ms1p25 4: ms2 5: ms2p5 6: ms5 7: ms10 8: ms3 9: ms4
uint8_t tdd_period_in_slots;
fapi_nr_max_tdd_periodicity_t* max_tdd_periodicity_list;
} fapi_nr_tdd_table_t;
......
......@@ -630,30 +630,30 @@ typedef struct {
typedef struct {
// The RNTI used for identifying the UE when receiving the PDU Value: 1 -> 65535.
uint16_t RNTI[MAX_DCI_CORESET];
uint16_t RNTI;
// For a UE-specific search space it equals the higher-layer parameter PDCCH-DMRSScrambling-ID if configured,
// otherwise it should be set to the phy cell ID. [TS38.211, sec 7.3.2.3] Value: 0->65535
uint16_t ScramblingId[MAX_DCI_CORESET];
uint16_t ScramblingId;
// For a UE-specific search space where PDCCH-DMRSScrambling- ID is configured This param equals the CRNTI.
// Otherwise, it should be set to 0. [TS38.211, sec 7.3.2.3] Value: 0 -> 65535
uint16_t ScramblingRNTI[MAX_DCI_CORESET];
uint16_t ScramblingRNTI;
// CCE start Index used to send the DCI Value: 0->135
uint8_t CceIndex[MAX_DCI_CORESET];
uint8_t CceIndex;
// Aggregation level used [TS38.211, sec 7.3.2.1] Value: 1,2,4,8,16
uint8_t AggregationLevel[MAX_DCI_CORESET];
uint8_t AggregationLevel;
// Precoding and Beamforming structure See Table 3-43
nfapi_nr_tx_precoding_and_beamforming_t precodingAndBeamforming[MAX_DCI_CORESET];
nfapi_nr_tx_precoding_and_beamforming_t precodingAndBeamforming;
// PDCCH power value used for PDCCH Format 1_0 with CRC scrambled by SI-RNTI, PI-RNTI or RA-RNTI.
// This is ratio of SSB/PBCH EPRE to PDCCH and PDCCH DMRS EPRE [TS38.213, sec 4.1]
// Value :0->17 Report title: 5G FAPI: PHY API Specification Issue date: 29 June 2019 Version: 222.10.17 68 Field Type Description representing -8 to 8 dB in 1dB steps
uint8_t beta_PDCCH_1_0[MAX_DCI_CORESET];
uint8_t beta_PDCCH_1_0;
// PDCCH power value used for all other PDCCH Formats.
// This is ratio of SSB/PBCH block EPRE to PDCCH and PDCCH DMRS EPRE [TS38.214, sec 4.1] Values: 0: -3dB,1: 0dB,2: 3dB,3: 6dB
uint8_t powerControlOffsetSS[MAX_DCI_CORESET];
uint8_t powerControlOffsetSS;
// The total DCI length (in bits) including padding bits [TS38.212 sec 7.3.1] Range 0->DCI_PAYLOAD_BYTE_LEN*8
uint16_t PayloadSizeBits[MAX_DCI_CORESET];
uint16_t PayloadSizeBits;
// DCI payload, where the actual size is defined by PayloadSizeBits. The bit order is as following bit0-bit7 are mapped to first byte of MSB - LSB
uint8_t Payload[MAX_DCI_CORESET][DCI_PAYLOAD_BYTE_LEN];
uint8_t Payload[DCI_PAYLOAD_BYTE_LEN];
} nfapi_nr_dl_dci_pdu_t;
......@@ -698,7 +698,7 @@ typedef struct {
///Number of DCIs in this CORESET.Value: 0->MaxDciPerSlot
uint16_t numDlDci;
///DL DCI PDU
nfapi_nr_dl_dci_pdu_t dci_pdu;
nfapi_nr_dl_dci_pdu_t dci_pdu[MAX_DCI_CORESET];
} nfapi_nr_dl_tti_pdcch_pdu_rel15_t;
typedef struct {
......
......@@ -84,8 +84,6 @@ int phy_init_nr_gNB(PHY_VARS_gNB *gNB,
NR_gNB_COMMON *const common_vars = &gNB->common_vars;
NR_gNB_PRACH *const prach_vars = &gNB->prach_vars;
NR_gNB_PUSCH **const pusch_vars = gNB->pusch_vars;
/*LTE_eNB_SRS *const srs_vars = gNB->srs_vars;
LTE_eNB_PRACH *const prach_vars = &gNB->prach_vars;*/
int i;
int Ptx=cfg->carrier_config.num_tx_ant.value;
......@@ -98,19 +96,7 @@ int phy_init_nr_gNB(PHY_VARS_gNB *gNB,
while(gNB->configured == 0) usleep(10000);
load_dftslib();
/*
LOG_I(PHY,"[gNB %"PRIu8"] Initializing DL_FRAME_PARMS : N_RB_DL %"PRIu8", PHICH Resource %d, PHICH Duration %d nb_antennas_tx:%u nb_antennas_rx:%u PRACH[rootSequenceIndex:%u prach_Config_enabled:%u configIndex:%u highSpeed:%u zeroCorrelationZoneConfig:%u freqOffset:%u]\n",
gNB->Mod_id,
fp->N_RB_DL,fp->phich_config_common.phich_resource,
fp->phich_config_common.phich_duration,
fp->nb_antennas_tx, fp->nb_antennas_rx,
fp->prach_config_common.rootSequenceIndex,
fp->prach_config_common.prach_Config_enabled,
fp->prach_config_common.prach_ConfigInfo.prach_ConfigIndex,
fp->prach_config_common.prach_ConfigInfo.highSpeedFlag,
fp->prach_config_common.prach_ConfigInfo.zeroCorrelationZoneConfig,
fp->prach_config_common.prach_ConfigInfo.prach_FreqOffset
);*/
LOG_D(PHY,"[MSC_NEW][FRAME 00000][PHY_gNB][MOD %02"PRIu8"][]\n", gNB->Mod_id);
crcTableInit();
init_scrambling_luts();
......@@ -264,9 +250,7 @@ int phy_init_nr_gNB(PHY_VARS_gNB *gNB,
int N_RB_UL = cfg->carrier_config.ul_grid_size[cfg->ssb_config.scs_common.value].value;
printf("Before ULSCH init : %p\n",gNB->dlsch[0][0]->harq_processes[0]);
for (int ULSCH_id=0; ULSCH_id<NUMBER_OF_NR_ULSCH_MAX; ULSCH_id++) {
printf("ULSCH_id %d : %p\n",ULSCH_id,gNB->dlsch[0][0]->harq_processes[0]);
pusch_vars[ULSCH_id] = (NR_gNB_PUSCH *)malloc16_clear( sizeof(NR_gNB_PUSCH) );
pusch_vars[ULSCH_id]->rxdataF_ext = (int32_t **)malloc16(Prx*sizeof(int32_t *) );
pusch_vars[ULSCH_id]->rxdataF_ext2 = (int32_t **)malloc16(Prx*sizeof(int32_t *) );
......@@ -283,7 +267,6 @@ int phy_init_nr_gNB(PHY_VARS_gNB *gNB,
pusch_vars[ULSCH_id]->ul_ch_magb = (int32_t **)malloc16(Prx*sizeof(int32_t *) );
pusch_vars[ULSCH_id]->rho = (int32_t **)malloc16_clear(Prx*sizeof(int32_t*) );
printf("ULSCH_id %d (before rx antenna alloc) : %p\n",ULSCH_id,gNB->dlsch[0][0]->harq_processes[0]);
for (i=0; i<Prx; i++) {
pusch_vars[ULSCH_id]->rxdataF_ext[i] = (int32_t *)malloc16_clear( sizeof(int32_t)*N_RB_UL*12*fp->symbols_per_slot );
pusch_vars[ULSCH_id]->rxdataF_ext2[i] = (int32_t *)malloc16_clear( sizeof(int32_t)*N_RB_UL*12*fp->symbols_per_slot );
......@@ -300,16 +283,13 @@ int phy_init_nr_gNB(PHY_VARS_gNB *gNB,
pusch_vars[ULSCH_id]->ul_ch_magb[i] = (int32_t *)malloc16_clear( fp->symbols_per_slot*sizeof(int32_t)*N_RB_UL*12 );
pusch_vars[ULSCH_id]->rho[i] = (int32_t *)malloc16_clear( sizeof(int32_t)*(fp->N_RB_UL*12*7*2) );
}
printf("ULSCH_id %d (before llr alloc) : %p\n",ULSCH_id,gNB->dlsch[0][0]->harq_processes[0]);
pusch_vars[ULSCH_id]->llr = (int16_t *)malloc16_clear( (8*((3*8*6144)+12))*sizeof(int16_t) ); // [hna] 6144 is LTE and (8*((3*8*6144)+12)) is not clear
printf("ULSCH_id %d (after llr alloc) : %p\n",ULSCH_id,gNB->dlsch[0][0]->harq_processes[0]);
pusch_vars[ULSCH_id]->ul_valid_re_per_slot = (int16_t *)malloc16_clear( sizeof(int16_t)*fp->symbols_per_slot);
} //ulsch_id
/*
for (ulsch_id=0; ulsch_id<NUMBER_OF_UE_MAX; ulsch_id++)
gNB->UE_stats_ptr[ulsch_id] = &gNB->UE_stats[ulsch_id];
*/
printf("After ULSCH init : %p\n",gNB->dlsch[0][0]->harq_processes[0]);
return (0);
}
......
This diff is collapsed.
......@@ -95,6 +95,7 @@ void nr_generate_dci(PHY_VARS_gNB *gNB,
* in frequency: the first subcarrier is obtained by adding the first CRB overlapping the SSB and the rb_offset for coreset 0
* or the rb_offset for other coresets
* in time: by its first slot and its first symbol*/
const nfapi_nr_dl_dci_pdu_t *dci_pdu = &pdcch_pdu_rel15->dci_pdu[d];
cset_start_symb = pdcch_pdu_rel15->StartSymbolIndex;
cset_nsymb = pdcch_pdu_rel15->DurationSymbols;
......@@ -102,9 +103,8 @@ void nr_generate_dci(PHY_VARS_gNB *gNB,
LOG_D(PHY, "Coreset rb_offset %d, nb_rb %d\n",rb_offset,n_rb);
LOG_D(PHY, "Coreset starting subcarrier %d on symbol %d (%d symbols)\n", cset_start_sc, cset_start_symb, cset_nsymb);
// DMRS length is per OFDM symbol
uint32_t dmrs_length = (pdcch_pdu_rel15->CceRegMappingType == NFAPI_NR_CCE_REG_MAPPING_NON_INTERLEAVED)?
(n_rb*6) : (pdcch_pdu_rel15->dci_pdu.AggregationLevel[d]*36/cset_nsymb); //2(QPSK)*3(per RB)*6(REG per CCE)
uint32_t encoded_length = pdcch_pdu_rel15->dci_pdu.AggregationLevel[d]*108; //2(QPSK)*9(per RB)*6(REG per CCE)
uint32_t dmrs_length = n_rb*6; //2(QPSK)*3(per RB)*6(REG per CCE)
uint32_t encoded_length = dci_pdu->AggregationLevel*108; //2(QPSK)*9(per RB)*6(REG per CCE)
LOG_D(PHY, "DMRS length per symbol %d\t DCI encoded length %d (precoder_granularity %d,reg_mapping %d)\n", dmrs_length, encoded_length,pdcch_pdu_rel15->precoderGranularity,pdcch_pdu_rel15->CceRegMappingType);
dmrs_length += rb_offset*6; // To accommodate more DMRS symbols in case of rb offset
......@@ -126,19 +126,19 @@ void nr_generate_dci(PHY_VARS_gNB *gNB,
// CRC attachment + Scrambling + Channel coding + Rate matching
uint32_t encoder_output[NR_MAX_DCI_SIZE_DWORD];
uint16_t n_RNTI = pdcch_pdu_rel15->dci_pdu.RNTI[d];
uint16_t Nid = pdcch_pdu_rel15->dci_pdu.ScramblingId[d];
uint16_t scrambling_RNTI = pdcch_pdu_rel15->dci_pdu.ScramblingRNTI[d];
uint16_t n_RNTI = dci_pdu->RNTI;
uint16_t Nid = dci_pdu->ScramblingId;
uint16_t scrambling_RNTI = dci_pdu->ScramblingRNTI;
t_nrPolar_params *currentPtr = nr_polar_params(NR_POLAR_DCI_MESSAGE_TYPE,
pdcch_pdu_rel15->dci_pdu.PayloadSizeBits[d],
pdcch_pdu_rel15->dci_pdu.AggregationLevel[d],
dci_pdu->PayloadSizeBits,
dci_pdu->AggregationLevel,
0,NULL);
polar_encoder_fast((uint64_t*)pdcch_pdu_rel15->dci_pdu.Payload[d], (void*)encoder_output, n_RNTI,1,currentPtr);
polar_encoder_fast((uint64_t*)dci_pdu->Payload, (void*)encoder_output, n_RNTI,1,currentPtr);
#ifdef DEBUG_CHANNEL_CODING
printf("polar rnti %x,length %d, L %d\n",n_RNTI, pdcch_pdu_rel15->dci_pdu.PayloadSizeBits[d],pdcch_pdu_rel15->dci_pdu.AggregationLevel[d]);
printf("polar rnti %x,length %d, L %d\n",n_RNTI, dci_pdu->PayloadSizeBits,pdcch_pdu_rel15->dci_pdu.AggregationLevel[d]);
printf("DCI PDU: [0]->0x%lx \t [1]->0x%lx\n",
((uint64_t*)pdcch_pdu_rel15->dci_pdu.Payload[d])[0], ((uint64_t*)pdcch_pdu_rel15->dci_pdu.Payload[d])[1]);
((uint64_t*)dci_pdu->Payload)[0], ((uint64_t*)dci_pdu->Payload)[1]);
printf("Encoded Payload (length:%d dwords):\n", encoded_length>>5);
for (int i=0; i<encoded_length>>5; i++)
......@@ -164,66 +164,86 @@ void nr_generate_dci(PHY_VARS_gNB *gNB,
printf("i %d mod_dci %d %d\n", i, mod_dci[i<<1], mod_dci[(i<<1)+1] );
#endif
/// Resource mapping
if (cset_start_sc >= frame_parms.ofdm_symbol_size)
cset_start_sc -= frame_parms.ofdm_symbol_size;
/*Reorder REG list for a freq first mapping*/
uint8_t reg_idx0 = pdcch_pdu_rel15->dci_pdu.CceIndex[d]*NR_NB_REG_PER_CCE;
uint8_t nb_regs = pdcch_pdu_rel15->dci_pdu.AggregationLevel[d]*NR_NB_REG_PER_CCE;
// Get cce_list indices by reg_idx in ascending order
int reg_list_index = 0;
int reg_list_order[NR_MAX_PDCCH_AGG_LEVEL] = {};
for (int p = 0; p < NR_MAX_PDCCH_AGG_LEVEL; p++) {
for(int p2 = 0; p2 < dci_pdu->AggregationLevel; p2++) {
if(gNB->cce_list[d][p2].reg_list[0].reg_idx == p * NR_NB_REG_PER_CCE) {
reg_list_order[reg_list_index] = p2;
reg_list_index++;
break;
}
}
}
/*Mapping the encoded DCI along with the DMRS */
for (int reg_idx=reg_idx0; reg_idx<(nb_regs+reg_idx0); reg_idx++) {
k = cset_start_sc + (12*reg_idx/cset_nsymb);
if (k >= frame_parms.ofdm_symbol_size)
k -= frame_parms.ofdm_symbol_size;
l = cset_start_symb + ((reg_idx/cset_nsymb)%cset_nsymb);
// dmrs index depends on reference point for k according to 38.211 7.4.1.3.2
if (pdcch_pdu_rel15->CoreSetType == NFAPI_NR_CSET_CONFIG_PDCCH_CONFIG)
dmrs_idx = (reg_idx/cset_nsymb)*3;
else
dmrs_idx = ((reg_idx/cset_nsymb)+rb_offset)*3;
k_prime = 0;
for (int m=0; m<NR_NB_SC_PER_RB; m++) {
if ( m == (k_prime<<2)+1) { // DMRS if not already mapped
//if (pdcch_pdu_rel15->CceRegMappingType == NFAPI_NR_CCE_REG_MAPPING_NON_INTERLEAVED) {
((int16_t *)txdataF)[(l*frame_parms.ofdm_symbol_size + k)<<1] = (amp * mod_dmrs[l][dmrs_idx<<1]) >> 15;
((int16_t *)txdataF)[((l*frame_parms.ofdm_symbol_size + k)<<1) + 1] = (amp * mod_dmrs[l][(dmrs_idx<<1) + 1]) >> 15;
for (int cce_count = 0; cce_count < dci_pdu->AggregationLevel; cce_count ++) {
int8_t cce_idx = reg_list_order[cce_count];
for (int reg_in_cce_idx = 0; reg_in_cce_idx < NR_NB_REG_PER_CCE; reg_in_cce_idx++) {
k = cset_start_sc + gNB->cce_list[d][cce_idx].reg_list[reg_in_cce_idx].start_sc_idx;
if (k >= frame_parms.ofdm_symbol_size)
k -= frame_parms.ofdm_symbol_size;
l = cset_start_symb + gNB->cce_list[d][cce_idx].reg_list[reg_in_cce_idx].symb_idx;
// dmrs index depends on reference point for k according to 38.211 7.4.1.3.2
if (pdcch_pdu_rel15->CoreSetType == NFAPI_NR_CSET_CONFIG_PDCCH_CONFIG)
dmrs_idx =gNB->cce_list[d][cce_idx].reg_list[reg_in_cce_idx].reg_idx * 3;
else
dmrs_idx = (gNB->cce_list[d][cce_idx].reg_list[reg_in_cce_idx].reg_idx + rb_offset) * 3;
k_prime = 0;
for (int m = 0; m < NR_NB_SC_PER_RB; m++) {
if (m == (k_prime << 2) + 1) { // DMRS if not already mapped
((int16_t *) txdataF)[(l * frame_parms.ofdm_symbol_size + k) << 1] =
(amp * mod_dmrs[l][dmrs_idx << 1]) >> 15;
((int16_t *) txdataF)[((l * frame_parms.ofdm_symbol_size + k) << 1) + 1] =
(amp * mod_dmrs[l][(dmrs_idx << 1) + 1]) >> 15;
#ifdef DEBUG_PDCCH_DMRS
printf("PDCCH DMRS: l %d position %d => (%d,%d)\n",l,k,((int16_t *)txdataF)[(l*frame_parms.ofdm_symbol_size + k)<<1],
((int16_t *)txdataF)[((l*frame_parms.ofdm_symbol_size + k)<<1)+1]);
#endif
dmrs_idx++;
//}
k_prime++;
} else { // DCI payload
((int16_t *)txdataF)[(l*frame_parms.ofdm_symbol_size + k)<<1] = (amp * mod_dci[dci_idx<<1]) >> 15;
((int16_t *)txdataF)[((l*frame_parms.ofdm_symbol_size + k)<<1) + 1] = (amp * mod_dci[(dci_idx<<1) + 1]) >> 15;
dmrs_idx++;
k_prime++;
} else { // DCI payload
((int16_t *) txdataF)[(l * frame_parms.ofdm_symbol_size + k) << 1] = (amp * mod_dci[dci_idx << 1]) >> 15;
((int16_t *) txdataF)[((l * frame_parms.ofdm_symbol_size + k) << 1) + 1] =
(amp * mod_dci[(dci_idx << 1) + 1]) >> 15;
#ifdef DEBUG_DCI
printf("PDCCH: l %d position %d => (%d,%d)\n",l,k,((int16_t *)txdataF)[(l*frame_parms.ofdm_symbol_size + k)<<1],
((int16_t *)txdataF)[((l*frame_parms.ofdm_symbol_size + k)<<1)+1]);
#endif
dci_idx++;
}
k++;
if (k >= frame_parms.ofdm_symbol_size)
k -= frame_parms.ofdm_symbol_size;
} // m
} // reg_idx
LOG_I(PHY, "DCI: payloadSize = %d | payload = %llx\n",
*pdcch_pdu_rel15->dci_pdu.PayloadSizeBits,*(unsigned long long*)pdcch_pdu_rel15->dci_pdu.Payload);
dci_idx++;
}
k++;
if (k >= frame_parms.ofdm_symbol_size)
k -= frame_parms.ofdm_symbol_size;
} // m
} // reg_in_cce_idx
} // cce_count
LOG_D(PHY,
"DCI: payloadSize = %d | payload = %llx\n",
dci_pdu->PayloadSizeBits,
*(unsigned long long *)dci_pdu->Payload);
} // for (int d=0;d<pdcch_pdu_rel15->numDlDci;d++)
}
......
......@@ -142,7 +142,7 @@ void nr_fill_cce_list(PHY_VARS_gNB *gNB, uint8_t m, nfapi_nr_dl_tti_pdcch_pdu_r
AssertFatal(N_reg > 0,"N_reg cannot be 0\n");
for (int d=0;d<pdcch_pdu_rel15->numDlDci;d++) {
int L = pdcch_pdu_rel15->dci_pdu.AggregationLevel[d];
int L = pdcch_pdu_rel15->dci_pdu[d].AggregationLevel;
if (pdcch_pdu_rel15->CoreSetType == NFAPI_NR_CSET_CONFIG_MIB_SIB1)
AssertFatal(L>=4, "Invalid aggregation level for SIB1 configured PDCCH %d\n", L);
......@@ -153,10 +153,10 @@ void nr_fill_cce_list(PHY_VARS_gNB *gNB, uint8_t m, nfapi_nr_dl_tti_pdcch_pdu_r
C = N_reg/(bsize*R);
}
LOG_D(PHY, "CCE list generation for candidate %d: bundle size %d ilv size %d CceIndex %d\n", m, bsize, R, pdcch_pdu_rel15->dci_pdu.CceIndex[d]);
LOG_D(PHY, "CCE list generation for candidate %d: bundle size %d ilv size %d CceIndex %d\n", m, bsize, R, pdcch_pdu_rel15->dci_pdu[d].CceIndex);
for (uint8_t cce_idx=0; cce_idx<L; cce_idx++) {
cce = &gNB->cce_list[d][cce_idx];
cce->cce_idx = pdcch_pdu_rel15->dci_pdu.CceIndex[d] + cce_idx;
cce->cce_idx = pdcch_pdu_rel15->dci_pdu[d].CceIndex + cce_idx;
LOG_D(PHY, "cce_idx %d\n", cce->cce_idx);
if (pdcch_pdu_rel15->CceRegMappingType == NFAPI_NR_CCE_REG_MAPPING_INTERLEAVED) {
......@@ -236,25 +236,24 @@ void nr_fill_dci(PHY_VARS_gNB *gNB,
for (int i=0;i<pdcch_pdu_rel15->numDlDci;i++) {
//uint64_t *dci_pdu = (uint64_t*)pdcch_pdu_rel15->dci_pdu.Payload[i];
//uint64_t *dci_pdu = (uint64_t*)pdcch_pdu_rel15->dci_pdu[i].Payload;
int dlsch_id = find_nr_dlsch(pdcch_pdu_rel15->dci_pdu.RNTI[i],gNB,SEARCH_EXIST_OR_FREE);
int dlsch_id = find_nr_dlsch(pdcch_pdu_rel15->dci_pdu[i].RNTI,gNB,SEARCH_EXIST_OR_FREE);
if( (dlsch_id<0) || (dlsch_id>=NUMBER_OF_NR_DLSCH_MAX) ){
LOG_E(PHY,"illegal dlsch_id found!!! rnti %04x dlsch_id %d\n",(unsigned int)pdcch_pdu_rel15->dci_pdu.RNTI[i],dlsch_id);
LOG_E(PHY,"illegal dlsch_id found!!! rnti %04x dlsch_id %d\n",(unsigned int)pdcch_pdu_rel15->dci_pdu[i].RNTI,dlsch_id);
return;
}
dlsch = gNB->dlsch[dlsch_id][0];
int num_slots_tdd = (gNB->frame_parms.slots_per_frame)>>(7-gNB->gNB_config.tdd_table.tdd_period.value);
int harq_pid = slot % num_slots_tdd;
int harq_pid = 0;
dlsch->slot_tx[slot] = 1;
dlsch->harq_ids[frame%2][slot] = harq_pid;
dlsch->harq_ids[frame % 2][slot] = 0;
AssertFatal(harq_pid < 8 && harq_pid >= 0,
"illegal harq_pid %d\n",harq_pid);
dlsch->harq_mask |= (1<<harq_pid);
dlsch->rnti = pdcch_pdu_rel15->dci_pdu.RNTI[i];
dlsch->rnti = pdcch_pdu_rel15->dci_pdu[i].RNTI;
// nr_fill_cce_list(gNB,0);
/*
......@@ -300,7 +299,7 @@ void nr_fill_ul_dci(PHY_VARS_gNB *gNB,
for (int i=0;i<pdcch_pdu_rel15->numDlDci;i++) {
//uint64_t *dci_pdu = (uint64_t*)pdcch_pdu_rel15->dci_pdu.Payload[i];
//uint64_t *dci_pdu = (uint64_t*)pdcch_pdu_rel15->dci_pdu[i].Payload;
// if there's no DL DCI then generate CCE list
// nr_fill_cce_list(gNB,0);
......
......@@ -136,8 +136,7 @@ uint8_t nr_generate_pdsch(PHY_VARS_gNB *gNB,
dlsch = gNB->dlsch[dlsch_id][0];
if (dlsch->slot_tx[slot] == 0) continue;
int harq_pid = dlsch->harq_ids[frame%2][slot];
NR_DL_gNB_HARQ_t *harq = dlsch->harq_processes[harq_pid];
NR_DL_gNB_HARQ_t *harq = &dlsch->harq_process;
nfapi_nr_dl_tti_pdsch_pdu_rel15_t *rel15 = &harq->pdsch_pdu.pdsch_pdu_rel15;
uint32_t scrambled_output[NR_MAX_NB_CODEWORDS][NR_MAX_PDSCH_ENCODED_LENGTH>>5];
int16_t **mod_symbs = (int16_t**)dlsch->mod_symbs;
......@@ -421,15 +420,8 @@ void dump_pdsch_stats(PHY_VARS_gNB *gNB) {
for (int i=0;i<NUMBER_OF_NR_SCH_STATS_MAX;i++)
if (gNB->dlsch_stats[i].rnti > 0)
LOG_I(PHY,"DLSCH RNTI %x: round_trials %d(%1.1e):%d(%1.1e):%d(%1.1e):%d, current_Qm %d, current_RI %d, total_bytes TX %d\n",
LOG_D(PHY,"DLSCH RNTI %x: current_Qm %d, current_RI %d, total_bytes TX %d\n",
gNB->dlsch_stats[i].rnti,
gNB->dlsch_stats[i].round_trials[0],
(double)gNB->dlsch_stats[i].round_trials[1]/gNB->dlsch_stats[i].round_trials[0],
gNB->dlsch_stats[i].round_trials[1],
(double)gNB->dlsch_stats[i].round_trials[2]/gNB->dlsch_stats[i].round_trials[0],
gNB->dlsch_stats[i].round_trials[2],
(double)gNB->dlsch_stats[i].round_trials[3]/gNB->dlsch_stats[i].round_trials[0],
gNB->dlsch_stats[i].round_trials[3],
gNB->dlsch_stats[i].current_Qm,
gNB->dlsch_stats[i].current_RI,
gNB->dlsch_stats[i].total_bytes_tx);
......
This diff is collapsed.
......@@ -289,12 +289,12 @@ void nr_fill_dlsch(PHY_VARS_gNB *gNB,
AssertFatal( (dlsch_id>=0) && (dlsch_id<NUMBER_OF_NR_DLSCH_MAX),
"illegal or no dlsch_id found!!! rnti %04x dlsch_id %d\n",rel15->rnti,dlsch_id);
NR_gNB_DLSCH_t *dlsch = gNB->dlsch[dlsch_id][0];
NR_DL_gNB_HARQ_t **harq = dlsch->harq_processes;
NR_DL_gNB_HARQ_t *harq = &dlsch->harq_process;
/// DLSCH struct
memcpy((void*)&harq[dlsch->harq_ids[frame%2][slot]]->pdsch_pdu, (void*)pdsch_pdu, sizeof(nfapi_nr_dl_tti_pdsch_pdu));
memcpy((void*)&harq->pdsch_pdu, (void*)pdsch_pdu, sizeof(nfapi_nr_dl_tti_pdsch_pdu));
gNB->num_pdsch_rnti[slot]++;
AssertFatal(sdu!=NULL,"sdu is null\n");
harq[dlsch->harq_ids[frame%2][slot]]->pdu = sdu;
harq->pdu = sdu;
}
......
......@@ -393,6 +393,7 @@ void nr_decode_pucch0(PHY_VARS_gNB *gNB,
// first bit of bitmap for sr presence and second bit for acknack presence
uci_pdu->pduBitmap = pucch_pdu->sr_flag | ((pucch_pdu->bit_len_harq>0)<<1);
uci_pdu->pucch_format = 0; // format 0
uci_pdu->rnti = pucch_pdu->rnti;
uci_pdu->ul_cqi = cqi;
uci_pdu->timing_advance = 0xffff; // currently not valid
uci_pdu->rssi = 1280 - (10*dB_fixed(32767*32767)-dB_fixed_times10(signal_energy_nodc(&rxdataF[0][pucch_pdu->start_symbol_index*frame_parms->ofdm_symbol_size+re_offset],12)));
......
......@@ -24,6 +24,7 @@
#include "PHY/NR_UE_ESTIMATION/nr_estimation.h"
#include "PHY/impl_defs_top.h"
#include "executables/softmodem-common.h"
#include "common/utils/LOG/vcd_signal_dumper.h"
#define DEBUG_PHY
......@@ -104,15 +105,14 @@ void nr_adjust_synch_ue(NR_DL_FRAME_PARMS *frame_parms,
{
first_time = 0;
ue->time_sync_cell = 1;
if (ue->mac_enabled==1) {
if (get_softmodem_params()->do_ra) {
LOG_I(PHY,"[UE%d] Sending synch status to higher layers\n",ue->Mod_id);
//mac_resynch();
//dl_phy_sync_success(ue->Mod_id,frame,0,1);//ue->common_vars.eNb_id);
ue->UE_mode[0] = PRACH;
ue->prach_resources[gNB_id]->sync_frame = frame;
ue->prach_resources[gNB_id]->init_msg1 = 0;
}
else {
} else {
ue->UE_mode[0] = PUSCH;
}
}
......
......@@ -90,6 +90,7 @@ void nr_ue_measurements(PHY_VARS_NR_UE *ue,
uint8_t slot);
void nr_ue_rsrp_measurements(PHY_VARS_NR_UE *ue,
uint8_t gNB_index,
UE_nr_rxtx_proc_t *proc,
uint8_t slot,
uint8_t abstraction_flag);
......
......@@ -30,7 +30,7 @@
* \warning
*/
#include "nr-softmodem-common.h"
#include "executables/softmodem-common.h"
#include "PHY/defs_nr_UE.h"
#include "PHY/phy_extern_nr_ue.h"
#include "common/utils/LOG/log.h"
......@@ -45,25 +45,41 @@
//#define DEBUG_MEAS_UE
//#define DEBUG_RANK_EST
// Returns the pathloss in dBm for the active UL BWP on the selected carrier based on the DL RS associated with the PRACH transmission
// computation according to clause 7.4 (Physical random access channel) of 3GPP TS 38.213 version 16.3.0 Release 16
// Assumptions:
// - PRACH transmission from a UE is not in response to a detection of a PDCCH order by the UE
// Measurement units:
// - referenceSignalPower: dBm/RE (average EPRE of the resources elements that carry secondary synchronization signals in dBm)
int16_t get_nr_PL(uint8_t Mod_id, uint8_t CC_id, uint8_t gNB_index){
PHY_VARS_NR_UE *ue = PHY_vars_UE_g[Mod_id][CC_id];
int16_t pathloss;
if (get_softmodem_params()->do_ra){
long referenceSignalPower = ue->nrUE_config.ssb_config.ss_pbch_power;
double rsrp_dBm = 10*log10(ue->measurements.rsrp[gNB_index]) + 30 - ue->rx_total_gain_dB;
pathloss = (int16_t)(10*log10(pow(10, (double)(referenceSignalPower)/10) - pow(10, (double)(rsrp_dBm)/10)));
LOG_D(MAC, "In %s: pathloss %d dBm, UE RX total gain %d dB, referenceSignalPower %ld dBm (%f mW), RSRP %f dBm (%f mW)\n",
__FUNCTION__,
pathloss,
ue->rx_total_gain_dB,
referenceSignalPower,
pow(10, referenceSignalPower/10),
rsrp_dBm,
pow(10, rsrp_dBm/10));
} else {
pathloss = ((int16_t)(((10*ue->rx_total_gain_dB) - dB_fixed_times10(ue->measurements.rsrp[gNB_index]))/10));
}
return pathloss;
/*
if (ue->frame_parms.mode1_flag == 1)
RSoffset = 6;
else
RSoffset = 3;
*/
/* LOG_D(PHY,"get_nr_PL : rsrp %f dBm/RE (%f), eNB power %d dBm/RE\n",
(1.0*dB_fixed_times10(ue->measurements.rsrp[eNB_index])-(10.0*ue->rx_total_gain_dB))/10.0,
10*log10((double)ue->measurements.rsrp[eNB_index]),
ue->frame_parms.pdsch_config_common.referenceSignalPower);*/
return((int16_t)(((10*ue->rx_total_gain_dB) - dB_fixed_times10(ue->measurements.rsrp[gNB_index]))/10));
// dB_fixed_times10(RSoffset*12*ue_g[Mod_id][CC_id]->frame_parms.N_RB_DL) +
//(ue->frame_parms.pdsch_config_common.referenceSignalPower*10))/10));
}
uint32_t get_nr_rx_total_gain_dB (module_id_t Mod_id,uint8_t CC_id)
......@@ -108,7 +124,7 @@ void nr_ue_measurements(PHY_VARS_NR_UE *ue,
ue->measurements.nb_antennas_rx = frame_parms->nb_antennas_rx;
// signal measurements
for (gNB_id = 0; gNB_id < ue->n_connected_eNB; gNB_id++){
for (gNB_id = 0; gNB_id < ue->n_connected_gNB; gNB_id++){
ue->measurements.rx_power_tot[gNB_id] = 0;
......@@ -140,7 +156,7 @@ void nr_ue_measurements(PHY_VARS_NR_UE *ue,
// filter to remove jitter
if (ue->init_averaging == 0) {
for (gNB_id = 0; gNB_id < ue->n_connected_eNB; gNB_id++)
for (gNB_id = 0; gNB_id < ue->n_connected_gNB; gNB_id++)
ue->measurements.rx_power_avg[gNB_id] = (int)(((k1*((long long int)(ue->measurements.rx_power_avg[gNB_id]))) + (k2*((long long int)(ue->measurements.rx_power_tot[gNB_id])))) >> 10);
ue->measurements.n0_power_avg = (int)(((k1*((long long int) (ue->measurements.n0_power_avg))) + (k2*((long long int) (ue->measurements.n0_power_tot))))>>10);
......@@ -149,7 +165,7 @@ void nr_ue_measurements(PHY_VARS_NR_UE *ue,
} else {
for (gNB_id = 0; gNB_id < ue->n_connected_eNB; gNB_id++)
for (gNB_id = 0; gNB_id < ue->n_connected_gNB; gNB_id++)
ue->measurements.rx_power_avg[gNB_id] = ue->measurements.rx_power_tot[gNB_id];
ue->measurements.n0_power_avg = ue->measurements.n0_power_tot;
......@@ -157,7 +173,7 @@ void nr_ue_measurements(PHY_VARS_NR_UE *ue,
}
for (gNB_id = 0; gNB_id < ue->n_connected_eNB; gNB_id++) {
for (gNB_id = 0; gNB_id < ue->n_connected_gNB; gNB_id++) {
ue->measurements.rx_power_avg_dB[gNB_id] = dB_fixed( ue->measurements.rx_power_avg[gNB_id]);
ue->measurements.wideband_cqi_tot[gNB_id] = dB_fixed2(ue->measurements.rx_power_tot[gNB_id], ue->measurements.n0_power_tot);
......@@ -180,74 +196,74 @@ void nr_ue_measurements(PHY_VARS_NR_UE *ue,
#endif
}
// This function implements:
// - SS reference signal received power (SS-RSRP) as per clause 5.1.1 of 3GPP TS 38.215 version 16.3.0 Release 16
// - no Layer 3 filtering implemented (no filterCoefficient provided from RRC)
// Todo:
// - Layer 3 filtering according to clause 5.5.3.2 of 3GPP TS 38.331 version 16.2.0 Release 16
// Measurement units:
// - RSRP: W (dBW)
// - RX Gain dB
void nr_ue_rsrp_measurements(PHY_VARS_NR_UE *ue,
UE_nr_rxtx_proc_t *proc,
uint8_t slot,
uint8_t abstraction_flag)
uint8_t gNB_id,
UE_nr_rxtx_proc_t *proc,
uint8_t slot,
uint8_t abstraction_flag)
{
int aarx,rb, symbol_offset;
int16_t *rxF;
int aarx;
int nb_re;
int k_start = 55;
int k_end = 183;
unsigned int ssb_offset = ue->frame_parms.first_carrier_offset + ue->frame_parms.ssb_start_subcarrier;
uint8_t l_sss = ue->symbol_offset + 2;
uint16_t Nid_cell = ue->frame_parms.Nid_cell;
uint8_t eNB_offset=0,l,nushift;
uint16_t off,nb_rb;
// NR_UE_MAC_INST_t *mac = get_mac_inst(0);
int **rxdataF=ue->common_vars.common_vars_rx_data_per_thread[proc->thread_id].rxdataF;
if (ssb_offset>= ue->frame_parms.ofdm_symbol_size){
nushift = ue->frame_parms.Nid_cell%4;
ue->frame_parms.nushift = nushift;
unsigned int ssb_offset = ue->frame_parms.first_carrier_offset + ue->frame_parms.ssb_start_subcarrier;
if (ssb_offset>= ue->frame_parms.ofdm_symbol_size) ssb_offset-=ue->frame_parms.ofdm_symbol_size;
symbol_offset = ue->frame_parms.ofdm_symbol_size*((ue->symbol_offset+1)%(ue->frame_parms.symbols_per_slot));
ssb_offset -= ue->frame_parms.ofdm_symbol_size;
ue->measurements.rsrp[eNB_offset] = 0;
}
//if (mac->csirc->reportQuantity.choice.ssb_Index_RSRP){
nb_rb = 20;
//} else{
// LOG_E(PHY,"report quantity not supported \n");
//}
ue->measurements.rsrp[gNB_id] = 0;
if (abstraction_flag == 0) {
if (abstraction_flag == 0) {
for (l=0; l<1; l++) {
LOG_D(PHY, "In %s: [UE %d] slot %d l_sss %d ssb_offset %d\n", __FUNCTION__, ue->Mod_id, slot, l_sss, ssb_offset);
LOG_D(PHY,"[UE %d] slot %d Doing ue_rrc_measurements rsrp/rssi (Nid_cell %d, nushift %d, eNB_offset %d, l %d)\n",ue->Mod_id,slot,Nid_cell,nushift,
eNB_offset,l);
nb_re = 0;
for (aarx=0; aarx<ue->frame_parms.nb_antennas_rx; aarx++) {
rxF = (int16_t *)&rxdataF[aarx][(symbol_offset+ssb_offset+nushift)];
off = 0;
for (aarx = 0; aarx < ue->frame_parms.nb_antennas_rx; aarx++) {
if (l==0) {
for (rb=0; rb<nb_rb; rb++) {
int16_t *rxF_sss = (int16_t *)&ue->common_vars.common_vars_rx_data_per_thread[proc->thread_id].rxdataF[aarx][(l_sss*ue->frame_parms.ofdm_symbol_size) + ssb_offset];
ue->measurements.rsrp[eNB_offset] += (((int32_t)(rxF[off])*rxF[off])+((int32_t)(rxF[off+1])*rxF[off+1]));
//printf("rb %d, off %d : %d\n",rb,off,((((int32_t)rxF[off])*rxF[off])+((int32_t)(rxF[off+1])*rxF[off+1])));
for(int k = k_start; k < k_end; k++){
off = (off+4) % ue->frame_parms.ofdm_symbol_size;
}
}
}
}
#ifdef DEBUG_MEAS_UE
LOG_I(PHY, "In %s rxF_sss %d %d\n", __FUNCTION__, rxF_sss[k*2], rxF_sss[k*2 + 1]);
#endif
ue->measurements.rsrp[eNB_offset]/=nb_rb;
ue->measurements.rsrp[gNB_id] += (((int32_t)rxF_sss[k*2]*rxF_sss[k*2]) + ((int32_t)rxF_sss[k*2 + 1]*rxF_sss[k*2 + 1]));
} else {
nb_re++;
ue->measurements.rsrp[eNB_offset] = -93 ;
}
}
ue->measurements.rsrp[gNB_id] /= nb_re;
} else {
ue->measurements.rsrp[gNB_id] = -93;
}
if (eNB_offset == 0)
ue->measurements.rsrp_filtered[gNB_id] = ue->measurements.rsrp[gNB_id];
LOG_D(PHY,"[UE %d] slot %d RSRP Measurements (idx %d, Cell id %d) => rsrp: %3.1f dBm/RE (%d)\n",
ue->Mod_id,
slot,eNB_offset,
(eNB_offset>0) ? ue->measurements.adj_cell_id[eNB_offset-1] : ue->frame_parms.Nid_cell,
10*log10(ue->measurements.rsrp[eNB_offset])-ue->rx_total_gain_dB,
ue->measurements.rsrp[eNB_offset]);
LOG_D(PHY, "In %s: [UE %d] slot %d SS-RSRP: %3.1f dBm/RE (%d W)\n",
__FUNCTION__,
ue->Mod_id,
slot,
10*log10(ue->measurements.rsrp[gNB_id]) + 30 - ue->rx_total_gain_dB,
ue->measurements.rsrp[gNB_id]);
}
......
......@@ -81,12 +81,14 @@
void nr_pdcch_demapping_deinterleaving(uint32_t *llr,
uint32_t *z,
NR_DL_FRAME_PARMS *frame_parms,
uint8_t coreset_time_dur,
uint32_t coreset_nbr_rb,
uint8_t reg_bundle_size_L,
uint8_t coreset_interleaver_size_R,
uint8_t n_shift) {
uint8_t n_shift,
uint8_t number_of_candidates,
uint16_t *CCE,
uint8_t *L) {
/*
* This function will do demapping and deinterleaving from llr containing demodulated symbols
* Demapping will regroup in REG and bundles
......@@ -122,35 +124,61 @@ void nr_pdcch_demapping_deinterleaving(uint32_t *llr,
| REG 0 (bundle 0) bundle 0 bundle 0
*/
int c=0,r=0;
uint16_t bundle_j=0, f_bundle_j=0,f_reg=0;
uint32_t coreset_C=0;
int c = 0, r = 0;
uint16_t bundle_j = 0, f_bundle_j = 0, f_reg = 0;
uint32_t coreset_C = 0;
uint16_t index_z, index_llr;
int coreset_interleaved = 0;
if (reg_bundle_size_L!=0) { // interleaving will be done only if reg_bundle_size_L != 0
coreset_interleaved=1;
coreset_C = (uint32_t)((coreset_nbr_rb * coreset_time_dur)/ (coreset_interleaver_size_R*reg_bundle_size_L));
if (reg_bundle_size_L != 0) { // interleaving will be done only if reg_bundle_size_L != 0
coreset_interleaved = 1;
coreset_C = (uint32_t) ((coreset_nbr_rb * coreset_time_dur) / (coreset_interleaver_size_R * reg_bundle_size_L));
} else {
reg_bundle_size_L=6;
reg_bundle_size_L = 6;
}
for(int reg=0; reg<((coreset_nbr_rb*coreset_time_dur)); reg++) {
if ((reg%reg_bundle_size_L) == 0) {
int f_bundle_j_list[NR_MAX_PDCCH_AGG_LEVEL] = {};
for (int reg = 0; reg < ((coreset_nbr_rb * coreset_time_dur)); reg++) {
if ((reg % reg_bundle_size_L) == 0) {
if (r == coreset_interleaver_size_R) {
r=0;
r = 0;
c++;
}
bundle_j = (c*coreset_interleaver_size_R)+r;
f_bundle_j = ((r*coreset_C)+c+n_shift)%((coreset_nbr_rb*coreset_time_dur)/reg_bundle_size_L);
bundle_j = (c * coreset_interleaver_size_R) + r;
f_bundle_j = ((r * coreset_C) + c + n_shift) % ((coreset_nbr_rb * coreset_time_dur) / reg_bundle_size_L);
if (coreset_interleaved == 0) f_bundle_j = bundle_j;
if (coreset_interleaved==0) f_bundle_j=bundle_j;
f_bundle_j_list[reg / 6] = f_bundle_j;
LOG_DNL("[r=%d,c=%d] bundle_j(%d) interleaved at f_bundle_j(%d)\n",r,c,bundle_j,f_bundle_j);
}
if ((reg % reg_bundle_size_L) == 0) r++;
}
// Get cce_list indices by reg_idx in ascending order
int f_bundle_j_list_id = 0;
int f_bundle_j_list_ord[NR_MAX_PDCCH_AGG_LEVEL] = {};
for (int c_id = 0; c_id < number_of_candidates; c_id++ ) {
f_bundle_j_list_id = CCE[c_id];
for (int p = 0; p < NR_MAX_PDCCH_AGG_LEVEL; p++) {
for (int p2 = CCE[c_id]; p2 < CCE[c_id] + L[c_id]; p2++) {
if (f_bundle_j_list[p2] == p) {
f_bundle_j_list_ord[f_bundle_j_list_id] = p;
f_bundle_j_list_id++;
break;
}
}
}
}
for(int reg=0; reg<((coreset_nbr_rb*coreset_time_dur)); reg++) {
f_reg = (f_bundle_j*reg_bundle_size_L)+(reg%reg_bundle_size_L);
f_reg = (f_bundle_j_list_ord[reg/6]*reg_bundle_size_L)+(reg%reg_bundle_size_L);
index_z = 9*reg;
index_llr = 9*((uint16_t)floor(f_reg/coreset_time_dur)+((f_reg%coreset_time_dur)*(coreset_nbr_rb)));
......@@ -386,14 +414,14 @@ void nr_pdcch_extract_rbs_single(int32_t **rxdataF,
rxF=NULL;
// first we set initial conditions for pointer to rxdataF depending on the situation of the first RB within the CORESET (c_rb = n_BWP_start)
if ((c_rb < (frame_parms->N_RB_DL >> 1)) && ((frame_parms->N_RB_DL & 1) == 0)) {
if (((c_rb + n_BWP_start) < (frame_parms->N_RB_DL >> 1)) && ((frame_parms->N_RB_DL & 1) == 0)) {
//if RB to be treated is lower than middle system bandwidth then rxdataF pointed at (offset + c_br + symbol * ofdm_symbol_size): even case
rxF = &rxdataF[aarx][(frame_parms->first_carrier_offset + 12 * c_rb + (symbol * (frame_parms->ofdm_symbol_size)))+n_BWP_start*12];
LOG_DDD("in even case c_rb (%d) is lower than half N_RB_DL -> rxF = &rxdataF[aarx = (%d)][(frame_parms->first_carrier_offset + 12 * c_rb + (symbol * (frame_parms->ofdm_symbol_size))) = (%d)]\n",
c_rb,aarx,(frame_parms->first_carrier_offset + 12 * c_rb + (symbol * (frame_parms->ofdm_symbol_size))));
}
if ((c_rb >= (frame_parms->N_RB_DL >> 1)) && ((frame_parms->N_RB_DL & 1) == 0)) {
if (((c_rb + n_BWP_start) >= (frame_parms->N_RB_DL >> 1)) && ((frame_parms->N_RB_DL & 1) == 0)) {
// number of RBs is even and c_rb is higher than half system bandwidth (we don't skip DC)
// if these conditions are true the pointer has to be situated at the 1st part of the rxdataF
rxF = &rxdataF[aarx][(12*(c_rb - (frame_parms->N_RB_DL>>1)) + (symbol * (frame_parms->ofdm_symbol_size)))+n_BWP_start*12]; // we point at the 1st part of the rxdataF in symbol
......@@ -406,7 +434,7 @@ void nr_pdcch_extract_rbs_single(int32_t **rxdataF,
//#endif
}
if ((c_rb < (frame_parms->N_RB_DL >> 1)) && ((frame_parms->N_RB_DL & 1) != 0)) {
if (((c_rb + n_BWP_start) < (frame_parms->N_RB_DL >> 1)) && ((frame_parms->N_RB_DL & 1) != 0)) {
//if RB to be treated is lower than middle system bandwidth then rxdataF pointed at (offset + c_br + symbol * ofdm_symbol_size): odd case
rxF = &rxdataF[aarx][(frame_parms->first_carrier_offset + 12 * c_rb + (symbol * (frame_parms->ofdm_symbol_size)))+n_BWP_start*12];
#ifdef NR_PDCCH_DCI_DEBUG
......@@ -415,7 +443,7 @@ void nr_pdcch_extract_rbs_single(int32_t **rxdataF,
#endif
}
if ((c_rb > (frame_parms->N_RB_DL >> 1)) && ((frame_parms->N_RB_DL & 1) != 0)) {
if (((c_rb + n_BWP_start) > (frame_parms->N_RB_DL >> 1)) && ((frame_parms->N_RB_DL & 1) != 0)) {
// number of RBs is odd and c_rb is higher than half system bandwidth + 1
// if these conditions are true the pointer has to be situated at the 1st part of the rxdataF just after the first IQ symbols of the RB containing DC
rxF = &rxdataF[aarx][(12*(c_rb - (frame_parms->N_RB_DL>>1)) - 6 + (symbol * (frame_parms->ofdm_symbol_size)))+n_BWP_start*12]; // we point at the 1st part of the rxdataF in symbol
......@@ -425,7 +453,7 @@ void nr_pdcch_extract_rbs_single(int32_t **rxdataF,
#endif
}
if ((c_rb == (frame_parms->N_RB_DL >> 1)) && ((frame_parms->N_RB_DL & 1) != 0)) { // treatment of RB containing the DC
if (((c_rb + n_BWP_start) == (frame_parms->N_RB_DL >> 1)) && ((frame_parms->N_RB_DL & 1) != 0)) { // treatment of RB containing the DC
// if odd number RBs in system bandwidth and first RB to be treated is higher than middle system bandwidth (around DC)
// we have to treat the RB in two parts: first part from i=0 to 5, the data is at the end of rxdataF (pointing at the end of the table)
rxF = &rxdataF[aarx][(frame_parms->first_carrier_offset + 12 * c_rb + (symbol * (frame_parms->ofdm_symbol_size)))+n_BWP_start*12];
......@@ -760,12 +788,14 @@ int32_t nr_rx_pdcch(PHY_VARS_NR_UE *ue,
LOG_D(PHY,"we enter nr_pdcch_demapping_deinterleaving()\n");
nr_pdcch_demapping_deinterleaving((uint32_t *) pdcch_vars->llr,
(uint32_t *) pdcch_vars->e_rx,
frame_parms,
rel15->coreset.duration,
n_rb,
rel15->coreset.RegBundleSize,
rel15->coreset.InterleaverSize,
rel15->coreset.ShiftIndex);
rel15->coreset.ShiftIndex,
rel15->number_of_candidates,
rel15->CCE,
rel15->L);
/*
nr_pdcch_unscrambling(rel15->rnti,
frame_parms,
......@@ -889,7 +919,7 @@ uint8_t nr_dci_decoding_procedure(PHY_VARS_NR_UE *ue,
n_rnti = rel15->rnti;
if (crc == n_rnti) {
LOG_I(PHY, "(%i.%i) Received dci indication (rnti %x,dci format %d,n_CCE %d,payloadSize %d,payload %llx)\n",
LOG_D(PHY, "(%i.%i) Received dci indication (rnti %x,dci format %d,n_CCE %d,payloadSize %d,payload %llx)\n",
proc->frame_rx, proc->nr_slot_rx,n_rnti,rel15->dci_format_options[k],CCEind,dci_length,*(unsigned long long*)dci_estimation);
dci_ind->SFN = proc->frame_rx;
dci_ind->slot = proc->nr_slot_rx;
......
......@@ -203,7 +203,7 @@ NR_UE_DLSCH_t *new_nr_ue_dlsch(uint8_t Kmimo,uint8_t Mdlharq,uint32_t Nsoft,uint
return(dlsch);
}
LOG_I(PHY,"new_ue_dlsch with size %zu: exit_flag = %u\n",sizeof(NR_DL_UE_HARQ_t), exit_flag);
LOG_D(PHY,"new_ue_dlsch with size %zu: exit_flag = %u\n",sizeof(NR_DL_UE_HARQ_t), exit_flag);
free_nr_ue_dlsch(&dlsch,N_RB_DL);
return(NULL);
......@@ -361,7 +361,7 @@ uint32_t nr_dlsch_decoding(PHY_VARS_NR_UE *phy_vars_ue,
else
Coderate = (float) (harq_process->R) /(float) 2048;
if ((A <=292) || ((A<=3824) && (Coderate <= 0.6667)) || Coderate <= 0.25)
if ((A <=292) || ((A <= NR_MAX_PDSCH_TBS) && (Coderate <= 0.6667)) || Coderate <= 0.25)
{
p_decParams->BG = 2;
kc = 52;
......@@ -391,8 +391,8 @@ uint32_t nr_dlsch_decoding(PHY_VARS_NR_UE *phy_vars_ue,
if (harq_process->round == 0) {
// This is a new packet, so compute quantities regarding segmentation
if (A > 3824)
// This is a new packet, so compute quantities regarding segmentation
if (A > NR_MAX_PDSCH_TBS)
harq_process->B = A+24;
else
harq_process->B = A+16;
......@@ -531,7 +531,7 @@ uint32_t nr_dlsch_decoding(PHY_VARS_NR_UE *phy_vars_ue,
if (harq_process->C == 1){
if (A > 3824)
if (A > NR_MAX_PDSCH_TBS)
crc_type = CRC24_A;
else
crc_type = CRC16;
......@@ -577,7 +577,7 @@ uint32_t nr_dlsch_decoding(PHY_VARS_NR_UE *phy_vars_ue,
// Fixme: correct type is unsigned, but nrLDPC_decoder and all called behind use signed int
if (check_crc((uint8_t*)llrProcBuf,length_dec,harq_process->F,crc_type)) {
LOG_I(PHY,"Segment %u CRC OK\n\033[0m",r);
LOG_D(PHY,"Segment %u CRC OK\n\033[0m",r);
if (r==0) {
for (int i=0;i<10;i++) LOG_D(PHY,"byte %d : %x\n",i,((uint8_t*)llrProcBuf)[i]);
}
......@@ -617,13 +617,13 @@ uint32_t nr_dlsch_decoding(PHY_VARS_NR_UE *phy_vars_ue,
if ((err_flag == 0) && (ret>=(1+dlsch->max_ldpc_iterations))) {// a Code segment is in error so break;
LOG_I(PHY,"AbsSubframe %d.%d CRC failed, segment %d/%d \n",frame%1024,nr_slot_rx,r,harq_process->C-1);
LOG_D(PHY,"AbsSubframe %d.%d CRC failed, segment %d/%d \n",frame%1024,nr_slot_rx,r,harq_process->C-1);
err_flag = 1;
}
}
if (err_flag == 1) {
LOG_I(PHY,"[UE %d] DLSCH: Setting NAK for SFN/SF %d/%d (pid %d, status %d, round %d, TBS %d, mcs %d) Kr %d r %d harq_process->round %d\n",
LOG_D(PHY,"[UE %d] DLSCH: Setting NAK for SFN/SF %d/%d (pid %d, status %d, round %d, TBS %d, mcs %d) Kr %d r %d harq_process->round %d\n",
phy_vars_ue->Mod_id, frame, nr_slot_rx, harq_pid,harq_process->status, harq_process->round,harq_process->TBS,harq_process->mcs,Kr,r,harq_process->round);
harq_process->harq_ack.ack = 0;
......@@ -639,7 +639,7 @@ uint32_t nr_dlsch_decoding(PHY_VARS_NR_UE *phy_vars_ue,
if(is_crnti)
{
LOG_I(PHY,"[UE %d] DLSCH: Setting NACK for nr_slot_rx %d (pid %d, pid status %d, round %d/Max %d, TBS %d)\n",
LOG_D(PHY,"[UE %d] DLSCH: Setting NACK for nr_slot_rx %d (pid %d, pid status %d, round %d/Max %d, TBS %d)\n",
phy_vars_ue->Mod_id,nr_slot_rx,harq_pid,harq_process->status,harq_process->round,dlsch->Mdlharq,harq_process->TBS);
}
......@@ -813,6 +813,9 @@ uint32_t nr_dlsch_decoding_mthread(PHY_VARS_NR_UE *phy_vars_ue,
nb_rb = harq_process->nb_rb;
harq_process->trials[harq_process->round]++;
// HARQ stats
phy_vars_ue->dl_stats[harq_process->round]++;
uint16_t nb_rb_oh = 0; // it was not computed at UE side even before and set to 0 in nr_compute_tbs
harq_process->TBS = nr_compute_tbs(harq_process->Qm,harq_process->R,nb_rb,nb_symb_sch,nb_re_dmrs*length_dmrs, nb_rb_oh, 0, harq_process->Nl);
......@@ -826,7 +829,7 @@ uint32_t nr_dlsch_decoding_mthread(PHY_VARS_NR_UE *phy_vars_ue,
G = harq_process->G;
LOG_I(PHY,"DLSCH Decoding main, harq_pid %d TBS %d G %d, nb_re_dmrs %d, length_dmrs %d mcs %d Nl %d nb_symb_sch %d nb_rb %d\n",harq_pid,A,G, nb_re_dmrs, length_dmrs, harq_process->mcs, harq_process->Nl, nb_symb_sch,nb_rb);
LOG_D(PHY,"DLSCH Decoding main, harq_pid %d TBS %d G %d, nb_re_dmrs %d, length_dmrs %d mcs %d Nl %d nb_symb_sch %d nb_rb %d\n",harq_pid,A,G, nb_re_dmrs, length_dmrs, harq_process->mcs, harq_process->Nl, nb_symb_sch,nb_rb);
proc->decoder_main_available = 1;
proc->decoder_thread_available = 0;
......@@ -838,7 +841,7 @@ uint32_t nr_dlsch_decoding_mthread(PHY_VARS_NR_UE *phy_vars_ue,
else
Coderate = (float) (harq_process->R) /(float) 2048;
if ((A <=292) || ((A<=3824) && (Coderate <= 0.6667)) || Coderate <= 0.25)
if ((A <= 292) || ((A <= NR_MAX_PDSCH_TBS) && (Coderate <= 0.6667)) || Coderate <= 0.25)
{
p_decParams->BG = 2;
kc = 52;
......@@ -868,7 +871,7 @@ uint32_t nr_dlsch_decoding_mthread(PHY_VARS_NR_UE *phy_vars_ue,
if (harq_process->round == 0) {
// This is a new packet, so compute quantities regarding segmentation
if (A > 3824)
if (A > NR_MAX_PDSCH_TBS)
harq_process->B = A+24;
else
harq_process->B = A+16;
......@@ -905,7 +908,7 @@ uint32_t nr_dlsch_decoding_mthread(PHY_VARS_NR_UE *phy_vars_ue,
return((1+dlsch->max_ldpc_iterations));
}
if (LOG_DEBUGFLAG(DEBUG_DLSCH_DECOD))
LOG_I(PHY,"Segmentation: C %d, K %d\n",harq_process->C,harq_process->K);
LOG_D(PHY,"Segmentation: C %d, K %d\n",harq_process->C,harq_process->K);
notifiedFIFO_elt_t *res_dl;
......@@ -1055,7 +1058,7 @@ uint32_t nr_dlsch_decoding_mthread(PHY_VARS_NR_UE *phy_vars_ue,
memset(harq_process->c[r],0,Kr_bytes);
if (harq_process->C == 1){
if (A > 3824)
if (A > NR_MAX_PDSCH_TBS)
crc_type = CRC24_A;
else
crc_type = CRC16;
......@@ -1079,7 +1082,7 @@ uint32_t nr_dlsch_decoding_mthread(PHY_VARS_NR_UE *phy_vars_ue,
#if UE_TIMING_TRACE
start_meas(dlsch_turbo_decoding_stats);
#endif
LOG_I(PHY,"mthread AbsSubframe %d.%d Start LDPC segment %d/%d \n",frame%1024,nr_slot_rx,r,harq_process->C-1);
LOG_D(PHY,"mthread AbsSubframe %d.%d Start LDPC segment %d/%d \n",frame%1024,nr_slot_rx,r,harq_process->C-1);
/*for (int cnt =0; cnt < (kc-2)*p_decParams->Z; cnt++){
inv_d[cnt] = (1)*harq_process->d[r][cnt];
......@@ -1119,7 +1122,7 @@ uint32_t nr_dlsch_decoding_mthread(PHY_VARS_NR_UE *phy_vars_ue,
ret = 2;
}
else {
LOG_I(PHY,"CRC NOK\n");
LOG_D(PHY,"CRC NOK\n");
ret = 1+dlsch->max_ldpc_iterations;
}
......@@ -1160,7 +1163,7 @@ uint32_t nr_dlsch_decoding_mthread(PHY_VARS_NR_UE *phy_vars_ue,
if ((err_flag == 0) && (ret>=(1+dlsch->max_ldpc_iterations))) {// a Code segment is in error so break;
LOG_I(PHY,"AbsSubframe %d.%d CRC failed, segment %d/%d \n",frame%1024,nr_slot_rx,r,harq_process->C-1);
LOG_D(PHY,"AbsSubframe %d.%d CRC failed, segment %d/%d \n",frame%1024,nr_slot_rx,r,harq_process->C-1);
err_flag = 1;
}
//} //loop r
......@@ -1181,7 +1184,7 @@ uint32_t nr_dlsch_decoding_mthread(PHY_VARS_NR_UE *phy_vars_ue,
}
if(is_crnti)
{
LOG_I(PHY,"[UE %d] DLSCH: Setting NACK for nr_slot_rx %d (pid %d, pid status %d, round %d/Max %d, TBS %d)\n",
LOG_D(PHY,"[UE %d] DLSCH: Setting NACK for nr_slot_rx %d (pid %d, pid status %d, round %d/Max %d, TBS %d)\n",
phy_vars_ue->Mod_id,nr_slot_rx,harq_pid,harq_process->status,harq_process->round,dlsch->Mlimit,harq_process->TBS);
}
......@@ -1332,7 +1335,7 @@ void nr_dlsch_decoding_process(void *arg)
p_nrLDPC_procBuf = harq_process->p_nrLDPC_procBuf[r];
nb_symb_sch = harq_process->nb_symbols;
LOG_I(PHY,"dlsch decoding process frame %d slot %d segment %d r %u nb symb %d \n", frame, proc->nr_slot_rx, proc->num_seg, r, harq_process->nb_symbols);
LOG_D(PHY,"dlsch decoding process frame %d slot %d segment %d r %u nb symb %d \n", frame, proc->nr_slot_rx, proc->num_seg, r, harq_process->nb_symbols);
nb_rb = harq_process->nb_rb;
......@@ -1351,14 +1354,14 @@ void nr_dlsch_decoding_process(void *arg)
harq_process->G = nr_get_G(nb_rb, nb_symb_sch, nb_re_dmrs, length_dmrs, harq_process->Qm,harq_process->Nl);
G = harq_process->G;
LOG_I(PHY,"DLSCH Decoding process, harq_pid %d TBS %d G %d mcs %d Nl %d nb_symb_sch %d nb_rb %d\n",harq_pid,A,G, harq_process->mcs, harq_process->Nl, nb_symb_sch,nb_rb);
LOG_D(PHY,"DLSCH Decoding process, harq_pid %d TBS %d G %d mcs %d Nl %d nb_symb_sch %d nb_rb %d\n",harq_pid,A,G, harq_process->mcs, harq_process->Nl, nb_symb_sch,nb_rb);
if ((harq_process->R)<1024)
Coderate = (float) (harq_process->R) /(float) 1024;
else
Coderate = (float) (harq_process->R) /(float) 2048;
if ((A <=292) || ((A<=3824) && (Coderate <= 0.6667)) || Coderate <= 0.25)
if ((A <= 292) || ((A <= NR_MAX_PDSCH_TBS) && (Coderate <= 0.6667)) || Coderate <= 0.25)
{
p_decParams->BG = 2;
kc = 52;
......@@ -1389,7 +1392,7 @@ void nr_dlsch_decoding_process(void *arg)
harq_process->round =0;
// if (harq_process->round == 0) {
// This is a new packet, so compute quantities regarding segmentation
if (A > 3824)
if (A > NR_MAX_PDSCH_TBS)
harq_process->B = A+24;
else
harq_process->B = A+16;
......@@ -1513,7 +1516,7 @@ void nr_dlsch_decoding_process(void *arg)
memset(harq_process->c[r],0,Kr_bytes);
if (harq_process->C == 1){
if (A > 3824)
if (A > NR_MAX_PDSCH_TBS)
crc_type = CRC24_A;
else
crc_type = CRC16;
......@@ -1571,12 +1574,12 @@ void nr_dlsch_decoding_process(void *arg)
ret = 2;
}
else {
LOG_I(PHY,"Segment %u CRC NOK\n",r);
LOG_D(PHY,"Segment %u CRC NOK\n",r);
ret = 1+dlsch->max_ldpc_iterations;
}
if (no_iteration_ldpc > 10)
LOG_I(PHY,"Error number of iteration LPDC %d\n", no_iteration_ldpc);
LOG_D(PHY,"Error number of iteration LPDC %d\n", no_iteration_ldpc);
for (int m=0; m < Kr>>3; m ++)
......
......@@ -103,7 +103,7 @@ void free_list(NR_UE_SSB *node) {
}
int nr_pbch_detection(UE_nr_rxtx_proc_t * proc, PHY_VARS_NR_UE *ue, int pbch_initial_symbol, runmode_t mode)
int nr_pbch_detection(UE_nr_rxtx_proc_t * proc, PHY_VARS_NR_UE *ue, int pbch_initial_symbol)
{
NR_DL_FRAME_PARMS *frame_parms=&ue->frame_parms;
int ret =-1;
......@@ -202,7 +202,7 @@ int nr_pbch_detection(UE_nr_rxtx_proc_t * proc, PHY_VARS_NR_UE *ue, int pbch_ini
char duplex_string[2][4] = {"FDD","TDD"};
char prefix_string[2][9] = {"NORMAL","EXTENDED"};
int nr_initial_sync(UE_nr_rxtx_proc_t *proc, PHY_VARS_NR_UE *ue, runmode_t mode, int n_frames)
int nr_initial_sync(UE_nr_rxtx_proc_t *proc, PHY_VARS_NR_UE *ue, int n_frames)
{
int32_t sync_pos, sync_pos_frame; // k_ssb, N_ssb_crb, sync_pos2,
......@@ -299,7 +299,7 @@ int nr_initial_sync(UE_nr_rxtx_proc_t *proc, PHY_VARS_NR_UE *ue, runmode_t mode,
rx_sss_nr(ue, proc, &metric_tdd_ncp, &phase_tdd_ncp);
nr_gold_pbch(ue);
ret = nr_pbch_detection(proc, ue,1,mode); // start pbch detection at first symbol after pss
ret = nr_pbch_detection(proc, ue, 1); // start pbch detection at first symbol after pss
if (ret == 0) {
// sync at symbol ue->symbol_offset
......
......@@ -35,6 +35,7 @@
#include "PHY/sse_intrin.h"
#include "PHY/LTE_REFSIG/lte_refsig.h"
#include "PHY/INIT/phy_init.h"
#include "openair1/SCHED_NR_UE/defs.h"
//#define DEBUG_PBCH
//#define DEBUG_PBCH_ENCODING
......@@ -608,23 +609,10 @@ int nr_rx_pbch( PHY_VARS_NR_UE *ue,
nr_downlink_indication_t dl_indication;
fapi_nr_rx_indication_t rx_ind;
dl_indication.module_id = ue->Mod_id;
dl_indication.gNB_index = gNB_id;
dl_indication.cc_id = proc->CC_id;
dl_indication.frame = proc->frame_rx;
dl_indication.slot = proc->nr_slot_rx;
dl_indication.thread_id = proc->thread_id;
dl_indication.rx_ind = &rx_ind; // hang on rx_ind instance
dl_indication.dci_ind = NULL;
rx_ind.rx_indication_body[0].pdu_type = FAPI_NR_RX_PDU_TYPE_MIB;
rx_ind.rx_indication_body[0].mib_pdu.pdu = &decoded_output[0]; //not good as it is pointing to a memory that can change
rx_ind.rx_indication_body[0].mib_pdu.additional_bits = nr_ue_pbch_vars->xtra_byte;
rx_ind.rx_indication_body[0].mib_pdu.ssb_index = i_ssb; // confirm with TCL
rx_ind.rx_indication_body[0].mib_pdu.ssb_length = Lmax; // confirm with TCL
rx_ind.rx_indication_body[0].mib_pdu.cell_id = frame_parms->Nid_cell; // confirm with TCL
rx_ind.number_pdus = 1; //rx_ind.number_pdus++;
uint16_t number_pdus = 1;
nr_fill_dl_indication(&dl_indication, NULL, &rx_ind, proc, ue, gNB_id);
nr_fill_rx_indication(&rx_ind, FAPI_NR_RX_PDU_TYPE_MIB, gNB_id, ue, NULL, number_pdus);
if (ue->if_inst && ue->if_inst->dl_indication)
ue->if_inst->dl_indication(&dl_indication, NULL);
......
......@@ -1172,8 +1172,7 @@ int nr_rx_pbch( PHY_VARS_NR_UE *ue,
int nr_pbch_detection(UE_nr_rxtx_proc_t *proc,
PHY_VARS_NR_UE *ue,
int pbch_initial_symbol,
runmode_t mode);
int pbch_initial_symbol);
uint16_t rx_pbch_emul(PHY_VARS_NR_UE *phy_vars_ue,
uint8_t eNB_id,
......@@ -1453,7 +1452,6 @@ void generate_RIV_tables(void);
*/
int nr_initial_sync(UE_nr_rxtx_proc_t *proc,
PHY_VARS_NR_UE *phy_vars_ue,
runmode_t mode,
int n_frames);
/*!
......
......@@ -94,8 +94,6 @@ typedef struct {
uint32_t frame;
/// Subframe where current HARQ round was sent
uint32_t subframe;
/// Index of current HARQ round for this DLSCH
uint8_t round;
/// MIMO mode for this DLSCH
MIMO_mode_t mimo_mode;
/// Concatenated sequences
......@@ -138,8 +136,8 @@ typedef struct {
} NR_gNB_SCH_STATS_t;
typedef struct {
/// Pointers to 16 HARQ processes for the DLSCH
NR_DL_gNB_HARQ_t *harq_processes[NR_MAX_NB_HARQ_PROCESSES];
/// Pointers to variables related to DLSCH harq process
NR_DL_gNB_HARQ_t harq_process;
/// TX buffers for UE-spec transmission (antenna ports 5 or 7..14, prior to precoding)
int32_t *txdataF[NR_MAX_NB_LAYERS];
/// Modulated symbols buffer
......@@ -834,6 +832,7 @@ typedef struct PHY_VARS_gNB_s {
notifiedFIFO_t *respDecode;
tpool_t *threadPool;
int nbDecode;
uint8_t pusch_proc_threads;
} PHY_VARS_gNB;
......
This diff is collapsed.
......@@ -89,7 +89,7 @@
#define NR_MAX_NUM_BWP 4
#define NR_MAX_PDCCH_AGG_LEVEL 16
#define NR_MAX_PDCCH_AGG_LEVEL 16 // 3GPP TS 38.211 V15.8 Section 7.3.2 Table 7.3.2.1-1: Supported PDCCH aggregation levels
#define NR_MAX_CSET_DURATION 3
#define NR_MAX_NB_RBG 18
......@@ -150,6 +150,11 @@ typedef enum {
MOD_QAM256
}nr_mod_t;
typedef enum {
RA_2STEP = 0,
RA_4STEP
} nr_ra_type_e;
typedef struct {
/// Size of first RBG
uint8_t start_size;
......@@ -205,8 +210,12 @@ typedef struct {
uint16_t prach_format;
/// Preamble index for PRACH (0-63)
uint8_t ra_PreambleIndex;
/// RACH MaskIndex
uint8_t ra_RACH_MaskIndex;
/// Preamble Tx Counter
uint8_t RA_PREAMBLE_TRANSMISSION_COUNTER;
/// Preamble Power Ramping Counter
uint8_t RA_PREAMBLE_POWER_RAMPING_COUNTER;
/// 2-step RA power offset
int POWER_OFFSET_2STEP_RA;
/// Target received power at gNB. Baseline is range -202..-60 dBm. Depends on delta preamble, power ramping counter and step.
int ra_PREAMBLE_RECEIVED_TARGET_POWER;
/// PRACH index for TDD (0 ... 6) depending on TDD configuration and prachConfigIndex
......@@ -217,8 +226,10 @@ typedef struct {
uint8_t RA_PREAMBLE_BACKOFF;
///
uint8_t RA_SCALING_FACTOR_BI;
///
uint8_t RA_PCMAX;
/// Indicating whether it is 2-step or 4-step RA
nr_ra_type_e RA_TYPE;
/// UE configured maximum output power
int RA_PCMAX;
/// Corresponding RA-RNTI for UL-grant
uint16_t ra_RNTI;
/// Pointer to Msg3 payload for UL-grant
......
......@@ -25,6 +25,11 @@
#include "PHY/defs_nr_UE.h"
//#include "common/ran_context.h"
#ifdef XFORMS
#include "PHY/TOOLS/nr_phy_scope.h"
extern char do_forms;
#endif
extern char* namepointer_chMag ;
extern char* namepointer_log2;
extern char fmageren_name2[512];
......@@ -109,5 +114,8 @@ extern unsigned short Nb_81_110[8][4];
extern uint16_t hundred_times_log10_NPRB[100];
extern uint8_t alpha_lut[8];
extern uint8_t max_turbo_iterations;
extern double cpuf;
#endif /*__PHY_EXTERN_H__ */
......@@ -201,10 +201,10 @@ void phy_procedures_gNB_TX(PHY_VARS_gNB *gNB,
VCD_SIGNAL_DUMPER_DUMP_FUNCTION_BY_NAME(VCD_SIGNAL_DUMPER_FUNCTIONS_GENERATE_DLSCH,1);
LOG_D(PHY, "PDSCH generation started (%d) in frame %d.%d\n", gNB->num_pdsch_rnti[slot],frame,slot);
nr_generate_pdsch(gNB,frame, slot);
if ((frame&127) == 0) dump_pdsch_stats(gNB);
VCD_SIGNAL_DUMPER_DUMP_FUNCTION_BY_NAME(VCD_SIGNAL_DUMPER_FUNCTIONS_GENERATE_DLSCH,0);
}
if ((frame&127) == 0) dump_pdsch_stats(gNB);
//apply the OFDM symbol rotation here
apply_nr_rotation(fp,(int16_t*) &gNB->common_vars.txdataF[0][txdataF_offset],slot,0,fp->Ncp==EXTENDED?12:14,fp->ofdm_symbol_size);
......
......@@ -20,6 +20,7 @@
*/
/*
\brief NR UE PHY functions prototypes
\author R. Knopp, F. Kaltenberger
\company EURECOM
\email knopp@eurecom.fr
......@@ -113,16 +114,14 @@ void phy_procedures_nrUE_TX(PHY_VARS_NR_UE *ue, UE_nr_rxtx_proc_t *proc, uint8_t
@param ue Pointer to UE variables on which to act
@param proc Pointer to proc information
@param gNB_id Local id of eNB on which to act
@param mode calibration/debug mode
@param dlsch_parallel use multithreaded dlsch processing
*/
int phy_procedures_nrUE_RX(PHY_VARS_NR_UE *ue,
UE_nr_rxtx_proc_t *proc,
uint8_t gNB_id,
runmode_t mode,
uint8_t dlsch_parallel);
int phy_procedures_slot_parallelization_nrUE_RX(PHY_VARS_NR_UE *ue,UE_nr_rxtx_proc_t *proc,uint8_t eNB_id,uint8_t abstraction_flag,uint8_t do_pdcch_flag,runmode_t mode,relaying_type_t r_type);
int phy_procedures_slot_parallelization_nrUE_RX(PHY_VARS_NR_UE *ue, UE_nr_rxtx_proc_t *proc, uint8_t eNB_id, uint8_t abstraction_flag, uint8_t do_pdcch_flag, relaying_type_t r_type);
#ifdef UE_SLOT_PARALLELISATION
......@@ -223,7 +222,7 @@ void ra_succeeded(uint8_t Mod_id,uint8_t CC_id,uint8_t eNB_index);
@param
@param
*/
void nr_ue_prach_procedures(PHY_VARS_NR_UE *ue, UE_nr_rxtx_proc_t *proc, uint8_t gNB_id, runmode_t mode);
void nr_ue_prach_procedures(PHY_VARS_NR_UE *ue, UE_nr_rxtx_proc_t *proc, uint8_t gNB_id);
int is_nr_prach_subframe(NR_DL_FRAME_PARMS *frame_parms, uint32_t frame, uint8_t subframe);
......@@ -305,15 +304,6 @@ int8_t nr_find_ue(uint16_t rnti, PHY_VARS_eNB *phy_vars_eNB);
*/
void ue_ta_procedures(PHY_VARS_NR_UE *ue, int slot_tx, int frame_tx);
/*! \brief Compute the timing adjustment at UE side from the old TA offset and the new received TA command
@param Mod_id Local UE index on which to act
@param CC_id Component Carrier Index
@param ta_command TA command received from the network
@param mu numerology index (0,1,2..)
*/
void nr_process_timing_advance(module_id_t Mod_id,uint8_t CC_id,uint8_t ta_command, uint8_t mu, uint16_t bwp_ul_NB_RB);
void nr_process_timing_advance_rar(PHY_VARS_NR_UE *ue, int frame_rx, int nr_slot_rx, uint16_t ta_command);
unsigned int nr_get_tx_amp(int power_dBm, int power_max_dBm, int N_RB_UL, int nb_rb);
void phy_reset_ue(module_id_t Mod_id,uint8_t CC_id,uint8_t eNB_index);
......@@ -347,6 +337,8 @@ uint16_t nr_get_n1_pucch(PHY_VARS_NR_UE *phy_vars_ue,
*/
UE_MODE_t get_nrUE_mode(uint8_t Mod_id,uint8_t CC_id,uint8_t gNB_index);
uint8_t get_ra_PreambleIndex(uint8_t Mod_id, uint8_t CC_id, uint8_t gNB_id);
/*! \brief This function implements the power control mechanism for PUCCH from 36.213.
@param phy_vars_ue PHY variables
@param proc Pointer to proc descriptor
......@@ -396,8 +388,34 @@ int get_tx_harq_id(NR_UE_ULSCH_t *ulsch, int slot_tx);
int is_pbch_in_slot(fapi_nr_config_request_t *config, int frame, int slot, NR_DL_FRAME_PARMS *fp);
int is_ssb_in_slot(fapi_nr_config_request_t *config, int frame, int slot, NR_DL_FRAME_PARMS *fp);
/*! \brief This function prepares the dl indication to pass to the MAC
@param
@param
@param
@param
*/
void nr_fill_dl_indication(nr_downlink_indication_t *dl_ind,
fapi_nr_dci_indication_t *dci_ind,
fapi_nr_rx_indication_t *rx_ind,
UE_nr_rxtx_proc_t *proc,
PHY_VARS_NR_UE *ue,
uint8_t gNB_id);
/*@}*/
/*! \brief This function prepares the dl rx indication
@param
@param
@param
@param
*/
void nr_fill_rx_indication(fapi_nr_rx_indication_t *rx_ind,
uint8_t pdu_type,
uint8_t gNB_id,
PHY_VARS_NR_UE *ue,
NR_UE_DLSCH_t *dlsch0,
uint16_t n_pdus);
#endif
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......@@ -675,7 +675,7 @@ int main(int argc, char **argv)
}
if (UE->is_synchronized == 0) {
UE_nr_rxtx_proc_t proc={0};
ret = nr_initial_sync(&proc, UE, normal_txrx,1);
ret = nr_initial_sync(&proc, UE, 1);
printf("nr_initial_sync1 returns %d\n",ret);
if (ret<0) n_errors++;
}
......
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