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OpenXG
OpenXG-RAN
Commits
e592045d
Commit
e592045d
authored
Jun 10, 2022
by
francescomani
Browse files
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Plain Diff
improvements in using genericParameters and other stuff
parent
c1c5c68e
Changes
13
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Showing
13 changed files
with
175 additions
and
195 deletions
+175
-195
openair2/LAYER2/NR_MAC_COMMON/nr_mac_common.c
openair2/LAYER2/NR_MAC_COMMON/nr_mac_common.c
+12
-12
openair2/LAYER2/NR_MAC_COMMON/nr_mac_common.h
openair2/LAYER2/NR_MAC_COMMON/nr_mac_common.h
+1
-1
openair2/LAYER2/NR_MAC_UE/nr_ue_procedures.c
openair2/LAYER2/NR_MAC_UE/nr_ue_procedures.c
+4
-2
openair2/LAYER2/NR_MAC_gNB/gNB_scheduler_RA.c
openair2/LAYER2/NR_MAC_gNB/gNB_scheduler_RA.c
+25
-59
openair2/LAYER2/NR_MAC_gNB/gNB_scheduler_bch.c
openair2/LAYER2/NR_MAC_gNB/gNB_scheduler_bch.c
+1
-1
openair2/LAYER2/NR_MAC_gNB/gNB_scheduler_dlsch.c
openair2/LAYER2/NR_MAC_gNB/gNB_scheduler_dlsch.c
+20
-34
openair2/LAYER2/NR_MAC_gNB/gNB_scheduler_phytest.c
openair2/LAYER2/NR_MAC_gNB/gNB_scheduler_phytest.c
+5
-6
openair2/LAYER2/NR_MAC_gNB/gNB_scheduler_primitives.c
openair2/LAYER2/NR_MAC_gNB/gNB_scheduler_primitives.c
+65
-30
openair2/LAYER2/NR_MAC_gNB/gNB_scheduler_srs.c
openair2/LAYER2/NR_MAC_gNB/gNB_scheduler_srs.c
+4
-6
openair2/LAYER2/NR_MAC_gNB/gNB_scheduler_uci.c
openair2/LAYER2/NR_MAC_gNB/gNB_scheduler_uci.c
+14
-25
openair2/LAYER2/NR_MAC_gNB/gNB_scheduler_ulsch.c
openair2/LAYER2/NR_MAC_gNB/gNB_scheduler_ulsch.c
+14
-16
openair2/LAYER2/NR_MAC_gNB/mac_proto.h
openair2/LAYER2/NR_MAC_gNB/mac_proto.h
+2
-1
openair2/LAYER2/NR_MAC_gNB/nr_mac_gNB.h
openair2/LAYER2/NR_MAC_gNB/nr_mac_gNB.h
+8
-2
No files found.
openair2/LAYER2/NR_MAC_COMMON/nr_mac_common.c
View file @
e592045d
...
@@ -4112,22 +4112,22 @@ uint16_t compute_pucch_prb_size(uint8_t format,
...
@@ -4112,22 +4112,22 @@ uint16_t compute_pucch_prb_size(uint8_t format,
}
}
}
}
int
get_bw_tbslbrm
(
NR_BWP_t
*
genericParameters
,
int
get_bw_tbslbrm
(
int
scc_bwpsize
,
NR_CellGroupConfig_t
*
cg
)
{
NR_CellGroupConfig_t
*
cg
)
{
int
bw
=
0
;
int
bw
=
scc_bwpsize
;
if
(
cg
&&
cg
->
spCellConfig
&&
cg
->
spCellConfig
->
spCellConfigDedicated
&&
if
(
cg
&&
cg
->
spCellConfig
&&
cg
->
spCellConfig
->
spCellConfigDedicated
)
{
cg
->
spCellConfig
->
spCellConfigDedicated
->
downlinkBWP_ToAddModList
)
{
const
NR_ServingCellConfig_t
*
servingCellConfig
=
cg
->
spCellConfig
->
spCellConfigDedicated
;
struct
NR_ServingCellConfig__downlinkBWP_ToAddModList
*
BWP_list
=
cg
->
spCellConfig
->
spCellConfigDedicated
->
downlinkBWP_ToAddModList
;
if
(
servingCellConfig
->
downlinkBWP_ToAddModList
)
{
for
(
int
i
=
0
;
i
<
BWP_list
->
list
.
count
;
i
++
)
{
struct
NR_ServingCellConfig__downlinkBWP_ToAddModList
*
BWP_list
=
servingCellConfig
->
downlinkBWP_ToAddModList
;
genericParameters
=
&
BWP_list
->
list
.
array
[
i
]
->
bwp_Common
->
genericParameters
;
for
(
int
i
=
0
;
i
<
BWP_list
->
list
.
count
;
i
++
)
{
int
curr_bw
=
NRRIV2BW
(
genericParameters
->
locationAndBandwidth
,
MAX_BWP_SIZE
);
NR_BWP_t
genericParameters
=
BWP_list
->
list
.
array
[
i
]
->
bwp_Common
->
genericParameters
;
if
(
curr_bw
>
bw
)
int
curr_bw
=
NRRIV2BW
(
genericParameters
.
locationAndBandwidth
,
MAX_BWP_SIZE
);
bw
=
curr_bw
;
if
(
curr_bw
>
bw
)
bw
=
curr_bw
;
}
}
}
}
}
else
bw
=
NRRIV2BW
(
genericParameters
->
locationAndBandwidth
,
MAX_BWP_SIZE
);
return
bw
;
return
bw
;
}
}
...
...
openair2/LAYER2/NR_MAC_COMMON/nr_mac_common.h
View file @
e592045d
...
@@ -140,7 +140,7 @@ uint32_t nr_get_code_rate_ul(uint8_t Imcs, uint8_t table_idx);
...
@@ -140,7 +140,7 @@ uint32_t nr_get_code_rate_ul(uint8_t Imcs, uint8_t table_idx);
uint16_t
get_nr_srs_offset
(
NR_SRS_PeriodicityAndOffset_t
periodicityAndOffset
);
uint16_t
get_nr_srs_offset
(
NR_SRS_PeriodicityAndOffset_t
periodicityAndOffset
);
int
get_bw_tbslbrm
(
NR_BWP_t
*
genericParameters
,
int
get_bw_tbslbrm
(
int
scc_bwpsize
,
NR_CellGroupConfig_t
*
cg
);
NR_CellGroupConfig_t
*
cg
);
uint32_t
nr_compute_tbslbrm
(
uint16_t
table
,
uint32_t
nr_compute_tbslbrm
(
uint16_t
table
,
...
...
openair2/LAYER2/NR_MAC_UE/nr_ue_procedures.c
View file @
e592045d
...
@@ -957,7 +957,8 @@ int8_t nr_ue_process_dci(module_id_t module_id, int cc_id, uint8_t gNB_index, fr
...
@@ -957,7 +957,8 @@ int8_t nr_ue_process_dci(module_id_t module_id, int cc_id, uint8_t gNB_index, fr
if
(
mac
->
scc
||
mac
->
scc_SIB
||
mac
->
cg
)
{
if
(
mac
->
scc
||
mac
->
scc_SIB
||
mac
->
cg
)
{
NR_BWP_t
genericParameters
=
mac
->
scc
?
mac
->
scc
->
downlinkConfigCommon
->
initialDownlinkBWP
->
genericParameters
:
NR_BWP_t
genericParameters
=
mac
->
scc
?
mac
->
scc
->
downlinkConfigCommon
->
initialDownlinkBWP
->
genericParameters
:
mac
->
scc_SIB
->
downlinkConfigCommon
.
initialDownlinkBWP
.
genericParameters
;
mac
->
scc_SIB
->
downlinkConfigCommon
.
initialDownlinkBWP
.
genericParameters
;
bw_tbslbrm
=
get_bw_tbslbrm
(
&
genericParameters
,
mac
->
cg
);
int
BWPSize
=
NRRIV2BW
(
genericParameters
.
locationAndBandwidth
,
MAX_BWP_SIZE
);
bw_tbslbrm
=
get_bw_tbslbrm
(
BWPSize
,
mac
->
cg
);
}
}
else
else
bw_tbslbrm
=
dlsch_config_pdu_1_0
->
BWPSize
;
bw_tbslbrm
=
dlsch_config_pdu_1_0
->
BWPSize
;
...
@@ -1396,7 +1397,8 @@ int8_t nr_ue_process_dci(module_id_t module_id, int cc_id, uint8_t gNB_index, fr
...
@@ -1396,7 +1397,8 @@ int8_t nr_ue_process_dci(module_id_t module_id, int cc_id, uint8_t gNB_index, fr
int
nl_tbslbrm
=
*
maxMIMO_Layers
<
4
?
*
maxMIMO_Layers
:
4
;
int
nl_tbslbrm
=
*
maxMIMO_Layers
<
4
?
*
maxMIMO_Layers
:
4
;
NR_BWP_t
genericParameters
=
mac
->
scc
?
mac
->
scc
->
downlinkConfigCommon
->
initialDownlinkBWP
->
genericParameters
:
NR_BWP_t
genericParameters
=
mac
->
scc
?
mac
->
scc
->
downlinkConfigCommon
->
initialDownlinkBWP
->
genericParameters
:
mac
->
scc_SIB
->
downlinkConfigCommon
.
initialDownlinkBWP
.
genericParameters
;
mac
->
scc_SIB
->
downlinkConfigCommon
.
initialDownlinkBWP
.
genericParameters
;
int
bw_tbslbrm
=
get_bw_tbslbrm
(
&
genericParameters
,
mac
->
cg
);
int
BWPSize
=
NRRIV2BW
(
genericParameters
.
locationAndBandwidth
,
MAX_BWP_SIZE
);
int
bw_tbslbrm
=
get_bw_tbslbrm
(
BWPSize
,
mac
->
cg
);
dlsch_config_pdu_1_1
->
tbslbrm
=
nr_compute_tbslbrm
(
dlsch_config_pdu_1_1
->
mcs_table
,
dlsch_config_pdu_1_1
->
tbslbrm
=
nr_compute_tbslbrm
(
dlsch_config_pdu_1_1
->
mcs_table
,
bw_tbslbrm
,
bw_tbslbrm
,
nl_tbslbrm
);
nl_tbslbrm
);
...
...
openair2/LAYER2/NR_MAC_gNB/gNB_scheduler_RA.c
View file @
e592045d
This diff is collapsed.
Click to expand it.
openair2/LAYER2/NR_MAC_gNB/gNB_scheduler_bch.c
View file @
e592045d
...
@@ -452,7 +452,7 @@ void nr_fill_nfapi_dl_sib1_pdu(int Mod_idP,
...
@@ -452,7 +452,7 @@ void nr_fill_nfapi_dl_sib1_pdu(int Mod_idP,
nfapi_nr_dl_tti_pdcch_pdu_rel15_t
*
pdcch_pdu_rel15
=
&
dl_tti_pdcch_pdu
->
pdcch_pdu
.
pdcch_pdu_rel15
;
nfapi_nr_dl_tti_pdcch_pdu_rel15_t
*
pdcch_pdu_rel15
=
&
dl_tti_pdcch_pdu
->
pdcch_pdu
.
pdcch_pdu_rel15
;
nr_configure_pdcch
(
pdcch_pdu_rel15
,
nr_configure_pdcch
(
pdcch_pdu_rel15
,
gNB_mac
->
sched_ctrlCommon
->
coreset
,
gNB_mac
->
sched_ctrlCommon
->
coreset
,
NULL
,
true
,
// sib1
&
gNB_mac
->
sched_ctrlCommon
->
sched_pdcch
);
&
gNB_mac
->
sched_ctrlCommon
->
sched_pdcch
);
nfapi_nr_dl_tti_request_pdu_t
*
dl_tti_pdsch_pdu
=
&
dl_req
->
dl_tti_pdu_list
[
dl_req
->
nPDUs
];
nfapi_nr_dl_tti_request_pdu_t
*
dl_tti_pdsch_pdu
=
&
dl_req
->
dl_tti_pdu_list
[
dl_req
->
nPDUs
];
...
...
openair2/LAYER2/NR_MAC_gNB/gNB_scheduler_dlsch.c
View file @
e592045d
...
@@ -394,8 +394,8 @@ bool allocate_dl_retransmission(module_id_t module_id,
...
@@ -394,8 +394,8 @@ bool allocate_dl_retransmission(module_id_t module_id,
const
NR_SIB1_t
*
sib1
=
RC
.
nrmac
[
module_id
]
->
common_channels
[
0
].
sib1
?
RC
.
nrmac
[
module_id
]
->
common_channels
[
0
].
sib1
->
message
.
choice
.
c1
->
choice
.
systemInformationBlockType1
:
NULL
;
const
NR_SIB1_t
*
sib1
=
RC
.
nrmac
[
module_id
]
->
common_channels
[
0
].
sib1
?
RC
.
nrmac
[
module_id
]
->
common_channels
[
0
].
sib1
->
message
.
choice
.
c1
->
choice
.
systemInformationBlockType1
:
NULL
;
const
int
coresetid
=
(
sched_ctrl
->
active_bwp
||
bwpd
)
?
sched_ctrl
->
coreset
->
controlResourceSetId
:
RC
.
nrmac
[
module_id
]
->
sched_ctrlCommon
->
coreset
->
controlResourceSetId
;
const
int
coresetid
=
sched_ctrl
->
coreset
->
controlResourceSetId
;
const
uint16_t
bwpSize
=
coresetid
==
0
?
RC
.
nrmac
[
module_id
]
->
cset0_bwp_size
:
NRRIV2BW
(
UE
->
current_BWP
.
dl_genericParameters
->
locationAndBandwidth
,
MAX_BWP_SIZE
)
;
const
uint16_t
bwpSize
=
coresetid
==
0
?
RC
.
nrmac
[
module_id
]
->
cset0_bwp_size
:
UE
->
current_BWP
.
dl_BWPSize
;
int
rbStart
=
0
;
// start wrt BWPstart
int
rbStart
=
0
;
// start wrt BWPstart
NR_pdsch_semi_static_t
*
ps
=
&
sched_ctrl
->
pdsch_semi_static
;
NR_pdsch_semi_static_t
*
ps
=
&
sched_ctrl
->
pdsch_semi_static
;
...
@@ -670,14 +670,12 @@ void pf_dl(module_id_t module_id,
...
@@ -670,14 +670,12 @@ void pf_dl(module_id_t module_id,
RC
.
nrmac
[
module_id
]
->
common_channels
[
0
].
sib1
->
message
.
choice
.
c1
->
choice
.
systemInformationBlockType1
:
RC
.
nrmac
[
module_id
]
->
common_channels
[
0
].
sib1
->
message
.
choice
.
c1
->
choice
.
systemInformationBlockType1
:
NULL
;
NULL
;
NR_
BWP_t
*
genericParameters
=
iterator
->
UE
->
current_BWP
.
dl_genericParameters
;
NR_
UE_BWP_t
*
BWP
=
&
iterator
->
UE
->
current_BWP
;
const
int
coresetid
=
(
sched_ctrl
->
active_bwp
||
bwpd
)
?
const
int
coresetid
=
sched_ctrl
->
coreset
->
controlResourceSetId
;
sched_ctrl
->
coreset
->
controlResourceSetId
:
RC
.
nrmac
[
module_id
]
->
sched_ctrlCommon
->
coreset
->
controlResourceSetId
;
const
uint16_t
bwpSize
=
coresetid
==
0
?
const
uint16_t
bwpSize
=
coresetid
==
0
?
RC
.
nrmac
[
module_id
]
->
cset0_bwp_size
:
RC
.
nrmac
[
module_id
]
->
cset0_bwp_size
:
NRRIV2BW
(
genericParameters
->
locationAndBandwidth
,
MAX_BWP_SIZE
)
;
BWP
->
dl_BWPSize
;
int
rbStart
=
0
;
// start wrt BWPstart
int
rbStart
=
0
;
// start wrt BWPstart
if
(
sched_ctrl
->
available_dl_harq
.
head
<
0
)
{
if
(
sched_ctrl
->
available_dl_harq
.
head
<
0
)
{
...
@@ -824,18 +822,12 @@ void nr_fr1_dlsch_preprocessor(module_id_t module_id, frame_t frame, sub_frame_t
...
@@ -824,18 +822,12 @@ void nr_fr1_dlsch_preprocessor(module_id_t module_id, frame_t frame, sub_frame_t
const
int
startSymbolAndLength
=
tdaList
->
list
.
array
[
tda
]
->
startSymbolAndLength
;
const
int
startSymbolAndLength
=
tdaList
->
list
.
array
[
tda
]
->
startSymbolAndLength
;
SLIV2SL
(
startSymbolAndLength
,
&
startSymbolIndex
,
&
nrOfSymbols
);
SLIV2SL
(
startSymbolAndLength
,
&
startSymbolIndex
,
&
nrOfSymbols
);
NR_
BWP_t
*
genericParameters
=
UE
->
current_BWP
.
dl_genericParameters
;
NR_
UE_BWP_t
*
BWP
=
&
UE
->
current_BWP
;
NR_BWP_DownlinkDedicated_t
*
bwpd
=
const
int
coresetid
=
sched_ctrl
->
coreset
->
controlResourceSetId
;
UE
->
CellGroup
&&
UE
->
CellGroup
->
spCellConfig
&&
UE
->
CellGroup
->
spCellConfig
->
spCellConfigDedicated
?
UE
->
CellGroup
->
spCellConfig
->
spCellConfigDedicated
->
initialDownlinkBWP
:
NULL
;
const
int
coresetid
=
(
sched_ctrl
->
active_bwp
||
bwpd
)
?
sched_ctrl
->
coreset
->
controlResourceSetId
:
RC
.
nrmac
[
module_id
]
->
sched_ctrlCommon
->
coreset
->
controlResourceSetId
;
const
uint16_t
bwpSize
=
coresetid
==
0
?
RC
.
nrmac
[
module_id
]
->
cset0_bwp_size
:
NRRIV2BW
(
genericParameters
->
locationAndBandwidth
,
MAX_BWP_SIZE
)
;
const
uint16_t
bwpSize
=
coresetid
==
0
?
RC
.
nrmac
[
module_id
]
->
cset0_bwp_size
:
BWP
->
dl_BWPSize
;
const
uint16_t
BWPStart
=
coresetid
==
0
?
RC
.
nrmac
[
module_id
]
->
cset0_bwp_start
:
NRRIV2PRBOFFSET
(
genericParameters
->
locationAndBandwidth
,
MAX_BWP_SIZE
)
;
const
uint16_t
BWPStart
=
coresetid
==
0
?
RC
.
nrmac
[
module_id
]
->
cset0_bwp_start
:
BWP
->
dl_BWPStart
;
const
uint16_t
slbitmap
=
SL_to_bitmap
(
startSymbolIndex
,
nrOfSymbols
);
const
uint16_t
slbitmap
=
SL_to_bitmap
(
startSymbolIndex
,
nrOfSymbols
);
uint16_t
*
vrb_map
=
RC
.
nrmac
[
module_id
]
->
common_channels
[
CC_id
].
vrb_map
;
uint16_t
*
vrb_map
=
RC
.
nrmac
[
module_id
]
->
common_channels
[
CC_id
].
vrb_map
;
...
@@ -920,12 +912,6 @@ void nr_schedule_ue_spec(module_id_t module_id,
...
@@ -920,12 +912,6 @@ void nr_schedule_ue_spec(module_id_t module_id,
UE
->
mac_stats
.
dl
.
current_bytes
=
0
;
UE
->
mac_stats
.
dl
.
current_bytes
=
0
;
NR_CellGroupConfig_t
*
cg
=
UE
->
CellGroup
;
NR_CellGroupConfig_t
*
cg
=
UE
->
CellGroup
;
NR_BWP_DownlinkDedicated_t
*
bwpd
=
cg
&&
cg
->
spCellConfig
&&
cg
->
spCellConfig
->
spCellConfigDedicated
?
cg
->
spCellConfig
->
spCellConfigDedicated
->
initialDownlinkBWP
:
NULL
;
/* update TA and set ta_apply every 10 frames.
/* update TA and set ta_apply every 10 frames.
* Possible improvement: take the periodicity from input file.
* Possible improvement: take the periodicity from input file.
* If such UE is not scheduled now, it will be by the preprocessor later.
* If such UE is not scheduled now, it will be by the preprocessor later.
...
@@ -999,14 +985,13 @@ void nr_schedule_ue_spec(module_id_t module_id,
...
@@ -999,14 +985,13 @@ void nr_schedule_ue_spec(module_id_t module_id,
pucch
->
ul_slot
,
pucch
->
ul_slot
,
sched_pdsch
->
pucch_allocation
,
sched_pdsch
->
pucch_allocation
,
sched_ctrl
->
tpc1
);
sched_ctrl
->
tpc1
);
NR_BWP_Downlink_t
*
bwp
=
sched_ctrl
->
active_bwp
;
NR_BWP_
t
*
genericParameters
=
current_BWP
->
dl_genericParameters
;
NR_BWP_
Downlink_t
*
bwp
=
sched_ctrl
->
active_bwp
;
NR_SearchSpace_t
*
ss
=
(
bwp
||
bwpd
)
?
sched_ctrl
->
search_space
:
gNB_mac
->
sched_ctrlCommon
->
search_space
;
NR_SearchSpace_t
*
ss
=
sched_ctrl
->
search_space
;
const
int
bwp_id
=
current_BWP
->
dl_bwp_id
;
const
int
bwp_id
=
current_BWP
->
dl_bwp_id
;
const
int
coresetid
=
(
bwp
||
bwpd
)
?
sched_ctrl
->
coreset
->
controlResourceSetId
:
gNB_mac
->
sched_ctrlCommon
->
coreset
->
controlResourceSetId
;
const
int
coresetid
=
sched_ctrl
->
coreset
->
controlResourceSetId
;
/* look up the PDCCH PDU for this CC, BWP, and CORESET. If it does not exist, create it */
/* look up the PDCCH PDU for this CC, BWP, and CORESET. If it does not exist, create it */
nfapi_nr_dl_tti_pdcch_pdu_rel15_t
*
pdcch_pdu
=
gNB_mac
->
pdcch_pdu_idx
[
CC_id
][
coresetid
];
nfapi_nr_dl_tti_pdcch_pdu_rel15_t
*
pdcch_pdu
=
gNB_mac
->
pdcch_pdu_idx
[
CC_id
][
coresetid
];
...
@@ -1020,8 +1005,8 @@ void nr_schedule_ue_spec(module_id_t module_id,
...
@@ -1020,8 +1005,8 @@ void nr_schedule_ue_spec(module_id_t module_id,
dl_req
->
nPDUs
+=
1
;
dl_req
->
nPDUs
+=
1
;
pdcch_pdu
=
&
dl_tti_pdcch_pdu
->
pdcch_pdu
.
pdcch_pdu_rel15
;
pdcch_pdu
=
&
dl_tti_pdcch_pdu
->
pdcch_pdu
.
pdcch_pdu_rel15
;
LOG_D
(
NR_MAC
,
"Trying to configure DL pdcch for UE %04x, bwp %d, cs %d
\n
"
,
UE
->
rnti
,
bwp_id
,
coresetid
);
LOG_D
(
NR_MAC
,
"Trying to configure DL pdcch for UE %04x, bwp %d, cs %d
\n
"
,
UE
->
rnti
,
bwp_id
,
coresetid
);
NR_ControlResourceSet_t
*
coreset
=
(
bwp
||
bwpd
)
?
sched_ctrl
->
coreset
:
gNB_mac
->
sched_ctrlCommon
->
coreset
;
NR_ControlResourceSet_t
*
coreset
=
sched_ctrl
->
coreset
;
nr_configure_pdcch
(
pdcch_pdu
,
coreset
,
genericParameters
,
&
sched_ctrl
->
sched_pdcch
);
nr_configure_pdcch
(
pdcch_pdu
,
coreset
,
false
,
&
sched_ctrl
->
sched_pdcch
);
gNB_mac
->
pdcch_pdu_idx
[
CC_id
][
coresetid
]
=
pdcch_pdu
;
gNB_mac
->
pdcch_pdu_idx
[
CC_id
][
coresetid
]
=
pdcch_pdu
;
}
}
...
@@ -1043,12 +1028,12 @@ void nr_schedule_ue_spec(module_id_t module_id,
...
@@ -1043,12 +1028,12 @@ void nr_schedule_ue_spec(module_id_t module_id,
pdsch_pdu
->
BWPSize
=
gNB_mac
->
cset0_bwp_size
;
pdsch_pdu
->
BWPSize
=
gNB_mac
->
cset0_bwp_size
;
pdsch_pdu
->
BWPStart
=
gNB_mac
->
cset0_bwp_start
;
pdsch_pdu
->
BWPStart
=
gNB_mac
->
cset0_bwp_start
;
}
else
{
}
else
{
pdsch_pdu
->
BWPSize
=
NRRIV2BW
(
genericParameters
->
locationAndBandwidth
,
MAX_BWP_SIZE
)
;
pdsch_pdu
->
BWPSize
=
current_BWP
->
dl_BWPSize
;
pdsch_pdu
->
BWPStart
=
NRRIV2PRBOFFSET
(
genericParameters
->
locationAndBandwidth
,
MAX_BWP_SIZE
)
;
pdsch_pdu
->
BWPStart
=
current_BWP
->
dl_BWPStart
;
}
}
pdsch_pdu
->
SubcarrierSpacing
=
genericParameters
->
subcarrierSpacing
;
pdsch_pdu
->
SubcarrierSpacing
=
current_BWP
->
dl_scs
;
pdsch_pdu
->
CyclicPrefix
=
genericParameters
->
cyclicPrefix
?
*
genericParameters
->
cyclicP
refix
:
0
;
pdsch_pdu
->
CyclicPrefix
=
current_BWP
->
dl_cyclicprefix
?
*
current_BWP
->
dl_cyclicp
refix
:
0
;
// Codeword information
// Codeword information
pdsch_pdu
->
NrOfCodewords
=
1
;
pdsch_pdu
->
NrOfCodewords
=
1
;
//number of information bits per 1024 coded bits expressed in 0.1 bit units
//number of information bits per 1024 coded bits expressed in 0.1 bit units
...
@@ -1096,7 +1081,8 @@ void nr_schedule_ue_spec(module_id_t module_id,
...
@@ -1096,7 +1081,8 @@ void nr_schedule_ue_spec(module_id_t module_id,
AssertFatal
(
maxMIMO_Layers
!=
NULL
,
"Option with max MIMO layers not configured is not supported
\n
"
);
AssertFatal
(
maxMIMO_Layers
!=
NULL
,
"Option with max MIMO layers not configured is not supported
\n
"
);
int
nl_tbslbrm
=
*
maxMIMO_Layers
<
4
?
*
maxMIMO_Layers
:
4
;
int
nl_tbslbrm
=
*
maxMIMO_Layers
<
4
?
*
maxMIMO_Layers
:
4
;
// Maximum number of PRBs across all configured DL BWPs
// Maximum number of PRBs across all configured DL BWPs
int
bw_tbslbrm
=
get_bw_tbslbrm
(
genericParameters
,
cg
);
int
scc_bwpsize
=
NRRIV2BW
(
scc
->
downlinkConfigCommon
->
initialDownlinkBWP
->
genericParameters
.
locationAndBandwidth
,
MAX_BWP_SIZE
);
int
bw_tbslbrm
=
get_bw_tbslbrm
(
scc_bwpsize
,
cg
);
pdsch_pdu
->
maintenance_parms_v3
.
tbSizeLbrmBytes
=
nr_compute_tbslbrm
(
ps
->
mcsTableIdx
,
pdsch_pdu
->
maintenance_parms_v3
.
tbSizeLbrmBytes
=
nr_compute_tbslbrm
(
ps
->
mcsTableIdx
,
bw_tbslbrm
,
bw_tbslbrm
,
nl_tbslbrm
);
nl_tbslbrm
);
...
...
openair2/LAYER2/NR_MAC_gNB/gNB_scheduler_phytest.c
View file @
e592045d
...
@@ -205,8 +205,8 @@ void nr_preprocessor_phytest(module_id_t module_id,
...
@@ -205,8 +205,8 @@ void nr_preprocessor_phytest(module_id_t module_id,
nr_set_pdsch_semi_static
(
NULL
,
scc
,
UE
->
CellGroup
,
sched_ctrl
->
active_bwp
,
NULL
,
tda
,
target_dl_Nl
,
sched_ctrl
,
ps
);
nr_set_pdsch_semi_static
(
NULL
,
scc
,
UE
->
CellGroup
,
sched_ctrl
->
active_bwp
,
NULL
,
tda
,
target_dl_Nl
,
sched_ctrl
,
ps
);
/* find largest unallocated chunk */
/* find largest unallocated chunk */
const
int
bwpSize
=
NRRIV2BW
(
BWP
->
dl_genericParameters
->
locationAndBandwidth
,
MAX_BWP_SIZE
)
;
const
int
bwpSize
=
BWP
->
dl_BWPSize
;
const
int
BWPStart
=
NRRIV2PRBOFFSET
(
BWP
->
dl_genericParameters
->
locationAndBandwidth
,
MAX_BWP_SIZE
)
;
const
int
BWPStart
=
BWP
->
dl_BWPStart
;
int
rbStart
=
0
;
int
rbStart
=
0
;
int
rbSize
=
0
;
int
rbSize
=
0
;
...
@@ -353,8 +353,7 @@ bool nr_ul_preprocessor_phytest(module_id_t module_id, frame_t frame, sub_frame_
...
@@ -353,8 +353,7 @@ bool nr_ul_preprocessor_phytest(module_id_t module_id, frame_t frame, sub_frame_
NR_UE_sched_ctrl_t
*
sched_ctrl
=
&
UE
->
UE_sched_ctrl
;
NR_UE_sched_ctrl_t
*
sched_ctrl
=
&
UE
->
UE_sched_ctrl
;
NR_UE_BWP_t
*
BWP
=
&
UE
->
current_BWP
;
NR_UE_BWP_t
*
BWP
=
&
UE
->
current_BWP
;
NR_BWP_t
*
genericParameters
=
BWP
->
ul_genericParameters
;
const
int
mu
=
BWP
->
ul_scs
;
const
int
mu
=
genericParameters
->
subcarrierSpacing
;
const
struct
NR_PUSCH_TimeDomainResourceAllocationList
*
tdaList
=
const
struct
NR_PUSCH_TimeDomainResourceAllocationList
*
tdaList
=
sched_ctrl
->
active_ubwp
->
bwp_Common
->
pusch_ConfigCommon
->
choice
.
setup
->
pusch_TimeDomainAllocationList
;
sched_ctrl
->
active_ubwp
->
bwp_Common
->
pusch_ConfigCommon
->
choice
.
setup
->
pusch_TimeDomainAllocationList
;
...
@@ -402,8 +401,8 @@ bool nr_ul_preprocessor_phytest(module_id_t module_id, frame_t frame, sub_frame_
...
@@ -402,8 +401,8 @@ bool nr_ul_preprocessor_phytest(module_id_t module_id, frame_t frame, sub_frame_
uint16_t
rbStart
=
0
;
uint16_t
rbStart
=
0
;
uint16_t
rbSize
;
uint16_t
rbSize
;
const
int
bw
=
NRRIV2BW
(
genericParameters
->
locationAndBandwidth
,
MAX_BWP_SIZE
)
;
const
int
bw
=
BWP
->
ul_BWPSize
;
const
int
BWPStart
=
NRRIV2PRBOFFSET
(
genericParameters
->
locationAndBandwidth
,
MAX_BWP_SIZE
)
;
const
int
BWPStart
=
BWP
->
ul_BWPStart
;
if
(
target_ul_bw
>
bw
)
if
(
target_ul_bw
>
bw
)
rbSize
=
bw
;
rbSize
=
bw
;
...
...
openair2/LAYER2/NR_MAC_gNB/gNB_scheduler_primitives.c
View file @
e592045d
...
@@ -983,10 +983,8 @@ void config_uldci(const NR_SIB1_t *sib1,
...
@@ -983,10 +983,8 @@ void config_uldci(const NR_SIB1_t *sib1,
int
bwp_id
=
BWP
->
ul_bwp_id
;
int
bwp_id
=
BWP
->
ul_bwp_id
;
const
int
bw
=
NRRIV2BW
(
BWP
->
ul_genericParameters
->
locationAndBandwidth
,
MAX_BWP_SIZE
);
dci_pdu_rel15
->
frequency_domain_assignment
.
val
=
dci_pdu_rel15
->
frequency_domain_assignment
.
val
=
PRBalloc_to_locationandbandwidth0
(
pusch_pdu
->
rb_size
,
pusch_pdu
->
rb_start
,
bw
);
PRBalloc_to_locationandbandwidth0
(
pusch_pdu
->
rb_size
,
pusch_pdu
->
rb_start
,
BWP
->
ul_BWPSize
);
dci_pdu_rel15
->
time_domain_assignment
.
val
=
time_domain_assignment
;
dci_pdu_rel15
->
time_domain_assignment
.
val
=
time_domain_assignment
;
dci_pdu_rel15
->
frequency_hopping_flag
.
val
=
pusch_pdu
->
frequency_hopping
;
dci_pdu_rel15
->
frequency_hopping_flag
.
val
=
pusch_pdu
->
frequency_hopping
;
dci_pdu_rel15
->
mcs
=
pusch_pdu
->
mcs_index
;
dci_pdu_rel15
->
mcs
=
pusch_pdu
->
mcs_index
;
...
@@ -1063,7 +1061,7 @@ int nr_get_default_pucch_res(int pucch_ResourceCommon) {
...
@@ -1063,7 +1061,7 @@ int nr_get_default_pucch_res(int pucch_ResourceCommon) {
void
nr_configure_pdcch
(
nfapi_nr_dl_tti_pdcch_pdu_rel15_t
*
pdcch_pdu
,
void
nr_configure_pdcch
(
nfapi_nr_dl_tti_pdcch_pdu_rel15_t
*
pdcch_pdu
,
NR_ControlResourceSet_t
*
coreset
,
NR_ControlResourceSet_t
*
coreset
,
NR_BWP_t
*
bwp
,
bool
is_sib1
,
NR_sched_pdcch_t
*
pdcch
)
{
NR_sched_pdcch_t
*
pdcch
)
{
...
@@ -1087,7 +1085,7 @@ void nr_configure_pdcch(nfapi_nr_dl_tti_pdcch_pdu_rel15_t *pdcch_pdu,
...
@@ -1087,7 +1085,7 @@ void nr_configure_pdcch(nfapi_nr_dl_tti_pdcch_pdu_rel15_t *pdcch_pdu,
pdcch_pdu
->
ShiftIndex
=
pdcch
->
ShiftIndex
;
pdcch_pdu
->
ShiftIndex
=
pdcch
->
ShiftIndex
;
if
(
coreset
->
controlResourceSetId
==
0
)
{
if
(
coreset
->
controlResourceSetId
==
0
)
{
if
(
bwp
==
NULL
)
if
(
is_sib1
)
pdcch_pdu
->
CoreSetType
=
NFAPI_NR_CSET_CONFIG_MIB_SIB1
;
pdcch_pdu
->
CoreSetType
=
NFAPI_NR_CSET_CONFIG_MIB_SIB1
;
else
else
pdcch_pdu
->
CoreSetType
=
NFAPI_NR_CSET_CONFIG_PDCCH_CONFIG_CSET_0
;
pdcch_pdu
->
CoreSetType
=
NFAPI_NR_CSET_CONFIG_PDCCH_CONFIG_CSET_0
;
...
@@ -1193,12 +1191,12 @@ void nr_configure_pucch(const NR_SIB1_t *sib1,
...
@@ -1193,12 +1191,12 @@ void nr_configure_pucch(const NR_SIB1_t *sib1,
else
else
pucch_pdu
->
hopping_id
=
*
scc
->
physCellId
;
pucch_pdu
->
hopping_id
=
*
scc
->
physCellId
;
NR_
BWP_t
*
genericParameters
=
UE
->
current_BWP
.
ul_genericParameters
;
NR_
UE_BWP_t
*
BWP
=
&
UE
->
current_BWP
;
pucch_pdu
->
bwp_size
=
NRRIV2BW
(
genericParameters
->
locationAndBandwidth
,
MAX_BWP_SIZE
)
;
pucch_pdu
->
bwp_size
=
BWP
->
ul_BWPSize
;
pucch_pdu
->
bwp_start
=
NRRIV2PRBOFFSET
(
genericParameters
->
locationAndBandwidth
,
MAX_BWP_SIZE
)
;
pucch_pdu
->
bwp_start
=
BWP
->
ul_BWPStart
;
pucch_pdu
->
subcarrier_spacing
=
genericParameters
->
subcarrierSpacing
;
pucch_pdu
->
subcarrier_spacing
=
BWP
->
ul_scs
;
pucch_pdu
->
cyclic_prefix
=
(
genericParameters
->
cyclicPrefix
==
NULL
)
?
0
:
*
genericParameters
->
cyclicP
refix
;
pucch_pdu
->
cyclic_prefix
=
(
BWP
->
ul_cyclicprefix
==
NULL
)
?
0
:
*
BWP
->
ul_cyclicp
refix
;
if
(
r_pucch
<
0
||
bwp
){
if
(
r_pucch
<
0
||
bwp
){
LOG_D
(
NR_MAC
,
"pucch_acknak: Filling dedicated configuration for PUCCH
\n
"
);
LOG_D
(
NR_MAC
,
"pucch_acknak: Filling dedicated configuration for PUCCH
\n
"
);
// we have either a dedicated BWP or Dedicated PUCCH configuration on InitialBWP
// we have either a dedicated BWP or Dedicated PUCCH configuration on InitialBWP
...
@@ -2322,6 +2320,7 @@ void configure_UE_BWP(gNB_MAC_INST *nr_mac,
...
@@ -2322,6 +2320,7 @@ void configure_UE_BWP(gNB_MAC_INST *nr_mac,
NR_UE_BWP_t
*
BWP
,
NR_UE_BWP_t
*
BWP
,
NR_ServingCellConfigCommon_t
*
scc
,
NR_ServingCellConfigCommon_t
*
scc
,
NR_UE_sched_ctrl_t
*
sched_ctrl
,
NR_UE_sched_ctrl_t
*
sched_ctrl
,
NR_RA_t
*
ra
,
NR_CellGroupConfig_t
*
CellGroup
)
{
NR_CellGroupConfig_t
*
CellGroup
)
{
NR_BWP_Downlink_t
*
dl_bwp
=
NULL
;
NR_BWP_Downlink_t
*
dl_bwp
=
NULL
;
...
@@ -2384,16 +2383,27 @@ void configure_UE_BWP(gNB_MAC_INST *nr_mac,
...
@@ -2384,16 +2383,27 @@ void configure_UE_BWP(gNB_MAC_INST *nr_mac,
target_ss
=
NR_SearchSpace__searchSpaceType_PR_common
;
target_ss
=
NR_SearchSpace__searchSpaceType_PR_common
;
}
}
// acquiring generic parameters
// setting generic parameters
BWP
->
dl_genericParameters
=
(
BWP
->
dl_bwp_id
>
0
&&
dl_bwp
)
?
NR_BWP_t
dl_genericParameters
=
(
BWP
->
dl_bwp_id
>
0
&&
dl_bwp
)
?
&
dl_bwp
->
bwp_Common
->
genericParameters
:
dl_bwp
->
bwp_Common
->
genericParameters
:
&
scc
->
downlinkConfigCommon
->
initialDownlinkBWP
->
genericParameters
;
scc
->
downlinkConfigCommon
->
initialDownlinkBWP
->
genericParameters
;
BWP
->
dl_scs
=
dl_genericParameters
.
subcarrierSpacing
;
BWP
->
dl_cyclicprefix
=
dl_genericParameters
.
cyclicPrefix
;
BWP
->
dl_BWPSize
=
NRRIV2BW
(
dl_genericParameters
.
locationAndBandwidth
,
MAX_BWP_SIZE
);
BWP
->
dl_BWPStart
=
NRRIV2PRBOFFSET
(
dl_genericParameters
.
locationAndBandwidth
,
MAX_BWP_SIZE
);
BWP
->
ul_genericParameters
=
(
BWP
->
ul_bwp_id
>
0
&&
ul_bwp
)
?
NR_BWP_t
ul_genericParameters
=
(
BWP
->
ul_bwp_id
>
0
&&
ul_bwp
)
?
&
ul_bwp
->
bwp_Common
->
genericParameters
:
ul_bwp
->
bwp_Common
->
genericParameters
:
&
scc
->
uplinkConfigCommon
->
initialUplinkBWP
->
genericParameters
;
scc
->
uplinkConfigCommon
->
initialUplinkBWP
->
genericParameters
;
BWP
->
ul_scs
=
ul_genericParameters
.
subcarrierSpacing
;
BWP
->
ul_cyclicprefix
=
ul_genericParameters
.
cyclicPrefix
;
BWP
->
ul_BWPSize
=
NRRIV2BW
(
ul_genericParameters
.
locationAndBandwidth
,
MAX_BWP_SIZE
);
BWP
->
ul_BWPStart
=
NRRIV2PRBOFFSET
(
ul_genericParameters
.
locationAndBandwidth
,
MAX_BWP_SIZE
);
if
(
sched_ctrl
)
{
if
(
sched_ctrl
)
{
// setting PDCCH related structures for sched_ctrl
sched_ctrl
->
search_space
=
get_searchspace
(
scc
,
sched_ctrl
->
search_space
=
get_searchspace
(
scc
,
bwpd
,
bwpd
,
target_ss
);
target_ss
);
...
@@ -2407,9 +2417,37 @@ void configure_UE_BWP(gNB_MAC_INST *nr_mac,
...
@@ -2407,9 +2417,37 @@ void configure_UE_BWP(gNB_MAC_INST *nr_mac,
sched_ctrl
->
search_space
,
sched_ctrl
->
search_space
,
sched_ctrl
->
coreset
,
sched_ctrl
->
coreset
,
scc
,
scc
,
BWP
->
dl_genericParameters
,
&
dl_genericParameters
,
nr_mac
->
type0_PDCCH_CSS_config
);
nr_mac
->
type0_PDCCH_CSS_config
);
}
}
if
(
ra
)
{
// setting PDCCH related structures for RA
struct
NR_PDCCH_ConfigCommon__commonSearchSpaceList
*
commonSearchSpaceList
=
NULL
;
NR_SearchSpaceId_t
ra_SearchSpace
=
0
;
if
(
dl_bwp
)
{
commonSearchSpaceList
=
dl_bwp
->
bwp_Common
->
pdcch_ConfigCommon
->
choice
.
setup
->
commonSearchSpaceList
;
ra_SearchSpace
=
*
dl_bwp
->
bwp_Common
->
pdcch_ConfigCommon
->
choice
.
setup
->
ra_SearchSpace
;
}
else
{
commonSearchSpaceList
=
scc
->
downlinkConfigCommon
->
initialDownlinkBWP
->
pdcch_ConfigCommon
->
choice
.
setup
->
commonSearchSpaceList
;
ra_SearchSpace
=
*
scc
->
downlinkConfigCommon
->
initialDownlinkBWP
->
pdcch_ConfigCommon
->
choice
.
setup
->
ra_SearchSpace
;
}
AssertFatal
(
commonSearchSpaceList
->
list
.
count
>
0
,
"common SearchSpace list has 0 elements
\n
"
);
for
(
int
i
=
0
;
i
<
commonSearchSpaceList
->
list
.
count
;
i
++
)
{
NR_SearchSpace_t
*
ss
=
commonSearchSpaceList
->
list
.
array
[
i
];
if
(
ss
->
searchSpaceId
==
ra_SearchSpace
)
ra
->
ra_ss
=
ss
;
}
AssertFatal
(
ra
->
ra_ss
!=
NULL
,
"SearchSpace cannot be null for RA
\n
"
);
ra
->
coreset
=
get_coreset
(
nr_mac
,
scc
,
dl_bwp
,
ra
->
ra_ss
,
NR_SearchSpace__searchSpaceType_PR_common
);
ra
->
sched_pdcch
=
set_pdcch_structure
(
nr_mac
,
ra
->
ra_ss
,
ra
->
coreset
,
scc
,
&
dl_genericParameters
,
&
nr_mac
->
type0_PDCCH_CSS_config
[
ra
->
beam_id
]);
}
}
}
//------------------------------------------------------------------------------
//------------------------------------------------------------------------------
...
@@ -2462,7 +2500,7 @@ NR_UE_info_t *add_new_nr_ue(gNB_MAC_INST *nr_mac, rnti_t rntiP, NR_CellGroupConf
...
@@ -2462,7 +2500,7 @@ NR_UE_info_t *add_new_nr_ue(gNB_MAC_INST *nr_mac, rnti_t rntiP, NR_CellGroupConf
// initialize UE BWP information
// initialize UE BWP information
NR_UE_BWP_t
*
BWP
=
&
UE
->
current_BWP
;
NR_UE_BWP_t
*
BWP
=
&
UE
->
current_BWP
;
memset
(
BWP
,
0
,
sizeof
(
*
BWP
));
memset
(
BWP
,
0
,
sizeof
(
*
BWP
));
configure_UE_BWP
(
nr_mac
,
BWP
,
scc
,
sched_ctrl
,
CellGroup
);
configure_UE_BWP
(
nr_mac
,
BWP
,
scc
,
sched_ctrl
,
NULL
,
CellGroup
);
/* set illegal time domain allocation to force recomputation of all fields */
/* set illegal time domain allocation to force recomputation of all fields */
sched_ctrl
->
pdsch_semi_static
.
time_domain_allocation
=
-
1
;
sched_ctrl
->
pdsch_semi_static
.
time_domain_allocation
=
-
1
;
...
@@ -2719,7 +2757,6 @@ void nr_csirs_scheduling(int Mod_idP,
...
@@ -2719,7 +2757,6 @@ void nr_csirs_scheduling(int Mod_idP,
int
period
,
offset
;
int
period
,
offset
;
nfapi_nr_dl_tti_request_body_t
*
dl_req
=
&
gNB_mac
->
DL_req
[
CC_id
].
dl_tti_request_body
;
nfapi_nr_dl_tti_request_body_t
*
dl_req
=
&
gNB_mac
->
DL_req
[
CC_id
].
dl_tti_request_body
;
NR_BWP_t
*
genericParameters
=
BWP
->
dl_genericParameters
;
for
(
int
id
=
0
;
id
<
csi_measconfig
->
nzp_CSI_RS_ResourceToAddModList
->
list
.
count
;
id
++
){
for
(
int
id
=
0
;
id
<
csi_measconfig
->
nzp_CSI_RS_ResourceToAddModList
->
list
.
count
;
id
++
){
nzpcsi
=
csi_measconfig
->
nzp_CSI_RS_ResourceToAddModList
->
list
.
array
[
id
];
nzpcsi
=
csi_measconfig
->
nzp_CSI_RS_ResourceToAddModList
->
list
.
array
[
id
];
...
@@ -2738,22 +2775,20 @@ void nr_csirs_scheduling(int Mod_idP,
...
@@ -2738,22 +2775,20 @@ void nr_csirs_scheduling(int Mod_idP,
nfapi_nr_dl_tti_csi_rs_pdu_rel15_t
*
csirs_pdu_rel15
=
&
dl_tti_csirs_pdu
->
csi_rs_pdu
.
csi_rs_pdu_rel15
;
nfapi_nr_dl_tti_csi_rs_pdu_rel15_t
*
csirs_pdu_rel15
=
&
dl_tti_csirs_pdu
->
csi_rs_pdu
.
csi_rs_pdu_rel15
;
csirs_pdu_rel15
->
subcarrier_spacing
=
genericParameters
->
subcarrierSpacing
;
csirs_pdu_rel15
->
subcarrier_spacing
=
BWP
->
dl_scs
;
if
(
genericParameters
->
cyclicP
refix
)
if
(
BWP
->
dl_cyclicp
refix
)
csirs_pdu_rel15
->
cyclic_prefix
=
*
genericParameters
->
cyclicP
refix
;
csirs_pdu_rel15
->
cyclic_prefix
=
*
BWP
->
dl_cyclicp
refix
;
else
else
csirs_pdu_rel15
->
cyclic_prefix
=
0
;
csirs_pdu_rel15
->
cyclic_prefix
=
0
;
// According to last paragraph of TS 38.214 5.2.2.3.1
// According to last paragraph of TS 38.214 5.2.2.3.1
uint16_t
BWPSize
=
NRRIV2BW
(
genericParameters
->
locationAndBandwidth
,
MAX_BWP_SIZE
);
if
(
resourceMapping
.
freqBand
.
startingRB
<
BWP
->
dl_BWPStart
)
{
uint16_t
BWPStart
=
NRRIV2PRBOFFSET
(
genericParameters
->
locationAndBandwidth
,
MAX_BWP_SIZE
);
csirs_pdu_rel15
->
start_rb
=
BWP
->
dl_BWPStart
;
if
(
resourceMapping
.
freqBand
.
startingRB
<
BWPStart
)
{
csirs_pdu_rel15
->
start_rb
=
BWPStart
;
}
else
{
}
else
{
csirs_pdu_rel15
->
start_rb
=
resourceMapping
.
freqBand
.
startingRB
;
csirs_pdu_rel15
->
start_rb
=
resourceMapping
.
freqBand
.
startingRB
;
}
}
if
(
resourceMapping
.
freqBand
.
nrofRBs
>
(
BWP
Start
+
BWPSize
-
csirs_pdu_rel15
->
start_rb
))
{
if
(
resourceMapping
.
freqBand
.
nrofRBs
>
(
BWP
->
dl_BWPStart
+
BWP
->
dl_
BWPSize
-
csirs_pdu_rel15
->
start_rb
))
{
csirs_pdu_rel15
->
nr_of_rbs
=
BWP
Start
+
BWPSize
-
csirs_pdu_rel15
->
start_rb
;
csirs_pdu_rel15
->
nr_of_rbs
=
BWP
->
dl_BWPStart
+
BWP
->
dl_
BWPSize
-
csirs_pdu_rel15
->
start_rb
;
}
else
{
}
else
{
csirs_pdu_rel15
->
nr_of_rbs
=
resourceMapping
.
freqBand
.
nrofRBs
;
csirs_pdu_rel15
->
nr_of_rbs
=
resourceMapping
.
freqBand
.
nrofRBs
;
}
}
...
@@ -2961,7 +2996,7 @@ void nr_mac_update_timers(module_id_t module_id,
...
@@ -2961,7 +2996,7 @@ void nr_mac_update_timers(module_id_t module_id,
}
}
}
}
configure_UE_BWP
(
RC
.
nrmac
[
module_id
],
BWP
,
scc
,
sched_ctrl
,
UE
->
CellGroup
);
configure_UE_BWP
(
RC
.
nrmac
[
module_id
],
BWP
,
scc
,
sched_ctrl
,
NULL
,
UE
->
CellGroup
);
// Update coreset/searchspace
// Update coreset/searchspace
NR_BWP_Downlink_t
*
bwp
=
sched_ctrl
->
active_bwp
;
NR_BWP_Downlink_t
*
bwp
=
sched_ctrl
->
active_bwp
;
...
...
openair2/LAYER2/NR_MAC_gNB/gNB_scheduler_srs.c
View file @
e592045d
...
@@ -38,13 +38,11 @@ void nr_configure_srs(nfapi_nr_srs_pdu_t *srs_pdu, int module_id, int CC_id,NR_U
...
@@ -38,13 +38,11 @@ void nr_configure_srs(nfapi_nr_srs_pdu_t *srs_pdu, int module_id, int CC_id,NR_U
NR_UE_BWP_t
*
current_BWP
=
&
UE
->
current_BWP
;
NR_UE_BWP_t
*
current_BWP
=
&
UE
->
current_BWP
;
NR_BWP_t
*
ubwp
=
current_BWP
->
ul_genericParameters
;
srs_pdu
->
rnti
=
UE
->
rnti
;
srs_pdu
->
rnti
=
UE
->
rnti
;
srs_pdu
->
handle
=
0
;
srs_pdu
->
handle
=
0
;
srs_pdu
->
bwp_size
=
NRRIV2BW
(
ubwp
->
locationAndBandwidth
,
MAX_BWP_SIZE
);
;
srs_pdu
->
bwp_size
=
current_BWP
->
ul_BWPSize
;
srs_pdu
->
bwp_start
=
NRRIV2PRBOFFSET
(
ubwp
->
locationAndBandwidth
,
MAX_BWP_SIZE
);
;
srs_pdu
->
bwp_start
=
current_BWP
->
ul_BWPStart
;
srs_pdu
->
subcarrier_spacing
=
ubwp
->
subcarrierSpacing
;
srs_pdu
->
subcarrier_spacing
=
current_BWP
->
ul_scs
;
srs_pdu
->
cyclic_prefix
=
0
;
srs_pdu
->
cyclic_prefix
=
0
;
srs_pdu
->
num_ant_ports
=
srs_resource
->
nrofSRS_Ports
;
srs_pdu
->
num_ant_ports
=
srs_resource
->
nrofSRS_Ports
;
srs_pdu
->
num_symbols
=
srs_resource
->
resourceMapping
.
nrofSymbols
;
srs_pdu
->
num_symbols
=
srs_resource
->
resourceMapping
.
nrofSymbols
;
...
@@ -162,7 +160,7 @@ void nr_schedule_srs(int module_id, frame_t frame) {
...
@@ -162,7 +160,7 @@ void nr_schedule_srs(int module_id, frame_t frame) {
uint16_t
period
=
srs_period
[
srs_resource
->
resourceType
.
choice
.
periodic
->
periodicityAndOffset_p
.
present
];
uint16_t
period
=
srs_period
[
srs_resource
->
resourceType
.
choice
.
periodic
->
periodicityAndOffset_p
.
present
];
uint16_t
offset
=
get_nr_srs_offset
(
srs_resource
->
resourceType
.
choice
.
periodic
->
periodicityAndOffset_p
);
uint16_t
offset
=
get_nr_srs_offset
(
srs_resource
->
resourceType
.
choice
.
periodic
->
periodicityAndOffset_p
);
int
n_slots_frame
=
nr_slots_per_frame
[
current_BWP
->
ul_
genericParameters
->
subcarrierSpacing
];
int
n_slots_frame
=
nr_slots_per_frame
[
current_BWP
->
ul_
scs
];
// Check if UE will transmit the SRS in this frame
// Check if UE will transmit the SRS in this frame
if
(
((
frame
-
offset
/
n_slots_frame
)
*
n_slots_frame
)
%
period
==
0
)
{
if
(
((
frame
-
offset
/
n_slots_frame
)
*
n_slots_frame
)
%
period
==
0
)
{
...
...
openair2/LAYER2/NR_MAC_gNB/gNB_scheduler_uci.c
View file @
e592045d
...
@@ -695,14 +695,11 @@ void nr_csi_meas_reporting(int Mod_idP,
...
@@ -695,14 +695,11 @@ void nr_csi_meas_reporting(int Mod_idP,
frame_t
frame
,
frame_t
frame
,
sub_frame_t
slot
)
{
sub_frame_t
slot
)
{
NR_ServingCellConfigCommon_t
*
scc
=
RC
.
nrmac
[
Mod_idP
]
->
common_channels
->
ServingCellConfigCommon
;
const
int
n_slots_frame
=
nr_slots_per_frame
[
*
scc
->
ssbSubcarrierSpacing
];
UE_iterator
(
RC
.
nrmac
[
Mod_idP
]
->
UE_info
.
list
,
UE
)
{
UE_iterator
(
RC
.
nrmac
[
Mod_idP
]
->
UE_info
.
list
,
UE
)
{
const
NR_CellGroupConfig_t
*
CellGroup
=
UE
->
CellGroup
;
const
NR_CellGroupConfig_t
*
CellGroup
=
UE
->
CellGroup
;
NR_UE_sched_ctrl_t
*
sched_ctrl
=
&
UE
->
UE_sched_ctrl
;
NR_UE_sched_ctrl_t
*
sched_ctrl
=
&
UE
->
UE_sched_ctrl
;
NR_UE_BWP_t
*
BWP
=
&
UE
->
current_BWP
;
NR_UE_BWP_t
*
BWP
=
&
UE
->
current_BWP
;
const
int
n_slots_frame
=
nr_slots_per_frame
[
BWP
->
ul_scs
];
if
((
sched_ctrl
->
rrc_processing_timer
>
0
)
||
(
sched_ctrl
->
ul_failure
==
1
&&
get_softmodem_params
()
->
phy_test
==
0
))
{
if
((
sched_ctrl
->
rrc_processing_timer
>
0
)
||
(
sched_ctrl
->
ul_failure
==
1
&&
get_softmodem_params
()
->
phy_test
==
0
))
{
continue
;
continue
;
}
}
...
@@ -761,7 +758,7 @@ void nr_csi_meas_reporting(int Mod_idP,
...
@@ -761,7 +758,7 @@ void nr_csi_meas_reporting(int Mod_idP,
curr_pucch
->
resource_indicator
=
res_index
;
curr_pucch
->
resource_indicator
=
res_index
;
curr_pucch
->
csi_bits
+=
nr_get_csi_bitlen
(
UE
,
csi_report_id
);
curr_pucch
->
csi_bits
+=
nr_get_csi_bitlen
(
UE
,
csi_report_id
);
int
bwp_start
=
NRRIV2PRBOFFSET
(
BWP
->
ul_genericParameters
->
locationAndBandwidth
,
MAX_BWP_SIZE
)
;
int
bwp_start
=
BWP
->
ul_BWPStart
;
// going through the list of PUCCH resources to find the one indexed by resource_id
// going through the list of PUCCH resources to find the one indexed by resource_id
uint16_t
*
vrb_map_UL
=
&
RC
.
nrmac
[
Mod_idP
]
->
common_channels
[
0
].
vrb_map_UL
[
sched_slot
*
MAX_BWP_SIZE
];
uint16_t
*
vrb_map_UL
=
&
RC
.
nrmac
[
Mod_idP
]
->
common_channels
[
0
].
vrb_map_UL
[
sched_slot
*
MAX_BWP_SIZE
];
...
@@ -1313,11 +1310,12 @@ void extract_pucch_csi_report(NR_CSI_MeasConfig_t *csi_MeasConfig,
...
@@ -1313,11 +1310,12 @@ void extract_pucch_csi_report(NR_CSI_MeasConfig_t *csi_MeasConfig,
NR_ServingCellConfigCommon_t
*
scc
)
NR_ServingCellConfigCommon_t
*
scc
)
{
{
/** From Table 6.3.1.1.2-3: RI, LI, CQI, and CRI of codebookType=typeI-SinglePanel */
/** From Table 6.3.1.1.2-3: RI, LI, CQI, and CRI of codebookType=typeI-SinglePanel */
const
int
n_slots_frame
=
nr_slots_per_frame
[
*
scc
->
ssbSubcarrierSpacing
];
uint8_t
*
payload
=
uci_pdu
->
csi_part1
.
csi_part1_payload
;
uint8_t
*
payload
=
uci_pdu
->
csi_part1
.
csi_part1_payload
;
uint16_t
bitlen
=
uci_pdu
->
csi_part1
.
csi_part1_bit_len
;
uint16_t
bitlen
=
uci_pdu
->
csi_part1
.
csi_part1_bit_len
;
NR_CSI_ReportConfig__reportQuantity_PR
reportQuantity_type
=
NR_CSI_ReportConfig__reportQuantity_PR_NOTHING
;
NR_CSI_ReportConfig__reportQuantity_PR
reportQuantity_type
=
NR_CSI_ReportConfig__reportQuantity_PR_NOTHING
;
NR_UE_sched_ctrl_t
*
sched_ctrl
=
&
UE
->
UE_sched_ctrl
;
NR_UE_sched_ctrl_t
*
sched_ctrl
=
&
UE
->
UE_sched_ctrl
;
NR_UE_BWP_t
*
BWP
=
&
UE
->
current_BWP
;
const
int
n_slots_frame
=
nr_slots_per_frame
[
BWP
->
ul_scs
];
int
cumul_bits
=
0
;
int
cumul_bits
=
0
;
int
r_index
=
-
1
;
int
r_index
=
-
1
;
for
(
int
csi_report_id
=
0
;
csi_report_id
<
csi_MeasConfig
->
csi_ReportConfigToAddModList
->
list
.
count
;
csi_report_id
++
)
{
for
(
int
csi_report_id
=
0
;
csi_report_id
<
csi_MeasConfig
->
csi_ReportConfigToAddModList
->
list
.
count
;
csi_report_id
++
)
{
...
@@ -1607,7 +1605,8 @@ int nr_acknack_scheduling(int mod_id,
...
@@ -1607,7 +1605,8 @@ int nr_acknack_scheduling(int mod_id,
const
int
CC_id
=
0
;
const
int
CC_id
=
0
;
const
int
minfbtime
=
RC
.
nrmac
[
mod_id
]
->
minRXTXTIMEpdsch
;
const
int
minfbtime
=
RC
.
nrmac
[
mod_id
]
->
minRXTXTIMEpdsch
;
const
NR_ServingCellConfigCommon_t
*
scc
=
RC
.
nrmac
[
mod_id
]
->
common_channels
[
CC_id
].
ServingCellConfigCommon
;
const
NR_ServingCellConfigCommon_t
*
scc
=
RC
.
nrmac
[
mod_id
]
->
common_channels
[
CC_id
].
ServingCellConfigCommon
;
const
int
n_slots_frame
=
nr_slots_per_frame
[
*
scc
->
ssbSubcarrierSpacing
];
NR_UE_BWP_t
*
BWP
=
&
UE
->
current_BWP
;
const
int
n_slots_frame
=
nr_slots_per_frame
[
BWP
->
ul_scs
];
const
NR_TDD_UL_DL_Pattern_t
*
tdd
=
scc
->
tdd_UL_DL_ConfigurationCommon
?
&
scc
->
tdd_UL_DL_ConfigurationCommon
->
pattern1
:
NULL
;
const
NR_TDD_UL_DL_Pattern_t
*
tdd
=
scc
->
tdd_UL_DL_ConfigurationCommon
?
&
scc
->
tdd_UL_DL_ConfigurationCommon
->
pattern1
:
NULL
;
AssertFatal
(
tdd
||
RC
.
nrmac
[
mod_id
]
->
common_channels
[
CC_id
].
frame_type
==
FDD
,
"Dynamic TDD not handled yet
\n
"
);
AssertFatal
(
tdd
||
RC
.
nrmac
[
mod_id
]
->
common_channels
[
CC_id
].
frame_type
==
FDD
,
"Dynamic TDD not handled yet
\n
"
);
const
int
nr_slots_period
=
tdd
?
n_slots_frame
/
get_nb_periods_per_frame
(
tdd
->
dl_UL_TransmissionPeriodicity
)
:
n_slots_frame
;
const
int
nr_slots_period
=
tdd
?
n_slots_frame
/
get_nb_periods_per_frame
(
tdd
->
dl_UL_TransmissionPeriodicity
)
:
n_slots_frame
;
...
@@ -1622,7 +1621,6 @@ int nr_acknack_scheduling(int mod_id,
...
@@ -1622,7 +1621,6 @@ int nr_acknack_scheduling(int mod_id,
* later)
* later)
* * each UE has dedicated PUCCH Format 0 resources, and we use index 0! */
* * each UE has dedicated PUCCH Format 0 resources, and we use index 0! */
NR_UE_sched_ctrl_t
*
sched_ctrl
=
&
UE
->
UE_sched_ctrl
;
NR_UE_sched_ctrl_t
*
sched_ctrl
=
&
UE
->
UE_sched_ctrl
;
NR_UE_BWP_t
*
BWP
=
&
UE
->
current_BWP
;
NR_CellGroupConfig_t
*
cg
=
UE
->
CellGroup
;
NR_CellGroupConfig_t
*
cg
=
UE
->
CellGroup
;
NR_PUCCH_Config_t
*
pucch_Config
=
NULL
;
NR_PUCCH_Config_t
*
pucch_Config
=
NULL
;
...
@@ -1636,8 +1634,8 @@ int nr_acknack_scheduling(int mod_id,
...
@@ -1636,8 +1634,8 @@ int nr_acknack_scheduling(int mod_id,
pucch_Config
=
cg
->
spCellConfig
->
spCellConfigDedicated
->
uplinkConfig
->
initialUplinkBWP
->
pucch_Config
->
choice
.
setup
;
pucch_Config
=
cg
->
spCellConfig
->
spCellConfigDedicated
->
uplinkConfig
->
initialUplinkBWP
->
pucch_Config
->
choice
.
setup
;
}
}
int
bwp_start
=
NRRIV2PRBOFFSET
(
BWP
->
ul_genericParameters
->
locationAndBandwidth
,
MAX_BWP_SIZE
)
;
int
bwp_start
=
BWP
->
ul_BWPStart
;
int
bwp_size
=
NRRIV2BW
(
BWP
->
ul_genericParameters
->
locationAndBandwidth
,
MAX_BWP_SIZE
)
;
int
bwp_size
=
BWP
->
ul_BWPSize
;
NR_sched_pucch_t
*
pucch
=
&
sched_ctrl
->
sched_pucch
[
0
];
NR_sched_pucch_t
*
pucch
=
&
sched_ctrl
->
sched_pucch
[
0
];
LOG_D
(
NR_MAC
,
"In %s: %4d.%2d Trying to allocate pucch, current DAI %d
\n
"
,
__FUNCTION__
,
frame
,
slot
,
pucch
->
dai_c
);
LOG_D
(
NR_MAC
,
"In %s: %4d.%2d Trying to allocate pucch, current DAI %d
\n
"
,
__FUNCTION__
,
frame
,
slot
,
pucch
->
dai_c
);
...
@@ -1692,19 +1690,11 @@ int nr_acknack_scheduling(int mod_id,
...
@@ -1692,19 +1690,11 @@ int nr_acknack_scheduling(int mod_id,
LOG_D
(
NR_MAC
,
"In %s: pucch_acknak 1. DL %4d.%2d, UL_ACK %4d.%2d, DAI_C %d
\n
"
,
__FUNCTION__
,
frame
,
slot
,
pucch
->
frame
,
pucch
->
ul_slot
,
pucch
->
dai_c
);
LOG_D
(
NR_MAC
,
"In %s: pucch_acknak 1. DL %4d.%2d, UL_ACK %4d.%2d, DAI_C %d
\n
"
,
__FUNCTION__
,
frame
,
slot
,
pucch
->
frame
,
pucch
->
ul_slot
,
pucch
->
dai_c
);
// this is hardcoded for now as ue specific only if we are not on the initialBWP (to be fixed to allow ue_Specific also on initialBWP
NR_SearchSpace__searchSpaceType_PR
ss_type
=
NR_SearchSpace__searchSpaceType_PR_common
;
NR_BWP_UplinkDedicated_t
*
ubwpd
=
NULL
;
if
(
is_common
==
0
)
ss_type
=
sched_ctrl
->
search_space
->
searchSpaceType
->
present
;
if
(
cg
&&
cg
->
spCellConfig
&&
cg
->
spCellConfig
->
spCellConfigDedicated
&&
cg
->
spCellConfig
->
spCellConfigDedicated
->
uplinkConfig
&&
cg
->
spCellConfig
->
spCellConfigDedicated
->
uplinkConfig
->
initialUplinkBWP
)
ubwpd
=
cg
->
spCellConfig
->
spCellConfigDedicated
->
uplinkConfig
->
initialUplinkBWP
;
NR_SearchSpace__searchSpaceType_PR
ss_type
=
(
is_common
==
0
&&
(
sched_ctrl
->
active_bwp
||
ubwpd
))
?
NR_SearchSpace__searchSpaceType_PR_ue_Specific
:
NR_SearchSpace__searchSpaceType_PR_common
;
uint8_t
pdsch_to_harq_feedback
[
8
];
uint8_t
pdsch_to_harq_feedback
[
8
];
int
max_fb_time
=
0
;
int
max_fb_time
=
0
;
get_pdsch_to_harq_feedback
(
UE
,
ss_type
,
&
max_fb_time
,
pdsch_to_harq_feedback
);
get_pdsch_to_harq_feedback
(
UE
,
ss_type
,
&
max_fb_time
,
pdsch_to_harq_feedback
);
...
@@ -1727,7 +1717,6 @@ int nr_acknack_scheduling(int mod_id,
...
@@ -1727,7 +1717,6 @@ int nr_acknack_scheduling(int mod_id,
// we cannot reach this timing anymore, allocate and try again
// we cannot reach this timing anymore, allocate and try again
const
int
f
=
pucch
->
frame
;
const
int
f
=
pucch
->
frame
;
const
int
s
=
pucch
->
ul_slot
;
const
int
s
=
pucch
->
ul_slot
;
const
int
n_slots_frame
=
nr_slots_per_frame
[
*
scc
->
ssbSubcarrierSpacing
];
LOG_D
(
NR_MAC
,
"In %s: %4d.%2d DAI > 0, cannot reach timing for pucch in %4d.%2d, advancing slot by 1 and trying again
\n
"
,
__FUNCTION__
,
frame
,
slot
,
f
,
s
);
LOG_D
(
NR_MAC
,
"In %s: %4d.%2d DAI > 0, cannot reach timing for pucch in %4d.%2d, advancing slot by 1 and trying again
\n
"
,
__FUNCTION__
,
frame
,
slot
,
f
,
s
);
if
(
!
(
csi_pucch
&&
if
(
!
(
csi_pucch
&&
csi_pucch
->
csi_bits
>
0
&&
csi_pucch
->
csi_bits
>
0
&&
...
@@ -1890,11 +1879,11 @@ void nr_sr_reporting(gNB_MAC_INST *nrmac, frame_t SFN, sub_frame_t slot)
...
@@ -1890,11 +1879,11 @@ void nr_sr_reporting(gNB_MAC_INST *nrmac, frame_t SFN, sub_frame_t slot)
{
{
if
(
!
is_xlsch_in_slot
(
nrmac
->
ulsch_slot_bitmap
[
slot
/
64
],
slot
))
if
(
!
is_xlsch_in_slot
(
nrmac
->
ulsch_slot_bitmap
[
slot
/
64
],
slot
))
return
;
return
;
NR_ServingCellConfigCommon_t
*
scc
=
nrmac
->
common_channels
->
ServingCellConfigCommon
;
const
int
n_slots_frame
=
nr_slots_per_frame
[
*
scc
->
ssbSubcarrierSpacing
];
UE_iterator
(
nrmac
->
UE_info
.
list
,
UE
)
{
UE_iterator
(
nrmac
->
UE_info
.
list
,
UE
)
{
NR_UE_sched_ctrl_t
*
sched_ctrl
=
&
UE
->
UE_sched_ctrl
;
NR_UE_sched_ctrl_t
*
sched_ctrl
=
&
UE
->
UE_sched_ctrl
;
NR_UE_BWP_t
*
BWP
=
&
UE
->
current_BWP
;
const
int
n_slots_frame
=
nr_slots_per_frame
[
BWP
->
ul_scs
];
if
(
sched_ctrl
->
ul_failure
==
1
)
continue
;
if
(
sched_ctrl
->
ul_failure
==
1
)
continue
;
NR_PUCCH_Config_t
*
pucch_Config
=
NULL
;
NR_PUCCH_Config_t
*
pucch_Config
=
NULL
;
if
(
sched_ctrl
->
active_ubwp
)
{
if
(
sched_ctrl
->
active_ubwp
)
{
...
...
openair2/LAYER2/NR_MAC_gNB/gNB_scheduler_ulsch.c
View file @
e592045d
...
@@ -847,9 +847,9 @@ static bool allocate_ul_retransmission(gNB_MAC_INST *nrmac,
...
@@ -847,9 +847,9 @@ static bool allocate_ul_retransmission(gNB_MAC_INST *nrmac,
cg
->
spCellConfig
->
spCellConfigDedicated
->
uplinkConfig
->
initialUplinkBWP
:
NULL
;
cg
->
spCellConfig
->
spCellConfigDedicated
->
uplinkConfig
->
initialUplinkBWP
:
NULL
;
int
rbStart
=
0
;
// wrt BWP start
int
rbStart
=
0
;
// wrt BWP start
const
uint16_t
bwpSize
=
NRRIV2BW
(
UE
->
current_BWP
.
ul_genericParameters
->
locationAndBandwidth
,
MAX_BWP_SIZE
)
;
const
uint16_t
bwpSize
=
UE
->
current_BWP
.
ul_BWPSize
;
const
uint8_t
nrOfLayers
=
1
;
const
uint8_t
nrOfLayers
=
1
;
const
uint8_t
num_dmrs_cdm_grps_no_data
=
(
sched_ctrl
->
active_bwp
||
ubwpd
)
?
1
:
2
;
const
uint8_t
num_dmrs_cdm_grps_no_data
=
(
sched_ctrl
->
active_
u
bwp
||
ubwpd
)
?
1
:
2
;
LOG_D
(
NR_MAC
,
"retInfo->time_domain_allocation = %d, tda = %d
\n
"
,
retInfo
->
time_domain_allocation
,
tda
);
LOG_D
(
NR_MAC
,
"retInfo->time_domain_allocation = %d, tda = %d
\n
"
,
retInfo
->
time_domain_allocation
,
tda
);
LOG_D
(
NR_MAC
,
"num_dmrs_cdm_grps_no_data %d, tbs %d
\n
"
,
num_dmrs_cdm_grps_no_data
,
retInfo
->
tb_size
);
LOG_D
(
NR_MAC
,
"num_dmrs_cdm_grps_no_data %d, tbs %d
\n
"
,
num_dmrs_cdm_grps_no_data
,
retInfo
->
tb_size
);
if
(
tda
==
retInfo
->
time_domain_allocation
)
{
if
(
tda
==
retInfo
->
time_domain_allocation
)
{
...
@@ -1045,7 +1045,7 @@ void pf_ul(module_id_t module_id,
...
@@ -1045,7 +1045,7 @@ void pf_ul(module_id_t module_id,
cg
->
spCellConfig
->
spCellConfigDedicated
->
uplinkConfig
?
cg
->
spCellConfig
->
spCellConfigDedicated
->
uplinkConfig
?
cg
->
spCellConfig
->
spCellConfigDedicated
->
uplinkConfig
->
initialUplinkBWP
:
NULL
;
cg
->
spCellConfig
->
spCellConfigDedicated
->
uplinkConfig
->
initialUplinkBWP
:
NULL
;
const
uint16_t
bwpSize
=
NRRIV2BW
(
BWP
->
ul_genericParameters
->
locationAndBandwidth
,
MAX_BWP_SIZE
)
;
const
uint16_t
bwpSize
=
BWP
->
ul_BWPSize
;
NR_sched_pusch_t
*
sched_pusch
=
&
sched_ctrl
->
sched_pusch
;
NR_sched_pusch_t
*
sched_pusch
=
&
sched_ctrl
->
sched_pusch
;
NR_pusch_semi_static_t
*
ps
=
&
sched_ctrl
->
pusch_semi_static
;
NR_pusch_semi_static_t
*
ps
=
&
sched_ctrl
->
pusch_semi_static
;
const
NR_mac_dir_stats_t
*
stats
=
&
UE
->
mac_stats
.
ul
;
const
NR_mac_dir_stats_t
*
stats
=
&
UE
->
mac_stats
.
ul
;
...
@@ -1242,8 +1242,8 @@ void pf_ul(module_id_t module_id,
...
@@ -1242,8 +1242,8 @@ void pf_ul(module_id_t module_id,
cg
->
spCellConfig
->
spCellConfigDedicated
->
uplinkConfig
->
initialUplinkBWP
:
NULL
;
cg
->
spCellConfig
->
spCellConfigDedicated
->
uplinkConfig
->
initialUplinkBWP
:
NULL
;
int
rbStart
=
sched_ctrl
->
active_ubwp
?
NRRIV2PRBOFFSET
(
BWP
->
ul_genericParameters
->
locationAndBandwidth
,
MAX_BWP_SIZE
)
:
0
;
int
rbStart
=
sched_ctrl
->
active_ubwp
?
BWP
->
ul_BWPStart
:
0
;
const
uint16_t
bwpSize
=
NRRIV2BW
(
BWP
->
ul_genericParameters
->
locationAndBandwidth
,
MAX_BWP_SIZE
)
;
const
uint16_t
bwpSize
=
BWP
->
ul_BWPSize
;
NR_sched_pusch_t
*
sched_pusch
=
&
sched_ctrl
->
sched_pusch
;
NR_sched_pusch_t
*
sched_pusch
=
&
sched_ctrl
->
sched_pusch
;
NR_pusch_semi_static_t
*
ps
=
&
sched_ctrl
->
pusch_semi_static
;
NR_pusch_semi_static_t
*
ps
=
&
sched_ctrl
->
pusch_semi_static
;
...
@@ -1348,8 +1348,7 @@ bool nr_fr1_ulsch_preprocessor(module_id_t module_id, frame_t frame, sub_frame_t
...
@@ -1348,8 +1348,7 @@ bool nr_fr1_ulsch_preprocessor(module_id_t module_id, frame_t frame, sub_frame_t
* schedule now (slot + k2 is not UL slot) */
* schedule now (slot + k2 is not UL slot) */
NR_UE_sched_ctrl_t
*
sched_ctrl
=
&
nr_mac
->
UE_info
.
list
[
0
]
->
UE_sched_ctrl
;
NR_UE_sched_ctrl_t
*
sched_ctrl
=
&
nr_mac
->
UE_info
.
list
[
0
]
->
UE_sched_ctrl
;
NR_UE_BWP_t
*
BWP
=
&
nr_mac
->
UE_info
.
list
[
0
]
->
current_BWP
;
NR_UE_BWP_t
*
BWP
=
&
nr_mac
->
UE_info
.
list
[
0
]
->
current_BWP
;
NR_BWP_t
*
genericParameters
=
BWP
->
ul_genericParameters
;
int
mu
=
BWP
->
ul_scs
;
int
mu
=
genericParameters
->
subcarrierSpacing
;
const
int
temp_tda
=
get_ul_tda
(
nr_mac
,
scc
,
slot
);
const
int
temp_tda
=
get_ul_tda
(
nr_mac
,
scc
,
slot
);
int
K2
=
get_K2
(
scc
,
scc_sib1
,
sched_ctrl
->
active_ubwp
,
temp_tda
,
mu
);
int
K2
=
get_K2
(
scc
,
scc_sib1
,
sched_ctrl
->
active_ubwp
,
temp_tda
,
mu
);
const
int
sched_frame
=
(
frame
+
(
slot
+
K2
>=
nr_slots_per_frame
[
mu
]))
&
1023
;
const
int
sched_frame
=
(
frame
+
(
slot
+
K2
>=
nr_slots_per_frame
[
mu
]))
&
1023
;
...
@@ -1399,8 +1398,8 @@ bool nr_fr1_ulsch_preprocessor(module_id_t module_id, frame_t frame, sub_frame_t
...
@@ -1399,8 +1398,8 @@ bool nr_fr1_ulsch_preprocessor(module_id_t module_id, frame_t frame, sub_frame_t
uint16_t
*
vrb_map_UL
=
uint16_t
*
vrb_map_UL
=
&
RC
.
nrmac
[
module_id
]
->
common_channels
[
CC_id
].
vrb_map_UL
[
sched_slot
*
MAX_BWP_SIZE
];
&
RC
.
nrmac
[
module_id
]
->
common_channels
[
CC_id
].
vrb_map_UL
[
sched_slot
*
MAX_BWP_SIZE
];
const
uint16_t
bwpSize
=
NRRIV2BW
(
genericParameters
->
locationAndBandwidth
,
MAX_BWP_SIZE
)
;
const
uint16_t
bwpSize
=
BWP
->
ul_BWPSize
;
const
uint16_t
bwpStart
=
NRRIV2PRBOFFSET
(
genericParameters
->
locationAndBandwidth
,
MAX_BWP_SIZE
)
;
const
uint16_t
bwpStart
=
BWP
->
ul_BWPStart
;
NR_PUSCH_TimeDomainResourceAllocationList_t
*
tdaList
=
NULL
;
NR_PUSCH_TimeDomainResourceAllocationList_t
*
tdaList
=
NULL
;
if
(
sched_ctrl
->
active_ubwp
)
{
if
(
sched_ctrl
->
active_ubwp
)
{
...
@@ -1642,11 +1641,10 @@ void nr_schedule_ulsch(module_id_t module_id, frame_t frame, sub_frame_t slot)
...
@@ -1642,11 +1641,10 @@ void nr_schedule_ulsch(module_id_t module_id, frame_t frame, sub_frame_t slot)
pusch_pdu
->
handle
=
0
;
//not yet used
pusch_pdu
->
handle
=
0
;
//not yet used
/* FAPI: BWP */
/* FAPI: BWP */
NR_BWP_t
*
genericParameters
=
current_BWP
->
ul_genericParameters
;
pusch_pdu
->
bwp_size
=
NRRIV2BW
(
genericParameters
->
locationAndBandwidth
,
MAX_BWP_SIZE
)
;
pusch_pdu
->
bwp_size
=
current_BWP
->
ul_BWPSize
;
pusch_pdu
->
bwp_start
=
NRRIV2PRBOFFSET
(
genericParameters
->
locationAndBandwidth
,
MAX_BWP_SIZE
)
;
pusch_pdu
->
bwp_start
=
current_BWP
->
ul_BWPStart
;
pusch_pdu
->
subcarrier_spacing
=
genericParameters
->
subcarrierSpacing
;
pusch_pdu
->
subcarrier_spacing
=
current_BWP
->
ul_scs
;
pusch_pdu
->
cyclic_prefix
=
0
;
pusch_pdu
->
cyclic_prefix
=
0
;
/* FAPI: PUSCH information always included */
/* FAPI: PUSCH information always included */
...
@@ -1750,8 +1748,8 @@ void nr_schedule_ulsch(module_id_t module_id, frame_t frame, sub_frame_t slot)
...
@@ -1750,8 +1748,8 @@ void nr_schedule_ulsch(module_id_t module_id, frame_t frame, sub_frame_t slot)
/* look up the PDCCH PDU for this BWP and CORESET. If it does not exist,
/* look up the PDCCH PDU for this BWP and CORESET. If it does not exist,
* create it */
* create it */
NR_SearchSpace_t
*
ss
=
(
sched_ctrl
->
active_bwp
||
ubwpd
)
?
sched_ctrl
->
search_space
:
RC
.
nrmac
[
module_id
]
->
sched_ctrlCommon
->
search_space
;
NR_SearchSpace_t
*
ss
=
sched_ctrl
->
search_space
;
NR_ControlResourceSet_t
*
coreset
=
(
sched_ctrl
->
active_bwp
||
ubwpd
)
?
sched_ctrl
->
coreset
:
RC
.
nrmac
[
module_id
]
->
sched_ctrlCommon
->
coreset
;
NR_ControlResourceSet_t
*
coreset
=
sched_ctrl
->
coreset
;
const
int
coresetid
=
coreset
->
controlResourceSetId
;
const
int
coresetid
=
coreset
->
controlResourceSetId
;
nfapi_nr_dl_tti_pdcch_pdu_rel15_t
*
pdcch_pdu
=
pdcch_pdu_coreset
[
coresetid
];
nfapi_nr_dl_tti_pdcch_pdu_rel15_t
*
pdcch_pdu
=
pdcch_pdu_coreset
[
coresetid
];
if
(
!
pdcch_pdu
)
{
if
(
!
pdcch_pdu
)
{
...
@@ -1761,7 +1759,7 @@ void nr_schedule_ulsch(module_id_t module_id, frame_t frame, sub_frame_t slot)
...
@@ -1761,7 +1759,7 @@ void nr_schedule_ulsch(module_id_t module_id, frame_t frame, sub_frame_t slot)
ul_dci_request_pdu
->
PDUSize
=
(
uint8_t
)(
2
+
sizeof
(
nfapi_nr_dl_tti_pdcch_pdu
));
ul_dci_request_pdu
->
PDUSize
=
(
uint8_t
)(
2
+
sizeof
(
nfapi_nr_dl_tti_pdcch_pdu
));
pdcch_pdu
=
&
ul_dci_request_pdu
->
pdcch_pdu
.
pdcch_pdu_rel15
;
pdcch_pdu
=
&
ul_dci_request_pdu
->
pdcch_pdu
.
pdcch_pdu_rel15
;
ul_dci_req
->
numPdus
+=
1
;
ul_dci_req
->
numPdus
+=
1
;
nr_configure_pdcch
(
pdcch_pdu
,
coreset
,
genericParameters
,
&
sched_ctrl
->
sched_pdcch
);
nr_configure_pdcch
(
pdcch_pdu
,
coreset
,
false
,
&
sched_ctrl
->
sched_pdcch
);
pdcch_pdu_coreset
[
coresetid
]
=
pdcch_pdu
;
pdcch_pdu_coreset
[
coresetid
]
=
pdcch_pdu
;
}
}
...
...
openair2/LAYER2/NR_MAC_gNB/mac_proto.h
View file @
e592045d
...
@@ -271,7 +271,7 @@ void find_search_space(int ss_type,
...
@@ -271,7 +271,7 @@ void find_search_space(int ss_type,
void
nr_configure_pdcch
(
nfapi_nr_dl_tti_pdcch_pdu_rel15_t
*
pdcch_pdu
,
void
nr_configure_pdcch
(
nfapi_nr_dl_tti_pdcch_pdu_rel15_t
*
pdcch_pdu
,
NR_ControlResourceSet_t
*
coreset
,
NR_ControlResourceSet_t
*
coreset
,
NR_BWP_t
*
bwp
,
bool
is_sib1
,
NR_sched_pdcch_t
*
pdcch
);
NR_sched_pdcch_t
*
pdcch
);
NR_sched_pdcch_t
set_pdcch_structure
(
gNB_MAC_INST
*
gNB_mac
,
NR_sched_pdcch_t
set_pdcch_structure
(
gNB_MAC_INST
*
gNB_mac
,
...
@@ -399,6 +399,7 @@ void configure_UE_BWP(gNB_MAC_INST *nr_mac,
...
@@ -399,6 +399,7 @@ void configure_UE_BWP(gNB_MAC_INST *nr_mac,
NR_UE_BWP_t
*
BWP
,
NR_UE_BWP_t
*
BWP
,
NR_ServingCellConfigCommon_t
*
scc
,
NR_ServingCellConfigCommon_t
*
scc
,
NR_UE_sched_ctrl_t
*
sched_ctrl
,
NR_UE_sched_ctrl_t
*
sched_ctrl
,
NR_RA_t
*
ra
,
NR_CellGroupConfig_t
*
CellGroup
);
NR_CellGroupConfig_t
*
CellGroup
);
NR_UE_info_t
*
add_new_nr_ue
(
gNB_MAC_INST
*
nr_mac
,
rnti_t
rntiP
,
NR_CellGroupConfig_t
*
CellGroup
);
NR_UE_info_t
*
add_new_nr_ue
(
gNB_MAC_INST
*
nr_mac
,
rnti_t
rntiP
,
NR_CellGroupConfig_t
*
CellGroup
);
...
...
openair2/LAYER2/NR_MAC_gNB/nr_mac_gNB.h
View file @
e592045d
...
@@ -94,8 +94,14 @@ typedef struct {
...
@@ -94,8 +94,14 @@ typedef struct {
typedef
struct
NR_UE_BWP
{
typedef
struct
NR_UE_BWP
{
NR_BWP_Id_t
dl_bwp_id
;
NR_BWP_Id_t
dl_bwp_id
;
NR_BWP_Id_t
ul_bwp_id
;
NR_BWP_Id_t
ul_bwp_id
;
NR_BWP_t
*
dl_genericParameters
;
int
dl_scs
;
NR_BWP_t
*
ul_genericParameters
;
int
ul_scs
;
long
*
dl_cyclicprefix
;
long
*
ul_cyclicprefix
;
uint16_t
dl_BWPSize
;
uint16_t
dl_BWPStart
;
uint16_t
ul_BWPSize
;
uint16_t
ul_BWPStart
;
}
NR_UE_BWP_t
;
}
NR_UE_BWP_t
;
typedef
enum
{
typedef
enum
{
...
...
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