Commit ee7244ca authored by Ejaz Ahmed's avatar Ejaz Ahmed Committed by Melissa

Implemented CSI-RS transmission and reception.

parent 05604174
......@@ -114,6 +114,18 @@ uint32_t get_ssb_offset_to_pointA(uint32_t absoluteFrequencySSB,
uint32_t absoluteFrequencyPointA,
int ssbSubcarrierSpacing,
int frequency_range);
int get_NREsci2(const int sci2_alpha,
const int sci2_payload_len,
const int sci2_beta_offset,
const int pssch_numsym,
const int pscch_numsym,
const int pscch_numrbs,
const int l_subch,
const int subchannel_size,
const int mcs,
const int mcs_tb_ind);
int get_ssb_subcarrier_offset(uint32_t absoluteFrequencySSB, uint32_t absoluteFrequencyPointA);
......
......@@ -942,6 +942,7 @@ typedef struct
uint16_t scramb_id; // ScramblingID of the CSI-RS [3GPP TS 38.214, sec 5.2.2.3.1], Value: 0->1023
uint8_t power_control_offset; // Ratio of PDSCH EPRE to NZP CSI-RSEPRE [3GPP TS 38.214, sec 5.2.2.3.1], Value: 0->23 representing -8 to 15 dB in 1dB steps; 255: L1 is configured with ProfileSSS
uint8_t power_control_offset_ss; // Ratio of NZP CSI-RS EPRE to SSB/PBCH block EPRE [3GPP TS 38.214, sec 5.2.2.3.1], Values: 0: -3dB; 1: 0dB; 2: 3dB; 3: 6dB; 255: L1 is configured with ProfileSSS
uint8_t measurement_bitmap;
} nfapi_nr_dl_tti_csi_rs_pdu_rel15_t;
......
......@@ -11,6 +11,24 @@
#define SL_NR_MAX_PSSCH_SCI_LENGTH_IN_BYTES 8
#define SL_NR_MAX_SCI_LENGTH_IN_BYTES 8
typedef struct sl_nr_tti_csi_rs_pdu {
uint8_t subcarrier_spacing; // subcarrierSpacing [3GPP TS 38.211, sec 4.2], Value:0->4
uint8_t cyclic_prefix; // Cyclic prefix type [3GPP TS 38.211, sec 4.2], 0: Normal; 1: Extended
uint16_t start_rb; // PRB where this CSI resource starts related to common resource block #0 (CRB#0). Only multiples of 4 are allowed. [3GPP TS 38.331, sec 6.3.2 parameter CSIFrequencyOccupation], Value: 0 ->274
uint16_t nr_of_rbs; // Number of PRBs across which this CSI resource spans. Only multiples of 4 are allowed. [3GPP TS 38.331, sec 6.3.2 parameter CSI-FrequencyOccupation], Value: 24 -> 276
uint8_t csi_type; // CSI Type [3GPP TS 38.211, sec 7.4.1.5], Value: 0:TRS; 1:CSI-RS NZP; 2:CSI-RS ZP
uint8_t row; // Row entry into the CSI Resource location table. [3GPP TS 38.211, sec 7.4.1.5.3 and table 7.4.1.5.3-1], Value: 1-18
uint16_t freq_domain; // Bitmap defining the frequencyDomainAllocation [3GPP TS 38.211, sec 7.4.1.5.3] [3GPP TS 38.331 CSIResourceMapping], Value: Up to the 12 LSBs, actual size is determined by the Row parameter
uint8_t symb_l0; // The time domain location l0 and firstOFDMSymbolInTimeDomain [3GPP TS 38.211, sec 7.4.1.5.3], Value: 0->13
uint8_t symb_l1; // The time domain location l1 and firstOFDMSymbolInTimeDomain2 [3GPP TS 38.211, sec 7.4.1.5.3], Value: 2->12
uint8_t cdm_type; // The cdm-Type field [3GPP TS 38.211, sec 7.4.1.5.3 and table 7.4.1.5.3-1], Value: 0: noCDM; 1: fd-CDM2; 2: cdm4-FD2-TD2; 3: cdm8-FD2-TD4
uint8_t freq_density; // The density field, p and comb offset (for dot5). [3GPP TS 38.211, sec 7.4.1.5.3 and table 7.4.1.5.3-1], Value: 0: dot5 (even RB); 1: dot5 (odd RB); 2: one; 3: three
uint16_t scramb_id; // ScramblingID of the CSI-RS [3GPP TS 38.214, sec 5.2.2.3.1], Value: 0->1023
uint8_t power_control_offset; // Ratio of PDSCH EPRE to NZP CSI-RSEPRE [3GPP TS 38.214, sec 5.2.2.3.1], Value: 0->23 representing -8 to 15 dB in 1dB steps; 255: L1 is configured with ProfileSSS
uint8_t power_control_offset_ss; // Ratio of NZP CSI-RS EPRE to SSB/PBCH block EPRE [3GPP TS 38.214, sec 5.2.2.3.1], Values: 0: -3dB; 1: 0dB; 2: 3dB; 3: 6dB; 255: L1 is configured with ProfileSSS
uint8_t measurement_bitmap; // bit 0 RSRP, bit 1 RI, bit 2 LI, bit 3 PMI, bit 4 CQI, bit 5 i1
} sl_nr_tti_csi_rs_pdu_t;
typedef enum sl_sci_format_type_enum {
SL_SCI_INVALID_FORMAT,
SL_SCI_FORMAT_1A_ON_PSCCH,
......@@ -30,6 +48,7 @@ typedef enum sl_nr_rx_config_type_enum {
SL_NR_CONFIG_TYPE_RX_PSCCH,
SL_NR_CONFIG_TYPE_RX_PSSCH_SCI,
SL_NR_CONFIG_TYPE_RX_PSSCH_SLSCH,
SL_NR_CONFIG_TYPE_RX_PSSCH_SLSCH_CSI_RS,
SL_NR_CONFIG_TYPE_RX_MAXIMUM
} sl_nr_rx_config_type_enum_t;
......@@ -38,6 +57,8 @@ typedef enum sl_nr_tx_config_type_enum {
SL_NR_CONFIG_TYPE_TX_PSBCH = SL_NR_CONFIG_TYPE_RX_MAXIMUM + 1,
SL_NR_CONFIG_TYPE_TX_PSCCH_PSSCH,
SL_NR_CONFIG_TYPE_TX_PSCCH_PSSCH_PSFCH,
SL_NR_CONFIG_TYPE_TX_PSCCH_PSSCH_CSI_RS,
SL_NR_CONFIG_TYPE_TX_PSCCH_PSSCH_PSFCH_CSI_RS,
SL_NR_CONFIG_TYPE_TX_MAXIMUM
} sl_nr_tx_config_type_enum_t;
......@@ -198,6 +219,7 @@ typedef struct {
sl_nr_rx_config_pssch_sci_pdu_t rx_sci2_config_pdu;
sl_nr_rx_config_pssch_pdu_t rx_pssch_config_pdu;
};
sl_nr_tti_csi_rs_pdu_t rx_csi_rs_config_pdu;
} sl_nr_rx_config_request_pdu_t;
// MAC commands PHY to perform an action on RX RESOURCE POOL or RX PSBCH using this RX CONFIG
......@@ -225,7 +247,7 @@ typedef struct sl_nr_tx_config_psfch_pdu {
uint8_t bit_len_harq;
} sl_nr_tx_config_psfch_pdu_t;
//MAC commands PHY to transmit Data on PSCCH, PSSCH.
typedef struct sl_nr_tx_config_pscch_pssch_psfch_pdu {
typedef struct sl_nr_tx_config_pscch_pssch_pdu {
//SCI 1A Payload Prepared by MAC, to be sent on PSCCH
uint8_t pscch_sci_payload[SL_NR_MAX_PSCCH_SCI_LENGTH_IN_BYTES];
......@@ -288,6 +310,9 @@ typedef struct sl_nr_tx_config_pscch_pssch_psfch_pdu {
sl_nr_tx_config_psfch_pdu_t psfch_pdu;
//....TBD.. any additional parameters
// CSI-RS related parameters
sl_nr_tti_csi_rs_pdu_t nr_sl_csi_rs_pdu;
//TX Power for PSSCH in symbol without PSCCH.
// Power for PSCCH and power for PSSCH in symbol with PSCCH is calculated
// from this value according to 38.213 section 16
......@@ -295,7 +320,7 @@ typedef struct sl_nr_tx_config_pscch_pssch_psfch_pdu {
uint16_t slsch_payload_length;
uint8_t *slsch_payload;
} sl_nr_tx_config_pscch_pssch_psfch_pdu_t;
} sl_nr_tx_config_pscch_pssch_pdu_t;
// MAC indicates PHY to send PSBCH.
typedef struct sl_nr_tx_config_psbch_pdu {
......@@ -311,7 +336,7 @@ typedef struct {
sl_nr_tx_config_type_enum_t pdu_type; // indicates the type of TX config request
union {
sl_nr_tx_config_psbch_pdu_t tx_psbch_config_pdu;
sl_nr_tx_config_pscch_pssch_psfch_pdu_t tx_pscch_pssch_psfch_config_pdu;
sl_nr_tx_config_pscch_pssch_pdu_t tx_pscch_pssch_config_pdu;
};
} sl_nr_tx_config_request_pdu_t;
......
......@@ -25,6 +25,7 @@
#include "nr_ul_estimation.h"
#include "PHY/sse_intrin.h"
#include "PHY/NR_REFSIG/nr_refsig.h"
#include "PHY/NR_REFSIG/refsig_defs_ue.h"
#include "PHY/NR_REFSIG/dmrs_nr.h"
#include "PHY/NR_REFSIG/ptrs_nr.h"
#include "PHY/NR_TRANSPORT/nr_transport_proto.h"
......
......@@ -27,6 +27,21 @@
#include "PHY/defs_nr_UE.h"
#include "PHY/LTE_REFSIG/lte_refsig.h"
typedef struct port_freq_indices {
uint8_t p;
uint16_t k;
} port_freq_indices_t;
typedef struct csi_rs_params {
uint8_t size;
uint8_t j[16];
uint8_t k_n[6];
uint8_t kprime;
uint8_t lprime;
uint8_t ports;
uint8_t koverline[16];
uint8_t loverline[16];
} csi_rs_params_t;
/*!\brief This function generates the NR Gold sequence (38-211, Sec 5.2.1) for the PBCH DMRS.
@param PHY_VARS_NR_UE* ue structure provides configuration, frame parameters and the pointers to the 32 bits sequence storage tables
......@@ -68,7 +83,21 @@ void nr_init_pusch_dmrs(PHY_VARS_NR_UE* ue,
uint16_t N_n_scid,
uint8_t n_scid);
void nr_init_pssch_dmrs_oneshot(NR_DL_FRAME_PARMS *fp,
uint16_t N_id,
uint32_t *pssch_dmrs,
int slot,
int symb);
void nr_init_csi_rs(const NR_DL_FRAME_PARMS *fp, uint32_t ***csi_rs, uint32_t Nid);
void init_nr_gold_prs(PHY_VARS_NR_UE* ue);
void get_csi_rs_freq_ind_sl(const NR_DL_FRAME_PARMS* frame_parms,
uint16_t n,
nfapi_nr_dl_tti_csi_rs_pdu_rel15_t* csi_params,
csi_rs_params_t* table_params,
port_freq_indices_t* port_freq_indices);
void get_csi_rs_params_from_table(const nfapi_nr_dl_tti_csi_rs_pdu_rel15_t *csi_params,
csi_rs_params_t* table_params);
#endif
This diff is collapsed.
......@@ -40,7 +40,7 @@ uint32_t nr_get_G(uint16_t nb_rb, uint16_t nb_symb_sch,uint8_t nb_re_dmrs,uint16
return(G);
}
nr_get_G_SL(uint16_t nb_rb, uint16_t nb_symb_sch,uint8_t nb_re_dmrs,uint16_t length_dmrs,uint8_t sci1_dmrs_overlap,uint8_t sci1_symb,uint16_t sci1_rb,uint16_t sci2_re,uint8_t Qm,uint8_t Nl) {
uint32_t nr_get_G_SL(uint16_t nb_rb, uint16_t nb_symb_sch, uint8_t nb_re_dmrs, uint16_t length_dmrs, uint8_t sci1_dmrs_overlap, uint8_t sci1_symb, uint16_t sci1_rb, uint16_t sci2_re, uint8_t Qm, uint8_t Nl) {
uint32_t G_SL;
G_SL = ((NR_NB_SC_PER_RB*nb_symb_sch)-(nb_re_dmrs*length_dmrs))*nb_rb*Qm*Nl;
......
......@@ -59,6 +59,18 @@ uint32_t nr_get_G(uint16_t nb_rb, uint16_t nb_symb_sch, uint8_t nb_re_dmrs, uint
uint32_t nr_get_E(uint32_t G, uint8_t C, uint8_t Qm, uint8_t Nl, uint8_t r);
int get_NREsci2_2(const int sci2_alpha,
const int sci2_payload_len,
const int sci2_beta_offset,
const int pssch_numsym,
const int pscch_numsym,
const int pscch_numrbs,
const int l_subch,
const int subchannel_size,
const int target_coderate);
uint32_t nr_get_G_SL(uint16_t nb_rb, uint16_t nb_symb_sch, uint8_t nb_re_dmrs, uint16_t length_dmrs, uint8_t sci1_dmrs_overlap, uint8_t sci1_symb, uint16_t sci1_rb, uint16_t sci2_re, uint8_t Qm, uint8_t Nl);
void compute_nr_prach_seq(uint8_t short_sequence, uint8_t num_sequences, uint8_t rootSequenceIndex, c16_t X_u[64][839]);
void nr_fill_du(uint16_t N_ZC, const uint16_t *prach_root_sequence_map);
......
......@@ -127,15 +127,17 @@ void free_gNB_dlsch(NR_gNB_DLSCH_t *dlsch, uint16_t N_RB, const NR_DL_FRAME_PARM
@param harq_pid HARQ process ID
*/
void nr_rx_pusch(PHY_VARS_gNB *gNB,
PHY_VARS_NR_UE *ue,
UE_nr_rxtx_proc_t *proc,
PHY_VARS_NR_UE *ue,
UE_nr_rxtx_proc_t *proc,
nr_phy_data_t *phy_data,
int rxFSz,
c16_t rxdataF[][rxFSz],
int rxFSz,
c16_t rxdataF[][rxFSz],
uint8_t UE_id,
uint32_t frame,
uint8_t slot,
unsigned char harq_pid);
unsigned char harq_pid,
bool *is_csi_rs_slot
);
/** \brief This function performs RB extraction (signal and channel estimates) (currently signal only until channel estimation and compensation are implemented)
@param rxdataF pointer to the received frequency domain signal
......@@ -147,18 +149,20 @@ void nr_rx_pusch(PHY_VARS_gNB *gNB,
@param frame_parms, Pointer to frame descriptor structure
*/
void nr_ulsch_extract_rbs(int rxFSz,
c16_t rxdataF[][rxFSz],
c16_t rxdataF[][rxFSz],
NR_gNB_PUSCH *pusch_vars,
int slot,
unsigned char symbol,
uint8_t is_dmrs_symbol,
uint8_t is_csirs_symbol,
uint32_t bwp_start,
uint32_t rb_start,
uint32_t rb_size,
uint32_t nrOfLayers,
uint32_t num_dmrs_cdm_grps_no_data,
uint32_t dmrs_config_type,
NR_DL_FRAME_PARMS *frame_parms);
uint32_t rb_start,
uint32_t rb_size,
uint32_t nrOfLayers,
uint32_t num_dmrs_cdm_grps_no_data,
uint32_t dmrs_config_type,
NR_DL_FRAME_PARMS *frame_parms,
nfapi_nr_dl_tti_csi_rs_pdu_rel15_t *csi_params);
void nr_ulsch_scale_channel(int32_t **ul_ch_estimates_ext,
NR_DL_FRAME_PARMS *frame_parms,
......
......@@ -39,6 +39,7 @@
#include "common/utils/nr/nr_common.h"
#include "PHY/NR_TRANSPORT/nr_transport_proto.h"
#include "PHY/NR_UE_ESTIMATION/filt16a_32.h"
#include "executables/nr-uesoftmodem.h"
// 10*log10(pow(2,30))
#define pow_2_30_dB 90
......@@ -205,7 +206,7 @@ int nr_get_csi_rs_signal(const PHY_VARS_NR_UE *ue,
for (int rb = csirs_config_pdu->start_rb; rb < (csirs_config_pdu->start_rb+csirs_config_pdu->nr_of_rbs); rb++) {
// for freq density 0.5 checks if even or odd RB
if(csirs_config_pdu->freq_density <= 1 && csirs_config_pdu->freq_density != (rb % 2)) {
if(csirs_config_pdu->freq_density <= 1 && get_softmodem_params()->sl_mode ? 0 : csirs_config_pdu->freq_density != (rb % 2)) {
continue;
}
......@@ -230,9 +231,9 @@ int nr_get_csi_rs_signal(const PHY_VARS_NR_UE *ue,
((int32_t)(rx_csi_rs_signal[k].i)*rx_csi_rs_signal[k].i));
meas_count++;
LOG_D(NR_PHY, "RX CSI-RS symbol_offset %li k %i symbol_offset+k=%li\n", symbol_offset, k, symbol_offset+k);
#ifdef NR_CSIRS_DEBUG
int dataF_offset = proc->nr_slot_rx*ue->frame_parms.samples_per_slot_wCP;
int dataF_offset = get_softmodem_params()->sl_mode == 2 ? 0 : proc->nr_slot_rx * ue->frame_parms.samples_per_slot_wCP;
uint16_t port_tx = s+j_cdm[cdm_id]*CDM_group_size;
c16_t *tx_csi_rs_signal = (c16_t*)&nr_csi_info->csi_rs_generated_signal[port_tx][symbol_offset+dataF_offset];
LOG_I(NR_PHY, "l,k (%2d,%4d) |\tport_tx %d (%4d,%4d)\tant_rx %d (%4d,%4d)\n",
......@@ -270,7 +271,7 @@ uint32_t calc_power_csirs(const uint16_t *x, const fapi_nr_dl_config_csirs_pdu_r
uint64_t sum_x2 = 0;
uint16_t size = 0;
for (int rb = 0; rb < csirs_config_pdu->nr_of_rbs; rb++) {
if (csirs_config_pdu->freq_density <= 1 && csirs_config_pdu->freq_density != ((rb + csirs_config_pdu->start_rb) % 2)) {
if (csirs_config_pdu->freq_density <= 1 && get_softmodem_params()->sl_mode ? 0 : csirs_config_pdu->freq_density != ((rb + csirs_config_pdu->start_rb) % 2)) {
continue;
}
sum_x = sum_x + x[rb];
......@@ -302,7 +303,7 @@ int nr_csi_rs_channel_estimation(const PHY_VARS_NR_UE *ue,
uint32_t *noise_power) {
const NR_DL_FRAME_PARMS *frame_parms = &ue->frame_parms;
const int dataF_offset = proc->nr_slot_rx*ue->frame_parms.samples_per_slot_wCP;
const int dataF_offset = get_softmodem_params()->sl_mode == 2 ? 0 : proc->nr_slot_rx * ue->frame_parms.samples_per_slot_wCP;
*noise_power = 0;
int maxh = 0;
int count = 0;
......@@ -318,7 +319,7 @@ int nr_csi_rs_channel_estimation(const PHY_VARS_NR_UE *ue,
for (int rb = csirs_config_pdu->start_rb; rb < (csirs_config_pdu->start_rb+csirs_config_pdu->nr_of_rbs); rb++) {
// for freq density 0.5 checks if even or odd RB
if(csirs_config_pdu->freq_density <= 1 && csirs_config_pdu->freq_density != (rb % 2)) {
if(csirs_config_pdu->freq_density <= 1 && get_softmodem_params()->sl_mode ? 0 : csirs_config_pdu->freq_density != (rb % 2)) {
continue;
}
......@@ -386,7 +387,7 @@ int nr_csi_rs_channel_estimation(const PHY_VARS_NR_UE *ue,
for (int rb = csirs_config_pdu->start_rb; rb < (csirs_config_pdu->start_rb+csirs_config_pdu->nr_of_rbs); rb++) {
// for freq density 0.5 checks if even or odd RB
if(csirs_config_pdu->freq_density <= 1 && csirs_config_pdu->freq_density != (rb % 2)) {
if(csirs_config_pdu->freq_density <= 1 && get_softmodem_params()->sl_mode ? 0 : csirs_config_pdu->freq_density != (rb % 2)) {
continue;
}
......@@ -634,7 +635,7 @@ int nr_csi_rs_pmi_estimation(const PHY_VARS_NR_UE *ue,
for (int rb = csirs_config_pdu->start_rb; rb < (csirs_config_pdu->start_rb+csirs_config_pdu->nr_of_rbs); rb++) {
if (csirs_config_pdu->freq_density <= 1 && csirs_config_pdu->freq_density != (rb % 2)) {
if (csirs_config_pdu->freq_density <= 1 && get_softmodem_params()->sl_mode ? 0 : csirs_config_pdu->freq_density != (rb % 2)) {
continue;
}
uint16_t k = (frame_parms->first_carrier_offset + rb * NR_NB_SC_PER_RB) % frame_parms->ofdm_symbol_size;
......@@ -842,7 +843,7 @@ void nr_ue_csi_rs_procedures(PHY_VARS_NR_UE *ue, UE_nr_rxtx_proc_t *proc, c16_t
return;
}
const fapi_nr_dl_config_csirs_pdu_rel15_t *csirs_config_pdu = (fapi_nr_dl_config_csirs_pdu_rel15_t*)&ue->csirs_vars[gNB_id]->csirs_config_pdu;
fapi_nr_dl_config_csirs_pdu_rel15_t *csirs_config_pdu = (fapi_nr_dl_config_csirs_pdu_rel15_t*)&ue->csirs_vars[gNB_id]->csirs_config_pdu;
#ifdef NR_CSIRS_DEBUG
LOG_I(NR_PHY, "csirs_config_pdu->subcarrier_spacing = %i\n", csirs_config_pdu->subcarrier_spacing);
......@@ -887,9 +888,15 @@ void nr_ue_csi_rs_procedures(PHY_VARS_NR_UE *ue, UE_nr_rxtx_proc_t *proc, c16_t
uint8_t i1[3];
uint8_t i2[1];
uint8_t num_of_layers = min(get_nrUE_params()->nb_antennas_tx, get_nrUE_params()->nb_antennas_rx);
AssertFatal(num_of_layers > 0, "Number of layers MUST be greater than zero!!!");
uint16_t beta_csirs = get_softmodem_params()->sl_mode ? (uint16_t)(AMP * (ceil(sqrt(num_of_layers / frame_parms->nb_antennas_tx)))) & 0xFFFF : AMP;
csirs_config_pdu->scramb_id = ue->slsch[0].harq_process->pssch_pdu->Nid % (1 << 10);
LOG_D(NR_PHY, "Rx beta_csirs: %d, scramb_id %i, frame.slot (%d.%d)\n", beta_csirs, csirs_config_pdu->scramb_id, proc->frame_rx, proc->nr_slot_rx);
nr_generate_csi_rs(frame_parms,
ue->nr_csi_info->csi_rs_generated_signal,
AMP,
beta_csirs,
ue->nr_csi_info,
(nfapi_nr_dl_tti_csi_rs_pdu_rel15_t *) csirs_config_pdu,
proc->nr_slot_rx,
......@@ -991,7 +998,7 @@ void nr_ue_csi_rs_procedures(PHY_VARS_NR_UE *ue, UE_nr_rxtx_proc_t *proc, c16_t
rank_indicator + 1, i1[0], i1[1], i1[2], i2[0], precoded_sinr_dB, cqi);
break;
case 27 :
LOG_I(NR_PHY, "RSRP = %i dBm, RI = %i i1 = %i.%i.%i, i2 = %i, SINR = %i dB, CQI = %i\n",
LOG_D(NR_PHY, "RSRP = %i dBm, RI = %i i1 = %i.%i.%i, i2 = %i, SINR = %i dB, CQI = %i\n",
rsrp_dBm, rank_indicator + 1, i1[0], i1[1], i1[2], i2[0], precoded_sinr_dB, cqi);
break;
default :
......
......@@ -55,7 +55,7 @@ uint32_t nr_generate_sci1(const PHY_VARS_NR_UE *ue,
const NR_DL_FRAME_PARMS *frame_parms,
const int16_t amp,
const int nr_slot_tx,
const sl_nr_tx_config_pscch_pssch_psfch_pdu_t *pscch_pssch_pdu)
const sl_nr_tx_config_pscch_pssch_pdu_t *pscch_pssch_pdu)
{
nfapi_nr_dl_tti_pdcch_pdu_rel15_t pdcch_pdu_rel15={0};
......
......@@ -211,7 +211,7 @@ uint32_t nr_dlsch_decoding(PHY_VARS_NR_UE *phy_vars_ue,
int nr_ulsch_encoding(PHY_VARS_NR_UE *ue,
NR_UE_ULSCH_t *ulsch,
sl_nr_tx_config_pscch_pssch_psfch_pdu_t *pscch_pssch_pdu,
sl_nr_tx_config_pscch_pssch_pdu_t *pscch_pssch_pdu,
NR_DL_FRAME_PARMS* frame_parms,
uint8_t harq_pid,
unsigned int G);
......@@ -434,7 +434,14 @@ uint32_t nr_generate_sci1(const PHY_VARS_NR_UE *ue,
const NR_DL_FRAME_PARMS *frame_parms,
const int16_t amp,
const int nr_slot_tx,
const sl_nr_tx_config_pscch_pssch_psfch_pdu_t *pscch_pssch_pdu);
const sl_nr_tx_config_pscch_pssch_pdu_t *pscch_pssch_pdu);
void nr_generate_psfch0(const PHY_VARS_NR_UE *ue,
c16_t **txdataF,
const NR_DL_FRAME_PARMS *frame_parms,
const int16_t amp,
const int nr_slot_tx,
const sl_nr_tx_config_psfch_pdu_t *psfch_pdu);
/**@}*/
#endif
......
......@@ -43,7 +43,7 @@
int nr_ulsch_encoding(PHY_VARS_NR_UE *ue,
NR_UE_ULSCH_t *ulsch,
sl_nr_tx_config_pscch_pssch_psfch_pdu_t *pscch_pssch_pdu,
sl_nr_tx_config_pscch_pssch_pdu_t *pscch_pssch_pdu,
NR_DL_FRAME_PARMS* frame_parms,
uint8_t harq_pid,
unsigned int G) {
......
......@@ -42,6 +42,7 @@
#include "common/utils/LOG/vcd_signal_dumper.h"
#include "PHY/NR_TRANSPORT/nr_transport_common_proto.h"
#include "PHY/NR_TRANSPORT/nr_sch_dmrs.h"
#include "PHY/NR_TRANSPORT/nr_dci.h"
#include "PHY/defs_nr_common.h"
#include "PHY/TOOLS/tools_defs.h"
#include "executables/nr-softmodem.h"
......@@ -99,7 +100,7 @@ void nr_pusch_codeword_scrambling_sci(uint32_t *in,
uint32_t* out)
{
uint8_t reset, b_idx;
uint32_t x1 = 0, x2 = 0, s = 0, temp_out = 0;
uint32_t x1 = 0, x2 = 0, s = 0;
reset = 1;
x2 = (Nid<<15) + 1010;
......@@ -122,7 +123,7 @@ void nr_pusch_codeword_scrambling_sci_2layer(uint32_t *in,
uint32_t* out)
{
uint8_t reset, b_idx;
uint32_t x1 = 0, x2 = 0, s = 0, temp_out = 0;
uint32_t x1 = 0, x2 = 0, s = 0;
reset = 1;
x2 = (Nid<<15) + 1010;
......@@ -173,11 +174,17 @@ void nr_ue_ulsch_procedures(PHY_VARS_NR_UE *UE,
int i;
int sample_offsetF, N_RE_prime;
bool is_csi_rs_slot = false;
if (phy_data->sl_tx_action == SL_NR_CONFIG_TYPE_TX_PSCCH_PSSCH_CSI_RS ||
phy_data->sl_tx_action == SL_NR_CONFIG_TYPE_TX_PSCCH_PSSCH_PSFCH_CSI_RS)
is_csi_rs_slot = true;
nfapi_nr_dl_tti_csi_rs_pdu_rel15_t *csi_params = (nfapi_nr_dl_tti_csi_rs_pdu_rel15_t *)&phy_data->nr_sl_pssch_pscch_pdu.nr_sl_csi_rs_pdu;
LOG_D(NR_PHY, "Tx start_rb %i, cdm_type %i, csi_type %i, freq_density %i, nr_of_rbs %i, row %i\n", csi_params->start_rb, csi_params->cdm_type, csi_params->csi_type, csi_params->freq_density, csi_params->nr_of_rbs, csi_params->row);
int N_PRB_oh = 0; // higher layer (RRC) parameter xOverhead in PUSCH-ServingCellConfig
uint16_t number_dmrs_symbols = 0;
NR_UE_ULSCH_t *ulsch_ue = &phy_data->ulsch;
sl_nr_tx_config_pscch_pssch_psfch_pdu_t *pscch_pssch_pdu = &phy_data->nr_sl_pssch_pscch_psfch_pdu;
sl_nr_tx_config_pscch_pssch_pdu_t *pscch_pssch_pdu = &phy_data->nr_sl_pssch_pscch_pdu;
NR_UL_UE_HARQ_t *harq_process_ul_ue = &UE->ul_harq_processes[harq_pid];
const nfapi_nr_ue_pusch_pdu_t *pusch_pdu = &ulsch_ue->pusch_pdu;
......@@ -197,14 +204,23 @@ void nr_ue_ulsch_procedures(PHY_VARS_NR_UE *UE,
if (start_sc >= frame_parms->ofdm_symbol_size)
start_sc -= frame_parms->ofdm_symbol_size;
ulsch_ue->Nid_cell = frame_parms->Nid_cell;
uint8_t first_dmrs_symbol = 0;
bool is_first_dmrs_symbol = true;
for (int i = start_symbol; i < start_symbol + number_of_symbols; i++) {
if((ul_dmrs_symb_pos >> i) & 0x01)
if((ul_dmrs_symb_pos >> i) & 0x01) {
number_dmrs_symbols += 1;
if (is_first_dmrs_symbol) {
first_dmrs_symbol = i;
is_first_dmrs_symbol = false;
}
if (csi_params->symb_l0 != 0)
AssertFatal(i != csi_params->symb_l0, "CSI-RS MUST not be sent in DMRS symbol\n");
}
}
if (csi_params->symb_l0 != 0)
AssertFatal(csi_params->symb_l0 > pscch_pssch_pdu->pscch_numsym, "CSI-RS MUST not be sent in PSCCH symbol\n");
nb_dmrs_re_per_rb = ((dmrs_type == pusch_dmrs_type1) ? 6:4)*cdm_grps_no_data;
//LOG_I(NR_PHY,"%s TX %x : start_rb %d nb_rb %d mod_order %d Nl %d Tpmi %d bwp_start %d start_sc %d start_symbol %d num_symbols %d cdmgrpsnodata %d num_dmrs %d dmrs_re_per_rb %d\n",pscch_pssch_pdu==NULL?"PUSCH":"PSSCH",
......@@ -232,9 +248,22 @@ void nr_ue_ulsch_procedures(PHY_VARS_NR_UE *UE,
unsigned int G = (pscch_pssch_pdu==NULL) ? nr_get_G(nb_rb, number_of_symbols,
nb_dmrs_re_per_rb, number_dmrs_symbols, mod_order, Nl):
nr_get_G_SL(nb_rb, number_of_symbols,6,number_dmrs_symbols,sci1_dmrs_overlap,pscch_pssch_pdu->pscch_numsym,pscch_pssch_pdu->pscch_numrbs,sci2_re,mod_order,Nl);
uint32_t Gsci2 = sci2_re*2*Nl;
G -= (is_csi_rs_slot ? csi_params->nr_of_rbs/csi_params->freq_density*mod_order*Nl : 0);
LOG_D(NR_PHY, "%d.%d, is_csi_rs_slot %d, G %i, number_of_symbols %i, mod_order %i, freq_density %i, nr_of_rbs %i\n", frame, slot, is_csi_rs_slot, G, number_of_symbols, mod_order, csi_params->freq_density, csi_params->nr_of_rbs);
// Following code checks, after PSCCH symbols and DMRS symbols, whether PSSCH symbols are used by SCI2 or not,
// If true, then CSI-RS MUST not be sent in those PSSCH symbols containing SCI2.
if (csi_params->symb_l0 != 0) {
int32_t next_symbs_sci2_re = 0;
int32_t sci1_re = 12 * pscch_pssch_pdu->pscch_numrbs;
int32_t non_sci1_re = 12 * nb_rb - sci1_re;
next_symbs_sci2_re = first_dmrs_symbol <= pscch_pssch_pdu->pscch_numsym ? sci2_re - (non_sci1_re / 2 - (non_sci1_re * (pscch_pssch_pdu->pscch_numsym - 1)) - (12 * nb_rb) / 2) : sci2_re - (12 * nb_rb) / 2;
int8_t remaining_sci2_symb = next_symbs_sci2_re > 0 ? ceil(next_symbs_sci2_re / (12 * nb_rb)) : 0;
int8_t non_csi_rs_symbs = pscch_pssch_pdu->pscch_numsym + 1 + remaining_sci2_symb; // 1 is for first dmrs symbol
AssertFatal(csi_params->symb_l0 > non_csi_rs_symbs, "CSI-RS MUST not be sent in PSSCH symbol containing SCI2");
}
uint32_t Gsci2 = sci2_re*2*Nl;
trace_NRpdu(DIRECTION_UPLINK,
harq_process_ul_ue->a,
pscch_pssch_pdu==NULL?pusch_pdu->pusch_data.tb_size:pscch_pssch_pdu->tb_size,
......@@ -266,7 +295,6 @@ void nr_ue_ulsch_procedures(PHY_VARS_NR_UE *UE,
memset(scrambled_output, 0, ((available_bits>>5)+1)*sizeof(uint32_t));
memset(scrambled_output_sci, 0, ((Gsci2>>5)+1)*sizeof(uint32_t));
// for (int i=0;i<(Gsci2>>5)+1;i++) LOG_I(NR_PHY,"sci2_encoded[%d] %x\n",i,sci2_encoded_output[i]);
// for (int g=0;g<G;g++) LOG_I(NR_PHY,"coded_output_f[%d] %d\n",g,harq_process_ul_ue->f[g]);
// LOG_I(NR_PHY,"Scrambling with Nid %x\n",phy_data->pscch_Nid);
......@@ -478,13 +506,19 @@ void nr_ue_ulsch_procedures(PHY_VARS_NR_UE *UE,
uint16_t k = start_sc;
uint16_t n = 0;
uint8_t is_dmrs_sym = 0;
uint8_t is_csi_rs_sym = 0;
uint8_t is_ptrs_sym = 0;
uint16_t dmrs_idx = 0, ptrs_idx = 0;
int16_t csi_rs_rb = csi_params->start_rb;
int is_pscch_sym = 0;
if (pscch_pssch_pdu && l<(start_symbol + pscch_pssch_pdu->pscch_numsym)) {
is_pscch_sym = 1;
}
if (is_csi_rs_slot && l == csi_params->symb_l0) {
is_csi_rs_sym = 1;
}
if ((ul_dmrs_symb_pos >> l) & 0x01) {
is_dmrs_sym = 1;
......@@ -521,6 +555,8 @@ void nr_ue_ulsch_procedures(PHY_VARS_NR_UE *UE,
for (i=0; i< nb_rb*NR_NB_SC_PER_RB; i++) {
uint8_t is_dmrs = 0;
uint8_t is_ptrs = 0;
uint8_t is_csi_rs = 0;
if (is_pscch_sym && i==(pscch_pssch_pdu->startrb)) {
i+=(pscch_pssch_pdu->pscch_numrbs*NR_NB_SC_PER_RB);
k+=(pscch_pssch_pdu->pscch_numrbs*NR_NB_SC_PER_RB);
......@@ -530,7 +566,7 @@ void nr_ue_ulsch_procedures(PHY_VARS_NR_UE *UE,
}
}
LOG_D(NR_PHY,"symbol %d re %d/%d k %d\n",l,i,nb_rb*NR_NB_SC_PER_RB, k);
LOG_D(NR_PHY, "symbol %d re %d/%d k %d\n", l, i, nb_rb*NR_NB_SC_PER_RB, k);
sample_offsetF = l*frame_parms->ofdm_symbol_size + k;
if (is_dmrs_sym) {
......@@ -548,6 +584,21 @@ void nr_ue_ulsch_procedures(PHY_VARS_NR_UE *UE,
frame_parms->ofdm_symbol_size);
}
if (is_csi_rs_sym) {
if ((k >= csi_params->start_rb * NR_NB_SC_PER_RB) && (i % NR_NB_SC_PER_RB == 0) && (csi_rs_rb < csi_params->nr_of_rbs)) {
csi_rs_params_t table_params;
get_csi_rs_params_from_table(csi_params, &table_params);
port_freq_indices_t *port_freq_indices = (port_freq_indices_t *)malloc(table_params.ports*sizeof(port_freq_indices));
get_csi_rs_freq_ind_sl(frame_parms, csi_rs_rb, csi_params, &table_params, port_freq_indices);
if (k == port_freq_indices[nl].k) {
is_csi_rs = 1;
csi_rs_rb++;
LOG_D(NR_PHY, "Tx port_freq_indices.p %i, port_freq_indices.k %d, is_csi_rs %d, k = %i, RE %i, csi_rs_rb %i\n", port_freq_indices[nl].p, port_freq_indices[nl].k, is_csi_rs, k, i, csi_rs_rb);
}
free(port_freq_indices);
}
}
if (is_dmrs == 1) {
// if transform precoding is enabled
if (!pscch_pssch_pdu && pusch_pdu->transform_precoding == transformPrecoder_enabled) {
......@@ -575,8 +626,13 @@ void nr_ue_ulsch_procedures(PHY_VARS_NR_UE *UE,
ptrs_idx++;
} else if (!is_dmrs_sym || allowed_xlsch_re_in_dmrs_symbol(k, start_sc, frame_parms->ofdm_symbol_size, cdm_grps_no_data, dmrs_type)) {
if (pscch_pssch_pdu || pusch_pdu->transform_precoding == transformPrecoder_disabled) {
((int16_t*)tx_precoding[nl])[(sample_offsetF)<<1] = ((int16_t *)tx_layers[nl])[m<<1];
((int16_t*)tx_precoding[nl])[((sample_offsetF)<<1) + 1] = ((int16_t *)tx_layers[nl])[(m<<1) + 1];
if (!is_csi_rs) {
((int16_t*)tx_precoding[nl])[(sample_offsetF)<<1] = ((int16_t *)tx_layers[nl])[m<<1];
((int16_t*)tx_precoding[nl])[((sample_offsetF)<<1) + 1] = ((int16_t *)tx_layers[nl])[(m<<1) + 1];
} else {
((int16_t*)tx_precoding[nl])[(sample_offsetF)<<1] = 0;
((int16_t*)tx_precoding[nl])[((sample_offsetF)<<1) + 1] = 0;
}
}
else {
((int16_t*)tx_precoding[nl])[(sample_offsetF)<<1] = ((int16_t *) y)[m<<1];
......@@ -589,7 +645,8 @@ void nr_ue_ulsch_procedures(PHY_VARS_NR_UE *UE,
((int16_t*)tx_precoding[nl])[((sample_offsetF)<<1) + 1]);
#endif
m++;
if (!is_csi_rs)
m++;
} else {
((int16_t*)tx_precoding[nl])[(sample_offsetF)<<1] = 0;
......
......@@ -695,11 +695,12 @@ typedef struct nr_phy_data_tx_s {
//Sidelink Tx action decided by MAC
sl_nr_tx_config_type_enum_t sl_tx_action;
sl_nr_tx_config_psbch_pdu_t psbch_vars;
sl_nr_tx_config_pscch_pssch_psfch_pdu_t nr_sl_pssch_pscch_psfch_pdu;
sl_nr_tx_config_pscch_pssch_pdu_t nr_sl_pssch_pscch_pdu;
uint32_t pscch_Nid;
} nr_phy_data_tx_t;
typedef struct nr_phy_data_s {
bool active;
NR_UE_PDCCH_CONFIG phy_pdcch_config;
NR_UE_DLSCH_t dlsch[2];
......@@ -708,6 +709,7 @@ typedef struct nr_phy_data_s {
sl_nr_rx_config_pscch_pdu_t nr_sl_pscch_pdu;
sl_nr_rx_config_pssch_sci_pdu_t nr_sl_pssch_sci_pdu;
sl_nr_rx_config_pssch_pdu_t nr_sl_pssch_pdu;
sl_nr_tti_csi_rs_pdu_t nr_sl_csi_rs_pdu;
} nr_phy_data_t;
/* this structure is used to pass both UE phy vars and
* proc to the function UE_thread_rxn_txnp4
......
......@@ -132,22 +132,22 @@ typedef struct SL_NR_UE_PSSCH {
int16_t rsrp_dBm_per_RE;
// STATS - CRC Errors observed during PSSCH reception (per HARQ round)
uint16_t rx_errors[8];
uint32_t rx_errors[8];
// STATS - CRC Errors observed during PSSCH SCI2 reception
uint16_t rx_sci2_errors;
uint32_t rx_sci2_errors;
// STATS - Receptions with CRC OK
uint16_t rx_ok;
uint32_t rx_ok;
// STATS - Receptions with CRC OK
uint16_t rx_sci2_ok;
uint32_t rx_sci2_ok;
// STATS - transmissions of PSSCH by the UE
uint16_t num_pssch_tx;
uint32_t num_pssch_tx;
// STATS - transmissions of PSSCH by the UE
uint16_t num_pssch_sci2_tx;
uint32_t num_pssch_sci2_tx;
} SL_NR_UE_PSSCH_t;
typedef struct SL_NR_UE_PSCCH {
......@@ -158,10 +158,10 @@ typedef struct SL_NR_UE_PSCCH {
int16_t rsrp_dBm_per_RE;
// STATS - Receptions with CRC OK
uint16_t rx_ok;
uint32_t rx_ok;
// STATS - transmissions of PSBCH by the UE
uint16_t num_pscch_tx;
uint32_t num_pscch_tx;
} SL_NR_UE_PSCCH_t;
......@@ -173,19 +173,19 @@ typedef struct SL_NR_UE_PSBCH {
int16_t rsrp_dBm_per_RE;
// STATS - CRC Errors observed during PSBCH reception
uint16_t rx_errors;
uint32_t rx_errors;
// STATS - Receptions with CRC OK
uint16_t rx_ok;
uint32_t rx_ok;
// STATS - transmissions of PSBCH by the UE
uint16_t num_psbch_tx;
uint32_t num_psbch_tx;
} SL_NR_UE_PSBCH_t;
typedef struct SL_NR_UE_PSFCH {
// STATS - transmissions of PSFCH by the UE
uint16_t num_psfch_tx;
uint32_t num_psfch_tx;
} SL_NR_UE_PSFCH_t;
typedef struct sl_nr_ue_phy_params {
......
......@@ -890,7 +890,7 @@ int phy_procedures_gNB_uespec_RX(PHY_VARS_gNB *gNB, int frame_rx, int slot_rx)
VCD_SIGNAL_DUMPER_DUMP_FUNCTION_BY_NAME(VCD_SIGNAL_DUMPER_FUNCTIONS_NR_RX_PUSCH, 1);
start_meas(&gNB->rx_pusch_stats);
nr_rx_pusch(gNB, NULL, gNB->common_vars.rxdataF,ULSCH_id, frame_rx, slot_rx, ulsch->harq_pid);
nr_rx_pusch(gNB, NULL, gNB->common_vars.rxdataF, ULSCH_id, frame_rx, slot_rx, ulsch->harq_pid);
NR_gNB_PUSCH *pusch_vars = &gNB->pusch_vars[ULSCH_id];
pusch_vars->ulsch_power_tot = 0;
pusch_vars->ulsch_noise_power_tot = 0;
......
......@@ -685,16 +685,17 @@ int8_t nr_ue_sl_phy_config_request(nr_sl_phy_config_t *phy_config)
int8_t sl_handle_scheduled_response(nr_scheduled_response_t *scheduled_response) {
module_id_t module_id = scheduled_response->module_id;
uint8_t cc_id = scheduled_response->CC_id;
uint32_t slot = scheduled_response->slot;
uint32_t frame = scheduled_response->frame;
const char *sl_rx_action[]={"NONE", "RX_PSBCH", "RX_PSCCH", "RX_SCI2_ON_PSSCH", "RX_SLSCH_ON_PSSCH"};
const char *sl_tx_action[]={"TX_PSBCH", "TX_PSCCH_PSSCH", "TX_PSFCH"};
const char *sl_rx_action[] = {"NONE", "RX_PSBCH", "RX_PSCCH", "RX_SCI2_ON_PSSCH", "RX_SLSCH_ON_PSSCH", "RX_SLSCH_ON_PSSCH_CSI_RS"};
const char *sl_tx_action[] = {"TX_PSBCH", "TX_PSCCH_PSSCH", "TX_PSCCH_PSSCH_PSFCH", "TX_PSCCH_PSSCH_CSI_RS", "TX_PSCCH_PSSCH_PSFCH_CSI_RS"};
NR_UE_CSI_RS *csirs_vars = PHY_vars_UE_g[module_id][cc_id]->csirs_vars[0];
if(scheduled_response->sl_rx_config != NULL) {
sl_nr_rx_config_request_t *sl_rx_config = scheduled_response->sl_rx_config;
nr_phy_data_t *phy_data = (nr_phy_data_t *)scheduled_response->phy_data;
sl_nr_tti_csi_rs_pdu_t *csirs_config_pdu;
AssertFatal(sl_rx_config->number_pdus == SL_NR_RX_CONFIG_LIST_NUM,
"sl_rx_config->number_pdus incorrect\n");
......@@ -712,12 +713,18 @@ int8_t sl_handle_scheduled_response(nr_scheduled_response_t *scheduled_response)
case SL_NR_CONFIG_TYPE_RX_PSSCH_SCI:
phy_data->sl_rx_action = SL_NR_CONFIG_TYPE_RX_PSSCH_SCI;
phy_data->nr_sl_pssch_sci_pdu = sl_rx_config->sl_rx_config_list[0].rx_sci2_config_pdu;
LOG_D(NR_PHY, "Recvd CONFIG_TYPE_RX_PSSCH\n");
LOG_D(NR_PHY, "Recvd CONFIG_TYPE_RX_PSSCH_SCI\n");
break;
case SL_NR_CONFIG_TYPE_RX_PSSCH_SLSCH:
phy_data->sl_rx_action = SL_NR_CONFIG_TYPE_RX_PSSCH_SLSCH;
case SL_NR_CONFIG_TYPE_RX_PSSCH_SLSCH_CSI_RS:
phy_data->sl_rx_action = sl_rx_config->sl_rx_config_list[0].pdu_type;
phy_data->nr_sl_pssch_pdu = sl_rx_config->sl_rx_config_list[0].rx_pssch_config_pdu;
LOG_D(NR_PHY, "Recvd CONFIG_TYPE_RX_PSSCH\n");
LOG_D(NR_PHY, "Recvd %s\n", sl_rx_action[phy_data->sl_rx_action]);
if (phy_data->sl_rx_action == SL_NR_CONFIG_TYPE_RX_PSSCH_SLSCH_CSI_RS) {
csirs_config_pdu = &sl_rx_config->sl_rx_config_list[0].rx_csi_rs_config_pdu;
memcpy((void*)&(csirs_vars->csirs_config_pdu), (void*)csirs_config_pdu, sizeof(sl_nr_tti_csi_rs_pdu_t));
csirs_vars->active = true;
}
break;
default:
AssertFatal(0,"Incorrect sl_rx config req pdutype \n");
......@@ -740,7 +747,7 @@ int8_t sl_handle_scheduled_response(nr_scheduled_response_t *scheduled_response)
case SL_NR_CONFIG_TYPE_TX_PSBCH:
phy_data_tx->sl_tx_action = SL_NR_CONFIG_TYPE_TX_PSBCH;
LOG_D(PHY, "Recvd CONFIG_TYPE_TX_PSBCH\n");
LOG_D(PHY, "Recvd CONFIG_TYPE_%s\n", sl_tx_action[phy_data_tx->sl_tx_action - SL_NR_CONFIG_TYPE_TX_PSBCH]);
*((uint32_t *)phy_data_tx->psbch_vars.psbch_payload) =
*((uint32_t *) sl_tx_config->tx_config_list[0].tx_psbch_config_pdu.psbch_payload);
phy_data_tx->psbch_vars.psbch_tx_power =
......@@ -749,23 +756,30 @@ int8_t sl_handle_scheduled_response(nr_scheduled_response_t *scheduled_response)
sl_tx_config->tx_config_list[0].tx_psbch_config_pdu.tx_slss_id;
break;
case SL_NR_CONFIG_TYPE_TX_PSCCH_PSSCH:
case SL_NR_CONFIG_TYPE_TX_PSCCH_PSSCH_CSI_RS:
case SL_NR_CONFIG_TYPE_TX_PSCCH_PSSCH_PSFCH:
case SL_NR_CONFIG_TYPE_TX_PSCCH_PSSCH_PSFCH_CSI_RS:
phy_data_tx->sl_tx_action = sl_tx_config->tx_config_list[0].pdu_type;
phy_data_tx->nr_sl_pssch_pscch_psfch_pdu = sl_tx_config->tx_config_list[0].tx_pscch_pssch_psfch_config_pdu;
LOG_D(NR_PHY, "sl_handle_scheduled_response: Received CONFIG_TYPE_TX_PSCCH_PSSCH, PSCCH startRB %d, PSCCH numRB %d\n", phy_data_tx->nr_sl_pssch_pscch_psfch_pdu.startrb,phy_data_tx->nr_sl_pssch_pscch_psfch_pdu.pscch_numrbs);
LOG_D(NR_PHY, "format 1A length %d :%llx, format 2x length %d : %llx, PSSCH mcs %d, PSSCH tbslrm %d\n",phy_data_tx->nr_sl_pssch_pscch_psfch_pdu.pscch_sci_payload_len,
(unsigned long long)*phy_data_tx->nr_sl_pssch_pscch_psfch_pdu.pscch_sci_payload,
phy_data_tx->nr_sl_pssch_pscch_psfch_pdu.sci2_payload_len,
(unsigned long long)*phy_data_tx->nr_sl_pssch_pscch_psfch_pdu.sci2_payload,
phy_data_tx->nr_sl_pssch_pscch_psfch_pdu.mcs,
phy_data_tx->nr_sl_pssch_pscch_psfch_pdu.tbslbrm);
if (phy_data_tx->sl_tx_action == SL_NR_CONFIG_TYPE_TX_PSCCH_PSSCH_PSFCH) {
LOG_D(NR_PHY, "Recvd SL_NR_CONFIG_TYPE_TX_PSCCH_PSSCH_PSFCH\n");
phy_data_tx->nr_sl_pssch_pscch_psfch_pdu.psfch_pdu = sl_tx_config->tx_config_list[0].tx_pscch_pssch_psfch_config_pdu.psfch_pdu;
} else {
LOG_D(NR_PHY, "Recvd SL_NR_CONFIG_TYPE_TX_PSCCH_PSSCH\n");
phy_data_tx->nr_sl_pssch_pscch_pdu = sl_tx_config->tx_config_list[0].tx_pscch_pssch_config_pdu;
LOG_D(PHY, "Recvd CONFIG_TYPE_%s in (%d.%d) PSCCH startRB %hhu, PSCCH numRB %hhu\n",
sl_tx_action[phy_data_tx->sl_tx_action - SL_NR_CONFIG_TYPE_TX_PSBCH],
frame, slot,
phy_data_tx->nr_sl_pssch_pscch_pdu.startrb,
phy_data_tx->nr_sl_pssch_pscch_pdu.pscch_numrbs);
LOG_D(NR_PHY, "format 1A length %hu :%llx, format 2x length %hu : %llx, PSSCH mcs %hu, PSSCH tbslrm %u\n",
phy_data_tx->nr_sl_pssch_pscch_pdu.pscch_sci_payload_len,
(unsigned long long)*phy_data_tx->nr_sl_pssch_pscch_pdu.pscch_sci_payload,
phy_data_tx->nr_sl_pssch_pscch_pdu.sci2_payload_len,
(unsigned long long)*phy_data_tx->nr_sl_pssch_pscch_pdu.sci2_payload,
phy_data_tx->nr_sl_pssch_pscch_pdu.mcs,
phy_data_tx->nr_sl_pssch_pscch_pdu.tbslbrm);
if (phy_data_tx->sl_tx_action == SL_NR_CONFIG_TYPE_TX_PSCCH_PSSCH_PSFCH || phy_data_tx->sl_tx_action == SL_NR_CONFIG_TYPE_TX_PSCCH_PSSCH_PSFCH_CSI_RS) {
phy_data_tx->nr_sl_pssch_pscch_pdu.psfch_pdu = sl_tx_config->tx_config_list[0].tx_pscch_pssch_config_pdu.psfch_pdu;
}
break;
if (phy_data_tx->sl_tx_action == SL_NR_CONFIG_TYPE_TX_PSCCH_PSSCH_CSI_RS || phy_data_tx->sl_tx_action == SL_NR_CONFIG_TYPE_TX_PSCCH_PSSCH_PSFCH_CSI_RS) {
phy_data_tx->nr_sl_pssch_pscch_pdu.nr_sl_csi_rs_pdu = sl_tx_config->tx_config_list[0].tx_pscch_pssch_config_pdu.nr_sl_csi_rs_pdu;
}
break;
default:
AssertFatal(0,"Incorrect sl_tx config req pdutype \n");
break;
......
......@@ -23,7 +23,10 @@
#include "PHY/defs_nr_UE.h"
#include <openair1/PHY/TOOLS/phy_scope_interface.h>
#include "openair1/PHY/NR_TRANSPORT/nr_ulsch.h"
#include "openair1/PHY/NR_TRANSPORT/nr_transport_proto.h"
#include "common/utils/LOG/log.h"
#include "common/utils/utils.h"
#include "common/utils/LOG/vcd_signal_dumper.h"
#include "UTIL/OPT/opt.h"
#include "intertask_interface.h"
......@@ -123,13 +126,21 @@ void nr_fill_sl_rx_indication(sl_nr_rx_indication_t *rx_ind,
}
extern int dmrs_pscch_mask[2];
int nr_slsch_procedures(PHY_VARS_NR_UE *ue, int frame_rx, int slot_rx, int SLSCH_id, UE_nr_rxtx_proc_t *proc,nr_phy_data_t *phy_data) {
int nr_slsch_procedures(PHY_VARS_NR_UE *ue, int frame_rx, int slot_rx, int SLSCH_id, UE_nr_rxtx_proc_t *proc, nr_phy_data_t *phy_data, bool is_csi_rs_slot) {
sl_nr_ue_phy_params_t *sl_phy_params = &ue->SL_UE_PHY_PARAMS;
NR_DL_FRAME_PARMS *fp = &sl_phy_params->sl_frame_params;
sl_nr_rx_config_pssch_pdu_t *slsch_pdu = &phy_data->nr_sl_pssch_pdu; //ue->slsch[SLSCH_id].harq_process->slsch_pdu;
sl_nr_rx_config_pssch_sci_pdu_t *pssch_pdu = &phy_data->nr_sl_pssch_sci_pdu; //ue->slsch[SLSCH_id].harq_process->pssch_pdu;
uint8_t freq_density;
uint8_t nr_of_rbs;
if (is_csi_rs_slot) {
freq_density = ue->csirs_vars[0]->csirs_config_pdu.freq_density;
nr_of_rbs = ue->csirs_vars[0]->csirs_config_pdu.nr_of_rbs;
AssertFatal((freq_density == 1) || (nr_of_rbs > 0), "CSI-RS parameters are not properly configured\n");
}
int harq_pid = slsch_pdu->harq_pid;
uint16_t nb_re_dmrs;
uint16_t start_symbol = 1;
......@@ -163,6 +174,8 @@ int nr_slsch_procedures(PHY_VARS_NR_UE *ue, int frame_rx, int slot_rx, int SLSCH
pssch_pdu->mod_order,
pssch_pdu->num_layers);
G -= is_csi_rs_slot ? nr_of_rbs/freq_density*pssch_pdu->mod_order*pssch_pdu->num_layers : 0;
AssertFatal(G>0,"G is 0 : rb_size %u, number_symbols %d, nb_re_dmrs %d, number_dmrs_symbols %d, qam_mod_order %u, nrOfLayer %u\n",
rb_size,
number_symbols,
......@@ -401,6 +414,7 @@ void psbch_pscch_pssch_processing(PHY_VARS_NR_UE *ue,
int nr_slot_rx = proc->nr_slot_rx;
sl_nr_ue_phy_params_t *sl_phy_params = &ue->SL_UE_PHY_PARAMS;
NR_DL_FRAME_PARMS *fp = &sl_phy_params->sl_frame_params;
bool is_csi_rs_slot = false;
//VCD_SIGNAL_DUMPER_DUMP_FUNCTION_BY_NAME(VCD_SIGNAL_DUMPER_FUNCTIONS_PHY_PROCEDURES_UE_RX_SL, VCD_FUNCTION_IN);
start_meas(&sl_phy_params->phy_proc_sl_rx);
......@@ -577,8 +591,8 @@ void psbch_pscch_pssch_processing(PHY_VARS_NR_UE *ue,
nr_ue_pdcch_procedures(ue, proc, 1, pscch_est_size, pscch_dl_ch_estimates, phy_data, 0, rxdataF);
LOG_D(NR_PHY,"returned from nr_ue_pdcch_procedures\n");
}
if (phy_data->sl_rx_action == SL_NR_CONFIG_TYPE_RX_PSSCH_SCI){
if (phy_data->sl_rx_action == SL_NR_CONFIG_TYPE_RX_PSSCH_SCI) {
LOG_D(NR_PHY,"sci2_len = %d\n",phy_data->nr_sl_pssch_sci_pdu.sci2_len);
LOG_D(NR_PHY,"sci2_beta_offset = %d\n",phy_data->nr_sl_pssch_sci_pdu.sci2_beta_offset);
LOG_D(NR_PHY,"sci2_alpha_times_100= %d\n",phy_data->nr_sl_pssch_sci_pdu.sci2_alpha_times_100);
......@@ -630,7 +644,8 @@ void psbch_pscch_pssch_processing(PHY_VARS_NR_UE *ue,
0,
frame_rx,
nr_slot_rx,
0);
0,
&is_csi_rs_slot);
NR_gNB_PUSCH *pssch_vars = &ue->pssch_vars[0];
pssch_vars->ulsch_power_tot = 0;
pssch_vars->ulsch_noise_power_tot = 0;
......@@ -666,7 +681,7 @@ void psbch_pscch_pssch_processing(PHY_VARS_NR_UE *ue,
ue->pssch_thres);
pssch_vars->DTX = 0;
int totalDecode = nr_slsch_procedures(ue, frame_rx, nr_slot_rx, 0, proc,phy_data);
int totalDecode = nr_slsch_procedures(ue, frame_rx, nr_slot_rx, 0, proc, phy_data, is_csi_rs_slot);
}
}
......@@ -687,6 +702,10 @@ int phy_procedures_nrUE_SL_TX(PHY_VARS_NR_UE *ue,
int frame_tx = proc->frame_tx;
int tx_action = 0;
const char *sl_tx_actions[] = {"PSBCH", "PSCCH_PSSCH", "PSCCH_PSSCH_PSFCH", "PSCCH_PSSCH_CSI_RS", "PSCCH_PSSCH_PSFCH_CSI_RS"};
if (phy_data->sl_tx_action == SL_NR_CONFIG_TYPE_TX_PSCCH_PSSCH_CSI_RS || phy_data->sl_tx_action == SL_NR_CONFIG_TYPE_TX_PSCCH_PSSCH_PSFCH_CSI_RS) {
LOG_D(NR_PHY, "Generating %s (%d.%d)\n", sl_tx_actions[phy_data->sl_tx_action - SL_NR_CONFIG_TYPE_TX_PSBCH], frame_tx, slot_tx);
}
sl_nr_ue_phy_params_t *sl_phy_params = &ue->SL_UE_PHY_PARAMS;
NR_DL_FRAME_PARMS *fp = &sl_phy_params->sl_frame_params;
......@@ -712,23 +731,46 @@ int phy_procedures_nrUE_SL_TX(PHY_VARS_NR_UE *ue,
tx_action = 1;
}
else if (phy_data->sl_tx_action == SL_NR_CONFIG_TYPE_TX_PSCCH_PSSCH ||
phy_data->sl_tx_action == SL_NR_CONFIG_TYPE_TX_PSCCH_PSSCH_PSFCH) {
LOG_D(NR_PHY, "Generating PSCCH (%d.%d) \n", frame_tx, slot_tx);
phy_data->pscch_Nid = nr_generate_sci1(ue, txdataF[0], fp, AMP, slot_tx, &phy_data->nr_sl_pssch_pscch_psfch_pdu) &0xFFFF;
phy_data->sl_tx_action == SL_NR_CONFIG_TYPE_TX_PSCCH_PSSCH_CSI_RS ||
phy_data->sl_tx_action == SL_NR_CONFIG_TYPE_TX_PSCCH_PSSCH_PSFCH ||
phy_data->sl_tx_action == SL_NR_CONFIG_TYPE_TX_PSCCH_PSSCH_PSFCH_CSI_RS) {
if (phy_data->sl_tx_action >= SL_NR_CONFIG_TYPE_TX_PSCCH_PSSCH && phy_data->sl_tx_action <= SL_NR_CONFIG_TYPE_TX_PSCCH_PSSCH_PSFCH_CSI_RS)
LOG_D(NR_PHY, "Generating %s (%d.%d)\n", sl_tx_actions[phy_data->sl_tx_action - SL_NR_CONFIG_TYPE_TX_PSBCH], frame_tx, slot_tx);
phy_data->pscch_Nid = nr_generate_sci1(ue, txdataF[0], fp, AMP, slot_tx, &phy_data->nr_sl_pssch_pscch_pdu) &0xFFFF;
nfapi_nr_dl_tti_csi_rs_pdu_rel15_t *csi_params = (nfapi_nr_dl_tti_csi_rs_pdu_rel15_t *)&phy_data->nr_sl_pssch_pscch_pdu.nr_sl_csi_rs_pdu;
csi_params->scramb_id = phy_data->pscch_Nid % (1 << 10);
nr_ue_ulsch_procedures(ue,0,frame_tx,slot_tx,0,phy_data,txdataF);
sl_phy_params->pscch.num_pscch_tx ++;
sl_phy_params->pssch.num_pssch_sci2_tx ++;
sl_phy_params->pssch.num_pssch_tx ++;
if (phy_data->sl_tx_action == SL_NR_CONFIG_TYPE_TX_PSCCH_PSSCH_PSFCH) {
LOG_D(NR_PHY, "Generating PSFCH (%d.%d) \n", frame_tx, slot_tx);
if (phy_data->sl_tx_action == SL_NR_CONFIG_TYPE_TX_PSCCH_PSSCH_CSI_RS ||
phy_data->sl_tx_action == SL_NR_CONFIG_TYPE_TX_PSCCH_PSSCH_PSFCH_CSI_RS) {
uint16_t beta_csirs = get_softmodem_params()->sl_mode ? (uint16_t)(AMP * (ceil(sqrt(phy_data->nr_sl_pssch_pscch_pdu.num_layers / fp->nb_antennas_tx)))) & 0xFFFF : AMP;
LOG_D(NR_PHY, "Tx beta_csirs: %d, scramb_id %i (%d.%d)\n", beta_csirs, csi_params->scramb_id, frame_tx, slot_tx);
nr_generate_csi_rs(fp,
(int32_t **)txdataF,
beta_csirs,
ue->nr_csi_info,
csi_params,
slot_tx,
NULL,
NULL,
NULL,
NULL,
NULL,
NULL,
NULL,
NULL);
}
if (phy_data->sl_tx_action == SL_NR_CONFIG_TYPE_TX_PSCCH_PSSCH_PSFCH ||
phy_data->sl_tx_action == SL_NR_CONFIG_TYPE_TX_PSCCH_PSSCH_PSFCH_CSI_RS) {
nr_generate_psfch0(ue,
txdataF,
fp,
AMP,
slot_tx,
&phy_data->nr_sl_pssch_pscch_psfch_pdu.psfch_pdu);
&phy_data->nr_sl_pssch_pscch_pdu.psfch_pdu);
sl_phy_params->psfch.num_psfch_tx ++;
}
tx_action = 1;
......
......@@ -23,6 +23,36 @@
#include "openair2/LAYER2/NR_MAC_UE/nr_ue_sci.h"
#include "NR_SidelinkPreconfigNR-r16.h"
#include "mac_proto.h"
#include "common/config/config_paramdesc.h"
#include <executables/nr-uesoftmodem.h>
#define SL_CONFIG_STRING_SL_PRECONFIGURATION "SIDELINK_PRECONFIGURATION"
/* Sidelink CSI-RS configuration parameters for MAC*/
#define SL_CONFIG_STRING_SL_CSI_RS_LIST "sl_csi_rs"
#define SL_CONFIG_STRING_SL_CSI_RS_SYMB_L0 "symb_l0"
#define SL_CONFIG_STRING_SL_CSI_RS_CSI_TYPE "csi_type"
#define SL_CONFIG_STRING_SL_CSI_RS_SLOT_OFFSET "slot_offset"
#define SL_CONFIG_STRING_SL_CSI_RS_SLOT_PERIODICITY "slot_periodicity"
#define SL_CONFIG_STRING_SL_CSI_RS_POWER_CONTROL_OFFSET "power_control_offset"
#define SL_CONFIG_STRING_SL_CSI_RS_POWER_CONTROL_OFFSET_SS "power_control_offset_ss"
#define SL_CSI_RS_DESC(sl_csi_info) { \
{SL_CONFIG_STRING_SL_CSI_RS_SYMB_L0,NULL,0,.u8ptr=&sl_csi_info->symb_l0,.defuintval=1,TYPE_UINT8,0}, \
{SL_CONFIG_STRING_SL_CSI_RS_CSI_TYPE,NULL,0,.u8ptr=&sl_csi_info->csi_type,.defuintval=1,TYPE_UINT8,0}, \
{SL_CONFIG_STRING_SL_CSI_RS_POWER_CONTROL_OFFSET,NULL,0,.u8ptr=&sl_csi_info->power_control_offset,.defuintval=1,TYPE_UINT8,0}, \
{SL_CONFIG_STRING_SL_CSI_RS_POWER_CONTROL_OFFSET_SS,NULL,0,.u8ptr=&sl_csi_info->power_control_offset_ss,.defuintval=1,TYPE_UINT8,0}, \
{SL_CONFIG_STRING_SL_CSI_RS_SLOT_OFFSET,NULL,0,.u8ptr=&sl_csi_info->slot_offset,.defuintval=1,TYPE_UINT8,0}, \
{SL_CONFIG_STRING_SL_CSI_RS_SLOT_PERIODICITY,NULL,0,.u8ptr=&sl_csi_info->slot_periodicity,.defuintval=1,TYPE_UINT8,0}}
typedef struct sl_csi_info {
uint8_t symb_l0;
uint8_t csi_type;
uint8_t slot_offset;
uint8_t slot_periodicity;
uint8_t power_control_offset;
uint8_t power_control_offset_ss;
} sl_csi_info_t;
void sl_ue_mac_free(uint8_t module_id)
{
......@@ -155,6 +185,7 @@ static void sl_prepare_phy_config(int module_id,
NR_TDD_UL_DL_ConfigCommon_t *sl_TDD_config)
{
NR_UE_MAC_INST_t *mac = get_mac_inst(module_id);
phycfg->sl_sync_source.sync_source = sync_source;
LOG_I(NR_MAC, "Sidelink CFG: sync source:%d\n", phycfg->sl_sync_source.sync_source);
......@@ -454,6 +485,9 @@ int nr_rrc_mac_config_req_sl_preconfig(module_id_t module_id,
sl_mac->sl_TDD_config = NULL;
}
// Configuring CSI-RS parameters locally at MAC.
nr_sl_params_read_conf(module_id);
nr_sl_phy_config_t *sl_phy_cfg = &sl_mac->sl_phy_config;
sl_phy_cfg->Mod_id = module_id;
sl_phy_cfg->CC_id = 0;
......@@ -618,3 +652,44 @@ void nr_rrc_mac_config_req_sl_mib(module_id_t module_id,
}
}
void nr_sl_params_read_conf(module_id_t module_id) {
NR_UE_MAC_INST_t *mac = get_mac_inst(module_id);
sl_nr_ue_mac_params_t *sl_mac = mac->SL_MAC_PARAMS;
char aprefix[MAX_OPTNAME_SIZE*2 + 8];
sl_csi_info_t *sl_csi_rs_info = (sl_csi_info_t *)malloc(sizeof(sl_csi_info_t));
paramdef_t SL_CRI_RS_INFO[] = SL_CSI_RS_DESC(sl_csi_rs_info);
paramlist_def_t SL_CRI_RS_List = {SL_CONFIG_STRING_SL_CSI_RS_LIST, NULL, 0};
sprintf(aprefix, "%s.[%d]", SL_CONFIG_STRING_SL_PRECONFIGURATION, 0);
config_getlist(&SL_CRI_RS_List, NULL, 0, aprefix);
sprintf(aprefix, "%s.[%i].%s.[%i]", SL_CONFIG_STRING_SL_PRECONFIGURATION, 0, SL_CONFIG_STRING_SL_CSI_RS_LIST, 0);
config_get(SL_CRI_RS_INFO, sizeof(SL_CRI_RS_INFO)/sizeof(paramdef_t), aprefix);
sl_mac->csi_type = sl_csi_rs_info->csi_type;
sl_mac->symb_l0 = sl_csi_rs_info->symb_l0;
sl_mac->power_control_offset = sl_csi_rs_info->power_control_offset;
sl_mac->power_control_offset_ss = sl_csi_rs_info->power_control_offset_ss;
sl_mac->slot_offset = sl_csi_rs_info->slot_offset;
sl_mac->slot_periodicity = sl_csi_rs_info->slot_periodicity;
sl_mac->measurement_bitmap = 0b00011011;
// Based on 38211 Table 7.4.1.5.3-1, for density of 1 and ports 1 & 2 ENUMERATED {noCDM, fd-CDM2}
sl_mac->cdm_type = get_nrUE_params()->nb_antennas_tx == 1 ? 0 : 1;
sl_mac->row = get_nrUE_params()->nb_antennas_tx == 1 ? 2 : 3;
// Only 1 is supported (38211, 8.4.1.5.3) - means CSI-RS transmission in every resource block
sl_mac->freq_density = 1;
sl_mac->freq_domain = 0b000000000001; //bitmap size is dependent upon row size; for row 2 length is 12 bits else 6 bits;
int loc_bw = mac->sl_bwp->sl_BWP_Generic_r16->sl_BWP_r16->locationAndBandwidth;
uint16_t bwp_start = NRRIV2PRBOFFSET(loc_bw, MAX_BWP_SIZE);
// PRB where this CSI resource starts in relation to common resource block #0 (CRB#0) on the common resource block grid.
// Only multiples of 4 are allowed (0, 4, ...)
// INTEGER (0..maxNrofPhysicalResourceBlocks-1)
sl_mac->start_rb = (bwp_start % 4 == 0) ? bwp_start : ((bwp_start >> 2) << 2) + 4;
// Number of PRBs across which this CSI resource spans. The smallest configurable number is the minimum of 24 and the width of the associated BWP
// Only multiples of 4 are allowed.
// INTEGER (24..maxNrofPhysicalResourceBlocksPlus1)
uint16_t max_allowable_num_rbs = (NRRIV2BW(loc_bw, MAX_BWP_SIZE) >> 2) << 2;
sl_mac->nr_of_rbs = min(24, max_allowable_num_rbs);
LOG_D(NR_MAC, "loc_bw %i, start_rb %i, nr_of_rbs %i, max_allowable_num_rbs %i\n", loc_bw, sl_mac->start_rb, sl_mac->nr_of_rbs, max_allowable_num_rbs);
}
\ No newline at end of file
......@@ -142,6 +142,24 @@ typedef struct sl_nr_ue_mac_params {
//or TDD config decoded from SL-MIB
NR_TDD_UL_DL_ConfigCommon_t *sl_TDD_config;
// CSI params configured locally
uint8_t symb_l0;
uint8_t csi_type;
uint8_t power_control_offset;
uint8_t power_control_offset_ss;
uint8_t slot_offset;
uint8_t slot_periodicity;
uint8_t freq_density;
uint8_t subcarrier_spacing;
uint8_t cyclic_prefix;
uint16_t start_rb;
uint16_t nr_of_rbs;
uint8_t row;
uint16_t freq_domain;
uint8_t cdm_type;
uint16_t scramb_id;
uint8_t measurement_bitmap;
//Configured from RRC
uint32_t sl_MaxNumConsecutiveDTX;
uint32_t sl_SSB_PriorityNR;
......
......@@ -459,6 +459,8 @@ void nr_rrc_mac_config_req_sl_mib(module_id_t module_id,
uint16_t rx_slss_id,
uint8_t *sl_mib);
void nr_sl_params_read_conf(module_id_t module_id);
void sl_prepare_psbch_payload(NR_TDD_UL_DL_ConfigCommon_t *TDD_UL_DL_Config,
uint8_t *bits_0_to_7, uint8_t *bits_8_to_11,
uint8_t mu, uint8_t L, uint8_t Y);
......@@ -470,6 +472,10 @@ uint8_t sl_decode_sl_TDD_Config(NR_TDD_UL_DL_ConfigCommon_t *TDD_UL_DL_Config,
uint8_t sl_determine_sci_1a_len(uint16_t *num_subchannels,
NR_SL_ResourcePool_r16_t *rpool,
sidelink_sci_format_1a_fields_t *sci_1a);
void nr_ue_process_mac_sl_pdu(int module_idP,
sl_nr_rx_indication_t *rx_ind,
int pdu_id);
/** \brief This function checks nr UE slot for Sidelink direction : Sidelink
* @param cfg : Sidelink config request
* @param nr_frame : frame number
......@@ -499,13 +505,38 @@ bool nr_schedule_slsch(NR_UE_MAC_INST_t *mac, int frameP, int slotP, nr_sci_pdu_
nr_sci_format_t format2,
uint16_t *slsch_pdu_length);
uint8_t nr_ue_sl_psbch_scheduler(nr_sidelink_indication_t *sl_ind,
sl_nr_ue_mac_params_t *sl_mac_params,
sl_nr_rx_config_request_t *rx_config,
sl_nr_tx_config_request_t *tx_config,
uint8_t *config_type);
void nr_ue_sl_pscch_rx_scheduler(nr_sidelink_indication_t *sl_ind,
const NR_SL_BWP_ConfigCommon_r16_t *sl_bwp,
const NR_SL_ResourcePool_r16_t *sl_res_pool,
sl_nr_rx_config_request_t *rx_config,
uint8_t *config_type);
void nr_ue_sl_csi_rs_scheduler(NR_UE_MAC_INST_t *mac,
uint8_t scs,
const NR_SL_BWP_ConfigCommon_r16_t *sl_bwp,
sl_nr_tx_config_request_t *tx_config,
sl_nr_rx_config_request_t *rx_config,
uint8_t *config_type);
void fill_csi_rs_pdu(sl_nr_ue_mac_params_t *sl_mac,
sl_nr_tti_csi_rs_pdu_t *csi_rs_pdu,
const NR_SL_BWP_ConfigCommon_r16_t *sl_bwp,
uint8_t scs);
void nr_ue_sl_psfch_scheduler(NR_UE_MAC_INST_t *mac,
long psfch_period,
nr_sidelink_indication_t *sl_ind,
const NR_SL_BWP_ConfigCommon_r16_t *sl_bwp,
const NR_SL_ResourcePool_r16_t *sl_res_pool,
sl_nr_tx_config_request_t *tx_config,
uint8_t *config_type);
uint8_t *config_type,
bool is_csi_rs_sent);
void config_pscch_pdu_rx(sl_nr_rx_config_pscch_pdu_t *nr_sl_pscch_pdu,
const NR_SL_BWP_ConfigCommon_r16_t *sl_bwp,
......@@ -519,7 +550,22 @@ int config_pssch_sci_pdu_rx(sl_nr_rx_config_pssch_sci_pdu_t *nr_sl_pssch_sci_pdu
const NR_SL_BWP_ConfigCommon_r16_t *sl_bwp,
const NR_SL_ResourcePool_r16_t *sl_res_pool);
void fill_pssch_pscch_pdu(sl_nr_tx_config_pscch_pssch_psfch_pdu_t *nr_sl_pssch_pscch_pdu,
int nr_ue_process_sci2_indication_pdu(NR_UE_MAC_INST_t *mac,
module_id_t mod_id,
int cc_id,
frame_t frame,
int slot,
sl_nr_sci_indication_pdu_t *sci,
void *phy_data);
void extract_pssch_sci_pdu(uint64_t *sci2_payload,
int len,
const NR_SL_BWP_ConfigCommon_r16_t *sl_bwp,
const NR_SL_ResourcePool_r16_t *sl_res_pool,
nr_sci_pdu_t *sci_pdu);
void fill_pssch_pscch_pdu(sl_nr_ue_mac_params_t *sl_mac_params,
sl_nr_tx_config_pscch_pssch_pdu_t *nr_sl_pssch_pscch_pdu,
const NR_SL_BWP_ConfigCommon_r16_t *sl_bwp,
const NR_SL_ResourcePool_r16_t *sl_res_pool,
nr_sci_pdu_t *sci_pdu,
......@@ -531,5 +577,8 @@ void fill_pssch_pscch_pdu(sl_nr_tx_config_pscch_pssch_psfch_pdu_t *nr_sl_pssch_p
void fill_psfch_pdu(sl_nr_tx_config_psfch_pdu_t *mac_psfch_pdu,
sl_nr_tx_config_request_t *tx_config,
int num_psfch_symbols);
int get_nRECSI_RS(uint8_t freq_density,
uint16_t nr_of_rbs);
#endif
/** @}*/
......@@ -43,7 +43,11 @@
bool nr_schedule_slsch(NR_UE_MAC_INST_t *mac, int frameP,int slotP, nr_sci_pdu_t *sci_pdu,nr_sci_pdu_t *sci2_pdu,uint8_t *slsch_pdu,nr_sci_format_t format2, uint16_t *slsch_pdu_length_max) {
mac_rlc_status_resp_t rlc_status = mac_rlc_status_ind(0, mac->src_id, 0,frameP,slotP,ENB_FLAG_NO,MBMS_FLAG_NO, 4, 0, 0);
mac_rlc_status_resp_t rlc_status = mac_rlc_status_ind(0, mac->src_id, 0, frameP, slotP, ENB_FLAG_NO, MBMS_FLAG_NO, 4, 0, 0);
sl_nr_ue_mac_params_t *sl_mac = mac->SL_MAC_PARAMS;
uint8_t mu = sl_mac->sl_phy_config.sl_config_req.sl_bwp_config.sl_scs;
uint8_t slots_per_frame = nr_slots_per_frame[mu];
uint8_t psfch_period = 0;
if (mac->sl_tx_res_pool->sl_PSFCH_Config_r16)
......@@ -69,28 +73,29 @@ bool nr_schedule_slsch(NR_UE_MAC_INST_t *mac, int frameP,int slotP, nr_sci_pdu_t
// Fill SCI2A
sci2_pdu->harq_pid = 0;
sci2_pdu->ndi = (1-sci2_pdu->ndi)&1;
sci2_pdu->rv_index=0;
sci2_pdu->ndi = (1-sci2_pdu->ndi)&1;
sci2_pdu->rv_index = 0;
sci2_pdu->source_id = get_softmodem_params()->node_number;
sci2_pdu->dest_id=0xabcd;
sci2_pdu->harq_feedback = psfch_period ? 1 : 0;
sci2_pdu->cast_type = 1;
if (format2==NR_SL_SCI_FORMAT_2C || format2==NR_SL_SCI_FORMAT_2A)
sci2_pdu->csi_req=1;
if (format2==NR_SL_SCI_FORMAT_2B)
sci2_pdu->zone_id=0;
if (format2 == NR_SL_SCI_FORMAT_2C || format2 == NR_SL_SCI_FORMAT_2A) {
sci2_pdu->csi_req = ((slots_per_frame * frameP + slotP - sl_mac->slot_offset) % sl_mac->slot_periodicity) && (!mac->SL_MAC_PARAMS->sl_CSI_Acquisition) ? 0 : 1;
}
if (format2 == NR_SL_SCI_FORMAT_2B)
sci2_pdu->zone_id = 0;
// Fill in for R17: communication_range
sci2_pdu->communication_range.val = 0;
if (format2==NR_SL_SCI_FORMAT_2C) {
if (format2 == NR_SL_SCI_FORMAT_2C) {
sci2_pdu->providing_req_ind = 0;
// Fill in for R17 : resource combinations
sci2_pdu->resource_combinations.val = 0;
sci2_pdu->first_resource_location = 0;
// Fill in for R17 : reference_slot_location
sci2_pdu->reference_slot_location.val = 0;
sci2_pdu->resource_set_type=0;
sci2_pdu->resource_set_type = 0;
// Fill in for R17 : lowest_subchannel_indices
sci2_pdu->lowest_subchannel_indices.val=0;
sci2_pdu->lowest_subchannel_indices.val = 0;
}
// Set SLSCH
......
......@@ -40,10 +40,10 @@ typedef struct psfch_params {
} psfch_params_t;
void print_prb_set_allocation(psfch_params_t *psfch_params, uint8_t psfch_period, uint8_t num_subchannels) {
LOG_D(NR_PHY, "PSSCH Slot mod PSFCH period | Subchannel | Start PRB | End PRB\n");
LOG_D(NR_PHY, "PSSCH Slot mod PSFCH period | Subchannel | Start PRB | End PRB\n");
for (int i = 0; i < psfch_period; i++) {
for (int j = 0; j < num_subchannels; j++) {
LOG_D(NR_PHY, "%d | %d | %d | %d\n", i, j, psfch_params->prbs_sets->start_prb[i][j], psfch_params->prbs_sets->end_prb[i][j]);
LOG_D(NR_PHY, "\t\t %d \t\t|\t%d\t|\t%d\t| \t %d\n", i, j, psfch_params->prbs_sets->start_prb[i][j], psfch_params->prbs_sets->end_prb[i][j]);
}
}
}
......@@ -696,7 +696,17 @@ void nr_ue_process_mac_sl_pdu(int module_idP,
harq_proc->feedback_frame = sched_frame;
harq_proc->is_active = true;
LOG_D(NR_MAC, "harq pid: %d:%d psfch_period %ld, delta_slots %d, feedback frame:slot %d:%d, frame:slot %d:%d, time_gap %d, harq feedback %d\n", harq_pid, mac->sl_info.list[0]->UE_sched_ctrl.sl_harq_processes[harq_pid].is_active, psfch_period, delta_slots, harq_proc->feedback_frame, harq_proc->feedback_slot, frame, slot, psfch_min_time_gap, mac->sci_pdu_rx.harq_feedback);
LOG_D(NR_MAC, "harq pid: %d:%d psfch_period %ld, delta_slots %d, feedback frame:slot %d:%d, frame:slot %d:%d, time_gap %d, harq feedback %d\n",
harq_pid,
mac->sl_info.list[0]->UE_sched_ctrl.sl_harq_processes[harq_pid].is_active,
psfch_period,
delta_slots,
harq_proc->feedback_frame,
harq_proc->feedback_slot,
frame,
slot,
psfch_min_time_gap,
mac->sci_pdu_rx.harq_feedback);
uint8_t ack_nack = (rx_ind->rx_indication_body + pdu_id)->rx_slsch_pdu.ack_nack;
mac->sl_tx_config_psfch_pdu[harq_pid] = calloc(1, sizeof(sl_nr_tx_config_psfch_pdu_t));
......
This diff is collapsed.
......@@ -36,6 +36,7 @@
/* exe */
#include "executables/nr-softmodem.h"
#include "executables/nr-uesoftmodem.h"
/* RRC*/
#include "RRC/NR_UE/rrc_proto.h"
......@@ -49,7 +50,7 @@
#include "NR_MAC_COMMON/nr_mac_extern.h"
#include "common/utils/nr/nr_common.h"
#include "openair2/NR_UE_PHY_INTERFACE/NR_Packet_Drop.h"
#include "openair1/PHY/phy_extern_nr_ue.h"
/* PHY */
#include "executables/softmodem-common.h"
#include "openair1/PHY/defs_nr_UE.h"
......@@ -194,7 +195,17 @@ int get_nREDMRS(const NR_SL_ResourcePool_r16_t *sl_res_pool) {
return(nREDMRS/cnt);
}
void fill_pssch_pscch_pdu(sl_nr_tx_config_pscch_pssch_psfch_pdu_t *nr_sl_pssch_pscch_pdu,
int get_nRECSI_RS(uint8_t freq_density,
uint16_t nr_of_rbs) {
AssertFatal(freq_density > 0, "freq_density must be greater than 1\n");
uint8_t nr_rbs_w_csi_rs = nr_of_rbs / freq_density;
// Actually, kprime + 1 sub-carriers are used by csi-rs. kprime can be 0 or 1 but nb_antennas_tx can be greater than 2.
uint8_t subcarriers_used = get_nrUE_params()->nb_antennas_tx > 2 ? 2 : get_nrUE_params()->nb_antennas_tx;
return nr_rbs_w_csi_rs * subcarriers_used;
}
void fill_pssch_pscch_pdu(sl_nr_ue_mac_params_t *sl_mac_params,
sl_nr_tx_config_pscch_pssch_pdu_t *nr_sl_pssch_pscch_pdu,
const NR_SL_BWP_ConfigCommon_r16_t *sl_bwp,
const NR_SL_ResourcePool_r16_t *sl_res_pool,
nr_sci_pdu_t *sci_pdu,
......@@ -332,7 +343,8 @@ void fill_pssch_pscch_pdu(sl_nr_tx_config_pscch_pssch_psfch_pdu_t *nr_sl_pssch_p
nr_sl_pssch_pscch_pdu->mcs=sci_pdu->mcs;
int nohPRB = (sl_res_pool->sl_X_Overhead_r16) ? 3*(*sl_res_pool->sl_X_Overhead_r16) : 0;
int nREDMRS = get_nREDMRS(sl_res_pool);
int N_REprime = 12*nr_sl_pssch_pscch_pdu->pssch_numsym - nohPRB - nREDMRS;
int nrRECSI_RS= sci2_pdu->csi_req ? get_nRECSI_RS(sl_mac_params->freq_density, sl_mac_params->nr_of_rbs) : 0;
int N_REprime = 12*nr_sl_pssch_pscch_pdu->pssch_numsym - nohPRB - nREDMRS - nrRECSI_RS;
int N_REsci1 = 12*nr_sl_pssch_pscch_pdu->pscch_numrbs*nr_sl_pssch_pscch_pdu->pscch_numsym;
AssertFatal(*sl_res_pool->sl_PSSCH_Config_r16->choice.setup->sl_Scaling_r16 < 4, "Illegal index %d to alpha table\n",(int)*sl_res_pool->sl_PSSCH_Config_r16->choice.setup->sl_Scaling_r16);
int N_REsci2 = get_NREsci2(nr_sl_pssch_pscch_pdu->sci2_alpha_times_100,
......@@ -632,9 +644,10 @@ int nr_ue_process_sci1_indication_pdu(NR_UE_MAC_INST_t *mac,module_id_t mod_id,f
void config_pssch_slsch_pdu_rx(sl_nr_rx_config_pssch_pdu_t *nr_sl_pssch_pdu,
nr_sci_pdu_t *sci_pdu,
const NR_SL_BWP_ConfigCommon_r16_t *sl_bwp,
const NR_SL_ResourcePool_r16_t *sl_res_pool){
nr_sci_pdu_t *sci_pdu,
const NR_SL_BWP_ConfigCommon_r16_t *sl_bwp,
const NR_SL_ResourcePool_r16_t *sl_res_pool,
sl_nr_ue_mac_params_t *sl_mac_params) {
nr_sl_pssch_pdu->target_coderate = nr_get_code_rate_ul(sci_pdu->mcs,sci_pdu->additional_mcs.val);
......@@ -663,9 +676,11 @@ void config_pssch_slsch_pdu_rx(sl_nr_rx_config_pssch_pdu_t *nr_sl_pssch_pdu,
int subchannel_size=subch_to_rb[*sl_res_pool->sl_SubchannelSize_r16];
int nohPRB = (sl_res_pool->sl_X_Overhead_r16) ? 3*(*sl_res_pool->sl_X_Overhead_r16) : 0;
int nREDMRS = get_nREDMRS(sl_res_pool);
int nrRECSI_RS= sci_pdu->csi_req ? get_nRECSI_RS(sl_mac_params->freq_density, sl_mac_params->nr_of_rbs) : 0;
LOG_D(NR_MAC, "nrRECSI_RS %d\n", nrRECSI_RS);
int pscch_numsym = pscch_tda[*sl_res_pool->sl_PSCCH_Config_r16->choice.setup->sl_TimeResourcePSCCH_r16];
int pscch_numrbs = pscch_rb_table[*sl_res_pool->sl_PSCCH_Config_r16->choice.setup->sl_FreqResourcePSCCH_r16];
int N_REprime = 12*pssch_numsym - nohPRB - nREDMRS;
int N_REprime = 12*pssch_numsym - nohPRB - nREDMRS - nrRECSI_RS;
int N_REsci1 = 12*pscch_numrbs*pscch_numsym;
AssertFatal(*sl_res_pool->sl_PSSCH_Config_r16->choice.setup->sl_Scaling_r16 < 4, "Illegal index %d to alpha table\n",(int)*sl_res_pool->sl_PSSCH_Config_r16->choice.setup->sl_Scaling_r16);
int sci2_beta_offset = *sl_res_pool->sl_PSSCH_Config_r16->choice.setup->sl_BetaOffsets2ndSCI_r16->list.array[sci_pdu->beta_offset_indicator];
......@@ -786,9 +801,10 @@ int config_pssch_sci_pdu_rx(sl_nr_rx_config_pssch_sci_pdu_t *nr_sl_pssch_sci_pdu
}
int nr_ue_process_sci2_indication_pdu(NR_UE_MAC_INST_t *mac,module_id_t mod_id,frame_t frame, int slot, sl_nr_sci_indication_pdu_t *sci,void *phy_data) {
int nr_ue_process_sci2_indication_pdu(NR_UE_MAC_INST_t *mac, module_id_t mod_id, int cc_id, frame_t frame, int slot, sl_nr_sci_indication_pdu_t *sci, void *phy_data) {
nr_sci_pdu_t *sci_pdu = &mac->sci_pdu_rx; //&mac->def_sci_pdu[slot][sci->sci_format_type];
sl_nr_ue_mac_params_t *sl_mac_params = mac->SL_MAC_PARAMS;
const NR_SL_BWP_ConfigCommon_r16_t *sl_bwp = mac->sl_bwp;
const NR_SL_ResourcePool_r16_t *sl_res_pool = mac->sl_rx_res_pool;
LOG_D(NR_MAC,"Received sci indication (sci format %d, Nid %x, subChannelIndex %d, payloadSize %d,payload %llx)\n",
......@@ -803,10 +819,16 @@ int nr_ue_process_sci2_indication_pdu(NR_UE_MAC_INST_t *mac,module_id_t mod_id,f
rx_config.sfn = frame;
rx_config.slot = slot;
config_pssch_slsch_pdu_rx(&rx_config.sl_rx_config_list[0].rx_pssch_config_pdu,
sci_pdu,
sl_bwp,
sl_res_pool);
sci_pdu,
sl_bwp,
sl_res_pool,
sl_mac_params);
rx_config.sl_rx_config_list[0].pdu_type = SL_NR_CONFIG_TYPE_RX_PSSCH_SLSCH;
if (sci_pdu->csi_req) {
sl_nr_phy_config_request_t *sl_cfg = &sl_mac_params->sl_phy_config.sl_config_req;
uint8_t mu = sl_cfg->sl_bwp_config.sl_scs;
nr_ue_sl_csi_rs_scheduler(mac, mu, mac->sl_bwp, NULL, &rx_config, NULL);
}
nr_scheduled_response_t scheduled_response;
memset(&scheduled_response,0, sizeof(nr_scheduled_response_t));
......@@ -817,10 +839,10 @@ int nr_ue_process_sci2_indication_pdu(NR_UE_MAC_INST_t *mac,module_id_t mod_id,f
mac->if_module->scheduled_response(&scheduled_response);
return 1;
}
extract_pssch_sci_pdu(uint64_t *sci2_payload, int len,
const NR_SL_BWP_ConfigCommon_r16_t *sl_bwp,
const NR_SL_ResourcePool_r16_t *sl_res_pool,
nr_sci_pdu_t *sci_pdu) {
void extract_pssch_sci_pdu(uint64_t *sci2_payload, int len,
const NR_SL_BWP_ConfigCommon_r16_t *sl_bwp,
const NR_SL_ResourcePool_r16_t *sl_res_pool,
nr_sci_pdu_t *sci_pdu) {
int pos=0,fsize;
int sci2_size = nr_sci_size(sl_res_pool,sci_pdu,NR_SL_SCI_FORMAT_2A);
AssertFatal(sci2_size == len,"sci2a size %d is not the same sci_indication %d\n",sci2_size,len);
......
......@@ -1456,11 +1456,11 @@ void handle_sl_sci1a(module_id_t module_id,uint32_t frame, uint32_t slot, sl_nr_
nr_ue_process_sci1_indication_pdu(mac,module_id,frame,slot,sci,phy_data);
}
void handle_sl_sci2(module_id_t module_id,uint32_t frame, uint32_t slot, sl_nr_sci_indication_pdu_t *const sci,void *phy_data) {
void handle_sl_sci2(module_id_t module_id, int cc_id, uint32_t frame, uint32_t slot, sl_nr_sci_indication_pdu_t *const sci, void *phy_data) {
NR_UE_MAC_INST_t *mac = get_mac_inst(module_id);
nr_ue_process_sci2_indication_pdu(mac,module_id,frame,slot,sci,phy_data);
nr_ue_process_sci2_indication_pdu(mac, module_id, cc_id, frame, slot, sci, phy_data);
}
/*
......@@ -1515,7 +1515,7 @@ void sl_nr_process_rx_ind(uint16_t mod_id,
/* Process SCI indication from PHY */
void sl_nr_process_sci_ind(uint16_t module_id, uint32_t frame, uint32_t slot, sl_nr_ue_mac_params_t *sl_mac, sl_nr_sci_indication_t *sci_ind, void *phy_data) {
void sl_nr_process_sci_ind(uint16_t module_id, int cc_id, uint32_t frame, uint32_t slot, sl_nr_ue_mac_params_t *sl_mac, sl_nr_sci_indication_t *sci_ind, void *phy_data) {
uint8_t num_SCIs = sci_ind->number_of_SCIs;
......@@ -1529,7 +1529,7 @@ void sl_nr_process_sci_ind(uint16_t module_id, uint32_t frame, uint32_t slot, sl
break;
case SL_SCI_FORMAT_2_ON_PSSCH:
LOG_D(NR_MAC,"%s%d.%d Received PSSCH PDU %d/%d PSSCH RSRP %d, length %d, payload %llx\n", KBLU,sci_ind->sfn,sci_ind->slot,1+idx,num_SCIs,sci_ind->sci_pdu[idx].pscch_rsrp,sci_ind->sci_pdu[idx].sci_payloadlen,*(unsigned long long*)sci_ind->sci_pdu[idx].sci_payloadBits);
handle_sl_sci2(module_id,frame,slot,&sci_ind->sci_pdu[idx],phy_data);
handle_sl_sci2(module_id, cc_id, frame, slot, &sci_ind->sci_pdu[idx], phy_data);
break;
default:
AssertFatal(1==0,"Unhandled or unknown sci format %d\n",sci_ind->sci_pdu[idx].sci_format_type);
......@@ -1549,6 +1549,7 @@ int nr_ue_sl_indication(nr_sidelink_indication_t *sl_indication)
//NR_UE_L2_STATE_t ret;
module_id_t module_id = sl_indication->module_id;
int cc_id = sl_indication->cc_id;
NR_UE_MAC_INST_t *mac = get_mac_inst(module_id);
uint16_t slot = sl_indication->slot_rx;
......@@ -1559,7 +1560,7 @@ int nr_ue_sl_indication(nr_sidelink_indication_t *sl_indication)
if (sl_indication->rx_ind) {
sl_nr_process_rx_ind(module_id, frame, slot, sl_mac, sl_indication->rx_ind);
} if (sl_indication->sci_ind) {
sl_nr_process_sci_ind(module_id, frame, slot, sl_mac, sl_indication->sci_ind,sl_indication->phy_data);
sl_nr_process_sci_ind(module_id, cc_id, frame, slot, sl_mac, sl_indication->sci_ind, sl_indication->phy_data);
} else {
nr_ue_sidelink_scheduler(sl_indication);
}
......
......@@ -498,7 +498,7 @@ NR_SL_PreconfigurationNR_r16_t *prepare_NR_SL_PRECONFIGURATION(uint16_t num_tx_p
sl_preconfig->sl_UE_SelectedPreConfig_r16 = NULL;
// indicates if CSI reporting supported in SL unicast.
sl_preconfig->sl_CSI_Acquisition_r16 = NULL;
sl_preconfig->sl_CSI_Acquisition_r16 = calloc(1, sizeof(*sl_preconfig->sl_CSI_Acquisition_r16));
// ROHC profiles for NR SL
sl_preconfig->sl_RoHC_Profiles_r16 = NULL;
......
......@@ -6,7 +6,17 @@ SIDELINK_PRECONFIGURATION = (
sl_nrofDownlinkSymbols = 10;
sl_nrofUplinkSlots = 8;
sl_nrofUplinkSymbols = 4;
sl_csi_rs = (
{
symb_l0 = 4;
# csi_type 2 is not supported 38211, 8.4.1.5.3
csi_type = 1;
power_control_offset = 1;
power_control_offset_ss = 1;
slot_offset = 0;
slot_periodicity = 4;
}
);
sl_FrequencyCommonConfig = (
{
sl_offstToCarrier = 0;
......
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