Commit f55afa40 authored by Sakthivel Velumani's avatar Sakthivel Velumani

Proc Tx: Lets wait for Proc Rx to get ACK/NACK

(only on slots that carry ACK/NACK)
parent fc2e2538
...@@ -565,6 +565,21 @@ void processSlotTX(void *arg) { ...@@ -565,6 +565,21 @@ void processSlotTX(void *arg) {
LOG_D(PHY,"%d.%d => slot type %d\n", proc->frame_tx, proc->nr_slot_tx, proc->tx_slot_type); LOG_D(PHY,"%d.%d => slot type %d\n", proc->frame_tx, proc->nr_slot_tx, proc->tx_slot_type);
if (proc->tx_slot_type == NR_UPLINK_SLOT || proc->tx_slot_type == NR_MIXED_SLOT){ if (proc->tx_slot_type == NR_UPLINK_SLOT || proc->tx_slot_type == NR_MIXED_SLOT){
// find how many slots to wait for
int num_wait_slots = 0;
while(true) {
notifiedFIFO_elt_t *res = pollNotifiedFIFO(UE->tx_wait_ind_fifo[proc->nr_slot_tx]);
if (res == NULL) break;
num_wait_slots++;
delNotifiedFIFO_elt(res);
}
// then wait for rx slots to send indication
for(int i=0; i < num_wait_slots; i++) {
notifiedFIFO_elt_t *res = pullNotifiedFIFO(UE->tx_resume_ind_fifo[proc->nr_slot_tx]);
delNotifiedFIFO_elt(res);
}
// trigger L2 to run ue_scheduler thru IF module // trigger L2 to run ue_scheduler thru IF module
// [TODO] mapping right after NR initial sync // [TODO] mapping right after NR initial sync
if(UE->if_inst != NULL && UE->if_inst->ul_indication != NULL) { if(UE->if_inst != NULL && UE->if_inst->ul_indication != NULL) {
...@@ -770,6 +785,14 @@ void *UE_thread(void *arg) { ...@@ -770,6 +785,14 @@ void *UE_thread(void *arg) {
int absolute_slot=0, decoded_frame_rx=INT_MAX, trashed_frames=0; int absolute_slot=0, decoded_frame_rx=INT_MAX, trashed_frames=0;
initNotifiedFIFO(&UE->phy_config_ind); initNotifiedFIFO(&UE->phy_config_ind);
int num_ind_fifo = nb_slot_frame;
for(int i=0; i < num_ind_fifo; i++) {
UE->tx_wait_ind_fifo[i] = malloc(sizeof(*UE->tx_wait_ind_fifo[i]));
UE->tx_resume_ind_fifo[i] = malloc(sizeof(*UE->tx_resume_ind_fifo[i]));
initNotifiedFIFO(UE->tx_wait_ind_fifo[i]);
initNotifiedFIFO(UE->tx_resume_ind_fifo[i]);
}
while (!oai_exit) { while (!oai_exit) {
if (UE->lost_sync) { if (UE->lost_sync) {
UE->is_synchronized = 0; UE->is_synchronized = 0;
...@@ -945,7 +968,7 @@ void *UE_thread(void *arg) { ...@@ -945,7 +968,7 @@ void *UE_thread(void *arg) {
if (curMsg.proc.decoded_frame_rx != -1) if (curMsg.proc.decoded_frame_rx != -1)
decoded_frame_rx=(((mac->mib->systemFrameNumber.buf[0] >> mac->mib->systemFrameNumber.bits_unused)<<4) | curMsg.proc.decoded_frame_rx); decoded_frame_rx=(((mac->mib->systemFrameNumber.buf[0] >> mac->mib->systemFrameNumber.bits_unused)<<4) | curMsg.proc.decoded_frame_rx);
else else
decoded_frame_rx=-1; decoded_frame_rx=-1;
if (decoded_frame_rx>0 && decoded_frame_rx != curMsg.proc.frame_rx) if (decoded_frame_rx>0 && decoded_frame_rx != curMsg.proc.frame_rx)
LOG_E(PHY,"Decoded frame index (%d) is not compatible with current context (%d), UE should go back to synch mode\n", LOG_E(PHY,"Decoded frame index (%d) is not compatible with current context (%d), UE should go back to synch mode\n",
......
...@@ -481,6 +481,7 @@ typedef struct { ...@@ -481,6 +481,7 @@ typedef struct {
uint8_t nscid; uint8_t nscid;
uint16_t dlDmrsScramblingId; uint16_t dlDmrsScramblingId;
uint16_t pduBitmap; uint16_t pduBitmap;
uint32_t k1_feedback;
} fapi_nr_dl_config_dlsch_pdu_rel15_t; } fapi_nr_dl_config_dlsch_pdu_rel15_t;
typedef struct { typedef struct {
......
...@@ -653,6 +653,8 @@ typedef struct { ...@@ -653,6 +653,8 @@ typedef struct {
void *phy_sim_pdsch_dl_ch_estimates; void *phy_sim_pdsch_dl_ch_estimates;
void *phy_sim_pdsch_dl_ch_estimates_ext; void *phy_sim_pdsch_dl_ch_estimates_ext;
notifiedFIFO_t phy_config_ind; notifiedFIFO_t phy_config_ind;
notifiedFIFO_t *tx_wait_ind_fifo[NR_MAX_SLOTS_PER_FRAME];
notifiedFIFO_t *tx_resume_ind_fifo[NR_MAX_SLOTS_PER_FRAME];
} PHY_VARS_NR_UE; } PHY_VARS_NR_UE;
typedef struct nr_phy_data_tx_s { typedef struct nr_phy_data_tx_s {
......
...@@ -696,6 +696,15 @@ int nr_ue_pdsch_procedures(PHY_VARS_NR_UE *ue, ...@@ -696,6 +696,15 @@ int nr_ue_pdsch_procedures(PHY_VARS_NR_UE *ue,
return 0; return 0;
} }
static void send_slot_ind(notifiedFIFO_t *nf, int slot) {
if (nf) {
notifiedFIFO_elt_t *newElt = newNotifiedFIFO_elt(sizeof(int), 0, NULL, NULL);
int *msgData = (int *) NotifiedFifoData(newElt);
*msgData = slot;
pushNotifiedFIFO(nf, newElt);
}
}
bool nr_ue_dlsch_procedures(PHY_VARS_NR_UE *ue, bool nr_ue_dlsch_procedures(PHY_VARS_NR_UE *ue,
UE_nr_rxtx_proc_t *proc, UE_nr_rxtx_proc_t *proc,
NR_UE_DLSCH_t dlsch[2], NR_UE_DLSCH_t dlsch[2],
...@@ -739,8 +748,11 @@ bool nr_ue_dlsch_procedures(PHY_VARS_NR_UE *ue, ...@@ -739,8 +748,11 @@ bool nr_ue_dlsch_procedures(PHY_VARS_NR_UE *ue,
LOG_D(PHY,"AbsSubframe %d.%d Start LDPC Decoder for CW1 [harq_pid %d] ? %d \n", frame_rx%1024, nr_slot_rx, harq_pid, is_cw1_active); LOG_D(PHY,"AbsSubframe %d.%d Start LDPC Decoder for CW1 [harq_pid %d] ? %d \n", frame_rx%1024, nr_slot_rx, harq_pid, is_cw1_active);
// exit dlsch procedures as there are no active dlsch // exit dlsch procedures as there are no active dlsch
if (is_cw0_active != ACTIVE && is_cw1_active != ACTIVE) if (is_cw0_active != ACTIVE && is_cw1_active != ACTIVE) {
// don't wait anymore
send_slot_ind(ue->tx_resume_ind_fifo[(proc->nr_slot_rx + dlsch[0].dlsch_config.k1_feedback) % ue->frame_parms.slots_per_frame], proc->nr_slot_rx);
return false; return false;
}
// start ldpc decode for CW 0 // start ldpc decode for CW 0
dl_harq0->G = nr_get_G(dlsch[0].dlsch_config.number_rbs, dl_harq0->G = nr_get_G(dlsch[0].dlsch_config.number_rbs,
...@@ -856,6 +868,8 @@ bool nr_ue_dlsch_procedures(PHY_VARS_NR_UE *ue, ...@@ -856,6 +868,8 @@ bool nr_ue_dlsch_procedures(PHY_VARS_NR_UE *ue,
if (ue->if_inst && ue->if_inst->dl_indication) { if (ue->if_inst && ue->if_inst->dl_indication) {
ue->if_inst->dl_indication(&dl_indication, ul_time_alignment); ue->if_inst->dl_indication(&dl_indication, ul_time_alignment);
} }
// DLSCH decoding finished! don't wait anymore
send_slot_ind(ue->tx_resume_ind_fifo[(proc->nr_slot_rx + dlsch[0].dlsch_config.k1_feedback) % ue->frame_parms.slots_per_frame], proc->nr_slot_rx);
if (ue->mac_enabled == 1) { // TODO: move this from PHY to MAC layer! if (ue->mac_enabled == 1) { // TODO: move this from PHY to MAC layer!
...@@ -989,7 +1003,6 @@ bool nr_ue_dlsch_procedures(PHY_VARS_NR_UE *ue, ...@@ -989,7 +1003,6 @@ bool nr_ue_dlsch_procedures(PHY_VARS_NR_UE *ue,
return dec; return dec;
} }
int phy_procedures_nrUE_RX(PHY_VARS_NR_UE *ue, int phy_procedures_nrUE_RX(PHY_VARS_NR_UE *ue,
UE_nr_rxtx_proc_t *proc, UE_nr_rxtx_proc_t *proc,
nr_phy_data_t *phy_data) { nr_phy_data_t *phy_data) {
...@@ -1204,6 +1217,9 @@ int phy_procedures_nrUE_RX(PHY_VARS_NR_UE *ue, ...@@ -1204,6 +1217,9 @@ int phy_procedures_nrUE_RX(PHY_VARS_NR_UE *ue,
int ret_pdsch = 0; int ret_pdsch = 0;
if (dlsch[0].active) { if (dlsch[0].active) {
// send indication to tx thread to wait for DLSCH decoding
send_slot_ind(ue->tx_wait_ind_fifo[(proc->nr_slot_rx + dlsch[0].dlsch_config.k1_feedback) % ue->frame_parms.slots_per_frame], proc->nr_slot_rx);
uint8_t nb_re_dmrs; uint8_t nb_re_dmrs;
if (dlsch[0].dlsch_config.dmrsConfigType == NFAPI_NR_DMRS_TYPE1) { if (dlsch[0].dlsch_config.dmrsConfigType == NFAPI_NR_DMRS_TYPE1) {
nb_re_dmrs = 6*dlsch[0].dlsch_config.n_dmrs_cdm_groups; nb_re_dmrs = 6*dlsch[0].dlsch_config.n_dmrs_cdm_groups;
...@@ -1243,6 +1259,9 @@ int phy_procedures_nrUE_RX(PHY_VARS_NR_UE *ue, ...@@ -1243,6 +1259,9 @@ int phy_procedures_nrUE_RX(PHY_VARS_NR_UE *ue,
if (ret_pdsch >= 0) if (ret_pdsch >= 0)
nr_ue_dlsch_procedures(ue, proc, dlsch, llr); nr_ue_dlsch_procedures(ue, proc, dlsch, llr);
else
// don't wait anymore
send_slot_ind(ue->tx_resume_ind_fifo[(proc->nr_slot_rx + dlsch[0].dlsch_config.k1_feedback) % ue->frame_parms.slots_per_frame], proc->nr_slot_rx);
stop_meas(&ue->dlsch_procedures_stat); stop_meas(&ue->dlsch_procedures_stat);
if (cpumeas(CPUMEAS_GETSTATE)) { if (cpumeas(CPUMEAS_GETSTATE)) {
......
...@@ -801,6 +801,8 @@ int8_t nr_ue_process_dci(module_id_t module_id, int cc_id, uint8_t gNB_index, fr ...@@ -801,6 +801,8 @@ int8_t nr_ue_process_dci(module_id_t module_id, int cc_id, uint8_t gNB_index, fr
dlsch_config_pdu_1_0->accumulated_delta_PUCCH, dlsch_config_pdu_1_0->accumulated_delta_PUCCH,
dci->pucch_resource_indicator, dci->pucch_resource_indicator,
1+dci->pdsch_to_harq_feedback_timing_indicator.val); 1+dci->pdsch_to_harq_feedback_timing_indicator.val);
dlsch_config_pdu_1_0->k1_feedback = 1+dci->pdsch_to_harq_feedback_timing_indicator.val;
LOG_D(MAC,"(nr_ue_procedures.c) pdu_type=%d\n\n",dl_config->dl_config_list[dl_config->number_pdus].pdu_type); LOG_D(MAC,"(nr_ue_procedures.c) pdu_type=%d\n\n",dl_config->dl_config_list[dl_config->number_pdus].pdu_type);
...@@ -1098,6 +1100,10 @@ int8_t nr_ue_process_dci(module_id_t module_id, int cc_id, uint8_t gNB_index, fr ...@@ -1098,6 +1100,10 @@ int8_t nr_ue_process_dci(module_id_t module_id, int cc_id, uint8_t gNB_index, fr
LOG_D(MAC,"(nr_ue_procedures.c) pdu_type=%d\n\n",dl_config->dl_config_list[dl_config->number_pdus].pdu_type); LOG_D(MAC,"(nr_ue_procedures.c) pdu_type=%d\n\n",dl_config->dl_config_list[dl_config->number_pdus].pdu_type);
dl_config->number_pdus = dl_config->number_pdus + 1; dl_config->number_pdus = dl_config->number_pdus + 1;
// send the ack/nack slot number to phy to indicate tx thread to wait for DLSCH decoding
dlsch_config_pdu_1_1->k1_feedback = feedback_ti;
/* TODO same calculation for MCS table as done in UL */ /* TODO same calculation for MCS table as done in UL */
dlsch_config_pdu_1_1->mcs_table = (pdsch_Config->mcs_Table) ? (*pdsch_Config->mcs_Table + 1) : 0; dlsch_config_pdu_1_1->mcs_table = (pdsch_Config->mcs_Table) ? (*pdsch_Config->mcs_Table + 1) : 0;
dlsch_config_pdu_1_1->qamModOrder = nr_get_Qm_dl(dlsch_config_pdu_1_1->mcs, dlsch_config_pdu_1_1->mcs_table); dlsch_config_pdu_1_1->qamModOrder = nr_get_Qm_dl(dlsch_config_pdu_1_1->mcs, dlsch_config_pdu_1_1->mcs_table);
...@@ -1200,14 +1206,12 @@ void set_harq_status(NR_UE_MAC_INST_t *mac, ...@@ -1200,14 +1206,12 @@ void set_harq_status(NR_UE_MAC_INST_t *mac,
// FIXME k0 != 0 currently not taken into consideration // FIXME k0 != 0 currently not taken into consideration
current_harq->dl_frame = frame; current_harq->dl_frame = frame;
current_harq->dl_slot = slot; current_harq->dl_slot = slot;
if (get_softmodem_params()->emulate_l1) { int scs = get_softmodem_params()->numerology;
int scs = get_softmodem_params()->numerology; int slots_per_frame = nr_slots_per_frame[scs];
int slots_per_frame = nr_slots_per_frame[scs]; slot += data_toul_fb;
slot += data_toul_fb; if (slot >= slots_per_frame) {
if (slot >= slots_per_frame) { frame = (frame + 1) % 1024;
frame = (frame + 1) % 1024; slot %= slots_per_frame;
slot %= slots_per_frame;
}
} }
LOG_D(NR_PHY,"Setting harq_status for harq_id %d, dl %d.%d, sched ul %d.%d\n", LOG_D(NR_PHY,"Setting harq_status for harq_id %d, dl %d.%d, sched ul %d.%d\n",
......
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