defs.h 41.4 KB
Newer Older
1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21
/*
 * Licensed to the OpenAirInterface (OAI) Software Alliance under one or more
 * contributor license agreements.  See the NOTICE file distributed with
 * this work for additional information regarding copyright ownership.
 * The OpenAirInterface Software Alliance licenses this file to You under
 * the OAI Public License, Version 1.0  (the "License"); you may not use this file
 * except in compliance with the License.
 * You may obtain a copy of the License at
 *
 *      http://www.openairinterface.org/?page_id=698
 *
 * Unless required by applicable law or agreed to in writing, software
 * distributed under the License is distributed on an "AS IS" BASIS,
 * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
 * See the License for the specific language governing permissions and
 * limitations under the License.
 *-------------------------------------------------------------------------------
 * For more information about the OpenAirInterface (OAI) Software Alliance:
 *      contact@openairinterface.org
 */

22
/*! \file LAYER2/MAC/defs.h
23
* \brief MAC data structures, constant, and function prototype
24
* \author Navid Nikaein and Raymond Knopp
25 26
* \date 2011
* \version 0.5
27
* \email navid.nikaein@eurecom.fr
28 29

*/
30 31 32 33
/** @defgroup _oai2  openair2 Reference Implementation
 * @ingroup _ref_implementation_
 * @{
 */
34

35
/*@}*/
36

37 38 39 40 41 42 43 44 45 46 47 48 49
#ifndef __LAYER2_MAC_DEFS_H__
#define __LAYER2_MAC_DEFS_H__



#ifdef USER_MODE
#include <stdio.h>
#include <stdlib.h>
#include <string.h>
#endif

//#include "COMMON/openair_defs.h"

50 51 52 53


#include "PHY/defs.h"
#include "PHY/LTE_TRANSPORT/defs.h"
54
#include "COMMON/platform_constants.h"
55
#include "BCCH-BCH-Message.h"
56 57 58
#include "RadioResourceConfigCommon.h"
#include "RadioResourceConfigDedicated.h"
#include "MeasGapConfig.h"
59
#include "SchedulingInfoList.h"
60 61 62
#include "TDD-Config.h"
#include "RACH-ConfigCommon.h"
#include "MeasObjectToAddModList.h"
63
#include "MobilityControlInfo.h"
Cedric Roux's avatar
Cedric Roux committed
64
#if defined(Rel10) || defined(Rel14)
65 66 67
#include "MBSFN-AreaInfoList-r9.h"
#include "MBSFN-SubframeConfigList.h"
#include "PMCH-InfoList-r9.h"
Raymond Knopp's avatar
 
Raymond Knopp committed
68
#include "SCellToAddMod-r10.h"
69
#endif
70 71 72
#ifdef Rel14
#include "SystemInformationBlockType1-v1310-IEs.h"
#endif
73

74 75
#include "nfapi_interface.h"
#include "PHY_INTERFACE/IF_Module.h"
76

77 78
/** @defgroup _mac  MAC
 * @ingroup _oai2
79 80 81
 * @{
 */

82
#define BCCH_PAYLOAD_SIZE_MAX 128
83
#define CCCH_PAYLOAD_SIZE_MAX 128
84
#define PCCH_PAYLOAD_SIZE_MAX 128
85
#define RAR_PAYLOAD_SIZE_MAX 128
86

87 88 89
#define SCH_PAYLOAD_SIZE_MAX 4096
/// Logical channel ids from 36-311 (Note BCCH is not specified in 36-311, uses the same as first DRB)

Cedric Roux's avatar
Cedric Roux committed
90
#if defined(Rel10) || defined(Rel14)
91

92
// Mask for identifying subframe for MBMS
93 94 95 96 97 98 99 100 101 102 103 104 105 106
#define MBSFN_TDD_SF3 0x80// for TDD
#define MBSFN_TDD_SF4 0x40
#define MBSFN_TDD_SF7 0x20
#define MBSFN_TDD_SF8 0x10
#define MBSFN_TDD_SF9 0x08
#define MBSFN_FDD_SF1 0x80// for FDD
#define MBSFN_FDD_SF2 0x40
#define MBSFN_FDD_SF3 0x20
#define MBSFN_FDD_SF6 0x10
#define MBSFN_FDD_SF7 0x08
#define MBSFN_FDD_SF8 0x04

#define MAX_MBSFN_AREA 8
#define MAX_PMCH_perMBSFN 15
107
/*!\brief MAX MCCH payload size  */
108
#define MCCH_PAYLOAD_SIZE_MAX 128
109
//#define MCH_PAYLOAD_SIZE_MAX 16384// this value is using in case mcs and TBS index are high
110 111 112 113 114 115
#endif

#ifdef USER_MODE
#define printk printf
#endif //USER_MODE

116
/*!\brief Maximum number of logical channl group IDs */
117
#define MAX_NUM_LCGID 4
118 119 120 121 122 123 124 125 126
/*!\brief logical channl group ID 0 */
#define LCGID0 0
/*!\brief logical channl group ID 1 */
#define LCGID1 1
/*!\brief logical channl group ID 2 */
#define LCGID2 2
/*!\brief logical channl group ID 3 */
#define LCGID3 3
/*!\brief Maximum number of logical chanels */
127
#define MAX_NUM_LCID 11
128
/*!\brief Maximum number od control elemenets */
129
#define MAX_NUM_CE 5
130
/*!\brief Maximum number of random access process */
131
#define NB_RA_PROC_MAX 4
132
/*!\brief size of buffer status report table */
133
#define BSR_TABLE_SIZE 64
134
/*!\brief The power headroom reporting range is from -23 ...+40 dB and beyond, with step 1 */
135
#define PHR_MAPPING_OFFSET 23  // if ( x>= -23 ) val = floor (x + 23) 
136
/*!\brief maximum number of resource block groups */
137
#define N_RBG_MAX 25 // for 20MHz channel BW
138
/*!\brief minimum value for channel quality indicator */
139
#define MIN_CQI_VALUE  0
140
/*!\brief maximum value for channel quality indicator */
141
#define MAX_CQI_VALUE  15
142 143 144 145
/*!\briefmaximum number of supported bandwidth (1.4, 5, 10, 20 MHz) */
#define MAX_SUPPORTED_BW  4  
/*!\brief CQI values range from 1 to 15 (4 bits) */
#define CQI_VALUE_RANGE 16 
146

hbilel's avatar
hbilel committed
147
/*!\brief value for indicating BSR Timer is not running */
hbilel's avatar
hbilel committed
148
#define MAC_UE_BSR_TIMER_NOT_RUNNING   (0xFFFF)
149

150 151 152
#define LCID_EMPTY 0
#define LCID_NOT_EMPTY 1

hbilel's avatar
hbilel committed
153 154 155 156 157 158
/*!\brief minimum RLC PDU size to be transmitted = min RLC Status PDU or RLC UM PDU SN 5 bits */
#define MIN_RLC_PDU_SIZE    (2)

/*!\brief minimum MAC data needed for transmitting 1 min RLC PDU size + 1 byte MAC subHeader */
#define MIN_MAC_HDR_RLC_SIZE    (1 + MIN_RLC_PDU_SIZE)

159 160 161
/*!\brief maximum number of slices / groups */
#define MAX_NUM_SLICES 4 

162 163 164
/* 
 * eNB part 
 */ 
165

166 167 168 169 170

/* 
 * UE/ENB common part 
 */ 
/*!\brief MAC header of Random Access Response for Random access preamble identifier (RAPID) */
171
typedef struct {
172 173 174
  uint8_t RAPID:6;
  uint8_t T:1;
  uint8_t E:1;
175 176
} __attribute__((__packed__))RA_HEADER_RAPID;

177
/*!\brief  MAC header of Random Access Response for backoff indicator (BI)*/
178
typedef struct {
179 180 181 182
  uint8_t BI:4;
  uint8_t R:2;
  uint8_t T:1;
  uint8_t E:1;
183 184 185 186 187 188 189 190 191 192 193 194 195 196 197 198 199 200 201 202 203 204 205 206 207 208 209 210 211 212
} __attribute__((__packed__))RA_HEADER_BI;
/*
typedef struct {
  uint64_t padding:16;
  uint64_t t_crnti:16;
  uint64_t hopping_flag:1;
  uint64_t rb_alloc:10;
  uint64_t mcs:4;
  uint64_t TPC:3;
  uint64_t UL_delay:1;
  uint64_t cqi_req:1;
  uint64_t Timing_Advance_Command:11;  // first/2nd octet LSB
  uint64_t R:1;                        // octet MSB
  } __attribute__((__packed__))RAR_PDU;

typedef struct {
  uint64_t padding:16;
  uint64_t R:1;                        // octet MSB
  uint64_t Timing_Advance_Command:11;  // first/2nd octet LSB
  uint64_t cqi_req:1;
  uint64_t UL_delay:1;
  uint64_t TPC:3;
  uint64_t mcs:4;
  uint64_t rb_alloc:10;
  uint64_t hopping_flag:1;
  uint64_t t_crnti:16;
  } __attribute__((__packed__))RAR_PDU;

#define sizeof_RAR_PDU 6
*/
213
/*!\brief  MAC subheader short with 7bit Length field */
214
typedef struct {
215 216 217 218 219
  uint8_t LCID:5;  // octet 1 LSB
  uint8_t E:1;
  uint8_t R:2;     // octet 1 MSB
  uint8_t L:7;     // octet 2 LSB
  uint8_t F:1;     // octet 2 MSB
220
} __attribute__((__packed__))SCH_SUBHEADER_SHORT;
221
/*!\brief  MAC subheader long  with 15bit Length field */
222
typedef struct {
223 224 225 226 227 228 229
  uint8_t LCID:5;   // octet 1 LSB
  uint8_t E:1;
  uint8_t R:2;      // octet 1 MSB
  uint8_t L_MSB:7;
  uint8_t F:1;      // octet 2 MSB
  uint8_t L_LSB:8;
  uint8_t padding;
230
} __attribute__((__packed__))SCH_SUBHEADER_LONG;
231
/*!\brief MAC subheader short without length field */
232
typedef struct {
233 234 235
  uint8_t LCID:5;
  uint8_t E:1;
  uint8_t R:2;
236 237
} __attribute__((__packed__))SCH_SUBHEADER_FIXED;

238
/*!\brief  mac control element: short buffer status report for a specific logical channel group ID*/
239
typedef struct {
240 241
  uint8_t Buffer_size:6;  // octet 1 LSB
  uint8_t LCGID:2;        // octet 1 MSB
242 243 244
} __attribute__((__packed__))BSR_SHORT;

typedef BSR_SHORT BSR_TRUNCATED;
245
/*!\brief  mac control element: long buffer status report for all logical channel group ID*/
246
typedef struct {
fnabet's avatar
fnabet committed
247 248 249 250
  uint8_t Buffer_size3:6;
  uint8_t Buffer_size2:6;
  uint8_t Buffer_size1:6;
  uint8_t Buffer_size0:6;
251 252 253
} __attribute__((__packed__))BSR_LONG;

#define BSR_LONG_SIZE  (sizeof(BSR_LONG))
254
/*!\brief  mac control element: timing advance  */
255
typedef struct {
256 257
  uint8_t TA:6;
  uint8_t R:2;
258
} __attribute__((__packed__))TIMING_ADVANCE_CMD;
259
/*!\brief  mac control element: power headroom report  */
260
typedef struct {
261 262
  uint8_t PH:6;
  uint8_t R:2;
263 264
} __attribute__((__packed__))POWER_HEADROOM_CMD;

265
/*! \brief MIB payload */
266
typedef struct {
267 268
  uint8_t payload[3] ;
} __attribute__((__packed__))MIB_PDU;
269
/*! \brief CCCH payload */
270
typedef struct {
271
  uint8_t payload[CCCH_PAYLOAD_SIZE_MAX] ;
272
} __attribute__((__packed__))CCCH_PDU;
273
/*! \brief BCCH payload */
274
typedef struct {
275
  uint8_t payload[BCCH_PAYLOAD_SIZE_MAX] ;
276
} __attribute__((__packed__))BCCH_PDU;
277 278 279 280
/*! \brief RAR payload */
typedef struct {
  uint8_t payload[RAR_PAYLOAD_SIZE_MAX];
} __attribute__ ((__packed__)) RAR_PDU;
281 282 283 284
/*! \brief BCCH payload */
typedef struct {
  uint8_t payload[PCCH_PAYLOAD_SIZE_MAX] ;
} __attribute__((__packed__))PCCH_PDU;
285

Cedric Roux's avatar
Cedric Roux committed
286
#if defined(Rel10) || defined(Rel14)
287
/*! \brief MCCH payload */
288
typedef struct {
289
  uint8_t payload[MCCH_PAYLOAD_SIZE_MAX] ;
290
} __attribute__((__packed__))MCCH_PDU;
291
/*!< \brief MAC control element for activation and deactivation of component carriers */
292 293 294 295 296 297 298 299 300 301
typedef struct {
  uint8_t C7:1;/*!< \brief Component carrier 7 */
  uint8_t C6:1;/*!< \brief Component carrier 6 */
  uint8_t C5:1;/*!< \brief Component carrier 5 */
  uint8_t C4:1;/*!< \brief Component carrier 4 */
  uint8_t C3:1;/*!< \brief Component carrier 3 */
  uint8_t C2:1;/*!< \brief Component carrier 2 */
  uint8_t C1:1;/*!< \brief Component carrier 1 */
  uint8_t R:1;/*!< \brief Reserved  */
} __attribute__((__packed__))CC_ELEMENT;
302
/*! \brief MAC control element: MCH Scheduling Information */
303
typedef struct {
304 305 306
  uint8_t stop_sf_MSB:3; // octet 1 LSB
  uint8_t lcid:5;        // octet 2 MSB
  uint8_t stop_sf_LSB:8;
307
} __attribute__((__packed__))MSI_ELEMENT;
308 309
#endif
/*! \brief Values of CCCH LCID for DLSCH */ 
310
#define CCCH_LCHANID 0
311
/*!\brief Values of BCCH logical channel (fake)*/
312
#define BCCH 3  // SI 
313
/*!\brief Values of PCCH logical channel (fake)*/
314
#define PCCH 4  // Paging 
315 316
/*!\brief Values of PCCH logical channel (fake) */
#define MIBCH 5  // MIB 
317 318 319 320
/*!\brief Values of BCCH SIB1_BR logical channel (fake) */
#define BCCH_SIB1_BR 6  // SIB1_BR 
/*!\brief Values of BCCH SIB_BR logical channel (fake) */
#define BCCH_SI_BR 7  // SI-BR 
321 322 323 324 325 326 327 328 329 330 331 332 333 334
/*!\brief Value of CCCH / SRB0 logical channel */
#define CCCH 0  // srb0
/*!\brief DCCH / SRB1 logical channel */
#define DCCH 1  // srb1
/*!\brief DCCH1 / SRB2  logical channel */
#define DCCH1 2 // srb2
/*!\brief DTCH DRB1  logical channel */
#define DTCH 3 // LCID
/*!\brief MCCH logical channel */
#define MCCH 4 
/*!\brief MTCH logical channel */
#define MTCH 1 
// DLSCH LCHAN ID
/*!\brief LCID of UE contention resolution identity for DLSCH*/
335
#define UE_CONT_RES 28
336
/*!\brief LCID of timing advance for DLSCH */
337
#define TIMING_ADV_CMD 29
338
/*!\brief LCID of discontinous reception mode for DLSCH */
339
#define DRX_CMD 30
340
/*!\brief LCID of padding LCID for DLSCH */
341 342
#define SHORT_PADDING 31

Cedric Roux's avatar
Cedric Roux committed
343
#if defined(Rel10) || defined(Rel14)
344
// MCH LCHAN IDs (table6.2.1-4 TS36.321)
345
/*!\brief LCID of MCCH for DL */
346
#define MCCH_LCHANID 0
347 348 349
/*!\brief LCID of MCH scheduling info for DL */
#define MCH_SCHDL_INFO 3
/*!\brief LCID of Carrier component activation/deactivation */
350
#define CC_ACT_DEACT 27
351 352 353
#endif

// ULSCH LCHAN IDs
354
/*!\brief LCID of extended power headroom for ULSCH */
355
#define EXTENDED_POWER_HEADROOM 25
356
/*!\brief LCID of power headroom for ULSCH */
357
#define POWER_HEADROOM 26
358
/*!\brief LCID of CRNTI for ULSCH */
359
#define CRNTI 27
360
/*!\brief LCID of truncated BSR for ULSCH */
361
#define TRUNCATED_BSR 28
362
/*!\brief LCID of short BSR for ULSCH */
363
#define SHORT_BSR 29
364
/*!\brief LCID of long BSR for ULSCH */
365
#define LONG_BSR 30
366 367 368 369 370
/*!\bitmaps for BSR Triggers */
#define	BSR_TRIGGER_NONE		(0)			/* No BSR Trigger */
#define	BSR_TRIGGER_REGULAR		(1)			/* For Regular and ReTxBSR Expiry Triggers */
#define	BSR_TRIGGER_PERIODIC	(2)			/* For BSR Periodic Timer Expiry Trigger */
#define	BSR_TRIGGER_PADDING		(4)			/* For Padding BSR Trigger */
371 372


373
/*! \brief Downlink SCH PDU Structure */
374
typedef struct {
375
  uint8_t payload[8][SCH_PAYLOAD_SIZE_MAX];
376
  uint16_t Pdu_size[8];
377 378
} __attribute__ ((__packed__)) DLSCH_PDU;

379

380
/*! \brief MCH PDU Structure */
381
typedef struct {
382 383
  int8_t payload[SCH_PAYLOAD_SIZE_MAX];
  uint16_t Pdu_size;
384
  uint8_t mcs;
385 386 387
  uint8_t sync_area;
  uint8_t msi_active;
  uint8_t mcch_active;
388
  uint8_t mtch_active;
389 390
} __attribute__ ((__packed__)) MCH_PDU;

391
/*! \brief Uplink SCH PDU Structure */
392
typedef struct {
393 394
  int8_t payload[SCH_PAYLOAD_SIZE_MAX];         /*!< \brief SACH payload */
  uint16_t Pdu_size;
395 396 397 398
} __attribute__ ((__packed__)) ULSCH_PDU;

#include "PHY/impl_defs_top.h"

399
/*!\brief  UE ULSCH scheduling states*/
400 401 402
typedef enum {
  S_UL_NONE =0,
  S_UL_WAITING,
403 404
  S_UL_SCHEDULED,
  S_UL_BUFFERED,
405 406 407
  S_UL_NUM_STATUS
} UE_ULSCH_STATUS;

408
/*!\brief  UE DLSCH scheduling states*/
409 410 411
typedef enum {
  S_DL_NONE =0,
  S_DL_WAITING,
412 413
  S_DL_SCHEDULED,
  S_DL_BUFFERED,
414 415 416
  S_DL_NUM_STATUS
} UE_DLSCH_STATUS;

417
/*!\brief  scheduling policy for the contention-based access */
418
typedef enum {
419 420 421 422 423
  CBA_ES=0, /// equal share of RB among groups w
  CBA_ES_S,  /// equal share of RB among groups with small allocation
  CBA_PF, /// proportional fair (kind of)
  CBA_PF_S,  /// proportional fair (kind of) with small RB allocation
  CBA_RS /// random allocation
424 425 426
} CBA_POLICY;


427
/*! \brief temporary struct for ULSCH sched */
428
typedef struct {
429
  rnti_t rnti;
430 431
  uint16_t subframe;
  uint16_t serving_num;
432 433
  UE_ULSCH_STATUS status;
} eNB_ULSCH_INFO;
434
/*! \brief temp struct for DLSCH sched */
435
typedef struct {
436
  rnti_t rnti;
437 438 439
  uint16_t weight;
  uint16_t subframe;
  uint16_t serving_num;
440 441
  UE_DLSCH_STATUS status;
} eNB_DLSCH_INFO;
442
/*! \brief eNB overall statistics */
443
typedef struct {
444 445 446 447 448 449 450 451 452 453 454 455 456 457 458 459 460 461 462
  /// num BCCH PDU per CC 
  uint32_t total_num_bcch_pdu;
  /// BCCH buffer size  
  uint32_t bcch_buffer;
  /// total BCCH buffer size  
  uint32_t total_bcch_buffer;
  /// BCCH MCS
  uint32_t bcch_mcs;

  /// num CCCH PDU per CC 
  uint32_t total_num_ccch_pdu;
  /// BCCH buffer size  
  uint32_t ccch_buffer;
  /// total BCCH buffer size  
  uint32_t total_ccch_buffer;
  /// BCCH MCS
  uint32_t ccch_mcs;

/// num active users
463 464 465 466 467
  uint16_t num_dlactive_UEs;
  ///  available number of PRBs for a give SF
  uint16_t available_prbs;
  /// total number of PRB available for the user plane
  uint32_t total_available_prbs;
468 469
  /// aggregation
  /// total avilable nccc : num control channel element
470
  uint16_t available_ncces;
471 472
  // only for a new transmission, should be extended for retransmission
  // current dlsch  bit rate for all transport channels
473 474 475 476 477
  uint32_t dlsch_bitrate;
  //
  uint32_t dlsch_bytes_tx;
  //
  uint32_t dlsch_pdus_tx;
478
  //
479 480 481 482 483
  uint32_t total_dlsch_bitrate;
  //
  uint32_t total_dlsch_bytes_tx;
  //
  uint32_t total_dlsch_pdus_tx;
484 485
  
  // here for RX
486 487 488 489 490
  //
  uint32_t ulsch_bitrate;
  //
  uint32_t ulsch_bytes_rx;
  //
491 492 493 494 495 496 497 498
  uint64_t ulsch_pdus_rx; 

  uint32_t total_ulsch_bitrate;
  //
  uint32_t total_ulsch_bytes_rx;
  //
  uint32_t total_ulsch_pdus_rx;
  
499 500 501 502 503 504 505
  
  /// MAC agent-related stats
  /// total number of scheduling decisions
  int sched_decisions;
  /// missed deadlines
  int missed_deadlines;

506
} eNB_STATS;
507
/*! \brief eNB statistics for the connected UEs*/
508
typedef struct {
509 510

  /// CRNTI of UE
511
  rnti_t crnti; ///user id (rnti) of connected UEs
512
  // rrc status
513 514 515
  uint8_t rrc_status;
  /// harq pid
  uint8_t harq_pid;
516
  /// harq rounf
517 518 519 520 521
  uint8_t harq_round;
  /// total available number of PRBs for a new transmission
  uint16_t rbs_used;
  /// total available number of PRBs for a retransmission
  uint16_t rbs_used_retx;
522
  /// total nccc used for a new transmission: num control channel element
523
  uint16_t ncce_used;
524
  /// total avilable nccc for a retransmission: num control channel element
525
  uint16_t ncce_used_retx;
526 527

  // mcs1 before the rate adaptaion
528
  uint8_t dlsch_mcs1;
529
  /// Target mcs2 after rate-adaptation
530
  uint8_t dlsch_mcs2;
531
  //  current TBS with mcs2
532
  uint32_t TBS;
533
  //  total TBS with mcs2
534
  //  uint32_t total_TBS;
535
  //  total rb used for a new transmission
536
  uint32_t total_rbs_used;
537
  //  total rb used for retransmission
538
  uint32_t total_rbs_used_retx;
539

540
   /// TX
541 542 543 544 545 546 547 548
  /// Num pkt
  uint32_t num_pdu_tx[NB_RB_MAX];
  /// num bytes
  uint32_t num_bytes_tx[NB_RB_MAX];
  /// num retransmission / harq
  uint32_t num_retransmission;
  /// instantaneous tx throughput for each TTI
  //  uint32_t tti_throughput[NB_RB_MAX];
549 550

  /// overall
551
  //
552 553 554 555
  uint32_t  dlsch_bitrate;
  //total
  uint32_t  total_dlsch_bitrate;
  /// headers+ CE +  padding bytes for a MAC PDU
556
  uint64_t overhead_bytes;
557
  /// headers+ CE +  padding bytes for a MAC PDU
558
  uint64_t total_overhead_bytes;
559
  /// headers+ CE +  padding bytes for a MAC PDU
560
  uint64_t avg_overhead_bytes;
561
  // MAC multiplexed payload
562 563 564
  uint64_t total_sdu_bytes;
  // total MAC pdu bytes
  uint64_t total_pdu_bytes;
565

566 567 568 569
  // total num pdu
  uint32_t total_num_pdus;
  //
  //  uint32_t avg_pdu_size;
570 571

  /// RX
572

573 574 575 576 577 578
  /// PUCCH1a/b power (dBm)
  int32_t Po_PUCCH_dBm;
  /// Indicator that Po_PUCCH has been updated by PHY
  int32_t Po_PUCCH_update;
  /// Uplink measured RSSI
  int32_t UL_rssi;
579 580 581 582 583
  /// preassigned mcs after rate adaptation
  uint8_t ulsch_mcs1;
  /// adjusted mcs
  uint8_t ulsch_mcs2;

584 585 586 587
  /// estimated average pdu inter-departure time
  uint32_t avg_pdu_idt;
  /// estimated average pdu size
  uint32_t avg_pdu_ps;
588
  ///
589 590
  uint32_t aggregated_pdu_size;
  uint32_t aggregated_pdu_arrival;
591

592 593 594 595 596 597 598 599 600 601 602 603 604 605 606 607
  ///  uplink transport block size
  uint32_t ulsch_TBS;

  ///  total rb used for a new uplink transmission
  uint32_t num_retransmission_rx;
  ///  total rb used for a new uplink transmission
  uint32_t rbs_used_rx;
   ///  total rb used for a new uplink retransmission
  uint32_t rbs_used_retx_rx;
  ///  total rb used for a new uplink transmission
  uint32_t total_rbs_used_rx;
  /// normalized rx power 
  int32_t      normalized_rx_power;
   /// target rx power 
  int32_t    target_rx_power;

608
  /// num rx pdu
609
  uint32_t num_pdu_rx[NB_RB_MAX];
610
  /// num bytes rx
611
  uint32_t num_bytes_rx[NB_RB_MAX];
612
  /// instantaneous rx throughput for each TTI
613
  //  uint32_t tti_goodput[NB_RB_MAX];
614 615
  /// errors
  uint32_t num_errors_rx;
616 617 618 619 620 621 622 623 624 625
  
  uint64_t overhead_bytes_rx;
  /// headers+ CE +  padding bytes for a MAC PDU
  uint64_t total_overhead_bytes_rx;
  /// headers+ CE +  padding bytes for a MAC PDU
  uint64_t avg_overhead_bytes_rx;
 //
  uint32_t  ulsch_bitrate;
  //total
  uint32_t  total_ulsch_bitrate;
626
  /// overall
627 628
  ///  MAC pdu bytes
  uint64_t pdu_bytes_rx;
629
  /// total MAC pdu bytes
630
  uint64_t total_pdu_bytes_rx;
631
  /// total num pdu
632
  uint32_t total_num_pdus_rx;
633
  /// num of error pdus
634
  uint32_t total_num_errors_rx;
635

636
} eNB_UE_STATS;
637
/*! \brief eNB template for UE context information  */
638
typedef struct {
639
  /// C-RNTI of UE
640
  rnti_t rnti;
641 642
  /// NDI from last scheduling
  uint8_t oldNDI[8];
643 644 645 646
  /// mcs1 from last scheduling
  uint8_t oldmcs1[8];
  /// mcs2 from last scheduling
  uint8_t oldmcs2[8];
647 648
  /// NDI from last UL scheduling
  uint8_t oldNDI_UL[8];
649 650 651 652
  /// mcs from last UL scheduling
  uint8_t mcs_UL[8];
  /// TBS from last UL scheduling
  uint8_t TBS_UL[8];
653
  /// Flag to indicate UL has been scheduled at least once
Lionel Gauthier's avatar
Lionel Gauthier committed
654
  boolean_t ul_active;
Raymond Knopp's avatar
 
Raymond Knopp committed
655 656
  /// Flag to indicate UE has been configured (ACK from RRCConnectionSetup received)
  boolean_t configured;
657

658 659 660 661 662 663
  /// MCS from last scheduling
  uint8_t mcs[8];

  /// TPC from last scheduling
  uint8_t oldTPC[8];

664 665 666
  // PHY interface info

  /// Number of Allocated RBs for DL after scheduling (prior to frequency allocation)
667
  uint16_t nb_rb[8]; // num_max_harq
668

669
  /// Number of Allocated RBs for UL after scheduling
670
  uint16_t nb_rb_ul[8]; // num_max_harq
671

672 673 674 675 676 677
  /// Number of Allocated RBs for UL after scheduling
  uint16_t first_rb_ul[8]; // num_max_harq

  /// Cyclic shift for DMRS after scheduling
  uint16_t cshift[8]; // num_max_harq

678 679
  /// Number of Allocated RBs by the ulsch preprocessor
  uint8_t pre_allocated_nb_rb_ul;
680

681 682
  /// index of Allocated RBs by the ulsch preprocessor
  int8_t pre_allocated_rb_table_index_ul;
683

684 685
  /// total allocated RBs
  int8_t total_allocated_rbs;
686

687
  /// pre-assigned MCS by the ulsch preprocessor
688
  uint8_t pre_assigned_mcs_ul;
689 690 691 692

  /// assigned MCS by the ulsch scheduler
  uint8_t assigned_mcs_ul;

693
  /// DL DAI
694
  uint8_t DAI;
695 696

  /// UL DAI
697
  uint8_t DAI_ul[10];
698 699

  /// UL Scheduling Request Received
700
  uint8_t ul_SR;
701

702
  ///Resource Block indication for each sub-band in MU-MIMO
703
  uint8_t rballoc_subband[8][50];
704 705 706

  // Logical channel info for link with RLC

707
  /// Last received UE BSR info for each logical channel group id
708
  uint8_t bsr_info[MAX_NUM_LCGID];
709

710 711 712
  /// LCGID mapping
  long lcgidmap[11];

713
  /// phr information
714
  int8_t phr_info;
715

716 717 718
  /// phr information
  int8_t phr_info_configured;

719
  ///dl buffer info
720
  uint32_t dl_buffer_info[MAX_NUM_LCID];
721
  /// total downlink buffer info
722
  uint32_t dl_buffer_total;
723
  /// total downlink pdus
724
  uint32_t dl_pdus_total;
725
  /// downlink pdus for each LCID
726
  uint32_t dl_pdus_in_buffer[MAX_NUM_LCID];
727
  /// creation time of the downlink buffer head for each LCID
728
  uint32_t dl_buffer_head_sdu_creation_time[MAX_NUM_LCID];
729
  /// maximum creation time of the downlink buffer head across all LCID
730
  uint32_t  dl_buffer_head_sdu_creation_time_max;
731
  /// a flag indicating that the downlink head SDU is segmented  
732
  uint8_t    dl_buffer_head_sdu_is_segmented[MAX_NUM_LCID];
733
  /// size of remaining size to send for the downlink head SDU
734
  uint32_t dl_buffer_head_sdu_remaining_size_to_send[MAX_NUM_LCID];
735

736
  /// total uplink buffer size 
737
  uint32_t ul_total_buffer;
738
  /// uplink buffer creation time for each LCID
739
  uint32_t ul_buffer_creation_time[MAX_NUM_LCGID];
740
  /// maximum uplink buffer creation time across all the LCIDs
741
  uint32_t ul_buffer_creation_time_max;
742
  /// uplink buffer size per LCID
743 744
  uint32_t ul_buffer_info[MAX_NUM_LCGID];

745 746 747
  /// UE tx power
  int32_t ue_tx_power;

kaltenbe's avatar
kaltenbe committed
748
  /// stores the frame where the last TPC was transmitted
749 750 751 752
  uint32_t pusch_tpc_tx_frame;
  uint32_t pusch_tpc_tx_subframe;
  uint32_t pucch_tpc_tx_frame;
  uint32_t pucch_tpc_tx_subframe;
kaltenbe's avatar
kaltenbe committed
753

754 755 756
#ifdef LOCALIZATION
  eNB_UE_estimated_distances distance;
#endif
757 758 759

#ifdef Rel14
  uint8_t rach_resource_type;
760
  uint16_t mpdcch_repetition_cnt;
761 762
  frame_t Msg2_frame;
#endif
763 764 765
  sub_frame_t Msg2_subframe;

  PhysicalConfigDedicated_t  *physicalConfigDedicated;
766

767 768
} UE_TEMPLATE;

769
/*! \brief scheduling control information set through an API (not used)*/
770
typedef struct {
771
  ///UL transmission bandwidth in RBs
772
  uint8_t ul_bandwidth[MAX_NUM_LCID];
773
  ///DL transmission bandwidth in RBs
774
  uint8_t dl_bandwidth[MAX_NUM_LCID];
775

776 777
  //To do GBR bearer
  uint8_t min_ul_bandwidth[MAX_NUM_LCID];
778

779
  uint8_t min_dl_bandwidth[MAX_NUM_LCID];
780

781
  ///aggregated bit rate of non-gbr bearer per UE
782
  uint64_t  ue_AggregatedMaximumBitrateDL;
783
  ///aggregated bit rate of non-gbr bearer per UE
784
  uint64_t  ue_AggregatedMaximumBitrateUL;
785
  ///CQI scheduling interval in subframes.
786
  uint16_t cqiSchedInterval;
787
  ///Contention resolution timer used during random access
788
  uint8_t mac_ContentionResolutionTimer;
789

790
  uint16_t max_allowed_rbs[MAX_NUM_LCID];
791

792
  uint8_t max_mcs[MAX_NUM_LCID];
793

794
  uint16_t priority[MAX_NUM_LCID];
795

796
  // resource scheduling information
797 798 799 800 801 802 803
  
  /// Current DL harq round per harq_pid on each CC
  uint8_t       round[MAX_NUM_CCs][10];
  /// Current Active TBs per harq_pid on each CC
  uint8_t       tbcnt[MAX_NUM_CCs][10];
  /// Current UL harq round per harq_pid on each CC
  uint8_t       round_UL[MAX_NUM_CCs][8];
804 805 806
  uint8_t       dl_pow_off[MAX_NUM_CCs];
  uint16_t      pre_nb_available_rbs[MAX_NUM_CCs];
  unsigned char rballoc_sub_UE[MAX_NUM_CCs][N_RBG_MAX];
807
  uint16_t      ta_timer;
808
  int16_t       ta_update;
809
  uint16_t      ul_consecutive_errors;
810
  int32_t       context_active_timer;
811
  int32_t       cqi_req_timer;
812
  int32_t       ul_inactivity_timer;
813
  int32_t       ul_failure_timer; 
814
  int32_t       ul_scheduled;
815
  int32_t       ra_pdcch_order_sent;
kaltenbe's avatar
kaltenbe committed
816
  int32_t       ul_out_of_sync;
817
  int32_t       phr_received;
818 819
  uint8_t       periodic_ri_received[NFAPI_CC_MAX];
  uint8_t       aperiodic_ri_received[NFAPI_CC_MAX];
820
  uint8_t       pucch1_cqi_update[NFAPI_CC_MAX];
821
  uint8_t       pucch1_snr[NFAPI_CC_MAX];
822
  uint8_t       pucch2_cqi_update[NFAPI_CC_MAX];
823
  uint8_t       pucch2_snr[NFAPI_CC_MAX];
824
  uint8_t       pucch3_cqi_update[NFAPI_CC_MAX];
825 826 827 828 829 830 831 832 833 834 835 836 837 838 839 840 841 842 843
  uint8_t       pucch3_snr[NFAPI_CC_MAX];
  uint8_t       pusch_snr[NFAPI_CC_MAX];
  uint16_t      feedback_cnt[NFAPI_CC_MAX];
  uint16_t      timing_advance;
  uint16_t      timing_advance_r9;
  uint8_t       periodic_wideband_cqi[NFAPI_CC_MAX];
  uint8_t       periodic_wideband_spatial_diffcqi[NFAPI_CC_MAX];
  uint8_t       periodic_wideband_pmi[NFAPI_CC_MAX];
  uint8_t       periodic_subband_cqi[NFAPI_CC_MAX][16];
  uint8_t       periodic_subband_spatial_diffcqi[NFAPI_CC_MAX][16];
  uint8_t       aperiodic_subband_cqi0[NFAPI_CC_MAX][25];
  uint8_t       aperiodic_subband_pmi[NFAPI_CC_MAX][25];
  uint8_t       aperiodic_subband_diffcqi0[NFAPI_CC_MAX][25];
  uint8_t       aperiodic_subband_cqi1[NFAPI_CC_MAX][25];
  uint8_t       aperiodic_subband_diffcqi1[NFAPI_CC_MAX][25];
  uint8_t       aperiodic_wideband_cqi0[NFAPI_CC_MAX];
  uint8_t       aperiodic_wideband_pmi[NFAPI_CC_MAX];
  uint8_t       aperiodic_wideband_cqi1[NFAPI_CC_MAX];
  uint8_t       aperiodic_wideband_pmi1[NFAPI_CC_MAX];
Cedric Roux's avatar
Cedric Roux committed
844
  uint8_t       dl_cqi[NFAPI_CC_MAX];
845
} UE_sched_ctrl;
846
/*! \brief eNB template for the Random access information */
847 848
typedef struct {
  /// Flag to indicate this process is active
Lionel Gauthier's avatar
Lionel Gauthier committed
849
  boolean_t RA_active;
850
  /// Size of DCI for RA-Response (bytes)
851
  uint8_t RA_dci_size_bytes1;
852
  /// Size of DCI for RA-Response (bits)
853
  uint8_t RA_dci_size_bits1;
854
  /// Actual DCI to transmit for RA-Response
855
  uint8_t RA_alloc_pdu1[(MAX_DCI_SIZE_BITS>>3)+1];
856
  /// DCI format for RA-Response (should be 1A)
857
  uint8_t RA_dci_fmt1;
858
  /// Size of DCI for Msg4/ContRes (bytes)
859
  uint8_t RA_dci_size_bytes2;
860
  /// Size of DCI for Msg4/ContRes (bits)
861
  uint8_t RA_dci_size_bits2;
862
  /// Actual DCI to transmit for Msg4/ContRes
863
  uint8_t RA_alloc_pdu2[(MAX_DCI_SIZE_BITS>>3)+1];
864
  /// DCI format for Msg4/ContRes (should be 1A)
865
  uint8_t RA_dci_fmt2;
866
  /// Flag to indicate the eNB should generate RAR.  This is triggered by detection of PRACH
867
  uint8_t generate_rar;
868
  /// Subframe where preamble was received
869
  uint8_t preamble_subframe;
870 871 872
  /// Subframe where Msg2 is to be sent
  uint8_t Msg2_subframe;
  /// Frame where Msg2 is to be sent
873
  frame_t Msg2_frame;
874
  /// Subframe where Msg3 is to be sent
875
  sub_frame_t Msg3_subframe;
876
  /// Frame where Msg3 is to be sent
877
  frame_t Msg3_frame;
878
  /// Subframe where Msg4 is to be sent
879
  sub_frame_t Msg4_subframe;
880
  /// Frame where Msg4 is to be sent
881
  frame_t Msg4_frame;
882
  /// Flag to indicate the eNB should generate Msg4 upon reception of SDU from RRC.  This is triggered by first ULSCH reception at eNB for new user.
883
  uint8_t generate_Msg4;
884
  /// Flag to indicate that eNB is waiting for ACK that UE has received Msg3.
885
  uint8_t wait_ack_Msg4;
886 887
  /// harq_pid used for Msg4 transmission
  uint8_t harq_pid;
888
  /// UE RNTI allocated during RAR
889
  rnti_t rnti;
890
  /// RA RNTI allocated from received PRACH
891
  uint16_t RA_rnti;
892
  /// Received preamble_index
893
  uint8_t preamble_index;
894
  /// Received UE Contention Resolution Identifier
895
  uint8_t cont_res_id[6];
896
  /// Timing offset indicated by PHY
897
  int16_t timing_offset;
898
  /// Timeout for RRC connection
899
  int16_t RRC_timer;
900 901 902 903 904 905
  /// Msg3 first RB
  uint8_t msg3_first_rb;
  /// Msg3 number of RB
  uint8_t msg3_nb_rb;
  /// Msg3 MCS
  uint8_t msg3_mcs;
906 907 908 909 910 911
  /// Msg3 TPC command
  uint8_t msg3_TPC;
  /// Msg3 ULdelay command
  uint8_t msg3_ULdelay;
  /// Msg3 cqireq command
  uint8_t msg3_cqireq;
912 913
  /// Round of Msg3 HARQ
  uint8_t msg3_round;
914
  /// TBS used for Msg4
915
  int msg4_TBsize;
916
  /// MCS used for Msg4
917
  int msg4_mcs;
918 919 920 921 922 923 924
#ifdef Rel14
  uint8_t rach_resource_type;
  uint8_t msg2_mpdcch_repetition_cnt;
  uint8_t msg4_mpdcch_repetition_cnt;
  uint8_t msg2_narrowband;
  uint8_t msg34_narrowband;
#endif
925 926 927
} RA_TEMPLATE;


928
/*! \brief subband bitmap confguration (for ALU icic algo purpose), in test phase */
929 930 931 932 933 934 935
typedef struct {
  uint8_t sbmap[NUMBER_OF_SUBBANDS_MAX]; //13 = number of SB MAX for 100 PRB
  uint8_t periodicity;
  uint8_t first_subframe;
  uint8_t sb_size;
  uint8_t nb_active_sb;
} SBMAP_CONF;
936
/*! \brief UE list used by eNB to order UEs/CC for scheduling*/ 
937
typedef struct {
938
  /// Dedicated information for UEs
939
  struct PhysicalConfigDedicated  *physicalConfigDedicated[MAX_NUM_CCs][NUMBER_OF_UE_MAX];
940
  /// DLSCH pdu 
Raymond Knopp's avatar
 
Raymond Knopp committed
941 942 943 944 945
  DLSCH_PDU DLSCH_pdu[MAX_NUM_CCs][2][NUMBER_OF_UE_MAX];
  /// DCI template and MAC connection parameters for UEs
  UE_TEMPLATE UE_template[MAX_NUM_CCs][NUMBER_OF_UE_MAX];
  /// DCI template and MAC connection for RA processes
  int pCC_id[NUMBER_OF_UE_MAX];
946
  /// sorted downlink component carrier for the scheduler 
Raymond Knopp's avatar
 
Raymond Knopp committed
947
  int ordered_CCids[MAX_NUM_CCs][NUMBER_OF_UE_MAX];
948
  /// number of downlink active component carrier 
Raymond Knopp's avatar
 
Raymond Knopp committed
949
  int numactiveCCs[NUMBER_OF_UE_MAX];
950
  /// sorted uplink component carrier for the scheduler 
Raymond Knopp's avatar
 
Raymond Knopp committed
951
  int ordered_ULCCids[MAX_NUM_CCs][NUMBER_OF_UE_MAX];
952
  /// number of uplink active component carrier 
Raymond Knopp's avatar
 
Raymond Knopp committed
953
  int numactiveULCCs[NUMBER_OF_UE_MAX];
954
  /// number of downlink active component carrier 
955
  uint8_t dl_CC_bitmap[NUMBER_OF_UE_MAX];
956
  /// eNB to UE statistics
Raymond Knopp's avatar
 
Raymond Knopp committed
957
  eNB_UE_STATS eNB_UE_stats[MAX_NUM_CCs][NUMBER_OF_UE_MAX];
958
  /// scheduling control info
Raymond Knopp's avatar
 
Raymond Knopp committed
959 960
  UE_sched_ctrl UE_sched_ctrl[NUMBER_OF_UE_MAX];
  int next[NUMBER_OF_UE_MAX];
961
  int head;
962 963
  int next_ul[NUMBER_OF_UE_MAX];
  int head_ul;
Raymond Knopp's avatar
 
Raymond Knopp committed
964 965 966 967
  int avail;
  int num_UEs;
  boolean_t active[NUMBER_OF_UE_MAX];
} UE_list_t;
968

969
/*! \brief eNB common channels */ 
970
typedef struct {
971 972 973 974 975 976
  int                              physCellId;
  int                              p_eNB;
  int                              Ncp;
  int                              eutra_band;
  uint32_t                         dl_CarrierFreq;
  BCCH_BCH_Message_t               *mib;
977 978
  RadioResourceConfigCommonSIB_t   *radioResourceConfigCommon;
#ifdef Rel14
979
  RadioResourceConfigCommonSIB_t   *radioResourceConfigCommon_BR;  
980
#endif
981
  TDD_Config_t                     *tdd_Config;
982
  SchedulingInfoList_t             *schedulingInfoList;
983 984
  ARFCN_ValueEUTRA_t               ul_CarrierFreq;
  long                             ul_Bandwidth;
985 986
  /// Outgoing MIB PDU for PHY
  MIB_PDU MIB_pdu;
987 988
  /// Outgoing BCCH pdu for PHY
  BCCH_PDU BCCH_pdu;
989 990
  /// Outgoing BCCH DCI allocation
  uint32_t BCCH_alloc_pdu;
991 992
  /// Outgoing CCCH pdu for PHY
  CCCH_PDU CCCH_pdu;
993 994 995
  /// Outgoing RAR pdu for PHY
  RAR_PDU RAR_pdu;
  /// Template for RA computations
996
  RA_TEMPLATE RA_template[NB_RA_PROC_MAX];
997 998
  /// VRB map for common channels
  uint8_t vrb_map[100];
999 1000
  /// VRB map for common channels and retransmissions by PHICH
  uint8_t vrb_map_UL[100];
1001 1002
  /// MBSFN SubframeConfig
  struct MBSFN_SubframeConfig *mbsfn_SubframeConfig[8];
1003
  /// number of subframe allocation pattern available for MBSFN sync area
1004
  uint8_t num_sf_allocation_pattern;
Cedric Roux's avatar
Cedric Roux committed
1005
#if defined(Rel10) || defined(Rel14)
1006
  /// MBMS Flag
1007
  uint8_t MBMS_flag;
1008 1009 1010
  /// Outgoing MCCH pdu for PHY
  MCCH_PDU MCCH_pdu;
  /// MCCH active flag
1011
  uint8_t msi_active;
1012
  /// MCCH active flag
1013
  uint8_t mcch_active;
1014
  /// MTCH active flag
1015
  uint8_t mtch_active;
1016
  /// number of active MBSFN area
1017
  uint8_t num_active_mbsfn_area;
1018 1019 1020 1021 1022 1023 1024 1025 1026
  /// MBSFN Area Info
  struct  MBSFN_AreaInfo_r9 *mbsfn_AreaInfo[MAX_MBSFN_AREA];
  /// PMCH Config
  struct PMCH_Config_r9 *pmch_Config[MAX_PMCH_perMBSFN];
  /// MBMS session info list
  struct MBMS_SessionInfoList_r9 *mbms_SessionList[MAX_PMCH_perMBSFN];
  /// Outgoing MCH pdu for PHY
  MCH_PDU MCH_pdu;
#endif
1027 1028 1029 1030 1031 1032 1033 1034
#ifdef Rel14
  /// Rel13 parameters from SIB1
  SystemInformationBlockType1_v1310_IEs_t *sib1_v13ext;
  /// Counter for SIB1-BR scheduling
  int SIB1_BR_cnt;
  /// Outgoing BCCH-BR pdu for PHY
  BCCH_PDU BCCH_BR_pdu[20];
#endif
1035
} COMMON_channels_t;
1036
/*! \brief top level eNB MAC structure */ 
1037
typedef struct eNB_MAC_INST_s {
1038 1039 1040 1041
  /// Ethernet parameters for northbound midhaul interface
  eth_params_t         eth_params_n;
  /// Ethernet parameters for fronthaul interface
  eth_params_t         eth_params_s;
1042
  ///
1043
  module_id_t Mod_id;
Raymond Knopp's avatar
 
Raymond Knopp committed
1044 1045 1046 1047
  /// frame counter
  frame_t frame;
  /// subframe counter
  sub_frame_t subframe;
1048 1049
  /// Pointer to IF module instance for PHY
  IF_Module_t *if_inst;
Raymond Knopp's avatar
 
Raymond Knopp committed
1050 1051
  /// Common cell resources
  COMMON_channels_t common_channels[MAX_NUM_CCs];
1052
  /// current PDU index (BCH,MCH,DLSCH)
1053
  uint16_t pdu_index[MAX_NUM_CCs];
1054 1055
  /// flag to enable phy-test (disables the scheduler)
  uint16_t phy_test;
1056 1057 1058 1059 1060 1061

  /// NFAPI Config Request Structure
  nfapi_config_request_t config[MAX_NUM_CCs];
  /// Preallocated DL pdu list
  nfapi_dl_config_request_pdu_t dl_config_pdu_list[MAX_NUM_CCs][MAX_NUM_DL_PDU];
  /// NFAPI DL Config Request Structure
1062
  nfapi_dl_config_request_t DL_req[MAX_NUM_CCs];
1063 1064
  /// Preallocated UL pdu list
  nfapi_ul_config_request_pdu_t ul_config_pdu_list[MAX_NUM_CCs][MAX_NUM_UL_PDU];
1065 1066 1067
  /// Preallocated UL pdu list for ULSCH (n+k delay)
  nfapi_ul_config_request_pdu_t ul_config_pdu_list_tmp[MAX_NUM_CCs][10][MAX_NUM_UL_PDU];
  /// NFAPI UL Config Request Structure, send to L1 4 subframes before processing takes place
1068
  nfapi_ul_config_request_t UL_req[MAX_NUM_CCs];
1069 1070
  /// NFAPI "Temporary" UL Config Request Structure, holds future UL_config requests
  nfapi_ul_config_request_t UL_req_tmp[MAX_NUM_CCs][10];
1071 1072 1073
  /// Preallocated HI_DCI0 pdu list 
  nfapi_hi_dci0_request_pdu_t hi_dci0_pdu_list[MAX_NUM_CCs][MAX_NUM_HI_DCI0_PDU];
  /// NFAPI HI/DCI0 Config Request Structure
1074
  nfapi_hi_dci0_request_t HI_DCI0_req[MAX_NUM_CCs];
1075 1076 1077
  /// Prealocated TX pdu list
  nfapi_tx_request_pdu_t tx_request_pdu[MAX_NUM_CCs][MAX_NUM_TX_REQUEST_PDU];
  /// NFAPI DL PDU structure
1078 1079 1080
  nfapi_tx_request_t TX_req[MAX_NUM_CCs];
  /// UL handle
  uint32_t ul_handle;
Raymond Knopp's avatar
 
Raymond Knopp committed
1081
  UE_list_t UE_list;
1082

1083 1084
  ///subband bitmap configuration
  SBMAP_CONF sbmap_conf;
1085 1086
  /// CCE table used to build DCI scheduling information
  int CCE_table[MAX_NUM_CCs][800];
1087
  ///  active flag for Other lcid
1088
  uint8_t lcid_active[NB_RB_MAX];
1089
  /// eNB stats
1090
  eNB_STATS eNB_stats[MAX_NUM_CCs];
1091
  // MAC function execution peformance profiler
1092
  /// processing time of eNB scheduler 
1093
  time_stats_t eNB_scheduler;
1094
  /// processing time of eNB scheduler for SI 
1095
  time_stats_t schedule_si;
1096
  /// processing time of eNB scheduler for Random access
1097
  time_stats_t schedule_ra;
1098
  /// processing time of eNB ULSCH scheduler 
1099
  time_stats_t schedule_ulsch;
1100
  /// processing time of eNB DCI generation
1101
  time_stats_t fill_DLSCH_dci;
1102
  /// processing time of eNB MAC preprocessor
1103
  time_stats_t schedule_dlsch_preprocessor;
1104
  /// processing time of eNB DLSCH scheduler 
1105
  time_stats_t schedule_dlsch; // include rlc_data_req + MAC header + preprocessor
1106
  /// processing time of eNB MCH scheduler 
1107
  time_stats_t schedule_mch;
1108
  /// processing time of eNB ULSCH reception
1109
  time_stats_t rx_ulsch_sdu; // include rlc_data_ind
1110
} eNB_MAC_INST;
1111

1112 1113 1114 1115
/* 
 * UE part 
 */ 

1116 1117 1118 1119 1120 1121 1122 1123 1124
typedef enum {
  TYPE0,
  TYPE1,
  TYPE1A,
  TYPE2,
  TYPE2A,
  TYPEUESPEC
} MPDCCH_TYPES_t;

1125 1126 1127 1128 1129 1130 1131 1132 1133
/*!\brief UE layer 2 status */
typedef enum {
  CONNECTION_OK=0,
  CONNECTION_LOST,
  PHY_RESYNCH,
  PHY_HO_PRACH
} UE_L2_STATE_t;

/*!\brief UE scheduling info */
1134 1135
typedef struct {
  /// buffer status for each lcgid
1136
  uint8_t  BSR[MAX_NUM_LCGID]; // should be more for mesh topology
fnabet's avatar
fnabet committed
1137
  /// keep the number of bytes in rlc buffer for each lcgid
1138
  int32_t  BSR_bytes[MAX_NUM_LCGID];
fnabet's avatar
fnabet committed
1139
  /// after multiplexing buffer remain for each lcid
1140
  int32_t  LCID_buffer_remain[MAX_NUM_LCID];
calvin wang's avatar
calvin wang committed
1141 1142
  /// sum of all lcid buffer size
  uint16_t  All_lcid_buffer_size_lastTTI;
1143
  /// buffer status for each lcid
1144
  uint8_t  LCID_status[MAX_NUM_LCID];
1145
  /// SR pending as defined in 36.321
1146
  uint8_t  SR_pending;
1147
  /// SR_COUNTER as defined in 36.321
1148
  uint16_t SR_COUNTER;
1149
  /// logical channel group ide for each LCID
1150
  uint8_t  LCGID[MAX_NUM_LCID];
1151
  /// retxBSR-Timer, default value is sf2560
1152
  uint16_t retxBSR_Timer;
1153
  /// retxBSR_SF, number of subframe before triggering a regular BSR
hbilel's avatar
hbilel committed
1154
  uint16_t retxBSR_SF;
1155
  /// periodicBSR-Timer, default to infinity
1156
  uint16_t periodicBSR_Timer;
1157
  /// periodicBSR_SF, number of subframe before triggering a periodic BSR
hbilel's avatar
hbilel committed
1158
  uint16_t periodicBSR_SF;
1159
  /// default value is 0: not configured
1160
  uint16_t sr_ProhibitTimer;
1161
  /// sr ProhibitTime running
1162
  uint8_t sr_ProhibitTimer_Running;
1163
  ///  default value to n5
1164
  uint16_t maxHARQ_Tx;
1165
  /// default value is false
1166
  uint16_t ttiBundling;
1167
  /// default value is release
1168 1169 1170 1171
  struct DRX_Config *drx_config;
  /// default value is release
  struct MAC_MainConfig__phr_Config *phr_config;
  ///timer before triggering a periodic PHR
1172
  uint16_t periodicPHR_Timer;
1173
  ///timer before triggering a prohibit PHR
1174
  uint16_t prohibitPHR_Timer;
1175
  ///DL Pathloss change value
1176
  uint16_t PathlossChange;
1177
  ///number of subframe before triggering a periodic PHR
1178
  int16_t periodicPHR_SF;
1179
  ///number of subframe before triggering a prohibit PHR
1180
  int16_t prohibitPHR_SF;
1181
  ///DL Pathloss Change in db
1182
  uint16_t PathlossChange_db;
fnabet's avatar
fnabet committed
1183 1184 1185 1186 1187 1188

  /// default value is false
  uint16_t extendedBSR_Sizes_r10;
  /// default value is false
  uint16_t extendedPHR_r10;

1189
  //Bj bucket usage per  lcid
1190
  int16_t Bj[MAX_NUM_LCID];
1191
  // Bucket size per lcid
1192
  int16_t bucket_size[MAX_NUM_LCID];
1193
} UE_SCHEDULING_INFO;
1194
/*!\brief Top level UE MAC structure */
1195
typedef struct {
1196
  uint16_t Node_id;
1197 1198 1199 1200 1201 1202 1203 1204
  /// RX frame counter
  frame_t     rxFrame;
  /// RX subframe counter
  sub_frame_t rxSubframe;
  /// TX frame counter
  frame_t     txFrame;
  /// TX subframe counter
  sub_frame_t txSubframe;
1205
  /// C-RNTI of UE
1206
  uint16_t crnti;
1207
  /// C-RNTI of UE before HO
1208
  rnti_t crnti_before_ho; ///user id (rnti) of connected UEs
1209 1210
  /// uplink active flag
  uint8_t ul_active;
1211
  /// pointer to RRC PHY configuration
1212
  RadioResourceConfigCommonSIB_t *radioResourceConfigCommon;
1213
  /// pointer to RACH_ConfigDedicated (NULL when not active, i.e. upon HO completion or T304 expiry)
1214 1215
  struct RACH_ConfigDedicated *rach_ConfigDedicated;
  /// pointer to RRC PHY configuration
1216
  struct PhysicalConfigDedicated *physicalConfigDedicated;
Cedric Roux's avatar
Cedric Roux committed
1217
#if defined(Rel10) || defined(Rel14)
1218 1219 1220
  /// pointer to RRC PHY configuration SCEll
  struct PhysicalConfigDedicatedSCell_r10 *physicalConfigDedicatedSCell_r10;
#endif
1221 1222 1223
  /// pointer to TDD Configuration (NULL for FDD)
  TDD_Config_t *tdd_Config;
  /// Number of adjacent cells to measure
1224
  uint8_t  n_adj_cells;
1225
  /// Array of adjacent physical cell ids
1226
  uint32_t adj_cell_id[6];
1227 1228 1229 1230 1231 1232
  /// Pointer to RRC MAC configuration
  MAC_MainConfig_t *macConfig;
  /// Pointer to RRC Measurement gap configuration
  MeasGapConfig_t  *measGapConfig;
  /// Pointers to LogicalChannelConfig indexed by LogicalChannelIdentity. Note NULL means LCHAN is inactive.
  LogicalChannelConfig_t *logicalChannelConfig[MAX_NUM_LCID];
1233
  /// Scheduling Information
1234 1235 1236
  UE_SCHEDULING_INFO scheduling_info;
  /// Outgoing CCCH pdu for PHY
  CCCH_PDU CCCH_pdu;
1237 1238
  /// Outgoing RAR pdu for PHY
  RAR_PDU RAR_pdu;
1239
  /// Incoming DLSCH pdu for PHY
1240
  DLSCH_PDU DLSCH_pdu[NUMBER_OF_UE_MAX][2];
1241
  /// number of attempt for rach
1242
  uint8_t RA_attempt_number;
1243
  /// Random-access procedure flag
1244
  uint8_t RA_active;
1245
  /// Random-access window counter
1246
  int8_t RA_window_cnt;
1247
  /// Random-access Msg3 size in bytes
1248
  uint8_t RA_Msg3_size;
1249
  /// Random-access prachMaskIndex
1250
  uint8_t RA_prachMaskIndex;
1251
  /// Flag indicating Preamble set (A,B) used for first Msg3 transmission
1252
  uint8_t RA_usedGroupA;
1253 1254 1255
  /// Random-access Resources
  PRACH_RESOURCES_t RA_prach_resources;
  /// Random-access PREAMBLE_TRANSMISSION_COUNTER
1256
  uint8_t RA_PREAMBLE_TRANSMISSION_COUNTER;
1257
  /// Random-access backoff counter
1258
  int16_t RA_backoff_cnt;
1259
  /// Random-access variable for window calculation (frame of last change in window counter)
1260
  uint32_t RA_tx_frame;
1261
  /// Random-access variable for window calculation (subframe of last change in window counter)
1262
  uint8_t RA_tx_subframe;
1263 1264
  /// Random-access Group B maximum path-loss
  /// Random-access variable for backoff (frame of last change in backoff counter)
1265
  uint32_t RA_backoff_frame;
1266
  /// Random-access variable for backoff (subframe of last change in backoff counter)
1267
  uint8_t RA_backoff_subframe;
1268
  /// Random-access Group B maximum path-loss
1269
  uint16_t RA_maxPL;
1270
  /// Random-access Contention Resolution Timer active flag
1271
  uint8_t RA_contention_resolution_timer_active;
1272
  /// Random-access Contention Resolution Timer count value
1273
  uint8_t RA_contention_resolution_cnt;
1274
  /// power headroom reporitng reconfigured
1275
  uint8_t PHR_reconfigured;
1276
  /// power headroom state as configured by the higher layers
1277
  uint8_t PHR_state;
1278
  /// power backoff due to power management (as allowed by P-MPRc) for this cell
1279
  uint8_t PHR_reporting_active;
1280
  /// power backoff due to power management (as allowed by P-MPRc) for this cell
1281
  uint8_t power_backoff_db[NUMBER_OF_eNB_MAX];
fnabet's avatar
fnabet committed
1282 1283
  /// BSR report falg management
  uint8_t BSR_reporting_active;
calvin wang's avatar
calvin wang committed
1284 1285
  /// retxBSR-Timer expires flag
  uint8_t retxBSRTimer_expires_flag;
1286 1287 1288
  /// periodBSR-Timer expires flag
  uint8_t periodBSRTimer_expires_flag;

1289
  /// MBSFN_Subframe Configuration
1290
  struct MBSFN_SubframeConfig *mbsfn_SubframeConfig[8]; // FIXME replace 8 by MAX_MBSFN_AREA?
1291
  /// number of subframe allocation pattern available for MBSFN sync area
1292
  uint8_t num_sf_allocation_pattern;
Cedric Roux's avatar
Cedric Roux committed
1293
#if defined(Rel10) || defined(Rel14)
1294
  /// number of active MBSFN area
1295
  uint8_t num_active_mbsfn_area;
1296 1297 1298 1299 1300
  /// MBSFN Area Info
  struct  MBSFN_AreaInfo_r9 *mbsfn_AreaInfo[MAX_MBSFN_AREA];
  /// PMCH Config
  struct PMCH_Config_r9 *pmch_Config[MAX_PMCH_perMBSFN];
  /// MCCH status
1301
  uint8_t mcch_status;
1302
  /// MSI status
1303
  uint8_t msi_status;// could be an array if there are >1 MCH in one MBSFN area
1304
#endif
1305
  //#ifdef CBA
1306
  /// CBA RNTI for each group 
1307
  uint16_t cba_rnti[NUM_MAX_CBA_GROUP];
1308
  /// last SFN for CBA channel access 
1309
  uint8_t cba_last_access[NUM_MAX_CBA_GROUP];
1310
  //#endif
1311
  /// total UE scheduler processing time 
1312
  time_stats_t ue_scheduler; // total
1313 1314 1315 1316 1317
  /// UE ULSCH tx  processing time inlcuding RLC interface (rlc_data_req) and mac header generation 
  time_stats_t tx_ulsch_sdu;  
  /// UE DLSCH rx  processing time inlcuding RLC interface (mac_rrc_data_ind or mac_rlc_status_ind+mac_rlc_data_ind) and mac header parser
  time_stats_t rx_dlsch_sdu ; 
  /// UE query for MCH subframe processing time 
1318
  time_stats_t ue_query_mch;
1319
  /// UE MCH rx processing time 
1320
  time_stats_t rx_mch_sdu;
1321 1322
  /// UE BCCH rx processing time including RLC interface (mac_rrc_data_ind) 
  time_stats_t rx_si; 
1323 1324
  /// UE PCCH rx processing time including RLC interface (mac_rrc_data_ind) 
  time_stats_t rx_p; 
1325
} UE_MAC_INST;
1326
/*! \brief ID of the neighboring cells used for HO*/
1327
typedef struct {
1328 1329
  uint16_t cell_ids[6];
  uint8_t n_adj_cells;
1330 1331
} neigh_cell_id_t;

1332
#include "proto.h"
1333
/*@}*/
1334
#endif /*__LAYER2_MAC_DEFS_H__ */
1335 1336 1337