pre_processor.c 77.1 KB
Newer Older
1 2 3 4 5
/*
 * Licensed to the OpenAirInterface (OAI) Software Alliance under one or more
 * contributor license agreements.  See the NOTICE file distributed with
 * this work for additional information regarding copyright ownership.
 * The OpenAirInterface Software Alliance licenses this file to You under
6
 * the OAI Public License, Version 1.1  (the "License"); you may not use this file
7 8 9 10 11 12 13 14 15 16 17 18 19 20
 * except in compliance with the License.
 * You may obtain a copy of the License at
 *
 *      http://www.openairinterface.org/?page_id=698
 *
 * Unless required by applicable law or agreed to in writing, software
 * distributed under the License is distributed on an "AS IS" BASIS,
 * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
 * See the License for the specific language governing permissions and
 * limitations under the License.
 *-------------------------------------------------------------------------------
 * For more information about the OpenAirInterface (OAI) Software Alliance:
 *      contact@openairinterface.org
 */
21 22

/*! \file pre_processor.c
23
 * \brief eNB scheduler preprocessing fuction prior to scheduling
24
 * \author Navid Nikaein and Ankit Bhamri
25
 * \date 2013 - 2014
26
 * \email navid.nikaein@eurecom.fr
27
 * \version 1.0
28 29 30 31
 * @ingroup _mac

 */

32 33 34
#define _GNU_SOURCE
#include <stdlib.h>

35
#include "assertions.h"
36 37 38 39 40 41 42
#include "PHY/defs.h"
#include "PHY/extern.h"

#include "SCHED/defs.h"
#include "SCHED/extern.h"

#include "LAYER2/MAC/defs.h"
43
#include "LAYER2/MAC/proto.h"
44 45
#include "LAYER2/MAC/extern.h"
#include "UTIL/LOG/log.h"
46
#include "UTIL/LOG/vcd_signal_dumper.h"
47 48 49 50 51
#include "UTIL/OPT/opt.h"
#include "OCG.h"
#include "OCG_extern.h"
#include "RRC/LITE/extern.h"
#include "RRC/L2_INTERFACE/openair_rrc_L2_interface.h"
52
#include "rlc.h"
53 54 55 56 57 58


#define DEBUG_eNB_SCHEDULER 1
#define DEBUG_HEADER_PARSING 1
//#define DEBUG_PACKET_TRACE 1

59 60 61 62 63 64 65
extern float    slice_percentage[MAX_NUM_SLICES];
extern float    slice_percentage_uplink[MAX_NUM_SLICES];
extern int      slice_position[MAX_NUM_SLICES*2];
extern uint32_t slice_sorting_policy[MAX_NUM_SLICES];
extern int      slice_accounting_policy[MAX_NUM_SLICES];
extern int      slice_maxmcs[MAX_NUM_SLICES];
extern int      slice_maxmcs_uplink[MAX_NUM_SLICES];
66 67


68 69
//#define ICIC 0

70
/* this function checks that get_eNB_UE_stats returns
Cedric Roux's avatar
Cedric Roux committed
71
 * a non-NULL pointer for all the active CCs of an UE
72
 */
73
/*
74
int phy_stats_exist(module_id_t Mod_id, int rnti)
75 76
{
  int CC_id;
Cedric Roux's avatar
Cedric Roux committed
77 78
  int i;
  int UE_id          = find_UE_id(Mod_id, rnti);
79
  UE_list_t *UE_list = &RC.mac[Mod_id]->UE_list;
Cedric Roux's avatar
Cedric Roux committed
80 81 82 83 84 85 86 87 88 89 90 91
  if (UE_id == -1) {
    LOG_W(MAC, "[eNB %d] UE %x not found, should be there (in phy_stats_exist)\n",
	  Mod_id, rnti);
    return 0;
  }
  if (UE_list->numactiveCCs[UE_id] == 0) {
    LOG_W(MAC, "[eNB %d] UE %x has no active CC (in phy_stats_exist)\n",
	  Mod_id, rnti);
    return 0;
  }
  for (i = 0; i < UE_list->numactiveCCs[UE_id]; i++) {
    CC_id = UE_list->ordered_CCids[i][UE_id];
92 93
    if (mac_xface->get_eNB_UE_stats(Mod_id, CC_id, rnti) == NULL)
      return 0;
94
  }
95 96
  return 1;
}
97
*/
98

99
// This function stores the downlink buffer for all the logical channels
100
void
101 102 103 104
store_dlsch_buffer(module_id_t Mod_id,
                   slice_id_t slice_id,
                   frame_t frameP,
                   sub_frame_t subframeP) {
Cedric Roux's avatar
Cedric Roux committed
105

106 107 108 109 110
  int UE_id, i;
  rnti_t rnti;
  mac_rlc_status_resp_t rlc_status;
  UE_list_t *UE_list = &RC.mac[Mod_id]->UE_list;
  UE_TEMPLATE *UE_template;
Raymond Knopp's avatar
 
Raymond Knopp committed
111

112 113 114
  for (UE_id = 0; UE_id < NUMBER_OF_UE_MAX; UE_id++) {
    if (UE_list->active[UE_id] != TRUE)
      continue;
115

116 117
    if (!ue_slice_membership(UE_id, slice_id))
      continue;
118

119 120
    UE_template =
            &UE_list->UE_template[UE_PCCID(Mod_id, UE_id)][UE_id];
121

122 123 124
    // clear logical channel interface variables
    UE_template->dl_buffer_total = 0;
    UE_template->dl_pdus_total = 0;
125

126 127 128 129 130 131 132 133
    for (i = 0; i < MAX_NUM_LCID; i++) {
      UE_template->dl_buffer_info[i] = 0;
      UE_template->dl_pdus_in_buffer[i] = 0;
      UE_template->dl_buffer_head_sdu_creation_time[i] = 0;
      UE_template->dl_buffer_head_sdu_remaining_size_to_send[i] = 0;
    }

    rnti = UE_RNTI(Mod_id, UE_id);
134

135 136 137 138 139 140 141 142 143 144 145 146 147 148
    for (i = 0; i < MAX_NUM_LCID; i++) {    // loop over all the logical channels

      rlc_status = mac_rlc_status_ind(Mod_id, rnti, Mod_id, frameP, subframeP, ENB_FLAG_YES, MBMS_FLAG_NO, i, 0);
      UE_template->dl_buffer_info[i] = rlc_status.bytes_in_buffer;    //storing the dlsch buffer for each logical channel
      UE_template->dl_pdus_in_buffer[i] = rlc_status.pdus_in_buffer;
      UE_template->dl_buffer_head_sdu_creation_time[i] = rlc_status.head_sdu_creation_time;
      UE_template->dl_buffer_head_sdu_creation_time_max =
              cmax(UE_template->dl_buffer_head_sdu_creation_time_max, rlc_status.head_sdu_creation_time);
      UE_template->dl_buffer_head_sdu_remaining_size_to_send[i] =
              rlc_status.head_sdu_remaining_size_to_send;
      UE_template->dl_buffer_head_sdu_is_segmented[i] =
              rlc_status.head_sdu_is_segmented;
      UE_template->dl_buffer_total += UE_template->dl_buffer_info[i];    //storing the total dlsch buffer
      UE_template->dl_pdus_total += UE_template->dl_pdus_in_buffer[i];
149

Cedric Roux's avatar
Cedric Roux committed
150
#ifdef DEBUG_eNB_SCHEDULER
151

152 153 154 155 156 157 158 159 160 161 162 163
      /* note for dl_buffer_head_sdu_remaining_size_to_send[i] :
       * 0 if head SDU has not been segmented (yet), else remaining size not already segmented and sent
       */
      if (UE_template->dl_buffer_info[i] > 0)
        LOG_D(MAC,
              "[eNB %d][SLICE %d] Frame %d Subframe %d : RLC status for UE %d in LCID%d: total of %d pdus and size %d, head sdu queuing time %d, remaining size %d, is segmeneted %d \n",
              Mod_id, slice_id, frameP, subframeP, UE_id,
              i, UE_template->dl_pdus_in_buffer[i],
              UE_template->dl_buffer_info[i],
              UE_template->dl_buffer_head_sdu_creation_time[i],
              UE_template->dl_buffer_head_sdu_remaining_size_to_send[i],
              UE_template->dl_buffer_head_sdu_is_segmented[i]);
164

Cedric Roux's avatar
Cedric Roux committed
165
#endif
166

167
    }
168

169 170 171 172 173 174 175
    //#ifdef DEBUG_eNB_SCHEDULER
    if (UE_template->dl_buffer_total > 0)
      LOG_D(MAC,
            "[eNB %d] Frame %d Subframe %d : RLC status for UE %d : total DL buffer size %d and total number of pdu %d \n",
            Mod_id, frameP, subframeP, UE_id,
            UE_template->dl_buffer_total,
            UE_template->dl_pdus_total);
176

177 178
    //#endif
  }
179 180
}

181

182
// This function returns the estimated number of RBs required by each UE for downlink scheduling
183 184
void
assign_rbs_required(module_id_t Mod_id,
185 186 187 188 189
                    slice_id_t slice_id,
                    frame_t frameP,
                    sub_frame_t subframe,
                    int min_rb_unit[MAX_NUM_CCs],
                    uint16_t nb_rbs_required[MAX_NUM_CCs][NUMBER_OF_UE_MAX])
190
{
191

192
  uint16_t TBS = 0;
193

194 195 196 197
  int UE_id, n, i, j, CC_id, pCCid, tmp;
  UE_list_t *UE_list = &RC.mac[Mod_id]->UE_list;
  eNB_UE_STATS *eNB_UE_stats, *eNB_UE_stats_i, *eNB_UE_stats_j;
  int N_RB_DL;
198

199 200 201 202 203
  // clear rb allocations across all CC_id
  for (UE_id = 0; UE_id < NUMBER_OF_UE_MAX; UE_id++) {
    if (UE_list->active[UE_id] != TRUE) continue;
    if (!ue_slice_membership(UE_id, slice_id)) continue;
    pCCid = UE_PCCID(Mod_id, UE_id);
204

205 206
    //update CQI information across component carriers
    for (n = 0; n < UE_list->numactiveCCs[UE_id]; n++) {
207

208 209 210
      CC_id = UE_list->ordered_CCids[n][UE_id];
      eNB_UE_stats = &UE_list->eNB_UE_stats[CC_id][UE_id];
      eNB_UE_stats->dlsch_mcs1 = cmin(cqi_to_mcs[UE_list->UE_sched_ctrl[UE_id].dl_cqi[CC_id]], slice_maxmcs[slice_id]);
211

212
    }
213

214 215 216 217 218 219 220 221 222 223 224 225 226
    // provide the list of CCs sorted according to MCS
    for (i = 0; i < UE_list->numactiveCCs[UE_id]; ++i) {
      eNB_UE_stats_i = &UE_list->eNB_UE_stats[UE_list->ordered_CCids[i][UE_id]][UE_id];
      for (j = i + 1; j < UE_list->numactiveCCs[UE_id]; j++) {
        DevAssert(j < MAX_NUM_CCs);
        eNB_UE_stats_j = &UE_list->eNB_UE_stats[UE_list->ordered_CCids[j][UE_id]][UE_id];
        if (eNB_UE_stats_j->dlsch_mcs1 > eNB_UE_stats_i->dlsch_mcs1) {
          tmp = UE_list->ordered_CCids[i][UE_id];
          UE_list->ordered_CCids[i][UE_id] = UE_list->ordered_CCids[j][UE_id];
          UE_list->ordered_CCids[j][UE_id] = tmp;
        }
      }
    }
227

228 229
    if (UE_list->UE_template[pCCid][UE_id].dl_buffer_total > 0) {
      LOG_D(MAC, "[preprocessor] assign RB for UE %d\n", UE_id);
230

231 232 233
      for (i = 0; i < UE_list->numactiveCCs[UE_id]; i++) {
        CC_id = UE_list->ordered_CCids[i][UE_id];
        eNB_UE_stats = &UE_list->eNB_UE_stats[CC_id][UE_id];
234

235 236 237 238 239
        if (eNB_UE_stats->dlsch_mcs1 == 0) {
          nb_rbs_required[CC_id][UE_id] = 4;    // don't let the TBS get too small
        } else {
          nb_rbs_required[CC_id][UE_id] = min_rb_unit[CC_id];
        }
240

241
        TBS = get_TBS_DL(eNB_UE_stats->dlsch_mcs1, nb_rbs_required[CC_id][UE_id]);
242

243 244 245 246 247 248
        LOG_D(MAC,
              "[preprocessor] start RB assignement for UE %d CC_id %d dl buffer %d (RB unit %d, MCS %d, TBS %d) \n",
              UE_id, CC_id,
              UE_list->UE_template[pCCid][UE_id].dl_buffer_total,
              nb_rbs_required[CC_id][UE_id],
              eNB_UE_stats->dlsch_mcs1, TBS);
249

250
        N_RB_DL = to_prb(RC.mac[Mod_id]->common_channels[CC_id].mib->message.dl_Bandwidth);
251

252
        UE_list->UE_sched_ctrl[UE_id].max_rbs_allowed_slice[CC_id][slice_id] =
253
                nb_rbs_allowed_slice(slice_percentage[slice_id], N_RB_DL);
254

255 256 257 258 259 260 261 262 263 264 265 266 267 268 269 270 271 272
        /* calculating required number of RBs for each UE */
        while (TBS < UE_list->UE_template[pCCid][UE_id].dl_buffer_total) {
          nb_rbs_required[CC_id][UE_id] += min_rb_unit[CC_id];

          if (nb_rbs_required[CC_id][UE_id] > UE_list->UE_sched_ctrl[UE_id].max_rbs_allowed_slice[CC_id][slice_id]) {
            TBS = get_TBS_DL(eNB_UE_stats->dlsch_mcs1, UE_list->UE_sched_ctrl[UE_id].max_rbs_allowed_slice[CC_id][slice_id]);
            nb_rbs_required[CC_id][UE_id] = UE_list->UE_sched_ctrl[UE_id].max_rbs_allowed_slice[CC_id][slice_id];
            break;
          }
          TBS = get_TBS_DL(eNB_UE_stats->dlsch_mcs1, nb_rbs_required[CC_id][UE_id]);
        } // end of while

        LOG_D(MAC,
              "[eNB %d] Frame %d: UE %d on CC %d: RB unit %d,  nb_required RB %d (TBS %d, mcs %d)\n",
              Mod_id, frameP, UE_id, CC_id, min_rb_unit[CC_id],
              nb_rbs_required[CC_id][UE_id], TBS,
              eNB_UE_stats->dlsch_mcs1);
      }
Raymond Knopp's avatar
 
Raymond Knopp committed
273
    }
274
  }
Raymond Knopp's avatar
 
Raymond Knopp committed
275
}
276 277


Raymond Knopp's avatar
 
Raymond Knopp committed
278
// This function scans all CC_ids for a particular UE to find the maximum round index of its HARQ processes
279 280
int
maxround(module_id_t Mod_id, uint16_t rnti, int frame,
281
         sub_frame_t subframe, uint8_t ul_flag) {
282

283 284 285 286
  uint8_t round, round_max = 0, UE_id;
  int CC_id, harq_pid;
  UE_list_t *UE_list = &RC.mac[Mod_id]->UE_list;
  COMMON_channels_t *cc;
287

288
  for (CC_id = 0; CC_id < MAX_NUM_CCs; CC_id++) {
289

290
    cc = &RC.mac[Mod_id]->common_channels[CC_id];
291

292 293 294 295 296
    UE_id = find_UE_id(Mod_id, rnti);
    if (cc->tdd_Config)
      harq_pid = ((frame * 10) + subframe) % 10;
    else
      harq_pid = ((frame * 10) + subframe) & 7;
297

298 299 300
    round = UE_list->UE_sched_ctrl[UE_id].round[CC_id][harq_pid];
    if (round > round_max) {
      round_max = round;
301
    }
302
  }
303

304
  return round_max;
Raymond Knopp's avatar
 
Raymond Knopp committed
305
}
306

Raymond Knopp's avatar
 
Raymond Knopp committed
307
// This function scans all CC_ids for a particular UE to find the maximum DL CQI
308
// it returns -1 if the UE is not found in PHY layer (get_eNB_UE_stats gives NULL)
309 310 311 312
int maxcqi(module_id_t Mod_id, int32_t UE_id) {
  UE_list_t *UE_list = &RC.mac[Mod_id]->UE_list;
  int CC_id, n;
  int CQI = 0;
313

314 315
  for (n = 0; n < UE_list->numactiveCCs[UE_id]; n++) {
    CC_id = UE_list->ordered_CCids[n][UE_id];
316

317 318
    if (UE_list->UE_sched_ctrl[UE_id].dl_cqi[CC_id] > CQI) {
      CQI = UE_list->UE_sched_ctrl[UE_id].dl_cqi[CC_id];
319
    }
320
  }
321

322
  return CQI;
Raymond Knopp's avatar
 
Raymond Knopp committed
323
}
324

325
struct sort_ue_dl_params {
326 327 328
    int Mod_idP;
    int frameP;
    int subframeP;
329
    int slice_id;
330
};
331

332 333
static int ue_dl_compare(const void *_a, const void *_b, void *_params)
{
334 335
  struct sort_ue_dl_params *params = _params;
  UE_list_t *UE_list = &RC.mac[params->Mod_idP]->UE_list;
336

337 338 339 340
  int i;
  int slice_id = params->slice_id;
  int UE_id1 = *(const int *) _a;
  int UE_id2 = *(const int *) _b;
341

342 343 344
  int rnti1 = UE_RNTI(params->Mod_idP, UE_id1);
  int pCC_id1 = UE_PCCID(params->Mod_idP, UE_id1);
  int round1 = maxround(params->Mod_idP, rnti1, params->frameP, params->subframeP, 1);
345

346 347 348
  int rnti2 = UE_RNTI(params->Mod_idP, UE_id2);
  int pCC_id2 = UE_PCCID(params->Mod_idP, UE_id2);
  int round2 = maxround(params->Mod_idP, rnti2, params->frameP, params->subframeP, 1);
349

350 351
  int cqi1 = maxcqi(params->Mod_idP, UE_id1);
  int cqi2 = maxcqi(params->Mod_idP, UE_id2);
352

353 354 355 356 357 358 359 360 361 362 363 364 365 366 367 368 369 370 371 372 373 374 375 376 377 378 379 380 381 382 383 384 385 386 387 388 389 390 391 392 393 394 395 396 397 398 399 400 401 402 403
  for (i = 0; i < CR_NUM; ++i) {
    switch (UE_list->sorting_criteria[slice_id][i]) {

      case CR_ROUND :
        if (round1 > round2)
          return -1;
        if (round1 < round2)
          return 1;
        break;

      case CR_SRB12 :
        if (UE_list->UE_template[pCC_id1][UE_id1].dl_buffer_info[1] +
            UE_list->UE_template[pCC_id1][UE_id1].dl_buffer_info[2] >
            UE_list->UE_template[pCC_id2][UE_id2].dl_buffer_info[1] +
            UE_list->UE_template[pCC_id2][UE_id2].dl_buffer_info[2])
          return -1;
        if (UE_list->UE_template[pCC_id1][UE_id1].dl_buffer_info[1] +
            UE_list->UE_template[pCC_id1][UE_id1].dl_buffer_info[2] <
            UE_list->UE_template[pCC_id2][UE_id2].dl_buffer_info[1] +
            UE_list->UE_template[pCC_id2][UE_id2].dl_buffer_info[2])
          return 1;
        break;

      case CR_HOL :
        if (UE_list-> UE_template[pCC_id1][UE_id1].dl_buffer_head_sdu_creation_time_max >
            UE_list-> UE_template[pCC_id2][UE_id2].dl_buffer_head_sdu_creation_time_max)
          return -1;
        if (UE_list-> UE_template[pCC_id1][UE_id1].dl_buffer_head_sdu_creation_time_max <
            UE_list-> UE_template[pCC_id2][UE_id2].dl_buffer_head_sdu_creation_time_max)
          return 1;
        break;

      case CR_LC :
        if (UE_list->UE_template[pCC_id1][UE_id1].dl_buffer_total >
            UE_list->UE_template[pCC_id2][UE_id2].dl_buffer_total)
          return -1;
        if (UE_list->UE_template[pCC_id1][UE_id1].dl_buffer_total <
            UE_list->UE_template[pCC_id2][UE_id2].dl_buffer_total)
          return 1;
        break;

      case CR_CQI :
        if (cqi1 > cqi2)
          return -1;
        if (cqi1 < cqi2)
          return 1;

      default :
        break;
    }
  }
404 405

    return 0;
406
#if 0
407 408 409 410 411 412 413 414 415 416 417 418 419 420 421 422 423 424 425 426 427 428 429 430 431 432 433 434
    /* The above order derives from the following.  */
    if (round2 > round1) {	// Check first if one of the UEs has an active HARQ process which needs service and swap order
	swap_UEs(UE_list, UE_id1, UE_id2, 0);
    } else if (round2 == round1) {
	// RK->NN : I guess this is for fairness in the scheduling. This doesn't make sense unless all UEs have the same configuration of logical channels.  This should be done on the sum of all information that has to be sent.  And still it wouldn't ensure fairness.  It should be based on throughput seen by each UE or maybe using the head_sdu_creation_time, i.e. swap UEs if one is waiting longer for service.
	//  for(j=0;j<MAX_NUM_LCID;j++){
	//    if (eNB_mac_inst[Mod_id][pCC_id1].UE_template[UE_id1].dl_buffer_info[j] <
	//      eNB_mac_inst[Mod_id][pCC_id2].UE_template[UE_id2].dl_buffer_info[j]){

	// first check the buffer status for SRB1 and SRB2

	if ((UE_list->UE_template[pCC_id1][UE_id1].dl_buffer_info[1] +
	     UE_list->UE_template[pCC_id1][UE_id1].dl_buffer_info[2]) <
	    (UE_list->UE_template[pCC_id2][UE_id2].dl_buffer_info[1] +
	     UE_list->UE_template[pCC_id2][UE_id2].dl_buffer_info[2])) {
	    swap_UEs(UE_list, UE_id1, UE_id2, 0);
	} else if (UE_list->UE_template[pCC_id1]
		   [UE_id1].dl_buffer_head_sdu_creation_time_max <
		   UE_list->UE_template[pCC_id2]
		   [UE_id2].dl_buffer_head_sdu_creation_time_max) {
	    swap_UEs(UE_list, UE_id1, UE_id2, 0);
	} else if (UE_list->UE_template[pCC_id1][UE_id1].dl_buffer_total <
		   UE_list->UE_template[pCC_id2][UE_id2].dl_buffer_total) {
	    swap_UEs(UE_list, UE_id1, UE_id2, 0);
	} else if (cqi1 < cqi2) {
	    swap_UEs(UE_list, UE_id1, UE_id2, 0);
	}
    }
435 436
#endif
}
437

438
void decode_sorting_policy(module_id_t Mod_idP, slice_id_t slice_id) {
439 440 441 442 443 444 445 446 447 448 449 450 451 452 453 454
  int i;

  UE_list_t *UE_list = &RC.mac[Mod_idP]->UE_list;
  uint32_t policy = slice_sorting_policy[slice_id];
  uint32_t mask = 0x0000000F;
  uint16_t criterion;

  for (i = 0; i < CR_NUM; ++i) {
    criterion = (uint16_t) (policy >> 4 * (CR_NUM - 1 - i) & mask);
    if (criterion >= CR_NUM) {
      LOG_W(MAC, "Invalid criterion in slice %d policy, revert to default policy \n", slice_id);
      slice_sorting_policy[slice_id] = 0x1234;
      break;
    }
    UE_list->sorting_criteria[slice_id][i] = criterion;
  }
455 456
}

457 458 459 460 461 462 463 464 465 466 467 468 469 470 471 472 473 474 475 476 477 478
void decode_slice_positioning(module_id_t Mod_idP,
                              slice_id_t slice_id,
                              uint8_t slice_allocation_mask[MAX_NUM_CCs][N_RBG_MAX]) {
  uint8_t CC_id;
  int RBG, start_frequency, end_frequency;

  // Init slice_alloc_mask
  for (CC_id = 0; CC_id < MAX_NUM_CCs; ++CC_id) {
    for (RBG = 0; RBG < N_RBG_MAX; ++RBG) {
      slice_allocation_mask[CC_id][RBG] = 0;
    }
  }

  start_frequency = slice_position[slice_id*2];
  end_frequency = slice_position[slice_id*2 + 1];
  for (CC_id = 0; CC_id < MAX_NUM_CCs; ++CC_id) {
    for (RBG = start_frequency; RBG <= end_frequency; ++RBG) {
      slice_allocation_mask[CC_id][RBG] = 1;
    }
  }
}

479

Raymond Knopp's avatar
 
Raymond Knopp committed
480
// This fuction sorts the UE in order their dlsch buffer and CQI
481 482 483 484 485
void sort_UEs(module_id_t Mod_idP, slice_id_t slice_id, int frameP, sub_frame_t subframeP) {
  int i;
  int list[NUMBER_OF_UE_MAX];
  int list_size = 0;
  struct sort_ue_dl_params params = {Mod_idP, frameP, subframeP, slice_id};
486

487
  UE_list_t *UE_list = &RC.mac[Mod_idP]->UE_list;
488

489
  for (i = 0; i < NUMBER_OF_UE_MAX; ++i) {
490

491 492 493 494
    if (UE_list->active[i] == FALSE) continue;
    if (UE_RNTI(Mod_idP, i) == NOT_A_RNTI) continue;
    if (UE_list->UE_sched_ctrl[i].ul_out_of_sync == 1) continue;
    if (!ue_slice_membership(i, slice_id)) continue;
495

496 497 498
    list[list_size] = i;
    list_size++;
  }
499

500
  decode_sorting_policy(Mod_idP, slice_id);
501

502
  qsort_r(list, list_size, sizeof(int), ue_dl_compare, &params);
503

504 505 506 507 508 509 510 511
  if (list_size) {
    for (i = 0; i < list_size - 1; ++i)
      UE_list->next[list[i]] = list[i + 1];
    UE_list->next[list[list_size - 1]] = -1;
    UE_list->head = list[0];
  } else {
    UE_list->head = -1;
  }
512 513

#if 0
514 515


516 517 518 519 520 521 522 523 524 525 526 527 528 529 530 531 532 533 534 535 536 537 538 539 540 541 542 543 544 545 546 547 548 549 550 551 552 553 554 555 556 557 558 559 560 561 562 563 564 565 566 567 568 569 570 571 572 573 574 575 576 577 578 579 580 581
    int UE_id1, UE_id2;
    int pCC_id1, pCC_id2;
    int cqi1, cqi2, round1, round2;
    int i = 0, ii = 0;		//,j=0;
    rnti_t rnti1, rnti2;

    UE_list_t *UE_list = &RC.mac[Mod_idP]->UE_list;

    for (i = UE_list->head; i >= 0; i = UE_list->next[i]) {

	for (ii = UE_list->next[i]; ii >= 0; ii = UE_list->next[ii]) {

	    UE_id1 = i;
	    rnti1 = UE_RNTI(Mod_idP, UE_id1);
	    if (rnti1 == NOT_A_RNTI)
		continue;
	    if (UE_list->UE_sched_ctrl[UE_id1].ul_out_of_sync == 1)
		continue;
	    pCC_id1 = UE_PCCID(Mod_idP, UE_id1);
	    cqi1 = maxcqi(Mod_idP, UE_id1);	//
	    round1 = maxround(Mod_idP, rnti1, frameP, subframeP, 0);

	    UE_id2 = ii;
	    rnti2 = UE_RNTI(Mod_idP, UE_id2);
	    if (rnti2 == NOT_A_RNTI)
		continue;
	    if (UE_list->UE_sched_ctrl[UE_id2].ul_out_of_sync == 1)
		continue;
	    cqi2 = maxcqi(Mod_idP, UE_id2);
	    round2 = maxround(Mod_idP, rnti2, frameP, subframeP, 0);	//mac_xface->get_ue_active_harq_pid(Mod_id,rnti2,subframe,&harq_pid2,&round2,0);
	    pCC_id2 = UE_PCCID(Mod_idP, UE_id2);

	    if (round2 > round1) {	// Check first if one of the UEs has an active HARQ process which needs service and swap order
		swap_UEs(UE_list, UE_id1, UE_id2, 0);
	    } else if (round2 == round1) {
		// RK->NN : I guess this is for fairness in the scheduling. This doesn't make sense unless all UEs have the same configuration of logical channels.  This should be done on the sum of all information that has to be sent.  And still it wouldn't ensure fairness.  It should be based on throughput seen by each UE or maybe using the head_sdu_creation_time, i.e. swap UEs if one is waiting longer for service.
		//  for(j=0;j<MAX_NUM_LCID;j++){
		//    if (eNB_mac_inst[Mod_id][pCC_id1].UE_template[UE_id1].dl_buffer_info[j] <
		//      eNB_mac_inst[Mod_id][pCC_id2].UE_template[UE_id2].dl_buffer_info[j]){

		// first check the buffer status for SRB1 and SRB2

		if ((UE_list->UE_template[pCC_id1][UE_id1].
		     dl_buffer_info[1] +
		     UE_list->UE_template[pCC_id1][UE_id1].
		     dl_buffer_info[2]) <
		    (UE_list->UE_template[pCC_id2][UE_id2].
		     dl_buffer_info[1] +
		     UE_list->UE_template[pCC_id2][UE_id2].
		     dl_buffer_info[2])) {
		    swap_UEs(UE_list, UE_id1, UE_id2, 0);
		} else if (UE_list->UE_template[pCC_id1]
			   [UE_id1].dl_buffer_head_sdu_creation_time_max <
			   UE_list->UE_template[pCC_id2]
			   [UE_id2].dl_buffer_head_sdu_creation_time_max) {
		    swap_UEs(UE_list, UE_id1, UE_id2, 0);
		} else if (UE_list->UE_template[pCC_id1][UE_id1].
			   dl_buffer_total <
			   UE_list->UE_template[pCC_id2][UE_id2].
			   dl_buffer_total) {
		    swap_UEs(UE_list, UE_id1, UE_id2, 0);
		} else if (cqi1 < cqi2) {
		    swap_UEs(UE_list, UE_id1, UE_id2, 0);
		}
	    }
	}
Raymond Knopp's avatar
 
Raymond Knopp committed
582
    }
583
#endif
584 585
}

586 587 588 589 590 591
void dlsch_scheduler_pre_processor_partitioning(module_id_t Mod_id,
                                                slice_id_t slice_id,
                                                const uint8_t rbs_retx[MAX_NUM_CCs]) {
  int UE_id, CC_id, N_RB_DL, i;
  UE_list_t *UE_list = &RC.mac[Mod_id]->UE_list;
  UE_sched_ctrl *ue_sched_ctl;
592
  uint16_t available_rbs;
593 594 595 596 597 598 599 600 601 602 603 604

  for (UE_id = UE_list->head; UE_id >= 0; UE_id = UE_list->next[UE_id]) {

    if (UE_RNTI(Mod_id, UE_id) == NOT_A_RNTI) continue;
    if (UE_list->UE_sched_ctrl[UE_id].ul_out_of_sync == 1) continue;
    if (!ue_slice_membership(UE_id, slice_id)) continue;

    ue_sched_ctl = &UE_list->UE_sched_ctrl[UE_id];

    for (i = 0; i < UE_num_active_CC(UE_list, UE_id); ++i) {
      CC_id = UE_list->ordered_CCids[i][UE_id];
      N_RB_DL = to_prb(RC.mac[Mod_id]->common_channels[CC_id].mib->message.dl_Bandwidth);
605 606 607 608 609
      available_rbs = nb_rbs_allowed_slice(slice_percentage[slice_id], N_RB_DL);
      if (rbs_retx[CC_id] < available_rbs)
        ue_sched_ctl->max_rbs_allowed_slice[CC_id][slice_id] = available_rbs - rbs_retx[CC_id];
      else
        ue_sched_ctl->max_rbs_allowed_slice[CC_id][slice_id] = 0;
610 611 612 613
    }
  }
}

614 615 616 617 618
void dlsch_scheduler_pre_processor_accounting(module_id_t Mod_id,
                                              slice_id_t slice_id,
                                              frame_t frameP,
                                              sub_frame_t subframeP,
                                              int min_rb_unit[MAX_NUM_CCs],
619
                                              uint16_t nb_rbs_required[MAX_NUM_CCs][NUMBER_OF_UE_MAX],
620
                                              uint16_t nb_rbs_accounted[MAX_NUM_CCs][NUMBER_OF_UE_MAX])
621
{
622 623 624


  int UE_id, CC_id;
625
  int i;
626 627

  rnti_t rnti;
628
  uint8_t harq_pid, round;
629
  uint16_t available_rbs;
630
  uint8_t rbs_retx[MAX_NUM_CCs];
631
  uint16_t average_rbs_per_user[MAX_NUM_CCs];
632
  int total_ue_count[MAX_NUM_CCs];
633 634 635 636
  int ue_count_newtx[MAX_NUM_CCs];
  int ue_count_retx[MAX_NUM_CCs];
  uint8_t ue_retx_flag[MAX_NUM_CCs][NUMBER_OF_UE_MAX];

637 638 639 640
  UE_list_t *UE_list = &RC.mac[Mod_id]->UE_list;
  UE_sched_ctrl *ue_sched_ctl;
  COMMON_channels_t *cc;

641
  // Reset
642
  for (CC_id = 0; CC_id < MAX_NUM_CCs; ++CC_id) {
643
    total_ue_count[CC_id] = 0;
644 645 646
    ue_count_newtx[CC_id] = 0;
    ue_count_retx[CC_id] = 0;
    rbs_retx[CC_id] = 0;
647
    average_rbs_per_user[CC_id] = 0;
648 649 650
    for (UE_id = 0; UE_id < NUMBER_OF_UE_MAX; ++UE_id) {
      ue_retx_flag[CC_id][UE_id] = 0;
    }
651
  }
652

653
  // Find total UE count, and account the RBs required for retransmissions
654 655
  for (UE_id = UE_list->head; UE_id >= 0; UE_id = UE_list->next[UE_id]) {
    rnti = UE_RNTI(Mod_id, UE_id);
656 657 658
    if (rnti == NOT_A_RNTI) continue;
    if (UE_list->UE_sched_ctrl[UE_id].ul_out_of_sync == 1) continue;
    if (!ue_slice_membership(UE_id, slice_id)) continue;
659

660
    for (i = 0; i < UE_num_active_CC(UE_list, UE_id); ++i) {
661
      CC_id = UE_list->ordered_CCids[i][UE_id];
662 663 664 665 666 667 668 669 670
      ue_sched_ctl = &UE_list->UE_sched_ctrl[UE_id];
      cc = &RC.mac[Mod_id]->common_channels[CC_id];
      // TODO Can we use subframe2harqpid() here?
      if (cc->tdd_Config)
        harq_pid = ((frameP * 10) + subframeP) % 10;
      else
        harq_pid = ((frameP * 10) + subframeP) & 7;
      round = ue_sched_ctl->round[CC_id][harq_pid];

671 672 673
      if (nb_rbs_required[CC_id][UE_id] > 0) {
        total_ue_count[CC_id]++;
      }
674 675 676

      if (round != 8) {
        nb_rbs_required[CC_id][UE_id] = UE_list->UE_template[CC_id][UE_id].nb_rb[harq_pid];
677 678 679 680 681
        rbs_retx[CC_id] += nb_rbs_required[CC_id][UE_id];
        ue_count_retx[CC_id]++;
        ue_retx_flag[CC_id][UE_id] = 1;
      } else {
        ue_count_newtx[CC_id]++;
682 683 684
      }
    }
  }
Raymond Knopp's avatar
 
Raymond Knopp committed
685

686 687 688 689
  // PARTITIONING
  // Reduces the available RBs according to slicing configuration
  dlsch_scheduler_pre_processor_partitioning(Mod_id, slice_id, rbs_retx);

690
  switch (slice_accounting_policy[slice_id]) {
691

692 693 694 695 696 697 698
    // If greedy scheduling, try to account all the required RBs
    case 1:
      for (UE_id = UE_list->head; UE_id >= 0; UE_id = UE_list->next[UE_id]) {
        rnti = UE_RNTI(Mod_id, UE_id);
        if (rnti == NOT_A_RNTI) continue;
        if (UE_list->UE_sched_ctrl[UE_id].ul_out_of_sync == 1) continue;
        if (!ue_slice_membership(UE_id, slice_id)) continue;
699

700 701 702 703 704 705 706 707 708 709 710 711 712 713 714 715 716 717 718 719
        for (i = 0; i < UE_num_active_CC(UE_list, UE_id); i++) {
          CC_id = UE_list->ordered_CCids[i][UE_id];
          nb_rbs_accounted[CC_id][UE_id] = nb_rbs_required[CC_id][UE_id];
        }
      }
      break;

    // Use the old, fair algorithm
    // Loop over all active UEs and account the avg number of RBs to each UE, based on all non-retx UEs.
    default:
      // FIXME: This is not ideal, why loop on UEs to find average_rbs_per_user[], that is per-CC?
      // TODO: Look how to loop on active CCs only without using the UE_num_active_CC() function.
      for (UE_id = UE_list->head; UE_id >= 0; UE_id = UE_list->next[UE_id]) {
        rnti = UE_RNTI(Mod_id, UE_id);

        if (rnti == NOT_A_RNTI) continue;
        if (UE_list->UE_sched_ctrl[UE_id].ul_out_of_sync == 1) continue;
        if (!ue_slice_membership(UE_id, slice_id)) continue;

        for (i = 0; i < UE_num_active_CC(UE_list, UE_id); ++i) {
720

721 722 723 724
          CC_id = UE_list->ordered_CCids[i][UE_id];
          ue_sched_ctl = &UE_list->UE_sched_ctrl[UE_id];
          available_rbs = ue_sched_ctl->max_rbs_allowed_slice[CC_id][slice_id];

725
          if (ue_count_newtx[CC_id] == 0) {
726
            average_rbs_per_user[CC_id] = 0;
727 728
          } else if (min_rb_unit[CC_id]*ue_count_newtx[CC_id] <= available_rbs) {
            average_rbs_per_user[CC_id] = (uint16_t)floor(available_rbs/ue_count_newtx[CC_id]);
729 730 731 732 733 734
          } else {
            // consider the total number of use that can be scheduled UE
            average_rbs_per_user[CC_id] = (uint16_t)min_rb_unit[CC_id];
          }
        }
      }
735

736 737 738 739 740 741 742 743 744 745 746 747
      // note: nb_rbs_required is assigned according to total_buffer_dl
      // extend nb_rbs_required to capture per LCID RB required
      for (UE_id = UE_list->head; UE_id >= 0; UE_id = UE_list->next[UE_id]) {
        rnti = UE_RNTI(Mod_id, UE_id);
        if (rnti == NOT_A_RNTI) continue;
        if (UE_list->UE_sched_ctrl[UE_id].ul_out_of_sync == 1) continue;
        if (!ue_slice_membership(UE_id, slice_id)) continue;

        for (i = 0; i < UE_num_active_CC(UE_list, UE_id); i++) {
          CC_id = UE_list->ordered_CCids[i][UE_id];
          nb_rbs_accounted[CC_id][UE_id] = cmin(average_rbs_per_user[CC_id], nb_rbs_required[CC_id][UE_id]);
        }
748
      }
749
      break;
750
  }
Raymond Knopp's avatar
 
Raymond Knopp committed
751

752 753 754 755 756



  // Check retransmissions
  // TODO: Do this once at the beginning
757 758
  for (UE_id = UE_list->head; UE_id >= 0; UE_id = UE_list->next[UE_id]) {
    rnti = UE_RNTI(Mod_id, UE_id);
759 760 761
    if (rnti == NOT_A_RNTI) continue;
    if (UE_list->UE_sched_ctrl[UE_id].ul_out_of_sync == 1) continue;
    if (!ue_slice_membership(UE_id, slice_id)) continue;
762

763 764
    for (i = 0; i < UE_num_active_CC(UE_list, UE_id); i++) {
      CC_id = UE_list->ordered_CCids[i][UE_id];
765 766 767 768 769 770 771 772 773 774 775 776
      ue_sched_ctl = &UE_list->UE_sched_ctrl[UE_id];
      cc = &RC.mac[Mod_id]->common_channels[CC_id];
      // TODO Can we use subframe2harqpid() here?
      if (cc->tdd_Config)
        harq_pid = ((frameP * 10) + subframeP) % 10;
      else
        harq_pid = ((frameP * 10) + subframeP) & 7;
      round = ue_sched_ctl->round[CC_id][harq_pid];

      // control channel or retransmission
      /* TODO: do we have to check for retransmission? */
      if (mac_eNB_get_rrc_status(Mod_id, rnti) < RRC_RECONFIGURED || round > 0) {
777
        nb_rbs_accounted[CC_id][UE_id] = nb_rbs_required[CC_id][UE_id];
778
      }
779
    }
780
  }
781 782 783 784 785 786 787
}

void dlsch_scheduler_pre_processor_positioning(module_id_t Mod_id,
                                               slice_id_t slice_id,
                                               int N_RBG[MAX_NUM_CCs],
                                               int min_rb_unit[MAX_NUM_CCs],
                                               uint16_t nb_rbs_required[MAX_NUM_CCs][NUMBER_OF_UE_MAX],
788
                                               uint16_t nb_rbs_accounted[MAX_NUM_CCs][NUMBER_OF_UE_MAX],
789
                                               uint16_t nb_rbs_remaining[MAX_NUM_CCs][NUMBER_OF_UE_MAX],
790 791 792 793 794 795 796 797 798 799
                                               uint8_t rballoc_sub[MAX_NUM_CCs][N_RBG_MAX],
                                               uint8_t MIMO_mode_indicator[MAX_NUM_CCs][N_RBG_MAX]) {

  int UE_id, CC_id;
  int i;
  uint8_t transmission_mode;
  uint8_t slice_allocation_mask[MAX_NUM_CCs][N_RBG_MAX];
  UE_list_t *UE_list = &RC.mac[Mod_id]->UE_list;

  decode_slice_positioning(Mod_id, slice_id, slice_allocation_mask);
Raymond Knopp's avatar
 
Raymond Knopp committed
800

801 802
  // Try to allocate accounted RBs
  for (UE_id = UE_list->head; UE_id >= 0; UE_id = UE_list->next[UE_id]) {
803

804 805 806
    if (UE_RNTI(Mod_id, UE_id) == NOT_A_RNTI) continue;
    if (UE_list->UE_sched_ctrl[UE_id].ul_out_of_sync == 1) continue;
    if (!ue_slice_membership(UE_id, slice_id)) continue;
807

808 809 810 811 812 813 814 815 816 817 818 819 820 821 822 823 824 825 826 827 828 829 830 831 832 833 834 835
    for (i = 0; i < UE_num_active_CC(UE_list, UE_id); i++) {
      CC_id = UE_list->ordered_CCids[i][UE_id];
      nb_rbs_remaining[CC_id][UE_id] = nb_rbs_accounted[CC_id][UE_id];
      transmission_mode = get_tmode(Mod_id, CC_id, UE_id);

      if (nb_rbs_required[CC_id][UE_id] > 0)
        LOG_D(MAC,
              "Step 1: nb_rbs_remaining[%d][%d]= %d (accounted %d, required %d,  pre_nb_available_rbs %d, N_RBG %d, rb_unit %d)\n",
              CC_id,
              UE_id,
              nb_rbs_remaining[CC_id][UE_id],
              nb_rbs_accounted[CC_id][UE_id],
              nb_rbs_required[CC_id][UE_id],
              UE_list->UE_sched_ctrl[UE_id].pre_nb_available_rbs[CC_id],
              N_RBG[CC_id],
              min_rb_unit[CC_id]);

      LOG_T(MAC, "calling dlsch_scheduler_pre_processor_allocate .. \n ");
      dlsch_scheduler_pre_processor_allocate(Mod_id,
                                             UE_id,
                                             CC_id,
                                             N_RBG[CC_id],
                                             min_rb_unit[CC_id],
                                             nb_rbs_required,
                                             nb_rbs_remaining,
                                             rballoc_sub,
                                             slice_allocation_mask,
                                             MIMO_mode_indicator);
Raymond Knopp's avatar
 
Raymond Knopp committed
836

837
#ifdef TM5
838 839 840 841 842 843 844 845 846 847 848 849 850 851 852 853 854 855 856 857 858 859 860 861 862 863 864 865 866 867 868 869 870 871 872 873 874 875 876 877 878 879 880 881 882 883
      // data chanel TM5: to be revisited
        if ((round == 0) &&
        (transmission_mode == 5) &&
        (ue_sched_ctl->dl_pow_off[CC_id] != 1)) {

        for (j = 0; j < N_RBG[CC_id]; j += 2) {

            if ((((j == (N_RBG[CC_id] - 1))
              && (rballoc_sub[CC_id][j] == 0)
              && (ue_sched_ctl->
                  rballoc_sub_UE[CC_id][j] == 0))
             || ((j < (N_RBG[CC_id] - 1))
                 && (rballoc_sub[CC_id][j + 1] == 0)
                 &&
                 (ue_sched_ctl->rballoc_sub_UE
                  [CC_id][j + 1] == 0)))
            && (nb_rbs_remaining[CC_id][UE_id]
                > 0)) {

            for (i = UE_list->next[UE_id + 1]; i >= 0;
                 i = UE_list->next[i]) {

                UE_id2 = i;
                rnti2 = UE_RNTI(Mod_id, UE_id2);
                ue_sched_ctl2 =
                &UE_list->UE_sched_ctrl[UE_id2];
                round2 = ue_sched_ctl2->round[CC_id];
                if (rnti2 == NOT_A_RNTI)
                continue;
                if (UE_list->
                UE_sched_ctrl
                [UE_id2].ul_out_of_sync == 1)
                continue;

                eNB_UE_stats2 =
                UE_list->
                eNB_UE_stats[CC_id][UE_id2];
                //mac_xface->get_ue_active_harq_pid(Mod_id,CC_id,rnti2,frameP,subframeP,&harq_pid2,&round2,0);

                if ((mac_eNB_get_rrc_status
                 (Mod_id,
                  rnti2) >= RRC_RECONFIGURED)
                && (round2 == 0)
                &&
                (get_tmode(Mod_id, CC_id, UE_id2)
                 == 5)
884
                && (ue_sched_ctl->
885 886 887
                    dl_pow_off[CC_id] != 1)) {

                if ((((j == (N_RBG[CC_id] - 1))
888
                      &&
889 890 891 892 893 894 895 896 897 898 899 900 901 902 903 904 905 906 907 908 909 910 911 912 913 914 915 916 917 918 919 920 921 922 923 924 925 926 927 928 929 930 931 932 933 934 935 936 937 938 939 940 941 942 943 944 945 946 947 948 949 950 951 952 953 954 955 956 957 958 959 960 961 962 963 964 965 966 967 968 969 970 971 972 973 974 975 976 977 978 979 980 981 982 983 984 985 986 987 988 989 990 991 992 993 994 995 996 997
                      (ue_sched_ctl->rballoc_sub_UE
                       [CC_id][j] == 0))
                     || ((j < (N_RBG[CC_id] - 1))
                     &&
                     (ue_sched_ctl->
                      rballoc_sub_UE[CC_id][j +
                                1]
                      == 0)))
                    &&
                    (nb_rbs_remaining
                     [CC_id]
                     [UE_id2] > 0)) {

                    if ((((eNB_UE_stats2->
                       DL_pmi_single ^
                       eNB_UE_stats1->
                       DL_pmi_single)
                      << (14 - j)) & 0xc000) == 0x4000) {	//MU-MIMO only for 25 RBs configuration

                    rballoc_sub[CC_id][j] = 1;
                    ue_sched_ctl->
                        rballoc_sub_UE[CC_id]
                        [j] = 1;
                    ue_sched_ctl2->
                        rballoc_sub_UE[CC_id]
                        [j] = 1;
                    MIMO_mode_indicator[CC_id]
                        [j] = 0;

                    if (j < N_RBG[CC_id] - 1) {
                        rballoc_sub[CC_id][j +
                                   1] =
                        1;
                        ue_sched_ctl->
                        rballoc_sub_UE
                        [CC_id][j + 1] = 1;
                        ue_sched_ctl2->rballoc_sub_UE
                        [CC_id][j + 1] = 1;
                        MIMO_mode_indicator
                        [CC_id][j + 1]
                        = 0;
                    }

                    ue_sched_ctl->
                        dl_pow_off[CC_id]
                        = 0;
                    ue_sched_ctl2->
                        dl_pow_off[CC_id]
                        = 0;


                    if ((j == N_RBG[CC_id] - 1)
                        && ((N_RB_DL == 25)
                        || (N_RB_DL ==
                            50))) {

                        nb_rbs_remaining
                        [CC_id][UE_id] =
                        nb_rbs_remaining
                        [CC_id][UE_id] -
                        min_rb_unit[CC_id]
                        + 1;
                        ue_sched_ctl->pre_nb_available_rbs
                        [CC_id] =
                        ue_sched_ctl->pre_nb_available_rbs
                        [CC_id] +
                        min_rb_unit[CC_id]
                        - 1;
                        nb_rbs_remaining
                        [CC_id][UE_id2] =
                        nb_rbs_remaining
                        [CC_id][UE_id2] -
                        min_rb_unit[CC_id]
                        + 1;
                        ue_sched_ctl2->pre_nb_available_rbs
                        [CC_id] =
                        ue_sched_ctl2->pre_nb_available_rbs
                        [CC_id] +
                        min_rb_unit[CC_id]
                        - 1;
                    } else {

                        nb_rbs_remaining
                        [CC_id][UE_id] =
                        nb_rbs_remaining
                        [CC_id][UE_id] - 4;
                        ue_sched_ctl->pre_nb_available_rbs
                        [CC_id] =
                        ue_sched_ctl->pre_nb_available_rbs
                        [CC_id] + 4;
                        nb_rbs_remaining
                        [CC_id][UE_id2] =
                        nb_rbs_remaining
                        [CC_id][UE_id2] -
                        4;
                        ue_sched_ctl2->pre_nb_available_rbs
                        [CC_id] =
                        ue_sched_ctl2->pre_nb_available_rbs
                        [CC_id] + 4;
                    }

                    break;
                    }
                }
                }
            }
            }
        }
        }
998
#endif
999 1000 1001 1002 1003 1004 1005 1006 1007 1008 1009 1010 1011 1012 1013 1014 1015 1016 1017 1018 1019 1020 1021 1022 1023 1024 1025 1026 1027 1028 1029 1030 1031 1032 1033 1034 1035 1036 1037 1038 1039 1040 1041 1042 1043 1044 1045 1046 1047 1048 1049 1050 1051 1052 1053 1054 1055 1056 1057 1058 1059 1060 1061 1062 1063 1064 1065 1066 1067 1068 1069 1070 1071 1072 1073 1074 1075 1076 1077 1078 1079 1080 1081 1082 1083 1084 1085 1086 1087 1088 1089 1090 1091 1092 1093 1094 1095 1096 1097 1098 1099 1100 1101 1102 1103 1104 1105 1106 1107 1108 1109 1110 1111 1112 1113 1114 1115 1116 1117 1118 1119 1120 1121 1122 1123 1124 1125 1126 1127 1128 1129 1130 1131 1132 1133 1134 1135 1136 1137 1138 1139 1140 1141 1142 1143 1144 1145 1146 1147 1148 1149 1150 1151 1152 1153 1154 1155 1156 1157 1158 1159 1160 1161 1162 1163 1164 1165 1166 1167 1168 1169 1170 1171 1172 1173 1174 1175 1176 1177 1178 1179 1180 1181 1182 1183 1184 1185 1186 1187 1188 1189 1190 1191 1192 1193 1194 1195 1196 1197 1198 1199 1200 1201 1202 1203 1204 1205 1206 1207 1208 1209 1210 1211 1212 1213 1214 1215 1216 1217 1218 1219 1220 1221 1222 1223
    }
  }
}

void dlsch_scheduler_pre_processor_intraslice_sharing(module_id_t Mod_id,
                                                      slice_id_t slice_id,
                                                      int N_RBG[MAX_NUM_CCs],
                                                      int min_rb_unit[MAX_NUM_CCs],
                                                      uint16_t nb_rbs_required[MAX_NUM_CCs][NUMBER_OF_UE_MAX],
                                                      uint16_t nb_rbs_accounted[MAX_NUM_CCs][NUMBER_OF_UE_MAX],
                                                      uint16_t nb_rbs_remaining[MAX_NUM_CCs][NUMBER_OF_UE_MAX],
                                                      uint8_t rballoc_sub[MAX_NUM_CCs][N_RBG_MAX],
                                                      uint8_t MIMO_mode_indicator[MAX_NUM_CCs][N_RBG_MAX]) {

  int UE_id, CC_id;
  int i;
  uint8_t transmission_mode;
  uint8_t slice_allocation_mask[MAX_NUM_CCs][N_RBG_MAX];
  UE_list_t *UE_list = &RC.mac[Mod_id]->UE_list;

  decode_slice_positioning(Mod_id, slice_id, slice_allocation_mask);

  // Remaining RBs are allocated to high priority UEs
  for (UE_id = UE_list->head; UE_id >= 0; UE_id = UE_list->next[UE_id]) {

    if (UE_RNTI(Mod_id, UE_id) == NOT_A_RNTI) continue;
    if (UE_list->UE_sched_ctrl[UE_id].ul_out_of_sync == 1) continue;
    if (!ue_slice_membership(UE_id, slice_id)) continue;

    for (i = 0; i < UE_num_active_CC(UE_list, UE_id); i++) {
      CC_id = UE_list->ordered_CCids[i][UE_id];
      nb_rbs_remaining[CC_id][UE_id] =
              nb_rbs_required[CC_id][UE_id] - nb_rbs_accounted[CC_id][UE_id] + nb_rbs_remaining[CC_id][UE_id];
      if (nb_rbs_remaining[CC_id][UE_id] < 0)
        abort();
      transmission_mode = get_tmode(Mod_id, CC_id, UE_id);

      if (nb_rbs_required[CC_id][UE_id] > 0)
        LOG_D(MAC,
              "Step 2: nb_rbs_remaining[%d][%d]= %d (accounted %d, required %d,  pre_nb_available_rbs %d, N_RBG %d, rb_unit %d)\n",
              CC_id,
              UE_id,
              nb_rbs_remaining[CC_id][UE_id],
              nb_rbs_accounted[CC_id][UE_id],
              nb_rbs_required[CC_id][UE_id],
              UE_list->UE_sched_ctrl[UE_id].pre_nb_available_rbs[CC_id],
              N_RBG[CC_id],
              min_rb_unit[CC_id]);

      LOG_T(MAC, "calling dlsch_scheduler_pre_processor_allocate .. \n ");
      dlsch_scheduler_pre_processor_allocate(Mod_id,
                                             UE_id,
                                             CC_id,
                                             N_RBG[CC_id],
                                             min_rb_unit[CC_id],
                                             nb_rbs_required,
                                             nb_rbs_remaining,
                                             rballoc_sub,
                                             slice_allocation_mask,
                                             MIMO_mode_indicator);

#ifdef TM5
      // data chanel TM5: to be revisited
    if ((round == 0) &&
    (transmission_mode == 5) &&
    (ue_sched_ctl->dl_pow_off[CC_id] != 1)) {

    for (j = 0; j < N_RBG[CC_id]; j += 2) {

        if ((((j == (N_RBG[CC_id] - 1))
          && (rballoc_sub[CC_id][j] == 0)
          && (ue_sched_ctl->
              rballoc_sub_UE[CC_id][j] == 0))
         || ((j < (N_RBG[CC_id] - 1))
             && (rballoc_sub[CC_id][j + 1] == 0)
             &&
             (ue_sched_ctl->rballoc_sub_UE
              [CC_id][j + 1] == 0)))
        && (nb_rbs_remaining[CC_id][UE_id]
            > 0)) {

        for (i = UE_list->next[UE_id + 1]; i >= 0;
             i = UE_list->next[i]) {

            UE_id2 = i;
            rnti2 = UE_RNTI(Mod_id, UE_id2);
            ue_sched_ctl2 =
            &UE_list->UE_sched_ctrl[UE_id2];
            round2 = ue_sched_ctl2->round[CC_id];
            if (rnti2 == NOT_A_RNTI)
            continue;
            if (UE_list->
            UE_sched_ctrl
            [UE_id2].ul_out_of_sync == 1)
            continue;

            eNB_UE_stats2 =
            UE_list->
            eNB_UE_stats[CC_id][UE_id2];
            //mac_xface->get_ue_active_harq_pid(Mod_id,CC_id,rnti2,frameP,subframeP,&harq_pid2,&round2,0);

            if ((mac_eNB_get_rrc_status
             (Mod_id,
              rnti2) >= RRC_RECONFIGURED)
            && (round2 == 0)
            &&
            (get_tmode(Mod_id, CC_id, UE_id2)
             == 5)
            && (ue_sched_ctl->
                dl_pow_off[CC_id] != 1)) {

            if ((((j == (N_RBG[CC_id] - 1))
                  &&
                  (ue_sched_ctl->rballoc_sub_UE
                   [CC_id][j] == 0))
                 || ((j < (N_RBG[CC_id] - 1))
                 &&
                 (ue_sched_ctl->
                  rballoc_sub_UE[CC_id][j +
                            1]
                  == 0)))
                &&
                (nb_rbs_remaining
                 [CC_id]
                 [UE_id2] > 0)) {

                if ((((eNB_UE_stats2->
                   DL_pmi_single ^
                   eNB_UE_stats1->
                   DL_pmi_single)
                  << (14 - j)) & 0xc000) == 0x4000) {	//MU-MIMO only for 25 RBs configuration

                rballoc_sub[CC_id][j] = 1;
                ue_sched_ctl->
                    rballoc_sub_UE[CC_id]
                    [j] = 1;
                ue_sched_ctl2->
                    rballoc_sub_UE[CC_id]
                    [j] = 1;
                MIMO_mode_indicator[CC_id]
                    [j] = 0;

                if (j < N_RBG[CC_id] - 1) {
                    rballoc_sub[CC_id][j +
                               1] =
                    1;
                    ue_sched_ctl->
                    rballoc_sub_UE
                    [CC_id][j + 1] = 1;
                    ue_sched_ctl2->rballoc_sub_UE
                    [CC_id][j + 1] = 1;
                    MIMO_mode_indicator
                    [CC_id][j + 1]
                    = 0;
                }

                ue_sched_ctl->
                    dl_pow_off[CC_id]
                    = 0;
                ue_sched_ctl2->
                    dl_pow_off[CC_id]
                    = 0;


                if ((j == N_RBG[CC_id] - 1)
                    && ((N_RB_DL == 25)
                    || (N_RB_DL ==
                        50))) {

                    nb_rbs_remaining
                    [CC_id][UE_id] =
                    nb_rbs_remaining
                    [CC_id][UE_id] -
                    min_rb_unit[CC_id]
                    + 1;
                    ue_sched_ctl->pre_nb_available_rbs
                    [CC_id] =
                    ue_sched_ctl->pre_nb_available_rbs
                    [CC_id] +
                    min_rb_unit[CC_id]
                    - 1;
                    nb_rbs_remaining
                    [CC_id][UE_id2] =
                    nb_rbs_remaining
                    [CC_id][UE_id2] -
                    min_rb_unit[CC_id]
                    + 1;
                    ue_sched_ctl2->pre_nb_available_rbs
                    [CC_id] =
                    ue_sched_ctl2->pre_nb_available_rbs
                    [CC_id] +
                    min_rb_unit[CC_id]
                    - 1;
                } else {

                    nb_rbs_remaining
                    [CC_id][UE_id] =
                    nb_rbs_remaining
                    [CC_id][UE_id] - 4;
                    ue_sched_ctl->pre_nb_available_rbs
                    [CC_id] =
                    ue_sched_ctl->pre_nb_available_rbs
                    [CC_id] + 4;
                    nb_rbs_remaining
                    [CC_id][UE_id2] =
                    nb_rbs_remaining
                    [CC_id][UE_id2] -
                    4;
                    ue_sched_ctl2->pre_nb_available_rbs
                    [CC_id] =
                    ue_sched_ctl2->pre_nb_available_rbs
                    [CC_id] + 4;
                }

                break;
                }
            }
            }
        }
        }
    }
    }
#endif
    }
  }
1224
}
1225

1226 1227 1228 1229 1230 1231 1232
// This function assigns pre-available RBS to each UE in specified sub-bands before scheduling is done
void
dlsch_scheduler_pre_processor(module_id_t Mod_id,
                              slice_id_t slice_id,
                              frame_t frameP,
                              sub_frame_t subframeP,
                              int *mbsfn_flag) {
Raymond Knopp's avatar
 
Raymond Knopp committed
1233

1234 1235 1236
  int UE_id;
  uint8_t CC_id;
  uint16_t i, j;
Raymond Knopp's avatar
 
Raymond Knopp committed
1237

1238 1239
  int N_RBG[MAX_NUM_CCs];
  int min_rb_unit[MAX_NUM_CCs];
1240 1241 1242
  uint8_t rballoc_sub[MAX_NUM_CCs][N_RBG_MAX];
  uint8_t MIMO_mode_indicator[MAX_NUM_CCs][N_RBG_MAX]; // If TM5 is revisited, we can move this inside accounting
  uint16_t nb_rbs_required[MAX_NUM_CCs][NUMBER_OF_UE_MAX];
1243
  uint16_t nb_rbs_accounted[MAX_NUM_CCs][NUMBER_OF_UE_MAX];
1244
  uint16_t nb_rbs_remaining[MAX_NUM_CCs][NUMBER_OF_UE_MAX];
Raymond Knopp's avatar
 
Raymond Knopp committed
1245

1246 1247 1248
  UE_list_t *UE_list = &RC.mac[Mod_id]->UE_list;
  UE_sched_ctrl *ue_sched_ctl;
//  int rrc_status = RRC_IDLE;
Raymond Knopp's avatar
 
Raymond Knopp committed
1249

1250 1251 1252 1253 1254 1255 1256 1257 1258 1259
#ifdef TM5
  int harq_pid1 = 0;
  int round1 = 0, round2 = 0;
  int UE_id2;
  uint16_t i1, i2, i3;
  rnti_t rnti1, rnti2;
  LTE_eNB_UE_stats *eNB_UE_stats1 = NULL;
  LTE_eNB_UE_stats *eNB_UE_stats2 = NULL;
  UE_sched_ctrl *ue_sched_ctl1, *ue_sched_ctl2;
#endif
1260

1261 1262 1263 1264 1265 1266 1267 1268
  // Initialize scheduling information for all active UEs
  dlsch_scheduler_pre_processor_reset(Mod_id, slice_id, frameP, subframeP,
                                      N_RBG,
                                      min_rb_unit,
                                      nb_rbs_required,
                                      rballoc_sub,
                                      MIMO_mode_indicator,
                                      mbsfn_flag); // TODO Not sure if useful
1269

1270
  // STATUS
1271 1272
  // Store the DLSCH buffer for each logical channel
  store_dlsch_buffer(Mod_id, slice_id, frameP, subframeP);
1273

1274
  // Calculate the number of RBs required by each UE on the basis of logical channel's buffer
1275 1276 1277
  assign_rbs_required(Mod_id, slice_id, frameP, subframeP,
                      min_rb_unit,
                      nb_rbs_required);
1278

1279 1280
  // Sorts the user on the basis of dlsch logical channel buffer and CQI
  sort_UEs(Mod_id, slice_id, frameP, subframeP);
1281

1282
  // ACCOUNTING
1283 1284
  // This procedure decides the number of RBs to allocate
  dlsch_scheduler_pre_processor_accounting(Mod_id, slice_id, frameP, subframeP,
1285
                                           min_rb_unit,
1286 1287 1288 1289 1290 1291 1292 1293 1294
                                           nb_rbs_required,
                                           nb_rbs_accounted);
  // POSITIONING
  // This procedure does the main allocation of the RBs
  dlsch_scheduler_pre_processor_positioning(Mod_id, slice_id,
                                            N_RBG,
                                            min_rb_unit,
                                            nb_rbs_required,
                                            nb_rbs_accounted,
1295
                                            nb_rbs_remaining,
1296 1297
                                            rballoc_sub,
                                            MIMO_mode_indicator);
1298

1299 1300 1301 1302 1303 1304 1305 1306 1307 1308 1309
  // SHARING
  // If there are available RBs left in the slice, allocate them to the highest priority UEs
  dlsch_scheduler_pre_processor_intraslice_sharing(Mod_id, slice_id,
                                                   N_RBG,
                                                   min_rb_unit,
                                                   nb_rbs_required,
                                                   nb_rbs_accounted,
                                                   nb_rbs_remaining,
                                                   rballoc_sub,
                                                   MIMO_mode_indicator);

1310
#ifdef TM5
1311 1312 1313 1314 1315 1316 1317 1318 1319 1320 1321 1322 1323 1324 1325
  // This has to be revisited!!!!
  for (CC_id = 0; CC_id < MAX_NUM_CCs; CC_id++) {
  i1 = 0;
  i2 = 0;
  i3 = 0;

  for (j = 0; j < N_RBG[CC_id]; j++) {
      if (MIMO_mode_indicator[CC_id][j] == 2) {
      i1 = i1 + 1;
      } else if (MIMO_mode_indicator[CC_id][j] == 1) {
      i2 = i2 + 1;
      } else if (MIMO_mode_indicator[CC_id][j] == 0) {
      i3 = i3 + 1;
      }
  }
1326

1327 1328 1329 1330 1331
  if ((i1 < N_RBG[CC_id]) && (i2 > 0) && (i3 == 0)) {
      PHY_vars_eNB_g[Mod_id][CC_id]->check_for_SUMIMO_transmissions =
      PHY_vars_eNB_g[Mod_id][CC_id]->
      check_for_SUMIMO_transmissions + 1;
  }
1332

1333 1334 1335 1336 1337
  if (i3 == N_RBG[CC_id] && i1 == 0 && i2 == 0) {
      PHY_vars_eNB_g[Mod_id][CC_id]->FULL_MUMIMO_transmissions =
      PHY_vars_eNB_g[Mod_id][CC_id]->FULL_MUMIMO_transmissions +
      1;
  }
1338

1339 1340 1341 1342 1343
  if ((i1 < N_RBG[CC_id]) && (i3 > 0)) {
      PHY_vars_eNB_g[Mod_id][CC_id]->check_for_MUMIMO_transmissions =
      PHY_vars_eNB_g[Mod_id][CC_id]->
      check_for_MUMIMO_transmissions + 1;
  }
1344

1345 1346 1347
  PHY_vars_eNB_g[Mod_id][CC_id]->check_for_total_transmissions =
      PHY_vars_eNB_g[Mod_id][CC_id]->check_for_total_transmissions +
      1;
1348

1349
  }
1350
#endif
1351

1352
  for (UE_id = UE_list->head; UE_id >= 0; UE_id = UE_list->next[UE_id]) {
1353

1354 1355 1356
    ue_sched_ctl = &UE_list->UE_sched_ctrl[UE_id];
    for (i = 0; i < UE_num_active_CC(UE_list, UE_id); i++) {
      CC_id = UE_list->ordered_CCids[i][UE_id];
1357

1358 1359 1360 1361
      if (ue_sched_ctl->pre_nb_available_rbs[CC_id] > 0) {
        LOG_D(MAC, "******************DL Scheduling Information for UE%d ************************\n", UE_id);
        LOG_D(MAC, "dl power offset UE%d = %d \n", UE_id, ue_sched_ctl->dl_pow_off[CC_id]);
        LOG_D(MAC, "***********RB Alloc for every subband for UE%d ***********\n", UE_id);
1362

1363 1364 1365 1366 1367 1368 1369 1370 1371
        for (j = 0; j < N_RBG[CC_id]; j++) {
          //PHY_vars_eNB_g[Mod_id]->mu_mimo_mode[UE_id].rballoc_sub[UE_id] = rballoc_sub_UE[CC_id][UE_id][UE_id];
          LOG_D(MAC, "RB Alloc for UE%d and Subband%d = %d\n", UE_id, j, ue_sched_ctl->rballoc_sub_UE[CC_id][j]);
        }

        //PHY_vars_eNB_g[Mod_id]->mu_mimo_mode[UE_id].pre_nb_available_rbs = pre_nb_available_rbs[CC_id][UE_id];
        LOG_D(MAC, "[eNB %d][SLICE %d]Total RBs allocated for UE%d = %d\n",
              Mod_id, slice_id, UE_id, ue_sched_ctl->pre_nb_available_rbs[CC_id]);
      }
1372
    }
1373
  }
1374
}
1375

1376
#define SF0_LIMIT 1
1377

1378
void
1379 1380 1381 1382 1383 1384 1385 1386 1387 1388
dlsch_scheduler_pre_processor_reset(module_id_t module_idP,
                                    slice_id_t slice_id,
                                    frame_t frameP,
                                    sub_frame_t subframeP,
                                    int N_RBG[MAX_NUM_CCs],
                                    int min_rb_unit[MAX_NUM_CCs],
                                    uint16_t nb_rbs_required[MAX_NUM_CCs][NUMBER_OF_UE_MAX],
                                    unsigned char rballoc_sub[MAX_NUM_CCs][N_RBG_MAX],
                                    unsigned char MIMO_mode_indicator[MAX_NUM_CCs][N_RBG_MAX],
                                    int *mbsfn_flag)
1389
{
1390 1391 1392

  int UE_id;
  uint8_t CC_id;
1393
  int i, j;
1394 1395
  int N_RB_DL, RBGsize, RBGsize_last;

1396
#ifdef SF0_LIMIT
1397
  int sf0_lower, sf0_upper;
1398
#endif
1399

1400 1401 1402 1403 1404 1405 1406
  rnti_t rnti;
  UE_list_t *UE_list;
  UE_sched_ctrl *ue_sched_ctl;
  uint8_t *vrb_map;
  COMMON_channels_t *cc;
//
  for (CC_id = 0; CC_id < MAX_NUM_CCs; CC_id++) {
1407

1408 1409 1410 1411 1412 1413 1414 1415 1416 1417 1418 1419 1420 1421 1422 1423 1424 1425 1426 1427 1428 1429 1430 1431 1432 1433
    cc = &RC.mac[module_idP]->common_channels[CC_id];
    N_RBG[CC_id] = to_rbg(cc->mib->message.dl_Bandwidth);
    min_rb_unit[CC_id] = get_min_rb_unit(module_idP, CC_id);

    if (mbsfn_flag[CC_id] > 0)    // If this CC is allocated for MBSFN skip it here
      continue;

    for (UE_id = 0; UE_id < NUMBER_OF_UE_MAX; ++UE_id) {


      UE_list = &RC.mac[module_idP]->UE_list;
      ue_sched_ctl = &UE_list->UE_sched_ctrl[UE_id];
      rnti = UE_RNTI(module_idP, UE_id);


      if (rnti == NOT_A_RNTI)
        continue;

      if (UE_list->active[UE_id] != TRUE)
        continue;

      if (!ue_slice_membership(UE_id, slice_id))
        continue;

      vrb_map = RC.mac[module_idP]->common_channels[CC_id].vrb_map;
      N_RB_DL = to_prb(RC.mac[module_idP]->common_channels[CC_id].mib->message.dl_Bandwidth);
1434

Cedric Roux's avatar
Cedric Roux committed
1435
#ifdef SF0_LIMIT
1436 1437 1438 1439 1440 1441 1442 1443 1444 1445 1446 1447 1448 1449 1450 1451 1452 1453 1454 1455 1456 1457 1458 1459 1460 1461 1462 1463 1464 1465 1466 1467 1468 1469 1470 1471 1472 1473 1474 1475 1476 1477 1478 1479 1480 1481 1482 1483 1484 1485 1486 1487 1488 1489 1490 1491 1492 1493 1494 1495 1496 1497 1498 1499 1500 1501 1502 1503 1504 1505 1506 1507 1508 1509 1510 1511 1512 1513 1514 1515 1516 1517 1518 1519 1520 1521 1522 1523 1524 1525 1526 1527 1528 1529 1530 1531 1532 1533 1534 1535 1536 1537 1538 1539 1540 1541 1542 1543 1544 1545 1546 1547 1548 1549 1550 1551 1552 1553 1554 1555 1556 1557 1558 1559 1560
      sf0_lower = -1;
      sf0_upper = -1;
#endif

      LOG_D(MAC, "Running preprocessor for UE %d (%x)\n", UE_id, rnti);
      // initialize harq_pid and round
      if (ue_sched_ctl->ta_timer)
        ue_sched_ctl->ta_timer--;

      /*
         eNB_UE_stats *eNB_UE_stats;

         if (eNB_UE_stats == NULL)
         return;


         mac_xface->get_ue_active_harq_pid(module_idP,CC_id,rnti,
         frameP,subframeP,
         &ue_sched_ctl->harq_pid[CC_id],
         &ue_sched_ctl->round[CC_id],
         openair_harq_DL);


         if (ue_sched_ctl->ta_timer == 0) {

         // WE SHOULD PROTECT the eNB_UE_stats with a mutex here ...

         ue_sched_ctl->ta_timer = 20;  // wait 20 subframes before taking TA measurement from PHY
         switch (N_RB_DL) {
         case 6:
         ue_sched_ctl->ta_update = eNB_UE_stats->timing_advance_update;
         break;

         case 15:
         ue_sched_ctl->ta_update = eNB_UE_stats->timing_advance_update/2;
         break;

         case 25:
         ue_sched_ctl->ta_update = eNB_UE_stats->timing_advance_update/4;
         break;

         case 50:
         ue_sched_ctl->ta_update = eNB_UE_stats->timing_advance_update/8;
         break;

         case 75:
         ue_sched_ctl->ta_update = eNB_UE_stats->timing_advance_update/12;
         break;

         case 100:
         ue_sched_ctl->ta_update = eNB_UE_stats->timing_advance_update/16;
         break;
         }
         // clear the update in case PHY does not have a new measurement after timer expiry
         eNB_UE_stats->timing_advance_update =  0;
         }
         else {
         ue_sched_ctl->ta_timer--;
         ue_sched_ctl->ta_update =0; // don't trigger a timing advance command
         }


         if (UE_id==0) {
         VCD_SIGNAL_DUMPER_DUMP_VARIABLE_BY_NAME(VCD_SIGNAL_DUMPER_VARIABLES_UE0_TIMING_ADVANCE,ue_sched_ctl->ta_update);
         }
       */

      nb_rbs_required[CC_id][UE_id] = 0;
      ue_sched_ctl->pre_nb_available_rbs[CC_id] = 0;
      ue_sched_ctl->dl_pow_off[CC_id] = 2;

      switch (N_RB_DL) {
        case 6:
          RBGsize = 1;
          RBGsize_last = 1;
          break;
        case 15:
          RBGsize = 2;
          RBGsize_last = 1;
          break;
        case 25:
          RBGsize = 2;
          RBGsize_last = 1;
          break;
        case 50:
          RBGsize = 3;
          RBGsize_last = 2;
          break;
        case 75:
          RBGsize = 4;
          RBGsize_last = 3;
          break;
        case 100:
          RBGsize = 4;
          RBGsize_last = 4;
          break;
        default:
          AssertFatal(1 == 0, "unsupported RBs (%d)\n", N_RB_DL);
      }

#ifdef SF0_LIMIT
      switch (N_RBG[CC_id]) {
        case 6:
          sf0_lower = 0;
          sf0_upper = 5;
          break;
        case 8:
          sf0_lower = 2;
          sf0_upper = 5;
          break;
        case 13:
          sf0_lower = 4;
          sf0_upper = 7;
          break;
        case 17:
          sf0_lower = 7;
          sf0_upper = 9;
          break;
        case 25:
          sf0_lower = 11;
          sf0_upper = 13;
          break;
        default:
          AssertFatal(1 == 0, "unsupported RBs (%d)\n", N_RB_DL);
      }
1561
#endif
Cedric Roux's avatar
Cedric Roux committed
1562

1563 1564 1565
      // Initialize Subbands according to VRB map
      for (i = 0; i < N_RBG[CC_id]; i++) {
        int rb_size = i == N_RBG[CC_id] - 1 ? RBGsize_last : RBGsize;
1566

1567 1568
        ue_sched_ctl->rballoc_sub_UE[CC_id][i] = 0;
        rballoc_sub[CC_id][i] = 0;
1569

Cedric Roux's avatar
Cedric Roux committed
1570
#ifdef SF0_LIMIT
1571 1572 1573 1574 1575 1576 1577
        // for avoiding 6+ PRBs around DC in subframe 0 (avoid excessive errors)
        /* TODO: make it proper - allocate those RBs, do not "protect" them, but
         * compute number of available REs and limit MCS according to the
         * TBS table 36.213 7.1.7.2.1-1 (can be done after pre-processor)
         */
        if (subframeP == 0 && i >= sf0_lower && i <= sf0_upper)
          rballoc_sub[CC_id][i] = 1;
1578
#endif
1579

1580 1581 1582 1583 1584 1585 1586 1587 1588 1589 1590
        // for SI-RNTI,RA-RNTI and P-RNTI allocations
        for (j = 0; j < rb_size; j++) {
          if (vrb_map[j + (i*RBGsize)] != 0) {
            rballoc_sub[CC_id][i] = 1;
            LOG_D(MAC, "Frame %d, subframe %d : vrb %d allocated\n", frameP, subframeP, j + (i*RBGsize));
            break;
          }
        }
        LOG_D(MAC, "Frame %d Subframe %d CC_id %d RBG %i : rb_alloc %d\n",
              frameP, subframeP, CC_id, i, rballoc_sub[CC_id][i]);
        MIMO_mode_indicator[CC_id][i] = 2;
1591
      }
1592
    }
1593
  }
1594 1595 1596
}


1597 1598
void
dlsch_scheduler_pre_processor_allocate(module_id_t Mod_id,
1599 1600 1601 1602 1603
                                       int UE_id,
                                       uint8_t CC_id,
                                       int N_RBG,
                                       int min_rb_unit,
                                       uint16_t nb_rbs_required[MAX_NUM_CCs][NUMBER_OF_UE_MAX],
1604
                                       uint16_t nb_rbs_remaining[MAX_NUM_CCs][NUMBER_OF_UE_MAX],
1605 1606 1607
                                       unsigned char rballoc_sub[MAX_NUM_CCs][N_RBG_MAX],
                                       uint8_t slice_allocation_mask[MAX_NUM_CCs][N_RBG_MAX],
                                       unsigned char MIMO_mode_indicator[MAX_NUM_CCs][N_RBG_MAX]) {
1608

1609
  int i;
1610
  int tm = get_tmode(Mod_id, CC_id, UE_id);
1611 1612 1613 1614 1615 1616
  UE_list_t *UE_list = &RC.mac[Mod_id]->UE_list;
  UE_sched_ctrl *ue_sched_ctl = &UE_list->UE_sched_ctrl[UE_id];
  int N_RB_DL = to_prb(RC.mac[Mod_id]->common_channels[CC_id].mib->message.dl_Bandwidth);

  for (i = 0; i < N_RBG; i++) {

1617 1618 1619 1620 1621 1622
    if (rballoc_sub[CC_id][i] != 0) continue;
    if (ue_sched_ctl->rballoc_sub_UE[CC_id][i] != 0) continue;
    if (nb_rbs_remaining[CC_id][UE_id] <= 0) continue;
    if (ue_sched_ctl->pre_nb_available_rbs[CC_id] >= nb_rbs_required[CC_id][UE_id]) continue;
    if (ue_sched_ctl->dl_pow_off[CC_id] == 0) continue;
    if (slice_allocation_mask[CC_id][i] == 0) continue;
1623 1624

    if ((i == N_RBG - 1) && ((N_RB_DL == 25) || (N_RB_DL == 50))) {
1625 1626
      // Allocating last, smaller RBG
      if (nb_rbs_remaining[CC_id][UE_id] >= min_rb_unit - 1) {
1627 1628 1629
        rballoc_sub[CC_id][i] = 1;
        ue_sched_ctl->rballoc_sub_UE[CC_id][i] = 1;
        MIMO_mode_indicator[CC_id][i] = 1;
1630
        if (tm == 5) {
1631 1632
          ue_sched_ctl->dl_pow_off[CC_id] = 1;
        }
1633
        nb_rbs_remaining[CC_id][UE_id] = nb_rbs_remaining[CC_id][UE_id] - min_rb_unit + 1;
1634 1635 1636
        ue_sched_ctl->pre_nb_available_rbs[CC_id] = ue_sched_ctl->pre_nb_available_rbs[CC_id] + min_rb_unit - 1;
      }
    } else {
1637 1638
      // Allocating a standard-sized RBG
      if (nb_rbs_remaining[CC_id][UE_id] >= min_rb_unit) {
1639 1640 1641
        rballoc_sub[CC_id][i] = 1;
        ue_sched_ctl->rballoc_sub_UE[CC_id][i] = 1;
        MIMO_mode_indicator[CC_id][i] = 1;
1642
        if (tm == 5) {
1643 1644
          ue_sched_ctl->dl_pow_off[CC_id] = 1;
        }
1645
        nb_rbs_remaining[CC_id][UE_id] = nb_rbs_remaining[CC_id][UE_id] - min_rb_unit;
1646 1647
        ue_sched_ctl->pre_nb_available_rbs[CC_id] = ue_sched_ctl->pre_nb_available_rbs[CC_id] + min_rb_unit;
      }
1648
    }
1649
  }
1650 1651 1652
}


1653
/// ULSCH PRE_PROCESSOR
1654

1655

1656 1657
void
ulsch_scheduler_pre_processor(module_id_t module_idP,
1658
			      slice_id_t slice_id, int frameP,
1659
			      sub_frame_t subframeP, uint16_t * first_rb)
1660
{
1661

1662 1663 1664 1665 1666 1667 1668
    int16_t i;
    uint16_t UE_id, n, r;
    uint8_t CC_id, harq_pid;
    uint16_t nb_allocated_rbs[MAX_NUM_CCs][NUMBER_OF_UE_MAX],
	total_allocated_rbs[MAX_NUM_CCs],
	average_rbs_per_user[MAX_NUM_CCs];
    int16_t total_remaining_rbs[MAX_NUM_CCs];
1669
    uint16_t total_ue_count[MAX_NUM_CCs];
1670 1671 1672
    rnti_t rnti = -1;
    UE_list_t *UE_list = &RC.mac[module_idP]->UE_list;
    UE_TEMPLATE *UE_template = 0;
1673 1674 1675
    UE_sched_ctrl *ue_sched_ctl;
    int N_RB_UL = 0;

1676 1677
    LOG_D(MAC, "In ulsch_preprocessor: assign max mcs min rb\n");
    // maximize MCS and then allocate required RB according to the buffer occupancy with the limit of max available UL RB
1678
    assign_max_mcs_min_rb(module_idP, slice_id, frameP, subframeP, first_rb);
1679 1680 1681 1682 1683 1684 1685 1686 1687

    LOG_D(MAC, "In ulsch_preprocessor: sort ue \n");
    // sort ues
    sort_ue_ul(module_idP, frameP, subframeP);


    // we need to distribute RBs among UEs
    // step1:  reset the vars
    for (CC_id = 0; CC_id < MAX_NUM_CCs; CC_id++) {
1688 1689 1690 1691 1692 1693 1694 1695 1696 1697 1698 1699
      total_allocated_rbs[CC_id] = 0;
      total_remaining_rbs[CC_id] = 0;
      average_rbs_per_user[CC_id] = 0;
      total_ue_count[CC_id] = 0;
    }

    // Step 1.5: Calculate total_ue_count
    for (i = UE_list->head_ul; i >= 0; i = UE_list->next_ul[i]) {
      for (n = 0; n < UE_list->numactiveULCCs[i]; n++) {
        // This is the actual CC_id in the list
        CC_id = UE_list->ordered_ULCCids[n][i];
        UE_template = &UE_list->UE_template[CC_id][i];
1700
        if (!ue_slice_membership(i, slice_id))
1701 1702 1703 1704 1705
          continue;
        if (UE_template->pre_allocated_nb_rb_ul[slice_id] > 0) {
          total_ue_count[CC_id] += 1;
        }
      }
1706 1707
    }

1708 1709 1710 1711
    LOG_D(MAC, "In ulsch_preprocessor: step2 \n");
    // step 2: calculate the average rb per UE
    for (i = UE_list->head_ul; i >= 0; i = UE_list->next_ul[i]) {

1712
      rnti = UE_RNTI(module_idP, i);
1713
      UE_id = i;
1714 1715 1716 1717 1718 1719 1720

      if (rnti == NOT_A_RNTI)
        continue;

      if (UE_list->UE_sched_ctrl[i].ul_out_of_sync == 1)
        continue;

1721
      if (!ue_slice_membership(UE_id, slice_id))
1722 1723 1724 1725 1726 1727 1728 1729 1730 1731 1732 1733 1734 1735 1736 1737 1738 1739 1740 1741 1742 1743 1744
          continue;

      LOG_D(MAC, "In ulsch_preprocessor: handling UE %d/%x\n", UE_id,
            rnti);
      for (n = 0; n < UE_list->numactiveULCCs[UE_id]; n++) {
        // This is the actual CC_id in the list
        CC_id = UE_list->ordered_ULCCids[n][UE_id];
        LOG_D(MAC,
              "In ulsch_preprocessor: handling UE %d/%x CCid %d\n",
              UE_id, rnti, CC_id);

        average_rbs_per_user[CC_id] = 0;

        /*
           if((mac_xface->get_nCCE_max(module_idP,CC_id,3,subframeP) - nCCE_to_be_used[CC_id])  > (1<<aggregation)) {
           nCCE_to_be_used[CC_id] = nCCE_to_be_used[CC_id] + (1<<aggregation);
           max_num_ue_to_be_scheduled+=1;
           } */



        N_RB_UL = to_prb(RC.mac[module_idP]->common_channels[CC_id].ul_Bandwidth);
        ue_sched_ctl = &UE_list->UE_sched_ctrl[UE_id];
1745 1746
        ue_sched_ctl->max_rbs_allowed_slice_uplink[CC_id][slice_id] =
                nb_rbs_allowed_slice(slice_percentage_uplink[slice_id], N_RB_UL);
1747 1748 1749 1750 1751 1752 1753 1754 1755 1756 1757 1758 1759 1760 1761 1762 1763

        if (total_ue_count[CC_id] == 0) {
          average_rbs_per_user[CC_id] = 0;
        } else if (total_ue_count[CC_id] == 1) {    // increase the available RBs, special case,
          average_rbs_per_user[CC_id] = ue_sched_ctl->max_rbs_allowed_slice_uplink[CC_id][slice_id] - first_rb[CC_id] + 1;
        } else if (total_ue_count[CC_id] <= (ue_sched_ctl->max_rbs_allowed_slice_uplink[CC_id][slice_id] - first_rb[CC_id])) {
          average_rbs_per_user[CC_id] = (uint16_t) floor((ue_sched_ctl->max_rbs_allowed_slice_uplink[CC_id][slice_id] - first_rb[CC_id]) / total_ue_count[CC_id]);
        } else {
          average_rbs_per_user[CC_id] = 1;
          LOG_W(MAC,
                "[eNB %d] frame %d subframe %d: UE %d CC %d: can't get average rb per user (should not be here)\n",
                module_idP, frameP, subframeP, UE_id, CC_id);
        }
        if (total_ue_count[CC_id] > 0)
          LOG_D(MAC, "[eNB %d] Frame %d subframe %d: total ue to be scheduled %d\n",
                module_idP, frameP, subframeP, total_ue_count[CC_id]);
      }
1764
    }
Raymond Knopp's avatar
 
Raymond Knopp committed
1765

1766 1767
    // step 3: assigne RBS
    for (i = UE_list->head_ul; i >= 0; i = UE_list->next_ul[i]) {
1768 1769 1770 1771 1772 1773
      rnti = UE_RNTI(module_idP, i);

      if (rnti == NOT_A_RNTI)
        continue;
      if (UE_list->UE_sched_ctrl[i].ul_out_of_sync == 1)
        continue;
1774
      if (!ue_slice_membership(i, slice_id))
1775 1776 1777 1778 1779 1780 1781 1782 1783 1784 1785 1786 1787 1788 1789 1790 1791 1792 1793 1794 1795 1796 1797 1798 1799 1800 1801 1802
        continue;


      UE_id = i;

      for (n = 0; n < UE_list->numactiveULCCs[UE_id]; n++) {
        // This is the actual CC_id in the list
        CC_id = UE_list->ordered_ULCCids[n][UE_id];
        UE_template = &UE_list->UE_template[CC_id][UE_id];
        harq_pid = subframe2harqpid(&RC.mac[module_idP]->common_channels[CC_id],
                                    frameP, subframeP);

        //      mac_xface->get_ue_active_harq_pid(module_idP,CC_id,rnti,frameP,subframeP,&harq_pid,&round,openair_harq_UL);

        if (UE_list->UE_sched_ctrl[UE_id].round_UL[CC_id] > 0) {
          nb_allocated_rbs[CC_id][UE_id] = UE_list->UE_template[CC_id][UE_id].nb_rb_ul[harq_pid];
        } else {
          nb_allocated_rbs[CC_id][UE_id] =
                  cmin(UE_list->UE_template[CC_id][UE_id].pre_allocated_nb_rb_ul[slice_id],
                       average_rbs_per_user[CC_id]);
        }

        total_allocated_rbs[CC_id] += nb_allocated_rbs[CC_id][UE_id];
        LOG_D(MAC,
              "In ulsch_preprocessor: assigning %d RBs for UE %d/%x CCid %d, harq_pid %d\n",
              nb_allocated_rbs[CC_id][UE_id], UE_id, rnti, CC_id,
              harq_pid);
      }
1803
    }
1804

1805
    // step 4: assigne the remaining RBs and set the pre_allocated rbs accordingly
1806
  for (r = 0; r < 2; r++) {
1807

1808 1809 1810 1811 1812 1813 1814
    for (i = UE_list->head_ul; i >= 0; i = UE_list->next_ul[i]) {
      rnti = UE_RNTI(module_idP, i);

      if (rnti == NOT_A_RNTI)
        continue;
      if (UE_list->UE_sched_ctrl[i].ul_out_of_sync == 1)
        continue;
1815
      if (!ue_slice_membership(i, slice_id))
1816 1817 1818
        continue;

      UE_id = i;
1819
      ue_sched_ctl = &UE_list->UE_sched_ctrl[UE_id];
1820 1821 1822 1823 1824 1825 1826 1827 1828 1829 1830 1831 1832 1833 1834 1835 1836 1837 1838 1839 1840 1841 1842 1843 1844 1845 1846 1847 1848 1849 1850 1851 1852 1853

      for (n = 0; n < UE_list->numactiveULCCs[UE_id]; n++) {
        // This is the actual CC_id in the list
        CC_id = UE_list->ordered_ULCCids[n][UE_id];
        UE_template = &UE_list->UE_template[CC_id][UE_id];
        total_remaining_rbs[CC_id] =
                ue_sched_ctl->max_rbs_allowed_slice_uplink[CC_id][slice_id] - first_rb[CC_id] - total_allocated_rbs[CC_id];

        if (total_ue_count[CC_id] == 1) {
          total_remaining_rbs[CC_id] += 1;
        }

        if (r == 0) {
          while ((UE_template->pre_allocated_nb_rb_ul[slice_id] > 0)
                 && (nb_allocated_rbs[CC_id][UE_id] < UE_template->pre_allocated_nb_rb_ul[slice_id])
                 && (total_remaining_rbs[CC_id] > 0)) {
            nb_allocated_rbs[CC_id][UE_id] =
                    cmin(nb_allocated_rbs[CC_id][UE_id] + 1,
                         UE_template->pre_allocated_nb_rb_ul[slice_id]);
            total_remaining_rbs[CC_id]--;
            total_allocated_rbs[CC_id]++;
          }
        } else {
          UE_template->pre_allocated_nb_rb_ul[slice_id] =
                  nb_allocated_rbs[CC_id][UE_id];
          LOG_D(MAC,
                "******************UL Scheduling Information for UE%d CC_id %d ************************\n",
                UE_id, CC_id);
          LOG_D(MAC,
                "[eNB %d] total RB allocated for UE%d CC_id %d  = %d\n",
                module_idP, UE_id, CC_id,
                UE_template->pre_allocated_nb_rb_ul[slice_id]);
        }
      }
1854
    }
1855
  }
1856

Cedric Roux's avatar
Cedric Roux committed
1857 1858 1859 1860
#if 0
    /* this logging is wrong, ue_sched_ctl may not be valid here
     * TODO: fix
     */
1861
    for (CC_id = 0; CC_id < MAX_NUM_CCs; CC_id++) {
1862

1863 1864 1865
	if (total_allocated_rbs[CC_id] > 0) {
	    LOG_D(MAC, "[eNB %d] total RB allocated for all UEs = %d/%d\n",
		  module_idP, total_allocated_rbs[CC_id],
1866
              ue_sched_ctl->max_rbs_allowed_slice_uplink[CC_id][slice_id] - first_rb[CC_id]);
1867
	}
1868
    }
Cedric Roux's avatar
Cedric Roux committed
1869
#endif
1870 1871 1872
}


1873
void
1874
assign_max_mcs_min_rb(module_id_t module_idP, int slice_id, int frameP,
1875
		      sub_frame_t subframeP, uint16_t * first_rb)
1876 1877
{

1878 1879 1880 1881
  int i;
  uint16_t n, UE_id;
  uint8_t CC_id;
  rnti_t rnti = -1;
1882
  int mcs;
1883 1884 1885 1886 1887 1888 1889 1890 1891 1892 1893 1894 1895 1896 1897 1898 1899 1900 1901
  int rb_table_index = 0, tbs, tx_power;
  eNB_MAC_INST *eNB = RC.mac[module_idP];
  UE_list_t *UE_list = &eNB->UE_list;

  UE_TEMPLATE *UE_template;
  UE_sched_ctrl *ue_sched_ctl;
  int Ncp;
  int N_RB_UL;

  for (i = 0; i < NUMBER_OF_UE_MAX; i++) {
    if (UE_list->active[i] != TRUE)
      continue;

    rnti = UE_RNTI(module_idP, i);

    if (rnti == NOT_A_RNTI)
      continue;
    if (UE_list->UE_sched_ctrl[i].ul_out_of_sync == 1)
      continue;
1902
    if (!ue_slice_membership(i, slice_id))
1903 1904
      continue;

1905 1906 1907 1908 1909 1910 1911 1912
    if (UE_list->UE_sched_ctrl[i].phr_received == 1) {
      /* if we've received the power headroom information the UE, we can go to
       * maximum mcs */
      mcs = cmin(20, slice_maxmcs_uplink[slice_id]);
    } else {
      /* otherwise, limit to QPSK PUSCH */
      mcs = cmin(10, slice_maxmcs_uplink[slice_id]);
    }
1913 1914 1915 1916 1917 1918 1919 1920 1921 1922 1923 1924 1925 1926 1927 1928 1929 1930

    UE_id = i;

    for (n = 0; n < UE_list->numactiveULCCs[UE_id]; n++) {
      // This is the actual CC_id in the list
      CC_id = UE_list->ordered_ULCCids[n][UE_id];

      if (CC_id >= MAX_NUM_CCs) {
        LOG_E(MAC, "CC_id %u should be < %u, loop n=%u < numactiveULCCs[%u]=%u",
              CC_id, MAX_NUM_CCs, n, UE_id, UE_list->numactiveULCCs[UE_id]);
      }

      AssertFatal(CC_id < MAX_NUM_CCs,
                  "CC_id %u should be < %u, loop n=%u < numactiveULCCs[%u]=%u",
                  CC_id, MAX_NUM_CCs, n, UE_id,
                  UE_list->numactiveULCCs[UE_id]);

      UE_template = &UE_list->UE_template[CC_id][UE_id];
1931
      UE_template->pre_assigned_mcs_ul = mcs;
1932 1933 1934 1935
      ue_sched_ctl = &UE_list->UE_sched_ctrl[UE_id];

      Ncp = RC.mac[module_idP]->common_channels[CC_id].Ncp;
      N_RB_UL = to_prb(RC.mac[module_idP]->common_channels[CC_id].ul_Bandwidth);
1936 1937
      ue_sched_ctl->max_rbs_allowed_slice_uplink[CC_id][slice_id] =
              nb_rbs_allowed_slice(slice_percentage_uplink[slice_id], N_RB_UL);
1938

1939 1940 1941 1942
      int bytes_to_schedule = UE_template->estimated_ul_buffer - UE_template->scheduled_ul_bytes;
      if (bytes_to_schedule < 0) bytes_to_schedule = 0;
      int bits_to_schedule = bytes_to_schedule * 8;

1943
      // if this UE has UL traffic
1944
      if (bits_to_schedule > 0) {
1945
        tbs = get_TBS_UL(UE_template->pre_assigned_mcs_ul, 3) << 3; // 1 or 2 PRB with cqi enabled does not work well!
1946 1947 1948 1949 1950 1951
        rb_table_index = 2;

        // fixme: set use_srs flag
        tx_power = estimate_ue_tx_power(tbs, rb_table[rb_table_index], 0, Ncp, 0);

        while ((((UE_template->phr_info - tx_power) < 0)
1952
              || (tbs > bits_to_schedule))
1953
              && (UE_template->pre_assigned_mcs_ul > 3)) {
1954
          // LOG_I(MAC,"UE_template->phr_info %d tx_power %d mcs %d\n", UE_template->phr_info,tx_power, mcs);
1955 1956
          UE_template->pre_assigned_mcs_ul--;
          tbs = get_TBS_UL(UE_template->pre_assigned_mcs_ul, rb_table[rb_table_index]) << 3;
1957 1958 1959 1960
          tx_power = estimate_ue_tx_power(tbs, rb_table[rb_table_index], 0, Ncp, 0);   // fixme: set use_srs
        }

        while ((tbs < bits_to_schedule)
1961
                && (rb_table[rb_table_index] < (ue_sched_ctl->max_rbs_allowed_slice_uplink[CC_id][slice_id] - first_rb[CC_id]))
1962 1963 1964
                && ((UE_template->phr_info - tx_power) > 0)
                && (rb_table_index < 32)) {
          rb_table_index++;
1965
          tbs = get_TBS_UL(UE_template->pre_assigned_mcs_ul, rb_table[rb_table_index]) << 3;
1966 1967 1968 1969 1970
          tx_power = estimate_ue_tx_power(tbs, rb_table[rb_table_index], 0, Ncp, 0);
        }

        UE_template->ue_tx_power = tx_power;

1971
        if (rb_table[rb_table_index] > (ue_sched_ctl->max_rbs_allowed_slice_uplink[CC_id][slice_id] - first_rb[CC_id] - 1)) {
1972 1973 1974 1975 1976 1977 1978 1979 1980 1981 1982 1983 1984 1985 1986 1987 1988 1989 1990 1991 1992 1993 1994 1995 1996 1997 1998 1999 2000 2001
          rb_table_index--;
        }
        // 1 or 2 PRB with cqi enabled does not work well
        if (rb_table[rb_table_index] < 3) {
            rb_table_index = 2;	//3PRB
        }

        UE_template->pre_allocated_rb_table_index_ul = rb_table_index;
        UE_template->pre_allocated_nb_rb_ul[slice_id] = rb_table[rb_table_index];
        LOG_D(MAC,
              "[eNB %d] frame %d subframe %d: for UE %d CC %d: pre-assigned mcs %d, pre-allocated rb_table[%d]=%d RBs (phr %d, tx power %d)\n",
              module_idP, frameP, subframeP, UE_id, CC_id,
              UE_template->pre_assigned_mcs_ul,
              UE_template->pre_allocated_rb_table_index_ul,
              UE_template->pre_allocated_nb_rb_ul[slice_id],
              UE_template->phr_info, tx_power);
      } else {
        /* if UE has pending scheduling request then pre-allocate 3 RBs */
        //if (UE_template->ul_active == 1 && UE_template->ul_SR == 1) {
        if (UE_is_to_be_scheduled(module_idP, CC_id, i)) {
          /* use QPSK mcs */
          UE_template->pre_assigned_mcs_ul = 10;
          UE_template->pre_allocated_rb_table_index_ul = 2;
          UE_template->pre_allocated_nb_rb_ul[slice_id] = 3;
        } else {
          UE_template->pre_assigned_mcs_ul = 0;
          UE_template->pre_allocated_rb_table_index_ul = -1;
          UE_template->pre_allocated_nb_rb_ul[slice_id] = 0;
        }
      }
2002
    }
2003
  }
2004
}
2005

2006 2007 2008 2009 2010
struct sort_ue_ul_params {
    int module_idP;
    int frameP;
    int subframeP;
};
2011

2012 2013 2014 2015 2016 2017 2018 2019 2020 2021 2022 2023 2024 2025 2026 2027 2028 2029 2030 2031 2032 2033 2034 2035 2036 2037 2038 2039 2040 2041
static int ue_ul_compare(const void *_a, const void *_b, void *_params)
{
    struct sort_ue_ul_params *params = _params;
    UE_list_t *UE_list = &RC.mac[params->module_idP]->UE_list;

    int UE_id1 = *(const int *) _a;
    int UE_id2 = *(const int *) _b;

    int rnti1 = UE_RNTI(params->module_idP, UE_id1);
    int pCCid1 = UE_PCCID(params->module_idP, UE_id1);
    int round1 = maxround(params->module_idP, rnti1, params->frameP,
			  params->subframeP, 1);

    int rnti2 = UE_RNTI(params->module_idP, UE_id2);
    int pCCid2 = UE_PCCID(params->module_idP, UE_id2);
    int round2 = maxround(params->module_idP, rnti2, params->frameP,
			  params->subframeP, 1);

    if (round1 > round2)
	return -1;
    if (round1 < round2)
	return 1;

    if (UE_list->UE_template[pCCid1][UE_id1].ul_buffer_info[LCGID0] >
	UE_list->UE_template[pCCid2][UE_id2].ul_buffer_info[LCGID0])
	return -1;
    if (UE_list->UE_template[pCCid1][UE_id1].ul_buffer_info[LCGID0] <
	UE_list->UE_template[pCCid2][UE_id2].ul_buffer_info[LCGID0])
	return 1;

2042 2043 2044 2045 2046 2047
    int bytes_to_schedule1 = UE_list->UE_template[pCCid1][UE_id1].estimated_ul_buffer - UE_list->UE_template[pCCid1][UE_id1].scheduled_ul_bytes;
    if (bytes_to_schedule1 < 0) bytes_to_schedule1 = 0;
    int bytes_to_schedule2 = UE_list->UE_template[pCCid2][UE_id2].estimated_ul_buffer - UE_list->UE_template[pCCid2][UE_id2].scheduled_ul_bytes;
    if (bytes_to_schedule2 < 0) bytes_to_schedule2 = 0;

    if (bytes_to_schedule1 > bytes_to_schedule2)
2048
	return -1;
2049
    if (bytes_to_schedule1 < bytes_to_schedule2)
2050 2051 2052 2053 2054 2055 2056 2057
	return 1;

    if (UE_list->UE_template[pCCid1][UE_id1].pre_assigned_mcs_ul >
	UE_list->UE_template[pCCid2][UE_id2].pre_assigned_mcs_ul)
	return -1;
    if (UE_list->UE_template[pCCid1][UE_id1].pre_assigned_mcs_ul <
	UE_list->UE_template[pCCid2][UE_id2].pre_assigned_mcs_ul)
	return 1;
2058

2059
    return 0;
2060 2061

#if 0
2062 2063 2064 2065 2066 2067 2068 2069 2070 2071 2072 2073 2074 2075 2076 2077 2078 2079 2080 2081 2082 2083
    /* The above order derives from the following.
     * The last case is not handled: "if (UE_list->UE_template[pCCid2][UE_id2].ul_total_buffer > 0 )"
     * I don't think it makes a big difference.
     */
    if (round2 > round1) {
	swap_UEs(UE_list, UE_id1, UE_id2, 1);
    } else if (round2 == round1) {
	if (UE_list->UE_template[pCCid1][UE_id1].ul_buffer_info[LCGID0] <
	    UE_list->UE_template[pCCid2][UE_id2].ul_buffer_info[LCGID0]) {
	    swap_UEs(UE_list, UE_id1, UE_id2, 1);
	} else if (UE_list->UE_template[pCCid1][UE_id1].ul_total_buffer <
		   UE_list->UE_template[pCCid2][UE_id2].ul_total_buffer) {
	    swap_UEs(UE_list, UE_id1, UE_id2, 1);
	} else if (UE_list->UE_template[pCCid1][UE_id1].
		   pre_assigned_mcs_ul <
		   UE_list->UE_template[pCCid2][UE_id2].
		   pre_assigned_mcs_ul) {
	    if (UE_list->UE_template[pCCid2][UE_id2].ul_total_buffer > 0) {
		swap_UEs(UE_list, UE_id1, UE_id2, 1);
	    }
	}
    }
2084 2085
#endif
}
2086

2087
void sort_ue_ul(module_id_t module_idP, int frameP, sub_frame_t subframeP)
2088
{
2089 2090 2091 2092 2093
    int i;
    int list[NUMBER_OF_UE_MAX];
    int list_size = 0;
    int rnti;
    struct sort_ue_ul_params params = { module_idP, frameP, subframeP };
2094

2095
    UE_list_t *UE_list = &RC.mac[module_idP]->UE_list;
2096

2097 2098 2099 2100 2101 2102 2103
    for (i = 0; i < NUMBER_OF_UE_MAX; i++) {
	if (UE_list->active[i] == FALSE)
	    continue;
	if ((rnti = UE_RNTI(module_idP, i)) == NOT_A_RNTI)
	    continue;
	if (UE_list->UE_sched_ctrl[i].ul_out_of_sync == 1)
	    continue;
2104

2105 2106 2107
	list[list_size] = i;
	list_size++;
    }
2108

2109
    qsort_r(list, list_size, sizeof(int), ue_ul_compare, &params);
2110

2111 2112 2113 2114 2115 2116 2117 2118
    if (list_size) {
	for (i = 0; i < list_size - 1; i++)
	    UE_list->next_ul[list[i]] = list[i + 1];
	UE_list->next_ul[list[list_size - 1]] = -1;
	UE_list->head_ul = list[0];
    } else {
	UE_list->head_ul = -1;
    }
2119 2120

#if 0
2121 2122 2123 2124 2125 2126 2127 2128 2129 2130 2131 2132 2133 2134 2135 2136 2137 2138 2139 2140 2141 2142 2143 2144 2145 2146 2147 2148 2149 2150 2151 2152 2153 2154 2155 2156 2157 2158 2159 2160 2161 2162 2163 2164 2165 2166 2167 2168 2169 2170 2171 2172 2173 2174 2175 2176 2177 2178 2179 2180 2181 2182 2183
    int UE_id1, UE_id2;
    int pCCid1, pCCid2;
    int round1, round2;
    int i = 0, ii = 0;
    rnti_t rnti1, rnti2;

    UE_list_t *UE_list = &RC.mac[module_idP]->UE_list;

    for (i = UE_list->head_ul; i >= 0; i = UE_list->next_ul[i]) {

	//LOG_I(MAC,"sort ue ul i %d\n",i);
	for (ii = UE_list->next_ul[i]; ii >= 0; ii = UE_list->next_ul[ii]) {
	    //LOG_I(MAC,"sort ul ue 2 ii %d\n",ii);

	    UE_id1 = i;
	    rnti1 = UE_RNTI(module_idP, UE_id1);

	    if (rnti1 == NOT_A_RNTI)
		continue;
	    if (UE_list->UE_sched_ctrl[i].ul_out_of_sync == 1)
		continue;


	    pCCid1 = UE_PCCID(module_idP, UE_id1);
	    round1 = maxround(module_idP, rnti1, frameP, subframeP, 1);

	    UE_id2 = ii;
	    rnti2 = UE_RNTI(module_idP, UE_id2);

	    if (rnti2 == NOT_A_RNTI)
		continue;
	    if (UE_list->UE_sched_ctrl[UE_id2].ul_out_of_sync == 1)
		continue;

	    pCCid2 = UE_PCCID(module_idP, UE_id2);
	    round2 = maxround(module_idP, rnti2, frameP, subframeP, 1);

	    if (round2 > round1) {
		swap_UEs(UE_list, UE_id1, UE_id2, 1);
	    } else if (round2 == round1) {
		if (UE_list->
		    UE_template[pCCid1][UE_id1].ul_buffer_info[LCGID0] <
		    UE_list->UE_template[pCCid2][UE_id2].
		    ul_buffer_info[LCGID0]) {
		    swap_UEs(UE_list, UE_id1, UE_id2, 1);
		} else if (UE_list->UE_template[pCCid1][UE_id1].
			   ul_total_buffer <
			   UE_list->UE_template[pCCid2][UE_id2].
			   ul_total_buffer) {
		    swap_UEs(UE_list, UE_id1, UE_id2, 1);
		} else if (UE_list->
			   UE_template[pCCid1][UE_id1].pre_assigned_mcs_ul
			   <
			   UE_list->
			   UE_template[pCCid2][UE_id2].pre_assigned_mcs_ul)
		{
		    if (UE_list->UE_template[pCCid2][UE_id2].
			ul_total_buffer > 0) {
			swap_UEs(UE_list, UE_id1, UE_id2, 1);
		    }
		}
	    }
	}
2184
    }
2185
#endif
2186
}