Commit 33d538f3 authored by Cedric Roux's avatar Cedric Roux

Merge remote-tracking branch 'origin/feature-15-carrier_aggregation' into...

Merge remote-tracking branch 'origin/feature-15-carrier_aggregation' into feature-31-ff-scheduler-api

 Conflicts:
    cmake_targets/CMakeLists.txt
    openair1/PHY/LTE_TRANSPORT/dci_tools.c
    openair1/PHY/LTE_TRANSPORT/pucch.c
    openair1/SCHED/phy_procedures_lte_eNb.c
    openair2/LAYER2/MAC/eNB_scheduler_dlsch.c
    openair2/LAYER2/MAC/proto.h
    openair2/RRC/LITE/rrc_eNB.c
parent db716f1f
...@@ -43,6 +43,7 @@ set (OPENAIR_BIN_DIR ${CMAKE_CURRENT_BINARY_DIR}${CMAKE_FILES_DIRECTORY}) ...@@ -43,6 +43,7 @@ set (OPENAIR_BIN_DIR ${CMAKE_CURRENT_BINARY_DIR}${CMAKE_FILES_DIRECTORY})
project (OpenAirInterface) project (OpenAirInterface)
#add_definitions("-DEMIT_ASN_DEBUG=1") #add_definitions("-DEMIT_ASN_DEBUG=1")
add_subdirectory(${OPENAIR_TARGETS}/ARCH/LMSSDR/USERSPACE/LIB/lms7002m lms7002m) add_subdirectory(${OPENAIR_TARGETS}/ARCH/LMSSDR/USERSPACE/LIB/lms7002m lms7002m)
add_subdirectory(${OPENAIR_TARGETS}/ARCH/LMSSDR/USERSPACE/LIB/lmsSDR lmsSDR) add_subdirectory(${OPENAIR_TARGETS}/ARCH/LMSSDR/USERSPACE/LIB/lmsSDR lmsSDR)
add_subdirectory(${OPENAIR_TARGETS}/ARCH/LMSSDR/USERSPACE/LIB/Si5351C Si5351C) add_subdirectory(${OPENAIR_TARGETS}/ARCH/LMSSDR/USERSPACE/LIB/Si5351C Si5351C)
...@@ -675,7 +676,7 @@ add_boolean_option(ENABLE_NEW_MULTICAST False "specific to oaisim") ...@@ -675,7 +676,7 @@ add_boolean_option(ENABLE_NEW_MULTICAST False "specific to oaisim")
add_boolean_option(EXMIMO_IOT True "????") add_boolean_option(EXMIMO_IOT True "????")
add_boolean_option(LARGE_SCALE False "specific to oaisim: defines max eNB=2 and max UE=120") add_boolean_option(LARGE_SCALE False "specific to oaisim: defines max eNB=2 and max UE=120")
add_boolean_option(LOCALIZATION False "???") add_boolean_option(LOCALIZATION False "???")
add_integer_option(MAX_NUM_CCs 1 "????") add_integer_option(MAX_NUM_CCs 2 "????")
add_boolean_option(MU_RECEIVER False "????") add_boolean_option(MU_RECEIVER False "????")
add_boolean_option(NEW_FFT True "????") add_boolean_option(NEW_FFT True "????")
add_boolean_option(OPENAIR1 True "????") add_boolean_option(OPENAIR1 True "????")
...@@ -810,7 +811,7 @@ include_directories("${OPENAIR2_DIR}/LAYER2/RLC/AM_v9.3.0") ...@@ -810,7 +811,7 @@ include_directories("${OPENAIR2_DIR}/LAYER2/RLC/AM_v9.3.0")
include_directories("${OPENAIR2_DIR}/LAYER2/RLC/UM_v9.3.0") include_directories("${OPENAIR2_DIR}/LAYER2/RLC/UM_v9.3.0")
include_directories("${OPENAIR2_DIR}/LAYER2/RLC/TM_v9.3.0") include_directories("${OPENAIR2_DIR}/LAYER2/RLC/TM_v9.3.0")
include_directories("${OPENAIR2_DIR}/LAYER2/PDCP_v10.1.0") include_directories("${OPENAIR2_DIR}/LAYER2/PDCP_v10.1.0")
include_directories("${OPENAIR2_DIR}/RRC/LITE/MESSAGES") #include_directories("${OPENAIR2_DIR}/RRC/LITE/MESSAGES")
include_directories("${OPENAIR2_DIR}/RRC/LITE") include_directories("${OPENAIR2_DIR}/RRC/LITE")
include_directories("${OPENAIR3_DIR}/RAL-LTE/INTERFACE-802.21/INCLUDE") include_directories("${OPENAIR3_DIR}/RAL-LTE/INTERFACE-802.21/INCLUDE")
include_directories("${OPENAIR3_DIR}/RAL-LTE/LTE_RAL_ENB/INCLUDE") include_directories("${OPENAIR3_DIR}/RAL-LTE/LTE_RAL_ENB/INCLUDE")
......
...@@ -30,7 +30,7 @@ set ( LOCALIZATION False ) ...@@ -30,7 +30,7 @@ set ( LOCALIZATION False )
set ( LOG_NO_THREAD 1 ) set ( LOG_NO_THREAD 1 )
set ( DEADLINE_SCHEDULER False ) set ( DEADLINE_SCHEDULER False )
set ( MAC_CONTEXT 1 ) set ( MAC_CONTEXT 1 )
set ( MAX_NUM_CCs 1 ) set ( MAX_NUM_CCs 2 )
set ( MESSAGE_CHART_GENERATOR False ) set ( MESSAGE_CHART_GENERATOR False )
set ( MESSAGE_CHART_GENERATOR_RLC_MAC False ) set ( MESSAGE_CHART_GENERATOR_RLC_MAC False )
set ( MESSAGE_CHART_GENERATOR_PHY False ) set ( MESSAGE_CHART_GENERATOR_PHY False )
......
...@@ -402,8 +402,12 @@ void phy_config_sib13_eNB(uint8_t Mod_id,int CC_id,int mbsfn_Area_idx, ...@@ -402,8 +402,12 @@ void phy_config_sib13_eNB(uint8_t Mod_id,int CC_id,int mbsfn_Area_idx,
void phy_config_dedicated_eNB_step2(PHY_VARS_eNB *phy_vars_eNB) void phy_config_dedicated_eNB_step2(PHY_VARS_eNB *phy_vars_eNB)
{ {
uint8_t UE_id; uint8_t UE_id,i,j;
struct PhysicalConfigDedicated *physicalConfigDedicated; struct PhysicalConfigDedicated *physicalConfigDedicated;
struct PUCCH_ConfigDedicated_v1020__pucch_Format_r10__channelSelection_r10 *cs;
struct PUCCH_ConfigDedicated_v1020__pucch_Format_r10__channelSelection_r10__n1PUCCH_AN_CS_r10__setup__n1PUCCH_AN_CS_List_r10 *list1;
struct N1PUCCH_AN_CS_r10 *list2;
for (UE_id=0; UE_id<NUMBER_OF_UE_MAX; UE_id++) { for (UE_id=0; UE_id<NUMBER_OF_UE_MAX; UE_id++) {
physicalConfigDedicated = phy_vars_eNB->physicalConfigDedicated[UE_id]; physicalConfigDedicated = phy_vars_eNB->physicalConfigDedicated[UE_id];
...@@ -492,8 +496,45 @@ void phy_config_dedicated_eNB_step2(PHY_VARS_eNB *phy_vars_eNB) ...@@ -492,8 +496,45 @@ void phy_config_dedicated_eNB_step2(PHY_VARS_eNB *phy_vars_eNB)
} }
#ifdef Rel10
if (physicalConfigDedicated->ext2) {
if (physicalConfigDedicated->ext2->pucch_ConfigDedicated_v1020) {
if (physicalConfigDedicated->ext2->pucch_ConfigDedicated_v1020->pucch_Format_r10) {
if (physicalConfigDedicated->ext2->pucch_ConfigDedicated_v1020->pucch_Format_r10->present==PUCCH_ConfigDedicated_v1020__pucch_Format_r10_PR_channelSelection_r10) {
phy_vars_eNB->pucch_config_dedicated[UE_id].channel_selection = 1;
cs = &(physicalConfigDedicated->ext2->pucch_ConfigDedicated_v1020->pucch_Format_r10->choice.channelSelection_r10);
if (cs->n1PUCCH_AN_CS_r10) {
if (cs->n1PUCCH_AN_CS_r10->present==PUCCH_ConfigDedicated_v1020__pucch_Format_r10__channelSelection_r10__n1PUCCH_AN_CS_r10_PR_setup) {
list1 = &(cs->n1PUCCH_AN_CS_r10->choice.setup.n1PUCCH_AN_CS_List_r10);
for (i=0;i<list1->list.count;i++) {
list2 = list1->list.array[i];
for (j=0;j<list2->list.count;j++) {
phy_vars_eNB->pucch_config_dedicated[UE_id].n1PUCCH_AN_CS_list[j][i]=*(list2->list.array[j]);
}
}
}
}
}
}
}
}
#endif
phy_vars_eNB->physicalConfigDedicated[UE_id] = NULL; phy_vars_eNB->physicalConfigDedicated[UE_id] = NULL;
} }
/* To be done properly! for the moment we force it to 1 CROUX */
phy_vars_eNB->pucch_config_dedicated[UE_id].channel_selection = 1;
/* to be done properly, for the moment same values as in RRC CROUX */
phy_vars_eNB->pucch_config_dedicated[UE_id].n1PUCCH_AN_CS_list[0][0] = 30;
phy_vars_eNB->pucch_config_dedicated[UE_id].n1PUCCH_AN_CS_list[1][0] = 31;
phy_vars_eNB->pucch_config_dedicated[UE_id].n1PUCCH_AN_CS_list[2][0] = 32;
phy_vars_eNB->pucch_config_dedicated[UE_id].n1PUCCH_AN_CS_list[3][0] = 33;
phy_vars_eNB->pucch_config_dedicated[UE_id].n1PUCCH_AN_CS_list[0][1] = 30;
phy_vars_eNB->pucch_config_dedicated[UE_id].n1PUCCH_AN_CS_list[1][1] = 31;
phy_vars_eNB->pucch_config_dedicated[UE_id].n1PUCCH_AN_CS_list[2][1] = 32;
phy_vars_eNB->pucch_config_dedicated[UE_id].n1PUCCH_AN_CS_list[3][1] = 33;
} }
} }
...@@ -1530,6 +1571,9 @@ int phy_init_lte_eNB(PHY_VARS_eNB *phy_vars_eNB, ...@@ -1530,6 +1571,9 @@ int phy_init_lte_eNB(PHY_VARS_eNB *phy_vars_eNB,
init_prach_tables(839); init_prach_tables(839);
for (UE_id=0; UE_id<NUMBER_OF_UE_MAX; UE_id++)
phy_vars_eNB->CA_configured[UE_id] = 0;
return (0); return (0);
} }
...@@ -3005,6 +3005,9 @@ uint16_t dci_decoding_procedure(PHY_VARS_UE *phy_vars_ue, ...@@ -3005,6 +3005,9 @@ uint16_t dci_decoding_procedure(PHY_VARS_UE *phy_vars_ue,
format0_size_bytes = sizeof(DCI0_5MHz_FDD_t); format0_size_bytes = sizeof(DCI0_5MHz_FDD_t);
format1_size_bits = sizeof_DCI1_5MHz_FDD_t; format1_size_bits = sizeof_DCI1_5MHz_FDD_t;
format1_size_bytes = sizeof(DCI1_5MHz_FDD_t); format1_size_bytes = sizeof(DCI1_5MHz_FDD_t);
//printf("!!!!!!!!!!!!!!!!!!!! %s\n", __FILE__);
printf("%s:%d: abort for debug\n", __FILE__, __LINE__);
abort();
if (frame_parms->nb_antennas_tx_eNB == 2) { if (frame_parms->nb_antennas_tx_eNB == 2) {
format2_size_bits = sizeof_DCI2_5MHz_2A_FDD_t; format2_size_bits = sizeof_DCI2_5MHz_2A_FDD_t;
......
...@@ -365,6 +365,38 @@ struct DCI0_5MHz_FDD { ...@@ -365,6 +365,38 @@ struct DCI0_5MHz_FDD {
typedef struct DCI0_5MHz_FDD DCI0_5MHz_FDD_t; typedef struct DCI0_5MHz_FDD DCI0_5MHz_FDD_t;
#define sizeof_DCI0_5MHz_FDD_t 25 #define sizeof_DCI0_5MHz_FDD_t 25
#if Rel10
/// DCI Format Type 0 Rel10 UE with Carrier Aggregation configured (5 MHz, FDD, 25 bits)
/// Note: no SRS request because we don't configure it for the moment
struct DCI0_5MHz_FDD_R10_CA_UEspec_RAT {
/// Padding
uint32_t padding:7;
/// Resource allocation type
uint32_t rat:1;
/// CQI Request
uint32_t cqi_req:2;
/// DRS Cyclic Shift
uint32_t cshift:3;
/// Power Control
uint32_t TPC:2;
/// New Data Indicator
uint32_t ndi:1;
/// Modulation and Coding Scheme and Redundancy Version
uint32_t mcs:5;
/// RB Assignment (ceil(log2(N_RB_UL*(N_RB_UL+1)/2)) bits)
uint32_t rballoc:9;
/// Hopping flag
uint32_t hopping:1;
/// type = 0 => DCI Format 0, type = 1 => DCI Format 1A
uint32_t type:1;
} __attribute__ ((__packed__));
typedef struct DCI0_5MHz_FDD_R10_CA_UEspec_RAT DCI0_5MHz_FDD_R10_CA_UEspec_RAT_t;
#define sizeof_DCI0_5MHz_FDD_R10_CA_UEspec_RAT_t 25
#endif /* Rel10 */
struct DCI1A_5MHz_FDD { struct DCI1A_5MHz_FDD {
/// padding /// padding
uint32_t padding:8; uint32_t padding:8;
...@@ -389,7 +421,34 @@ struct DCI1A_5MHz_FDD { ...@@ -389,7 +421,34 @@ struct DCI1A_5MHz_FDD {
typedef struct DCI1A_5MHz_FDD DCI1A_5MHz_FDD_t; typedef struct DCI1A_5MHz_FDD DCI1A_5MHz_FDD_t;
#define sizeof_DCI1A_5MHz_FDD_t 25 #define sizeof_DCI1A_5MHz_FDD_t 25
#if Rel10
/* for the moment there is sounding RS config, so no srs bit */
struct DCI1A_5MHz_FDD_R10_UEspec {
/// padding
uint32_t padding:8;
/// Power Control
uint32_t TPC:2;
/// Redundancy version
uint32_t rv:2;
/// New Data Indicator
uint32_t ndi:1;
/// HARQ Process
uint32_t harq_pid:3;
/// Modulation and Coding Scheme and Redundancy Version
uint32_t mcs:5;
/// RB Assignment (ceil(log2(N_RB_DL(N_RB_DL+1)/2)) bits)
uint32_t rballoc:9;
/// Localized/Distributed VRB
uint32_t vrb_type:1;
/// type = 0 => DCI Format 0, type = 1 => DCI Format 1A
uint32_t type:1;
} __attribute__ ((__packed__));
typedef struct DCI1A_5MHz_FDD_R10_UEspec DCI1A_5MHz_FDD_R10_UEspec_t;
#define sizeof_DCI1A_5MHz_FDD_R10_UEspec_t 25
#endif /* Rel10 */
/// DCI Format Type 0 (10 MHz,FDD, 25 bits) /// DCI Format Type 0 (10 MHz,FDD, 25 bits)
struct DCI0_10MHz_FDD { struct DCI0_10MHz_FDD {
...@@ -417,6 +476,38 @@ struct DCI0_10MHz_FDD { ...@@ -417,6 +476,38 @@ struct DCI0_10MHz_FDD {
typedef struct DCI0_10MHz_FDD DCI0_10MHz_FDD_t; typedef struct DCI0_10MHz_FDD DCI0_10MHz_FDD_t;
#define sizeof_DCI0_10MHz_FDD_t 27 #define sizeof_DCI0_10MHz_FDD_t 27
#if Rel10
/// DCI Format Type 0 Rel10 UE with Carrier Aggregation configured (10 MHz, FDD, 27 bits)
/// Note: no SRS request because we don't configure it for the moment
struct DCI0_10MHz_FDD_R10_CA_UEspec_RAT {
/// Padding
uint32_t padding:5;
/// Resource allocation type
uint32_t rat:1;
/// CQI Request
uint32_t cqi_req:2;
/// DRS Cyclic Shift
uint32_t cshift:3;
/// Power Control
uint32_t TPC:2;
/// New Data Indicator
uint32_t ndi:1;
/// Modulation and Coding Scheme and Redundancy Version
uint32_t mcs:5;
/// RB Assignment (ceil(log2(N_RB_UL*(N_RB_UL+1)/2)) bits)
uint32_t rballoc:11;
/// Hopping flag
uint32_t hopping:1;
/// type = 0 => DCI Format 0, type = 1 => DCI Format 1A
uint32_t type:1;
} __attribute__ ((__packed__));
typedef struct DCI0_10MHz_FDD_R10_CA_UEspec_RAT DCI0_10MHz_FDD_R10_CA_UEspec_RAT_t;
#define sizeof_DCI0_10MHz_FDD_R10_CA_UEspec_RAT_t 27
#endif /* Rel10 */
struct DCI1A_10MHz_FDD { struct DCI1A_10MHz_FDD {
/// padding /// padding
uint32_t padding:6; uint32_t padding:6;
...@@ -441,7 +532,36 @@ struct DCI1A_10MHz_FDD { ...@@ -441,7 +532,36 @@ struct DCI1A_10MHz_FDD {
typedef struct DCI1A_10MHz_FDD DCI1A_10MHz_FDD_t; typedef struct DCI1A_10MHz_FDD DCI1A_10MHz_FDD_t;
#define sizeof_DCI1A_10MHz_FDD_t 27 #define sizeof_DCI1A_10MHz_FDD_t 27
/// DCI Format Type 0 (20 MHz,FDD, 25 bits) #if Rel10
/* for the moment there is sounding RS config, so no srs bit */
struct DCI1A_10MHz_FDD_R10_UEspec {
/// padding
uint32_t padding:6;
/// Power Control
uint32_t TPC:2;
/// Redundancy version
uint32_t rv:2;
/// New Data Indicator
uint32_t ndi:1;
/// HARQ Process
uint32_t harq_pid:3;
/// Modulation and Coding Scheme and Redundancy Version
uint32_t mcs:5;
/// RB Assignment (ceil(log2(N_RB_DL(N_RB_DL+1)/2)) bits)
uint32_t rballoc:11;
/// Localized/Distributed VRB
uint32_t vrb_type:1;
/// type = 0 => DCI Format 0, type = 1 => DCI Format 1A
uint32_t type:1;
} __attribute__ ((__packed__));
typedef struct DCI1A_10MHz_FDD_R10_UEspec DCI1A_10MHz_FDD_R10_UEspec_t;
#define sizeof_DCI1A_10MHz_FDD_R10_UEspec_t 27
#endif /* Rel10 */
/// DCI Format Type 0 (20 MHz,FDD, 27 bits)
struct DCI0_20MHz_FDD { struct DCI0_20MHz_FDD {
/// Padding /// Padding
uint32_t padding:5; uint32_t padding:5;
...@@ -467,6 +587,38 @@ struct DCI0_20MHz_FDD { ...@@ -467,6 +587,38 @@ struct DCI0_20MHz_FDD {
typedef struct DCI0_20MHz_FDD DCI0_20MHz_FDD_t; typedef struct DCI0_20MHz_FDD DCI0_20MHz_FDD_t;
#define sizeof_DCI0_20MHz_FDD_t 28 #define sizeof_DCI0_20MHz_FDD_t 28
#if Rel10
/// DCI Format Type 0 Rel10 UE with Carrier Aggregation configured (20 MHz, FDD, 29 bits)
/// Note: no SRS request because we don't configure it for the moment
struct DCI0_20MHz_FDD_R10_CA_UEspec_RAT {
/// Padding
uint32_t padding:3;
/// Resource allocation type
uint32_t rat:1;
/// CQI Request
uint32_t cqi_req:2;
/// DRS Cyclic Shift
uint32_t cshift:3;
/// Power Control
uint32_t TPC:2;
/// New Data Indicator
uint32_t ndi:1;
/// Modulation and Coding Scheme and Redundancy Version
uint32_t mcs:5;
/// RB Assignment (ceil(log2(N_RB_UL*(N_RB_UL+1)/2)) bits)
uint32_t rballoc:13;
/// Hopping flag
uint32_t hopping:1;
/// type = 0 => DCI Format 0, type = 1 => DCI Format 1A
uint32_t type:1;
} __attribute__ ((__packed__));
typedef struct DCI0_20MHz_FDD_R10_CA_UEspec_RAT DCI0_20MHz_FDD_R10_CA_UEspec_RAT_t;
#define sizeof_DCI0_20MHz_FDD_R10_CA_UEspec_RAT_t 29
#endif /* Rel10 */
struct DCI1A_20MHz_FDD { struct DCI1A_20MHz_FDD {
/// padding /// padding
uint32_t padding:4; uint32_t padding:4;
...@@ -491,6 +643,35 @@ struct DCI1A_20MHz_FDD { ...@@ -491,6 +643,35 @@ struct DCI1A_20MHz_FDD {
typedef struct DCI1A_20MHz_FDD DCI1A_20MHz_FDD_t; typedef struct DCI1A_20MHz_FDD DCI1A_20MHz_FDD_t;
#define sizeof_DCI1A_20MHz_FDD_t 28 #define sizeof_DCI1A_20MHz_FDD_t 28
#if Rel10
/* for the moment there is sounding RS config, so no srs bit */
struct DCI1A_20MHz_FDD_R10_UEspec {
/// padding
uint32_t padding:4;
/// Power Control
uint32_t TPC:2;
/// Redundancy version
uint32_t rv:2;
/// New Data Indicator
uint32_t ndi:1;
/// HARQ Process
uint32_t harq_pid:3;
/// Modulation and Coding Scheme and Redundancy Version
uint32_t mcs:5;
/// RB Assignment (ceil(log2(N_RB_DL*(N_RB_DL+1)/2)) bits)
uint32_t rballoc:13;
/// Localized/Distributed VRB
uint32_t vrb_type:1;
/// type = 0 => DCI Format 0, type = 1 => DCI Format 1A
uint32_t type:1;
} __attribute__ ((__packed__));
typedef struct DCI1A_20MHz_FDD_R10_UEspec DCI1A_20MHz_FDD_R10_UEspec_t;
#define sizeof_DCI1A_20MHz_FDD_R10_UEspec_t 29
#endif /* Rel10 */
/// DCI Format Type 1 (1.5 MHz, TDD, 23 bits) /// DCI Format Type 1 (1.5 MHz, TDD, 23 bits)
struct DCI1_1_5MHz_TDD { struct DCI1_1_5MHz_TDD {
/// Dummy bits to align to 32-bits /// Dummy bits to align to 32-bits
......
This diff is collapsed.
...@@ -140,6 +140,8 @@ typedef struct { ...@@ -140,6 +140,8 @@ typedef struct {
uint32_t cqi_alloc2; uint32_t cqi_alloc2;
/// Current Number of RBs /// Current Number of RBs
uint16_t nb_rb; uint16_t nb_rb;
/// Current PUCCH TPC command
uint8_t TPC;
/// downlink power offset field /// downlink power offset field
uint8_t dl_power_off; uint8_t dl_power_off;
/// Concatenated "e"-sequences (for definition see 36-212 V8.6 2009-03, p.17-18) /// Concatenated "e"-sequences (for definition see 36-212 V8.6 2009-03, p.17-18)
...@@ -237,11 +239,13 @@ typedef struct { ...@@ -237,11 +239,13 @@ typedef struct {
// int calibration_flag; // int calibration_flag;
} LTE_UL_UE_HARQ_t; } LTE_UL_UE_HARQ_t;
typedef struct { typedef struct LTE_eNB_DLSCH_s {
/// TX buffers for UE-spec transmission (antenna ports 5 or 7..14, prior to precoding) /// TX buffers for UE-spec transmission (antenna ports 5 or 7..14, prior to precoding)
uint32_t *txdataF[8]; uint32_t *txdataF[8];
/// Allocated RNTI (0 means DLSCH_t is not currently used) /// Allocated RNTI (0 means DLSCH_t is not currently used)
uint16_t rnti; uint16_t rnti;
/// pointers to secondary DLSCH
struct LTE_eNB_DLSCH_s *dlsch_s[5][2];
/// Active flag for baseband transmitter processing /// Active flag for baseband transmitter processing
uint8_t active; uint8_t active;
/// Indicator of TX activation per subframe. Used during PUCCH detection for ACK/NAK. /// Indicator of TX activation per subframe. Used during PUCCH detection for ACK/NAK.
...@@ -578,7 +582,11 @@ typedef struct { ...@@ -578,7 +582,11 @@ typedef struct {
double power_based; double power_based;
} eNB_UE_estimated_distances; } eNB_UE_estimated_distances;
typedef struct { typedef struct LTE_eNB_UE_stats {
#ifdef Rel10
/// pointers to secondary CC ue_stats
struct LTE_eNB_UE_stats *ue_stats_s[5];
#endif
/// UL RSSI per receive antenna /// UL RSSI per receive antenna
int32_t UL_rssi[NB_ANTENNAS_RX]; int32_t UL_rssi[NB_ANTENNAS_RX];
/// PUCCH1a/b power (digital linear) /// PUCCH1a/b power (digital linear)
...@@ -733,6 +741,9 @@ typedef enum { ...@@ -733,6 +741,9 @@ typedef enum {
pucch_format1=0, pucch_format1=0,
pucch_format1a, pucch_format1a,
pucch_format1b, pucch_format1b,
pucch_format1b_cs2,
pucch_format1b_cs3,
pucch_format1b_cs4,
pucch_format2, pucch_format2,
pucch_format2a, pucch_format2a,
pucch_format2b pucch_format2b
......
...@@ -1582,7 +1582,7 @@ uint8_t phich_frame2_pusch_frame(LTE_DL_FRAME_PARMS *frame_parms,frame_t frame,u ...@@ -1582,7 +1582,7 @@ uint8_t phich_frame2_pusch_frame(LTE_DL_FRAME_PARMS *frame_parms,frame_t frame,u
void print_CQI(void *o,UCI_format_t uci_format,uint8_t eNB_id,int N_RB_DL); void print_CQI(void *o,UCI_format_t uci_format,uint8_t eNB_id,int N_RB_DL);
void extract_CQI(void *o,UCI_format_t uci_format,LTE_eNB_UE_stats *stats,uint8_t N_RB_DL, uint16_t * crnti, uint8_t * access_mode); void extract_CQI(void *o,UCI_format_t uci_format,LTE_eNB_UE_stats *stats,uint8_t N_RB_DL, uint16_t * crnti, uint8_t * access_mode, int N_CC);
void fill_CQI(LTE_UE_ULSCH_t *ulsch,PHY_MEASUREMENTS *meas,uint8_t eNB_id, uint8_t harq_pid,int N_RB_DL, rnti_t rnti, uint8_t trans_mode,double sinr_eff); void fill_CQI(LTE_UE_ULSCH_t *ulsch,PHY_MEASUREMENTS *meas,uint8_t eNB_id, uint8_t harq_pid,int N_RB_DL, rnti_t rnti, uint8_t trans_mode,double sinr_eff);
void reset_cba_uci(void *o); void reset_cba_uci(void *o);
......
...@@ -828,7 +828,11 @@ uint32_t rx_pucch(PHY_VARS_eNB *phy_vars_eNB, ...@@ -828,7 +828,11 @@ uint32_t rx_pucch(PHY_VARS_eNB *phy_vars_eNB,
VCD_SIGNAL_DUMPER_DUMP_VARIABLE_BY_NAME(VCD_SIGNAL_DUMPER_VARIABLES_UE0_SR_ENERGY,dB_fixed(stat_max)); VCD_SIGNAL_DUMPER_DUMP_VARIABLE_BY_NAME(VCD_SIGNAL_DUMPER_VARIABLES_UE0_SR_ENERGY,dB_fixed(stat_max));
VCD_SIGNAL_DUMPER_DUMP_VARIABLE_BY_NAME(VCD_SIGNAL_DUMPER_VARIABLES_UE0_SR_THRES,sigma2_dB+pucch1_thres); VCD_SIGNAL_DUMPER_DUMP_VARIABLE_BY_NAME(VCD_SIGNAL_DUMPER_VARIABLES_UE0_SR_THRES,sigma2_dB+pucch1_thres);
} }
} else if ((fmt == pucch_format1a)||(fmt == pucch_format1b)) { } else if ((fmt == pucch_format1a)||
(fmt == pucch_format1b)||
(fmt == pucch_format1b_cs2)||
(fmt == pucch_format1b_cs3)||
(fmt == pucch_format1b_cs4)) {
stat_max = 0; stat_max = 0;
#ifdef DEBUG_PUCCH_RX #ifdef DEBUG_PUCCH_RX
LOG_I(PHY,"Doing PUCCH detection for format 1a/1b\n"); LOG_I(PHY,"Doing PUCCH detection for format 1a/1b\n");
...@@ -1039,19 +1043,35 @@ uint32_t rx_pucch(PHY_VARS_eNB *phy_vars_eNB, ...@@ -1039,19 +1043,35 @@ uint32_t rx_pucch(PHY_VARS_eNB *phy_vars_eNB,
(subframe<<10) + (phy_vars_eNB->pucch1ab_stats_cnt[UE_id][subframe])); (subframe<<10) + (phy_vars_eNB->pucch1ab_stats_cnt[UE_id][subframe]));
#endif #endif
phy_vars_eNB->pucch1ab_stats[UE_id][(subframe<<11) + 2*(phy_vars_eNB->pucch1ab_stats_cnt[UE_id][subframe])] = (stat_re); phy_vars_eNB->pucch1ab_stats[UE_id][(subframe<<11) + 2*(phy_vars_eNB->pucch1ab_stats_cnt[UE_id][subframe])] = (stat_re);
phy_vars_eNB->pucch1ab_stats[UE_id][(subframe<<11) + 1+2*(phy_vars_eNB->pucch1ab_stats_cnt[UE_id][subframe])] = (stat_im); phy_vars_eNB->pucch1ab_stats[UE_id][(subframe<<11) + 1+2*(phy_vars_eNB->pucch1ab_stats_cnt[UE_id][subframe])] = (stat_im);
phy_vars_eNB->pucch1ab_stats_cnt[UE_id][subframe] = (phy_vars_eNB->pucch1ab_stats_cnt[UE_id][subframe]+1)&1023; phy_vars_eNB->pucch1ab_stats_cnt[UE_id][subframe] = (phy_vars_eNB->pucch1ab_stats_cnt[UE_id][subframe]+1)&1023;
/* frame not available here - set to -1 for the moment */ /* frame not available here - set to -1 for the moment */
T(T_ENB_PHY_PUCCH_1AB_IQ, T_INT(phy_vars_eNB->Mod_id), T_INT(UE_id), T_INT(-1), T_INT(subframe), T_INT(stat_re), T_INT(stat_im)); T(T_ENB_PHY_PUCCH_1AB_IQ, T_INT(phy_vars_eNB->Mod_id), T_INT(UE_id), T_INT(-1), T_INT(subframe), T_INT(stat_re), T_INT(stat_im));
switch (fmt) {
*payload = (stat_re<0) ? 1 : 0; case pucch_format1a:
*payload = (stat_re<0) ? 1 : 0;
if (fmt==pucch_format1b) break;
case pucch_format1b:
*payload = (stat_re<0) ? 1 : 0;
*(1+payload) = (stat_im<0) ? 1 : 0; *(1+payload) = (stat_im<0) ? 1 : 0;
} else { // insufficient energy on PUCCH so NAK break;
case pucch_format1b_cs2: // all possibilities are such that b0b1=(00,11)
*payload = ((stat_re+stat_im) < 0) ? 1 : 0;
break;
case pucch_format1b_cs3:
AssertFatal(1==0,"Channel section for A=3 not implemented yet\n");
break;
case pucch_format1b_cs4:
AssertFatal(1==0,"Channel section for A=4 not implemented yet\n");
break;
default:
AssertFatal(1==0,"Impossible pucch format %d, should be 1a/1b/1b_cs2/1b_cs3/1b_cs4\n",fmt);
break;
}
} else { // insufficient energy on PUCCH so NAK/DTX
((int16_t*)&phy_vars_eNB->pucch1ab_stats[UE_id][(subframe<<10) + (phy_vars_eNB->pucch1ab_stats_cnt[UE_id][subframe])])[0] = (int16_t)(stat_re); ((int16_t*)&phy_vars_eNB->pucch1ab_stats[UE_id][(subframe<<10) + (phy_vars_eNB->pucch1ab_stats_cnt[UE_id][subframe])])[0] = (int16_t)(stat_re);
((int16_t*)&phy_vars_eNB->pucch1ab_stats[UE_id][(subframe<<10) + (phy_vars_eNB->pucch1ab_stats_cnt[UE_id][subframe])])[1] = (int16_t)(stat_im); ((int16_t*)&phy_vars_eNB->pucch1ab_stats[UE_id][(subframe<<10) + (phy_vars_eNB->pucch1ab_stats_cnt[UE_id][subframe])])[1] = (int16_t)(stat_im);
phy_vars_eNB->pucch1ab_stats_cnt[UE_id][subframe] = (phy_vars_eNB->pucch1ab_stats_cnt[UE_id][subframe]+1)&1023; phy_vars_eNB->pucch1ab_stats_cnt[UE_id][subframe] = (phy_vars_eNB->pucch1ab_stats_cnt[UE_id][subframe]+1)&1023;
...@@ -1062,7 +1082,7 @@ uint32_t rx_pucch(PHY_VARS_eNB *phy_vars_eNB, ...@@ -1062,7 +1082,7 @@ uint32_t rx_pucch(PHY_VARS_eNB *phy_vars_eNB,
*(1+payload) = 0; *(1+payload) = 0;
} }
} else { } else {
LOG_E(PHY,"[eNB] PUCCH fmt2/2a/2b not supported\n"); LOG_E(PHY,"[eNB] PUCCH fmt2/2a/2b/3 not supported\n");
} }
return((int32_t)stat_max); return((int32_t)stat_max);
......
...@@ -141,6 +141,17 @@ typedef struct __attribute__((packed)) ...@@ -141,6 +141,17 @@ typedef struct __attribute__((packed))
HLC_subband_cqi_nopmi_5MHz; HLC_subband_cqi_nopmi_5MHz;
#define sizeof_HLC_subband_cqi_nopmi_5MHz 18 #define sizeof_HLC_subband_cqi_nopmi_5MHz 18
typedef struct __attribute__((packed))
{
uint32_t padding:28;
uint32_t diffcqi2:14;
uint32_t cqi2:4;
uint32_t diffcqi1:14;
uint32_t cqi1:4;
}
HLC_subband_cqi_nopmi_2CC_5MHz;
#define sizeof_HLC_subband_cqi_nopmi_2CC_5MHz 36
typedef struct __attribute__((packed)) typedef struct __attribute__((packed))
{ {
uint32_t padding:12; uint32_t padding:12;
...@@ -210,6 +221,17 @@ typedef struct __attribute__((packed)) ...@@ -210,6 +221,17 @@ typedef struct __attribute__((packed))
HLC_subband_cqi_nopmi_10MHz; HLC_subband_cqi_nopmi_10MHz;
#define sizeof_HLC_subband_cqi_nopmi_10MHz 22 #define sizeof_HLC_subband_cqi_nopmi_10MHz 22
typedef struct __attribute__((packed))
{
uint32_t padding:20;
uint32_t diffcqi2:18;
uint32_t cqi2:4;
uint32_t diffcqi1:18;
uint32_t cqi1:4;
}
HLC_subband_cqi_nopmi_2CC_10MHz;
#define sizeof_HLC_subband_cqi_nopmi_2CC_10MHz 44
typedef struct __attribute__((packed)) typedef struct __attribute__((packed))
{ {
uint32_t padding:8; uint32_t padding:8;
...@@ -279,6 +301,17 @@ typedef struct __attribute__((packed)) ...@@ -279,6 +301,17 @@ typedef struct __attribute__((packed))
HLC_subband_cqi_nopmi_20MHz; HLC_subband_cqi_nopmi_20MHz;
#define sizeof_HLC_subband_cqi_nopmi_20MHz 30 #define sizeof_HLC_subband_cqi_nopmi_20MHz 30
typedef struct __attribute__((packed))
{
uint32_t padding:4;
uint32_t diffcqi2:26;
uint32_t cqi2:4;
uint32_t diffcqi1:26;
uint32_t cqi1:4;
}
HLC_subband_cqi_nopmi_2CC_20MHz;
#define sizeof_HLC_subband_cqi_nopmi_2CC_20MHz 60
typedef struct __attribute__((packed)) typedef struct __attribute__((packed))
{ {
// uint32_t padding:12; // uint32_t padding:12;
......
...@@ -43,7 +43,7 @@ ...@@ -43,7 +43,7 @@
#include "PHY/vars.h" #include "PHY/vars.h"
#endif #endif
//#define DEBUG_UCI 1 #define DEBUG_UCI 1
uint64_t pmi2hex_2Ar1(uint32_t pmi) uint64_t pmi2hex_2Ar1(uint32_t pmi)
{ {
...@@ -170,7 +170,8 @@ void do_diff_cqi(uint8_t N_RB_DL, ...@@ -170,7 +170,8 @@ void do_diff_cqi(uint8_t N_RB_DL,
} }
} }
void extract_CQI(void *o,UCI_format_t uci_format,LTE_eNB_UE_stats *stats, uint8_t N_RB_DL, uint16_t * crnti, uint8_t * access_mode) //?? ajouter un parametre: CC_count
void extract_CQI(void *o,UCI_format_t uci_format,LTE_eNB_UE_stats *stats, uint8_t N_RB_DL, uint16_t * crnti, uint8_t * access_mode, int N_CC)
{ {
//unsigned char rank; //unsigned char rank;
...@@ -286,12 +287,26 @@ void extract_CQI(void *o,UCI_format_t uci_format,LTE_eNB_UE_stats *stats, uint8_ ...@@ -286,12 +287,26 @@ void extract_CQI(void *o,UCI_format_t uci_format,LTE_eNB_UE_stats *stats, uint8_
break; break;
case HLC_subband_cqi_nopmi: case HLC_subband_cqi_nopmi:
stats->DL_cqi[0] = (((HLC_subband_cqi_nopmi_5MHz *)o)->cqi1); if (N_CC == 1) {
stats->DL_cqi[0] = (((HLC_subband_cqi_nopmi_5MHz *)o)->cqi1);
if (stats->DL_cqi[0] > 24)
stats->DL_cqi[0] = 24; if (stats->DL_cqi[0] > 24)
stats->DL_cqi[0] = 24;
do_diff_cqi(N_RB_DL,stats->DL_subband_cqi[0],stats->DL_cqi[0],((HLC_subband_cqi_nopmi_5MHz *)o)->diffcqi1);
do_diff_cqi(N_RB_DL,stats->DL_subband_cqi[0],stats->DL_cqi[0],((HLC_subband_cqi_nopmi_5MHz *)o)->diffcqi1);
} else if (N_CC == 2) {
stats->DL_cqi[0] = (((HLC_subband_cqi_nopmi_2CC_5MHz *)o)->cqi1);
if (stats->DL_cqi[0] > 24)
stats->DL_cqi[0] = 24;
do_diff_cqi(N_RB_DL, stats->DL_subband_cqi[0], stats->DL_cqi[0],
((HLC_subband_cqi_nopmi_2CC_5MHz *)o)->diffcqi1);
/* update for sCC 0 for the moment */
stats->ue_stats_s[0]->DL_cqi[0] = (((HLC_subband_cqi_nopmi_2CC_5MHz *)o)->cqi2);
if (stats->ue_stats_s[0]->DL_cqi[0] > 24)
stats->ue_stats_s[0]->DL_cqi[0] = 24;
do_diff_cqi(N_RB_DL, stats->ue_stats_s[0]->DL_subband_cqi[0], stats->ue_stats_s[0]->DL_cqi[0],
((HLC_subband_cqi_nopmi_2CC_5MHz *)o)->diffcqi2);
}
break; break;
case HLC_subband_cqi_rank1_2A: case HLC_subband_cqi_rank1_2A:
...@@ -366,12 +381,26 @@ void extract_CQI(void *o,UCI_format_t uci_format,LTE_eNB_UE_stats *stats, uint8_ ...@@ -366,12 +381,26 @@ void extract_CQI(void *o,UCI_format_t uci_format,LTE_eNB_UE_stats *stats, uint8_
break; break;
case HLC_subband_cqi_nopmi: case HLC_subband_cqi_nopmi:
stats->DL_cqi[0] = (((HLC_subband_cqi_nopmi_10MHz *)o)->cqi1); if (N_CC == 1) {
stats->DL_cqi[0] = (((HLC_subband_cqi_nopmi_10MHz *)o)->cqi1);
if (stats->DL_cqi[0] > 24)
stats->DL_cqi[0] = 24; if (stats->DL_cqi[0] > 24)
stats->DL_cqi[0] = 24;
do_diff_cqi(N_RB_DL,stats->DL_subband_cqi[0],stats->DL_cqi[0],((HLC_subband_cqi_nopmi_10MHz *)o)->diffcqi1);
do_diff_cqi(N_RB_DL,stats->DL_subband_cqi[0],stats->DL_cqi[0],((HLC_subband_cqi_nopmi_10MHz *)o)->diffcqi1);
} else if (N_CC == 2) {
stats->DL_cqi[0] = (((HLC_subband_cqi_nopmi_2CC_10MHz *)o)->cqi1);
if (stats->DL_cqi[0] > 24)
stats->DL_cqi[0] = 24;
do_diff_cqi(N_RB_DL, stats->DL_subband_cqi[0], stats->DL_cqi[0],
((HLC_subband_cqi_nopmi_2CC_10MHz *)o)->diffcqi1);
/* update for sCC 0 for the moment */
stats->ue_stats_s[0]->DL_cqi[0] = (((HLC_subband_cqi_nopmi_2CC_10MHz *)o)->cqi2);
if (stats->ue_stats_s[0]->DL_cqi[0] > 24)
stats->ue_stats_s[0]->DL_cqi[0] = 24;
do_diff_cqi(N_RB_DL, stats->ue_stats_s[0]->DL_subband_cqi[0], stats->ue_stats_s[0]->DL_cqi[0],
((HLC_subband_cqi_nopmi_2CC_10MHz *)o)->diffcqi2);
}
break; break;
case HLC_subband_cqi_rank1_2A: case HLC_subband_cqi_rank1_2A:
...@@ -446,12 +475,26 @@ void extract_CQI(void *o,UCI_format_t uci_format,LTE_eNB_UE_stats *stats, uint8_ ...@@ -446,12 +475,26 @@ void extract_CQI(void *o,UCI_format_t uci_format,LTE_eNB_UE_stats *stats, uint8_
break; break;
case HLC_subband_cqi_nopmi: case HLC_subband_cqi_nopmi:
stats->DL_cqi[0] = (((HLC_subband_cqi_nopmi_20MHz *)o)->cqi1); if (N_CC == 1) {
stats->DL_cqi[0] = (((HLC_subband_cqi_nopmi_20MHz *)o)->cqi1);
if (stats->DL_cqi[0] > 24)
stats->DL_cqi[0] = 24; if (stats->DL_cqi[0] > 24)
stats->DL_cqi[0] = 24;
do_diff_cqi(N_RB_DL,stats->DL_subband_cqi[0],stats->DL_cqi[0],((HLC_subband_cqi_nopmi_20MHz *)o)->diffcqi1);
do_diff_cqi(N_RB_DL,stats->DL_subband_cqi[0],stats->DL_cqi[0],((HLC_subband_cqi_nopmi_20MHz *)o)->diffcqi1);
} else if (N_CC == 2) {
stats->DL_cqi[0] = (((HLC_subband_cqi_nopmi_2CC_20MHz *)o)->cqi1);
if (stats->DL_cqi[0] > 24)
stats->DL_cqi[0] = 24;
do_diff_cqi(N_RB_DL, stats->DL_subband_cqi[0], stats->DL_cqi[0],
((HLC_subband_cqi_nopmi_2CC_20MHz *)o)->diffcqi1);
/* update for sCC 0 for the moment */
stats->ue_stats_s[0]->DL_cqi[0] = (((HLC_subband_cqi_nopmi_2CC_20MHz *)o)->cqi2);
if (stats->ue_stats_s[0]->DL_cqi[0] > 24)
stats->ue_stats_s[0]->DL_cqi[0] = 24;
do_diff_cqi(N_RB_DL, stats->ue_stats_s[0]->DL_subband_cqi[0], stats->ue_stats_s[0]->DL_cqi[0],
((HLC_subband_cqi_nopmi_2CC_20MHz *)o)->diffcqi2);
}
break; break;
case HLC_subband_cqi_rank1_2A: case HLC_subband_cqi_rank1_2A:
...@@ -579,6 +622,8 @@ void extract_CQI(void *o,UCI_format_t uci_format,LTE_eNB_UE_stats *stats, uint8_ ...@@ -579,6 +622,8 @@ void extract_CQI(void *o,UCI_format_t uci_format,LTE_eNB_UE_stats *stats, uint8_
} }
*/ */
//extern int FRAME_RX, SUBFRAME_RX, FRAME_TX, SUBFRAME_TX;
//printf("cqi %d %d (RX fr/subfr %d %d) (TX fr/subfr %d %d)\n", stats->DL_cqi[0], stats->DL_cqi[1], FRAME_RX, SUBFRAME_RX, FRAME_TX, SUBFRAME_TX);
} }
......
...@@ -218,6 +218,7 @@ typedef struct PHY_VARS_eNB_s { ...@@ -218,6 +218,7 @@ typedef struct PHY_VARS_eNB_s {
uint8_t local_flag; uint8_t local_flag;
uint32_t rx_total_gain_eNB_dB; uint32_t rx_total_gain_eNB_dB;
LTE_DL_FRAME_PARMS lte_frame_parms; LTE_DL_FRAME_PARMS lte_frame_parms;
uint32_t n_configured_SCCs[NUMBER_OF_UE_MAX];
PHY_MEASUREMENTS_eNB PHY_measurements_eNB[NUMBER_OF_eNB_SECTORS_MAX]; /// Measurement variables PHY_MEASUREMENTS_eNB PHY_measurements_eNB[NUMBER_OF_eNB_SECTORS_MAX]; /// Measurement variables
LTE_eNB_COMMON lte_eNB_common_vars; LTE_eNB_COMMON lte_eNB_common_vars;
LTE_eNB_SRS lte_eNB_srs_vars[NUMBER_OF_UE_MAX]; LTE_eNB_SRS lte_eNB_srs_vars[NUMBER_OF_UE_MAX];
...@@ -235,6 +236,22 @@ typedef struct PHY_VARS_eNB_s { ...@@ -235,6 +236,22 @@ typedef struct PHY_VARS_eNB_s {
LTE_eNB_UE_stats eNB_UE_stats[NUMBER_OF_UE_MAX]; LTE_eNB_UE_stats eNB_UE_stats[NUMBER_OF_UE_MAX];
LTE_eNB_UE_stats *eNB_UE_stats_ptr[NUMBER_OF_UE_MAX]; LTE_eNB_UE_stats *eNB_UE_stats_ptr[NUMBER_OF_UE_MAX];
#if Rel10
/// indicator set to 1 if the UE is configured with multiple DL cells
int CA_configured[NUMBER_OF_UE_MAX];
/// bitfield describing which secondary DL cell is activated
/// "activated" and "configured" are two different concepts
/// an UE may have some secondary cells "configured" which are not "activated",
/// that is there is no traffic scheduled on them, and no MAC CE has been sent
/// (bit 0 is for scell 0, ...)
uint8_t CA_activated[NUMBER_OF_UE_MAX];
/// indicator of the pCell of the UE
/// set to 1 if this cell is the primary cell of the UE
int pCCflag[NUMBER_OF_UE_MAX];
/// CC_id of secondary configured cells (int for it can be == -1)
int sCC_id[NUMBER_OF_UE_MAX][5];
#endif
/// cell-specific reference symbols /// cell-specific reference symbols
uint32_t lte_gold_table[20][2][14]; uint32_t lte_gold_table[20][2][14];
......
...@@ -136,6 +136,15 @@ typedef struct { ...@@ -136,6 +136,15 @@ typedef struct {
uint16_t n1PUCCH_AN_Rep; uint16_t n1PUCCH_AN_Rep;
/// Feedback mode, see TS 36.213 (7.3). \details Applied to both PUCCH and PUSCH feedback. For TDD, should always be set to bundling. /// Feedback mode, see TS 36.213 (7.3). \details Applied to both PUCCH and PUSCH feedback. For TDD, should always be set to bundling.
ANFBmode_t tdd_AckNackFeedbackMode; ANFBmode_t tdd_AckNackFeedbackMode;
#ifdef Rel10
uint8_t channel_selection;
uint16_t n3PUCCH_AN_list[4];
uint16_t n1PUCCH_AN_CS_list[4][2];
#endif
#ifdef Rel11
uint16_t n3PUCCH_AN_list_p1[4];
uint16_t n1PUCCH_AN_CS_list_p1[4][2];
#endif
} PUCCH_CONFIG_DEDICATED; } PUCCH_CONFIG_DEDICATED;
/// PUCCH-ConfigCommon from 36.331 RRC spec /// PUCCH-ConfigCommon from 36.331 RRC spec
...@@ -467,6 +476,10 @@ typedef struct { ...@@ -467,6 +476,10 @@ typedef struct {
} MBSFN_config_t; } MBSFN_config_t;
typedef struct { typedef struct {
/// EUTRA Band
int eutra_band;
/// Dowlink frequency
uint32_t downlink_frequency;
/// Number of resource blocks (RB) in DL /// Number of resource blocks (RB) in DL
uint8_t N_RB_DL; uint8_t N_RB_DL;
/// Number of resource blocks (RB) in UL /// Number of resource blocks (RB) in UL
......
...@@ -262,6 +262,7 @@ ...@@ -262,6 +262,7 @@
#define PUCCH1_THRES 0 #define PUCCH1_THRES 0
/// Threshold for PUCCH Format 1a/1b detection /// Threshold for PUCCH Format 1a/1b detection
#define PUCCH1a_THRES 4 #define PUCCH1a_THRES 4
#define PUCCH1b_THRES 4
/// Data structure for transmission. /// Data structure for transmission.
typedef struct { typedef struct {
......
...@@ -48,6 +48,10 @@ int16_t *primary_synch0_time; ...@@ -48,6 +48,10 @@ int16_t *primary_synch0_time;
int16_t *primary_synch1_time; int16_t *primary_synch1_time;
int16_t *primary_synch2_time; int16_t *primary_synch2_time;
int FRAME_TX;
int SUBFRAME_TX;
int FRAME_RX;
int SUBFRAME_RX;
#include "PHY/CODING/vars.h" #include "PHY/CODING/vars.h"
...@@ -104,7 +108,7 @@ double sinr_to_cqi[4][16]= { {-2.5051, -2.5051, -1.7451, -0.3655, 1.0812, 2.4012 ...@@ -104,7 +108,7 @@ double sinr_to_cqi[4][16]= { {-2.5051, -2.5051, -1.7451, -0.3655, 1.0812, 2.4012
}; };
//int cqi_to_mcs[16]={0, 0, 1, 3, 5, 7, 9, 13, 15, 16, 20, 23, 25, 27, 27, 27}; //int cqi_to_mcs[16]={0, 0, 1, 3, 5, 7, 9, 13, 15, 16, 20, 23, 25, 27, 27, 27};
int cqi_to_mcs[16]= {0, 0, 1, 2, 4, 6, 8, 11, 13, 16, 18, 20, 23, 25, 27, 28}; int cqi_to_mcs[16]= {0, 0, 1, 2, 4, 6, 8, 11, 13, 16, 18, 20, 23, 25, 28, 28};
//for SNR to MI conversion 7 th order Polynomial coeff //for SNR to MI conversion 7 th order Polynomial coeff
double q_qam16[8]= {3.21151853033897e-10,5.55435952230651e-09,-2.30760065362117e-07,-6.25587743817859e-06,4.62251036452795e-06,0.00224150813158937,0.0393723140344367,0.245486379182639}; double q_qam16[8]= {3.21151853033897e-10,5.55435952230651e-09,-2.30760065362117e-07,-6.25587743817859e-06,4.62251036452795e-06,0.00224150813158937,0.0393723140344367,0.245486379182639};
......
...@@ -331,6 +331,27 @@ void ra_failed(uint8_t Mod_id,uint8_t CC_id,uint8_t eNB_index); ...@@ -331,6 +331,27 @@ void ra_failed(uint8_t Mod_id,uint8_t CC_id,uint8_t eNB_index);
*/ */
void ra_succeeded(uint8_t Mod_id,uint8_t CC_id,uint8_t eNB_index); void ra_succeeded(uint8_t Mod_id,uint8_t CC_id,uint8_t eNB_index);
#if Rel10
/** \brief Function to set/unset Carrier Aggregation configuration of an UE.
@param Mod_id Index of eNB
@param rnti RNTI of UE
@param ca_configured pass 1 to activate CA config, 0 to deactivate
*/
void ca_config(uint8_t Mod_id,
uint16_t rnti,
int ca_configured);
/** \brief Function to set Carrier Aggregation activation bitfield of an UE.
@param Mod_id Index of eNB
@param rnti RNTI of UE
@param activation_bitfield activation bitfield
(bit 0 is for secondary cell 0, ...)
*/
void ca_activate(uint8_t Mod_id,
uint16_t rnti,
uint8_t activation_bitfield);
#endif
uint8_t phich_subframe_to_harq_pid(LTE_DL_FRAME_PARMS *frame_parms,uint32_t frame,uint8_t subframe); uint8_t phich_subframe_to_harq_pid(LTE_DL_FRAME_PARMS *frame_parms,uint32_t frame,uint8_t subframe);
/*! \brief Get PDSCH subframe (n+k) from PDCCH subframe n using relationship from Table 8-2 from 36.213 /*! \brief Get PDSCH subframe (n+k) from PDCCH subframe n using relationship from Table 8-2 from 36.213
......
...@@ -787,7 +787,7 @@ LTE_eNB_UE_stats* get_eNB_UE_stats(uint8_t Mod_id, uint8_t CC_id,uint16_t rnti) ...@@ -787,7 +787,7 @@ LTE_eNB_UE_stats* get_eNB_UE_stats(uint8_t Mod_id, uint8_t CC_id,uint16_t rnti)
UE_id = find_ue(rnti, PHY_vars_eNB_g[Mod_id][CC_id]); UE_id = find_ue(rnti, PHY_vars_eNB_g[Mod_id][CC_id]);
if (UE_id == -1) { if (UE_id == -1) {
// LOG_E(PHY,"get_eNB_UE_stats: UE with rnti %x not found\n",rnti); // LOG_E(PHY,"[eNB %d/%d]get_eNB_UE_stats: UE with rnti %x not found\n", Mod_id, CC_id, rnti);
return NULL; return NULL;
} }
......
This diff is collapsed.
...@@ -278,6 +278,7 @@ int main(int argc, char **argv) ...@@ -278,6 +278,7 @@ int main(int argc, char **argv)
//signal(SIGABRT, handler); //signal(SIGABRT, handler);
logInit(); logInit();
set_comp_log(PHY,LOG_DEBUG,LOG_MED,1);
// default parameters // default parameters
n_frames = 1000; n_frames = 1000;
......
...@@ -128,6 +128,8 @@ int main(int argc, char **argv) ...@@ -128,6 +128,8 @@ int main(int argc, char **argv)
pucch_format = pucch_format1a; pucch_format = pucch_format1a;
else if (atoi(optarg)==2) else if (atoi(optarg)==2)
pucch_format = pucch_format1b; pucch_format = pucch_format1b;
else if (atoi(optarg)==3)
pucch_format = pucch_format1b_cs2;
else { else {
printf("Unsupported pucch_format %d\n",atoi(optarg)); printf("Unsupported pucch_format %d\n",atoi(optarg));
exit(-1); exit(-1);
......
...@@ -195,8 +195,8 @@ int main(int argc, char **argv) ...@@ -195,8 +195,8 @@ int main(int argc, char **argv)
printf("Detected cpu_freq %f GHz\n",cpu_freq_GHz); printf("Detected cpu_freq %f GHz\n",cpu_freq_GHz);
logInit(); logInit();
set_comp_log(PHY,LOG_DEBUG,LOG_MED,1);
while ((c = getopt (argc, argv, "hapZEbm:n:Y:X:x:s:w:e:q:d:D:O:c:r:i:f:y:c:oA:C:R:g:N:l:S:T:QB:PI:LF")) != -1) { while ((c = getopt (argc, argv, "hapZEbm:n:Y:X:x:s:w:e:q:d:D:O:c:r:i:f:y:c:oA:C:R:g:N:l:S:T:QB:PI:LF")) != -1) {
switch (c) { switch (c) {
...@@ -1020,7 +1020,7 @@ int main(int argc, char **argv) ...@@ -1020,7 +1020,7 @@ int main(int argc, char **argv)
if ((cqi_flag == 1) && (n_frames == 1) ) { if ((cqi_flag == 1) && (n_frames == 1) ) {
printf("CQI information (O %d) %d %d\n",PHY_vars_UE->ulsch_ue[0]->O, printf("CQI information (O %d) %d %d\n",PHY_vars_UE->ulsch_ue[0]->O,
PHY_vars_UE->ulsch_ue[0]->o[0],PHY_vars_UE->ulsch_ue[0]->o[1]); PHY_vars_UE->ulsch_ue[0]->o[0],PHY_vars_UE->ulsch_ue[0]->o[1]);
print_CQI(PHY_vars_UE->ulsch_ue[0]->o,PHY_vars_UE->ulsch_ue[0]->uci_format,PHY_vars_UE->lte_frame_parms.N_RB_DL,0); print_CQI(PHY_vars_UE->ulsch_ue[0]->o,PHY_vars_UE->ulsch_ue[0]->uci_format,eNB_id,PHY_vars_UE->lte_frame_parms.N_RB_DL);
} }
PHY_vars_UE->ulsch_ue[0]->o_ACK[0] = taus()&1; PHY_vars_UE->ulsch_ue[0]->o_ACK[0] = taus()&1;
......
...@@ -51,7 +51,7 @@ void randominit(unsigned seed_init) ...@@ -51,7 +51,7 @@ void randominit(unsigned seed_init)
{ {
int i; int i;
// this need to be integrated with the existing rng, like taus: navid // this need to be integrated with the existing rng, like taus: navid
msg("Initializing random number generator, seed %x\n",seed_init); printf("Initializing random number generator, seed %x\n",seed_init);
if (seed_init == 0) { if (seed_init == 0) {
srand((unsigned)time(NULL)); srand((unsigned)time(NULL));
......
...@@ -47,3 +47,4 @@ ...@@ -47,3 +47,4 @@
#include "udp_messages_def.h" #include "udp_messages_def.h"
#include "gtpv1_u_messages_def.h" #include "gtpv1_u_messages_def.h"
MESSAGE_DEF(CROUX_HACK, MESSAGE_PRIORITY_MED, croux_struct, croux)
...@@ -55,4 +55,10 @@ ...@@ -55,4 +55,10 @@
#include "udp_messages_types.h" #include "udp_messages_types.h"
#include "gtpv1_u_messages_types.h" #include "gtpv1_u_messages_types.h"
#define CROUX_HACK(ptr) (ptr)->ittiMsg.croux
typedef struct {
int x;
} croux_struct;
#endif /* MESSAGES_TYPES_H_ */ #endif /* MESSAGES_TYPES_H_ */
...@@ -580,6 +580,53 @@ printf("MAC CONFIG lcid %d group %d\n", (int)logicalChannelIdentity, (int)*logic ...@@ -580,6 +580,53 @@ printf("MAC CONFIG lcid %d group %d\n", (int)logicalChannelIdentity, (int)*logic
return(0); return(0);
} }
#ifdef Rel10
//------------------------------------------------------------------------------
void
rrc_mac_config_scell_req(
module_id_t module_id,
rnti_t rnti,
int SCell_CC_id,
int bitmap_bit)
//------------------------------------------------------------------------------
{
int UE_id;
eNB_MAC_INST *eNB=&eNB_mac_inst[module_id];
UE_SCell_config_t *sconf;
int s;
UE_id = find_UE_id(module_id, rnti);
if (UE_id == -1) {
LOG_E(MAC,"[eNB %d][rrc_mac_config_scell_req] UE rnti %x not found\n", module_id, rnti);
return;
}
sconf = &eNB->UE_list.scell_config[UE_id];
if (sconf->scell_count == MAX_NUM_CCs) {
LOG_E(MAC,"[eNB %d][rnti %x][rrc_mac_config_scell_req] cannot configure more than %d SCells\n",
module_id, rnti, MAX_NUM_CCs);
return;
}
/* add the SCell, not active */
s = sconf->scell_count;
sconf->scell[s].CC_id = SCell_CC_id;
sconf->scell[s].bitmap_bit = bitmap_bit;
sconf->scell[s].active = FALSE;
sconf->scell_count++;
/* inform the PHY layer that this UE has scell configured */
mac_xface->ca_config(module_id, rnti, 1);
LOG_I(MAC,"[eNB %d][rrc_mac_config_scell_req] UE rnti %x configuring scell id %d bitmap_bit %d\n",
module_id, rnti, SCell_CC_id, bitmap_bit);
}
#endif /* Rel10 */
#ifdef LOCALIZATION #ifdef LOCALIZATION
//------------------------------------------------------------------------------ //------------------------------------------------------------------------------
double double
......
...@@ -269,28 +269,33 @@ typedef struct { ...@@ -269,28 +269,33 @@ typedef struct {
} __attribute__((__packed__))BCCH_PDU; } __attribute__((__packed__))BCCH_PDU;
#ifdef Rel10 #ifdef Rel10
/*! \brief MCCH payload */ /*! \brief MCCH payload */
typedef struct { typedef struct {
uint8_t payload[MCCH_PAYLOAD_SIZE_MAX] ; uint8_t payload[MCCH_PAYLOAD_SIZE_MAX] ;
} __attribute__((__packed__))MCCH_PDU; } __attribute__((__packed__))MCCH_PDU;
/*!< \brief MAC control element for activation and deactivation of component carriers */ /*!< \brief MAC control element for activation and deactivation of component carriers */
typedef struct { typedef struct {
uint8_t C7:1;/*!< \brief Component carrier 7 */ uint8_t R:1; /*!< \brief Reserved */
uint8_t C6:1;/*!< \brief Component carrier 6 */ uint8_t C1:1; /*!< \brief Component carrier 1 */
uint8_t C5:1;/*!< \brief Component carrier 5 */ uint8_t C2:1; /*!< \brief Component carrier 2 */
uint8_t C4:1;/*!< \brief Component carrier 4 */ uint8_t C3:1; /*!< \brief Component carrier 3 */
uint8_t C3:1;/*!< \brief Component carrier 3 */ uint8_t C4:1; /*!< \brief Component carrier 4 */
uint8_t C2:1;/*!< \brief Component carrier 2 */ uint8_t C5:1; /*!< \brief Component carrier 5 */
uint8_t C1:1;/*!< \brief Component carrier 1 */ uint8_t C6:1; /*!< \brief Component carrier 6 */
uint8_t R:1;/*!< \brief Reserved */ uint8_t C7:1; /*!< \brief Component carrier 7 */
} __attribute__((__packed__))CC_ELEMENT; } __attribute__((__packed__)) CC_ELEMENT;
/*! \brief MAC control element: MCH Scheduling Information */ /*! \brief MAC control element: MCH Scheduling Information */
typedef struct { typedef struct {
uint8_t stop_sf_MSB:3; // octet 1 LSB uint8_t stop_sf_MSB:3; // octet 1 LSB
uint8_t lcid:5; // octet 2 MSB uint8_t lcid:5; // octet 2 MSB
uint8_t stop_sf_LSB:8; uint8_t stop_sf_LSB:8;
} __attribute__((__packed__))MSI_ELEMENT; } __attribute__((__packed__))MSI_ELEMENT;
#endif
#endif /* Rel10 */
/*! \brief Values of CCCH LCID for DLSCH */ /*! \brief Values of CCCH LCID for DLSCH */
#define CCCH_LCHANID 0 #define CCCH_LCHANID 0
/*!\brief Values of BCCH logical channel */ /*!\brief Values of BCCH logical channel */
...@@ -324,7 +329,7 @@ typedef struct { ...@@ -324,7 +329,7 @@ typedef struct {
/*!\brief LCID of MCH scheduling info for DL */ /*!\brief LCID of MCH scheduling info for DL */
#define MCH_SCHDL_INFO 3 #define MCH_SCHDL_INFO 3
/*!\brief LCID of Carrier component activation/deactivation */ /*!\brief LCID of Carrier component activation/deactivation */
#define CC_ACT_DEACT 27 #define CC_ACTIVATE_DEACTIVATE 27
#endif #endif
// ULSCH LCHAN IDs // ULSCH LCHAN IDs
...@@ -811,6 +816,30 @@ typedef struct { ...@@ -811,6 +816,30 @@ typedef struct {
uint8_t sb_size; uint8_t sb_size;
uint8_t nb_active_sb; uint8_t nb_active_sb;
} SBMAP_CONF; } SBMAP_CONF;
#ifdef Rel10
#define NUMBER_OF_SCELL_MAX 4
typedef struct {
int CC_id; /* which CC_id corresponds to this SCell */
int bitmap_bit; /* which bit in the bitmap (see 36321 6.1.3.8)
* corresponds to this SCell
*/
boolean_t active; /* current state of this SCell */
} SCell_config_t;
typedef struct {
SCell_config_t scell[NUMBER_OF_SCELL_MAX];
int scell_count;
boolean_t to_configure; /* set to 1 to indicate that a MAC Control
* Element with the current configuration
* has to be sent to the UE
*/
} UE_SCell_config_t;
#endif /* Rel10 */
/*! \brief UE list used by eNB to order UEs/CC for scheduling*/ /*! \brief UE list used by eNB to order UEs/CC for scheduling*/
typedef struct { typedef struct {
/// DLSCH pdu /// DLSCH pdu
...@@ -827,8 +856,10 @@ typedef struct { ...@@ -827,8 +856,10 @@ typedef struct {
int ordered_ULCCids[MAX_NUM_CCs][NUMBER_OF_UE_MAX]; int ordered_ULCCids[MAX_NUM_CCs][NUMBER_OF_UE_MAX];
/// number of uplink active component carrier /// number of uplink active component carrier
int numactiveULCCs[NUMBER_OF_UE_MAX]; int numactiveULCCs[NUMBER_OF_UE_MAX];
/// number of downlink active component carrier #ifdef Rel10
uint8_t dl_CC_bitmap[NUMBER_OF_UE_MAX]; /// scell configuration
UE_SCell_config_t scell_config[NUMBER_OF_UE_MAX];
#endif
/// eNB to UE statistics /// eNB to UE statistics
eNB_UE_STATS eNB_UE_stats[MAX_NUM_CCs][NUMBER_OF_UE_MAX]; eNB_UE_STATS eNB_UE_stats[MAX_NUM_CCs][NUMBER_OF_UE_MAX];
/// scheduling control info /// scheduling control info
......
...@@ -678,7 +678,9 @@ if (TBsize < msg4_header_length+rrc_sdu_length) abort(); ...@@ -678,7 +678,9 @@ if (TBsize < msg4_header_length+rrc_sdu_length) abort();
0, // no timing advance 0, // no timing advance
RA_template->cont_res_id, // contention res id RA_template->cont_res_id, // contention res id
msg4_padding, // no padding msg4_padding, // no padding
msg4_post_padding); msg4_post_padding,
/* TODO: scell bitmap command */
0, 0);
memcpy((void*)&eNB->UE_list.DLSCH_pdu[CC_id][0][UE_id].payload[0][offset], memcpy((void*)&eNB->UE_list.DLSCH_pdu[CC_id][0][UE_id].payload[0][offset],
&eNB->common_channels[CC_id].CCCH_pdu.payload[0], &eNB->common_channels[CC_id].CCCH_pdu.payload[0],
...@@ -914,7 +916,9 @@ abort(); ...@@ -914,7 +916,9 @@ abort();
0, /* TODO: timing advance */ 0, /* TODO: timing advance */
NULL, // contention res id NULL, // contention res id
padding_size <= 2 ? padding_size : 0, padding_size <= 2 ? padding_size : 0,
padding_size > 2 ? padding_size : 0); padding_size > 2 ? padding_size : 0,
/* TODO: scell bitmap command */
0, 0);
/* fill payload */ /* fill payload */
memcpy(&UE_list->DLSCH_pdu[CC_id][0][UE_id].payload[0][offset], dlsch_buffer, dlsch_filled); memcpy(&UE_list->DLSCH_pdu[CC_id][0][UE_id].payload[0][offset], dlsch_buffer, dlsch_filled);
......
...@@ -529,6 +529,7 @@ void schedule_RA(module_id_t module_idP,frame_t frameP, sub_frame_t subframeP,un ...@@ -529,6 +529,7 @@ void schedule_RA(module_id_t module_idP,frame_t frameP, sub_frame_t subframeP,un
TBsize = 57; TBsize = 57;
} }
printf("Msg4 MCS %d\n", ((DCI1A_5MHz_TDD_1_6_t*)&RA_template[i].RA_alloc_pdu2[0])->mcs);
((DCI1A_5MHz_FDD_t*)&RA_template->RA_alloc_pdu2[0])->type=1; ((DCI1A_5MHz_FDD_t*)&RA_template->RA_alloc_pdu2[0])->type=1;
((DCI1A_5MHz_FDD_t*)&RA_template->RA_alloc_pdu2[0])->vrb_type=0; ((DCI1A_5MHz_FDD_t*)&RA_template->RA_alloc_pdu2[0])->vrb_type=0;
((DCI1A_5MHz_FDD_t*)&RA_template->RA_alloc_pdu2[0])->rv=0; ((DCI1A_5MHz_FDD_t*)&RA_template->RA_alloc_pdu2[0])->rv=0;
...@@ -643,7 +644,11 @@ void schedule_RA(module_id_t module_idP,frame_t frameP, sub_frame_t subframeP,un ...@@ -643,7 +644,11 @@ void schedule_RA(module_id_t module_idP,frame_t frameP, sub_frame_t subframeP,un
0, // no timing advance 0, // no timing advance
RA_template->cont_res_id, // contention res id RA_template->cont_res_id, // contention res id
msg4_padding, // no padding msg4_padding, // no padding
msg4_post_padding); msg4_post_padding
#ifdef Rel10
, 0, 0 /* no scell config */
#endif
);
memcpy((void*)&eNB->UE_list.DLSCH_pdu[CC_id][0][(unsigned char)UE_id].payload[0][(unsigned char)offset], memcpy((void*)&eNB->UE_list.DLSCH_pdu[CC_id][0][(unsigned char)UE_id].payload[0][(unsigned char)offset],
&eNB->common_channels[CC_id].CCCH_pdu.payload[0], &eNB->common_channels[CC_id].CCCH_pdu.payload[0],
......
This diff is collapsed.
...@@ -604,7 +604,11 @@ int schedule_MBMS(module_id_t module_idP, uint8_t CC_id, frame_t frameP, sub_fra ...@@ -604,7 +604,11 @@ int schedule_MBMS(module_id_t module_idP, uint8_t CC_id, frame_t frameP, sub_fra
0, // no timing advance 0, // no timing advance
NULL, // no contention res id NULL, // no contention res id
padding, padding,
post_padding); post_padding
#ifdef Rel10
, 0, 0 /* no scell config */
#endif
);
eNB_mac_inst[module_idP].common_channels[CC_id].MCH_pdu.Pdu_size=TBS; eNB_mac_inst[module_idP].common_channels[CC_id].MCH_pdu.Pdu_size=TBS;
eNB_mac_inst[module_idP].common_channels[CC_id].MCH_pdu.sync_area=i; eNB_mac_inst[module_idP].common_channels[CC_id].MCH_pdu.sync_area=i;
......
...@@ -267,6 +267,10 @@ int add_new_ue(module_id_t mod_idP, int cc_idP, rnti_t rntiP,int harq_pidP) ...@@ -267,6 +267,10 @@ int add_new_ue(module_id_t mod_idP, int cc_idP, rnti_t rntiP,int harq_pidP)
UE_list->numactiveCCs[UE_id] = 1; UE_list->numactiveCCs[UE_id] = 1;
UE_list->numactiveULCCs[UE_id] = 1; UE_list->numactiveULCCs[UE_id] = 1;
UE_list->pCC_id[UE_id] = cc_idP; UE_list->pCC_id[UE_id] = cc_idP;
#ifdef Rel10
UE_list->scell_config[UE_id].scell_count = 0;
UE_list->scell_config[UE_id].to_configure = 0;
#endif
UE_list->ordered_CCids[0][UE_id] = cc_idP; UE_list->ordered_CCids[0][UE_id] = cc_idP;
UE_list->ordered_ULCCids[0][UE_id] = cc_idP; UE_list->ordered_ULCCids[0][UE_id] = cc_idP;
UE_list->num_UEs++; UE_list->num_UEs++;
...@@ -740,7 +744,31 @@ void add_common_dci(DCI_PDU *DCI_pdu, ...@@ -740,7 +744,31 @@ void add_common_dci(DCI_PDU *DCI_pdu,
void add_ue_spec_dci(DCI_PDU *DCI_pdu,void *pdu,rnti_t rnti,unsigned char dci_size_bytes,unsigned char aggregation,unsigned char dci_size_bits,unsigned char dci_fmt,uint8_t ra_flag) void add_ue_spec_dci(DCI_PDU *DCI_pdu,void *pdu,rnti_t rnti,unsigned char dci_size_bytes,unsigned char aggregation,unsigned char dci_size_bits,unsigned char dci_fmt,uint8_t ra_flag)
{ {
extern int FRAME_RX, SUBFRAME_RX, FRAME_TX, SUBFRAME_TX;
static char *ff[] = { "format0", "format1",
"format1A",
"format1B",
"format1C",
"format1D",
"format1E_2A_M10PRB",
"format2",
"format2A",
"format2B",
"format2C",
"format2D",
"format3",
"UNKNOWN", "UNKNOWN", "UNKNOWN", "UNKNOWN", "UNKNOWN", "UNKNOWN", "UNKNOWN", "UNKNOWN", "UNKNOWN", "UNKNOWN", "UNKNOWN", "UNKNOWN", "UNKNOWN", "UNKNOWN", "UNKNOWN", "UNKNOWN", "UNKNOWN", "UNKNOWN", "UNKNOWN", "UNKNOWN", "UNKNOWN", "UNKNOWN", "UNKNOWN", "UNKNOWN", "UNKNOWN", "UNKNOWN", "UNKNOWN", "UNKNOWN", "UNKNOWN", "UNKNOWN", "UNKNOWN" };
//printf("add_ue_spec_dci rnti %x dci_fmt %s len %d (RX fr/subfr %d %d) (TX fr/subfr %d %d)\n", rnti, ff[dci_fmt], dci_size_bits, FRAME_RX, SUBFRAME_RX, FRAME_TX, SUBFRAME_TX);
//int i;
//char v[64];
//unsigned int val = *(unsigned int*)pdu;
//for (i = 0; i < dci_size_bits; i++) {
// v[i] = val&0x80000000?'1':'0';
// val <<= 1;
//}
//v[i]=0;
//printf("%s\n", v);
memcpy(&DCI_pdu->dci_alloc[DCI_pdu->Num_common_dci+DCI_pdu->Num_ue_spec_dci].dci_pdu[0],pdu,dci_size_bytes); memcpy(&DCI_pdu->dci_alloc[DCI_pdu->Num_common_dci+DCI_pdu->Num_ue_spec_dci].dci_pdu[0],pdu,dci_size_bytes);
DCI_pdu->dci_alloc[DCI_pdu->Num_common_dci+DCI_pdu->Num_ue_spec_dci].dci_length = dci_size_bits; DCI_pdu->dci_alloc[DCI_pdu->Num_common_dci+DCI_pdu->Num_ue_spec_dci].dci_length = dci_size_bits;
DCI_pdu->dci_alloc[DCI_pdu->Num_common_dci+DCI_pdu->Num_ue_spec_dci].L = aggregation; DCI_pdu->dci_alloc[DCI_pdu->Num_common_dci+DCI_pdu->Num_ue_spec_dci].L = aggregation;
...@@ -1210,6 +1238,11 @@ void SR_indication(module_id_t mod_idP, int cc_idP, frame_t frameP, rnti_t rntiP ...@@ -1210,6 +1238,11 @@ void SR_indication(module_id_t mod_idP, int cc_idP, frame_t frameP, rnti_t rntiP
UE_list_t *UE_list = &eNB_mac_inst[mod_idP].UE_list; UE_list_t *UE_list = &eNB_mac_inst[mod_idP].UE_list;
if (UE_id != -1) { if (UE_id != -1) {
/* no SR indication if the CC is not the primary CC
* (the UE currently can only transmit on the primary CC)
*/
if (cc_idP != UE_PCCID(mod_idP, UE_id))
return;
if (mac_eNB_get_rrc_status(mod_idP,UE_RNTI(mod_idP,UE_id)) < RRC_CONNECTED) if (mac_eNB_get_rrc_status(mod_idP,UE_RNTI(mod_idP,UE_id)) < RRC_CONNECTED)
LOG_I(MAC,"[eNB %d][SR %x] Frame %d subframeP %d Signaling SR for UE %d on CC_id %d\n",mod_idP,rntiP,frameP,subframeP, UE_id,cc_idP); LOG_I(MAC,"[eNB %d][SR %x] Frame %d subframeP %d Signaling SR for UE %d on CC_id %d\n",mod_idP,rntiP,frameP,subframeP, UE_id,cc_idP);
UE_list->UE_template[cc_idP][UE_id].ul_SR = 1; UE_list->UE_template[cc_idP][UE_id].ul_SR = 1;
......
This diff is collapsed.
...@@ -588,6 +588,10 @@ int l2_init(LTE_DL_FRAME_PARMS *frame_parms,int eMBMS_active, char *uecap_xer,ui ...@@ -588,6 +588,10 @@ int l2_init(LTE_DL_FRAME_PARMS *frame_parms,int eMBMS_active, char *uecap_xer,ui
mac_xface->Msg1_transmitted = Msg1_tx; mac_xface->Msg1_transmitted = Msg1_tx;
mac_xface->ra_failed = ra_failed; mac_xface->ra_failed = ra_failed;
mac_xface->ra_succeeded = ra_succeeded; mac_xface->ra_succeeded = ra_succeeded;
#if Rel10
mac_xface->ca_config = ca_config;
mac_xface->ca_activate = ca_activate;
#endif
mac_xface->mac_phy_remove_ue = mac_phy_remove_ue; mac_xface->mac_phy_remove_ue = mac_phy_remove_ue;
LOG_I(MAC,"[MAIN] init UE MAC functions \n"); LOG_I(MAC,"[MAIN] init UE MAC functions \n");
......
...@@ -724,7 +724,7 @@ void dlsch_scheduler_pre_processor (module_id_t Mod_id, ...@@ -724,7 +724,7 @@ void dlsch_scheduler_pre_processor (module_id_t Mod_id,
//PHY_vars_eNB_g[Mod_id]->mu_mimo_mode[UE_id].dl_pow_off = dl_pow_off[UE_id]; //PHY_vars_eNB_g[Mod_id]->mu_mimo_mode[UE_id].dl_pow_off = dl_pow_off[UE_id];
if (ue_sched_ctl->pre_nb_available_rbs[CC_id] > 0 ) { if (ue_sched_ctl->pre_nb_available_rbs[CC_id] > 0 ) {
LOG_D(MAC,"******************DL Scheduling Information for UE%d ************************\n",UE_id); LOG_D(MAC,"******************DL Scheduling Information for UE%d CC %d************************\n",UE_id, CC_id);
LOG_D(MAC,"dl power offset UE%d = %d \n",UE_id,ue_sched_ctl->dl_pow_off[CC_id]); LOG_D(MAC,"dl power offset UE%d = %d \n",UE_id,ue_sched_ctl->dl_pow_off[CC_id]);
LOG_D(MAC,"***********RB Alloc for every subband for UE%d ***********\n",UE_id); LOG_D(MAC,"***********RB Alloc for every subband for UE%d ***********\n",UE_id);
......
...@@ -701,6 +701,8 @@ in the DLSCH buffer. ...@@ -701,6 +701,8 @@ in the DLSCH buffer.
@param ue_cont_res_id Pointer to contention resolution identifier (NULL means not present in payload) @param ue_cont_res_id Pointer to contention resolution identifier (NULL means not present in payload)
@param short_padding Number of bytes for short padding (0,1,2) @param short_padding Number of bytes for short padding (0,1,2)
@param post_padding number of bytes for padding at the end of MAC PDU @param post_padding number of bytes for padding at the end of MAC PDU
@param scell_bitmap bitmap of the scell config, valid if scell_bitmap_cmd != 0
@param scell_bitmap_cmd pass a value != 0 to put the scell config in the PDU
@returns Number of bytes used for header @returns Number of bytes used for header
*/ */
unsigned char generate_dlsch_header(unsigned char *mac_header, unsigned char generate_dlsch_header(unsigned char *mac_header,
...@@ -711,7 +713,12 @@ unsigned char generate_dlsch_header(unsigned char *mac_header, ...@@ -711,7 +713,12 @@ unsigned char generate_dlsch_header(unsigned char *mac_header,
short timing_advance_cmd, short timing_advance_cmd,
unsigned char *ue_cont_res_id, unsigned char *ue_cont_res_id,
unsigned char short_padding, unsigned char short_padding,
unsigned short post_padding); unsigned short post_padding
#ifdef Rel10
, uint8_t scell_bitmap,
int scell_bitmap_cmd
#endif
);
/** \brief RRC Configuration primitive for PHY/MAC. Allows configuration of PHY/MAC resources based on System Information (SI), RRCConnectionSetup and RRCConnectionReconfiguration messages. /** \brief RRC Configuration primitive for PHY/MAC. Allows configuration of PHY/MAC resources based on System Information (SI), RRCConnectionSetup and RRCConnectionReconfiguration messages.
@param Mod_id Instance ID of eNB @param Mod_id Instance ID of eNB
...@@ -779,6 +786,25 @@ void rrc_mac_fapi_configure_srb12(int module_id, int CC_id, int rnti); ...@@ -779,6 +786,25 @@ void rrc_mac_fapi_configure_srb12(int module_id, int CC_id, int rnti);
#endif #endif
#ifdef Rel10
/** \brief RRC Secondary cell Configuration.
*
* Allows configuration of a secondary cell for a given UE.
* To be called several times to add more secondary cells (up to 4).
*
* @param module_id Module ID of eNB
* @param rnti id of UE to configure
* @param CC_id Component Carrier to add as a secondary cell
* @param
*/
void
rrc_mac_config_scell_req(
module_id_t module_id,
rnti_t rnti,
int CC_id,
int bitmap_bit);
#endif
/** \brief get the estimated UE distance from the PHY->MAC layer. /** \brief get the estimated UE distance from the PHY->MAC layer.
@param Mod_id Instance ID of eNB @param Mod_id Instance ID of eNB
@param UE_id Index of UE if this is an eNB configuration @param UE_id Index of UE if this is an eNB configuration
......
...@@ -134,7 +134,20 @@ typedef struct { ...@@ -134,7 +134,20 @@ typedef struct {
/// get delta mcs for fast UL AMC /// get delta mcs for fast UL AMC
int16_t (*estimate_ue_tx_power)(uint32_t tbs, uint32_t nb_rb, uint8_t control_only, lte_prefix_type_t ncp, uint8_t use_srs); int16_t (*estimate_ue_tx_power)(uint32_t tbs, uint32_t nb_rb, uint8_t control_only, lte_prefix_type_t ncp, uint8_t use_srs);
#if Rel10
/// set/unset Carrier Aggregation configuration of an UE
void (*ca_config)(uint8_t Mod_id,
uint16_t rnti,
int ca_configured);
/// activate/deactivate scells
/// bit 0 of activation_bitfield is scell 0, ...
void (*ca_activate)(uint8_t Mod_id,
uint16_t rnti,
uint8_t activation_bitfield);
#endif
int (*mac_phy_remove_ue)(module_id_t Mod_idP,rnti_t rntiP); int (*mac_phy_remove_ue)(module_id_t Mod_idP,rnti_t rntiP);
/// UE functions /// UE functions
/// reset the ue phy /// reset the ue phy
......
...@@ -2021,6 +2021,28 @@ do_RRCConnectionReconfiguration( ...@@ -2021,6 +2021,28 @@ do_RRCConnectionReconfiguration(
rrcConnectionReconfiguration->criticalExtensions.choice.c1.choice.rrcConnectionReconfiguration_r8.dedicatedInfoNASList = dedicatedInfoNASList; rrcConnectionReconfiguration->criticalExtensions.choice.c1.choice.rrcConnectionReconfiguration_r8.dedicatedInfoNASList = dedicatedInfoNASList;
rrcConnectionReconfiguration->criticalExtensions.choice.c1.choice.rrcConnectionReconfiguration_r8.securityConfigHO = NULL; rrcConnectionReconfiguration->criticalExtensions.choice.c1.choice.rrcConnectionReconfiguration_r8.securityConfigHO = NULL;
if (SCell_config != NULL) {
RRCConnectionReconfiguration_r8_IEs_t *r8;
RRCConnectionReconfiguration_v890_IEs_t *v890;
RRCConnectionReconfiguration_v920_IEs_t *v920;
RRCConnectionReconfiguration_v1020_IEs_t *v1020;
SCellToAddModList_r10_t *addlist;
r8 = &rrcConnectionReconfiguration->criticalExtensions.choice.c1.choice.rrcConnectionReconfiguration_r8;
if (r8->nonCriticalExtension == NULL)
r8->nonCriticalExtension = CALLOC(1, sizeof(RRCConnectionReconfiguration_v890_IEs_t));
v890 = r8->nonCriticalExtension;
if (v890->nonCriticalExtension == NULL)
v890->nonCriticalExtension = CALLOC(1, sizeof(RRCConnectionReconfiguration_v920_IEs_t));
v920 = v890->nonCriticalExtension;
if (v920->nonCriticalExtension == NULL)
v920->nonCriticalExtension = CALLOC(1, sizeof(RRCConnectionReconfiguration_v1020_IEs_t));
v1020 = v920->nonCriticalExtension;
if (v1020->sCellToAddModList_r10 == NULL)
v1020->sCellToAddModList_r10 = CALLOC(1, sizeof(SCellToAddModList_r10_t));
addlist = v1020->sCellToAddModList_r10;
if (ASN_SEQUENCE_ADD(&addlist->list, SCell_config)) abort();
}
enc_rval = uper_encode_to_buffer(&asn_DEF_DL_DCCH_Message, enc_rval = uper_encode_to_buffer(&asn_DEF_DL_DCCH_Message,
(void*)&dl_dcch_msg, (void*)&dl_dcch_msg,
buffer, buffer,
...@@ -2028,6 +2050,14 @@ do_RRCConnectionReconfiguration( ...@@ -2028,6 +2050,14 @@ do_RRCConnectionReconfiguration(
AssertFatal (enc_rval.encoded > 0, "ASN1 message encoding failed (%s, %l)!\n", AssertFatal (enc_rval.encoded > 0, "ASN1 message encoding failed (%s, %l)!\n",
enc_rval.failed_type->name, enc_rval.encoded); enc_rval.failed_type->name, enc_rval.encoded);
{
int i;
for(i=0;i<(enc_rval.encoded+7)/8;i++)
printf("%2.2x ", (unsigned char)buffer[i]);
printf("\n");
}
xer_fprint(stdout,&asn_DEF_DL_DCCH_Message,(void*)&dl_dcch_msg);
#ifdef XER_PRINT #ifdef XER_PRINT
xer_fprint(stdout,&asn_DEF_DL_DCCH_Message,(void*)&dl_dcch_msg); xer_fprint(stdout,&asn_DEF_DL_DCCH_Message,(void*)&dl_dcch_msg);
#endif #endif
......
...@@ -300,10 +300,38 @@ typedef struct HANDOVER_INFO_UE_s { ...@@ -300,10 +300,38 @@ typedef struct HANDOVER_INFO_UE_s {
uint8_t measFlag; uint8_t measFlag;
} HANDOVER_INFO_UE; } HANDOVER_INFO_UE;
#ifdef Rel10
typedef struct {
int band;
} ue_ca_band;
typedef struct {
ue_ca_band dl_band[maxSimultaneousBands_r10];
ue_ca_band ul_band[maxSimultaneousBands_r10];
int dl_band_count;
int ul_band_count;
} ue_ca_band_combination;
typedef struct {
int CC_id; /* the CC_id of this secondary cell */
int bitmap_bit; /* the bitmap_bit of this secondary cell (see 36321 6.1.3.8) */
} ue_ca_scell_config;
typedef struct {
ue_ca_band_combination combination[maxBandComb_r10];
int combination_count;
ue_ca_scell_config scell[7]; /* up to 7 secondary cells may be configured for an UE */
int scell_count;
} ue_ca_capabilities;
#endif /* Rel10 */
typedef struct eNB_RRC_UE_s { typedef struct eNB_RRC_UE_s {
uint8_t primaryCC_id; uint8_t primaryCC_id;
#ifdef Rel10 #ifdef Rel10
SCellToAddMod_r10_t sCell_config[2]; SCellToAddMod_r10_t sCell_config[2];
ue_ca_capabilities ca;
#endif #endif
SRB_ToAddModList_t* SRB_configList; SRB_ToAddModList_t* SRB_configList;
SRB_ToAddModList_t* SRB_configList2[RRC_TRANSACTION_IDENTIFIER_NUMBER]; SRB_ToAddModList_t* SRB_configList2[RRC_TRANSACTION_IDENTIFIER_NUMBER];
......
...@@ -259,6 +259,9 @@ rrc_eNB_generate_defaultRRCConnectionReconfiguration( ...@@ -259,6 +259,9 @@ rrc_eNB_generate_defaultRRCConnectionReconfiguration(
const protocol_ctxt_t* const ctxt_pP, const protocol_ctxt_t* const ctxt_pP,
rrc_eNB_ue_context_t* const ue_context_pP, rrc_eNB_ue_context_t* const ue_context_pP,
const uint8_t ho_state const uint8_t ho_state
#ifdef Rel10
, SCellToAddMod_r10_t *scell
#endif
); );
void void
......
This diff is collapsed.
...@@ -105,6 +105,7 @@ rrc_eNB_S1AP_get_ue_ids( ...@@ -105,6 +105,7 @@ rrc_eNB_S1AP_get_ue_ids(
// we assume that a rrc_ue_s1ap_ids_s is initially inserted in initial_id2_s1ap_ids // we assume that a rrc_ue_s1ap_ids_s is initially inserted in initial_id2_s1ap_ids
if (eNB_ue_s1ap_id > 0) { if (eNB_ue_s1ap_id > 0) {
LOG_E(S1AP, "CROUX: I'm not sure of this...\n");
h_rc = hashtable_get(rrc_instance_pP->s1ap_id2_s1ap_ids, (hash_key_t)eNB_ue_s1ap_id, (void**)&result); h_rc = hashtable_get(rrc_instance_pP->s1ap_id2_s1ap_ids, (hash_key_t)eNB_ue_s1ap_id, (void**)&result);
} }
if (ue_initial_id != UE_INITIAL_ID_INVALID) { if (ue_initial_id != UE_INITIAL_ID_INVALID) {
...@@ -657,7 +658,7 @@ rrc_eNB_send_S1AP_NAS_FIRST_REQ( ...@@ -657,7 +658,7 @@ rrc_eNB_send_S1AP_NAS_FIRST_REQ(
rrc_ue_s1ap_ids_p); rrc_ue_s1ap_ids_p);
if (h_rc != HASH_TABLE_OK) { if (h_rc != HASH_TABLE_OK) {
LOG_E(S1AP, "[eNB %d] Error while hashtable_insert in initial_id2_s1ap_ids ue_initial_id %u\n", LOG_E(S1AP, "[eNB %d] Error while hashtable_insert in initial_id2_s1ap_ids ue_initial_id %u\n",
ctxt_pP->module_id, ue_context_pP->ue_context.ue_initial_id); ctxt_pP->module_id, ue_context_pP->ue_context.ue_initial_id);
} }
/* Assume that cause is coded in the same way in RRC and S1ap, just check that the value is in S1ap range */ /* Assume that cause is coded in the same way in RRC and S1ap, just check that the value is in S1ap range */
...@@ -1069,6 +1070,7 @@ int rrc_eNB_process_S1AP_UE_CTXT_MODIFICATION_REQ(MessageDef *msg_p, const char ...@@ -1069,6 +1070,7 @@ int rrc_eNB_process_S1AP_UE_CTXT_MODIFICATION_REQ(MessageDef *msg_p, const char
/*------------------------------------------------------------------------------*/ /*------------------------------------------------------------------------------*/
int rrc_eNB_process_S1AP_UE_CONTEXT_RELEASE_REQ (MessageDef *msg_p, const char *msg_name, instance_t instance) int rrc_eNB_process_S1AP_UE_CONTEXT_RELEASE_REQ (MessageDef *msg_p, const char *msg_name, instance_t instance)
{ {
printf("\n\n\nrrc_eNB_process_S1AP_UE_CONTEXT_RELEASE_REQ\n\n\n");
uint32_t eNB_ue_s1ap_id; uint32_t eNB_ue_s1ap_id;
struct rrc_eNB_ue_context_s* ue_context_p = NULL; struct rrc_eNB_ue_context_s* ue_context_p = NULL;
......
...@@ -321,7 +321,7 @@ int nas_message_decrypt( ...@@ -321,7 +321,7 @@ int nas_message_decrypt(
header->message_authentication_code,header->message_authentication_code, header->message_authentication_code,header->message_authentication_code,
mac,mac, (emm_security_context!=NULL)?emm_security_context->type:88); mac,mac, (emm_security_context!=NULL)?emm_security_context->type:88);
#if defined(NAS_MME) #if defined(NAS_MME)
LOG_FUNC_RETURN (TLV_DECODE_MAC_MISMATCH); //LOG_FUNC_RETURN (TLV_DECODE_MAC_MISMATCH);
#else #else
//#warning "added test on integrity algorithm because of SECURITY_MODE_COMMAND not correctly handled in UE (check integrity)" //#warning "added test on integrity algorithm because of SECURITY_MODE_COMMAND not correctly handled in UE (check integrity)"
......
...@@ -846,11 +846,11 @@ int s1ap_eNB_handle_ue_context_release_command(uint32_t assoc_id, ...@@ -846,11 +846,11 @@ int s1ap_eNB_handle_ue_context_release_command(uint32_t assoc_id,
"existing UE context 0x%06x\n", "existing UE context 0x%06x\n",
assoc_id, assoc_id,
enb_ue_s1ap_id); enb_ue_s1ap_id);
/*MessageDef *msg_complete_p; MessageDef *msg_complete_p;
msg_complete_p = itti_alloc_new_message(TASK_RRC_ENB, S1AP_UE_CONTEXT_RELEASE_COMPLETE); msg_complete_p = itti_alloc_new_message(TASK_RRC_ENB, S1AP_UE_CONTEXT_RELEASE_COMPLETE);
S1AP_UE_CONTEXT_RELEASE_COMPLETE(msg_complete_p).eNB_ue_s1ap_id = enb_ue_s1ap_id; S1AP_UE_CONTEXT_RELEASE_COMPLETE(msg_complete_p).eNB_ue_s1ap_id = enb_ue_s1ap_id;
itti_send_msg_to_task(TASK_S1AP, ue_desc_p->eNB_instance->instance <=> 0, msg_complete_p); itti_send_msg_to_task(TASK_S1AP, 0, msg_complete_p);
*/
return -1; return -1;
} else { } else {
MSC_LOG_TX_MESSAGE( MSC_LOG_TX_MESSAGE(
......
...@@ -361,6 +361,9 @@ int openair0_config(openair0_config_t *openair0_cfg, int UE_flag) ...@@ -361,6 +361,9 @@ int openair0_config(openair0_config_t *openair0_cfg, int UE_flag)
#endif #endif
for (ant=0; ant<4; ant++) { for (ant=0; ant<4; ant++) {
p_exmimo_config->rf.rf_mode[ant] = 0;
p_exmimo_config->rf.rf_freq_tx[ant] = (unsigned int)openair0_cfg[card].tx_freq[ant];
p_exmimo_config->rf.rf_freq_rx[ant] = (unsigned int)openair0_cfg[card].rx_freq[ant];
if (openair0_cfg[card].rx_freq[ant] || openair0_cfg[card].tx_freq[ant]) { if (openair0_cfg[card].rx_freq[ant] || openair0_cfg[card].tx_freq[ant]) {
ACTIVE_RF += (1<<ant)<<5; ACTIVE_RF += (1<<ant)<<5;
p_exmimo_config->rf.rf_mode[ant] = RF_MODE_BASE; p_exmimo_config->rf.rf_mode[ant] = RF_MODE_BASE;
...@@ -396,10 +399,13 @@ int openair0_config(openair0_config_t *openair0_cfg, int UE_flag) ...@@ -396,10 +399,13 @@ int openair0_config(openair0_config_t *openair0_cfg, int UE_flag)
p_exmimo_config->rf.rf_mode[ant] += LNAByp; p_exmimo_config->rf.rf_mode[ant] += LNAByp;
break; break;
} }
} else { }
#if 0
else {
p_exmimo_config->rf.rf_mode[ant] = 0; p_exmimo_config->rf.rf_mode[ant] = 0;
p_exmimo_config->rf.do_autocal[ant] = 0; p_exmimo_config->rf.do_autocal[ant] = 0;
} }
#endif
p_exmimo_config->rf.rf_local[ant] = rf_local[ant]; p_exmimo_config->rf.rf_local[ant] = rf_local[ant];
p_exmimo_config->rf.rf_rxdc[ant] = rf_rxdc[ant]; p_exmimo_config->rf.rf_rxdc[ant] = rf_rxdc[ant];
......
...@@ -958,6 +958,7 @@ void do_OFDM_mod_rt(int subframe,PHY_VARS_eNB *phy_vars_eNB) ...@@ -958,6 +958,7 @@ void do_OFDM_mod_rt(int subframe,PHY_VARS_eNB *phy_vars_eNB)
slot_offset = subframe*phy_vars_eNB->lte_frame_parms.samples_per_tti; slot_offset = subframe*phy_vars_eNB->lte_frame_parms.samples_per_tti;
//printf("slot_offset_F %d slot_offset %d slot_sizeF %d subframe %d\n", slot_offset_F, slot_offset, slot_sizeF, subframe);
if ((subframe_select(&phy_vars_eNB->lte_frame_parms,subframe)==SF_DL)|| if ((subframe_select(&phy_vars_eNB->lte_frame_parms,subframe)==SF_DL)||
((subframe_select(&phy_vars_eNB->lte_frame_parms,subframe)==SF_S))) { ((subframe_select(&phy_vars_eNB->lte_frame_parms,subframe)==SF_S))) {
// LOG_D(HW,"Frame %d: Generating slot %d\n",frame,next_slot); // LOG_D(HW,"Frame %d: Generating slot %d\n",frame,next_slot);
...@@ -995,6 +996,27 @@ void do_OFDM_mod_rt(int subframe,PHY_VARS_eNB *phy_vars_eNB) ...@@ -995,6 +996,27 @@ void do_OFDM_mod_rt(int subframe,PHY_VARS_eNB *phy_vars_eNB)
len = phy_vars_eNB->lte_frame_parms.samples_per_tti>>1; len = phy_vars_eNB->lte_frame_parms.samples_per_tti>>1;
else else
len = phy_vars_eNB->lte_frame_parms.samples_per_tti; len = phy_vars_eNB->lte_frame_parms.samples_per_tti;
#ifdef EXMIMO
/* check that we don't write too late
* note: this test has only been tried for 5MHz and 10MHz bandwidths
*/
{
volatile unsigned int *DAQ_MBOX = openair0_daq_cnt();
unsigned int current = *DAQ_MBOX;
unsigned int target_min = (subframe+9)%10 * 15;
unsigned int target_max;
switch (phy_vars_eNB->lte_frame_parms.N_RB_DL) {
case 25: target_max = target_min + 15 - 6; break;
case 50: target_max = target_min + 15 - 3; break; /* test code always fail at -1 so may fail at -2 so -3 max */
default: printf("N_RB_DL %d not handled, exit\n", phy_vars_eNB->lte_frame_parms.N_RB_DL); exit(1);
}
if (!(current >= target_min && current <= target_max))
LOG_E(PHY, "[eNB %d/%d] writing subframe %d is done too late! (current %d min %d max %d)\n",
phy_vars_eNB->Mod_id, phy_vars_eNB->CC_id, subframe, current, target_min, target_max);
}
#endif
/* /*
for (i=0;i<len;i+=4) { for (i=0;i<len;i+=4) {
dummy_tx_b[i] = 0x100; dummy_tx_b[i] = 0x100;
...@@ -1005,7 +1027,6 @@ void do_OFDM_mod_rt(int subframe,PHY_VARS_eNB *phy_vars_eNB) ...@@ -1005,7 +1027,6 @@ void do_OFDM_mod_rt(int subframe,PHY_VARS_eNB *phy_vars_eNB)
for (i=0; i<len; i++) { for (i=0; i<len; i++) {
tx_offset = (int)slot_offset+time_offset[aa]+i; tx_offset = (int)slot_offset+time_offset[aa]+i;
if (tx_offset<0) if (tx_offset<0)
tx_offset += LTE_NUMBER_OF_SUBFRAMES_PER_FRAME*phy_vars_eNB->lte_frame_parms.samples_per_tti; tx_offset += LTE_NUMBER_OF_SUBFRAMES_PER_FRAME*phy_vars_eNB->lte_frame_parms.samples_per_tti;
...@@ -1063,6 +1084,7 @@ static struct { ...@@ -1063,6 +1084,7 @@ static struct {
*/ */
static void* eNB_thread_tx( void* param ) static void* eNB_thread_tx( void* param )
{ {
while(1) pause();
static int eNB_thread_tx_status[NUM_ENB_THREADS]; static int eNB_thread_tx_status[NUM_ENB_THREADS];
eNB_proc_t *proc = (eNB_proc_t*)param; eNB_proc_t *proc = (eNB_proc_t*)param;
...@@ -1252,6 +1274,8 @@ static void* eNB_thread_tx( void* param ) ...@@ -1252,6 +1274,8 @@ static void* eNB_thread_tx( void* param )
if (oai_exit) if (oai_exit)
break; break;
FRAME_TX = proc->frame_tx;
SUBFRAME_TX = proc->subframe;
phy_procedures_eNB_TX( proc->subframe, PHY_vars_eNB_g[0][proc->CC_id], 0, no_relay, NULL ); phy_procedures_eNB_TX( proc->subframe, PHY_vars_eNB_g[0][proc->CC_id], 0, no_relay, NULL );
/* we're done, let the next one proceed */ /* we're done, let the next one proceed */
...@@ -1366,6 +1390,7 @@ static void* eNB_thread_tx( void* param ) ...@@ -1366,6 +1390,7 @@ static void* eNB_thread_tx( void* param )
*/ */
static void* eNB_thread_rx( void* param ) static void* eNB_thread_rx( void* param )
{ {
while(1) pause();
static int eNB_thread_rx_status[NUM_ENB_THREADS]; static int eNB_thread_rx_status[NUM_ENB_THREADS];
eNB_proc_t *proc = (eNB_proc_t*)param; eNB_proc_t *proc = (eNB_proc_t*)param;
...@@ -1538,6 +1563,8 @@ LOG_I( HW, "[SCHED][eNB] RX thread %d started on CPU %d TID %ld, sched_policy = ...@@ -1538,6 +1563,8 @@ LOG_I( HW, "[SCHED][eNB] RX thread %d started on CPU %d TID %ld, sched_policy =
if ((((PHY_vars_eNB_g[0][proc->CC_id]->lte_frame_parms.frame_type == TDD )&&(subframe_select(&PHY_vars_eNB_g[0][proc->CC_id]->lte_frame_parms,proc->subframe_rx)==SF_UL)) || if ((((PHY_vars_eNB_g[0][proc->CC_id]->lte_frame_parms.frame_type == TDD )&&(subframe_select(&PHY_vars_eNB_g[0][proc->CC_id]->lte_frame_parms,proc->subframe_rx)==SF_UL)) ||
(PHY_vars_eNB_g[0][proc->CC_id]->lte_frame_parms.frame_type == FDD))) { (PHY_vars_eNB_g[0][proc->CC_id]->lte_frame_parms.frame_type == FDD))) {
FRAME_RX = proc->frame_rx;
SUBFRAME_RX = proc->subframe;
phy_procedures_eNB_RX( proc->subframe, PHY_vars_eNB_g[0][proc->CC_id], 0, no_relay ); phy_procedures_eNB_RX( proc->subframe, PHY_vars_eNB_g[0][proc->CC_id], 0, no_relay );
} }
...@@ -1688,6 +1715,7 @@ void init_eNB_proc(void) ...@@ -1688,6 +1715,7 @@ void init_eNB_proc(void)
*/ */
void kill_eNB_proc(void) void kill_eNB_proc(void)
{ {
exit(0);
int *status; int *status;
for (int CC_id=0; CC_id<MAX_NUM_CCs; CC_id++) for (int CC_id=0; CC_id<MAX_NUM_CCs; CC_id++)
...@@ -1757,7 +1785,19 @@ void kill_eNB_proc(void) ...@@ -1757,7 +1785,19 @@ void kill_eNB_proc(void)
} }
} }
static unsigned long daclock(void)
{
static unsigned long old=0;
unsigned long new;
unsigned long ret;
struct timespec t;
clock_gettime(CLOCK_MONOTONIC_RAW, &t);
new = (unsigned long)t.tv_sec * (unsigned long)1000000000 + (unsigned long)t.tv_nsec;
if (new < old) { printf("that cant be %ld %ld new %ld old %ld %ld\n", (unsigned long)t.tv_sec, (unsigned long)t.tv_nsec, new, old, sizeof(unsigned long)); fflush(stdout); abort(); }
ret = new - old;
old = new;
return ret;
}
...@@ -1818,6 +1858,7 @@ static void* eNB_thread( void* arg ) ...@@ -1818,6 +1858,7 @@ static void* eNB_thread( void* arg )
attr.sched_nice = 0; attr.sched_nice = 0;
attr.sched_priority = 0; attr.sched_priority = 0;
#if 0
/* This creates a .2 ms reservation */ /* This creates a .2 ms reservation */
attr.sched_policy = SCHED_DEADLINE; attr.sched_policy = SCHED_DEADLINE;
attr.sched_runtime = (0.3 * 100) * 10000; attr.sched_runtime = (0.3 * 100) * 10000;
...@@ -1831,8 +1872,21 @@ static void* eNB_thread( void* arg ) ...@@ -1831,8 +1872,21 @@ static void* eNB_thread( void* arg )
LOG_I(HW,"[SCHED][eNB] eNB main deadline thread %ld started on CPU %d\n", LOG_I(HW,"[SCHED][eNB] eNB main deadline thread %ld started on CPU %d\n",
gettid(),sched_getcpu()); gettid(),sched_getcpu());
} }
#endif
#else attr.sched_policy = SCHED_FIFO;
attr.sched_nice = -20;
attr.sched_priority = sched_get_priority_max(SCHED_FIFO);
if (sched_setattr(0, &attr, flags) < 0 ) {
perror("[SCHED] main eNB thread: sched_setattr failed\n");
exit(0);
}
cpu_set_t cpuset;
CPU_ZERO(&cpuset);
CPU_SET(3, &cpuset);
if (pthread_setaffinity_np(pthread_self(), sizeof(cpu_set_t), &cpuset)) abort();
#else //DEADLINE_SCHEDULER
int policy, s, j; int policy, s, j;
struct sched_param sparam; struct sched_param sparam;
...@@ -2208,6 +2262,7 @@ static void* eNB_thread( void* arg ) ...@@ -2208,6 +2262,7 @@ static void* eNB_thread( void* arg )
#else #else
int sf = hw_subframe; int sf = hw_subframe;
#endif #endif
/* TODO: is it the right place for master tick? */ /* TODO: is it the right place for master tick? */
T(T_ENB_MASTER_TICK, T_INT(0), T_INT(frame % 1024), T_INT(sf)); T(T_ENB_MASTER_TICK, T_INT(0), T_INT(frame % 1024), T_INT(sf));
#if 0 #if 0
...@@ -2810,12 +2865,20 @@ static void get_options (int argc, char **argv) ...@@ -2810,12 +2865,20 @@ static void get_options (int argc, char **argv)
//for (j=0; j < enb_properties->properties[i]->nb_cc; j++ ){ //for (j=0; j < enb_properties->properties[i]->nb_cc; j++ ){
frame_parms[CC_id]->Nid_cell = enb_properties->properties[i]->Nid_cell[CC_id]; frame_parms[CC_id]->Nid_cell = enb_properties->properties[i]->Nid_cell[CC_id];
fprintf(stderr, "CC %d ID %d\n", CC_id, frame_parms[CC_id]->Nid_cell);
frame_parms[CC_id]->N_RB_DL = enb_properties->properties[i]->N_RB_DL[CC_id]; frame_parms[CC_id]->N_RB_DL = enb_properties->properties[i]->N_RB_DL[CC_id];
frame_parms[CC_id]->N_RB_UL = enb_properties->properties[i]->N_RB_DL[CC_id]; frame_parms[CC_id]->N_RB_UL = enb_properties->properties[i]->N_RB_DL[CC_id];
frame_parms[CC_id]->nb_antennas_tx = enb_properties->properties[i]->nb_antennas_tx[CC_id]; frame_parms[CC_id]->nb_antennas_tx = enb_properties->properties[i]->nb_antennas_tx[CC_id];
frame_parms[CC_id]->nb_antennas_tx_eNB = enb_properties->properties[i]->nb_antenna_ports[CC_id]; frame_parms[CC_id]->nb_antennas_tx_eNB = enb_properties->properties[i]->nb_antenna_ports[CC_id];
frame_parms[CC_id]->nb_antennas_rx = enb_properties->properties[i]->nb_antennas_rx[CC_id]; frame_parms[CC_id]->nb_antennas_rx = enb_properties->properties[i]->nb_antennas_rx[CC_id];
//} // j //} // j
frame_parms[CC_id]->eutra_band = enb_properties->properties[i]->eutra_band[CC_id];
frame_parms[CC_id]->downlink_frequency = enb_properties->properties[i]->downlink_frequency[CC_id];
frame_parms[CC_id]->phich_config_common.phich_duration = enb_properties->properties[i]->phich_duration[CC_id];
frame_parms[CC_id]->phich_config_common.phich_resource = enb_properties->properties[i]->phich_resource[CC_id];
frame_parms[CC_id]->pdsch_config_common.referenceSignalPower = enb_properties->properties[i]->pdsch_referenceSignalPower[CC_id];
frame_parms[CC_id]->pdsch_config_common.p_b = enb_properties->properties[i]->pdsch_p_b[CC_id];
} }
...@@ -3606,6 +3669,7 @@ int main( int argc, char **argv ) ...@@ -3606,6 +3669,7 @@ int main( int argc, char **argv )
} }
#ifdef EXMIMO #ifdef EXMIMO
openair0_cfg[0].rx_freq[1] = 0;
openair0_config(&openair0_cfg[0],UE_flag); openair0_config(&openair0_cfg[0],UE_flag);
#endif #endif
...@@ -4087,5 +4151,3 @@ void print_opp_meas(void) { ...@@ -4087,5 +4151,3 @@ void print_opp_meas(void) {
print_meas(&softmodem_stats_rx_sf[sfn],"[eNB][total_phy_proc_rx]",NULL,NULL); print_meas(&softmodem_stats_rx_sf[sfn],"[eNB][total_phy_proc_rx]",NULL,NULL);
} }
} }
Markdown is supported
0%
or
You are about to add 0 people to the discussion. Proceed with caution.
Finish editing this message first!
Please register or to comment