Commit 71e28181 authored by Guy De Souza's avatar Guy De Souza

Merge with nr-polar-encoder-optimizations

parents bc466248 70e7e661
......@@ -197,8 +197,8 @@ MACRLCs = (
tr_s_preference = "local_L1";
tr_n_preference = "local_RRC";
phy_test_mode = 0;
puSch10xSnr = 200;
puCch10xSnr = 200;
puSch10xSnr = 160;
puCch10xSnr = 160;
}
);
......@@ -227,7 +227,7 @@ RUs = (
THREAD_STRUCT = (
{
#three config for level of parallelism "PARALLEL_SINGLE_THREAD", "PARALLEL_RU_L1_SPLIT", or "PARALLEL_RU_L1_TRX_SPLIT"
parallel_config = "PARALLEL_RU_L1_TRX_SPLIT";
parallel_config = "PARALLEL_SINGLE_THREAD";
#two option for worker "WORKER_DISABLE" or "WORKER_ENABLE"
worker_config = "WORKER_ENABLE";
}
......
......@@ -197,8 +197,8 @@ MACRLCs = (
tr_s_preference = "local_L1";
tr_n_preference = "local_RRC";
phy_test_mode = 0;
puSch10xSnr = 200;
puCch10xSnr = 200;
puSch10xSnr = 160;
puCch10xSnr = 160;
}
);
......@@ -218,7 +218,7 @@ RUs = (
att_rx = 0;
bands = [7];
max_pdschReferenceSignalPower = -27;
max_rxgain = 115;
max_rxgain = 125;
eNB_instances = [0];
}
......@@ -227,7 +227,7 @@ RUs = (
THREAD_STRUCT = (
{
#three config for level of parallelism "PARALLEL_SINGLE_THREAD", "PARALLEL_RU_L1_SPLIT", or "PARALLEL_RU_L1_TRX_SPLIT"
parallel_config = "PARALLEL_RU_L1_TRX_SPLIT";
parallel_config = "PARALLEL_SINGLE_THREAD";
#two option for worker "WORKER_DISABLE" or "WORKER_ENABLE"
worker_config = "WORKER_ENABLE";
}
......
......@@ -197,8 +197,8 @@ MACRLCs = (
tr_s_preference = "local_L1";
tr_n_preference = "local_RRC";
phy_test_mode = 0;
puSch10xSnr = 200;
puCch10xSnr = 200;
puSch10xSnr = 160;
puCch10xSnr = 160;
}
);
......@@ -218,7 +218,7 @@ RUs = (
att_rx = 0;
bands = [7];
max_pdschReferenceSignalPower = -27;
max_rxgain = 115;
max_rxgain = 120;
eNB_instances = [0];
}
......@@ -227,7 +227,7 @@ RUs = (
THREAD_STRUCT = (
{
#three config for level of parallelism "PARALLEL_SINGLE_THREAD", "PARALLEL_RU_L1_SPLIT", or "PARALLEL_RU_L1_TRX_SPLIT"
parallel_config = "PARALLEL_RU_L1_TRX_SPLIT";
parallel_config = "PARALLEL_SINGLE_THREAD";
#two option for worker "WORKER_DISABLE" or "WORKER_ENABLE"
worker_config = "WORKER_ENABLE";
}
......
......@@ -200,8 +200,8 @@ MACRLCs = (
tr_s_preference = "local_L1";
tr_n_preference = "local_RRC";
phy_test_mode = 0;
puSch10xSnr = 200;
puCch10xSnr = 200;
puSch10xSnr = 160;
puCch10xSnr = 160;
}
);
......@@ -234,7 +234,7 @@ RUs = (
THREAD_STRUCT = (
{
#three config for level of parallelism "PARALLEL_SINGLE_THREAD", "PARALLEL_RU_L1_SPLIT", or "PARALLEL_RU_L1_TRX_SPLIT"
parallel_config = "PARALLEL_RU_L1_TRX_SPLIT";
parallel_config = "PARALLEL_SINGLE_THREAD";
#two option for worker "WORKER_DISABLE" or "WORKER_ENABLE"
worker_config = "WORKER_ENABLE";
}
......
......@@ -200,8 +200,8 @@ MACRLCs = (
tr_s_preference = "local_L1";
tr_n_preference = "local_RRC";
phy_test_mode = 0;
puSch10xSnr = 200;
puCch10xSnr = 200;
puSch10xSnr = 160;
puCch10xSnr = 160;
}
);
......@@ -234,7 +234,7 @@ RUs = (
THREAD_STRUCT = (
{
#three config for level of parallelism "PARALLEL_SINGLE_THREAD", "PARALLEL_RU_L1_SPLIT", or "PARALLEL_RU_L1_TRX_SPLIT"
parallel_config = "PARALLEL_RU_L1_TRX_SPLIT";
parallel_config = "PARALLEL_SINGLE_THREAD";
#two option for worker "WORKER_DISABLE" or "WORKER_ENABLE"
worker_config = "WORKER_ENABLE";
}
......
......@@ -200,8 +200,8 @@ MACRLCs = (
tr_s_preference = "local_L1";
tr_n_preference = "local_RRC";
phy_test_mode = 0;
puSch10xSnr = 200;
puCch10xSnr = 200;
puSch10xSnr = 160;
puCch10xSnr = 160;
}
);
......@@ -234,7 +234,7 @@ RUs = (
THREAD_STRUCT = (
{
#three config for level of parallelism "PARALLEL_SINGLE_THREAD", "PARALLEL_RU_L1_SPLIT", or "PARALLEL_RU_L1_TRX_SPLIT"
parallel_config = "PARALLEL_RU_L1_TRX_SPLIT";
parallel_config = "PARALLEL_SINGLE_THREAD";
#two option for worker "WORKER_DISABLE" or "WORKER_ENABLE"
worker_config = "WORKER_ENABLE";
}
......
......@@ -20,7 +20,7 @@ RUs = (
THREAD_STRUCT = (
{
#three config for level of parallelism "PARALLEL_SINGLE_THREAD", "PARALLEL_RU_L1_SPLIT", or "PARALLEL_RU_L1_TRX_SPLIT"
parallel_config = "PARALLEL_RU_L1_TRX_SPLIT";
parallel_config = "PARALLEL_SINGLE_THREAD";
#two option for worker "WORKER_DISABLE" or "WORKER_ENABLE"
worker_config = "WORKER_ENABLE";
}
......
......@@ -1504,7 +1504,8 @@ class SSHConnection():
return ENB_PROCESS_ASSERTION
if foundRealTimeIssue:
logging.debug('\u001B[1;37;41m eNB faced real time issues! \u001B[0m')
return ENB_PROCESS_REALTIME_ISSUE
self.htmleNBFailureMsg += 'eNB faced real time issues!\n'
#return ENB_PROCESS_REALTIME_ISSUE
return 0
def TerminateeNB(self):
......
......@@ -1053,16 +1053,24 @@
<testCase id="015104">
<class>execution</class>
<desc>nr_pbchsim Test cases. (Test1: PBCH-only),
(Test2: PBCH and synchronization)</desc>
<desc>nr_pbchsim Test cases. (Test1: PBCH-only, 106 PRB),
(Test2: PBCH and synchronization, 106PBR),
(Test3: PBCH-only, 217 PRB),
(Test4: PBCH and synchronization, 217 RPB),
(Test5: PBCH-only, 217 PRB),
(Test6: PBCH and synchronization, 217 PRB)</desc>
<pre_compile_prog></pre_compile_prog>
<compile_prog>$OPENAIR_DIR/cmake_targets/build_oai</compile_prog>
<compile_prog_args> --phy_simulators -c </compile_prog_args>
<pre_exec>$OPENAIR_DIR/cmake_targets/autotests/tools/free_mem.bash</pre_exec>
<pre_exec_args></pre_exec_args>
<main_exec> $OPENAIR_DIR/targets/bin/nr_pbchsim.Rel15</main_exec>
<main_exec_args>-s-11 -S-10 -n1000
-s-11 -S-10 -n10 -I</main_exec_args>
<main_exec_args>-s-11 -S-10 -n1000 -R106
-s-11 -S-10 -n10 -I -R106
-s-11 -S-10 -n1000 -R217 -N10
-s-11 -S-10 -n10 -I -R217 -N10
-s-11 -S-10 -n1000 -R273 -N20
-s-11 -S-10 -n10 -I -R273 -N20</main_exec_args>
<tags>nr_pbchsim.test1 nr_pbchsim.test2</tags>
<search_expr_true>PBCH test OK</search_expr_true>
<search_expr_false>segmentation fault|assertion|exiting|fatal</search_expr_false>
......
......@@ -339,6 +339,10 @@ function main() {
FORCE_DEADLINE_SCHEDULER_FLAG_USER="True"
echo_info "Enabling the usage of deadline scheduler"
shift 1;;
--enable-cpu-affinity)
CPU_AFFINITY_FLAG_USER="True"
echo_info "Enabling CPU Affinity (only valid when not using deadline scheduler)"
shift 1;;
--disable-cpu-affinity)
CPU_AFFINITY_FLAG_USER="False"
echo_info "Disabling CPU Affinity (only valid when not using deadline scheduler)"
......
......@@ -197,10 +197,11 @@ typedef struct {
} fapi_nr_rx_indication_body_t;
///
#define NFAPI_RX_IND_MAX_PDU 100
typedef struct {
uint32_t sfn_slot;
uint16_t number_pdus;
fapi_nr_rx_indication_body_t *rx_indication_body;
fapi_nr_rx_indication_body_t rx_indication_body[NFAPI_RX_IND_MAX_PDU];
} fapi_nr_rx_indication_t;
typedef struct {
......
......@@ -157,7 +157,9 @@ int test_ldpc(short No_iteration,
//double code_rate_actual_vec[8] = {0.2, 0.33333, 0.4, 0.5, 0.66667, 0.73333, 0.81481, 0.88};
t_nrLDPC_dec_params decParams;
t_nrLDPC_procBuf nrLDPC_procBuf;
t_nrLDPC_procBuf* p_nrLDPC_procBuf = &nrLDPC_procBuf;
t_nrLDPC_time_stats decoder_profiler;
t_nrLDPC_time_stats* p_decoder_profiler =&decoder_profiler ;
......@@ -210,6 +212,9 @@ int test_ldpc(short No_iteration,
reset_meas(&decoder_profiler.llr2bit);
//reset_meas(&decoder_profiler.total);
// Allocate LDPC decoder buffers
p_nrLDPC_procBuf = nrLDPC_init_mem();
for (j=0;j<MAX_NUM_DLSCH_SEGMENTS;j++) {
for (i=0; i<block_length/8; i++) {
test_input[j][i]=(unsigned char) rand();
......@@ -411,7 +416,7 @@ int test_ldpc(short No_iteration,
// decoder supports BG2, Z=128 & 256
//esimated_output=ldpc_decoder(channel_output_fixed, block_length, No_iteration, (double)((float)nom_rate/(float)denom_rate));
///nrLDPC_decoder(&decParams, channel_output_fixed, estimated_output, NULL);
n_iter = nrLDPC_decoder(&decParams, (int8_t*)channel_output_fixed[j], (int8_t*)estimated_output[j], p_decoder_profiler);
n_iter = nrLDPC_decoder(&decParams, (int8_t*)channel_output_fixed[j], (int8_t*)estimated_output[j], p_nrLDPC_procBuf, p_decoder_profiler);
stop_meas(time_decoder);
}
......@@ -486,6 +491,8 @@ int test_ldpc(short No_iteration,
//free(channel_output_fixed);
//free(estimated_output);
nrLDPC_free_mem(p_nrLDPC_procBuf);
print_meas(&time,"ldpc_encoder",NULL,NULL);
print_meas(time_optim,"ldpc_encoder_optim",NULL,NULL);
print_meas(&tinput,"ldpc_encoder_optim(input)",NULL,NULL);
......
......@@ -387,6 +387,8 @@ unsigned int crc12 (unsigned char * inptr, int bitlen);
@param inPtr Pointer to input byte stream
@param bitlen length of inputs in bits*/
unsigned int crc8 (unsigned char * inptr, int bitlen);
int check_crc(uint8_t* decoded_bytes, uint32_t n, uint32_t F, uint8_t crc_type);
/*!\fn void phy_viterbi_dot11_sse2(int8_t *y, uint8_t *decoded_bytes, uint16_t n,int offset,int traceback)
\brief This routine performs a SIMD optmized Viterbi decoder for the 802.11 64-state convolutional code. It can be
......@@ -441,8 +443,6 @@ int32_t rate_matching_lte(uint32_t N_coded,
uint8_t *inPtr,
uint32_t off);
void crcTableInit (void);
unsigned int crcbit (unsigned char * inputptr, int octetlen, unsigned int poly);
int16_t reverseBits(int32_t ,int32_t);
......
......@@ -37,12 +37,17 @@
\param p_lut Pointer to decoder LUTs
\param Z Lifting size
*/
static inline void nrLDPC_bnProcPc(t_nrLDPC_lut* p_lut, uint16_t Z)
static inline void nrLDPC_bnProcPc(t_nrLDPC_lut* p_lut, t_nrLDPC_procBuf* p_procBuf, uint16_t Z)
{
const uint8_t* lut_numBnInBnGroups = p_lut->numBnInBnGroups;
const uint32_t* lut_startAddrBnGroups = p_lut->startAddrBnGroups;
const uint16_t* lut_startAddrBnGroupsLlr = p_lut->startAddrBnGroupsLlr;
int8_t* bnProcBuf = p_procBuf->bnProcBuf;
int8_t* bnProcBufRes = p_procBuf->bnProcBufRes;
int8_t* llrRes = p_procBuf->llrRes;
int8_t* llrProcBuf = p_procBuf->llrProcBuf;
__m128i* p_bnProcBuf;
__m256i* p_bnProcBufRes;
__m128i* p_llrProcBuf;
......@@ -1676,7 +1681,7 @@ static inline void nrLDPC_bnProcPc(t_nrLDPC_lut* p_lut, uint16_t Z)
\param p_lut Pointer to decoder LUTs
\param Z Lifting size
*/
static inline void nrLDPC_bnProc(t_nrLDPC_lut* p_lut, uint16_t Z)
static inline void nrLDPC_bnProc(t_nrLDPC_lut* p_lut, t_nrLDPC_procBuf* p_procBuf, uint16_t Z)
{
// BN Processing calculating the values to send back to the CNs for next iteration
// bnProcBufRes contains the sum of all edges to each BN at the start of each group
......@@ -1685,6 +1690,10 @@ static inline void nrLDPC_bnProc(t_nrLDPC_lut* p_lut, uint16_t Z)
const uint32_t* lut_startAddrBnGroups = p_lut->startAddrBnGroups;
const uint16_t* lut_startAddrBnGroupsLlr = p_lut->startAddrBnGroupsLlr;
int8_t* bnProcBuf = p_procBuf->bnProcBuf;
int8_t* bnProcBufRes = p_procBuf->bnProcBufRes;
int8_t* llrRes = p_procBuf->llrRes;
__m256i* p_bnProcBuf;
__m256i* p_bnProcBufRes;
__m256i* p_llrRes;
......
......@@ -36,11 +36,14 @@
\param p_lut Pointer to decoder LUTs
\param Z Lifting size
*/
static inline void nrLDPC_cnProc_BG2(t_nrLDPC_lut* p_lut, uint16_t Z)
static inline void nrLDPC_cnProc_BG2(t_nrLDPC_lut* p_lut, t_nrLDPC_procBuf* p_procBuf, uint16_t Z)
{
const uint8_t* lut_numCnInCnGroups = p_lut->numCnInCnGroups;
const uint32_t* lut_startAddrCnGroups = p_lut->startAddrCnGroups;
int8_t* cnProcBuf = p_procBuf->cnProcBuf;
int8_t* cnProcBufRes = p_procBuf->cnProcBufRes;
__m256i* p_cnProcBuf;
__m256i* p_cnProcBufRes;
......@@ -362,11 +365,14 @@ static inline void nrLDPC_cnProc_BG2(t_nrLDPC_lut* p_lut, uint16_t Z)
\param p_lut Pointer to decoder LUTs
\param Z Lifting size
*/
static inline void nrLDPC_cnProc_BG1(t_nrLDPC_lut* p_lut, uint16_t Z)
static inline void nrLDPC_cnProc_BG1(t_nrLDPC_lut* p_lut, t_nrLDPC_procBuf* p_procBuf, uint16_t Z)
{
const uint8_t* lut_numCnInCnGroups = p_lut->numCnInCnGroups;
const uint32_t* lut_startAddrCnGroups = p_lut->startAddrCnGroups;
int8_t* cnProcBuf = p_procBuf->cnProcBuf;
int8_t* cnProcBufRes = p_procBuf->cnProcBufRes;
__m256i* p_cnProcBuf;
__m256i* p_cnProcBufRes;
......@@ -858,11 +864,14 @@ static inline void nrLDPC_cnProc_BG1(t_nrLDPC_lut* p_lut, uint16_t Z)
\param Z Lifting size
\return 32-bit parity check indicator
*/
static inline uint32_t nrLDPC_cnProcPc_BG1(t_nrLDPC_lut* p_lut, uint16_t Z)
static inline uint32_t nrLDPC_cnProcPc_BG1(t_nrLDPC_lut* p_lut, t_nrLDPC_procBuf* p_procBuf, uint16_t Z)
{
const uint8_t* lut_numCnInCnGroups = p_lut->numCnInCnGroups;
const uint32_t* lut_startAddrCnGroups = p_lut->startAddrCnGroups;
int8_t* cnProcBuf = p_procBuf->cnProcBuf;
int8_t* cnProcBufRes = p_procBuf->cnProcBufRes;
__m256i* p_cnProcBuf;
__m256i* p_cnProcBufRes;
......@@ -1490,11 +1499,14 @@ static inline uint32_t nrLDPC_cnProcPc_BG1(t_nrLDPC_lut* p_lut, uint16_t Z)
\param Z Lifting size
\return 32-bit parity check indicator
*/
static inline uint32_t nrLDPC_cnProcPc_BG2(t_nrLDPC_lut* p_lut, uint16_t Z)
static inline uint32_t nrLDPC_cnProcPc_BG2(t_nrLDPC_lut* p_lut, t_nrLDPC_procBuf* p_procBuf, uint16_t Z)
{
const uint8_t* lut_numCnInCnGroups = p_lut->numCnInCnGroups;
const uint32_t* lut_startAddrCnGroups = p_lut->startAddrCnGroups;
int8_t* cnProcBuf = p_procBuf->cnProcBuf;
int8_t* cnProcBufRes = p_procBuf->cnProcBufRes;
__m256i* p_cnProcBuf;
__m256i* p_cnProcBufRes;
......
......@@ -32,6 +32,7 @@
#define __NR_LDPC_DECODER__H__
#include "nrLDPC_types.h"
#include "nrLDPC_init_mem.h"
/**
\brief LDPC decoder
......@@ -40,6 +41,6 @@
\param p_llrOut Output vector
\param p_profiler LDPC profiler statistics
*/
int32_t nrLDPC_decoder(t_nrLDPC_dec_params* p_decParams, int8_t* p_llr, int8_t* p_llrOut, t_nrLDPC_time_stats* p_profiler);
int32_t nrLDPC_decoder(t_nrLDPC_dec_params* p_decParams, int8_t* p_llr, int8_t* p_llrOut, t_nrLDPC_procBuf* p_procBuf, t_nrLDPC_time_stats* p_profiler);
#endif
......@@ -100,23 +100,7 @@
#define NR_LDPC_MAX_NUM_LLR 26112
// ==============================================================================
// GLOBAL VARIABLES
// Aligned on 32 bytes = 256 bits for AVX2
/** CN processing buffer */
static int8_t cnProcBuf [NR_LDPC_SIZE_CN_PROC_BUF] __attribute__ ((aligned(32)));
/** Buffer for CN processing results */
static int8_t cnProcBufRes[NR_LDPC_SIZE_CN_PROC_BUF] __attribute__ ((aligned(32)));
/** BN processing buffer */
static int8_t bnProcBuf [NR_LDPC_SIZE_BN_PROC_BUF] __attribute__ ((aligned(32)));
/** Buffer for BN processing results */
static int8_t bnProcBufRes[NR_LDPC_SIZE_BN_PROC_BUF] __attribute__ ((aligned(32)));
/** Buffer for LLR results */
static int8_t llrRes [NR_LDPC_MAX_NUM_LLR] __attribute__ ((aligned(32)));
/** LLR processing buffer */
static int8_t llrProcBuf[NR_LDPC_MAX_NUM_LLR] __attribute__ ((aligned(32)));
// GLOBAL CONSTANT VARIABLES
/** Start addresses for the cnProcBuf for each CN group in BG1*/
static const uint32_t lut_startAddrCnGroups_BG1[NR_LDPC_NUM_CN_GROUPS_BG1] = {0, 1152, 8832, 43392, 61824, 75264, 81408, 88320, 92160};
......
/*
* Licensed to the OpenAirInterface (OAI) Software Alliance under one or more
* contributor license agreements. See the NOTICE file distributed with
* this work for additional information regarding copyright ownership.
* The OpenAirInterface Software Alliance licenses this file to You under
* the OAI Public License, Version 1.1 (the "License"); you may not use this file
* except in compliance with the License.
* You may obtain a copy of the License at
*
* http://www.openairinterface.org/?page_id=698
*
* Unless required by applicable law or agreed to in writing, software
* distributed under the License is distributed on an "AS IS" BASIS,
* WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
* See the License for the specific language governing permissions and
* limitations under the License.
*-------------------------------------------------------------------------------
* For more information about the OpenAirInterface (OAI) Software Alliance:
* contact@openairinterface.org
*/
/*!\file nrLDPC_init_mem.h
* \brief Defines the function to initialize the LDPC decoder and sets correct LUTs.
* \author Sebastian Wagner (TCL Communications) Email: <mailto:sebastian.wagner@tcl.com>
* \date 07-12-2018
* \version 1.0
* \note
* \warning
*/
#ifndef __NR_LDPC_INIT_MEM__H__
#define __NR_LDPC_INIT_MEM__H__
#include <stdlib.h>
#include "nrLDPC_defs.h"
#include "nrLDPC_types.h"
#ifndef malloc32_clear
/**
\brief Allocates 32 byte aligned memory and initializes to zero
\param size Input size in bytes
\return Pointer to memory
*/
static inline void* malloc32_clear(size_t size)
{
void* ptr = (void*) memalign(32, size+32);
memset(ptr, 0, size);
return ptr;
}
#endif
/**
\brief Allocates and initializes the internal decoder processing buffers
\param p_decParams Pointer to decoder parameters
\param p_lut Pointer to decoder LUTs
\return Number of LLR values
*/
static inline t_nrLDPC_procBuf* nrLDPC_init_mem(void)
{
t_nrLDPC_procBuf* p_procBuf = (t_nrLDPC_procBuf*) malloc32_clear(sizeof(t_nrLDPC_procBuf));
if (p_procBuf)
{
p_procBuf->cnProcBuf = (int8_t*) malloc32_clear(NR_LDPC_SIZE_CN_PROC_BUF*sizeof(int8_t));
p_procBuf->cnProcBufRes = (int8_t*) malloc32_clear(NR_LDPC_SIZE_CN_PROC_BUF*sizeof(int8_t));
p_procBuf->bnProcBuf = (int8_t*) malloc32_clear(NR_LDPC_SIZE_BN_PROC_BUF*sizeof(int8_t));
p_procBuf->bnProcBufRes = (int8_t*) malloc32_clear(NR_LDPC_SIZE_BN_PROC_BUF*sizeof(int8_t));
p_procBuf->llrRes = (int8_t*) malloc32_clear(NR_LDPC_MAX_NUM_LLR *sizeof(int8_t));
p_procBuf->llrProcBuf = (int8_t*) malloc32_clear(NR_LDPC_MAX_NUM_LLR *sizeof(int8_t));
}
return(p_procBuf);
}
static inline void nrLDPC_free_mem(t_nrLDPC_procBuf* p_procBuf)
{
free(p_procBuf->cnProcBuf);
free(p_procBuf->cnProcBufRes);
free(p_procBuf->bnProcBuf);
free(p_procBuf->bnProcBufRes);
free(p_procBuf->llrRes);
free(p_procBuf->llrProcBuf);
free(p_procBuf);
}
#endif
......@@ -41,13 +41,15 @@
\param Z Lifting size
\param BG Base graph
*/
static inline void nrLDPC_llr2llrProcBuf(t_nrLDPC_lut* p_lut, int8_t* llr, uint16_t Z, uint8_t BG)
static inline void nrLDPC_llr2llrProcBuf(t_nrLDPC_lut* p_lut, int8_t* llr, t_nrLDPC_procBuf* p_procBuf, uint16_t Z, uint8_t BG)
{
const uint16_t* lut_llr2llrProcBuf = p_lut->llr2llrProcBuf;
uint32_t i;
const uint8_t numBn2CnG1 = p_lut->numBnInBnGroups[0];
uint32_t colG1 = NR_LDPC_START_COL_PARITY_BG1*Z;
int8_t* llrProcBuf = p_procBuf->llrProcBuf;
if (BG == 2)
{
colG1 = NR_LDPC_START_COL_PARITY_BG2*Z;
......@@ -74,11 +76,13 @@ static inline void nrLDPC_llr2llrProcBuf(t_nrLDPC_lut* p_lut, int8_t* llr, uint1
\param Z Lifting size
\param BG Base graph
*/
static inline void nrLDPC_llr2CnProcBuf(t_nrLDPC_lut* p_lut, int8_t* llr, uint16_t numLLR, uint16_t Z, uint8_t BG)
static inline void nrLDPC_llr2CnProcBuf(t_nrLDPC_lut* p_lut, int8_t* llr, t_nrLDPC_procBuf* p_procBuf, uint16_t numLLR, uint16_t Z, uint8_t BG)
{
const uint32_t* lut_llr2CnProcBuf = p_lut->llr2CnProcBuf;
const uint8_t* lut_numEdgesPerBn = p_lut->numEdgesPerBn;
int8_t* cnProcBuf = p_procBuf->cnProcBuf;
int8_t curLLR;
uint8_t numEdges;
uint32_t i;
......@@ -123,12 +127,15 @@ static inline void nrLDPC_llr2CnProcBuf(t_nrLDPC_lut* p_lut, int8_t* llr, uint16
\param p_lut Pointer to decoder LUTs
\param Z Lifting size
*/
static inline void nrLDPC_cn2bnProcBuf(t_nrLDPC_lut* p_lut, uint16_t Z)
static inline void nrLDPC_cn2bnProcBuf(t_nrLDPC_lut* p_lut, t_nrLDPC_procBuf* p_procBuf, uint16_t Z)
{
const uint32_t* lut_cn2bnProcBuf = p_lut->cn2bnProcBuf;
const uint8_t* lut_numCnInCnGroups = p_lut->numCnInCnGroups;
const uint32_t* lut_startAddrCnGroups = p_lut->startAddrCnGroups;
int8_t* cnProcBufRes = p_procBuf->cnProcBufRes;
int8_t* bnProcBuf = p_procBuf->bnProcBuf;
const uint32_t* p_lut_cn2bn;
int8_t* p_cnProcBufRes;
uint32_t bitOffsetInGroup;
......@@ -245,12 +252,15 @@ static inline void nrLDPC_cn2bnProcBuf(t_nrLDPC_lut* p_lut, uint16_t Z)
\param p_lut Pointer to decoder LUTs
\param Z Lifting size
*/
static inline void nrLDPC_cn2bnProcBuf_BG1(t_nrLDPC_lut* p_lut, uint16_t Z)
static inline void nrLDPC_cn2bnProcBuf_BG1(t_nrLDPC_lut* p_lut, t_nrLDPC_procBuf* p_procBuf, uint16_t Z)
{
const uint32_t* lut_cn2bnProcBuf = p_lut->cn2bnProcBuf;
const uint8_t* lut_numCnInCnGroups = p_lut->numCnInCnGroups;
const uint32_t* lut_startAddrCnGroups = p_lut->startAddrCnGroups;
int8_t* cnProcBufRes = p_procBuf->cnProcBufRes;
int8_t* bnProcBuf = p_procBuf->bnProcBuf;
const uint32_t* p_lut_cn2bn;
int8_t* p_cnProcBufRes;
uint32_t bitOffsetInGroup;
......@@ -418,12 +428,15 @@ static inline void nrLDPC_cn2bnProcBuf_BG1(t_nrLDPC_lut* p_lut, uint16_t Z)
\param p_lut Pointer to decoder LUTs
\param Z Lifting size
*/
static inline void nrLDPC_bn2cnProcBuf(t_nrLDPC_lut* p_lut, uint16_t Z)
static inline void nrLDPC_bn2cnProcBuf(t_nrLDPC_lut* p_lut, t_nrLDPC_procBuf* p_procBuf, uint16_t Z)
{
const uint32_t* lut_cn2bnProcBuf = p_lut->cn2bnProcBuf;
const uint8_t* lut_numCnInCnGroups = p_lut->numCnInCnGroups;
const uint32_t* lut_startAddrCnGroups = p_lut->startAddrCnGroups;
int8_t* cnProcBuf = p_procBuf->cnProcBuf;
int8_t* bnProcBufRes = p_procBuf->bnProcBufRes;
int8_t* p_cnProcBuf;
const uint32_t* p_lut_cn2bn;
uint32_t bitOffsetInGroup;
......@@ -543,12 +556,15 @@ static inline void nrLDPC_bn2cnProcBuf(t_nrLDPC_lut* p_lut, uint16_t Z)
\param p_lut Pointer to decoder LUTs
\param Z Lifting size
*/
static inline void nrLDPC_bn2cnProcBuf_BG1(t_nrLDPC_lut* p_lut, uint16_t Z)
static inline void nrLDPC_bn2cnProcBuf_BG1(t_nrLDPC_lut* p_lut, t_nrLDPC_procBuf* p_procBuf, uint16_t Z)
{
const uint32_t* lut_cn2bnProcBuf = p_lut->cn2bnProcBuf;
const uint8_t* lut_numCnInCnGroups = p_lut->numCnInCnGroups;
const uint32_t* lut_startAddrCnGroups = p_lut->startAddrCnGroups;
int8_t* cnProcBuf = p_procBuf->cnProcBuf;
int8_t* bnProcBufRes = p_procBuf->bnProcBufRes;
int8_t* p_cnProcBuf;
const uint32_t* p_lut_cn2bn;
uint32_t bitOffsetInGroup;
......@@ -720,11 +736,13 @@ static inline void nrLDPC_bn2cnProcBuf_BG1(t_nrLDPC_lut* p_lut, uint16_t Z)
\param llrOut Pointer to output LLRs
\param numLLR Number of LLR values
*/
static inline void nrLDPC_llrRes2llrOut(t_nrLDPC_lut* p_lut, int8_t* llrOut, uint16_t numLLR)
static inline void nrLDPC_llrRes2llrOut(t_nrLDPC_lut* p_lut, int8_t* llrOut, t_nrLDPC_procBuf* p_procBuf, uint16_t numLLR)
{
const uint16_t* lut_llr2llrProcBuf = p_lut->llr2llrProcBuf;
uint32_t i;
int8_t* llrRes = p_procBuf->llrRes;
for (i=0; i<numLLR; i++)
{
llrOut[i] = llrRes[lut_llr2llrProcBuf[i]];
......
......@@ -87,38 +87,38 @@ static inline void nrLDPC_initFile(const char* fileName)
\brief Writes data of predefined buffers to file
\param buffer Enum of buffer name to write
*/
static inline void nrLDPC_debug_writeBuffer2File(e_nrLDPC_buffers buffer)
static inline void nrLDPC_debug_writeBuffer2File(e_nrLDPC_buffers buffer, t_nrLDPC_procBuf* p_procBuf)
{
switch (buffer)
{
case nrLDPC_buffers_LLR_PROC:
{
nrLDPC_writeFile("llrProcBuf.txt", llrProcBuf, NR_LDPC_MAX_NUM_LLR);
nrLDPC_writeFile("llrProcBuf.txt", p_procBuf->llrProcBuf, NR_LDPC_MAX_NUM_LLR);
break;
}
case nrLDPC_buffers_CN_PROC:
{
nrLDPC_writeFile("cnProcBuf.txt", cnProcBuf, NR_LDPC_SIZE_CN_PROC_BUF);
nrLDPC_writeFile("cnProcBuf.txt", p_procBuf->cnProcBuf, NR_LDPC_SIZE_CN_PROC_BUF);
break;
}
case nrLDPC_buffers_CN_PROC_RES:
{
nrLDPC_writeFile("cnProcBufRes.txt", cnProcBufRes, NR_LDPC_SIZE_CN_PROC_BUF);
nrLDPC_writeFile("cnProcBufRes.txt", p_procBuf->cnProcBufRes, NR_LDPC_SIZE_CN_PROC_BUF);
break;
}
case nrLDPC_buffers_BN_PROC:
{
nrLDPC_writeFile("bnProcBuf.txt", bnProcBuf, NR_LDPC_SIZE_BN_PROC_BUF);
nrLDPC_writeFile("bnProcBuf.txt", p_procBuf->bnProcBuf, NR_LDPC_SIZE_BN_PROC_BUF);
break;
}
case nrLDPC_buffers_BN_PROC_RES:
{
nrLDPC_writeFile("bnProcBufRes.txt", bnProcBufRes, NR_LDPC_SIZE_BN_PROC_BUF);
nrLDPC_writeFile("bnProcBufRes.txt", p_procBuf->bnProcBufRes, NR_LDPC_SIZE_BN_PROC_BUF);
break;
}
case nrLDPC_buffers_LLR_RES:
{
nrLDPC_writeFile("llrRes.txt", llrRes, NR_LDPC_MAX_NUM_LLR);
nrLDPC_writeFile("llrRes.txt", p_procBuf->llrRes, NR_LDPC_MAX_NUM_LLR);
break;
}
}
......
......@@ -88,4 +88,16 @@ typedef struct nrLDPC_time_stats {
time_stats_t total; /**< Statistics for total processing time */
} t_nrLDPC_time_stats;
/**
Structure containing the processing buffers
*/
typedef struct nrLDPC_procBuf {
int8_t* cnProcBuf; /**< CN processing buffer */
int8_t* cnProcBufRes; /**< Buffer for CN processing results */
int8_t* bnProcBuf; /**< BN processing buffer */
int8_t* bnProcBufRes; /**< Buffer for BN processing results */
int8_t* llrRes; /**< Buffer for LLR results */
int8_t* llrProcBuf; /**< LLR processing buffer */
} t_nrLDPC_procBuf;
#endif
......@@ -201,7 +201,7 @@ void encode_parity_check_part_optim(uint8_t *c,uint8_t *d, short BG,short Zc,sho
int ldpc_encoder_optim(unsigned char *test_input,unsigned char *channel_input,short block_length,short BG,time_stats_t *tinput,time_stats_t *tprep,time_stats_t *tparity,time_stats_t *toutput)
{
short Zc,Kb,nrows,ncols;
short Zc,Kb=0,nrows=0,ncols=0;
int i,i1;
int no_punctured_columns,removed_bit;
......@@ -320,7 +320,7 @@ int ldpc_encoder_optim(unsigned char *test_input,unsigned char *channel_input,sh
int ldpc_encoder_optim_8seg(unsigned char **test_input,unsigned char **channel_input,short block_length,short BG,int n_segments,time_stats_t *tinput,time_stats_t *tprep,time_stats_t *tparity,time_stats_t *toutput)
{
short Zc,Kb,nrows,ncols;
short Zc,Kb=0,nrows=0,ncols=0;
int i,i1,j;
int no_punctured_columns,removed_bit;
//Table of possible lifting sizes
......@@ -520,7 +520,7 @@ int ldpc_encoder_optim_8seg(unsigned char **test_input,unsigned char **channel_i
int ldpc_encoder_optim_8seg_multi(unsigned char **test_input,unsigned char **channel_input,short block_length, short BG, int n_segments,unsigned int macro_num, time_stats_t *tinput,time_stats_t *tprep,time_stats_t *tparity,time_stats_t *toutput)
{
short Zc,Kb,nrows,ncols;
short Zc,Kb=0,nrows=0,ncols=0;
int i,i1,j;
int no_punctured_columns,removed_bit;
//Table of possible lifting sizes
......
......@@ -444,6 +444,9 @@ int ldpc_encoder_orig(unsigned char *test_input,unsigned char *channel_input,sho
no_shift_values=(short *) no_shift_values_BG2;
pointer_shift_values=(short *) pointer_shift_values_BG2;
}
else {
AssertFatal(0,"BG %d is not supported yet\n",BG);
}
no_punctured_columns=(int)((nrows-2)*Zc+block_length-block_length*3)/Zc;
removed_bit=(nrows-no_punctured_columns-2) * Zc+block_length-(block_length*3);
......
......@@ -1119,7 +1119,7 @@ uint32_t polar_decoder_int16(int16_t *input,
int len=polarParams->payloadBits;
int len_mod64=len&63;
//int len_mod64=len&63;
int crclen = polarParams->crcParityBits;
uint64_t rxcrc=B[0]&((1<<crclen)-1);
uint32_t crc;
......
......@@ -402,7 +402,7 @@ void polar_encoder_fast(uint64_t *A,
AssertFatal(bitlen<129,"support for payloads <= 128 bits\n");
AssertFatal(polarParams->crcParityBits == 24,"support for 24-bit crc only for now\n");
int bitlen0=bitlen;
//int bitlen0=bitlen;
uint64_t tcrc=0;
......
......@@ -78,7 +78,7 @@ uint32_t nr_rate_matching_ldpc(uint8_t Ilbrm,
{
uint8_t Cprime;
uint32_t Ncb,E,ind,k,Nref,N;
uint8_t *e2;
//uint8_t *e2;
AssertFatal(Nl>0,"Nl is 0\n");
AssertFatal(Qm>0,"Qm is 0\n");
......@@ -110,7 +110,7 @@ uint32_t nr_rate_matching_ldpc(uint8_t Ilbrm,
printf("nr_rate_matching: E %d, k0 %d Cprime %d modcprime %d\n",E,ind, Cprime,((G/(Nl*Qm))%Cprime));
#endif
e2 = e;
//e2 = e;
k=0;
......@@ -120,7 +120,8 @@ uint32_t nr_rate_matching_ldpc(uint8_t Ilbrm,
printf("RM_TX k%d Ind: %d (%d)\n",k,ind,w[ind]);
#endif
if (w[ind] != NR_NULL) e2[k++]=w[ind];
//if (w[ind] != NR_NULL) e2[k++]=w[ind];
if (w[ind] != NR_NULL) e[k++]=w[ind];
}
while(k<E) {
......@@ -130,7 +131,8 @@ uint32_t nr_rate_matching_ldpc(uint8_t Ilbrm,
printf("RM_TX k%d Ind: %d (%d)\n",k,ind,w[ind]);
#endif
if (w[ind] != NR_NULL) e2[k++]=w[ind];
//if (w[ind] != NR_NULL) e2[k++]=w[ind];
if (w[ind] != NR_NULL) e[k++]=w[ind];
}
}
......
......@@ -314,8 +314,8 @@ void phy_config_request(PHY_Config_t *phy_config) {
void phy_free_nr_gNB(PHY_VARS_gNB *gNB)
{
// NR_DL_FRAME_PARMS* const fp = &gNB->frame_parms;
nfapi_nr_config_request_t *cfg = &gNB->gNB_config;
//NR_DL_FRAME_PARMS* const fp = &gNB->frame_parms;
//nfapi_nr_config_request_t *cfg = &gNB->gNB_config;
NR_gNB_COMMON* const common_vars = &gNB->common_vars;
LTE_eNB_PUSCH** const pusch_vars = gNB->pusch_vars;
LTE_eNB_SRS* const srs_vars = gNB->srs_vars;
......@@ -387,7 +387,7 @@ void install_schedule_handlers(IF_Module_t *if_inst)
/// this function is a temporary addition for NR configuration
void nr_phy_config_request_sim(PHY_VARS_gNB *gNB,int N_RB_DL,int N_RB_UL,int mu)
void nr_phy_config_request_sim(PHY_VARS_gNB *gNB,int N_RB_DL,int N_RB_UL,int mu,int Nid_cell)
{
NR_DL_FRAME_PARMS *fp = &gNB->frame_parms;
nfapi_nr_config_request_t *gNB_config = &gNB->gNB_config;
......@@ -403,6 +403,7 @@ void nr_phy_config_request_sim(PHY_VARS_gNB *gNB,int N_RB_DL,int N_RB_UL,int mu)
gNB_config->sch_config.ssb_subcarrier_offset.value = 0;
gNB_config->sch_config.n_ssb_crb.value = (N_RB_DL-20);
gNB_config->sch_config.ssb_subcarrier_offset.value = 0;
gNB_config->sch_config.physical_cell_id.value=Nid_cell;
gNB->mac_enabled = 1;
......
......@@ -656,6 +656,7 @@ int init_nr_ue_signal(PHY_VARS_NR_UE *ue,
int eNB_id;
int th_id;
int n_ssb_crb=(fp->N_RB_DL-20);
int k_ssb=0;
abstraction_flag = 0;
fp->nb_antennas_tx = 1;
fp->nb_antennas_rx=1;
......@@ -664,7 +665,7 @@ int init_nr_ue_signal(PHY_VARS_NR_UE *ue,
printf("Initializing UE vars (abstraction %"PRIu8") for eNB TXant %"PRIu8", UE RXant %"PRIu8"\n",abstraction_flag,fp->nb_antennas_tx,fp->nb_antennas_rx);
//LOG_D(PHY,"[MSC_NEW][FRAME 00000][PHY_UE][MOD %02u][]\n", ue->Mod_id+NB_eNB_INST);
nr_init_frame_parms_ue(fp,NR_MU_1,NORMAL,fp->N_RB_DL,n_ssb_crb,0);
nr_init_frame_parms_ue(fp,NR_MU_1,NORMAL,fp->N_RB_DL,n_ssb_crb,k_ssb);
phy_init_nr_top(ue);
// many memory allocation sizes are hard coded
......@@ -942,9 +943,7 @@ void init_nr_ue_transport(PHY_VARS_NR_UE *ue,int abstraction_flag) {
void phy_init_nr_top(PHY_VARS_NR_UE *ue)
{
NR_DL_FRAME_PARMS *frame_parms = &ue->frame_parms;
NR_UE_DLSCH_t *dlsch0 = ue->dlsch[0][0][0];
dlsch0 =(NR_UE_DLSCH_t *)malloc16(sizeof(NR_UE_DLSCH_t));
crcTableInit();
init_dfts();
......
......@@ -195,10 +195,9 @@ int nr_init_frame_parms_ue(NR_DL_FRAME_PARMS *fp,
int n_ssb_crb,
int ssb_subcarrier_offset)
{
/*n_ssb_crb and ssb_subcarrier_offset are given in 15kHz SCS*/
nr_init_frame_parms0(fp,mu,Ncp,N_RB_DL);
int start_rb = n_ssb_crb / (1<<mu);
fp->ssb_start_subcarrier = 12 * start_rb + ssb_subcarrier_offset;
fp->ssb_start_subcarrier = (12 * n_ssb_crb + ssb_subcarrier_offset)/(1<<mu);
return 0;
}
......
......@@ -379,10 +379,11 @@ void dump_frame_parms(LTE_DL_FRAME_PARMS *frame_parms);
int nr_init_frame_parms(nfapi_nr_config_request_t* config, NR_DL_FRAME_PARMS *frame_parms);
int nr_init_frame_parms_ue(NR_DL_FRAME_PARMS *frame_parms,int mu,int Ncp,int N_RB_DL,int n_ssb_crb,int ssb_subcarrier_offset);
int init_nr_ue_signal(PHY_VARS_NR_UE *ue,int nb_connected_eNB,uint8_t abstraction_flag);
void init_nr_ue_transport(PHY_VARS_NR_UE *ue,int abstraction_flag);
void nr_dump_frame_parms(NR_DL_FRAME_PARMS *frame_parms);
int phy_init_nr_gNB(PHY_VARS_gNB *gNB, unsigned char is_secondary_gNB, unsigned char abstraction_flag);
void nr_phy_config_request(NR_PHY_Config_t *gNB);
void nr_phy_config_request_sim(PHY_VARS_gNB *gNB,int N_RB_DL,int N_RB_UL,int mu);
void nr_phy_config_request_sim(PHY_VARS_gNB *gNB,int N_RB_DL,int N_RB_UL,int mu,int Nid_cell);
void phy_free_nr_gNB(PHY_VARS_gNB *gNB);
int l1_north_init_gNB(void);
void init_nr_transport(PHY_VARS_gNB *gNB);
......
......@@ -90,6 +90,10 @@ uint8_t nr_generate_pdsch(NR_gNB_DLSCH_t dlsch,
@param nb_rb, nb_symb_sch, nb_re_dmrs, length_dmrs */
uint32_t nr_get_G(uint16_t nb_rb, uint16_t nb_symb_sch,uint8_t nb_re_dmrs,uint16_t length_dmrs,uint8_t Qm, uint8_t Nl);
void free_gNB_dlsch(NR_gNB_DLSCH_t *dlsch);
void clean_gNB_dlsch(NR_gNB_DLSCH_t *dlsch);
int nr_dlsch_encoding(unsigned char *a,
uint8_t subframe,
NR_gNB_DLSCH_t *dlsch,
......
......@@ -379,7 +379,8 @@ int nr_dlsch_encoding(unsigned char *a,
}
printf("\n");*/
ldpc_encoder_optim_8seg(dlsch->harq_processes[harq_pid]->c,d_tmp,Kr,BG,dlsch->harq_processes[harq_pid]->C,NULL,NULL,NULL,NULL);
//ldpc_encoder_optim_8seg(dlsch->harq_processes[harq_pid]->c,d_tmp,Kr,BG,dlsch->harq_processes[harq_pid]->C,NULL,NULL,NULL,NULL);
ldpc_encoder_optim_8seg(dlsch->harq_processes[harq_pid]->c,dlsch->harq_processes[harq_pid]->d,Kr,BG,dlsch->harq_processes[harq_pid]->C,NULL,NULL,NULL,NULL);
//stop_meas(te_stats);
//printf("end ldpc encoder -- output\n");
......
......@@ -53,7 +53,7 @@ int nr_generate_pbch_dmrs(uint32_t *gold_pbch_dmrs,
NR_DL_FRAME_PARMS *frame_parms)
{
int k,l;
int16_t a;
//int16_t a;
int16_t mod_dmrs[NR_PBCH_DMRS_LENGTH<<1];
uint8_t idx=0;
uint8_t nushift = config->sch_config.physical_cell_id.value &3;
......@@ -240,7 +240,7 @@ int nr_generate_pbch(NR_gNB_PBCH *pbch,
{
int k,l,m;
int16_t a;
//int16_t a;
int16_t mod_pbch_e[NR_POLAR_PBCH_E];
uint8_t idx=0;
uint16_t M;
......
......@@ -33,7 +33,7 @@ int nr_generate_sss( int16_t *d_sss,
int i,k,l;
int m0, m1;
int Nid, Nid1, Nid2;
int16_t a;
//int16_t a;
int16_t x0[NR_SSS_LENGTH], x1[NR_SSS_LENGTH];
const int x0_initial[7] = { 1, 0, 0, 0, 0, 0, 0 };
const int x1_initial[7] = { 1, 0, 0, 0, 0, 0, 0 };
......
/*
* Licensed to the OpenAirInterface (OAI) Software Alliance under one or more
* contributor license agreements. See the NOTICE file distributed with
......@@ -33,7 +34,7 @@
#ifndef __NR_TRANSPORT_COMMON_PROTO__H__
#define __NR_TRANSPORT_COMMON_PROTO__H__
#define MAX_NUM_NR_DLSCH_SEGMENTS 32
#define MAX_NUM_NR_DLSCH_SEGMENTS 16
#define MAX_NUM_NR_ULSCH_SEGMENTS MAX_NUM_NR_DLSCH_SEGMENTS
#define MAX_NR_DLSCH_PAYLOAD_BYTES (MAX_NUM_NR_DLSCH_SEGMENTS*1056)
......
......@@ -1131,7 +1131,7 @@ void nr_dci_decoding_procedure0(int s,
//Table 10.1-2: Maximum number of PDCCH candidates per slot and per serving cell as a function of the subcarrier spacing value 2^mu*15 KHz, mu {0,1,2,3}
uint8_t m_max_slot_pdcch_Table10_1_2 [4] = {44,36,22,20};
//Table 10.1-3: Maximum number of non-overlapped CCEs per slot and per serving cell as a function of the subcarrier spacing value 2^mu*15 KHz, mu {0,1,2,3}
uint8_t cce_max_slot_pdcch_Table10_1_3 [4] = {56,56,48,32};
//uint8_t cce_max_slot_pdcch_Table10_1_3 [4] = {56,56,48,32};
int coreset_nbr_cce_per_symbol=0;
......@@ -1264,9 +1264,10 @@ void nr_dci_decoding_procedure0(int s,
for (m = 0; m < nb_candidates; m++) {
int n_ci = 0;
if (nCCE[p] < L2) return;
#ifdef NR_PDCCH_DCI_DEBUG
int debug1 = nCCE[p] / L2;
int debug2 = L2*m_p_s_L_max;
#ifdef NR_PDCCH_DCI_DEBUG
printf("\t\t<-NR_PDCCH_DCI_DEBUG (nr_dci_decoding_procedure0)-> debug1(%d)=nCCE[p]/L2 | nCCE[%d](%d) | L2(%d)\n",debug1,p,nCCE[p],L2);
printf("\t\t<-NR_PDCCH_DCI_DEBUG (nr_dci_decoding_procedure0)-> debug2(%d)=L2*m_p_s_L_max | L2(%d) | m_p_s_L_max(%d)\n",debug2,L2,m_p_s_L_max);
#endif
......
......@@ -131,10 +131,10 @@ int nr_rx_pdsch(PHY_VARS_NR_UE *ue,
unsigned short nb_rb_pdsch = 50;
int16_t *pllr_symbol_cw0;
int16_t *pllr_symbol_cw1;
int16_t *pllr_symbol_cw0_deint;
int16_t *pllr_symbol_cw1_deint;
//int16_t *pllr_symbol_cw0_deint;
//int16_t *pllr_symbol_cw1_deint;
uint32_t llr_offset_symbol;
uint16_t bundle_L = 2;
//uint16_t bundle_L = 2;
uint8_t l0 =2;
switch (type) {
......@@ -2001,7 +2001,7 @@ unsigned short nr_dlsch_extract_rbs_single(int **rxdataF,
unsigned short k,rb;
unsigned char i,aarx,l; //,nsymb,sss_symb,pss_symb=0;
unsigned char i,aarx; //,nsymb,sss_symb,pss_symb=0,l;
int *dl_ch0,*dl_ch0_ext,*rxF,*rxF_ext;
......@@ -2010,7 +2010,7 @@ unsigned short nr_dlsch_extract_rbs_single(int **rxdataF,
//symbol_mod = (symbol>=(7-frame_parms->Ncp)) ? symbol-(7-frame_parms->Ncp) : symbol;
pilots = (symbol==2) ? 1 : 0; //to updated from config
l=symbol;
//l=symbol;
//nsymb = (frame_parms->Ncp==NORMAL) ? 14:12;
k = frame_parms->first_carrier_offset + 516; //0
......
......@@ -140,7 +140,7 @@ char prefix_string[2][9] = {"NORMAL","EXTENDED"};
int nr_initial_sync(PHY_VARS_NR_UE *ue, runmode_t mode)
{
int32_t sync_pos, sync_pos2, sync_pos_slot; // k_ssb, N_ssb_crb,
int32_t sync_pos, sync_pos_slot; // k_ssb, N_ssb_crb, sync_pos2,
int32_t metric_tdd_ncp=0;
uint8_t phase_tdd_ncp;
......
......@@ -51,8 +51,8 @@ uint16_t nr_pbch_extract(int **rxdataF,
int **rxdataF_ext,
int **dl_ch_estimates_ext,
uint32_t symbol,
uint32_t s_offset,
uint32_t high_speed_flag,
int is_synchronized,
NR_DL_FRAME_PARMS *frame_parms)
{
......@@ -65,18 +65,15 @@ uint16_t nr_pbch_extract(int **rxdataF,
unsigned int rx_offset = frame_parms->first_carrier_offset + frame_parms->ssb_start_subcarrier; //and
if (rx_offset>= frame_parms->ofdm_symbol_size) rx_offset-=frame_parms->ofdm_symbol_size;
int s_offset=0;
AssertFatal(symbol>=1 && symbol<5,
"symbol %d illegal for PBCH extraction\n",
symbol);
if (is_synchronized==1) s_offset=4;
for (aarx=0; aarx<frame_parms->nb_antennas_rx; aarx++) {
rxF = &rxdataF[aarx][(symbol+s_offset)*frame_parms->ofdm_symbol_size];
rxF_ext = &rxdataF_ext[aarx][(symbol+s_offset)*(20*12)];
rxF_ext = &rxdataF_ext[aarx][symbol*20*12];
#ifdef DEBUG_PBCH
printf("extract_rbs (nushift %d): rx_offset=%d, symbol %d\n",frame_parms->nushift,
(rx_offset + ((symbol+s_offset)*(frame_parms->ofdm_symbol_size))),symbol);
......@@ -143,7 +140,7 @@ uint16_t nr_pbch_extract(int **rxdataF,
//printf("dl_ch0 addr %p\n",dl_ch0);
dl_ch0_ext = &dl_ch_estimates_ext[aarx][(symbol+s_offset)*(20*12)];
dl_ch0_ext = &dl_ch_estimates_ext[aarx][symbol*20*12];
for (rb=0; rb<20; rb++) {
j=0;
......@@ -268,8 +265,7 @@ void nr_pbch_channel_compensation(int **rxdataF_ext,
int **dl_ch_estimates_ext,
int **rxdataF_comp,
NR_DL_FRAME_PARMS *frame_parms,
uint8_t symbol,
int is_synchronized,
uint32_t symbol,
uint8_t output_shift)
{
......@@ -290,14 +286,11 @@ void nr_pbch_channel_compensation(int **rxdataF_ext,
#endif
AssertFatal((symbol > 0 && symbol < 4 && is_synchronized == 0) ||
(symbol > 4 && symbol < 8 && is_synchronized == 1),
"symbol %d is illegal for PBCH DM-RS (is_synchronized %d)\n",
symbol,is_synchronized);
AssertFatal((symbol > 0 && symbol < 4),
"symbol %d is illegal for PBCH DM-RS\n",
symbol);
if (symbol == 2 || symbol == 6) nb_re = 72;
if (symbol == 2) nb_re = 72;
// printf("comp: symbol %d : nb_re %d\n",symbol,nb_re);
......@@ -559,31 +552,35 @@ int nr_rx_pbch( PHY_VARS_NR_UE *ue,
// clear LLR buffer
memset(nr_ue_pbch_vars->llr,0,NR_POLAR_PBCH_E);
int first_symbol=1;
if (ue->is_synchronized > 0) first_symbol+=4;
int symbol_offset=1;
if (ue->is_synchronized > 0)
symbol_offset=4;
else
symbol_offset=0;
#ifdef DEBUG_PBCH
//printf("address dataf %p",nr_ue_common_vars->common_vars_rx_data_per_thread[ue->current_thread_id[subframe_rx]].rxdataF);
write_output("rxdataF0_pbch.m","rxF0pbch",
&nr_ue_common_vars->common_vars_rx_data_per_thread[ue->current_thread_id[subframe_rx]].rxdataF[0][first_symbol*frame_parms->ofdm_symbol_size],frame_parms->ofdm_symbol_size*3,1,1);
&nr_ue_common_vars->common_vars_rx_data_per_thread[ue->current_thread_id[subframe_rx]].rxdataF[0][(symbol_offset+1)*frame_parms->ofdm_symbol_size],frame_parms->ofdm_symbol_size*3,1,1);
#endif
for (symbol=first_symbol; symbol<(first_symbol+3); symbol++) {
// symbol refers to symbol within SSB. symbol_offset is the offset of the SSB wrt start of slot
for (symbol=1; symbol<4; symbol++) {
nr_pbch_extract(nr_ue_common_vars->common_vars_rx_data_per_thread[ue->current_thread_id[subframe_rx]].rxdataF,
nr_ue_common_vars->common_vars_rx_data_per_thread[ue->current_thread_id[subframe_rx]].dl_ch_estimates[eNB_id],
nr_ue_pbch_vars->rxdataF_ext,
nr_ue_pbch_vars->dl_ch_estimates_ext,
symbol-first_symbol+1,
symbol,
symbol_offset,
high_speed_flag,
ue->is_synchronized,
frame_parms);
#ifdef DEBUG_PBCH
LOG_I(PHY,"[PHY] PBCH Symbol %d ofdm size %d\n",symbol, frame_parms->ofdm_symbol_size );
LOG_I(PHY,"[PHY] PBCH starting channel_level\n");
#endif
if (symbol == 1 || symbol == 5) {
if (symbol == 1) {
max_h = nr_pbch_channel_level(nr_ue_pbch_vars->dl_ch_estimates_ext,
frame_parms,
symbol);
......@@ -599,7 +596,6 @@ int nr_rx_pbch( PHY_VARS_NR_UE *ue,
nr_ue_pbch_vars->rxdataF_comp,
frame_parms,
symbol,
ue->is_synchronized,
nr_ue_pbch_vars->log2_maxh); // log2_maxh+I0_shift
/*if (frame_parms->nb_antennas_rx > 1)
......@@ -615,7 +611,7 @@ int nr_rx_pbch( PHY_VARS_NR_UE *ue,
return(-1);
}
*/
if (symbol==(first_symbol+1)) {
if (symbol==1) {
nr_pbch_quantize(pbch_e_rx,
(short*)&(nr_ue_pbch_vars->rxdataF_comp[0][symbol*240]),
144);
......@@ -633,7 +629,7 @@ int nr_rx_pbch( PHY_VARS_NR_UE *ue,
}
#ifdef DEBUG_PBCH
write_output("rxdataF_comp.m","rxFcomp",&nr_ue_pbch_vars->rxdataF_comp[0][240*first_symbol],240*3,1,1);
write_output("rxdataF_comp.m","rxFcomp",&nr_ue_pbch_vars->rxdataF_comp[0][240],240*3,1,1);
#endif
......@@ -644,7 +640,7 @@ int nr_rx_pbch( PHY_VARS_NR_UE *ue,
#ifdef DEBUG_PBCH
//pbch_e_rx = &nr_ue_pbch_vars->llr[0];
short *p = (short *)&(nr_ue_pbch_vars->rxdataF_comp[0][first_symbol*20*12]);
short *p = (short *)&(nr_ue_pbch_vars->rxdataF_comp[0][20*12]);
for (int cnt = 0; cnt < 864 ; cnt++)
printf("pbch rx llr %d\n",*(pbch_e_rx+cnt));
......@@ -720,14 +716,13 @@ int nr_rx_pbch( PHY_VARS_NR_UE *ue,
ue->dl_indication.rx_ind = &ue->rx_ind; // hang on rx_ind instance
//ue->rx_ind.sfn_slot = 0; //should be set by higher-1-layer, i.e. clean_and_set_if_instance()
ue->rx_ind.number_pdus = ue->rx_ind.number_pdus + 1;
ue->rx_ind.rx_indication_body = (fapi_nr_rx_indication_body_t *)malloc(sizeof(fapi_nr_rx_indication_body_t));
ue->rx_ind.rx_indication_body->pdu_type = FAPI_NR_RX_PDU_TYPE_MIB;
ue->rx_ind.rx_indication_body->mib_pdu.pdu = &decoded_output[0];
ue->rx_ind.rx_indication_body->mib_pdu.additional_bits = xtra_byte;
ue->rx_ind.rx_indication_body->mib_pdu.ssb_index = ssb_index; // confirm with TCL
ue->rx_ind.rx_indication_body->mib_pdu.ssb_length = Lmax; // confirm with TCL
ue->rx_ind.rx_indication_body->mib_pdu.cell_id = frame_parms->Nid_cell; // confirm with TCL
ue->rx_ind.rx_indication_body[0].pdu_type = FAPI_NR_RX_PDU_TYPE_MIB;
ue->rx_ind.rx_indication_body[0].mib_pdu.pdu = &decoded_output[0];
ue->rx_ind.rx_indication_body[0].mib_pdu.additional_bits = xtra_byte;
ue->rx_ind.rx_indication_body[0].mib_pdu.ssb_index = ssb_index; // confirm with TCL
ue->rx_ind.rx_indication_body[0].mib_pdu.ssb_length = Lmax; // confirm with TCL
ue->rx_ind.rx_indication_body[0].mib_pdu.cell_id = frame_parms->Nid_cell; // confirm with TCL
ue->rx_ind.number_pdus = 1;
if (ue->if_inst && ue->if_inst->dl_indication)
ue->if_inst->dl_indication(&ue->dl_indication);
......
......@@ -40,6 +40,7 @@
//#include "PHY/defs_nr_common.h"
#include "PHY/defs_nr_UE.h"
#include "PHY/NR_UE_TRANSPORT/nr_prach.h"
#include "PHY/NR_UE_TRANSPORT/nr_transport_proto_ue.h"
//#include "PHY/extern.h"
//#include "LAYER2/MAC/extern.h"
//#include "PHY/NR_UE_TRANSPORT/pucch_nr.h"
......@@ -574,7 +575,7 @@ int32_t generate_nr_prach( PHY_VARS_NR_UE *ue, uint8_t eNB_id, uint8_t subframe,
uint8_t restricted_set = ue->frame_parms.prach_config_common.prach_ConfigInfo.highSpeedFlag;
//uint8_t n_ra_prboffset = ue->frame_parms.prach_config_common.prach_ConfigInfo.prach_FreqOffset;
uint8_t preamble_index = ue->prach_resources[eNB_id]->ra_PreambleIndex;
uint8_t tdd_mapindex = ue->prach_resources[eNB_id]->ra_TDD_map_index;
//uint8_t tdd_mapindex = ue->prach_resources[eNB_id]->ra_TDD_map_index;
int16_t *prachF = ue->prach_vars[eNB_id]->prachF;
static int16_t prach_tmp[45600*2] __attribute__((aligned(32)));
int16_t *prach = prach_tmp;
......@@ -582,7 +583,7 @@ int32_t generate_nr_prach( PHY_VARS_NR_UE *ue, uint8_t eNB_id, uint8_t subframe,
int16_t amp = ue->prach_vars[eNB_id]->amp;
int16_t Ncp;
uint8_t n_ra_prb;
uint16_t NCS;
uint16_t NCS=0;
uint16_t *prach_root_sequence_map;
uint16_t preamble_offset,preamble_shift;
uint16_t preamble_index0,n_shift_ra,n_shift_ra_bar;
......@@ -599,7 +600,7 @@ int32_t generate_nr_prach( PHY_VARS_NR_UE *ue, uint8_t eNB_id, uint8_t subframe,
int32_t Xu_re,Xu_im;
uint16_t offset,offset2;
int prach_start;
int i, prach_len;
int i, prach_len=0;
uint16_t first_nonzero_root_idx=0;
#if defined(EXMIMO) || defined(OAI_USRP)
......
......@@ -34,7 +34,7 @@
#include <limits.h>
#include "PHY/impl_defs_top.h"
#include "PHY/CODING/nrLDPC_decoder/nrLDPC_types.h"
//#include "PHY/defs_nr_UE.h"
#include "../NR_TRANSPORT/nr_transport_common_proto.h"
......@@ -267,6 +267,8 @@ typedef struct {
double w_abs[MAX_NUM_NR_DLSCH_SEGMENTS][3*8448];
/// soft bits for each received segment ("d"-sequence)(for definition see 36-212 V8.6 2009-03, p.15)
int16_t *d[MAX_NUM_NR_DLSCH_SEGMENTS];
/// LDPC processing buffers
t_nrLDPC_procBuf* p_nrLDPC_procBuf[MAX_NUM_DLSCH_SEGMENTS];
/// Number of code segments
uint32_t C;
/// Number of bits in code segments
......@@ -353,9 +355,7 @@ typedef struct {
/// Maximum number of LDPC iterations
uint8_t max_ldpc_iterations;
/// number of iterations used in last turbo decoding
uint8_t last_iteration_cnt;
uint8_t last_iteration_cnt;
} NR_UE_DLSCH_t;
typedef enum {format0_0,
......
......@@ -862,8 +862,8 @@ int pss_search_time_nr(int **rxdata, ///rx data in time domain
//((short*)pss_corr_ue[pss_index])[2*n] += ((short*) &result)[0]; /* real part */
//((short*)pss_corr_ue[pss_index])[2*n+1] += ((short*) &result)[1]; /* imaginary part */
//((short*)&synchro_out)[0] += ((short*) &result)[0]; /* real part */
//((short*)&synchro_out)[1] += ((short*) &result)[1]; /* imaginary part */
//((short*)&synchro_out)[0] += ((int*) &result)[0]; /* real part */
//((short*)&synchro_out)[1] += ((int*) &result)[1]; /* imaginary part */
}
}
......
This diff is collapsed.
......@@ -32,15 +32,8 @@
#include "sched_nr.h"
nr_subframe_t nr_slot_select(nfapi_nr_config_request_t *cfg,unsigned char slot)
{
if (cfg->subframe_config.duplex_mode.value == FDD)
return(SF_DL);
}
......@@ -112,9 +112,8 @@ int nr_get_ssb_start_symbol(nfapi_nr_config_request_t *cfg, NR_DL_FRAME_PARMS *f
void nr_set_ssb_first_subcarrier(nfapi_nr_config_request_t *cfg, NR_DL_FRAME_PARMS *fp)
{
int start_rb = cfg->sch_config.n_ssb_crb.value / (1<<cfg->subframe_config.numerology_index_mu.value);
fp->ssb_start_subcarrier = 12 * start_rb + cfg->sch_config.ssb_subcarrier_offset.value;
LOG_D(PHY, "SSB first subcarrier %d (%d,%d)\n", fp->ssb_start_subcarrier,start_rb,cfg->sch_config.ssb_subcarrier_offset.value);
fp->ssb_start_subcarrier = (12 * cfg->sch_config.n_ssb_crb.value + cfg->sch_config.ssb_subcarrier_offset.value)/(1<<cfg->subframe_config.numerology_index_mu.value);
LOG_D(PHY, "SSB first subcarrier %d (%d,%d)\n", fp->ssb_start_subcarrier,cfg->sch_config.n_ssb_crb.value,cfg->sch_config.ssb_subcarrier_offset.value);
}
void nr_common_signal_procedures (PHY_VARS_gNB *gNB,int frame, int slot) {
......
......@@ -52,7 +52,7 @@ int8_t nr_ue_scheduled_response(nr_scheduled_response_t *scheduled_response){
if(scheduled_response != NULL){
// Note: we have to handle the thread IDs for this. To be revisited completely.
NR_UE_PDCCH *pdcch_vars2 = PHY_vars_UE_g[module_id][cc_id]->pdcch_vars[0][0];
NR_UE_DLSCH_t *dlsch0 = PHY_vars_UE_g[module_id][cc_id]->dlsch[0][0];
NR_UE_DLSCH_t *dlsch0 = PHY_vars_UE_g[module_id][cc_id]->dlsch[0][0][0];
NR_UE_ULSCH_t *ulsch0 = PHY_vars_UE_g[module_id][cc_id]->ulsch[0];
NR_DL_FRAME_PARMS frame_parms = PHY_vars_UE_g[module_id][cc_id]->frame_parms;
PRACH_RESOURCES_t *prach_resources = PHY_vars_UE_g[module_id][cc_id]->prach_resources[0];
......@@ -254,3 +254,4 @@ int8_t nr_ue_phy_config_request(nr_phy_config_t *phy_config){
return 0;
}
......@@ -56,7 +56,7 @@
//#define DEBUG_PHY_PROC
#define NR_PDCCH_SCHED
//#define NR_PDCCH_SCHED_DEBUG
#define NR_PDCCH_SCHED_DEBUG
//#define NR_PUCCH_SCHED
//#define NR_PUCCH_SCHED_DEBUG
......@@ -3237,11 +3237,13 @@ int nr_ue_pdcch_procedures(uint8_t eNB_id,PHY_VARS_NR_UE *ue,UE_nr_rxtx_proc_t *
#ifdef NR_PDCCH_SCHED_DEBUG
printf("<-NR_PDCCH_PHY_PROCEDURES_LTE_UE (nr_ue_pdcch_procedures)-> Entering function nr_dci_decoding_procedure with eNB_id=%d (n_RB_ULBWP=%d, n_RB_DLBWP=%d, searchSpaceType=%d, nb_searchspace_active=%d, nb_coreset_active=%d) -> dci_cnt=%d\n",
eNB_id,n_RB_ULBWP,n_RB_DLBWP,searchSpaceType,
printf("<-NR_PDCCH_PHY_PROCEDURES_LTE_UE (nr_ue_pdcch_procedures)-> Entering function nr_dci_decoding_procedure with eNB_id=%d (n_RB_ULBWP=%d, n_RB_DLBWP=%d, searchSpaceType=%d, nb_searchspace_active=%d, nb_coreset_active=%d)\n",
eNB_id,
pdcch_vars2->n_RB_BWP[nb_searchspace_active],
pdcch_vars2->n_RB_BWP[nb_searchspace_active],
searchSpaceType,
nb_searchspace_active,
nb_coreset_active,
dci_cnt);
nb_coreset_active);
#endif
......@@ -3348,14 +3350,14 @@ int nr_ue_pdcch_procedures(uint8_t eNB_id,PHY_VARS_NR_UE *ue,UE_nr_rxtx_proc_t *
ue->dci_ind.dci_list[i].dci_format = dci_alloc_rx[i].format;
ue->dci_ind.dci_list[i].n_CCE = dci_alloc_rx[i].firstCCE;
ue->dci_ind.dci_list[i].N_CCE = (int)dci_alloc_rx[i].L;
ue->dci_ind.number_of_dcis = ue->dci_ind.number_of_dcis + 1;
memcpy(&ue->dci_ind.dci_list[i].dci, &nr_dci_info_extracted, sizeof(fapi_nr_dci_pdu_rel15_t) );
memcpy(&ue->dci_ind.dci_list[i].dci, &nr_dci_info_extracted, sizeof(fapi_nr_dci_pdu_rel15_t) );
// TODO: check where should we send up this message.
//ue->if_inst->dl_indication(&ue->dl_indication);
} // end for loop dci_cnt
// TODO: check where should we send up this message.
ue->if_inst->dl_indication(&ue->dl_indication);
#if UE_TIMING_TRACE
stop_meas(&ue->dlsch_rx_pdcch_stats);
#endif
......
This diff is collapsed.
......@@ -622,7 +622,7 @@ int main(int argc, char **argv)
uint32_t number_of_search_space_per_slot=1;
uint32_t first_symbol_index=0;
uint32_t search_space_duration; // element of search space
uint32_t search_space_duration=0; // element of search space
uint32_t coreset_duration; // element of coreset
coreset_duration = num_symbols * number_of_search_space_per_slot;
......
......@@ -85,39 +85,41 @@ int main(int argc, char **argv)
char c;
int i,l,aa;
int i,aa;//,l;
double sigma2, sigma2_dB=10,SNR,snr0=-2.0,snr1=2.0;
uint8_t snr1set=0;
int **txdata;
double **s_re,**s_im,**r_re,**r_im;
double iqim = 0.0;
unsigned char pbch_pdu[6];
//double iqim = 0.0;
//unsigned char pbch_pdu[6];
// int sync_pos, sync_pos_slot;
// FILE *rx_frame_file;
FILE *output_fd = NULL;
uint8_t write_output_file=0;
//int result;
int freq_offset;
//int freq_offset;
// int subframe_offset;
// char fname[40], vname[40];
int trial,n_trials=1,n_errors,n_errors_payload;
int trial,n_trials=1,n_errors=0,n_errors_payload=0;
uint8_t transmission_mode = 1,n_tx=1,n_rx=1;
uint16_t Nid_cell=0;
channel_desc_t *gNB2UE;
uint32_t nsymb,tx_lev,tx_lev1 = 0,tx_lev2 = 0;
uint8_t extended_prefix_flag=0;
int8_t interf1=-21,interf2=-21;
FILE *input_fd=NULL,*pbch_file_fd=NULL;
char input_val_str[50],input_val_str2[50];
uint8_t frame_mod4,num_pdcch_symbols = 0;
//uint32_t nsymb,tx_lev,tx_lev1 = 0,tx_lev2 = 0;
//char input_val_str[50],input_val_str2[50];
//uint8_t frame_mod4,num_pdcch_symbols = 0;
//double pbch_sinr;
//int pbch_tx_ant;
SCM_t channel_model=AWGN;//Rayleigh1_anticorr;
double pbch_sinr;
int pbch_tx_ant;
int N_RB_DL=273,mu=1;
unsigned char frame_type = 0;
......@@ -355,7 +357,7 @@ int main(int argc, char **argv)
frame_parms->N_RB_DL = N_RB_DL;
frame_parms->N_RB_UL = N_RB_DL;
nr_phy_config_request_sim(gNB,N_RB_DL,N_RB_DL,mu);
nr_phy_config_request_sim(gNB,N_RB_DL,N_RB_DL,mu,Nid_cell);
phy_init_nr_gNB(gNB,0,0);
double fs,bw;
......@@ -474,7 +476,7 @@ int main(int argc, char **argv)
frame_length_complex_samples,
input_fd) != frame_length_complex_samples) {
printf("error reading from file\n");
exit(-1);
//exit(-1);
}
}
......
......@@ -127,5 +127,8 @@ void nr_ue_process_mac_pdu(
uint8_t *pduP,
uint16_t mac_pdu_len,
uint8_t eNB_index);
int8_t nr_ue_process_dlsch(module_id_t module_id, int cc_id, uint8_t gNB_index, fapi_nr_dci_indication_t *dci_ind, void *pduP, uint32_t pdu_len);
#endif
/** @}*/
\ No newline at end of file
/** @}*/
......@@ -95,7 +95,7 @@ int8_t nr_ue_process_dlsch(module_id_t module_id, int cc_id, uint8_t gNB_index,
ul_config->ul_config_list[ul_config->number_pdus].ulsch_config_pdu.ulsch_pdu_rel15.n_layers = 0;
ul_config->ul_config_list[ul_config->number_pdus].ulsch_config_pdu.ulsch_pdu_rel15.tpmi = 0;
ul_config->ul_config_list[ul_config->number_pdus].ulsch_config_pdu.ulsch_pdu_rel15.n_dmrs_cdm_groups = 0;
ul_config->ul_config_list[ul_config->number_pdus].ulsch_config_pdu.ulsch_pdu_rel15.dmrs_ports[4] = 0;
for (int i=0;i<4;i++) ul_config->ul_config_list[ul_config->number_pdus].ulsch_config_pdu.ulsch_pdu_rel15.dmrs_ports[i]=0;
ul_config->ul_config_list[ul_config->number_pdus].ulsch_config_pdu.ulsch_pdu_rel15.n_front_load_symb = 0;
//ul_config->ul_config_list[ul_config->number_pdus].ulsch_config_pdu.ulsch_pdu_rel15.srs_config = 0;
ul_config->ul_config_list[ul_config->number_pdus].ulsch_config_pdu.ulsch_pdu_rel15.csi_reportTriggerSize = 0;
......@@ -125,7 +125,7 @@ int8_t nr_ue_process_dlsch(module_id_t module_id, int cc_id, uint8_t gNB_index,
ul_config->ul_config_list[ul_config->number_pdus].pucch_config_pdu.pucch_GroupHopping = phy_config->config_req.ul_bwp_common.pucch_config_common.pucch_group_hopping;
ul_config->ul_config_list[ul_config->number_pdus].pucch_config_pdu.hoppingId = phy_config->config_req.ul_bwp_common.pucch_config_common.hopping_id;
ul_config->ul_config_list[ul_config->number_pdus].pucch_config_pdu.p0_nominal = phy_config->config_req.ul_bwp_common.pucch_config_common.p0_nominal;
ul_config->ul_config_list[ul_config->number_pdus].pucch_config_pdu.deltaF_PUCCH_f[NUMBER_PUCCH_FORMAT_NR] = 0;
for (int i=0;i<NUMBER_PUCCH_FORMAT_NR;i++) ul_config->ul_config_list[ul_config->number_pdus].pucch_config_pdu.deltaF_PUCCH_f[i] = 0;
ul_config->ul_config_list[ul_config->number_pdus].pucch_config_pdu.p0_PUCCH_Id = 0; /* INTEGER (1..8) */
ul_config->ul_config_list[ul_config->number_pdus].pucch_config_pdu.p0_PUCCH_Value = 0;
ul_config->ul_config_list[ul_config->number_pdus].pucch_config_pdu.twoPUCCH_PC_AdjustmentStates = 0;
......@@ -180,14 +180,14 @@ int8_t nr_ue_process_dlsch(module_id_t module_id, int cc_id, uint8_t gNB_index,
ul_config->ul_config_list[ul_config->number_pdus].pucch_config_pdu.pucch_GroupHopping = phy_config->config_req.ul_bwp_common.pucch_config_common.pucch_group_hopping;
ul_config->ul_config_list[ul_config->number_pdus].pucch_config_pdu.hoppingId = phy_config->config_req.ul_bwp_common.pucch_config_common.hopping_id;
ul_config->ul_config_list[ul_config->number_pdus].pucch_config_pdu.p0_nominal = phy_config->config_req.ul_bwp_common.pucch_config_common.p0_nominal;
ul_config->ul_config_list[ul_config->number_pdus].pucch_config_pdu.deltaF_PUCCH_f[NUMBER_PUCCH_FORMAT_NR] = 0;
for (int i=0;i<NUMBER_PUCCH_FORMAT_NR; i++) ul_config->ul_config_list[ul_config->number_pdus].pucch_config_pdu.deltaF_PUCCH_f[i] = 0;
ul_config->ul_config_list[ul_config->number_pdus].pucch_config_pdu.p0_PUCCH_Id = 0; /* INTEGER (1..8) */
ul_config->ul_config_list[ul_config->number_pdus].pucch_config_pdu.p0_PUCCH_Value = 0;
ul_config->ul_config_list[ul_config->number_pdus].pucch_config_pdu.twoPUCCH_PC_AdjustmentStates = 0;
}
if(mac->if_module != NULL && mac->if_module->ul_indication != NULL){
mac->if_module->ul_indication(&mac->scheduled_response);
mac->if_module->dl_indication(&mac->scheduled_response);
}
return 0;
}
......@@ -659,9 +659,15 @@ NR_UE_L2_STATE_t nr_ue_scheduler(
dl_config->dl_config_list[dl_config->number_pdus].dci_config_pdu.dci_config_rel15 = mac->type0_pdcch_dci_config;
dl_config->dl_config_list[dl_config->number_pdus].pdu_type = FAPI_NR_DL_CONFIG_TYPE_DCI;
dl_config->number_pdus = dl_config->number_pdus + 1;
dl_config->dl_config_list[dl_config->number_pdus].dci_config_pdu.dci_config_rel15.rnti = 0xaaaa; // to be set
dl_config->dl_config_list[dl_config->number_pdus].dci_config_pdu.dci_config_rel15.N_RB_BWP = 106; // to be set
/*
printf("nr_ue_scheduler Type0 PDCCH with rnti %x, BWP %d\n",
dl_config->dl_config_list[dl_config->number_pdus].dci_config_pdu.dci_config_rel15.rnti,
dl_config->dl_config_list[dl_config->number_pdus].dci_config_pdu.dci_config_rel15.N_RB_BWP);
*/
dl_config->number_pdus = dl_config->number_pdus + 1;
}
if(search_space_mask & type0a_pdcch){
......@@ -1301,9 +1307,9 @@ printf("\n>>> nr_ue_process_dci at MAC layer with dci_format=%d\n",dci_format);
fapi_nr_ul_config_pusch_pdu_rel15_t *ulsch_config_pdu_0_0 = &ul_config->ul_config_list[ul_config->number_pdus].ulsch_config_pdu.ulsch_pdu_rel15;
/* IDENTIFIER_DCI_FORMATS */
/* FREQ_DOM_RESOURCE_ASSIGNMENT_UL */
nr_ue_process_dci_freq_dom_resource_assignment(&ulsch_config_pdu_0_0,NULL,n_RB_ULBWP,0,dci->freq_dom_resource_assignment_UL);
nr_ue_process_dci_freq_dom_resource_assignment(ulsch_config_pdu_0_0,NULL,n_RB_ULBWP,0,dci->freq_dom_resource_assignment_UL);
/* TIME_DOM_RESOURCE_ASSIGNMENT */
nr_ue_process_dci_time_dom_resource_assignment(&ulsch_config_pdu_0_0,NULL,dci->time_dom_resource_assignment,mac->mib->dmrs_TypeA_Position);
nr_ue_process_dci_time_dom_resource_assignment(ulsch_config_pdu_0_0,NULL,dci->time_dom_resource_assignment,mac->mib->dmrs_TypeA_Position);
/* FREQ_HOPPING_FLAG */
if ((mac->phy_config.config_req.ul_bwp_dedicated.pusch_config_dedicated.resource_allocation != 0) &&
(mac->phy_config.config_req.ul_bwp_dedicated.pusch_config_dedicated.frequency_hopping !=0))
......@@ -1377,9 +1383,9 @@ printf("\n>>> nr_ue_process_dci at MAC layer with dci_format=%d\n",dci_format);
/* BANDWIDTH_PART_IND */
ulsch_config_pdu_0_1->bandwidth_part_ind = dci->bandwidth_part_ind;
/* FREQ_DOM_RESOURCE_ASSIGNMENT_UL */
nr_ue_process_dci_freq_dom_resource_assignment(&ulsch_config_pdu_0_1,NULL,n_RB_ULBWP,0,dci->freq_dom_resource_assignment_UL);
nr_ue_process_dci_freq_dom_resource_assignment(ulsch_config_pdu_0_1,NULL,n_RB_ULBWP,0,dci->freq_dom_resource_assignment_UL);
/* TIME_DOM_RESOURCE_ASSIGNMENT */
nr_ue_process_dci_time_dom_resource_assignment(&ulsch_config_pdu_0_1,NULL,dci->time_dom_resource_assignment,mac->mib->dmrs_TypeA_Position);
nr_ue_process_dci_time_dom_resource_assignment(ulsch_config_pdu_0_1,NULL,dci->time_dom_resource_assignment,mac->mib->dmrs_TypeA_Position);
/* FREQ_HOPPING_FLAG */
if ((mac->phy_config.config_req.ul_bwp_dedicated.pusch_config_dedicated.resource_allocation != 0) &&
(mac->phy_config.config_req.ul_bwp_dedicated.pusch_config_dedicated.frequency_hopping !=0))
......@@ -1769,8 +1775,7 @@ printf("\n>>> nr_ue_process_dci at MAC layer with dci_format=%d\n",dci_format);
//for (int k=0;k<1000;k++) printf(">>> %d ",k);
//mac->if_module->dl_indication(&mac->dl_info);
//mac->if_module->dl_indication(&mac->dl_config_request);
mac->if_module->dl_indication(&mac->phy_config);
mac->if_module->dl_indication(&mac->phy_config);
break;
......
......@@ -33,6 +33,7 @@
#include "NR_IF_Module.h"
#include "mac_proto.h"
#include "assertions.h"
#include "LAYER2/NR_MAC_UE/mac_extern.h"
#include <stdio.h>
......@@ -134,7 +135,7 @@ int nr_ue_dl_indication(nr_downlink_indication_t *dl_info){
for(i=0; i<dl_info->dci_ind->number_of_dcis; ++i){
printf(">>>NR_IF_Module i=%d, dl_info->dci_ind->number_of_dcis=%d\n",i,dl_info->dci_ind->number_of_dcis);
fapi_nr_dci_pdu_rel15_t *dci = &dl_info->dci_ind->dci_list[i].dci;
/*
ret_mask |= (handle_dci(
dl_info->module_id,
dl_info->cc_id,
......@@ -142,7 +143,7 @@ int nr_ue_dl_indication(nr_downlink_indication_t *dl_info){
dci,
(dl_info->dci_ind->dci_list+i)->rnti,
(dl_info->dci_ind->dci_list+i)->dci_format)) << FAPI_NR_DCI_IND;
*/
/*switch((dl_info->dci_ind->dci_list+i)->dci_type){
case FAPI_NR_DCI_TYPE_0_0:
......@@ -211,7 +212,7 @@ int nr_ue_dl_indication(nr_downlink_indication_t *dl_info){
break;
case FAPI_NR_RX_PDU_TYPE_DLSCH:
// ret_mask |= (0) << FAPI_NR_RX_PDU_TYPE_DLSCH;
ret_mask |= (handle_dlsch(dl_info->module_id, dl_info->cc_id, dl_info->gNB_index, &dl_info->dci_ind,
ret_mask |= (handle_dlsch(dl_info->module_id, dl_info->cc_id, dl_info->gNB_index, dl_info->dci_ind,
(dl_info->rx_ind->rx_indication_body+i)->pdsch_pdu.pdu,
(dl_info->rx_ind->rx_indication_body+i)->pdsch_pdu.pdu_length)) << FAPI_NR_RX_PDU_TYPE_DLSCH;
......@@ -224,6 +225,9 @@ int nr_ue_dl_indication(nr_downlink_indication_t *dl_info){
}
}
//clean up nr_downlink_indication_t *dl_info
dl_info->rx_ind = NULL;
dl_info->dci_ind = NULL;
AssertFatal( nr_ue_if_module_inst[module_id] != NULL, "IF module is void!\n" );
nr_ue_if_module_inst[module_id]->scheduled_response(&mac->scheduled_response);
......@@ -256,3 +260,52 @@ int nr_ue_if_module_kill(uint32_t module_id) {
}
return 0;
}
int nr_ue_dcireq(nr_dcireq_t *dcireq) {
fapi_nr_dl_config_request_t *dl_config=&dcireq->dl_config_req;
// Type0 PDCCH search space
dl_config->number_pdus = 1;
dl_config->dl_config_list[0].pdu_type = FAPI_NR_DL_CONFIG_TYPE_DCI;
dl_config->dl_config_list[0].dci_config_pdu.dci_config_rel15.rnti = 0xaaaa; // to be set
uint64_t mask = 0x0;
uint16_t num_rbs=48;
uint16_t rb_offset=47;
uint16_t cell_id=0;
uint16_t num_symbols=2;
for(int i=0; i<(num_rbs/6); ++i){ // 38.331 Each bit corresponds a group of 6 RBs
mask = mask >> 1;
mask = mask | 0x100000000000;
}
dl_config->dl_config_list[0].dci_config_pdu.dci_config_rel15.coreset.frequency_domain_resource = mask;
dl_config->dl_config_list[0].dci_config_pdu.dci_config_rel15.coreset.rb_offset = rb_offset; // additional parameter other than coreset
dl_config->dl_config_list[0].dci_config_pdu.dci_config_rel15.coreset.duration = num_symbols;
dl_config->dl_config_list[0].dci_config_pdu.dci_config_rel15.coreset.cce_reg_mapping_type =CCE_REG_MAPPING_TYPE_INTERLEAVED;
dl_config->dl_config_list[0].dci_config_pdu.dci_config_rel15.coreset.cce_reg_interleaved_reg_bundle_size = 6; // L 38.211 7.3.2.2
dl_config->dl_config_list[0].dci_config_pdu.dci_config_rel15.coreset.cce_reg_interleaved_interleaver_size = 2; // R 38.211 7.3.2.2
dl_config->dl_config_list[0].dci_config_pdu.dci_config_rel15.coreset.cce_reg_interleaved_shift_index = cell_id;
dl_config->dl_config_list[0].dci_config_pdu.dci_config_rel15.coreset.precoder_granularity = PRECODER_GRANULARITY_SAME_AS_REG_BUNDLE;
dl_config->dl_config_list[0].dci_config_pdu.dci_config_rel15.coreset.pdcch_dmrs_scrambling_id = cell_id;
uint32_t number_of_search_space_per_slot=1;
uint32_t first_symbol_index=0;
uint32_t search_space_duration=1; // element of search space
uint32_t coreset_duration; // element of coreset
coreset_duration = num_symbols * number_of_search_space_per_slot;
dl_config->dl_config_list[0].dci_config_pdu.dci_config_rel15.number_of_candidates[0] = table_38213_10_1_1_c2[0];
dl_config->dl_config_list[0].dci_config_pdu.dci_config_rel15.number_of_candidates[1] = table_38213_10_1_1_c2[1];
dl_config->dl_config_list[0].dci_config_pdu.dci_config_rel15.number_of_candidates[2] = table_38213_10_1_1_c2[2]; // CCE aggregation level = 4
dl_config->dl_config_list[0].dci_config_pdu.dci_config_rel15.number_of_candidates[3] = table_38213_10_1_1_c2[3]; // CCE aggregation level = 8
dl_config->dl_config_list[0].dci_config_pdu.dci_config_rel15.number_of_candidates[4] = table_38213_10_1_1_c2[4]; // CCE aggregation level = 16
dl_config->dl_config_list[0].dci_config_pdu.dci_config_rel15.duration = search_space_duration;
dl_config->dl_config_list[0].dci_config_pdu.dci_config_rel15.monitoring_symbols_within_slot = (0x3fff << first_symbol_index) & (0x3fff >> (14-coreset_duration-first_symbol_index)) & 0x3fff;
dl_config->dl_config_list[0].dci_config_pdu.dci_config_rel15.N_RB_BWP = 106;
}
......@@ -137,7 +137,7 @@ typedef struct {
* -1: Failed to consume bytes. Abort the mission.
* Non-negative return values indicate success, and ignored.
*/
typedef int (nr_ue_scheduled_response_f)(nr_scheduled_response_t *scheduled_response);
typedef int8_t (nr_ue_scheduled_response_f)(nr_scheduled_response_t *scheduled_response);
/*
......@@ -147,7 +147,7 @@ typedef int (nr_ue_scheduled_response_f)(nr_scheduled_response_t *scheduled_resp
* -1: Failed to consume bytes. Abort the mission.
* Non-negative return values indicate success, and ignored.
*/
typedef int (nr_ue_phy_config_request_f)(nr_phy_config_t *phy_config);
typedef int8_t (nr_ue_phy_config_request_f)(nr_phy_config_t *phy_config);
/*
......@@ -176,7 +176,7 @@ typedef struct nr_ue_if_module_s {
nr_ue_phy_config_request_f *phy_config_request;
nr_ue_dl_indication_f *dl_indication;
nr_ue_ul_indication_f *ul_indication;
nr_ue_dcireq_f *dcireq;
//nr_ue_dcireq_f *dcireq;
uint32_t cc_mask;
uint32_t current_frame;
uint32_t current_slot;
......
......@@ -115,8 +115,16 @@ sudo cset shield --reset
cd eur_oai_develop-nr/openairinterface5g/
source oaienv
sudo -E ./cmake_targets/build_oai -c --gNB -w ADRV9371_ZC706 -I
sudo -E ./cmake_targets/build_oai -c --gNB -w ADRV9371_ZC706
sudo -E ./cmake_targets/build_oai -c --gNB -w ADRV9371_ZC706 -I --enable-cpu-affinity
/* CPU available shall be mapped on CPU2 to get_nprocs() number with hyperthreading disabled */
/* because : */
/* - cset shield leave CPU0 for system */
/* - CPU1 is reserved for HwRxTx thread for I/Q acquisition ! */
/* Note: "/usr/local/etc/syriq/cpu-irq.sh" shall be changed if more than 8 cores are used */
/* ie. "cset shield --force --kthread on -c 1-7" where "-c 1-7" reserves CPU1 to CPU7 for application (CPU0 is for system) */
sudo -E ./cmake_targets/build_oai -c --gNB -w ADRV9371_ZC706 --enable-cpu-affinity
......
......@@ -2,19 +2,20 @@
#define _THREADS_T_H_
typedef struct threads_s {
int iq;
int one;
int two;
int three;
int slot1_proc_one;
int slot1_proc_two;
int slot1_proc_three;
int dlsch_td_one;
int dlsch_td_two;
int dlsch_td_three;
int dlsch_td1_one;
int dlsch_td1_two;
int dlsch_td1_three;
int main;
int sync;
int one;
int two;
int three;
int slot1_proc_one;
int slot1_proc_two;
int slot1_proc_three;
//int dlsch_td_one;
//int dlsch_td_two;
//int dlsch_td_three;
//int dlsch_td1_one;
//int dlsch_td1_two;
//int dlsch_td1_three;
} threads_t;
#endif /* _THREADS_T_H_ */
......@@ -253,7 +253,7 @@ extern char uecap_xer[1024];
char uecap_xer_in=0;
int oaisim_flag=0;
threads_t threads= {-1,-1,-1,-1,-1,-1,-1};
threads_t threads= {-1,-1,-1,-1,-1,-1,-1,-1};
/* see file openair2/LAYER2/MAC/main.c for why abstraction_flag is needed
* this is very hackish - find a proper solution
......@@ -906,14 +906,16 @@ int main( int argc, char **argv )
char cpu_affinity[1024];
CPU_ZERO(&cpuset);
#ifdef CPU_AFFINITY
int j;
if (get_nprocs() > 2) {
CPU_SET(0, &cpuset);
for (j = 2; j < get_nprocs(); j++)
CPU_SET(j, &cpuset);
s = pthread_setaffinity_np(pthread_self(), sizeof(cpu_set_t), &cpuset);
if (s != 0) {
perror( "pthread_setaffinity_np");
exit_fun("Error setting processor affinity");
}
LOG_I(HW, "Setting the affinity of main function to CPU 0, for device library to use CPU 0 only!\n");
LOG_I(HW, "Setting the affinity of main function to all CPUs, for device library to use CPU 0 only!\n");
}
#endif
......
......@@ -169,7 +169,8 @@
{"clock", CONFIG_HLP_CLK, 0, uptr:&clock_source, defintval:0, TYPE_UINT, 0}, \
{"wait-for-sync", NULL, PARAMFLAG_BOOL, iptr:&wait_for_sync, defintval:0, TYPE_INT, 0}, \
{"single-thread-enable", CONFIG_HLP_NOSNGLT, PARAMFLAG_BOOL, iptr:&single_thread_flag, defintval:0, TYPE_INT, 0}, \
{"threadIQ", NULL, 0, iptr:&(threads.iq), defintval:1, TYPE_INT, 0}, \
{"threadMain", NULL, 0, iptr:&(threads.main), defintval:1, TYPE_INT, 0}, \
{"threadSync", NULL, 0, iptr:&(threads.sync), defintval:1, TYPE_INT, 0}, \
{"threadOneSubframe", NULL, 0, iptr:&(threads.one), defintval:1, TYPE_INT, 0}, \
{"threadTwoSubframe", NULL, 0, iptr:&(threads.two), defintval:1, TYPE_INT, 0}, \
{"threadThreeSubframe", NULL, 0, iptr:&(threads.three), defintval:1, TYPE_INT, 0}, \
......
......@@ -456,8 +456,8 @@ static void *UE_thread_synch(void *arg)
cpu_set_t cpuset;
CPU_ZERO(&cpuset);
if ( threads.iq != -1 )
CPU_SET(threads.iq, &cpuset);
if ( threads.sync != -1 )
CPU_SET(threads.sync, &cpuset);
// this thread priority must be lower that the main acquisition thread
sprintf(threadname, "sync UE %d\n", UE->Mod_id);
init_thread(100000, 500000, FIFO_PRIORITY-1, &cpuset, threadname);
......@@ -1435,8 +1435,8 @@ void *UE_thread(void *arg) {
cpu_set_t cpuset;
CPU_ZERO(&cpuset);
if ( threads.iq != -1 )
CPU_SET(threads.iq, &cpuset);
if ( threads.main != -1 )
CPU_SET(threads.main, &cpuset);
init_thread(100000, 500000, FIFO_PRIORITY, &cpuset,
"UHD Threads");
......
......@@ -260,7 +260,7 @@ extern char uecap_xer[1024];
char uecap_xer_in=0;
int oaisim_flag=0;
threads_t threads= {-1,-1,-1,-1,-1,-1,-1};
threads_t threads = {-1,-1,-1,-1,-1,-1,-1};
/* see file openair2/LAYER2/MAC/main.c for why abstraction_flag is needed
* this is very hackish - find a proper solution
......@@ -1014,14 +1014,17 @@ printf("~~~~~~~~~~~~~~~~~~~~successfully get the parallel config[%d], worker con
char cpu_affinity[1024];
CPU_ZERO(&cpuset);
#ifdef CPU_AFFINITY
int j;
if (get_nprocs() > 2) {
CPU_SET(0, &cpuset);
for (j = 2; j < get_nprocs(); j++)
CPU_SET(j, &cpuset);
s = pthread_setaffinity_np(pthread_self(), sizeof(cpu_set_t), &cpuset);
if (s != 0) {
perror( "pthread_setaffinity_np");
exit_fun("Error setting processor affinity");
}
LOG_I(HW, "Setting the affinity of main function to CPU 0, for device library to use CPU 0 only!\n");
LOG_I(HW, "Setting the affinity of main function to all CPUs, for device library to use CPU 0 only!\n");
}
#endif
......
......@@ -1286,7 +1286,7 @@ static void* ru_thread_tx( void* param ) {
gNB_L1_rxtx_proc_t *L1_proc;
NR_DL_FRAME_PARMS *fp = ru->nr_frame_parms;
char filename[40];
int print_frame = 2;
int print_frame = 8;
int i = 0;
cpu_set_t cpuset;
......@@ -1402,8 +1402,8 @@ static void* ru_thread( void* param ) {
int ret;
int slot = fp->slots_per_frame-1;
int frame =1023;
char filename[40];
int print_frame = 2;
char filename[40],threadname[40];
int print_frame = 8;
int i = 0;
// set default return value
......@@ -1411,7 +1411,8 @@ static void* ru_thread( void* param ) {
// set default return value
thread_top_init("ru_thread",0,870000,1000000,1000000);
sprintf(threadname,"ru_thread %d",ru->idx);
thread_top_init(threadname,0,870000,1000000,1000000);
LOG_I(PHY,"Starting RU %d (%s,%s),\n",ru->idx,NB_functions[ru->function],NB_timing[ru->if_timing]);
......
......@@ -247,8 +247,6 @@ double cpuf;
extern char uecap_xer[1024];
char uecap_xer_in=0;
threads_t threads= {-1,-1,-1,-1,-1,-1,-1};
/* see file openair2/LAYER2/MAC/main.c for why abstraction_flag is needed
* this is very hackish - find a proper solution
*/
......@@ -1034,14 +1032,19 @@ int main( int argc, char **argv )
char cpu_affinity[1024];
CPU_ZERO(&cpuset);
#ifdef CPU_AFFINITY
int j;
if (get_nprocs() > 2) {
CPU_SET(0, &cpuset);
// CPU_SET(1, &cpuset);
for (j = 2; j < get_nprocs(); j++)
{
CPU_SET(j, &cpuset);
}
s = pthread_setaffinity_np(pthread_self(), sizeof(cpu_set_t), &cpuset);
if (s != 0) {
perror( "pthread_setaffinity_np");
exit_fun("Error setting processor affinity");
}
LOG_I(HW, "Setting the affinity of main function to CPU 0, for device library to use CPU 0 only!\n");
LOG_I(HW, "Setting the affinity of main function to all CPUs, for device library to use CPU 0 only!\n");
}
#endif
......
......@@ -152,12 +152,6 @@
{"external-clock", CONFIG_HLP_EXCCLK, PARAMFLAG_BOOL, uptr:&clock_source, defintval:0, TYPE_INT, 0}, \
{"wait-for-sync", NULL, PARAMFLAG_BOOL, iptr:&wait_for_sync, defintval:0, TYPE_INT, 0}, \
{"single-thread-disable", CONFIG_HLP_NOSNGLT, PARAMFLAG_BOOL, iptr:&single_thread_flag, defintval:1, TYPE_INT, 0}, \
{"threadIQ", NULL, 0, iptr:&(threads.iq), defintval:1, TYPE_INT, 0}, \
{"threadOneSubframe", NULL, 0, iptr:&(threads.one), defintval:1, TYPE_INT, 0}, \
{"threadTwoSubframe", NULL, 0, iptr:&(threads.two), defintval:1, TYPE_INT, 0}, \
{"threadThreeSubframe", NULL, 0, iptr:&(threads.three), defintval:1, TYPE_INT, 0}, \
{"threadSlot1ProcOne", NULL, 0, iptr:&(threads.slot1_proc_one), defintval:1, TYPE_INT, 0}, \
{"threadSlot1ProcTwo", NULL, 0, iptr:&(threads.slot1_proc_two), defintval:1, TYPE_INT, 0}, \
{"A" , CONFIG_HLP_TADV, 0, uptr:&timing_advance, defintval:0, TYPE_UINT, 0}, \
{"C" , CONFIG_HLP_DLF, 0, uptr:&(downlink_frequency[0][0]), defuintval:DEFAULT_DLF, TYPE_UINT, 0}, \
{"a" , CONFIG_HLP_CHOFF, 0, iptr:&chain_offset, defintval:0, TYPE_INT, 0}, \
......
......@@ -341,8 +341,8 @@ static void *UE_thread_synch(void *arg) {
cpu_set_t cpuset;
CPU_ZERO(&cpuset);
if ( threads.iq != -1 )
CPU_SET(threads.iq, &cpuset);
if ( threads.sync != -1 )
CPU_SET(threads.sync, &cpuset);
// this thread priority must be lower that the main acquisition thread
sprintf(threadname, "sync UE %d", UE->Mod_id);
init_thread(100000, 500000, FIFO_PRIORITY-1, &cpuset, threadname);
......@@ -673,6 +673,8 @@ static void *UE_thread_rxn_txnp4(void *arg) {
// pickTime(current);
// updateTimes(proc->gotIQs, &t2, 10000, "Delay to wake up UE_Thread_Rx (case 2)");
// Process Rx data for one sub-frame
if (slot_select_nr(&UE->frame_parms, proc->frame_tx, proc->nr_tti_tx) & NR_DOWNLINK_SLOT) {
......@@ -687,8 +689,12 @@ static void *UE_thread_rxn_txnp4(void *arg) {
UE->dcireq.cc_id = 0;
UE->dcireq.frame = proc->frame_rx;
UE->dcireq.slot = proc->nr_tti_rx;
UE->if_inst->dcireq(&UE->dcireq);
nr_ue_dcireq(&UE->dcireq); //to be replaced with function pointer later
NR_UE_MAC_INST_t *UE_mac = get_mac_inst(0);
UE_mac->scheduled_response.dl_config = &UE->dcireq.dl_config_req;
nr_ue_scheduled_response(&UE_mac->scheduled_response);
#ifdef UE_SLOT_PARALLELISATION
phy_procedures_slot_parallelization_nrUE_RX( UE, proc, 0, 0, 1, UE->mode, no_relay, NULL );
#else
......@@ -707,68 +713,17 @@ static void *UE_thread_rxn_txnp4(void *arg) {
// trigger L2 to run ue_scheduler thru IF module
// [TODO] mapping right after NR initial sync
if(1)
if(UE->if_inst != NULL && UE->if_inst->ul_indication != NULL){
UE->ul_indication.module_id = 0;
UE->ul_indication.gNB_index = 0;
UE->ul_indication.cc_id = 0;
UE->ul_indication.slot = 0; // to be fill
UE->ul_indication.frame = 0; // to be fill
// [TODO] mapping right after NR initial sync
UE->ul_indication.frame = proc->frame_rx;
UE->ul_indication.slot = proc->nr_tti_rx;
UE->if_inst->ul_indication(&UE->ul_indication);
}
#ifdef NEW_MAC
ret = mac_xface->ue_scheduler(UE->Mod_id,
proc->frame_rx,
proc->subframe_rx,
proc->nr_tti_rx,
proc->frame_tx,
proc->subframe_tx,
proc->nr_tti_tx%(UE->frame_parms.ttis_per_subframe),
#ifndef NO_RAT_NR
slot_select_nr(&UE->frame_parms, proc->frame_tx, proc->nr_tti_tx),
#else
subframe_select(&UE->frame_parms,proc->subframe_tx),
#endif
0,
0/*FIXME CC_id*/);
#endif
/*#else
ret = mac_xface->ue_scheduler(UE->Mod_id,
proc->frame_rx,
proc->subframe_rx,
proc->frame_tx,
proc->subframe_tx,
subframe_select(&UE->frame_parms,proc->subframe_tx),
0, */
// 0/*FIXME CC_id*/);
//#endif
if ( ret != CONNECTION_OK) {
char *txt;
switch (ret) {
case CONNECTION_LOST:
txt="RRC Connection lost, returning to PRACH";
break;
case PHY_RESYNCH:
txt="RRC Connection lost, trying to resynch";
break;
case RESYNCH:
txt="return to PRACH and perform a contention-free access";
break;
default:
txt="UNKNOWN RETURN CODE";
};
LOG_E( PHY, "[UE %"PRIu8"] Frame %"PRIu32", subframe %u %s\n",
UE->Mod_id, proc->frame_rx, proc->subframe_tx,txt );
}
}
}
#if UE_TIMING_TRACE
stop_meas(&UE->generic_stat);
#endif
......@@ -842,15 +797,15 @@ void *UE_thread(void *arg) {
cpu_set_t cpuset;
CPU_ZERO(&cpuset);
if ( threads.iq != -1 )
CPU_SET(threads.iq, &cpuset);
init_thread(100000, 500000, FIFO_PRIORITY, &cpuset,
"UHD Threads");
if ( threads.main != -1 )
CPU_SET(threads.main, &cpuset);
sprintf(threadname, "Main UE %d", UE->Mod_id);
init_thread(100000, 500000, FIFO_PRIORITY, &cpuset,threadname);
if ((oaisim_flag == 0) && (UE->mode !=loop_through_memory))
AssertFatal(0== openair0_device_load(&(UE->rfdevice), &openair0_cfg[0]), "");
UE->rfdevice.host_type = RAU_HOST;
sprintf(threadname, "Main UE %d", UE->Mod_id);
pthread_setname_np(pthread_self(), threadname);
init_UE_threads(UE);
#ifdef NAS_UE
......@@ -1132,23 +1087,41 @@ void *UE_thread(void *arg) {
proc->nr_tti_tx %= NR_NUMBER_OF_SUBFRAMES_PER_FRAME;
}
proc->subframe_tx=proc->nr_tti_tx;
printf("Processing subframe %d\n",proc->subframe_rx);
if (slot_select_nr(&UE->frame_parms, proc->frame_tx, proc->nr_tti_tx) & NR_DOWNLINK_SLOT) {
//clean previous FAPI MESSAGE
UE->rx_ind.number_pdus = 0;
UE->dci_ind.number_of_dcis = 0;
//clean previous FAPI MESSAGE
// call L2 for DL_CONFIG (DCI)
UE->dcireq.module_id = UE->Mod_id;
UE->dcireq.gNB_index = 0;
UE->dcireq.cc_id = 0;
UE->dcireq.frame = proc->frame_rx;
UE->dcireq.slot = proc->nr_tti_rx;
nr_ue_dcireq(&UE->dcireq); //to be replaced with function pointer later
NR_UE_MAC_INST_t *UE_mac = get_mac_inst(0);
UE_mac->scheduled_response.dl_config = &UE->dcireq.dl_config_req;
nr_ue_scheduled_response(&UE_mac->scheduled_response);
printf("Processing subframe %d\n",proc->subframe_rx);
phy_procedures_nrUE_RX( UE, proc, 0, 1, UE->mode);
}
if(UE->if_inst != NULL && UE->if_inst->ul_indication != NULL){
UE->ul_indication.module_id = 0;
UE->ul_indication.gNB_index = 0;
UE->ul_indication.cc_id = 0;
UE->ul_indication.slot = 0; // to be fill
UE->ul_indication.frame = 0; // to be fill
// [TODO] mapping right after NR initial sync
UE->ul_indication.frame = proc->frame_rx;
UE->ul_indication.slot = proc->nr_tti_rx;
UE->if_inst->ul_indication(&UE->ul_indication);
}
phy_procedures_nrUE_RX( UE, proc, 0, 1, UE->mode);
getchar();
} // else loop_through_memory
} // start_rx_stream==1
......
......@@ -268,7 +268,8 @@ char uecap_xer[1024],uecap_xer_in=0;
int oaisim_flag=0;
int emulate_rf = 0;
threads_t threads= {-1,-1,-1,-1,-1,-1,-1,-1,-1,-1,-1,-1,-1};
threads_t threads = {-1,-1,-1,-1,-1,-1,-1,-1};
int threads_offset = 0;
char* usrp_args=NULL;
char* usrp_clksrc=NULL;
......@@ -1027,8 +1028,25 @@ int main( int argc, char **argv ) {
//dump_frame_parms(frame_parms[0]);
init_openair0();
// default threads.main = 2
// if there are enough processors, all others on subsequent CPUs
if (threads_offset>0) {
if (threads_offset+8<=get_nprocs()) {
if (threads.main<0) threads.main=threads_offset+1;
if (threads.sync<0) threads.sync=threads_offset+2;
if (threads.one<0) threads.one=threads_offset+3;
if (threads.two<0) threads.two=threads_offset+4;
if (threads.three<0) threads.three=threads_offset+5;
if (threads.slot1_proc_one<0) threads.slot1_proc_one=threads_offset+6;
if (threads.slot1_proc_two<0) threads.slot1_proc_two=threads_offset+7;
if (threads.slot1_proc_three<0) threads.slot1_proc_three=threads_offset+8;
}
else {
LOG_E(HW,"Not enough CPUs available (nprocs (=%d) >= threadmain (=%d) + 10)\n",get_nprocs(),threads_offset);
exit_fun("Error setting thread affinity\n");
}
}
#ifndef DEADLINE_SCHEDULER
......@@ -1039,14 +1057,17 @@ int main( int argc, char **argv ) {
char cpu_affinity[1024];
CPU_ZERO(&cpuset);
#ifdef CPU_AFFINITY
if (get_nprocs() > 2) {
CPU_SET(0, &cpuset);
int j;
if (get_nprocs()>=2) {
for (j = 2; j < get_nprocs(); j++)
CPU_SET(j, &cpuset);
s = pthread_setaffinity_np(pthread_self(), sizeof(cpu_set_t), &cpuset);
if (s != 0) {
perror( "pthread_setaffinity_np");
exit_fun("Error setting processor affinity");
}
LOG_I(HW, "Setting the affinity of main function to CPU 0, for device library to use CPU 0 only!\n");
LOG_I(HW, "Setting the affinity of main function to all CPUs, for device library to use CPU 0 only!\n");
}
#endif
......
......@@ -157,13 +157,16 @@
{"external-clock", CONFIG_HLP_EXCCLK, PARAMFLAG_BOOL, uptr:&clock_source, defintval:0, TYPE_INT, 0}, \
{"wait-for-sync", NULL, PARAMFLAG_BOOL, iptr:&wait_for_sync, defintval:0, TYPE_INT, 0}, \
{"single-thread-disable", CONFIG_HLP_NOSNGLT, PARAMFLAG_BOOL, iptr:&single_thread_flag, defintval:1, TYPE_INT, 0}, \
{"threadIQ", NULL, 0, iptr:&(threads.iq), defintval:1, TYPE_INT, 0}, \
{"threadOneSubframe", NULL, 0, iptr:&(threads.one), defintval:1, TYPE_INT, 0}, \
{"threadTwoSubframe", NULL, 0, iptr:&(threads.two), defintval:1, TYPE_INT, 0}, \
{"threadThreeSubframe", NULL, 0, iptr:&(threads.three), defintval:1, TYPE_INT, 0}, \
{"threadSlot1ProcOne", NULL, 0, iptr:&(threads.slot1_proc_one), defintval:1, TYPE_INT, 0}, \
{"threadSlot1ProcTwo", NULL, 0, iptr:&(threads.slot1_proc_two), defintval:1, TYPE_INT, 0}, \
{"nr_dlsch-demod-shift", CONFIG_HLP_DLSHIFT, 0, iptr:(int32_t *)&nr_dlsch_demod_shift, defintval:0, TYPE_INT, 0}, \
{"threadoffset", NULL, 0, iptr:&(threads_offset), defintval:0, TYPE_INT, 0}, \
{"threadMain", NULL, 0, iptr:&(threads.main), defintval:-1, TYPE_INT, 0}, \
{"threadSync", NULL, 0, iptr:&(threads.sync), defintval:-1, TYPE_INT, 0}, \
{"threadOneSubframe", NULL, 0, iptr:&(threads.one), defintval:-1, TYPE_INT, 0}, \
{"threadTwoSubframe", NULL, 0, iptr:&(threads.two), defintval:-1, TYPE_INT, 0}, \
{"threadThreeSubframe", NULL, 0, iptr:&(threads.three), defintval:-1, TYPE_INT, 0}, \
{"threadSlot1ProcOne", NULL, 0, iptr:&(threads.slot1_proc_one), defintval:-1, TYPE_INT, 0}, \
{"threadSlot1ProcTwo", NULL, 0, iptr:&(threads.slot1_proc_two), defintval:-1, TYPE_INT, 0}, \
{"threadSlot1ProcThree", NULL, 0, iptr:&(threads.slot1_proc_three), defintval:-1, TYPE_INT, 0}, \
{"nr-dlsch-demod-shift", CONFIG_HLP_DLSHIFT, 0, iptr:(int32_t *)&nr_dlsch_demod_shift, defintval:0, TYPE_INT, 0}, \
{"A" , CONFIG_HLP_TADV, 0, uptr:&timing_advance, defintval:0, TYPE_UINT, 0}, \
{"C" , CONFIG_HLP_DLF, 0, uptr:&(downlink_frequency[0][0]), defuintval:2680000000, TYPE_UINT, 0}, \
{"a" , CONFIG_HLP_CHOFF, 0, iptr:&chain_offset, defintval:0, TYPE_INT, 0}, \
......
......@@ -294,20 +294,20 @@ void thread_top_init(char *thread_name,
char cpu_affinity[1024];
cpu_set_t cpuset;
/* Set affinity mask to include CPUs 1 to MAX_CPUS */
/* Set affinity mask to include CPUs 2 to MAX_CPUS */
/* CPU 0 is reserved for UHD threads */
/* CPU 1 is reserved for all RX_TX threads */
/* Enable CPU Affinity only if number of CPUs >2 */
/* Enable CPU Affinity only if number of CPUs > 2 */
CPU_ZERO(&cpuset);
#ifdef CPU_AFFINITY
if (get_nprocs() > 2)
if (affinity == 0) {
LOG_W(HW,"thread_top_init() called with affinity==0, but overruled by #ifdef CPU_AFFINITY\n");
}
else if (get_nprocs() > 2)
{
if (affinity == 0)
CPU_SET(0,&cpuset);
else
for (j = 1; j < get_nprocs(); j++)
CPU_SET(j, &cpuset);
for (j = 2; j < get_nprocs(); j++)
CPU_SET(j, &cpuset);
s = pthread_setaffinity_np(pthread_self(), sizeof(cpu_set_t), &cpuset);
if (s != 0)
{
......@@ -315,21 +315,29 @@ void thread_top_init(char *thread_name,
exit_fun("Error setting processor affinity");
}
}
#else //CPU_AFFINITY
if (affinity) {
LOG_W(HW,"thread_top_init() called with affinity>0, but overruled by #ifndef CPU_AFFINITY.\n");
}
#endif //CPU_AFFINITY
/* Check the actual affinity mask assigned to the thread */
s = pthread_getaffinity_np(pthread_self(), sizeof(cpu_set_t), &cpuset);
if (s != 0) {
if (s != 0)
{
perror( "pthread_getaffinity_np");
exit_fun("Error getting processor affinity ");
}
memset(cpu_affinity,0,sizeof(cpu_affinity));
for (j = 0; j < 1024; j++)
if (CPU_ISSET(j, &cpuset)) {
{
if (CPU_ISSET(j, &cpuset))
{
char temp[1024];
sprintf (temp, " CPU_%d", j);
strcat(cpu_affinity, temp);
}
}
memset(&sparam, 0, sizeof(sparam));
sparam.sched_priority = sched_get_priority_max(SCHED_FIFO);
......
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