Commit 79c8d932 authored by Guy De Souza's avatar Guy De Souza

ceil/round macros- TBS calculation corrections

parent 4e485019
develop 1 128-ues 256_QAM_demod 408-reworked 408-ue-main-threads 445-LDPC-implementation-on-GPU 459-pusch-based-ta-updates 464-ru_beamforming_in_gpu 464-ru_beamforming_in_gpu-CPUsubfunction 472-add-pusch-dmrs-modes 481-ldpc-decoder-on-gpu 5g_fapi_scf LTE_TRX_on_single_port NCTU_CS_ISIP NCTU_CS_ISIP_CPU NCTU_CS_ISIP_GPU NCTU_OpinConnect_LDPC NR-PHY-MAC-IF-multi-UE NRUE_usedlschparallel NR_10MHz NR_CSI_reporting NR_DCI_01 NR_DLUL_PF NR_DLUL_PF_4UL NR_DLUL_PF_rebased NR_DL_MIMO NR_DL_sched_fixes NR_DL_scheduler NR_FAPI_beamindex_SSB_RO NR_FDD_FIX NR_FR2_RA NR_FR2_RRC_SSB NR_MAC_CE_GlobalEdge NR_MAC_Multi_Rach_GlobalEdge NR_MAC_SSB_RO_GlobalEdge NR_MAC_SSB_RO_UE_IDCC NR_MAC_SSB_RO_merge NR_MAC_TCI_UCI_GlobalEdge NR_NGAP NR_PDCP_noS1 NR_PUCCH_MultiUE NR_RA_cleanup NR_RA_updates NR_RRCConfiguragion_FR2 NR_RRCConfiguration NR_RRCConfiguration_FR2 NR_RRCConfiguration_S1U NR_RRCConfiguration_merge_develop NR_RRCConfiguration_sync_source NR_RRCConfiguration_trx_thread NR_RRC_CP_bugfix NR_RRC_PDCP NR_RRC_PRACH_procedures NR_RRC_PRACH_procedures_todevelop NR_RRC_PUSCH NR_RRC_TA NR_RRC_X2AP_AMBR_Change_Global_edge NR_RRC_X2AP_RemoveHardcodings_GlobalEdge NR_RRC_config_simplified NR_RRC_harq NR_RRC_harq_b NR_RRC_harq_hacks NR_RRC_harq_newdcipdu NR_SA_F1AP_RFSIMULATOR NR_SA_F1AP_RFSIMULATOR2 NR_SA_F1AP_dev NR_SA_NGAP_RRC NR_SA_NGAP_RRC_wk42 NR_SA_itti_sim_wk48 NR_SA_itti_sim_wk48_hs NR_SA_itti_sim_wk48_hs1 NR_SCHED NR_SCHED_HARQ NR_SCHED_PDCCH_PUCCH_HARQ NR_SCHED_PDCCH_PUCCH_HARQ_rebased NR_SCHED_fixes NR_SRB_Config NR_TRX_on_single_port NR_TRX_on_single_port2 NR_UE_MAC_scheduler NR_UE_RA_fixes NR_UE_UL_DCI_improvements NR_UE_dlsch_bugfix NR_UE_enable_parallelization NR_UE_stability_fixes NR_UL_FAPI_programming NR_UL_scheduler NR_UL_scheduler_rebased NR_UL_scheduling NR_Wireshark NR_beam_simulation NR_beamforming_test NR_gNB_SCF_Indication NR_ipaccess_testing NR_mac_uci_functions_rework NR_msg2_phytest NR_scheduling_CSIRS NR_scheduling_request NR_scheduling_request2 NR_scheduling_request3 NR_test_S1U_RRC_PRACH_procedures NR_ue_dlsch_dmrs_cdm OpInConnect_ISIP PUSCH_TA_update RA_CI_test UE_DL_DCI_hotfix addoptions_nr_USRPdevice bch-fixes-bitmap benetel_5g_prach_fix benetel_driver_uldl_pf_merge benetel_driver_update benetel_phase_rotation benetel_phase_rotation_old bugfix-minor-remove-wrong-log bugfix-nr-bands bugfix-nr-ldpc-post-processing bugfix-nr-ldpc-size-typo bugfix-nr-pdcp-sn-size bugfix-nr-rate-matching-assertion bugfix-x2-SgNBAdditionRequest bupt-sa-merge cce_indexing_fix cce_indexing_fix2 ci-deploy-asterix ci-deploy-docker-compose ci-rd-july-improvements ci-test ci-ul-iperf-from-trf-container clean-5G-scope-round2 cleanup_softmodem_main constant_power debug_branch_init_sync develop-SA-RA develop-SnT develop-ci develop-nr develop-nr-fr2 develop-nr-fr2-rework develop-nr_cppcheck develop-oriecpriupdates develop-sib1 develop-sib1-local develop-sib1-lts develop-sib1-update develop-sib1-update-test1 develop-sib1-update-ue develop_inria_ci_deployment develop_inria_ci_deployment_gp develop_integration_2020_w15 develop_integration_2020_w19 develop_integration_w08 develop_stable dfts_alternatives dlsch-all-dlslots dlsch_encode_mthread dlsch_parallel docupdate_tools dongzhanyi-zte-develop dongzhanyi-zte-develop2 dreibh/apt-auth-fix dreibh/device-load-fix dreibh/device-load-fix-develop-branch dual-connectivity edrx extend_sharedlibusage extend_sharedlibusage2 fapi_for_dmrs_and_ptrs feat-mac-sock feature-4g-sched feature-nr-4g-nfapi-modifications feature-support-clang-format feature/make-s1-mme-port-configurable feature/make-s1-mme-port-configurable-with-astyle-fixes fembms-enb-ue finalize-oaicn-integration firas fix-ci-tun fix-clock-source fix-itti-segv fix-l2-sim fix-limeSDR-compile fix-softmodem-restart fix-warnings fix_NR_DLUL_PF fix_do_ra_data fix_pdsch_low_prb fix_rfsim_mimo fix_rrc_x2_ticking fixes-CE-RLC-PDU-size fixes-mac-sched-nfapi fixes-mac-sched-tun fixes-tun flexran-apps flexran-improvements flexran-repair-mme-mgmt fr2-hw-test fujitsu_lte_contribution fujitsu_lte_contribution-128 gNB-nrUE-USRP generate_push_ptrs gnb-only-test harq-hotfix hotfix-minor-remove-nr-rlc-cppcheck-error hotfix-nr-rlc-tick hotfix-ocp-executable hotfix-ue-musim-compilation hotfix_usrp_lib improve_build_nr_lte_merge improve_nr_modulation improve_ue_stability integration-develop-nr-2019w45 integration_2020_wk40 integration_2020_wk41 integration_2020_wk42_2 integration_2020_wk45 integration_2020_wk45_2 integration_2020_wk46 integration_2020_wk46_2 integration_2020_wk47 integration_2020_wk48 integration_2020_wk48_2 integration_2020_wk49 integration_2020_wk50 integration_2020_wk50_1 integration_2020_wk51 integration_2020_wk51_2 integration_2021_wk02 integration_2021_wk02_wMR988 integration_2021_wk04 integration_2021_wk05 inter-RRU-final inter-RRU-nr inter-RRU-oairu inter-rru-UE interoperability-test isip_nr itti-enhancement l2-fixes ldpc-dec-layering ldpc-decoder-codegen ldpc-decoder-codegen2 ldpc-decoder-improvements ldpc-offload ldpc_short_codeword_fixes load_gnb lte-ulsch-bugfix lte_uplink_improvement mac-fixes-wk45_2 mbms-fix-develop-nr merging-2019-w51-to-develop-nr minor-fix-doc-basic-sim mosaic5g-oai-ran mosaic5g-oai-sim nasmesh_kernel_5.8 new-gtpu new_rlc_2020 nfapi-bugfix nfapi_nr_develop ngap-dlul ngap-support ngap-w48-merge2 ngap-wf ngap-wf-1120 ngap-wf-1120-srb ngap-wf-1120-srb-gtp ngap-wf-1120-srb-gtp-hs ngap-wf-1120-srb-gtp-hs1 ngap-wf-1120-srb-gtp-hs2 ngap-wf-1120-srb-gtp-yhz ngap-wf-1203-yunsdr ngap-wf-liuyu ngap_lfq_1120 ngap_merge noCore nr-coreset-bug-fix nr-dlsch-multi-thread nr-dlsch-thread nr-dual-connectivity nr-interdigital-test nr-ip-uplink-noS1 nr-mac-pdu-wireshark nr-mac-remove-ue-list nr-multiple-ssb nr-pdcp nr-pdsch-extraction-bugfix nr-physim-update nr-rlc-am-bugfix-w44 nr-rlc-bugfix-w44 nr-ssb-measurements nr-timing-measurement nr-timing-measurement-merge nr-ue-buffer-status nr-ue-slot-based nr-uldci nrUE nrUE-hs nrUE-upper-layer nr_beamforming nr_bsr nr_ci_dlsim nr_csi_newbranch nr_demo_wsa2019 nr_dl_dmrs_type2 nr_dl_pf nr_dl_pf2 nr_dl_ul_ptrs nr_dlsch_parallel_measurements nr_dlsim_plot nr_fapi_for_push_tmp nr_fdd_if_fix nr_fix_easycppcheck nr_flexible_NRBDL nr_improve_build_procedures nr_increase_tp nr_pdcch_testing nr_pdcch_updates nr_pdsch_integration nr_polar_decoder_improvement nr_prach nr_prach_fr2 nr_pucch nr_pucch2 nr_segmentation_fixes nr_sim_fix nr_tdd_configuration nr_ue_msg3 nr_ue_tti_cleanup nr_ul_pf nr_ul_scfdma nr_vcd nrue-multi-thread nrue_msg2_reception nsa-ue nsa_remove_band_hardcodings oai-sim oai-ubuntu-docker oai-ubuntu-docker-for-lmssdr oairu oairu-dockerfile-support oc-docker-october-improvements openxg/develop pdcp-benchmark pdsch-ch-est polar8 ptrs_rrc_config pusch-mthread-scaling-fix pusch-retrans-fix-ue ra-dl-ul reduce_memory_footprint remove-ci-workaround remove_nos1_hack_pdcp remove_x2_gnb_hardcoding repair-TA revert-f5c94279 revert_memcpy rh-ci-add-ue-parallelization rh_ci_fix_autoterminate rh_ci_fr1_update rh_ci_oc rh_ci_py rh_ci_ra_fr2 rh_ci_rfsim_ra rh_ci_ue_parallel rh_doc_update_3 rh_fr1_newjenkins rh_fr1_update rh_gnb_compile_fix rh_wk50_debug rlc-v2-bugfix-status-reporting rlc-v2-tick rlc_v2_coverity_fixes rrc-enb-phy-testmode ru-parallel-beamforming runel runel-reverse-test s1-subnormal_rewrite s1_subnormal s1_subnormal-robert s1ap-bugfix-rab_setup sa-demo sa-merge-rrc-srb sa-msg4 sa-msg4-rrc sa-msg4-rrc-yihz sa-msg4-rrc-yihz-hs sa_rrc_yihz small-bugfixes-w40 small-config-change smallcleanup softmodem_cleanup split73 test-x310-perf testing_2symb_pdcch testing_with_external_txdata thread-pool tools_5Gadapt tp-ota-test trx_thread_param trx_write_thread ue-csi ue-fixes ue-fixes-ota ue-updates-runel-test ue_adjust_gain ue_beam_selection ue_dlsch-multi-threading ue_dlsch_decoding_ldpc_offload ue_nfapi_mch uhd_priority_set_cleanup ul-freq-iq-samps-to-file ul_dl_dci_same_slot ul_harq ulsch_decode_mthread ulsim_changes update-to-2019-march-june-release usrp_fix_adc_shift_and_pps_sync usrp_gpio_test wireshark-T-hack-ueid wireshark-log-scheduling-requests x2-endc-processing xiangwab xiangwan yihongzheng_srb zzs 2021.w04 2021.w02 2020.w51_2 2020.w51 2020.w50 2020.w49 2020.w48_2 2020.w48 2020.w47 2020.w46_2 2020.w46 2020.w45_2 2020.w45 2020.w44 2020.w42_2 2020.w42 2020.w41 2020.w39 2020.w38 2020.w37 2020.w36 2020.w34 2020.w33 2020.w31 2020.w30 2020.w29 2020.w28 2020.w26 2020.w25 2020.w24 2020.w23 2020.w22 2020.w19 2020.w17 2020.w16 2020.w15 2020.w11 2020.w09 2020.w06 2020.w05 2020.w04 2020.w03 osa-etsi-ws-ue osa-etsi-ws-try2 osa-etsi-ws-try1 osa-etsi-ws-gNB nr-ip-over-lte nr-ip-over-lte-v.1.5 nr-ip-over-lte-v.1.4 nr-ip-over-lte-v.1.3 nr-ip-over-lte-v.1.2 nr-ip-over-lte-v.1.1 nr-ip-over-lte-v.1.0 develop-nr-pdcch develop-nr-2020w03 develop-nr-2020w02 develop-nr-2019w51 develop-nr-2019w50 develop-nr-2019w48 develop-nr-2019w47 develop-nr-2019w45 develop-nr-2019w43 develop-nr-2019w42 develop-nr-2019w40 develop-nr-2019w28 develop-nr-2019w23 benetel_phase_rotation
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...@@ -508,8 +508,8 @@ typedef struct { ...@@ -508,8 +508,8 @@ typedef struct {
uint8_t S; uint8_t S;
uint8_t L; uint8_t L;
uint8_t Imcs; uint8_t Imcs;
uint8_t n_codewords; uint8_t nb_codewords;
uint8_t n_layers; uint8_t nb_layers;
/*uint8_t R; /*uint8_t R;
uint8_t Qm; uint8_t Qm;
uint16_t TBS; uint16_t TBS;
......
...@@ -35,6 +35,9 @@ ...@@ -35,6 +35,9 @@
#define DEBUG_DLSCH #define DEBUG_DLSCH
uint8_t mod_order[5] = {1, 2, 4, 6, 8};
uint16_t mod_offset[5] = {1,3,7,23,87};
void nr_pdsch_codeword_scrambling(uint32_t *in, void nr_pdsch_codeword_scrambling(uint32_t *in,
uint8_t size, uint8_t size,
uint8_t q, uint8_t q,
...@@ -189,11 +192,11 @@ uint8_t nr_generate_pdsch(NR_gNB_DLSCH_t dlsch, ...@@ -189,11 +192,11 @@ uint8_t nr_generate_pdsch(NR_gNB_DLSCH_t dlsch,
NR_DL_gNB_HARQ_t *harq = dlsch.harq_processes[dci_alloc.harq_pid]; NR_DL_gNB_HARQ_t *harq = dlsch.harq_processes[dci_alloc.harq_pid];
nfapi_nr_dl_config_dlsch_pdu_rel15_t *rel15 = &harq->dlsch_pdu.dlsch_pdu_rel15; nfapi_nr_dl_config_dlsch_pdu_rel15_t *rel15 = &harq->dlsch_pdu.dlsch_pdu_rel15;
nfapi_nr_dl_config_pdcch_parameters_rel15_t pdcch_params = dci_alloc.pdcch_params; nfapi_nr_dl_config_pdcch_parameters_rel15_t pdcch_params = dci_alloc.pdcch_params;
uint32_t scrambled_output[NR_MAX_NB_CODEWORDS][NR_MAX_PDSCH_ENCODED_LENGTH]={0}; uint32_t scrambled_output[NR_MAX_NB_CODEWORDS][NR_MAX_PDSCH_ENCODED_LENGTH];
uint16_t mod_symbs[NR_MAX_NB_CODEWORDS][NR_MAX_PDSCH_ENCODED_LENGTH>>1] = {0}; int16_t mod_symbs[NR_MAX_NB_CODEWORDS][NR_MAX_PDSCH_ENCODED_LENGTH>>1];
uint16_t tx_layers[NR_MAX_NB_LAYERS][NR_MAX_PDSCH_ENCODED_LENGTH>>1]; uint16_t tx_layers[NR_MAX_NB_LAYERS][NR_MAX_PDSCH_ENCODED_LENGTH>>1];
uint16_t n_symbs[NR_MAX_NB_CODEWORDS] = {0}; uint16_t n_symbs[NR_MAX_NB_CODEWORDS];
int8_t Wf[2], Wt[2], l0[2], delta; int8_t Wf[2], Wt[2], l0, delta;
/// CRC, coding, interleaving and rate matching /// CRC, coding, interleaving and rate matching
...@@ -229,9 +232,9 @@ uint8_t nr_generate_pdsch(NR_gNB_DLSCH_t dlsch, ...@@ -229,9 +232,9 @@ uint8_t nr_generate_pdsch(NR_gNB_DLSCH_t dlsch,
/// DMRS QPSK modulation /// DMRS QPSK modulation
uint16_t n_dmrs = rel15->n_prb<<1; uint16_t n_dmrs = rel15->n_prb<<1;
uint16_t mod_dmrs[n_dmrs<<1] = {0}; int16_t mod_dmrs[n_dmrs<<1];
uint8_t dmrs_type = config.pdsch_config.dmrs_type.value; uint8_t dmrs_type = config.pdsch_config.dmrs_type.value;
nr_modulation(pdsch_dmrs, n_dmrs, QPSK, mod_dmrs); nr_modulation(pdsch_dmrs, n_dmrs, MOD_QPSK, mod_dmrs);
/// Resource mapping /// Resource mapping
AssertFatal(harq->Nl<=config.rf_config.tx_antenna_ports.value, "Not enough Tx antennas (%d) for %d layers\n",\ AssertFatal(harq->Nl<=config.rf_config.tx_antenna_ports.value, "Not enough Tx antennas (%d) for %d layers\n",\
...@@ -245,8 +248,8 @@ uint8_t nr_generate_pdsch(NR_gNB_DLSCH_t dlsch, ...@@ -245,8 +248,8 @@ uint8_t nr_generate_pdsch(NR_gNB_DLSCH_t dlsch,
for (int ap=0; ap<rel15->nb_layers; ap++) { for (int ap=0; ap<rel15->nb_layers; ap++) {
// DMRS params for this ap // DMRS params for this ap
Wt = get_Wt(ap, dmrs_type); get_Wt(Wt, ap, dmrs_type);
Wf = get_Wf(ap, dmrs_type); get_Wf(Wf, ap, dmrs_type);
l0 = get_l0(0, config.pdsch_config.dmrs_typeA_position.value); l0 = get_l0(0, config.pdsch_config.dmrs_typeA_position.value);
delta = get_delta(ap, dmrs_type); delta = get_delta(ap, dmrs_type);
uint8_t k_prime=0, n=0, dmrs_idx=0; uint8_t k_prime=0, n=0, dmrs_idx=0;
...@@ -258,11 +261,12 @@ uint8_t nr_generate_pdsch(NR_gNB_DLSCH_t dlsch, ...@@ -258,11 +261,12 @@ uint8_t nr_generate_pdsch(NR_gNB_DLSCH_t dlsch,
k -= frame_parms.ofdm_symbol_size; k -= frame_parms.ofdm_symbol_size;
if ((l==l0) && (k == ((dmrs_type)? (6*n+k_prime+delta):((n<<2)+(k_prime<<1)+delta)))) { if ((l==l0) && (k == ((dmrs_type)? (6*n+k_prime+delta):((n<<2)+(k_prime<<1)+delta)))) {
((int16_t*)txdataF[ap])[(l*frame_parms.ofdm_symbol_size + k)<<1] = (Wt*Wf*amp*mod_dmrs[dmrs_idx<<1]) >> 15; ((int16_t*)txdataF[ap])[(l*frame_parms.ofdm_symbol_size + k)<<1] = (Wt[k_prime]*Wf[k_prime]*amp*mod_dmrs[dmrs_idx<<1]) >> 15;
((int16_t*)txdataF[ap])[((l*frame_parms.ofdm_symbol_size + k)<<1) + 1] = (Wt*Wf*amp*mod_dmrs[(dmrs_idx<<1) + 1]) >> 15; ((int16_t*)txdataF[ap])[((l*frame_parms.ofdm_symbol_size + k)<<1) + 1] = (Wt[k_prime]*Wf[k_prime]*amp*mod_dmrs[(dmrs_idx<<1) + 1]) >> 15;
mod_dmrs++; dmrs_idx++;
n++; n++;
k_prime = (++k_prime)&1; k_prime++;
k_prime&=1;
} }
((int16_t*)txdataF[ap])[(l*frame_parms.ofdm_symbol_size + k)<<1] = (amp * tx_layers[ap][m<<1]) >> 15; ((int16_t*)txdataF[ap])[(l*frame_parms.ofdm_symbol_size + k)<<1] = (amp * tx_layers[ap][m<<1]) >> 15;
......
...@@ -56,9 +56,10 @@ uint8_t nr_get_Qm(uint8_t Imcs, uint8_t table_idx); ...@@ -56,9 +56,10 @@ uint8_t nr_get_Qm(uint8_t Imcs, uint8_t table_idx);
uint32_t nr_get_code_rate(uint8_t Imcs, uint8_t table_idx); uint32_t nr_get_code_rate(uint8_t Imcs, uint8_t table_idx);
void nr_get_tbs(nfapi_nr_dl_config_dlsch_pdu *dlsch_pdu, void nr_get_tbs(NR_gNB_DLSCH_t *dlsch,
nfapi_nr_dl_config_dci_dl_pdu dci_pdu, nfapi_nr_dl_config_dci_dl_pdu dci_pdu,
nfapi_nr_config_request_t config); nfapi_nr_config_request_t config,
uint8_t harq_pid);
void nr_pdsch_codeword_scrambling(uint32_t *in, void nr_pdsch_codeword_scrambling(uint32_t *in,
uint8_t size, uint8_t size,
......
...@@ -33,8 +33,6 @@ ...@@ -33,8 +33,6 @@
#include "nr_sch_dmrs.h" #include "nr_sch_dmrs.h"
/*Table 7.4.1.1.2-1 and 7.4.1.1.2-2 38211 Columns: ap - CDM group - Delta - Wf(0) - Wf(1) - Wt(0) - Wt(1)*/ /*Table 7.4.1.1.2-1 and 7.4.1.1.2-2 38211 Columns: ap - CDM group - Delta - Wf(0) - Wf(1) - Wt(0) - Wt(1)*/
int8_t pdsch_dmrs_1[8][7] = {{0,0,0,1,1,1,1}, int8_t pdsch_dmrs_1[8][7] = {{0,0,0,1,1,1,1},
{1,0,0,1,-1,1,1}, {1,0,0,1,-1,1,1},
...@@ -76,24 +74,20 @@ static inline void *get_antenna_ports(uint8_t n_symbs, uint8_t config) { ...@@ -76,24 +74,20 @@ static inline void *get_antenna_ports(uint8_t n_symbs, uint8_t config) {
return ap; return ap;
} }
int8_t *get_Wt(uint8_t ap, uint8_t config) { void get_Wt(int8_t *Wt, uint8_t ap, uint8_t config) {
int8_t *Wt;
for (int i=0; i<2; i++) for (int i=0; i<2; i++)
*(Wt+i)=(config==NFAPI_NR_DMRS_TYPE1)?(pdsch_dmrs_1[ap][3+i]):(pdsch_dmrs_2[ap][3+i]); *(Wt+i)=(config==NFAPI_NR_DMRS_TYPE1)?(pdsch_dmrs_1[ap][3+i]):(pdsch_dmrs_2[ap][3+i]);
return Wt;
} }
int8_t *get_Wf(uint8_t ap, uint8_t config) { void *get_Wf(int8_t *Wf, uint8_t ap, uint8_t config) {
int8_t *Wf;
for (int i=0; i<2; i++) for (int i=0; i<2; i++)
*(Wf+i)=(config==NFAPI_NR_DMRS_TYPE1)?(pdsch_dmrs_1[ap][5+i]):(pdsch_dmrs_2[ap][5+i]); *(Wf+i)=(config==NFAPI_NR_DMRS_TYPE1)?(pdsch_dmrs_1[ap][5+i]):(pdsch_dmrs_2[ap][5+i]);
return Wf;
} }
uint8_t get_delta(uint8_t ap, uint8_t config) { uint8_t get_delta(uint8_t ap, uint8_t config) {
return ((config==NFAPI_NR_DMRS_TYPE1)?(pdsch_dmrs_1[ap][2]):(pdsch_dmrs_2[ap][2])); return ((config==NFAPI_NR_DMRS_TYPE1)?(pdsch_dmrs_1[ap][2]):(pdsch_dmrs_2[ap][2]));
} }
uint8_t *get_l0(uint8_t config, uint8_t dmrs_typeA_position) { uint8_t get_l0(uint8_t config, uint8_t dmrs_typeA_position) {
return ((config==NFAPI_NR_DMRS_TYPE1)?dmrs_typeA_position:0); return ((config==NFAPI_NR_DMRS_TYPE1)?dmrs_typeA_position:0);
} }
...@@ -35,10 +35,10 @@ ...@@ -35,10 +35,10 @@
#define NR_PDSCH_DMRS_ANTENNA_PORT0 1000 #define NR_PDSCH_DMRS_ANTENNA_PORT0 1000
#define NR_PDSCH_DMRS_NB_ANTENNA_PORTS 12 #define NR_PDSCH_DMRS_NB_ANTENNA_PORTS 12
int8_t *get_Wt(uint8_t ap, uint8_t config); void get_Wt(int8_t *Wt, uint8_t ap, uint8_t config);
int8_t *get_Wf(uint8_t ap, uint8_t config); void get_Wf(int8_t *Wf, uint8_t ap, uint8_t config);
uint8_t get_delta(uint8_t ap, uint8_t config); uint8_t get_delta(uint8_t ap, uint8_t config);
uint8_t *get_l0(uint8_t config, uint8_t dmrs_typeA_position); uint8_t get_l0(uint8_t config, uint8_t dmrs_typeA_position);
...@@ -35,9 +35,9 @@ ...@@ -35,9 +35,9 @@
/// Target code rate tables indexed by Imcs /// Target code rate tables indexed by Imcs
uint16_t nr_target_code_rate_table1[29] = {120, 157, 193, 251, 308, 379, 449, 526, 602, 679, 340, 378, 434, 490, 553, \ uint16_t nr_target_code_rate_table1[29] = {120, 157, 193, 251, 308, 379, 449, 526, 602, 679, 340, 378, 434, 490, 553, \
616, 658, 438, 466, 517, 567, 616, 666, 719, 772, 822, 873, 910, 948}; 616, 658, 438, 466, 517, 567, 616, 666, 719, 772, 822, 873, 910, 948};
// The -1 values correspond to non integer factors which are handled differently for indexes 20(682.5) and 26(916.5) // Imcs values 20 and 26 have been multiplied by 2 to avoid the floating point
uint16_t nr_target_code_rate_table2[28] = {120, 193, 308, 449, 602, 378, 434, 490, 553, 616, 658, 466, 517, 567, \ uint16_t nr_target_code_rate_table2[28] = {120, 193, 308, 449, 602, 378, 434, 490, 553, 616, 658, 466, 517, 567, \
616, 666, 719, 772, 822, 873, -1, 711, 754, 797, 841, 885, -1, 948}; 616, 666, 719, 772, 822, 873, 1365, 711, 754, 797, 841, 885, 1833, 948};
uint16_t nr_target_code_rate_table3[29] = {30, 40, 50, 64, 78, 99, 120, 157, 193, 251, 308, 379, 449, 526, 602, 340, \ uint16_t nr_target_code_rate_table3[29] = {30, 40, 50, 64, 78, 99, 120, 157, 193, 251, 308, 379, 449, 526, 602, 340, \
378, 434, 490, 553, 616, 438, 466, 517, 567, 616, 666, 719, 772}; 378, 434, 490, 553, 616, 438, 466, 517, 567, 616, 666, 719, 772};
uint16_t nr_tbs_table[93] = {24, 32, 40, 48, 56, 64, 72, 80, 88, 96, 104, 112, 120, 128, 136, 144, 152, 160, 168, 176, 184, 192, 208, 224, 240, 256, 272, 288, 304, 320, \ uint16_t nr_tbs_table[93] = {24, 32, 40, 48, 56, 64, 72, 80, 88, 96, 104, 112, 120, 128, 136, 144, 152, 160, 168, 176, 184, 192, 208, 224, 240, 256, 272, 288, 304, 320, \
...@@ -67,15 +67,15 @@ uint8_t nr_get_Qm(uint8_t Imcs, uint8_t table_idx) { ...@@ -67,15 +67,15 @@ uint8_t nr_get_Qm(uint8_t Imcs, uint8_t table_idx) {
uint32_t nr_get_code_rate(uint8_t Imcs, uint8_t table_idx) { uint32_t nr_get_code_rate(uint8_t Imcs, uint8_t table_idx) {
switch(table_idx) { switch(table_idx) {
case 1: case 1:
return (nr_target_code_rate_table1[Imcs]<<10); return (nr_target_code_rate_table1[Imcs]);
break; break;
case 2: case 2:
return ((Imcs==20)?0xaaa00 : (Imcs==26)?0xe5200 : nr_target_code_rate_table2[Imcs]<<10); return (nr_target_code_rate_table2[Imcs]);
break; break;
case 3: case 3:
return (nr_target_code_rate_table3[Imcs]<<10); return (nr_target_code_rate_table3[Imcs]);
break; break;
default: default:
...@@ -87,72 +87,79 @@ static inline uint8_t is_codeword_disabled(uint8_t format, uint8_t Imcs, uint8_t ...@@ -87,72 +87,79 @@ static inline uint8_t is_codeword_disabled(uint8_t format, uint8_t Imcs, uint8_t
return ((format==NFAPI_NR_DL_DCI_FORMAT_1_1)&&(Imcs==26)&&(rv==1)); return ((format==NFAPI_NR_DL_DCI_FORMAT_1_1)&&(Imcs==26)&&(rv==1));
} }
static inline uint8_t get_table_idx(uint8_t mcs_table, uint8_t dci_format, uint8_t rnti_type, uint8_t ss_type) {
if ((mcs_table == NFAPI_NR_MCS_TABLE_QAM256) && (dci_format == NFAPI_NR_DL_DCI_FORMAT_1_1) && ((rnti_type==NFAPI_NR_RNTI_C)||(rnti_type==NFAPI_NR_RNTI_CS)))
return 2;
else if ((mcs_table == NFAPI_NR_MCS_TABLE_QAM64_LOW_SE) && (rnti_type!=NFAPI_NR_RNTI_new) && (rnti_type==NFAPI_NR_RNTI_C) && (ss_type==NFAPI_NR_SEARCH_SPACE_TYPE_UE_SPECIFIC))
return 3;
else if (rnti_type==NFAPI_NR_RNTI_new)
return 3;
else if ((mcs_table == NFAPI_NR_MCS_TABLE_QAM256) && (rnti_type==NFAPI_NR_RNTI_CS) && (dci_format == NFAPI_NR_DL_DCI_FORMAT_1_1))
return 2; // Condition mcs_table not configured in sps_config necessary here but not yet implemented
/*else if((mcs_table == NFAPI_NR_MCS_TABLE_QAM64_LOW_SE) && (rnti_type==NFAPI_NR_RNTI_CS))
* table_idx = 3;
* Note: the commented block refers to the case where the mcs_table is from sps_config*/
else
return 1;
}
void nr_get_tbs(NR_gNB_DLSCH_t *dlsch, void nr_get_tbs(NR_gNB_DLSCH_t *dlsch,
nfapi_nr_dl_config_dci_dl_pdu dci_pdu, nfapi_nr_dl_config_dci_dl_pdu dci_pdu,
nfapi_nr_config_request_t config) { nfapi_nr_config_request_t config,
uint8_t N_PRB_DMRS=2; // tmp hardcoding uint8_t harq_pid) {
nfapi_nr_dl_config_dlsch_pdu_rel15_t *dlsch_rel15 = &dlsch->dlsch_pdu.dlsch_pdu_rel15;
nfapi_nr_dl_config_pdcch_parameters_rel15_t params_rel15 = dci_pdu.pdcch_params_rel15; nfapi_nr_dl_config_pdcch_parameters_rel15_t params_rel15 = dci_pdu.pdcch_params_rel15;
NR_DL_gNB_HARQ_t *harq = dlsch->harq_processes[dlsch_rel15->harq_pid]; NR_DL_gNB_HARQ_t *harq = dlsch->harq_processes[harq_pid];
nfapi_nr_dl_config_dlsch_pdu_rel15_t *dlsch_rel15 = &harq->dlsch_pdu.dlsch_pdu_rel15;
uint8_t rnti_type = params_rel15.rnti_type; uint8_t rnti_type = params_rel15.rnti_type;
uint8_t dci_format = params_rel15.dci_format; uint8_t dci_format = params_rel15.dci_format;
uint8_t ss_type = params_rel15.search_space_type; uint8_t ss_type = params_rel15.search_space_type;
uint8_t N_PRB_oh = ((rnti_type==NFAPI_NR_RNTI_SI)||(rnti_type==NFAPI_NR_RNTI_RA)||(rnti_type==NFAPI_NR_RNTI_P))? 0 : \ uint8_t N_PRB_oh = ((rnti_type==NFAPI_NR_RNTI_SI)||(rnti_type==NFAPI_NR_RNTI_RA)||(rnti_type==NFAPI_NR_RNTI_P))? 0 : \
(config.pdsch_config.x_overhead.value); (config.pdsch_config.x_overhead.value);
uint8_t N_PRB_DMRS = (config.pdsch_config.dmrs_type.value == NFAPI_NR_DMRS_TYPE1)?4:6; //This only works for antenna port 1000
uint8_t mcs_table = config.pdsch_config.mcs_table.value; uint8_t mcs_table = config.pdsch_config.mcs_table.value;
uint8_t N_sh_symb = dlsch_rel15->L; uint8_t N_sh_symb = dlsch_rel15->L;
uint8_t Imcs = dlsch_rel15->Imcs; uint8_t Imcs = dlsch_rel15->Imcs;
uint16_t N_prime_RE = NR_NB_SC_PER_RB*N_sh_symb - N_PRB_DMRS - N_PRB_oh; uint16_t N_prime_RE = NR_NB_SC_PER_RB*N_sh_symb - N_PRB_DMRS - N_PRB_oh;
LOG_I(MAC, "N_prime_RE %d for %d symbols %d DMRS per PRB and %d overhead\n", N_prime_RE, N_sh_symb, N_PRB_DMRS, N_PRB_oh); LOG_I(MAC, "N_prime_RE %d for %d symbols %d DMRS per PRB and %d overhead\n", N_prime_RE, N_sh_symb, N_PRB_DMRS, N_PRB_oh);
uint16_t N_RE, N_info, N_info_prime; uint16_t N_RE, Ninfo, Ninfo_prime, C;
uint8_t table_idx, R, Qm, n; uint8_t table_idx, R, Qm, n, scale;
float tmp, C; // temporary N_info_prime in float to avoid back and forth casting to int
table_idx = get_table_idx(mcs_table, dci_format, rnti_type, ss_type);
scale = 10 + (((table_idx==2)&&((Imcs==20)||(Imcs==26)))?1:0);
N_RE = min(156, N_RE)*dlsch_rel15->n_prb; N_RE = min(156, N_RE)*dlsch_rel15->n_prb;
if ((mcs_table == NFAPI_NR_MCS_TABLE_QAM256) && (dci_format == NFAPI_NR_DL_DCI_FORMAT_1_1) && ((rnti_type==NFAPI_NR_RNTI_C)||(rnti_type==NFAPI_NR_RNTI_CS)))
table_idx = 2;
else if ((mcs_table == NFAPI_NR_MCS_TABLE_QAM64_LOW_SE) && (rnti_type!=NFAPI_NR_RNTI_new) && (rnti_type==NFAPI_NR_RNTI_C) && (ss_type==NFAPI_NR_SEARCH_SPACE_TYPE_UE_SPECIFIC))
table_idx = 3;
else if (rnti_type==NFAPI_NR_RNTI_new)
table_idx = 3;
else if ((mcs_table == NFAPI_NR_MCS_TABLE_QAM256) && (rnti_type==NFAPI_NR_RNTI_CS) && (dci_format == NFAPI_NR_DL_DCI_FORMAT_1_1))
table_idx = 2; // Condition mcs_table not configured in sps_config necessary here but not yet implemented
/*else if((mcs_table == NFAPI_NR_MCS_TABLE_QAM64_LOW_SE) && (rnti_type==NFAPI_NR_RNTI_CS))
* table_idx = 3;
* Note: the commented block refers to the case where the mcs_table is from sps_config*/
else
table_idx = 1;
R = nr_get_code_rate(Imcs, table_idx); R = nr_get_code_rate(Imcs, table_idx);
Qm = nr_get_Qm(Imcs, table_idx); Qm = nr_get_Qm(Imcs, table_idx);
N_info = N_RE*R*Qm*harq->Nl; Ninfo = (N_RE*R*Qm*harq->Nl)>>scale;
if (N_info <= 3824) { if (Ninfo <= 3824) {
n = max(3, (uint8_t)(floor(log2(N_info)-6))); n = max(3, (log2(Ninfo)-6));
N_info_prime = max(24, (N_info>>n)<<n); Ninfo_prime = max(24, (Ninfo>>n)<<n);
for (int i=0; i<93; i++) for (int i=0; i<93; i++)
if (nr_tbs_table[i] >= N_info_prime) { if (nr_tbs_table[i] >= Ninfo_prime) {
harq->TBS = nr_tbs_table[i]; harq->TBS = nr_tbs_table[i];
break; break;
} }
} }
else { else {
n = (uint8_t)floor(log2(N_info)-24) - 5; n = log2(Ninfo)-29;
tmp = max(3840, ((uint16_t)round(((float)N_info-24)/(1<<n)))<<n); Ninfo_prime = max(3840, (ROUNDIDIV((Ninfo-24),(1<<n)))<<n);
if (R<0.25) { if (R<256) {
C = ceil((tmp+24)/3816); C = CEILIDIV((Ninfo_prime+24),3816);
harq->TBS = ((uint16_t)(C*ceil((tmp+24)/(8*C))))<<3; harq->TBS = (C*CEILIDIV((Ninfo_prime+24),(C<<3)))<<3;
} }
else { else {
if (tmp>8424) { if (Ninfo_prime>8424) {
C = ceil((tmp+24)/8424); C = CEILIDIV((Ninfo_prime+24),8424);
harq->TBS = ((uint16_t)(C*ceil((tmp+24)/(8*C))))<<3; harq->TBS = (C*CEILIDIV((Ninfo_prime+24),(C<<3)))<<3;
} }
else else
harq->TBS = ((uint16_t)ceil((tmp+24)/8) - 24)<<3; harq->TBS = (CEILIDIV((Ninfo_prime+24),8) - 24)<<3;
} }
} }
LOG_I(MAC, "TBS %d : N_RE %d N_PRB_DMRS %d N_sh_symb %d N_PRB_oh %d Ninfo %d Ninfo_prime %d R %d Qm %d table %d scale %d\n",
harq->TBS, N_RE, N_PRB_DMRS, N_sh_symb, N_PRB_oh, Ninfo, Ninfo_prime, R, Qm, table_idx, scale);
} }
...@@ -102,6 +102,10 @@ ...@@ -102,6 +102,10 @@
#ifdef OCP_FRAMEWORK #ifdef OCP_FRAMEWORK
#include "enums.h" #include "enums.h"
#else #else
#define CEILIDIV(a,b) ((a+b-1)/b)
#define ROUNDIDIV(a,b) (((a<<1)+b)/(b<<1))
typedef enum {TDD=1,FDD=0} lte_frame_type_t; typedef enum {TDD=1,FDD=0} lte_frame_type_t;
typedef enum {EXTENDED=1,NORMAL=0} lte_prefix_type_t; typedef enum {EXTENDED=1,NORMAL=0} lte_prefix_type_t;
......
...@@ -119,11 +119,11 @@ typedef enum { ...@@ -119,11 +119,11 @@ typedef enum {
} nr_frequency_range_e; } nr_frequency_range_e;
typedef enum { typedef enum {
BPSK=0, MOD_BPSK=0,
QPSK, MOD_QPSK,
QAM16, MOD_QAM16,
QAM64, MOD_QAM64,
QAM256 MOD_QAM256
}nr_mod_t; }nr_mod_t;
typedef struct { typedef struct {
......
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