Commit a78b5da5 authored by Florian Kaltenberger's avatar Florian Kaltenberger

fixes an issue with clock source

 - command line paramter --clock-source can only be set at UE (removed this option from gNB)
 - at gNB use clock_source from RU section in config file
 - in both cases if clock_source is present in usrp_args, it will override clock_source
parent ee6b18d3
develop 1 128-ues 256_QAM_demod 459-pusch-based-ta-updates 472-add-pusch-dmrs-modes 481-ldpc-decoder-on-gpu LTE_TRX_on_single_port NCTU_CS_ISIP NCTU_CS_ISIP_CPU NCTU_CS_ISIP_GPU NCTU_OpinConnect_LDPC NR-PHY-MAC-IF-multi-UE NRUE_usedlschparallel NR_10MHz NR_CSI_reporting NR_DCI_01 NR_DLUL_PF NR_DLUL_PF_4UL NR_DLUL_PF_rebased NR_DL_MIMO NR_DL_sched_fixes NR_DL_scheduler NR_FAPI_beamindex_SSB_RO NR_FDD_FIX NR_FR2_RA NR_FR2_RRC_SSB NR_MAC_CE_GlobalEdge NR_MAC_Multi_Rach_GlobalEdge NR_MAC_SSB_RO_GlobalEdge NR_MAC_SSB_RO_UE_IDCC NR_MAC_SSB_RO_merge NR_MAC_TCI_UCI_GlobalEdge NR_NGAP NR_PDCP_noS1 NR_PUCCH_MultiUE NR_RA_cleanup NR_RA_updates NR_RRCConfiguragion_FR2 NR_RRCConfiguration NR_RRCConfiguration_FR2 NR_RRCConfiguration_S1U NR_RRCConfiguration_merge_develop NR_RRCConfiguration_sync_source NR_RRCConfiguration_trx_thread NR_RRC_CP_bugfix NR_RRC_PDCP NR_RRC_PRACH_procedures NR_RRC_PRACH_procedures_todevelop NR_RRC_PUSCH NR_RRC_TA NR_RRC_X2AP_AMBR_Change_Global_edge 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improve_nr_modulation improve_ue_stability integration_2020_wk40 integration_2020_wk41 integration_2020_wk42_2 integration_2020_wk45 integration_2020_wk45_2 integration_2020_wk46 integration_2020_wk46_2 integration_2020_wk47 integration_2020_wk48 integration_2020_wk48_2 integration_2020_wk49 integration_2020_wk50 integration_2020_wk50_1 integration_2020_wk51 integration_2020_wk51_2 integration_2021_wk02 integration_2021_wk02_wMR988 integration_2021_wk04 integration_2021_wk05 inter-RRU-final inter-RRU-nr inter-RRU-oairu inter-rru-UE isip_nr itti-enhancement l2-fixes ldpc-decoder-codegen ldpc-decoder-codegen2 ldpc-offload ldpc_short_codeword_fixes load_gnb lte-ulsch-bugfix lte_uplink_improvement mac-fixes-wk45_2 mbms-fix-develop-nr merging-2019-w51-to-develop-nr minor-fix-doc-basic-sim mosaic5g-oai-ran mosaic5g-oai-sim nasmesh_kernel_5.8 new-gtpu new_rlc_2020 nfapi-bugfix nfapi_nr_develop ngap-dlul ngap-support ngap-w48-merge2 ngap-wf ngap-wf-1120 ngap-wf-1120-srb ngap-wf-1120-srb-gtp ngap-wf-1120-srb-gtp-hs ngap-wf-1120-srb-gtp-hs1 ngap-wf-1120-srb-gtp-hs2 ngap-wf-1120-srb-gtp-yhz ngap-wf-1203-yunsdr ngap-wf-liuyu ngap_lfq_1120 ngap_merge noCore nr-dlsch-multi-thread nr-dual-connectivity nr-ip-uplink-noS1 nr-mac-pdu-wireshark nr-mac-remove-ue-list nr-pdcp nr-rlc-am-bugfix-w44 nr-rlc-bugfix-w44 nrUE nrUE-hs nrUE-upper-layer nr_bsr nr_dl_dmrs_type2 nr_dl_pf nr_dl_pf2 nr_dl_ul_ptrs nr_fdd_if_fix nr_polar_decoder_improvement nr_prach_fr2 nr_pucch nr_pucch2 nr_segmentation_fixes nr_ue_msg3 nr_ue_tti_cleanup nr_ul_pf nr_ul_scfdma nrue-multi-thread nrue_msg2_reception nsa-ue nsa_remove_band_hardcodings oai-sim oai-ubuntu-docker oai-ubuntu-docker-for-lmssdr oairu oairu-dockerfile-support oc-docker-october-improvements openxg/develop pdcp-benchmark polar8 ptrs_rrc_config pusch-mthread-scaling-fix pusch-retrans-fix-ue ra-dl-ul remove_nos1_hack_pdcp remove_x2_gnb_hardcoding repair-TA revert_memcpy rh-ci-add-ue-parallelization rh_ci_fix_autoterminate rh_ci_fr1_update rh_ci_oc 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2020.w46 2020.w45_2 2020.w45 2020.w44 2020.w42_2 2020.w42 2020.w41 2020.w39 2020.w38 2020.w37 2020.w36 2020.w34 2020.w33 2020.w31 2020.w30 2020.w29 2020.w28 2020.w26 2020.w25 2020.w24 2020.w23 2020.w22 2020.w19 2020.w17 2020.w16 2020.w15 2020.w11 2020.w09 2020.w06 2020.w05 2020.w04 2020.w03 develop-nr-2020w03 develop-nr-2020w02 benetel_phase_rotation
......@@ -2252,6 +2252,9 @@ void RCconfig_RU(void)
LOG_E(PHY, "Erroneous RU clock source in the provided configuration file: '%s'\n", *(RUParamList.paramarray[j][RU_SDR_CLK_SRC].strptr));
}
}
else {
RC.ru[j]->openair0_cfg.clock_source = unset;
}
if (strcmp(*(RUParamList.paramarray[j][RU_LOCAL_RF_IDX].strptr), "yes") == 0) {
if ( !(config_isparamset(RUParamList.paramarray[j],RU_LOCAL_IF_NAME_IDX)) ) {
......
......@@ -106,7 +106,6 @@ int config_sync_var=-1;
#endif
volatile int oai_exit = 0;
static clock_source_t clock_source = internal;
static int wait_for_sync = 0;
unsigned int mmapped_dma=0;
......
......@@ -23,7 +23,6 @@
{"phy-test", CONFIG_HLP_PHYTST, PARAMFLAG_BOOL, iptr:&phy_test, defintval:0, TYPE_INT, 0}, \
{"usim-test", CONFIG_HLP_USIM, PARAMFLAG_BOOL, u8ptr:&usim_test, defintval:0, TYPE_UINT8, 0}, \
{"mmapped-dma", CONFIG_HLP_DMAMAP, PARAMFLAG_BOOL, uptr:&mmapped_dma, defintval:0, TYPE_INT, 0}, \
{"external-clock", CONFIG_HLP_EXCCLK, PARAMFLAG_BOOL, uptr:&clock_source, defintval:0, TYPE_INT, 0}, \
{"wait-for-sync", NULL, PARAMFLAG_BOOL, iptr:&wait_for_sync, defintval:0, TYPE_INT, 0}, \
{"single-thread-disable", CONFIG_HLP_NOSNGLT, PARAMFLAG_BOOL, iptr:&single_thread_flag, defintval:1, TYPE_INT, 0}, \
{"A" , CONFIG_HLP_TADV, 0, uptr:&timing_advance, defintval:0, TYPE_UINT, 0}, \
......
......@@ -116,7 +116,7 @@ volatile int start_eNB = 0;
volatile int start_UE = 0;
volatile int oai_exit = 0;
static clock_source_t clock_source = internal;
static clock_source_t clock_source = unset;
int single_thread_flag=1;
static double snr_dB=20;
......
......@@ -65,7 +65,7 @@
{"ulsch-max-errors", CONFIG_HLP_ULMAXE, 0, uptr:&ULSCH_max_consecutive_errors, defuintval:0, TYPE_UINT, 0}, \
{"phy-test", CONFIG_HLP_PHYTST, PARAMFLAG_BOOL, iptr:&phy_test, defintval:0, TYPE_INT, 0}, \
{"usim-test", CONFIG_HLP_USIM, PARAMFLAG_BOOL, u8ptr:&usim_test, defintval:0, TYPE_UINT8, 0}, \
{"external-clock", CONFIG_HLP_EXCCLK, PARAMFLAG_BOOL, uptr:&clock_source, defintval:0, TYPE_INT, 0}, \
{"clock-source", CONFIG_HLP_EXCCLK, 0, iptr:&clock_source, defintval:0, TYPE_INT, 0}, \
{"single-thread-disable", CONFIG_HLP_NOSNGLT, PARAMFLAG_BOOL, iptr:&single_thread_flag, defintval:1, TYPE_INT, 0}, \
{"nr-dlsch-demod-shift", CONFIG_HLP_DLSHIFT, 0, iptr:(int32_t *)&nr_dlsch_demod_shift, defintval:0, TYPE_INT, 0}, \
{"A" , CONFIG_HLP_TADV, 0, uptr:&timing_advance, defintval:0, TYPE_UINT, 0}, \
......
......@@ -135,6 +135,8 @@ typedef struct {
/*! \brief Clock source types */
typedef enum {
//! this means the paramter has not been set
unset=-1,
//! This tells the underlying hardware to use the internal reference
internal=0,
//! This tells the underlying hardware to use the external reference
......
......@@ -1145,27 +1145,34 @@ extern "C" {
device->priv = s;
if (args.find("clock_source")==std::string::npos) {
LOG_I(HW, "Using clock_source == '%d'\n", openair0_cfg[0].clock_source);
if (openair0_cfg[0].clock_source == internal) {
//in UHD 3.14 we could use
//s->usrp->set_sync_source("clock_source=internal","time_source=internal");
s->usrp->set_time_source("internal");
s->usrp->set_clock_source("internal");
LOG_D(HW,"Setting time and clock source to internal\n");
}
else if (openair0_cfg[0].clock_source == external ) {
//s->usrp->set_sync_source("clock_source=external","time_source=external");
s->usrp->set_time_source("external");
s->usrp->set_clock_source("external");
LOG_D(HW,"Setting time and clock source to external\n");
}
else if (openair0_cfg[0].clock_source==gpsdo) {
s->usrp->set_clock_source("gpsdo");
s->usrp->set_time_source("gpsdo");
LOG_D(HW,"Setting time and clock source to gpsdo\n");
}
else {
LOG_W(HW,"Clock source set neither in usrp_args nor on command line, using default!\n");
}
} else {
LOG_W(HW, "clock_source already specified in device arguments! Ignoring command line parameter\n");
}
else {
if (openair0_cfg[0].clock_source != unset) {
LOG_W(HW,"Clock source set in both usrp_args and in clock_source, ingnoring the latter!\n");
}
}
if (s->usrp->get_clock_source(0) == "gpsdo") {
s->use_gps = 1;
if (sync_to_gps(device)==EXIT_SUCCESS) {
......
......@@ -146,7 +146,7 @@
{"dlsch-demod-shift", CONFIG_HLP_DLSHIFT, 0, iptr:(int32_t *)&dlsch_demod_shift, defintval:0, TYPE_INT, 0}, \
{"usrp-args", CONFIG_HLP_USRP_ARGS, 0, strptr:(char **)&usrp_args, defstrval:"type=b200",TYPE_STRING, 0}, \
{"mmapped-dma", CONFIG_HLP_DMAMAP, PARAMFLAG_BOOL, uptr:&mmapped_dma, defintval:0, TYPE_INT, 0}, \
{"clock", CONFIG_HLP_CLK, 0, uptr:&clock_source, defintval:0, TYPE_UINT, 0}, \
{"clock-source", CONFIG_HLP_CLK, 0, iptr:&clock_source, defintval:0, TYPE_INT, 0}, \
{"T" , CONFIG_HLP_TDD, PARAMFLAG_BOOL, iptr:&tddflag, defintval:0, TYPE_INT, 0}, \
{"A", CONFIG_HLP_TADV, 0, iptr:&(timingadv), defintval:0, TYPE_INT, 0} \
}
......
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