Skip to content
Projects
Groups
Snippets
Help
Loading...
Help
Support
Keyboard shortcuts
?
Submit feedback
Contribute to GitLab
Sign in / Register
Toggle navigation
O
OpenXG-RAN
Project overview
Project overview
Details
Activity
Releases
Repository
Repository
Files
Commits
Branches
Tags
Contributors
Graph
Compare
Issues
0
Issues
0
List
Boards
Labels
Milestones
Merge Requests
0
Merge Requests
0
CI / CD
CI / CD
Pipelines
Jobs
Schedules
Analytics
Analytics
CI / CD
Repository
Value Stream
Wiki
Wiki
Snippets
Snippets
Members
Members
Collapse sidebar
Close sidebar
Activity
Graph
Create a new issue
Jobs
Commits
Issue Boards
Open sidebar
promise
OpenXG-RAN
Commits
ed6e5ce8
Commit
ed6e5ce8
authored
Apr 03, 2020
by
Robert Schmidt
Browse files
Options
Browse Files
Download
Email Patches
Plain Diff
Use CCE_try_allocate_dlsch()
parent
6b3b0b0b
Changes
5
Expand all
Hide whitespace changes
Inline
Side-by-side
Showing
5 changed files
with
275 additions
and
276 deletions
+275
-276
openair2/LAYER2/MAC/eNB_scheduler_dlsch.c
openair2/LAYER2/MAC/eNB_scheduler_dlsch.c
+206
-276
openair2/LAYER2/MAC/eNB_scheduler_primitives.c
openair2/LAYER2/MAC/eNB_scheduler_primitives.c
+61
-0
openair2/LAYER2/MAC/mac.h
openair2/LAYER2/MAC/mac.h
+1
-0
openair2/LAYER2/MAC/mac_proto.h
openair2/LAYER2/MAC/mac_proto.h
+6
-0
openair2/LAYER2/MAC/pre_processor.c
openair2/LAYER2/MAC/pre_processor.c
+1
-0
No files found.
openair2/LAYER2/MAC/eNB_scheduler_dlsch.c
View file @
ed6e5ce8
This diff is collapsed.
Click to expand it.
openair2/LAYER2/MAC/eNB_scheduler_primitives.c
View file @
ed6e5ce8
...
@@ -3510,6 +3510,67 @@ CCE_allocation_infeasible(int module_idP,
...
@@ -3510,6 +3510,67 @@ CCE_allocation_infeasible(int module_idP,
return res;
return res;
}
}
int CCE_try_allocate_dlsch(int module_id,
int CC_id,
int subframe,
int UE_id,
uint8_t dl_cqi) {
const rnti_t rnti = RC.mac[module_id]->UE_info.UE_template[CC_id][UE_id].rnti;
nfapi_dl_config_request_body_t *DL_req = &RC.mac[module_id]->DL_req[CC_id].dl_config_request_body;
if (DL_req->number_pdu >= MAX_NUM_DL_PDU) {
LOG_W(MAC, "Subframe %d: FAPI DL structure is full, skip scheduling UE %d\n", subframe, rnti);
return -1;
}
int aggregation = 2;
const uint8_t tm = get_tmode(module_id, CC_id, UE_id);
switch (tm) {
case 1:
case 2:
case 7:
aggregation = get_aggregation(get_bw_index(module_id, CC_id),
dl_cqi,
format1);
break;
case 3:
aggregation = get_aggregation(get_bw_index(module_id, CC_id),
dl_cqi,
format2A);
break;
default:
AssertFatal(0, "Unsupported transmission mode %d\n", tm);
break;
}
nfapi_dl_config_request_pdu_t *dl_config_pdu = &DL_req->dl_config_pdu_list[DL_req->number_pdu];
memset(dl_config_pdu, 0, sizeof(nfapi_dl_config_request_pdu_t));
dl_config_pdu->dci_dl_pdu.dci_dl_pdu_rel8.tl.tag = NFAPI_DL_CONFIG_REQUEST_DCI_DL_PDU_REL8_TAG;
dl_config_pdu->pdu_type = NFAPI_DL_CONFIG_DCI_DL_PDU_TYPE;
dl_config_pdu->dci_dl_pdu.dci_dl_pdu_rel8.rnti = rnti;
dl_config_pdu->dci_dl_pdu.dci_dl_pdu_rel8.rnti_type = 1;
dl_config_pdu->dci_dl_pdu.dci_dl_pdu_rel8.aggregation_level = aggregation;
DL_req->number_pdu++;
LOG_D(MAC, "Subframe %d: Checking CCE feasibility format 1: (%x,%d) \n",
subframe, rnti, aggregation);
if (allocate_CCEs(module_id, CC_id, 0, subframe, 0) < 0) {
DL_req->number_pdu--;
return -1;
}
DL_req->number_dci++;
nfapi_dl_config_request_pdu_t *dl_dlsch_pdu = &DL_req->dl_config_pdu_list[DL_req->number_pdu];
dl_dlsch_pdu->pdu_type = NFAPI_DL_CONFIG_DLSCH_PDU_TYPE;
dl_dlsch_pdu->dlsch_pdu.dlsch_pdu_rel8.tl.tag = NFAPI_DL_CONFIG_REQUEST_DLSCH_PDU_REL8_TAG;
dl_dlsch_pdu->dlsch_pdu.dlsch_pdu_rel8.rnti = rnti;
DL_req->number_pdu++;
return DL_req->number_pdu - 2;
}
//------------------------------------------------------------------------------
//------------------------------------------------------------------------------
void
void
get_retransmission_timing(LTE_TDD_Config_t *tdd_Config,
get_retransmission_timing(LTE_TDD_Config_t *tdd_Config,
...
...
openair2/LAYER2/MAC/mac.h
View file @
ed6e5ce8
...
@@ -933,6 +933,7 @@ typedef struct {
...
@@ -933,6 +933,7 @@ typedef struct {
uint8_t
dl_pow_off
[
NFAPI_CC_MAX
];
uint8_t
dl_pow_off
[
NFAPI_CC_MAX
];
uint16_t
pre_nb_available_rbs
[
NFAPI_CC_MAX
];
uint16_t
pre_nb_available_rbs
[
NFAPI_CC_MAX
];
unsigned
char
rballoc_sub_UE
[
NFAPI_CC_MAX
][
N_RBG_MAX
];
unsigned
char
rballoc_sub_UE
[
NFAPI_CC_MAX
][
N_RBG_MAX
];
int
pre_dci_dl_pdu_idx
;
uint16_t
ta_timer
;
uint16_t
ta_timer
;
int16_t
ta_update
;
int16_t
ta_update
;
uint16_t
ul_consecutive_errors
;
uint16_t
ul_consecutive_errors
;
...
...
openair2/LAYER2/MAC/mac_proto.h
View file @
ed6e5ce8
...
@@ -413,6 +413,12 @@ boolean_t CCE_allocation_infeasible(int module_idP,
...
@@ -413,6 +413,12 @@ boolean_t CCE_allocation_infeasible(int module_idP,
int
common_flag
,
int
common_flag
,
int
subframe
,
int
subframe
,
int
aggregation
,
int
rnti
);
int
aggregation
,
int
rnti
);
/* tries to allocate a CCE. If it succeeds, reserves NFAPI DCI and DLSCH config */
int
CCE_try_allocate_dlsch
(
int
module_id
,
int
CC_id
,
int
subframe
,
int
UE_id
,
uint8_t
dl_cqi
);
void
set_ue_dai
(
sub_frame_t
subframeP
,
void
set_ue_dai
(
sub_frame_t
subframeP
,
int
UE_id
,
int
UE_id
,
...
...
openair2/LAYER2/MAC/pre_processor.c
View file @
ed6e5ce8
...
@@ -293,6 +293,7 @@ dlsch_scheduler_pre_processor(module_id_t Mod_id,
...
@@ -293,6 +293,7 @@ dlsch_scheduler_pre_processor(module_id_t Mod_id,
ue_sched_ctrl
->
pre_nb_available_rbs
[
CC_id
]
=
0
;
ue_sched_ctrl
->
pre_nb_available_rbs
[
CC_id
]
=
0
;
ue_sched_ctrl
->
dl_pow_off
[
CC_id
]
=
2
;
ue_sched_ctrl
->
dl_pow_off
[
CC_id
]
=
2
;
memset
(
ue_sched_ctrl
->
rballoc_sub_UE
[
CC_id
],
0
,
sizeof
(
ue_sched_ctrl
->
rballoc_sub_UE
[
CC_id
]));
memset
(
ue_sched_ctrl
->
rballoc_sub_UE
[
CC_id
],
0
,
sizeof
(
ue_sched_ctrl
->
rballoc_sub_UE
[
CC_id
]));
ue_sched_ctrl
->
pre_dci_dl_pdu_idx
=
-
1
;
const
rnti_t
rnti
=
UE_RNTI
(
Mod_id
,
UE_id
);
const
rnti_t
rnti
=
UE_RNTI
(
Mod_id
,
UE_id
);
if
(
rnti
==
NOT_A_RNTI
)
{
if
(
rnti
==
NOT_A_RNTI
)
{
...
...
Write
Preview
Markdown
is supported
0%
Try again
or
attach a new file
Attach a file
Cancel
You are about to add
0
people
to the discussion. Proceed with caution.
Finish editing this message first!
Cancel
Please
register
or
sign in
to comment