Commit 363b977e authored by Cedric Roux's avatar Cedric Roux

Merge remote-tracking branch 'origin/mu_with_tdd1' into develop

parents 6b275483 6b4fbcad
......@@ -632,6 +632,10 @@ add_boolean_option(MESSAGE_CHART_GENERATOR False "For generating sequenc
add_boolean_option(MESSAGE_CHART_GENERATOR_RLC_MAC False "trace RLC-MAC exchanges in sequence diagrams")
add_boolean_option(MESSAGE_CHART_GENERATOR_PHY False "trace some PHY exchanges in sequence diagrams")
add_boolean_option(UE_EXPANSION False "enable UE_EXPANSION with max 256 UE")
add_boolean_option(PHY_TX_THREAD False "enable UE_EXPANSION with max 256 UE")
add_boolean_option(PRE_SCD_THREAD False "enable UE_EXPANSION with max 256 UE")
########################
# Include order
##########################
......@@ -1334,6 +1338,7 @@ set (MAC_SRC
${MAC_DIR}/eNB_scheduler_bch.c
${MAC_DIR}/eNB_scheduler_primitives.c
${MAC_DIR}/eNB_scheduler_RA.c
${MAC_DIR}/eNB_scheduler_fairRR.c
${MAC_DIR}/eNB_scheduler_phytest.c
${MAC_DIR}/pre_processor.c
${MAC_DIR}/config.c
......
......@@ -49,7 +49,7 @@ eNBs =
pucch_delta_shift = 1;
pucch_nRB_CQI = 0;
pucch_nCS_AN = 0;
pucch_n1_AN = 32;
pucch_n1_AN = 0;
pdsch_referenceSignalPower = -24;
pdsch_p_b = 0;
pusch_n_SB = 1;
......
......@@ -49,7 +49,7 @@ eNBs =
pucch_delta_shift = 1;
pucch_nRB_CQI = 0;
pucch_nCS_AN = 0;
pucch_n1_AN = 32;
pucch_n1_AN = 0;
pdsch_referenceSignalPower = -24;
pdsch_p_b = 0;
pusch_n_SB = 1;
......
......@@ -49,7 +49,7 @@ eNBs =
pucch_delta_shift = 1;
pucch_nRB_CQI = 0;
pucch_nCS_AN = 0;
pucch_n1_AN = 32;
pucch_n1_AN = 0;
pdsch_referenceSignalPower = -24;
pdsch_p_b = 0;
pusch_n_SB = 1;
......
......@@ -49,7 +49,7 @@ eNBs =
pucch_delta_shift = 1;
pucch_nRB_CQI = 0;
pucch_nCS_AN = 0;
pucch_n1_AN = 32;
pucch_n1_AN = 0;
pdsch_referenceSignalPower = -24;
pdsch_p_b = 0;
pusch_n_SB = 1;
......
......@@ -49,7 +49,7 @@ eNBs =
pucch_delta_shift = 1;
pucch_nRB_CQI = 0;
pucch_nCS_AN = 0;
pucch_n1_AN = 32;
pucch_n1_AN = 0;
pdsch_referenceSignalPower = -24;
pdsch_p_b = 0;
pusch_n_SB = 1;
......
......@@ -49,7 +49,7 @@ eNBs =
pucch_delta_shift = 1;
pucch_nRB_CQI = 0;
pucch_nCS_AN = 0;
pucch_n1_AN = 32;
pucch_n1_AN = 0;
pdsch_referenceSignalPower = -24;
pdsch_p_b = 0;
pusch_n_SB = 1;
......
......@@ -49,7 +49,7 @@ eNBs =
pucch_delta_shift = 1;
pucch_nRB_CQI = 0;
pucch_nCS_AN = 0;
pucch_n1_AN = 32;
pucch_n1_AN = 0;
pdsch_referenceSignalPower = -29;
pdsch_p_b = 0;
pusch_n_SB = 1;
......
......@@ -49,7 +49,7 @@ eNBs =
pucch_delta_shift = 1;
pucch_nRB_CQI = 0;
pucch_nCS_AN = 0;
pucch_n1_AN = 32;
pucch_n1_AN = 0;
pdsch_referenceSignalPower = -29;
pdsch_p_b = 0;
pusch_n_SB = 1;
......
......@@ -49,7 +49,7 @@ eNBs =
pucch_delta_shift = 1;
pucch_nRB_CQI = 0;
pucch_nCS_AN = 0;
pucch_n1_AN = 32;
pucch_n1_AN = 0;
pdsch_referenceSignalPower = -29;
pdsch_p_b = 0;
pusch_n_SB = 1;
......
......@@ -49,7 +49,7 @@ eNBs =
pucch_delta_shift = 1;
pucch_nRB_CQI = 0;
pucch_nCS_AN = 0;
pucch_n1_AN = 32;
pucch_n1_AN = 0;
pdsch_referenceSignalPower = -29;
pdsch_p_b = 0;
pusch_n_SB = 1;
......
......@@ -49,7 +49,7 @@ eNBs =
pucch_delta_shift = 1;
pucch_nRB_CQI = 0;
pucch_nCS_AN = 0;
pucch_n1_AN = 32;
pucch_n1_AN = 0;
pdsch_referenceSignalPower = -29;
pdsch_p_b = 0;
pusch_n_SB = 1;
......
......@@ -49,7 +49,7 @@ eNBs =
pucch_delta_shift = 1;
pucch_nRB_CQI = 0;
pucch_nCS_AN = 0;
pucch_n1_AN = 32;
pucch_n1_AN = 0;
pdsch_referenceSignalPower = -29;
pdsch_p_b = 0;
pusch_n_SB = 1;
......
......@@ -42,6 +42,7 @@ conf_nvram_path=$OPENAIR_DIR/openair3/NAS/TOOLS/ue_eurecom_test_sfr.conf
MSC_GEN="False"
XFORMS="True"
UE_EXPANSION="False"
PRINT_STATS="False"
VCD_TIMING="False"
DEADLINE_SCHEDULER_FLAG_USER="False"
......@@ -214,6 +215,10 @@ function main() {
UE=1
echo_info "Will compile UE"
shift;;
--mu)
UE_EXPANSION="True"
echo_info "Will compile with UE_EXPANSION"
shift;;
--UE-conf-nvram)
conf_nvram_path=$(readlink -f "$1")
shift 2;;
......@@ -540,6 +545,9 @@ function main() {
echo "set ( CMAKE_BUILD_TYPE $CMAKE_BUILD_TYPE )" >> $cmake_file
echo "set ( CFLAGS_PROCESSOR_USER \"$CFLAGS_PROCESSOR_USER\" )" >> $cmake_file
echo "set ( XFORMS $XFORMS )" >> $cmake_file
echo "set ( UE_EXPANSION $UE_EXPANSION )" >> $cmake_file
echo "set ( PHY_TX_THREAD $UE_EXPANSION )" >> $cmake_file
echo "set ( PRE_SCD_THREAD $UE_EXPANSION )" >> $cmake_file
echo "set ( RRC_ASN1_VERSION \"${REL}\")" >> $cmake_file
echo "set ( ENABLE_VCD_FIFO $VCD_TIMING )" >> $cmake_file
echo "set ( RF_BOARD \"${HW}\")" >> $cmake_file
......@@ -707,6 +715,9 @@ function main() {
echo "set ( CMAKE_BUILD_TYPE $CMAKE_BUILD_TYPE )" >> $cmake_file
echo "set ( CFLAGS_PROCESSOR_USER \"$CFLAGS_PROCESSOR_USER\" )" >> $cmake_file
echo "set ( XFORMS $XFORMS )" >> $cmake_file
echo "set ( UE_EXPANSION $UE_EXPANSION )" >> $cmake_file
echo "set ( PHY_TX_THREAD $UE_EXPANSION )" >> $cmake_file
echo "set ( PRE_SCD_THREAD $UE_EXPANSION )" >> $cmake_file
echo "set ( PRINT_STATS $PRINT_STATS )" >> $cmake_file
echo "set ( RRC_ASN1_VERSION \"${REL}\")" >> $cmake_file
echo "set ( ENABLE_VCD_FIFO $VCD_TIMING )" >> $cmake_file
......@@ -794,6 +805,9 @@ function main() {
cp $DIR/oaisim_mme_build_oai/CMakeLists.template $cmake_file
echo "set ( CMAKE_BUILD_TYPE $CMAKE_BUILD_TYPE )" >> $cmake_file
echo "set ( XFORMS $XFORMS )" >> $cmake_file
echo "set ( UE_EXPANSION $UE_EXPANSION )" >> $cmake_file
echo "set ( PHY_TX_THREAD $UE_EXPANSION )" >> $cmake_file
echo "set ( PRE_SCD_THREAD $UE_EXPANSION )" >> $cmake_file
echo "set ( RRC_ASN1_VERSION \"${REL}\")" >> $cmake_file
echo "set ( ENABLE_VCD_FIFO $VCD_TIMING )" >> $cmake_file
echo "set ( T_TRACER $T_TRACER )" >> $cmake_file
......
......@@ -95,7 +95,7 @@ hash_table_t *hashtable_create(const hash_size_t sizeP, hash_size_t (*hashfuncP)
* Cleanup
* The hashtable_destroy() walks through the linked lists for each possible hash value, and releases the elements. It also releases the nodes array and the hash_table_t.
*/
hashtable_rc_t hashtable_destroy(hash_table_t * const hashtblP)
hashtable_rc_t hashtable_destroy(hash_table_t * hashtblP)
{
hash_size_t n;
hash_node_t *node, *oldnode;
......@@ -117,6 +117,7 @@ hashtable_rc_t hashtable_destroy(hash_table_t * const hashtblP)
}
free(hashtblP->nodes);
free(hashtblP);
hashtblP=NULL;
return HASH_TABLE_OK;
}
//-------------------------------------------------------------------------------------------------------------------------------
......
......@@ -35,9 +35,11 @@
#ifndef ASSERTIONS_H_
#define ASSERTIONS_H_
void output_log_mem(void);
#define _Assert_Exit_ \
{ \
fprintf(stderr, "\nExiting execution\n"); \
output_log_mem(); \
display_backtrace(); \
fflush(stdout); \
fflush(stderr); \
......
......@@ -736,6 +736,15 @@ void itti_mark_task_ready(task_id_t task_id)
/* Mark the thread as using LFDS queue */
lfds611_queue_use(itti_desc.tasks[task_id].message_queue);
#if defined(UE_EXPANSION) || defined(RTAI)
/* Assign low priority to created threads */
{
struct sched_param sched_param;
sched_param.sched_priority = sched_get_priority_min(SCHED_FIFO) + 1;
sched_setscheduler(0, SCHED_FIFO, &sched_param);
}
#endif
itti_desc.threads[thread_id].task_state = TASK_STATE_READY;
itti_desc.ready_tasks ++;
......
......@@ -117,16 +117,19 @@ int signal_handle(int *end)
case SIGUSR1:
SIG_DEBUG("Received SIGUSR1\n");
*end = 1;
output_log_mem();
break;
case SIGSEGV: /* Fall through */
case SIGABRT:
SIG_DEBUG("Received SIGABORT\n");
output_log_mem();
backtrace_handle_signal(&info);
break;
case SIGINT:
printf("Received SIGINT\n");
output_log_mem();
itti_send_terminate_message(TASK_UNKNOWN);
*end = 1;
break;
......
......@@ -871,7 +871,11 @@ int pnf_phy_dl_config_req(nfapi_pnf_p7_config_t* pnf_p7, nfapi_dl_config_request
AssertFatal(UE_id<NUMBER_OF_UE_MAX,"returned UE_id %d >= %d(NUMBER_OF_UE_MAX)\n",UE_id,NUMBER_OF_UE_MAX);
LTE_eNB_DLSCH_t *dlsch0 = eNB->dlsch[UE_id][0];
//LTE_eNB_DLSCH_t *dlsch1 = eNB->dlsch[UE_id][1];
int harq_pid = dlsch0->harq_ids[sf];
int harq_pid = dlsch0->harq_ids[sfn%2][sf];
if(harq_pid >= dlsch0->Mdlharq) {
LOG_E(PHY,"pnf_phy_dl_config_req illegal harq_pid %d\n", harq_pid);
return(-1);
}
uint8_t *dlsch_sdu = tx_pdus[UE_id][harq_pid];
memcpy(dlsch_sdu, tx_pdu->segments[0].segment_data, tx_pdu->segments[0].segment_length);
......
......@@ -1308,7 +1308,7 @@ typedef struct {
typedef struct {
nfapi_tl_t tl;
uint16_t length;
uint16_t pdu_index;
int16_t pdu_index;
uint16_t transmission_power;
} nfapi_dl_config_bch_pdu_rel8_t;
#define NFAPI_DL_CONFIG_REQUEST_BCH_PDU_REL8_TAG 0x2004
......@@ -1320,7 +1320,7 @@ typedef struct {
typedef struct {
nfapi_tl_t tl;
uint16_t length;
uint16_t pdu_index;
int16_t pdu_index;
uint16_t rnti;
uint8_t resource_allocation_type;
uint32_t resource_block_coding;
......@@ -1344,7 +1344,7 @@ typedef struct {
typedef struct {
nfapi_tl_t tl;
uint16_t length;
uint16_t pdu_index;
int16_t pdu_index;
uint16_t rnti;
uint8_t resource_allocation_type;
uint8_t virtual_resource_block_assignment_flag;
......@@ -1429,7 +1429,7 @@ typedef struct {
typedef struct {
nfapi_tl_t tl;
uint16_t length;
uint16_t pdu_index;
int16_t pdu_index;
uint16_t p_rnti;
uint8_t resource_allocation_type;
uint8_t virtual_resource_block_assignment_flag;
......@@ -1595,7 +1595,7 @@ typedef struct {
typedef struct {
nfapi_tl_t tl;
uint16_t length;
uint16_t pdu_index;
int16_t pdu_index;
uint16_t transmission_power;
uint16_t hyper_sfn_2_lsbs;
} nfapi_dl_config_nbch_pdu_rel13_t;
......@@ -1609,7 +1609,7 @@ typedef struct {
typedef struct {
nfapi_tl_t tl;
uint16_t length;
uint16_t pdu_index;
int16_t pdu_index;
uint8_t ncce_index;
uint8_t aggregation_level;
uint8_t start_symbol;
......@@ -1642,7 +1642,7 @@ typedef struct {
typedef struct {
nfapi_tl_t tl;
uint16_t length;
uint16_t pdu_index;
int16_t pdu_index;
uint8_t start_symbol;
uint8_t rnti_type;
uint16_t rnti;
......@@ -2218,6 +2218,7 @@ typedef struct {
uint8_t dl_assignment_index;
uint32_t tpc_bitmap;
uint16_t transmission_power;
uint8_t harq_pid;
} nfapi_hi_dci0_dci_pdu_rel8_t;
#define NFAPI_HI_DCI0_REQUEST_DCI_PDU_REL8_TAG 0x2020
......@@ -2361,7 +2362,7 @@ typedef struct {
#define NFAPI_TX_MAX_SEGMENTS 32
typedef struct {
uint16_t pdu_length;
uint16_t pdu_index;
int16_t pdu_index;
uint8_t num_segments;
struct {
uint32_t segment_length;
......@@ -2902,7 +2903,7 @@ typedef struct {
typedef struct {
uint8_t sub_error_code;
uint16_t pdu_index;
int16_t pdu_index;
} nfapi_error_indication_msg_tx_err;
//
......
......@@ -259,7 +259,7 @@ void phy_config_request(PHY_Config_t *phy_config) {
AssertFatal(fp->prach_emtc_config_common.prach_ConfigInfo.prach_numRepetitionPerPreambleAttempt[0] > 0,
"prach_emtc_config_common.prach_ConfigInfo.prach_numRepetitionPerPreambleAttempt[0]==0\n");
#else
LOG_E(PHY,"***DJP*** removed assert on preamble fp->prach_emtc_config_common.prach_ConfigInfo.prach_numRepetitionPerPreambleAttempt[0]:%d expecting >0 %s:%d\n\n\n", fp->prach_emtc_config_common.prach_ConfigInfo.prach_numRepetitionPerPreambleAttempt[0], __FILE__, __LINE__);
LOG_D(PHY,"***DJP*** removed assert on preamble fp->prach_emtc_config_common.prach_ConfigInfo.prach_numRepetitionPerPreambleAttempt[0]:%d expecting >0 %s:%d\n\n\n", fp->prach_emtc_config_common.prach_ConfigInfo.prach_numRepetitionPerPreambleAttempt[0], __FILE__, __LINE__);
#endif
fp->prach_emtc_config_common.prach_ConfigInfo.prach_ConfigIndex[0] = cfg->emtc_config.prach_ce_level_0_configuration_index.value;
fp->prach_emtc_config_common.prach_ConfigInfo.prach_FreqOffset[0] = cfg->emtc_config.prach_ce_level_0_frequency_offset.value;
......@@ -471,7 +471,7 @@ void phy_config_sib2_eNB(uint8_t Mod_id,
}
*/
void phy_config_sib13_eNB(uint8_t Mod_id,int CC_id,int mbsfn_Area_idx,
void phy_config_sib13_eNB(module_id_t Mod_id,int CC_id,int mbsfn_Area_idx,
long mbsfn_AreaId_r9)
{
......@@ -491,8 +491,7 @@ void phy_config_sib13_eNB(uint8_t Mod_id,int CC_id,int mbsfn_Area_idx,
void phy_config_dedicated_eNB_step2(PHY_VARS_eNB *eNB)
{
uint8_t UE_id;
uint16_t UE_id;
struct PhysicalConfigDedicated *physicalConfigDedicated;
LTE_DL_FRAME_PARMS *fp=&eNB->frame_parms;
......
......@@ -109,7 +109,7 @@ int phy_init_RU(RU_t *ru) {
AssertFatal(RC.nb_L1_inst <= NUMBER_OF_eNB_MAX,"eNB instances %d > %d\n",
RC.nb_L1_inst,NUMBER_OF_eNB_MAX);
LOG_E(PHY,"[INIT] %s() RC.nb_L1_inst:%d \n", __FUNCTION__, RC.nb_L1_inst);
LOG_D(PHY,"[INIT] %s() RC.nb_L1_inst:%d \n", __FUNCTION__, RC.nb_L1_inst);
for (i=0; i<RC.nb_L1_inst; i++) {
for (p=0;p<15;p++) {
......
......@@ -37,7 +37,7 @@
uint8_t dmrs1_tab_ue[8] = {0,2,3,4,6,8,9,10};
extern uint8_t nfapi_mode;
void phy_config_sib1_ue(uint8_t Mod_id,int CC_id,
void phy_config_sib1_ue(module_id_t Mod_id,int CC_id,
uint8_t eNB_id,
TDD_Config_t *tdd_Config,
uint8_t SIwindowsize,
......@@ -55,7 +55,7 @@ void phy_config_sib1_ue(uint8_t Mod_id,int CC_id,
fp->SIPeriod = SIperiod;
}
void phy_config_sib2_ue(uint8_t Mod_id,int CC_id,
void phy_config_sib2_ue(module_id_t Mod_id,int CC_id,
uint8_t eNB_id,
RadioResourceConfigCommonSIB_t *radioResourceConfigCommon,
ARFCN_ValueEUTRA_t *ul_CarrierFreq,
......@@ -179,7 +179,7 @@ void phy_config_sib2_ue(uint8_t Mod_id,int CC_id,
}
void phy_config_sib13_ue(uint8_t Mod_id,int CC_id,uint8_t eNB_id,int mbsfn_Area_idx,
void phy_config_sib13_ue(module_id_t Mod_id,int CC_id,uint8_t eNB_id,int mbsfn_Area_idx,
long mbsfn_AreaId_r9)
{
......@@ -201,7 +201,7 @@ void phy_config_sib13_ue(uint8_t Mod_id,int CC_id,uint8_t eNB_id,int mbsfn_Area_
/*
* Configures UE MAC and PHY with radioResourceCommon received in mobilityControlInfo IE during Handover
*/
void phy_config_afterHO_ue(uint8_t Mod_id,uint8_t CC_id,uint8_t eNB_id, MobilityControlInfo_t *mobilityControlInfo, uint8_t ho_failed)
void phy_config_afterHO_ue(module_id_t Mod_id,uint8_t CC_id,uint8_t eNB_id, MobilityControlInfo_t *mobilityControlInfo, uint8_t ho_failed)
{
if(mobilityControlInfo!=NULL) {
......@@ -324,7 +324,7 @@ void phy_config_afterHO_ue(uint8_t Mod_id,uint8_t CC_id,uint8_t eNB_id, Mobility
}
}
void phy_config_meas_ue(uint8_t Mod_id,uint8_t CC_id,uint8_t eNB_index,uint8_t n_adj_cells,unsigned int *adj_cell_id)
void phy_config_meas_ue(module_id_t Mod_id,uint8_t CC_id,uint8_t eNB_index,uint8_t n_adj_cells,unsigned int *adj_cell_id)
{
PHY_MEASUREMENTS *phy_meas = &PHY_vars_UE_g[Mod_id][CC_id]->measurements;
......@@ -353,7 +353,7 @@ void phy_config_dedicated_scell_ue(uint8_t Mod_id,
#endif
void phy_config_harq_ue(uint8_t Mod_id,int CC_id,uint8_t eNB_id,
void phy_config_harq_ue(module_id_t Mod_id,int CC_id,uint8_t eNB_id,
uint16_t max_harq_tx )
{
......@@ -363,7 +363,7 @@ void phy_config_harq_ue(uint8_t Mod_id,int CC_id,uint8_t eNB_id,
extern uint16_t beta_cqi[16];
void phy_config_dedicated_ue(uint8_t Mod_id,int CC_id,uint8_t eNB_id,
void phy_config_dedicated_ue(module_id_t Mod_id,int CC_id,uint8_t eNB_id,
struct PhysicalConfigDedicated *physicalConfigDedicated )
{
......
......@@ -34,7 +34,7 @@
void lte_adjust_synch(LTE_DL_FRAME_PARMS *frame_parms,
PHY_VARS_UE *ue,
unsigned char eNB_id,
module_id_t eNB_id,
uint8_t subframe,
unsigned char clear,
short coef)
......
......@@ -112,7 +112,7 @@ int lte_est_timing_advance(LTE_DL_FRAME_PARMS *frame_parms,
}
int lte_est_timing_advance_pusch(PHY_VARS_eNB* eNB,uint8_t UE_id)
int lte_est_timing_advance_pusch(PHY_VARS_eNB* eNB,module_id_t UE_id)
{
int temp, i, aa, max_pos=0, max_val=0;
short Re,Im;
......
......@@ -35,7 +35,7 @@
void lte_adjust_synch(LTE_DL_FRAME_PARMS *frame_parms,
PHY_VARS_UE *ue,
unsigned char eNB_id,
module_id_t eNB_id,
uint8_t subframe,
unsigned char clear,
short coef)
......
......@@ -28,7 +28,7 @@
//#define DEBUG_BF_CH
int lte_dl_bf_channel_estimation(PHY_VARS_UE *phy_vars_ue,
uint8_t eNB_id,
module_id_t eNB_id,
uint8_t eNB_offset,
unsigned char Ns,
unsigned char p,
......
......@@ -29,7 +29,7 @@
#include "SCHED_UE/sched_UE.h"
int lte_dl_channel_estimation(PHY_VARS_UE *ue,
uint8_t eNB_id,
module_id_t eNB_id,
uint8_t eNB_offset,
unsigned char Ns,
unsigned char p,
......
......@@ -26,7 +26,7 @@
//#define DEBUG_CH
int lte_dl_mbsfn_channel_estimation(PHY_VARS_UE *ue,
uint8_t eNB_id,
module_id_t eNB_id,
uint8_t eNB_offset,
int subframe,
unsigned char l)
......
......@@ -34,7 +34,7 @@ int32_t rx_power_avg_eNB[3];
void lte_eNB_I0_measurements(PHY_VARS_eNB *eNB,
int subframe,
unsigned char eNB_id,
module_id_t eNB_id,
unsigned char clear)
{
......@@ -115,8 +115,8 @@ void lte_eNB_I0_measurements(PHY_VARS_eNB *eNB,
}
void lte_eNB_srs_measurements(PHY_VARS_eNB *eNB,
unsigned char eNB_id,
unsigned char UE_id,
module_id_t eNB_id,
module_id_t UE_id,
unsigned char init_averaging)
{
LTE_DL_FRAME_PARMS *frame_parms = &eNB->frame_parms;
......
......@@ -55,7 +55,7 @@ void print_ints(char *s,int *x)
}
int16_t get_PL(uint8_t Mod_id,uint8_t CC_id,uint8_t eNB_index)
int16_t get_PL(module_id_t Mod_id,uint8_t CC_id,uint8_t eNB_index)
{
PHY_VARS_UE *ue = PHY_vars_UE_g[Mod_id][CC_id];
......@@ -81,7 +81,7 @@ int16_t get_PL(uint8_t Mod_id,uint8_t CC_id,uint8_t eNB_index)
}
uint8_t get_n_adj_cells (uint8_t Mod_id,uint8_t CC_id)
uint8_t get_n_adj_cells (module_id_t Mod_id,uint8_t CC_id)
{
PHY_VARS_UE *ue = PHY_vars_UE_g[Mod_id][CC_id];
......@@ -92,7 +92,7 @@ uint8_t get_n_adj_cells (uint8_t Mod_id,uint8_t CC_id)
return 0;
}
uint32_t get_rx_total_gain_dB (uint8_t Mod_id,uint8_t CC_id)
uint32_t get_rx_total_gain_dB (module_id_t Mod_id,uint8_t CC_id)
{
PHY_VARS_UE *ue = PHY_vars_UE_g[Mod_id][CC_id];
......@@ -102,7 +102,7 @@ uint32_t get_rx_total_gain_dB (uint8_t Mod_id,uint8_t CC_id)
return 0xFFFFFFFF;
}
uint32_t get_RSSI (uint8_t Mod_id,uint8_t CC_id)
uint32_t get_RSSI (module_id_t Mod_id,uint8_t CC_id)
{
PHY_VARS_UE *ue = PHY_vars_UE_g[Mod_id][CC_id];
......@@ -112,7 +112,7 @@ uint32_t get_RSSI (uint8_t Mod_id,uint8_t CC_id)
return 0xFFFFFFFF;
}
double get_RSRP(uint8_t Mod_id,uint8_t CC_id,uint8_t eNB_index)
double get_RSRP(module_id_t Mod_id,uint8_t CC_id,uint8_t eNB_index)
{
AssertFatal(PHY_vars_UE_g!=NULL,"PHY_vars_UE_g is null\n");
......@@ -128,7 +128,7 @@ double get_RSRP(uint8_t Mod_id,uint8_t CC_id,uint8_t eNB_index)
return -140.0;
}
uint32_t get_RSRQ(uint8_t Mod_id,uint8_t CC_id,uint8_t eNB_index)
uint32_t get_RSRQ(module_id_t Mod_id,uint8_t CC_id,uint8_t eNB_index)
{
PHY_VARS_UE *ue = PHY_vars_UE_g[Mod_id][CC_id];
......@@ -139,7 +139,7 @@ uint32_t get_RSRQ(uint8_t Mod_id,uint8_t CC_id,uint8_t eNB_index)
return 0xFFFFFFFF;
}
int8_t set_RSRP_filtered(uint8_t Mod_id,uint8_t CC_id,uint8_t eNB_index,float rsrp)
int8_t set_RSRP_filtered(module_id_t Mod_id,uint8_t CC_id,uint8_t eNB_index,float rsrp)
{
PHY_VARS_UE *ue = PHY_vars_UE_g[Mod_id][CC_id];
......@@ -153,7 +153,7 @@ int8_t set_RSRP_filtered(uint8_t Mod_id,uint8_t CC_id,uint8_t eNB_index,float rs
return -1;
}
int8_t set_RSRQ_filtered(uint8_t Mod_id,uint8_t CC_id,uint8_t eNB_index,float rsrq)
int8_t set_RSRQ_filtered(module_id_t Mod_id,uint8_t CC_id,uint8_t eNB_index,float rsrq)
{
PHY_VARS_UE *ue = PHY_vars_UE_g[Mod_id][CC_id];
......
......@@ -37,7 +37,7 @@ static int16_t ru_90c[2*128] = {32767, 0,32766, -402,32758, -804,32746, -1206,32
int32_t lte_ul_channel_estimation(PHY_VARS_eNB *eNB,
eNB_rxtx_proc_t *proc,
uint8_t UE_id,
module_id_t UE_id,
unsigned char l,
unsigned char Ns) {
......
This diff is collapsed.
......@@ -979,28 +979,23 @@ uint8_t subframe2harq_pid(LTE_DL_FRAME_PARMS *frame_parms,uint32_t frame,uint8_t
} else {
switch (frame_parms->tdd_config) {
case 1:
if ((subframe==2) ||
(subframe==3) ||
(subframe==7) ||
(subframe==8))
switch (subframe) {
case 2:
case 3:
ret = (subframe-2);
break;
switch (subframe) {
case 2:
case 3:
ret = (subframe-2);
break;
case 7:
case 8:
ret = (subframe-5);
break;
case 7:
case 8:
ret = (subframe-5);
break;
default:
LOG_E(PHY,"subframe2_harq_pid, Illegal subframe %d for TDD mode %d\n",subframe,frame_parms->tdd_config);
ret = (255);
break;
}
default:
LOG_E(PHY,"subframe2_harq_pid, Illegal subframe %d for TDD mode %d\n",subframe,frame_parms->tdd_config);
ret = (255);
break;
}
break;
......@@ -1052,10 +1047,13 @@ uint8_t pdcch_alloc2ul_subframe(LTE_DL_FRAME_PARMS *frame_parms,uint8_t n)
uint8_t ul_subframe = 255;
if ((frame_parms->frame_type == TDD) &&
(frame_parms->tdd_config == 1) &&
((n==1)||(n==6))) // tdd_config 0,1 SF 1,5
ul_subframe = ((n+6)%10);
else if ((frame_parms->frame_type == TDD) &&
(frame_parms->tdd_config == 1)) {
if ((n==1)||(n==6)) { // tdd_config 0,1 SF 1,5
ul_subframe = ((n+6)%10);
} else if ((n==4)||(n==9)) {
ul_subframe = ((n+4)%10);
}
} else if ((frame_parms->frame_type == TDD) &&
(frame_parms->tdd_config == 6) &&
((n==0)||(n==1)||(n==5)||(n==6)))
ul_subframe = ((n+7)%10);
......@@ -1063,10 +1061,10 @@ uint8_t pdcch_alloc2ul_subframe(LTE_DL_FRAME_PARMS *frame_parms,uint8_t n)
(frame_parms->tdd_config == 6) &&
(n==9)) // tdd_config 6 SF 9
ul_subframe = ((n+5)%10);
else
else
ul_subframe = ((n+4)%10);
AssertFatal(frame_parms->frame_type == FDD || subframe_select(frame_parms,ul_subframe) == SF_UL,"illegal ul_subframe %d (n %d)\n",ul_subframe,n);
if ( (subframe_select(frame_parms,ul_subframe) != SF_UL) && (frame_parms->frame_type == TDD)) return(255);
LOG_D(PHY, "subframe %d: PUSCH subframe = %d\n", n, ul_subframe);
return ul_subframe;
......@@ -1075,10 +1073,13 @@ uint8_t pdcch_alloc2ul_subframe(LTE_DL_FRAME_PARMS *frame_parms,uint8_t n)
uint8_t ul_subframe2pdcch_alloc_subframe(LTE_DL_FRAME_PARMS *frame_parms,uint8_t n)
{
if ((frame_parms->frame_type == TDD) &&
(frame_parms->tdd_config == 1) &&
((n==7)||(n==2))) // tdd_config 0,1 SF 1,5
return((n==7)? 1 : 6);
else if ((frame_parms->frame_type == TDD) &&
(frame_parms->tdd_config == 1)) {
if ((n==7)||(n==2)) { // tdd_config 0,1 SF 1,5
return((n==7)? 1 : 6);
} else if ((n==3)||(n==8)) {
return((n==3)? 9 : 4);
}
} else if ((frame_parms->frame_type == TDD) &&
(frame_parms->tdd_config == 6) &&
((n==7)||(n==8)||(n==2)||(n==3)))
return((n+3)%10);
......@@ -1095,10 +1096,11 @@ uint32_t pdcch_alloc2ul_frame(LTE_DL_FRAME_PARMS *frame_parms,uint32_t frame, ui
uint32_t ul_frame;
if ((frame_parms->frame_type == TDD) &&
(frame_parms->tdd_config == 1) &&
((n==1)||(n==6))) // tdd_config 0,1 SF 1,5
ul_frame = (frame + (n==1 ? 0 : 1));
else if ((frame_parms->frame_type == TDD) &&
(frame_parms->tdd_config == 1)) {
if ((n==1)||(n==6)||(n==4)||(n==9)) { // tdd_config 0,1 SF 1,5
ul_frame = (frame + (n < 5 ? 0 : 1));
}
} else if ((frame_parms->frame_type == TDD) &&
(frame_parms->tdd_config == 6) &&
((n==0)||(n==1)||(n==5)||(n==6)))
ul_frame = (frame + (n>=5 ? 1 : 0));
......
......@@ -148,8 +148,8 @@ LTE_eNB_DLSCH_t *new_eNB_dlsch(unsigned char Kmimo,unsigned char Mdlharq,uint32_
}*/
for (i=0; i<10; i++)
dlsch->harq_ids[i] = Mdlharq;
for (i=0; i<20; i++)
dlsch->harq_ids[i/10][i%10] = Mdlharq;
for (i=0; i<Mdlharq; i++) {
dlsch->harq_processes[i] = (LTE_DL_eNB_HARQ_t *)malloc16(sizeof(LTE_DL_eNB_HARQ_t));
......@@ -227,11 +227,16 @@ void clean_eNb_dlsch(LTE_eNB_DLSCH_t *dlsch)
if (dlsch) {
Mdlharq = dlsch->Mdlharq;
dlsch->rnti = 0;
#ifdef PHY_TX_THREAD
for (i=0; i<10; i++)
dlsch->active[i] = 0;
#else
dlsch->active = 0;
#endif
dlsch->harq_mask = 0;
for (i=0; i<10; i++)
dlsch->harq_ids[i] = Mdlharq;
for (i=0; i<20; i++)
dlsch->harq_ids[i/10][i%10] = Mdlharq;
for (i=0; i<Mdlharq; i++) {
if (dlsch->harq_processes[i]) {
......@@ -413,7 +418,11 @@ int dlsch_encoding_2threads(PHY_VARS_eNB *eNB,
unsigned int crc=1;
unsigned short iind;
unsigned char harq_pid = dlsch->harq_ids[subframe];
unsigned char harq_pid = dlsch->harq_ids[frame%2][subframe];
if(harq_pid >= dlsch->Mdlharq) {
LOG_E(PHY,"dlsch_encoding_2threads illegal harq_pid %d\n", harq_pid);
return(-1);
}
unsigned short nb_rb = dlsch->harq_processes[harq_pid]->nb_rb;
unsigned int A;
unsigned char mod_order;
......@@ -629,7 +638,7 @@ int dlsch_encoding_all(PHY_VARS_eNB *eNB,
{
int encoding_return = 0;
unsigned int L,C,B;
B = dlsch->harq_processes[dlsch->harq_ids[subframe]]->B;
B = dlsch->harq_processes[dlsch->harq_ids[frame%2][subframe]]->B;
if(B<=6144)
{
L=0;
......@@ -732,7 +741,11 @@ int dlsch_encoding(PHY_VARS_eNB *eNB,
unsigned short iind;
LTE_DL_FRAME_PARMS *frame_parms = &eNB->frame_parms;
unsigned char harq_pid = dlsch->harq_ids[subframe];
unsigned char harq_pid = dlsch->harq_ids[frame%2][subframe];
if(harq_pid >= dlsch->Mdlharq) {
LOG_E(PHY,"dlsch_encoding illegal harq_pid %d\n", harq_pid);
return(-1);
}
unsigned short nb_rb = dlsch->harq_processes[harq_pid]->nb_rb;
unsigned int A;
unsigned char mod_order;
......
......@@ -2077,6 +2077,7 @@ inline int check_skip_dc(int rb,LTE_DL_FRAME_PARMS *frame_parms) {
int dlsch_modulation(PHY_VARS_eNB* phy_vars_eNB,
int32_t **txdataF,
int16_t amp,
int frame,
uint32_t subframe_offset,
uint8_t num_pdcch_symbols,
LTE_eNB_DLSCH_t *dlsch0,
......@@ -2149,7 +2150,11 @@ int dlsch_modulation(PHY_VARS_eNB* phy_vars_eNB,
if ((dlsch0 != NULL) && (dlsch1 != NULL)){
harq_pid = dlsch0->harq_ids[subframe_offset];
harq_pid = dlsch0->harq_ids[frame%2][subframe_offset];
if(harq_pid >= dlsch0->Mdlharq) {
LOG_E(PHY,"illegal harq_pid %d\n", harq_pid);
return(-1);
}
dlsch0_harq = dlsch0->harq_processes[harq_pid];
mimo_mode = dlsch0_harq->mimo_mode;
mod_order0 = dlsch0_harq->Qm;
......@@ -2166,7 +2171,11 @@ int dlsch_modulation(PHY_VARS_eNB* phy_vars_eNB,
}else if ((dlsch0 != NULL) && (dlsch1 == NULL)){
harq_pid = dlsch0->harq_ids[subframe_offset];
harq_pid = dlsch0->harq_ids[frame%2][subframe_offset];
if(harq_pid >= dlsch0->Mdlharq) {
LOG_E(PHY,"illegal harq_pid %d\n", harq_pid);
return(-1);
}
dlsch0_harq = dlsch0->harq_processes[harq_pid];
mimo_mode = dlsch0_harq->mimo_mode;
mod_order0 = dlsch0_harq->Qm;
......@@ -2183,7 +2192,11 @@ int dlsch_modulation(PHY_VARS_eNB* phy_vars_eNB,
}else if ((dlsch0 == NULL) && (dlsch1 != NULL)){
harq_pid = dlsch1->harq_ids[subframe_offset];
harq_pid = dlsch1->harq_ids[frame%2][subframe_offset];
if(harq_pid >= dlsch1->Mdlharq) {
LOG_E(PHY,"illegal harq_pid %d\n", harq_pid);
return(-1);
}
dlsch1_harq = dlsch1->harq_processes[harq_pid];
mimo_mode = dlsch1_harq->mimo_mode;
mod_order0 = dlsch1_harq->Qm;
......
......@@ -92,13 +92,27 @@ void dlsch_scrambling(LTE_DL_FRAME_PARMS *frame_parms,
uint8_t Nacc=4;
uint16_t j0,j,idelta;
uint16_t i = (Ns>>1) + (10*frame);
#ifdef PHY_TX_THREAD
uint16_t i0 = dlsch->harq_processes[harq_pid]->i0;
#else
uint16_t i0 = dlsch->i0;
#endif
#ifdef PHY_TX_THREAD
if (dlsch->harq_processes[harq_pid]->sib1_br_flag==1) Nacc=1;
#else
if (dlsch->sib1_br_flag==1) Nacc=1;
#endif
else if (dlsch->rnti == 0xFFFF || dlsch->rnti == 0xFFFE) Nacc = (frame_parms->frame_type == TDD) ? 10 : 4;
#ifdef PHY_TX_THREAD
// Note: above SC-RNTI will also have to be added when/if implemented
else if (dlsch->harq_processes[harq_pid]->CEmode == CEmodeA) Nacc=1;
else if (dlsch->harq_processes[harq_pid]->CEmode == CEmodeB) Nacc = (frame_parms->frame_type == TDD) ? 10 : 4;
#else
// Note: above SC-RNTI will also have to be added when/if implemented
else if (dlsch->CEmode == CEmodeA) Nacc=1;
else if (dlsch->CEmode == CEmodeB) Nacc = (frame_parms->frame_type == TDD) ? 10 : 4;
#endif
if (frame_parms->frame_type == FDD || Nacc == 1) idelta = 0;
else idelta = Nacc-2;
......@@ -111,7 +125,11 @@ void dlsch_scrambling(LTE_DL_FRAME_PARMS *frame_parms,
// x1 is set in lte_gold_generic
if (mbsfn_flag == 0) {
#if (RRC_VERSION >= MAKE_VERSION(14, 0, 0))
#ifdef PHY_TX_THREAD
if (dlsch->harq_processes[harq_pid]->i0 != 0xFFFF) {
#else
if (dlsch->i0 != 0xFFFF) {
#endif
// rule for BL/CE UEs from Section 6.3.1 in 36.211
x2= (dlsch->rnti<<14) + (q<<13) + ((((j0+j)*Nacc)%10)<<9) + frame_parms->Nid_cell;
if ((frame&1023) < 200) LOG_D(PHY,"Scrambling init for (i0 %d, i %d, j0 %d, j %d, Nacc %d) => x2 %d\n",i0,i,j0,j,Nacc,x2);
......
......@@ -125,6 +125,15 @@ typedef struct {
uint8_t first_layer;
/// codeword this transport block is mapped to
uint8_t codeword;
#ifdef PHY_TX_THREAD
#ifdef Rel14
/// indicator that this DLSCH corresponds to SIB1-BR, needed for c_init for scrambling
uint8_t sib1_br_flag;
/// initial absolute subframe (see 36.211 Section 6.3.1), needed for c_init for scrambling
uint16_t i0;
CEmode_t CEmode;
#endif
#endif
} LTE_DL_eNB_HARQ_t;
......@@ -138,7 +147,11 @@ typedef struct {
/// Allocated RNTI (0 means DLSCH_t is not currently used)
uint16_t rnti;
/// Active flag for baseband transmitter processing
#ifdef PHY_TX_THREAD
uint8_t active[10];
#else
uint8_t active;
#endif
/// HARQ process mask, indicates which processes are currently active
uint16_t harq_mask;
/// Indicator of TX activation per subframe. Used during PUCCH detection for ACK/NAK.
......@@ -146,7 +159,7 @@ typedef struct {
/// First CCE of last PDSCH scheduling per subframe. Again used during PUCCH detection for ACK/NAK.
uint8_t nCCE[10];
/// Process ID's per subframe. Used to associate received ACKs on PUSCH/PUCCH to DLSCH harq process ids
uint8_t harq_ids[10];
uint8_t harq_ids[2][10];
/// Window size (in outgoing transport blocks) for fine-grain rate adaptation
uint8_t ra_window_size;
/// First-round error threshold for fine-grain rate adaptation
......@@ -169,6 +182,7 @@ typedef struct {
int16_t sqrt_rho_a;
/// amplitude of PDSCH (compared to RS) in symbols containing pilots
int16_t sqrt_rho_b;
#ifndef PHY_TX_THREAD
#if (RRC_VERSION >= MAKE_VERSION(14, 0, 0))
/// indicator that this DLSCH corresponds to SIB1-BR, needed for c_init for scrambling
uint8_t sib1_br_flag;
......@@ -176,6 +190,7 @@ typedef struct {
uint16_t i0;
CEmode_t CEmode;
#endif
#endif
} LTE_eNB_DLSCH_t;
......
......@@ -241,6 +241,7 @@ int32_t allocate_REs_in_RB(PHY_VARS_eNB* phy_vars_eNB,
int32_t dlsch_modulation(PHY_VARS_eNB* phy_vars_eNB,
int32_t **txdataF,
int16_t amp,
int frame,
uint32_t sub_frame_offset,
uint8_t num_pdcch_symbols,
LTE_eNB_DLSCH_t *dlsch0,
......@@ -418,7 +419,7 @@ void fill_mdci_and_dlsch(PHY_VARS_eNB *eNB,eNB_rxtx_proc_t *proc,mDCI_ALLOC_t *d
void fill_dci0(PHY_VARS_eNB *eNB,int frame,int subframe,eNB_rxtx_proc_t *proc,DCI_ALLOC_t *dci_alloc,
nfapi_hi_dci0_dci_pdu *pdu);
void fill_ulsch(PHY_VARS_eNB *eNB,nfapi_ul_config_ulsch_pdu *ulsch_pdu,int frame,int subframe);
void fill_ulsch(PHY_VARS_eNB *eNB,int UE_id,nfapi_ul_config_ulsch_pdu *ulsch_pdu,int frame,int subframe);
int generate_eNB_ulsch_params_from_rar(PHY_VARS_eNB *eNB,
unsigned char *rar_pdu,
......@@ -611,11 +612,11 @@ void conv_eMTC_rballoc(uint16_t resource_block_coding,
uint32_t N_RB_DL,
uint32_t *rb_alloc);
int8_t find_dlsch(uint16_t rnti, PHY_VARS_eNB *eNB,find_type_t type);
int16_t find_dlsch(uint16_t rnti, PHY_VARS_eNB *eNB,find_type_t type);
int8_t find_ulsch(uint16_t rnti, PHY_VARS_eNB *eNB,find_type_t type);
int16_t find_ulsch(uint16_t rnti, PHY_VARS_eNB *eNB,find_type_t type);
int8_t find_uci(uint16_t rnti, int frame, int subframe, PHY_VARS_eNB *eNB,find_type_t type);
int16_t find_uci(uint16_t rnti, int frame, int subframe, PHY_VARS_eNB *eNB,find_type_t type);
/**@}*/
#endif
......@@ -37,10 +37,9 @@
//#define DEBUG_UCI 1
int8_t find_uci(uint16_t rnti, int frame, int subframe, PHY_VARS_eNB *eNB,find_type_t type) {
uint8_t i;
int8_t first_free_index=-1;
int16_t find_uci(uint16_t rnti, int frame, int subframe, PHY_VARS_eNB *eNB,find_type_t type) {
uint16_t i;
int16_t first_free_index=-1;
AssertFatal(eNB!=NULL,"eNB is null\n");
for (i=0; i<NUMBER_OF_UE_MAX; i++) {
if ((eNB->uci_vars[i].active >0) &&
......
......@@ -915,8 +915,7 @@ unsigned int ulsch_decoding(PHY_VARS_eNB *eNB,eNB_rxtx_proc_t *proc,
nb_rb);
//#endif
if (ulsch_harq->round == 0) {
//if (ulsch_harq->round == 0) { // delete for RB shortage pattern
// This is a new packet, so compute quantities regarding segmentation
ulsch_harq->B = A+24;
lte_segmentation(NULL,
......@@ -929,8 +928,7 @@ unsigned int ulsch_decoding(PHY_VARS_eNB *eNB,eNB_rxtx_proc_t *proc,
&ulsch_harq->Kminus,
&ulsch_harq->F);
// CLEAR LLR's HERE for first packet in process
}
//}
// printf("after segmentation c[%d] = %p\n",0,ulsch_harq->c[0]);
sumKr = 0;
......
......@@ -1024,20 +1024,6 @@ void ulsch_channel_compensation(int32_t **rxdataF_ext,
#endif
}
void ulsch_channel_level(int32_t **drs_ch_estimates_ext,
LTE_DL_FRAME_PARMS *frame_parms,
int32_t *avg,
......@@ -1047,24 +1033,23 @@ void ulsch_channel_level(int32_t **drs_ch_estimates_ext,
int16_t rb;
uint8_t aarx;
#if defined(__x86_64__) || defined(__i386__)
__m128i avg128U;
__m128i *ul_ch128;
__m128 avg128U;
#elif defined(__arm__)
int16x4_t *ul_ch128;
int32x4_t avg128U;
int16x4_t *ul_ch128;
#endif
for (aarx=0; aarx<frame_parms->nb_antennas_rx; aarx++) {
//clear average level
#if defined(__x86_64__) || defined(__i386__)
avg128U = _mm_setzero_si128();
avg128U = _mm_setzero_ps();
ul_ch128=(__m128i *)drs_ch_estimates_ext[aarx];
for (rb=0; rb<nb_rb; rb++) {
avg128U = _mm_add_epi32(avg128U,_mm_madd_epi16(ul_ch128[0],ul_ch128[0]));
avg128U = _mm_add_epi32(avg128U,_mm_madd_epi16(ul_ch128[1],ul_ch128[1]));
avg128U = _mm_add_epi32(avg128U,_mm_madd_epi16(ul_ch128[2],ul_ch128[2]));
avg128U = _mm_add_ps(avg128U,_mm_cvtepi32_ps(_mm_madd_epi16(ul_ch128[0],ul_ch128[0])));
avg128U = _mm_add_ps(avg128U,_mm_cvtepi32_ps(_mm_madd_epi16(ul_ch128[1],ul_ch128[1])));
avg128U = _mm_add_ps(avg128U,_mm_cvtepi32_ps(_mm_madd_epi16(ul_ch128[2],ul_ch128[2])));
ul_ch128+=3;
......@@ -1091,10 +1076,10 @@ void ulsch_channel_level(int32_t **drs_ch_estimates_ext,
#endif
DevAssert( nb_rb );
avg[aarx] = (((int*)&avg128U)[0] +
((int*)&avg128U)[1] +
((int*)&avg128U)[2] +
((int*)&avg128U)[3])/(nb_rb*12);
avg[aarx] = (int)((((float*)&avg128U)[0] +
((float*)&avg128U)[1] +
((float*)&avg128U)[2] +
((float*)&avg128U)[3])/(float)(nb_rb*12));
}
......
......@@ -1677,9 +1677,5 @@ uint8_t get_prach_prb_offset(LTE_DL_FRAME_PARMS *frame_parms,
uint8_t n_ra_prboffset,
uint8_t tdd_mapindex, uint16_t Nf);
/**@}*/
#endif
......@@ -678,7 +678,8 @@ typedef struct {
uint16_t phich_reg[MAX_NUM_PHICH_GROUPS][3];
struct MBSFN_SubframeConfig *mbsfn_SubframeConfig[MAX_MBSFN_AREA];
/// for fair RR scheduler
uint32_t ue_multiple_max;
} LTE_DL_FRAME_PARMS;
typedef enum {
......
......@@ -229,6 +229,34 @@ typedef struct RU_proc_t_s {
int num_slaves;
/// array of pointers to slaves
struct RU_proc_t_s **slave_proc;
#ifdef PHY_TX_THREAD
/// pthread structure for PRACH thread
pthread_t pthread_phy_tx;
pthread_mutex_t mutex_phy_tx;
pthread_cond_t cond_phy_tx;
/// \internal This variable is protected by \ref mutex_phy_tx.
int instance_cnt_phy_tx;
/// frame to act upon for transmission
int frame_phy_tx;
/// subframe to act upon for transmission
int subframe_phy_tx;
/// timestamp to send to "slave rru"
openair0_timestamp timestamp_phy_tx;
/// pthread structure for RF TX thread
pthread_t pthread_rf_tx;
pthread_mutex_t mutex_rf_tx;
pthread_cond_t cond_rf_tx;
/// \internal This variable is protected by \ref mutex_rf_tx.
int instance_cnt_rf_tx;
#endif
#if defined(PRE_SCD_THREAD)
pthread_t pthread_pre_scd;
/// condition variable for time processing thread
pthread_cond_t cond_pre_scd;
/// mutex for time thread
pthread_mutex_t mutex_pre_scd;
int instance_pre_scd;
#endif
/// pipeline ready state
int ru_rx_ready;
int ru_tx_ready;
......
......@@ -33,11 +33,6 @@
#ifndef __PHY_IMPLEMENTATION_DEFS_LTE_H__
#define __PHY_IMPLEMENTATION_DEFS_LTE_H__
typedef struct {
/// \brief Holds the transmit data in the frequency domain.
/// - first index: rx antenna [0..nb_antennas_rx[
......@@ -73,9 +68,4 @@ typedef struct {
int32_t **tdd_calib_coeffs;
} RU_COMMON;
#endif
This diff is collapsed.
......@@ -336,6 +336,29 @@ unsigned char ul_ACK_subframe2_dl_subframe(LTE_DL_FRAME_PARMS *frame_parms,unsig
return(0);
}
int ul_ACK_subframe2_dl_frame(LTE_DL_FRAME_PARMS *frame_parms,int frame, unsigned char subframe,unsigned char subframe_tx)
{
if (frame_parms->frame_type == FDD) {
return (((subframe_tx > subframe ) ? frame-1 : frame)+1024)%1024;
} else {
switch (frame_parms->tdd_config) {
case 1:
return(((subframe_tx > subframe ) ? frame-1 : frame)+1024)%1024;
break;
case 3:
//TODO
break;
case 4:
//TODO
break;
}
}
return(0);
}
unsigned char ul_ACK_subframe2_M(LTE_DL_FRAME_PARMS *frame_parms,unsigned char subframe)
{
......@@ -343,6 +366,23 @@ unsigned char ul_ACK_subframe2_M(LTE_DL_FRAME_PARMS *frame_parms,unsigned char s
return(1);
} else {
switch (frame_parms->tdd_config) {
case 1:
return 1; // don't ACK special subframe for now
if (subframe == 2) { // ACK subframes 5 and 6
return(2);
} else if (subframe == 3) { // ACK subframe 9
return(1); // To be updated
} else if (subframe == 7) { // ACK subframes 0 and 1
return(2); // To be updated
} else if (subframe == 8) { // ACK subframe 4
return(1); // To be updated
} else {
LOG_E(PHY,"phy_procedures_lte_common.c/subframe2_dl_harq_pid: illegal subframe %d for tdd_config %d\n",
subframe,frame_parms->tdd_config);
return(0);
}
break;
case 3:
if (subframe == 2) { // ACK subframes 5 and 6
return(2); // should be 3
......@@ -381,23 +421,6 @@ unsigned char ul_ACK_subframe2_M(LTE_DL_FRAME_PARMS *frame_parms,unsigned char s
}
break;
case 1:
if (subframe == 2) { // ACK subframes 5 and 6
return(2);
} else if (subframe == 3) { // ACK subframe 9
return(1); // To be updated
} else if (subframe == 7) { // ACK subframes 0 and 1
return(2); // To be updated
} else if (subframe == 8) { // ACK subframe 4
return(1); // To be updated
} else {
LOG_E(PHY,"phy_procedures_lte_common.c/subframe2_dl_harq_pid: illegal subframe %d for tdd_config %d\n",
subframe,frame_parms->tdd_config);
return(0);
}
break;
}
}
......
This diff is collapsed.
......@@ -111,7 +111,7 @@ void feptx0(RU_t *ru,int slot) {
}
*/
// TDD: turn on tx switch N_TA_offset before by setting buffer in these samples to 0
if ((slot == 0) &&
/* if ((slot == 0) &&
(fp->frame_type == TDD) &&
((fp->tdd_config==0) ||
(fp->tdd_config==1) ||
......@@ -128,7 +128,7 @@ void feptx0(RU_t *ru,int slot) {
ru->common.txdata[aa][tx_offset] = 0x00000000;
}
}
}*/
}
VCD_SIGNAL_DUMPER_DUMP_FUNCTION_BY_NAME(VCD_SIGNAL_DUMPER_FUNCTIONS_PHY_PROCEDURES_RU_FEPTX_OFDM+slot , 0);
}
......
......@@ -322,9 +322,7 @@ LTE_DL_FRAME_PARMS *get_lte_frame_parms(module_id_t Mod_id, uint8_t CC_id);
MU_MIMO_mode* get_mu_mimo_mode (module_id_t Mod_id, uint8_t CC_id, rnti_t rnti);
int16_t get_hundred_times_delta_IF(PHY_VARS_UE *phy_vars_ue,uint8_t eNB_id,uint8_t harq_pid);
int16_t get_hundred_times_delta_IF_eNB(PHY_VARS_eNB *phy_vars_eNB,uint8_t UE_id,uint8_t harq_pid, uint8_t bw_factor);
int16_t get_hundred_times_delta_IF_eNB(PHY_VARS_eNB *phy_vars_eNB,uint16_t UE_id,uint8_t harq_pid, uint8_t bw_factor);
int16_t get_hundred_times_delta_IF_mac(module_id_t module_idP, uint8_t CC_id, rnti_t rnti, uint8_t harq_pid);
int16_t get_target_pusch_rx_power(module_id_t module_idP, uint8_t CC_id);
......
......@@ -208,7 +208,7 @@ LTE_eNB_UE_stats* get_UE_stats(uint8_t Mod_id, uint8_t CC_id,uint16_t rnti);
lte_subframe_t get_subframe_direction(uint8_t Mod_id,uint8_t CC_id,uint8_t subframe);
int16_t get_hundred_times_delta_IF_eNB(PHY_VARS_eNB *phy_vars_eNB,uint8_t UE_id,uint8_t harq_pid, uint8_t bw_factor);
int16_t get_hundred_times_delta_IF_eNB(PHY_VARS_eNB *phy_vars_eNB,uint16_t UE_id,uint8_t harq_pid, uint8_t bw_factor);
int16_t get_hundred_times_delta_IF_mac(module_id_t module_idP, uint8_t CC_id, rnti_t rnti, uint8_t harq_pid);
......
......@@ -252,7 +252,7 @@ void dump_dlsch_ra(PHY_VARS_UE *ue,UE_rxtx_proc_t *proc,uint8_t eNB_id,uint8_t s
write_output("dlsch_mag2.m","dlschmag2",ue->pdsch_vars_ra[0]->dl_ch_magb0,300*nsymb,1,1);
}
void phy_reset_ue(uint8_t Mod_id,uint8_t CC_id,uint8_t eNB_index)
void phy_reset_ue(module_id_t Mod_id,uint8_t CC_id,uint8_t eNB_index)
{
// This flushes ALL DLSCH and ULSCH harq buffers of ALL connected eNBs...add the eNB_index later
......@@ -352,7 +352,7 @@ void process_timing_advance_rar(PHY_VARS_UE *ue,UE_rxtx_proc_t *proc,uint16_t ti
}
void process_timing_advance(uint8_t Mod_id,uint8_t CC_id,int16_t timing_advance)
void process_timing_advance(module_id_t Mod_id,uint8_t CC_id,int16_t timing_advance)
{
// uint32_t frame = PHY_vars_UE_g[Mod_id]->frame;
......
......@@ -3426,6 +3426,7 @@ int main(int argc, char **argv)
re_allocated = dlsch_modulation(eNB,
eNB->common_vars.txdataF[eNB_id],
AMP,
frame,
subframe,
num_pdcch_symbols,
((TB0_active == 1)? eNB->dlsch[k][0]: NULL),
......
......@@ -2679,6 +2679,7 @@ PMI_FEEDBACK:
re_allocated = dlsch_modulation(eNB,
eNB->common_vars.txdataF[eNB_id],
AMP,
frame,
subframe,
num_pdcch_symbols,
eNB->dlsch[k][0],
......
......@@ -68,7 +68,7 @@ typedef int32_t sdu_size_t;
typedef uint32_t frame_t;
typedef int32_t sframe_t;
typedef uint32_t sub_frame_t;
typedef uint8_t module_id_t;
typedef uint16_t module_id_t;
typedef uint8_t slice_id_t;
typedef uint8_t eNB_index_t;
typedef uint16_t ue_id_t;
......
......@@ -123,9 +123,9 @@ typedef struct RrcConfigurationReq_s {
long pucch_delta_shift[MAX_NUM_CCs];
long pucch_nRB_CQI[MAX_NUM_CCs];
long pucch_nCS_AN[MAX_NUM_CCs];
#if (RRC_VERSION < MAKE_VERSION(10, 0, 0))
//#if (RRC_VERSION < MAKE_VERSION(10, 0, 0))
long pucch_n1_AN[MAX_NUM_CCs];
#endif
//#endif
long pdsch_referenceSignalPower[MAX_NUM_CCs];
long pdsch_p_b[MAX_NUM_CCs];
long pusch_n_SB[MAX_NUM_CCs];
......@@ -174,6 +174,7 @@ typedef struct RrcConfigurationReq_s {
long ue_TimersAndConstants_n310[MAX_NUM_CCs];
long ue_TimersAndConstants_n311[MAX_NUM_CCs];
long ue_TransmissionMode[MAX_NUM_CCs];
long ue_multiple_max[MAX_NUM_CCs];
//TTN - for D2D
//SIB18
......@@ -219,13 +220,10 @@ typedef struct RrcConfigurationReq_s {
char* discRxPoolPS_ResourceConfig_subframeBitmap_choice_bs_buf[MAX_NUM_CCs];
long discRxPoolPS_ResourceConfig_subframeBitmap_choice_bs_size[MAX_NUM_CCs];
long discRxPoolPS_ResourceConfig_subframeBitmap_choice_bs_bits_unused[MAX_NUM_CCs];
} RrcConfigurationReq;
#define MAX_NUM_NBIOT_CELEVELS 3
typedef struct NbIoTRrcConfigurationReq_s {
uint32_t cell_identity;
......
......@@ -53,7 +53,8 @@
#define CONFIG_STRING_MACRLC_REMOTE_S_PORTC "remote_s_portc"
#define CONFIG_STRING_MACRLC_LOCAL_S_PORTD "local_s_portd"
#define CONFIG_STRING_MACRLC_REMOTE_S_PORTD "remote_s_portd"
#define CONFIG_STRING_MACRLC_SCHED_MODE "scheduler_mode"
#define CONFIG_STRING_MACRLC_PHY_TEST_MODE "phy_test_mode"
/*-------------------------------------------------------------------------------------------------------------------------------------------------------*/
/* MacRLC configuration parameters */
......@@ -77,6 +78,8 @@
{CONFIG_STRING_MACRLC_REMOTE_S_PORTC, NULL, 0, uptr:NULL, defintval:50020, TYPE_UINT, 0}, \
{CONFIG_STRING_MACRLC_LOCAL_S_PORTD, NULL, 0, uptr:NULL, defintval:50021, TYPE_UINT, 0}, \
{CONFIG_STRING_MACRLC_REMOTE_S_PORTD, NULL, 0, uptr:NULL, defintval:50021, TYPE_UINT, 0}, \
{CONFIG_STRING_MACRLC_SCHED_MODE, NULL, 0, strptr:NULL, defstrval:"default", TYPE_STRING, 0}, \
{CONFIG_STRING_MACRLC_PHY_TEST_MODE, NULL, 0, uptr:NULL, defintval:1, TYPE_UINT, 0}, \
}
#define MACRLC_CC_IDX 0
#define MACRLC_TRANSPORT_N_PREFERENCE_IDX 1
......@@ -95,4 +98,6 @@
#define MACRLC_REMOTE_S_PORTC_IDX 14
#define MACRLC_LOCAL_S_PORTD_IDX 15
#define MACRLC_REMOTE_S_PORTD_IDX 16
#define MACRLC_SCHED_MODE_IDX 17
#define MACRLC_PHY_TEST_IDX 18
/*---------------------------------------------------------------------------------------------------------------------------------------------------------*/
......@@ -102,6 +102,7 @@ void RCconfig_flexran()
ue_TimersAndConstants_n310, ue_TimersAndConstants_n311,
ue_TransmissionMode;
int32_t ue_multiple_max = 0;
e_SL_CP_Len_r12 rxPool_sc_CP_Len;
e_SL_PeriodComm_r12 rxPool_sc_Period;
......@@ -427,7 +428,17 @@ void RCconfig_macrlc() {
printf("**************** RETURNED FROM configure_nfapi_vnf() vnf_port:%d\n", RC.mac[j]->eth_params_s.my_portc);
} else { // other midhaul
AssertFatal(1==0,"MACRLC %d: %s unknown southbound midhaul\n",j,*(MacRLC_ParamList.paramarray[j][MACRLC_TRANSPORT_S_PREFERENCE_IDX].strptr));
}
}
if (strcmp(*(MacRLC_ParamList.paramarray[j][MACRLC_SCHED_MODE_IDX].strptr), "default") == 0){
global_scheduler_mode=SCHED_MODE_DEFAULT;
printf("sched mode = default %d [%s]\n",global_scheduler_mode,*(MacRLC_ParamList.paramarray[j][MACRLC_SCHED_MODE_IDX].strptr));
}else if (strcmp(*(MacRLC_ParamList.paramarray[j][MACRLC_SCHED_MODE_IDX].strptr), "fairRR") == 0){
global_scheduler_mode=SCHED_MODE_FAIR_RR;
printf("sched mode = fairRR %d [%s]\n",global_scheduler_mode,*(MacRLC_ParamList.paramarray[j][MACRLC_SCHED_MODE_IDX].strptr));
}else{
global_scheduler_mode=SCHED_MODE_DEFAULT;
printf("sched mode = default %d [%s]\n",global_scheduler_mode,*(MacRLC_ParamList.paramarray[j][MACRLC_SCHED_MODE_IDX].strptr));
}
}// j=0..num_inst
} else {// MacRLC_ParamList.numelt > 0
AssertFatal (0,
......@@ -521,6 +532,8 @@ int RCconfig_RRC(MessageDef *msg_p, uint32_t i, eNB_RRC_INST *rrc) {
int32_t ue_TimersAndConstants_n311 = 0;
int32_t ue_TransmissionMode = 0;
int32_t ue_multiple_max = 0;
//TTN - for D2D
//SIB18
const char* rxPool_sc_CP_Len = NULL;
......@@ -567,7 +580,6 @@ int RCconfig_RRC(MessageDef *msg_p, uint32_t i, eNB_RRC_INST *rrc) {
libconfig_int discRxPoolPS_ResourceConfig_subframeBitmap_choice_bs_size = 0;
libconfig_int discRxPoolPS_ResourceConfig_subframeBitmap_choice_bs_bits_unused = 0;
int32_t srb1_timer_poll_retransmit = 0;
int32_t srb1_timer_reordering = 0;
int32_t srb1_timer_status_prohibit = 0;
......@@ -918,13 +930,11 @@ int RCconfig_RRC(MessageDef *msg_p, uint32_t i, eNB_RRC_INST *rrc) {
RC.config_file_name, i, prach_zero_correlation);
RRC_CONFIGURATION_REQ (msg_p).prach_freq_offset[j] = prach_freq_offset;
if ((prach_freq_offset <0) || (prach_freq_offset > 94))
AssertFatal (0,
"Failed to parse eNB configuration file %s, enb %d unknown value \"%d\" for prach_freq_offset choice: 0..94!\n",
RC.config_file_name, i, prach_freq_offset);
RRC_CONFIGURATION_REQ (msg_p).pucch_delta_shift[j] = pucch_delta_shift-1;
if ((pucch_delta_shift <1) || (pucch_delta_shift > 3))
......@@ -946,7 +956,7 @@ int RCconfig_RRC(MessageDef *msg_p, uint32_t i, eNB_RRC_INST *rrc) {
"Failed to parse eNB configuration file %s, enb %d unknown value \"%d\" for pucch_nCS_AN choice: 0..7!\n",
RC.config_file_name, i, pucch_nCS_AN);
#if (RRC_VERSION < MAKE_VERSION(10, 0, 0))
//#if (RRC_VERSION < MAKE_VERSION(10, 0, 0))
RRC_CONFIGURATION_REQ (msg_p).pucch_n1_AN[j] = pucch_n1_AN;
if ((pucch_n1_AN <0) || (pucch_n1_AN > 2047))
......@@ -954,7 +964,7 @@ int RCconfig_RRC(MessageDef *msg_p, uint32_t i, eNB_RRC_INST *rrc) {
"Failed to parse eNB configuration file %s, enb %d unknown value \"%d\" for pucch_n1_AN choice: 0..2047!\n",
RC.config_file_name, i, pucch_n1_AN);
#endif
//#endif
RRC_CONFIGURATION_REQ (msg_p).pdsch_referenceSignalPower[j] = pdsch_referenceSignalPower;
if ((pdsch_referenceSignalPower <-60) || (pdsch_referenceSignalPower > 50))
......@@ -1580,6 +1590,34 @@ int RCconfig_RRC(MessageDef *msg_p, uint32_t i, eNB_RRC_INST *rrc) {
break;
}
RRC_CONFIGURATION_REQ (msg_p).ue_multiple_max[j] = ue_multiple_max;
switch (N_RB_DL) {
case 25:
if ((ue_multiple_max < 1) || (ue_multiple_max > 4))
AssertFatal (0,
"Failed to parse eNB configuration file %s, enb %d unknown value \"%d\" for ue_multiple_max choice: 1..4!\n",
RC.config_file_name, i, ue_multiple_max);
break;
case 50:
if ((ue_multiple_max < 1) || (ue_multiple_max > 8))
AssertFatal (0,
"Failed to parse eNB configuration file %s, enb %d unknown value \"%d\" for ue_multiple_max choice: 1..8!\n",
RC.config_file_name, i, ue_multiple_max);
break;
case 100:
if ((ue_multiple_max < 1) || (ue_multiple_max > 16))
AssertFatal (0,
"Failed to parse eNB configuration file %s, enb %d unknown value \"%d\" for ue_multiple_max choice: 1..16!\n",
RC.config_file_name, i, ue_multiple_max);
break;
default:
AssertFatal (0,
"Failed to parse eNB configuration file %s, enb %d unknown value \"%d\" for N_RB_DL choice: 25,50,100 !\n",
RC.config_file_name, i, N_RB_DL);
break;
}
//TTN - for D2D
//SIB18
if (strcmp(rxPool_sc_CP_Len,"normal")==0) {
......
......@@ -304,6 +304,7 @@ typedef enum {
#define ENB_CONFIG_STRING_UETIMERS_N310 "ue_TimersAndConstants_n310"
#define ENB_CONFIG_STRING_UETIMERS_N311 "ue_TimersAndConstants_n311"
#define ENB_CONFIG_STRING_UE_TRANSMISSION_MODE "ue_TransmissionMode"
#define ENB_CONFIG_STRING_UE_MULTIPLE_MAX "ue_multiple_max"
//TTN - for D2D
//SIB18
......@@ -490,7 +491,7 @@ typedef enum {
{ENB_CONFIG_STRING_PUCCH_DELTA_SHIFT, NULL, 0, iptr:&pucch_delta_shift, defintval:1, TYPE_UINT, 0}, \
{ENB_CONFIG_STRING_PUCCH_NRB_CQI, NULL, 0, iptr:&pucch_nRB_CQI, defintval:1, TYPE_UINT, 0}, \
{ENB_CONFIG_STRING_PUCCH_NCS_AN, NULL, 0, iptr:&pucch_nCS_AN, defintval:0, TYPE_UINT, 0}, \
{ENB_CONFIG_STRING_PUCCH_N1_AN, NULL, 0, iptr:&pucch_n1_AN, defintval:32, TYPE_UINT, 0}, \
{ENB_CONFIG_STRING_PUCCH_N1_AN, NULL, 0, iptr:&pucch_n1_AN, defintval:0, TYPE_UINT, 0}, \
{ENB_CONFIG_STRING_PDSCH_RS_EPRE, NULL, 0, iptr:&pdsch_referenceSignalPower, defintval:-29, TYPE_INT, 0}, \
{ENB_CONFIG_STRING_PDSCH_PB, NULL, 0, iptr:&pdsch_p_b, defintval:0, TYPE_INT, 0}, \
{ENB_CONFIG_STRING_PUSCH_N_SB, NULL, 0, iptr:&pusch_n_SB, defintval:1, TYPE_INT, 0}, \
......@@ -538,6 +539,7 @@ typedef enum {
{ENB_CONFIG_STRING_UETIMERS_N310, NULL, 0, iptr:&ue_TimersAndConstants_n310, defintval:20, TYPE_UINT, 0}, \
{ENB_CONFIG_STRING_UETIMERS_N311, NULL, 0, iptr:&ue_TimersAndConstants_n311, defintval:1, TYPE_UINT, 0}, \
{ENB_CONFIG_STRING_UE_TRANSMISSION_MODE, NULL, 0, iptr:&ue_TransmissionMode, defintval:1, TYPE_UINT, 0}, \
{ENB_CONFIG_STRING_UE_MULTIPLE_MAX, NULL, 0, iptr:&ue_multiple_max, defintval:4, TYPE_UINT, 0}, \
{ENB_CONFIG_STRING_RXPOOL_SC_CP_LEN, NULL, 0, strptr:(char **)&rxPool_sc_CP_Len, defstrval:"normal", TYPE_STRING, 0}, \
{ENB_CONFIG_STRING_RXPOOL_SC_PRIOD, NULL, 0, strptr:(char **)&rxPool_sc_Period, defstrval:"sf40", TYPE_STRING, 0}, \
{ENB_CONFIG_STRING_RXPOOL_DATA_CP_LEN, NULL, 0, strptr:(char **)&rxPool_data_CP_Len, defstrval:"normal", TYPE_STRING, 0}, \
......@@ -826,9 +828,9 @@ typedef enum {
#define CONFIG_STRING_MACRLC_REMOTE_S_PORTC "remote_s_portc"
#define CONFIG_STRING_MACRLC_LOCAL_S_PORTD "local_s_portd"
#define CONFIG_STRING_MACRLC_REMOTE_S_PORTD "remote_s_portd"
#define CONFIG_STRING_MACRLC_SCHED_MODE "scheduler_mode"
#define CONFIG_STRING_MACRLC_PHY_TEST_MODE "phy_test_mode"
#define MACRLC_CC_IDX 0
#define MACRLC_TRANSPORT_N_PREFERENCE_IDX 1
#define MACRLC_LOCAL_N_IF_NAME_IDX 2
......@@ -846,5 +848,6 @@ typedef enum {
#define MACRLC_REMOTE_S_PORTC_IDX 14
#define MACRLC_LOCAL_S_PORTD_IDX 15
#define MACRLC_REMOTE_S_PORTD_IDX 16
#define MACRLC_PHY_TEST_IDX 17
#define MACRLC_SCHED_MODE_IDX 17
#define MACRLC_PHY_TEST_IDX 18
/*---------------------------------------------------------------------------------------------------------------------------------------------------------*/
......@@ -218,7 +218,7 @@ void config_mib(int Mod_idP,
cfg->rf_config.dl_channel_bandwidth.value = to_prb(dl_BandwidthP);
cfg->rf_config.dl_channel_bandwidth.tl.tag = NFAPI_RF_CONFIG_DL_CHANNEL_BANDWIDTH_TAG;
cfg->num_tlv++;
LOG_E(PHY,"%s() dl_BandwidthP:%d\n", __FUNCTION__, dl_BandwidthP);
LOG_D(PHY,"%s() dl_BandwidthP:%d\n", __FUNCTION__, dl_BandwidthP);
cfg->rf_config.ul_channel_bandwidth.value = to_prb(dl_BandwidthP);
cfg->rf_config.ul_channel_bandwidth.tl.tag = NFAPI_RF_CONFIG_UL_CHANNEL_BANDWIDTH_TAG;
......@@ -727,7 +727,7 @@ rrc_mac_config_req_eNB(module_id_t Mod_idP,
VCD_SIGNAL_DUMPER_DUMP_FUNCTION_BY_NAME(VCD_SIGNAL_DUMPER_FUNCTIONS_RRC_MAC_CONFIG, VCD_FUNCTION_IN);
LOG_E(MAC, "RC.mac:%p mib:%p\n", RC.mac, mib);
LOG_D(MAC, "RC.mac:%p mib:%p\n", RC.mac, mib);
if (mib != NULL) {
if (RC.mac == NULL)
......@@ -962,8 +962,8 @@ rrc_mac_config_req_eNB(module_id_t Mod_idP,
}
#endif
LOG_E(MAC, "%s() %s:%d RC.mac[Mod_idP]->if_inst->PHY_config_req:%p\n", __FUNCTION__, __FILE__, __LINE__, RC.mac[Mod_idP]->if_inst->PHY_config_req);
LOG_D(MAC, "%s() %s:%d RC.mac[Mod_idP]->if_inst->PHY_config_req:%p\n", __FUNCTION__, __FILE__, __LINE__, RC.mac[Mod_idP]->if_inst->PHY_config_req);
// if in nFAPI mode
if (
......@@ -987,6 +987,7 @@ rrc_mac_config_req_eNB(module_id_t Mod_idP,
VCD_SIGNAL_DUMPER_DUMP_FUNCTION_BY_NAME(VCD_SIGNAL_DUMPER_FUNCTIONS_RRC_MAC_CONFIG, VCD_FUNCTION_OUT);
}
RC.mac[Mod_idP]->scheduler_mode = global_scheduler_mode;
return(0);
}
......@@ -51,6 +51,9 @@
#include "flexran_agent_extern.h"
#include "flexran_agent_mac.h"
/* for fair round robin SCHED */
#include "eNB_scheduler_fairRR.h"
#if defined(ENABLE_ITTI)
#include "intertask_interface.h"
#endif
......@@ -359,8 +362,9 @@ check_ul_failure(module_id_t module_idP, int CC_id, int UE_id,
// check uplink failure
if ((UE_list->UE_sched_ctrl[UE_id].ul_failure_timer > 0) &&
(UE_list->UE_sched_ctrl[UE_id].ul_out_of_sync == 0)) {
LOG_I(MAC, "UE %d rnti %x: UL Failure timer %d \n", UE_id, rnti,
UE_list->UE_sched_ctrl[UE_id].ul_failure_timer);
if (UE_list->UE_sched_ctrl[UE_id].ul_failure_timer == 1)
LOG_I(MAC, "UE %d rnti %x: UL Failure timer %d \n", UE_id, rnti,
UE_list->UE_sched_ctrl[UE_id].ul_failure_timer);
if (UE_list->UE_sched_ctrl[UE_id].ra_pdcch_order_sent == 0) {
UE_list->UE_sched_ctrl[UE_id].ra_pdcch_order_sent = 1;
......@@ -385,23 +389,24 @@ check_ul_failure(module_id_t module_idP, int CC_id, int UE_id,
DL_req[CC_id].dl_config_request_body.number_dci++;
DL_req[CC_id].dl_config_request_body.number_pdu++;
DL_req[CC_id].dl_config_request_body.tl.tag = NFAPI_DL_CONFIG_REQUEST_BODY_TAG;
LOG_I(MAC,
LOG_D(MAC,
"UE %d rnti %x: sending PDCCH order for RAPROC (failure timer %d), resource_block_coding %d \n",
UE_id, rnti,
UE_list->UE_sched_ctrl[UE_id].ul_failure_timer,
dl_config_pdu->dci_dl_pdu.
dci_dl_pdu_rel8.resource_block_coding);
} else { // ra_pdcch_sent==1
LOG_I(MAC,
LOG_D(MAC,
"UE %d rnti %x: sent PDCCH order for RAPROC waiting (failure timer %d) \n",
UE_id, rnti,
UE_list->UE_sched_ctrl[UE_id].ul_failure_timer);
if ((UE_list->UE_sched_ctrl[UE_id].ul_failure_timer % 40) == 0) UE_list->UE_sched_ctrl[UE_id].ra_pdcch_order_sent = 0; // resend every 4 frames
if ((UE_list->UE_sched_ctrl[UE_id].ul_failure_timer % 80) == 0) UE_list->UE_sched_ctrl[UE_id].ra_pdcch_order_sent = 0; // resend every 8 frames
}
UE_list->UE_sched_ctrl[UE_id].ul_failure_timer++;
// check threshold
if (UE_list->UE_sched_ctrl[UE_id].ul_failure_timer > 20000) {
if (UE_list->UE_sched_ctrl[UE_id].ul_failure_timer > 4000) {
// note: probably ul_failure_timer should be less than UE radio link failure time(see T310/N310/N311)
// inform RRC of failure and clear timer
LOG_I(MAC,
"UE %d rnti %x: UL Failure after repeated PDCCH orders: Triggering RRC \n",
......@@ -436,7 +441,7 @@ clear_nfapi_information(eNB_MAC_INST * eNB, int CC_idP,
{
nfapi_dl_config_request_t *DL_req = &eNB->DL_req[0];
nfapi_ul_config_request_t *UL_req = &eNB->UL_req[0];
nfapi_hi_dci0_request_t *HI_DCI0_req = &eNB->HI_DCI0_req[0];
nfapi_hi_dci0_request_t *HI_DCI0_req = &eNB->HI_DCI0_req[CC_idP][subframeP];
nfapi_tx_request_t *TX_req = &eNB->TX_req[0];
eNB->pdu_index[CC_idP] = 0;
......@@ -449,8 +454,8 @@ clear_nfapi_information(eNB_MAC_INST * eNB, int CC_idP,
DL_req[CC_idP].dl_config_request_body.number_pdsch_rnti = 0;
DL_req[CC_idP].dl_config_request_body.transmission_power_pcfich = 6000;
HI_DCI0_req[CC_idP].hi_dci0_request_body.sfnsf = subframeP + (frameP<<4);
HI_DCI0_req[CC_idP].hi_dci0_request_body.number_of_dci = 0;
HI_DCI0_req->hi_dci0_request_body.sfnsf = subframeP + (frameP<<4);
HI_DCI0_req->hi_dci0_request_body.number_of_dci = 0;
UL_req[CC_idP].ul_config_request_body.number_of_pdus = 0;
......@@ -570,14 +575,21 @@ eNB_dlsch_ulsch_scheduler(module_id_t module_idP, frame_t frameP,
if(RC.mac[module_idP]->UE_list.UE_sched_ctrl[i].ue_reestablishment_reject_timer >=
RC.mac[module_idP]->UE_list.UE_sched_ctrl[i].ue_reestablishment_reject_timer_thres) {
RC.mac[module_idP]->UE_list.UE_sched_ctrl[i].ue_reestablishment_reject_timer = 0;
for (int ue_id_l = 0; ue_id_l < MAX_MOBILES_PER_ENB; ue_id_l++) {
if (reestablish_rnti_map[ue_id_l][0] == rnti) {
// clear currentC-RNTI from map
reestablish_rnti_map[ue_id_l][0] = 0;
reestablish_rnti_map[ue_id_l][1] = 0;
break;
//clear reestablish_rnti_map
if(RC.mac[module_idP]->UE_list.UE_sched_ctrl[i].ue_reestablishment_reject_timer_thres >20){
for (int ue_id_l = 0; ue_id_l < MAX_MOBILES_PER_ENB; ue_id_l++) {
if (reestablish_rnti_map[ue_id_l][0] == rnti) {
// clear currentC-RNTI from map
reestablish_rnti_map[ue_id_l][0] = 0;
reestablish_rnti_map[ue_id_l][1] = 0;
break;
}
}
}
PROTOCOL_CTXT_SET_BY_MODULE_ID(&ctxt, module_idP, ENB_FLAG_YES, rnti, 0, 0,module_idP);
rrc_rlc_remove_ue(&ctxt);
pdcp_remove_UE(&ctxt);
}
// Note: This should not be done in the MAC!
for (int ii=0; ii<MAX_MOBILES_PER_ENB; ii++) {
LTE_eNB_ULSCH_t *ulsch = RC.eNB[module_idP][CC_id]->ulsch[ii];
......@@ -617,13 +629,15 @@ eNB_dlsch_ulsch_scheduler(module_id_t module_idP, frame_t frameP,
}
}
}
#if (!defined(PRE_SCD_THREAD))
PROTOCOL_CTXT_SET_BY_MODULE_ID(&ctxt, module_idP, ENB_FLAG_YES,
NOT_A_RNTI, frameP, subframeP,
module_idP);
pdcp_run(&ctxt);
rrc_rx_tx(&ctxt, CC_id);
#endif
#if (RRC_VERSION >= MAKE_VERSION(10, 0, 0))
......@@ -637,6 +651,22 @@ eNB_dlsch_ulsch_scheduler(module_id_t module_idP, frame_t frameP,
#endif
static int debug_flag=0;
void (*schedule_ulsch_p)(module_id_t module_idP, frame_t frameP, sub_frame_t subframe);
void (*schedule_ue_spec_p)(module_id_t module_idP, frame_t frameP, sub_frame_t subframe, int *mbsfn_flag);
if(RC.mac[module_idP]->scheduler_mode == SCHED_MODE_DEFAULT){
schedule_ulsch_p = schedule_ulsch;
schedule_ue_spec_p = schedule_dlsch;
}else if(RC.mac[module_idP]->scheduler_mode == SCHED_MODE_FAIR_RR){
memset(dlsch_ue_select, 0, sizeof(dlsch_ue_select));
schedule_ulsch_p = schedule_ulsch_fairRR;
schedule_ue_spec_p = schedule_ue_spec_fairRR;
}
if(debug_flag==0){
LOG_E(MAC,"SCHED_MODE=%d\n",RC.mac[module_idP]->scheduler_mode);
debug_flag=1;
}
// This schedules MIB
if ((subframeP == 0) && (frameP & 3) == 0)
......@@ -653,13 +683,13 @@ eNB_dlsch_ulsch_scheduler(module_id_t module_idP, frame_t frameP,
// This schedules SRS in subframeP
schedule_SRS(module_idP, frameP, subframeP);
// This schedules ULSCH in subframeP (dci0)
schedule_ulsch(module_idP, frameP, subframeP);
schedule_ulsch_p(module_idP, frameP, subframeP);
// This schedules UCI_SR in subframeP
schedule_SR(module_idP, frameP, subframeP);
// This schedules UCI_CSI in subframeP
schedule_CSI(module_idP, frameP, subframeP);
// This schedules DLSCH in subframeP
schedule_dlsch(module_idP, frameP, subframeP, mbsfn_status);
schedule_ue_spec_p(module_idP, frameP, subframeP, mbsfn_status);
}
else{
schedule_ulsch_phy_test(module_idP,frameP,subframeP);
......@@ -670,8 +700,10 @@ eNB_dlsch_ulsch_scheduler(module_id_t module_idP, frame_t frameP,
flexran_agent_send_update_stats(module_idP);
// Allocate CCEs for good after scheduling is done
for (CC_id = 0; CC_id < MAX_NUM_CCs; CC_id++)
allocate_CCEs(module_idP, CC_id, subframeP, 0);
for (CC_id = 0; CC_id < MAX_NUM_CCs; CC_id++) {
if(cc[CC_id].tdd_Config == NULL || !(is_UL_sf(&cc[CC_id],subframeP)))
allocate_CCEs(module_idP, CC_id, frameP, subframeP, 2);
}
stop_meas(&RC.mac[module_idP]->eNB_scheduler);
......
This diff is collapsed.
......@@ -368,21 +368,23 @@ set_ul_DAI(int module_idP, int UE_idP, int CC_idP, int frameP,
case 1:
switch (subframeP) {
case 0:
case 1:
UE_list->UE_template[CC_idP][UE_idP].DAI_ul[7] = DAI;
break;
case 4:
UE_list->UE_template[CC_idP][UE_idP].DAI_ul[8] = DAI;
break;
UE_list->UE_template[CC_idP][UE_idP].DAI_ul[8] = DAI;
break;
case 5:
case 6:
UE_list->UE_template[CC_idP][UE_idP].DAI_ul[2] = DAI;
break;
UE_list->UE_template[CC_idP][UE_idP].DAI_ul[2] = DAI;
break;
case 9:
UE_list->UE_template[CC_idP][UE_idP].DAI_ul[3] = DAI;
break;
UE_list->UE_template[CC_idP][UE_idP].DAI_ul[3] = DAI;
break;
}
case 2:
......@@ -632,8 +634,7 @@ schedule_ue_spec(module_id_t module_idP,slice_id_t slice_idP,
break;
case 6:
case 7:
if ((tdd_sfa != 1) && (tdd_sfa != 2) && (tdd_sfa != 4)
&& (tdd_sfa != 5))
if ((tdd_sfa != 3) && (tdd_sfa != 4) && (tdd_sfa != 5))
return;
break;
case 8:
......@@ -642,8 +643,7 @@ schedule_ue_spec(module_id_t module_idP,slice_id_t slice_idP,
return;
break;
case 9:
if ((tdd_sfa != 1) && (tdd_sfa != 3) && (tdd_sfa != 4)
&& (tdd_sfa != 6))
if (tdd_sfa == 0)
return;
break;
......@@ -772,8 +772,7 @@ schedule_ue_spec(module_id_t module_idP,slice_id_t slice_idP,
nb_available_rb = ue_sched_ctl->pre_nb_available_rbs[CC_id];
if (cc->tdd_Config) harq_pid = ((frameP * 10) + subframeP) % 10;
else harq_pid = ((frameP * 10) + subframeP) & 7;
harq_pid = frame_subframe2_dl_harq_pid(cc->tdd_Config,frameP ,subframeP);
round = ue_sched_ctl->round[CC_id][harq_pid];
......@@ -832,7 +831,7 @@ schedule_ue_spec(module_id_t module_idP,slice_id_t slice_idP,
if (cc[CC_id].tdd_Config != NULL) {
UE_list->UE_template[CC_id][UE_id].DAI++;
update_ul_dci(module_idP, CC_id, rnti,
UE_list->UE_template[CC_id][UE_id].DAI);
UE_list->UE_template[CC_id][UE_id].DAI, subframeP);
LOG_D(MAC,
"DAI update: CC_id %d subframeP %d: UE %d, DAI %d\n",
CC_id, subframeP, UE_id,
......@@ -1025,6 +1024,57 @@ schedule_ue_spec(module_id_t module_idP,slice_id_t slice_idP,
#endif
);
pthread_mutex_lock(&rrc_release_freelist);
if((rrc_release_info.num_UEs > 0) && (rlc_am_mui.rrc_mui_num > 0)){
uint16_t release_total = 0;
for(uint16_t release_num = 0;release_num < NUMBER_OF_UE_MAX;release_num++){
if(rrc_release_info.RRC_release_ctrl[release_num].flag > 0){
release_total++;
}else{
continue;
}
if(rrc_release_info.RRC_release_ctrl[release_num].flag == 1){
if(rrc_release_info.RRC_release_ctrl[release_num].rnti == rnti){
for(uint16_t mui_num = 0;mui_num < rlc_am_mui.rrc_mui_num;mui_num++){
if(rrc_release_info.RRC_release_ctrl[release_num].rrc_eNB_mui == rlc_am_mui.rrc_mui[mui_num]){
rrc_release_info.RRC_release_ctrl[release_num].flag = 3;
LOG_D(MAC,"DLSCH Release send:index %d rnti %x mui %d mui_num %d flag 1->3\n",release_num,rnti,rlc_am_mui.rrc_mui[mui_num],mui_num);
break;
}
}
}
}
if(rrc_release_info.RRC_release_ctrl[release_num].flag == 2){
if(rrc_release_info.RRC_release_ctrl[release_num].rnti == rnti){
for(uint16_t mui_num = 0;mui_num < rlc_am_mui.rrc_mui_num;mui_num++){
if(rrc_release_info.RRC_release_ctrl[release_num].rrc_eNB_mui == rlc_am_mui.rrc_mui[mui_num]){
rrc_release_info.RRC_release_ctrl[release_num].flag = 4;
LOG_D(MAC,"DLSCH Release send:index %d rnti %x mui %d mui_num %d flag 2->4\n",release_num,rnti,rlc_am_mui.rrc_mui[mui_num],mui_num);
break;
}
}
}
}
if(release_total >= rrc_release_info.num_UEs)
break;
}
}
pthread_mutex_unlock(&rrc_release_freelist);
RA_t *ra = &eNB->common_channels[CC_id].ra[0];
for (uint8_t ra_ii = 0; ra_ii < NB_RA_PROC_MAX; ra_ii++) {
if((ra[ra_ii].rnti == rnti) && (ra[ra_ii].state == MSGCRNTI)){
for(uint16_t mui_num = 0;mui_num < rlc_am_mui.rrc_mui_num;mui_num++){
if(ra[ra_ii].crnti_rrc_mui == rlc_am_mui.rrc_mui[mui_num]){
ra[ra_ii].crnti_harq_pid = harq_pid;
ra[ra_ii].state = MSGCRNTI_ACK;
break;
}
}
}
}
T(T_ENB_MAC_UE_DL_SDU, T_INT(module_idP),
T_INT(CC_id), T_INT(rnti), T_INT(frameP),
T_INT(subframeP), T_INT(harq_pid), T_INT(DCCH),
......@@ -1368,8 +1418,8 @@ schedule_ue_spec(module_id_t module_idP,slice_id_t slice_idP,
if (cc[CC_id].tdd_Config != NULL) { // TDD
UE_list->UE_template[CC_id][UE_id].DAI++;
update_ul_dci(module_idP, CC_id, rnti,
UE_list->UE_template[CC_id][UE_id].
DAI);
UE_list->UE_template[CC_id][UE_id].DAI,
subframeP);
}
// do PUCCH power control
......@@ -1583,8 +1633,7 @@ fill_DLSCH_dci(module_id_t module_idP,
// clear scheduling flag
eNB_dlsch_info[module_idP][CC_id][UE_id].status = S_DL_WAITING;
rnti = UE_RNTI(module_idP, UE_id);
if (cc->tdd_Config) harq_pid = ((frameP * 10) + subframeP) % 10;
else harq_pid = ((frameP * 10) + subframeP) & 7;
harq_pid = frame_subframe2_dl_harq_pid(cc->tdd_Config,frameP ,subframeP);
nb_rb = UE_list->UE_template[CC_id][UE_id].nb_rb[harq_pid];
/// Synchronizing rballoc with rballoc_sub
......@@ -1663,12 +1712,12 @@ unsigned char *get_dlsch_sdu(module_id_t module_idP,
//------------------------------------------------------------------------------
void
update_ul_dci(module_id_t module_idP,
uint8_t CC_idP, rnti_t rntiP, uint8_t daiP)
uint8_t CC_idP, rnti_t rntiP, uint8_t daiP, sub_frame_t subframe)
//------------------------------------------------------------------------------
{
nfapi_hi_dci0_request_t *HI_DCI0_req =
&RC.mac[module_idP]->HI_DCI0_req[CC_idP];
&RC.mac[module_idP]->HI_DCI0_req[CC_idP][subframe];
nfapi_hi_dci0_request_pdu_t *hi_dci0_pdu =
&HI_DCI0_req->hi_dci0_request_body.hi_dci0_pdu_list[0];
COMMON_channels_t *cc = &RC.mac[module_idP]->common_channels[CC_idP];
......@@ -1677,7 +1726,7 @@ update_ul_dci(module_id_t module_idP,
if (cc->tdd_Config != NULL) { // TDD
for (i = 0;
i <HI_DCI0_req->hi_dci0_request_body.number_of_dci + HI_DCI0_req->hi_dci0_request_body.number_of_dci;
i <HI_DCI0_req->hi_dci0_request_body.number_of_dci + HI_DCI0_req->hi_dci0_request_body.number_of_hi;
i++) {
if ((hi_dci0_pdu[i].pdu_type == NFAPI_HI_DCI0_DCI_PDU_TYPE) &&
......@@ -1816,7 +1865,7 @@ void schedule_PCH(module_id_t module_idP,frame_t frameP,sub_frame_t subframeP)
LOG_D(MAC,"[eNB %d] Frame %d subframe %d: PCCH->PCH CC_id %d UE_id %d, Received %d bytes \n", module_idP, frameP, subframeP, CC_id,i, pcch_sdu_length);
#ifdef FORMAT1C
//NO SIB
if ((subframeP == 1 || subframeP == 2 || subframeP == 4 || subframeP == 6 || subframeP == 9) ||
if ((subframeP == 0 || subframeP == 1 || subframeP == 2 || subframeP == 4 || subframeP == 6 || subframeP == 9) ||
(subframeP == 5 && ((frameP % 2) != 0 && (frameP % 8) != 1))) {
switch (n_rb_dl) {
#if 0
......@@ -1935,7 +1984,7 @@ void schedule_PCH(module_id_t module_idP,frame_t frameP,sub_frame_t subframeP)
}
#else
//NO SIB
if ((subframeP == 1 || subframeP == 2 || subframeP == 4 || subframeP == 6 || subframeP == 9) ||
if ((subframeP == 0 || subframeP == 1 || subframeP == 2 || subframeP == 4 || subframeP == 6 || subframeP == 9) ||
(subframeP == 5 && ((frameP % 2) != 0 && (frameP % 8) != 1))) {
switch (n_rb_dl) {
case 25:
......@@ -2027,6 +2076,10 @@ void schedule_PCH(module_id_t module_idP,frame_t frameP,sub_frame_t subframeP)
LOG_D(MAC,"Frame %d: Subframe %d : Adding common DCI for P_RNTI\n", frameP,subframeP);
dl_req->number_dci++;
dl_req->number_pdu++;
dl_req->tl.tag = NFAPI_DL_CONFIG_REQUEST_BODY_TAG;
eNB->DL_req[CC_id].sfn_sf = frameP<<4 | subframeP;
eNB->DL_req[CC_id].header.message_id = NFAPI_DL_CONFIG_REQUEST;
dl_config_pdu = &dl_req->dl_config_pdu_list[dl_req->number_pdu];
memset((void*)dl_config_pdu,0,sizeof(nfapi_dl_config_request_pdu_t));
dl_config_pdu->pdu_type = NFAPI_DL_CONFIG_DLSCH_PDU_TYPE;
......@@ -2067,6 +2120,7 @@ void schedule_PCH(module_id_t module_idP,frame_t frameP,sub_frame_t subframeP)
TX_req->num_segments = 1;
TX_req->segments[0].segment_length = pcch_sdu_length;
TX_req->segments[0].segment_data = cc[CC_id].PCCH_pdu.payload;
eNB->TX_req[CC_id].tx_request_body.tl.tag = NFAPI_TX_REQUEST_BODY_TAG;
eNB->TX_req[CC_id].tx_request_body.number_of_pdus++;
} else {
LOG_E(MAC,"[eNB %d] CCid %d Frame %d, subframe %d : Cannot add DCI 1A/1C for Paging\n",module_idP, CC_id, frameP, subframeP);
......
This diff is collapsed.
/*
* Licensed to the OpenAirInterface (OAI) Software Alliance under one or more
* contributor license agreements. See the NOTICE file distributed with
* this work for additional information regarding copyright ownership.
* The OpenAirInterface Software Alliance licenses this file to You under
* the OAI Public License, Version 1.1 (the "License"); you may not use this file
* except in compliance with the License.
* You may obtain a copy of the License at
*
* http://www.openairinterface.org/?page_id=698
*
* Unless required by applicable law or agreed to in writing, software
* distributed under the License is distributed on an "AS IS" BASIS,
* WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
* See the License for the specific language governing permissions and
* limitations under the License.
*-------------------------------------------------------------------------------
* For more information about the OpenAirInterface (OAI) Software Alliance:
* contact@openairinterface.org
*/
/*! \file eNB_scheduler_fairRR.h
* \brief eNB scheduler fair round robin header
* \author Masayuki Harada
* \date 2018
* \email masayuki.harada@jp.fujitsu.com
* \version 1.0
* @ingroup _mac
*/
#ifndef __LAYER2_MAC_ENB_SCHEDULER_FAIRRR_H__
#define __LAYER2_MAC_ENB_SCHEDULER_FAIRRR_H__
/* define */
enum SCH_UE_PRIORITY {
SCH_PRIORITY_NONE,
SCH_DL_SI,
SCH_DL_PAGING,
SCH_DL_MSG2,
SCH_DL_MSG4,
SCH_UL_PRACH,
SCH_UL_MSG3,
SCH_DL_RETRANS,
SCH_UL_RETRANS,
SCH_DL_FIRST,
SCH_UL_FIRST,
SCH_UL_INACTIVE
};
typedef struct {
int UE_id;
enum SCH_UE_PRIORITY ue_priority;
rnti_t rnti;
uint16_t nb_rb;
} DLSCH_UE_INFO;
typedef struct {
uint16_t ue_num;
DLSCH_UE_INFO list[20];
} DLSCH_UE_SELECT;
typedef struct {
int UE_id;
enum SCH_UE_PRIORITY ue_priority;
uint8_t start_rb;
uint8_t nb_rb;
uint16_t ul_total_buffer;
} ULSCH_UE_INFO;
typedef struct {
uint8_t ue_num;
ULSCH_UE_INFO list[20];
} ULSCH_UE_SELECT;
/* proto */
void set_dl_ue_select_msg2(int CC_idP, uint16_t nb_rb, int UE_id, rnti_t rnti);
void set_dl_ue_select_msg4(int CC_idP, uint16_t nb_rb, int UE_id, rnti_t rnti);
void dlsch_scheduler_pre_ue_select_fairRR(
module_id_t module_idP,
frame_t frameP,
sub_frame_t subframeP,
int* mbsfn_flag,
uint16_t nb_rbs_required[MAX_NUM_CCs][NUMBER_OF_UE_MAX],
DLSCH_UE_SELECT dlsch_ue_select[MAX_NUM_CCs]);
void dlsch_scheduler_pre_processor_fairRR (module_id_t Mod_id,
frame_t frameP,
sub_frame_t subframeP,
int N_RBG[MAX_NUM_CCs],
int *mbsfn_flag);
void fill_DLSCH_dci_fairRR(
module_id_t module_idP,
frame_t frameP,
sub_frame_t subframeP,
int* mbsfn_flagP);
void schedule_ue_spec_fairRR(module_id_t module_idP,
frame_t frameP, sub_frame_t subframeP, int *mbsfn_flag);
void ulsch_scheduler_pre_ue_select_fairRR(
module_id_t module_idP,
frame_t frameP,
sub_frame_t subframeP,
sub_frame_t sched_subframeP,
ULSCH_UE_SELECT ulsch_ue_select[MAX_NUM_CCs]);
void ulsch_scheduler_pre_processor_fairRR(module_id_t module_idP,
frame_t frameP,
sub_frame_t subframeP,
sub_frame_t sched_subframeP,
ULSCH_UE_SELECT ulsch_ue_select[MAX_NUM_CCs]);
void schedule_ulsch_fairRR(module_id_t module_idP, frame_t frameP,
sub_frame_t subframeP);
void schedule_ulsch_rnti_fairRR(module_id_t module_idP,
frame_t frameP,
sub_frame_t subframeP,
unsigned char sched_subframeP,
ULSCH_UE_SELECT ulsch_ue_select[MAX_NUM_CCs]);
/* extern */
extern DLSCH_UE_SELECT dlsch_ue_select[MAX_NUM_CCs];
extern int last_dlsch_ue_id[MAX_NUM_CCs];
extern int last_ulsch_ue_id[MAX_NUM_CCs];
#endif
......@@ -213,7 +213,7 @@ void schedule_ulsch_phy_test(module_id_t module_idP,frame_t frameP,sub_frame_t s
if (sched_subframe<subframeP) sched_frame++;
nfapi_hi_dci0_request_body_t *hi_dci0_req = &eNB->HI_DCI0_req[CC_id].hi_dci0_request_body;
nfapi_hi_dci0_request_body_t *hi_dci0_req = &eNB->HI_DCI0_req[CC_id][subframeP].hi_dci0_request_body;
nfapi_hi_dci0_request_pdu_t *hi_dci0_pdu;
//nfapi_ul_config_request_pdu_t *ul_config_pdu = &ul_req->ul_config_pdu_list[0];;
......@@ -221,7 +221,7 @@ void schedule_ulsch_phy_test(module_id_t module_idP,frame_t frameP,sub_frame_t s
eNB->UL_req[CC_id].sfn_sf = (sched_frame<<4) + sched_subframe;
eNB->HI_DCI0_req[CC_id].sfn_sf = (frameP<<4)+subframeP;
eNB->HI_DCI0_req[CC_id][subframeP].sfn_sf = (frameP<<4)+subframeP;
for (CC_id=0; CC_id<MAX_NUM_CCs; CC_id++) {
//rnti = UE_RNTI(module_idP,UE_id);
......@@ -281,7 +281,7 @@ void schedule_ulsch_phy_test(module_id_t module_idP,frame_t frameP,sub_frame_t s
// save it for a potential retransmission
UE_template->cshift[harq_pid] = cshift;
hi_dci0_pdu = &hi_dci0_req->hi_dci0_pdu_list[eNB->HI_DCI0_req[CC_id].hi_dci0_request_body.number_of_dci+eNB->HI_DCI0_req[CC_id].hi_dci0_request_body.number_of_hi];
hi_dci0_pdu = &hi_dci0_req->hi_dci0_pdu_list[eNB->HI_DCI0_req[CC_id][subframeP].hi_dci0_request_body.number_of_dci+eNB->HI_DCI0_req[CC_id][subframeP].hi_dci0_request_body.number_of_hi];
memset((void*)hi_dci0_pdu,0,sizeof(nfapi_hi_dci0_request_pdu_t));
hi_dci0_pdu->pdu_type = NFAPI_HI_DCI0_DCI_PDU_TYPE;
hi_dci0_pdu->pdu_size = 2+sizeof(nfapi_hi_dci0_dci_pdu);
......@@ -300,7 +300,7 @@ void schedule_ulsch_phy_test(module_id_t module_idP,frame_t frameP,sub_frame_t s
hi_dci0_pdu->dci_pdu.dci_pdu_rel8.dl_assignment_index = UE_template->DAI_ul[sched_subframe];
eNB->HI_DCI0_req[CC_id].hi_dci0_request_body.number_of_dci++;
eNB->HI_DCI0_req[CC_id][subframeP].hi_dci0_request_body.number_of_dci++;
// Add UL_config PDUs
......
This diff is collapsed.
......@@ -87,7 +87,7 @@
#define PCCH_PAYLOAD_SIZE_MAX 128
#define RAR_PAYLOAD_SIZE_MAX 128
#define SCH_PAYLOAD_SIZE_MAX 4096
#define SCH_PAYLOAD_SIZE_MAX 8192
#define DCH_PAYLOAD_SIZE_MAX 4096
/// Logical channel ids from 36-311 (Note BCCH is not specified in 36-311, uses the same as first DRB)
......@@ -511,7 +511,9 @@ typedef enum {
MSG2,
WAITMSG3,
MSG4,
WAITMSG4ACK
WAITMSG4ACK,
MSGCRNTI,
MSGCRNTI_ACK
} RA_state;
/*!\brief UE ULSCH scheduling states*/
......@@ -541,6 +543,12 @@ typedef enum {
CBA_RS /// random allocation
} CBA_POLICY;
/*!\brief scheduler mode */
typedef enum {
SCHED_MODE_DEFAULT = 0, /// default cheduler
SCHED_MODE_FAIR_RR /// fair raund robin
} SCHEDULER_MODES;
/*! \brief temporary struct for ULSCH sched */
typedef struct {
......@@ -984,7 +992,9 @@ typedef struct {
uint8_t aperiodic_wideband_cqi1[NFAPI_CC_MAX];
uint8_t aperiodic_wideband_pmi1[NFAPI_CC_MAX];
uint8_t dl_cqi[NFAPI_CC_MAX];
int32_t uplane_inactivity_timer;
int32_t uplane_inactivity_timer;
uint8_t crnti_reconfigurationcomplete_flag;
uint8_t cqi_req_flag;
} UE_sched_ctrl;
/*! \brief eNB template for the Random access information */
typedef struct {
......@@ -1043,6 +1053,8 @@ typedef struct {
uint8_t msg2_narrowband;
uint8_t msg34_narrowband;
#endif
int32_t crnti_rrc_mui;
int8_t crnti_harq_pid;
} RA_t;
......@@ -1092,6 +1104,22 @@ typedef struct {
} UE_list_t;
/*! \brief deleting control information*/
typedef struct {
///rnti of UE
rnti_t rnti;
///remove UE context flag
boolean_t removeContextFlg;
} UE_free_ctrl;
/*! \brief REMOVE UE list used by eNB to order UEs/CC for deleting*/
typedef struct {
/// deleting control info
UE_free_ctrl UE_free_ctrl[NUMBER_OF_UE_MAX+1];
int num_UEs;
int head_freelist; ///the head position of the delete list
int tail_freelist; ///the tail position of the delete list
} UE_free_list_t;
/*! \brief eNB common channels */
typedef struct {
int physCellId;
......@@ -1180,7 +1208,7 @@ typedef struct eNB_MAC_INST_s {
/// Common cell resources
COMMON_channels_t common_channels[NFAPI_CC_MAX];
/// current PDU index (BCH,MCH,DLSCH)
uint16_t pdu_index[NFAPI_CC_MAX];
int16_t pdu_index[NFAPI_CC_MAX];
/// NFAPI Config Request Structure
nfapi_config_request_t config[NFAPI_CC_MAX];
......@@ -1201,9 +1229,9 @@ typedef struct eNB_MAC_INST_s {
nfapi_ul_config_request_t UL_req_tmp[NFAPI_CC_MAX][10];
/// Preallocated HI_DCI0 pdu list
nfapi_hi_dci0_request_pdu_t
hi_dci0_pdu_list[NFAPI_CC_MAX][MAX_NUM_HI_DCI0_PDU];
hi_dci0_pdu_list[NFAPI_CC_MAX][10][MAX_NUM_HI_DCI0_PDU];
/// NFAPI HI/DCI0 Config Request Structure
nfapi_hi_dci0_request_t HI_DCI0_req[NFAPI_CC_MAX];
nfapi_hi_dci0_request_t HI_DCI0_req[NFAPI_CC_MAX][10];
/// Prealocated TX pdu list
nfapi_tx_request_pdu_t
tx_request_pdu[NFAPI_CC_MAX][MAX_NUM_TX_REQUEST_PDU];
......@@ -1242,6 +1270,10 @@ typedef struct eNB_MAC_INST_s {
time_stats_t rx_ulsch_sdu; // include rlc_data_ind
/// processing time of eNB PCH scheduler
time_stats_t schedule_pch;
UE_free_list_t UE_free_list;
/// for scheduling selection
SCHEDULER_MODES scheduler_mode;
} eNB_MAC_INST;
/*
......@@ -1513,6 +1545,23 @@ typedef struct {
uint8_t n_adj_cells;
} neigh_cell_id_t;
typedef struct {
volatile uint8_t flag;
rnti_t rnti;
mui_t rrc_eNB_mui;
}RRC_release_ctrl;
typedef struct {
uint16_t num_UEs;
RRC_release_ctrl RRC_release_ctrl[NUMBER_OF_UE_MAX];
} RRC_release_list_t;
typedef struct {
uint8_t rrc_mui_num;
mui_t rrc_mui[128];
}mac_rlc_am_muilist_t;
#include "mac_proto.h"
/*@}*/
#endif /*__LAYER2_MAC_DEFS_H__ */
......@@ -76,4 +76,14 @@ extern uint32_t RRC_CONNECTION_FLAG;
extern uint8_t rb_table[34];
#if defined(PRE_SCD_THREAD)
extern uint16_t pre_nb_rbs_required[2][MAX_NUM_CCs][NUMBER_OF_UE_MAX];
extern uint8_t dlsch_ue_select_tbl_in_use;
extern uint8_t new_dlsch_ue_select_tbl_in_use;
extern boolean_t pre_scd_activeUE[NUMBER_OF_UE_MAX];
extern eNB_UE_STATS pre_scd_eNB_UE_stats[MAX_NUM_CCs][NUMBER_OF_UE_MAX];
#endif
extern mac_rlc_am_muilist_t rlc_am_mui;
extern SCHEDULER_MODES global_scheduler_mode;
#endif //DEF_H
......@@ -135,8 +135,7 @@ void schedule_ulsch_rnti(module_id_t module_idP, slice_id_t slice_idP, frame_t f
@param subframe Index of subframe
@param mbsfn_flag Indicates that this subframe is for MCH/MCCH
*/
void fill_DLSCH_dci(module_id_t module_idP, frame_t frameP,
sub_frame_t subframe, int *mbsfn_flag);
void fill_DLSCH_dci(module_id_t module_idP,frame_t frameP,sub_frame_t subframe,int *mbsfn_flag);
/** \brief UE specific DLSCH scheduling. Retrieves next ue to be schduled from round-robin scheduler and gets the appropriate harq_pid for the subframe from PHY. If the process is active and requires a retransmission, it schedules the retransmission with the same PRB count and MCS as the first transmission. Otherwise it consults RLC for DCCH/DTCH SDUs (status with maximum number of available PRBS), builds the MAC header (timing advance sent by default) and copies
@param Mod_id Instance ID of eNB
......@@ -314,6 +313,9 @@ void cancel_ra_proc(module_id_t module_idP, int CC_id, frame_t frameP,
@param Msg3_frame frame where scheduling takes place
@param Msg3_subframe subframe where scheduling takes place
*/
void clear_ra_proc(module_id_t module_idP, int CC_id, frame_t frameP);
void set_msg3_subframe(module_id_t Mod_id,
int CC_id,
int frame,
......@@ -427,7 +429,7 @@ int get_nCCE_offset(int *CCE_table,
const unsigned short rnti,
const unsigned char subframe);
int allocate_CCEs(int module_idP, int CC_idP, int subframe, int test_only);
int allocate_CCEs(int module_idP, int CC_idP, frame_t frameP, sub_frame_t subframeP, int test_only);
boolean_t CCE_allocation_infeasible(int module_idP,
int CC_idP,
......@@ -543,7 +545,7 @@ void ue_send_mch_sdu(module_id_t module_idP, uint8_t CC_id, frame_t frameP,
@param[out] sync_area return the sync area
@param[out] mcch_active flag indicating whether this MCCH is active in this SF
*/
int ue_query_mch(uint8_t Mod_id, uint8_t CC_id, uint32_t frame,
int ue_query_mch(module_id_t Mod_id, uint8_t CC_id, uint32_t frame,
sub_frame_t subframe, uint8_t eNB_index,
uint8_t * sync_area, uint8_t * mcch_active);
......@@ -683,9 +685,17 @@ int UE_num_active_CC(UE_list_t * listP, int ue_idP);
int UE_PCCID(module_id_t mod_idP, int ue_idP);
rnti_t UE_RNTI(module_id_t mod_idP, int ue_idP);
uint8_t find_rb_table_index(uint8_t average_rbs);
void set_ul_DAI(int module_idP,
int UE_idP,
int CC_idP,
int frameP,
int subframeP);
void ulsch_scheduler_pre_processor(module_id_t module_idP, slice_id_t slice_id, int frameP,
sub_frame_t subframeP,
unsigned char sched_subframeP,
uint16_t * first_rb);
void store_ulsch_buffer(module_id_t module_idP, int frameP,
sub_frame_t subframeP);
......@@ -694,6 +704,7 @@ void assign_max_mcs_min_rb(module_id_t module_idP, int slice_id, int frameP,
sub_frame_t subframeP, uint16_t * first_rb);
void adjust_bsr_info(int buffer_occupancy, uint16_t TBS,
UE_TEMPLATE * UE_template);
int phy_stats_exist(module_id_t Mod_id, int rnti);
void sort_UEs(module_id_t Mod_idP, slice_id_t slice_id, int frameP, sub_frame_t subframeP);
......@@ -860,7 +871,7 @@ uint32_t allocate_prbs_sub(int nb_rb, int N_RB_DL, int N_RBG,
uint8_t * rballoc);
void update_ul_dci(module_id_t module_idP, uint8_t CC_id, rnti_t rnti,
uint8_t dai);
uint8_t dai, sub_frame_t subframe);
int get_bw_index(module_id_t module_id, uint8_t CC_id);
......@@ -1091,7 +1102,7 @@ void extract_pusch_csi(module_id_t mod_idP, int CC_idP, int UE_id,
uint16_t fill_nfapi_tx_req(nfapi_tx_request_body_t * tx_req_body,
uint16_t absSF, uint16_t pdu_length,
uint16_t pdu_index, uint8_t * pdu);
int16_t pdu_index, uint8_t * pdu);
void fill_nfapi_ulsch_config_request_rel8(nfapi_ul_config_request_pdu_t *
ul_config_pdu, uint8_t cqi_req,
......@@ -1131,7 +1142,7 @@ void program_dlsch_acknak(module_id_t module_idP, int CC_idP, int UE_idP,
void fill_nfapi_dlsch_config(eNB_MAC_INST * eNB,
nfapi_dl_config_request_body_t * dl_req,
uint16_t length, uint16_t pdu_index,
uint16_t length, int16_t pdu_index,
uint16_t rnti,
uint8_t resource_allocation_type,
uint8_t
......@@ -1165,7 +1176,8 @@ void fill_nfapi_ulsch_harq_information(module_id_t module_idP,
int CC_idP,
uint16_t rntiP,
nfapi_ul_config_ulsch_harq_information
* harq_information);
* harq_information,
sub_frame_t subframeP);
uint16_t fill_nfapi_uci_acknak(module_id_t module_idP,
int CC_idP,
......@@ -1214,6 +1226,13 @@ uint32_t from_earfcn(int eutra_bandP, uint32_t dl_earfcn);
int32_t get_uldl_offset(int eutra_bandP);
int l2_init_ue(int eMBMS_active, char *uecap_xer, uint8_t cba_group_active,
uint8_t HO_active);
#if defined(PRE_SCD_THREAD)
void pre_scd_nb_rbs_required( module_id_t module_idP,
frame_t frameP,
sub_frame_t subframeP,
int min_rb_unit[MAX_NUM_CCs],
uint16_t nb_rbs_required[MAX_NUM_CCs][NUMBER_OF_UE_MAX]);
#endif
/*Slice related functions */
uint16_t flexran_nb_rbs_allowed_slice(float rb_percentage, int total_rbs);
......
......@@ -142,4 +142,6 @@ DCI2_5MHz_2A_TDD_t DLSCH_alloc_pdu2;
DCI1E_5MHz_2A_M10PRB_TDD_t DLSCH_alloc_pdu1E;
mac_rlc_am_muilist_t rlc_am_mui;
SCHEDULER_MODES global_scheduler_mode;
#endif
......@@ -85,9 +85,10 @@ void mac_top_init_eNB(void)
RC.mac[i]->UL_req_tmp[j][k].
ul_config_request_body.ul_config_pdu_list =
RC.mac[i]->ul_config_pdu_list_tmp[j][k];
RC.mac[i]->HI_DCI0_req[j].
hi_dci0_request_body.hi_dci0_pdu_list =
RC.mac[i]->hi_dci0_pdu_list[j];
for(int sf=0;sf<10;sf++){
RC.mac[i]->HI_DCI0_req[j][sf].hi_dci0_request_body.hi_dci0_pdu_list =RC.mac[i]->hi_dci0_pdu_list[j][sf];
}
RC.mac[i]->TX_req[j].tx_request_body.tx_pdu_list =
RC.mac[i]->tx_request_pdu[j];
RC.mac[i]->ul_handle = 0;
......
......@@ -129,7 +129,7 @@ store_dlsch_buffer(module_id_t Mod_id, slice_id_t slice_id, frame_t frameP,
rnti = UE_RNTI(Mod_id, UE_id);
for (i = 0; i < MAX_NUM_LCID; i++) { // loop over all the logical channels
for (i = 0; i < MAX_NUM_LCID; i++) { // loop over all the logical channels
rlc_status =
mac_rlc_status_ind(Mod_id, rnti, Mod_id, frameP, subframeP,
......@@ -318,10 +318,8 @@ maxround(module_id_t Mod_id, uint16_t rnti, int frame,
cc = &RC.mac[Mod_id]->common_channels[CC_id];
UE_id = find_UE_id(Mod_id, rnti);
if (cc->tdd_Config)
harq_pid = ((frame * 10) + subframe) % 10;
else
harq_pid = ((frame * 10) + subframe) & 7;
harq_pid = frame_subframe2_dl_harq_pid(cc->tdd_Config,frame ,subframe);
round = UE_list->UE_sched_ctrl[UE_id].round[CC_id][harq_pid];
if (round > round_max) {
......@@ -501,8 +499,10 @@ void sort_UEs(module_id_t Mod_idP, slice_id_t slice_id, int frameP, sub_frame_t
continue;
if ((rnti = UE_RNTI(Mod_idP, i)) == NOT_A_RNTI)
continue;
#if 0
if (UE_list->UE_sched_ctrl[i].ul_out_of_sync == 1)
continue;
#endif
if (!ue_slice_membership(i, slice_id))
continue;
......@@ -638,8 +638,10 @@ void dlsch_scheduler_pre_processor_accounting(module_id_t Mod_id,
if (rnti == NOT_A_RNTI)
continue;
#if 0
if (UE_list->UE_sched_ctrl[UE_id].ul_out_of_sync == 1)
continue;
#endif
if (!ue_slice_membership(UE_id, slice_id))
continue;
......@@ -719,8 +721,10 @@ void dlsch_scheduler_pre_processor_accounting(module_id_t Mod_id,
if (rnti == NOT_A_RNTI)
continue;
#if 0
if (UE_list->UE_sched_ctrl[UE_id].ul_out_of_sync == 1)
continue;
#endif
if (!ue_slice_membership(UE_id, slice_id))
continue;
......@@ -728,11 +732,7 @@ void dlsch_scheduler_pre_processor_accounting(module_id_t Mod_id,
CC_id = UE_list->ordered_CCids[ii][UE_id];
ue_sched_ctl = &UE_list->UE_sched_ctrl[UE_id];
cc = &RC.mac[Mod_id]->common_channels[CC_id];
// TODO Can we use subframe2harqpid() here?
if (cc->tdd_Config)
harq_pid = ((frameP * 10) + subframeP) % 10;
else
harq_pid = ((frameP * 10) + subframeP) & 7;
harq_pid = frame_subframe2_dl_harq_pid(cc->tdd_Config,frameP ,subframeP);
round = ue_sched_ctl->round[CC_id][harq_pid];
// control channel or retransmission
......@@ -797,8 +797,10 @@ void dlsch_scheduler_pre_processor_accounting(module_id_t Mod_id,
// LOG_D(MAC,"UE %d rnti 0x\n", UE_id, rnti );
if (rnti == NOT_A_RNTI)
continue;
#if 0
if (UE_list->UE_sched_ctrl[UE_id].ul_out_of_sync == 1)
continue;
#endif
if (!ue_slice_membership(UE_id, slice_id))
continue;
......@@ -1401,11 +1403,12 @@ dlsch_scheduler_pre_processor_allocate(module_id_t Mod_id,
/// ULSCH PRE_PROCESSOR
void
ulsch_scheduler_pre_processor(module_id_t module_idP,
slice_id_t slice_id, int frameP,
sub_frame_t subframeP, uint16_t * first_rb)
void ulsch_scheduler_pre_processor(module_id_t module_idP,
slice_id_t slice_id,
int frameP,
sub_frame_t subframeP,
unsigned char sched_subframeP,
uint16_t *first_rb)
{
int16_t i;
......@@ -1530,7 +1533,7 @@ ulsch_scheduler_pre_processor(module_id_t module_idP,
CC_id = UE_list->ordered_ULCCids[n][UE_id];
UE_template = &UE_list->UE_template[CC_id][UE_id];
harq_pid = subframe2harqpid(&RC.mac[module_idP]->common_channels[CC_id],
frameP, subframeP);
frameP, sched_subframeP);
// mac_xface->get_ue_active_harq_pid(module_idP,CC_id,rnti,frameP,subframeP,&harq_pid,&round,openair_harq_UL);
......@@ -1617,7 +1620,6 @@ ulsch_scheduler_pre_processor(module_id_t module_idP,
#endif
}
void
assign_max_mcs_min_rb(module_id_t module_idP, int slice_id, int frameP,
sub_frame_t subframeP, uint16_t * first_rb)
......
......@@ -71,7 +71,16 @@ fill_rar(const module_id_t module_idP,
ra->timing_offset /= 16; //T_A = N_TA/16, where N_TA should be on a 30.72Msps
rar[0] = (uint8_t) (ra->timing_offset >> (2 + 4)); // 7 MSBs of timing advance + divide by 4
rar[1] = (uint8_t) (ra->timing_offset << (4 - 2)) & 0xf0; // 4 LSBs of timing advance + divide by 4
ra->msg3_first_rb = 6;
COMMON_channels_t *cc = &RC.mac[module_idP]->common_channels[CC_id];
if(N_RB_UL == 25){
ra->msg3_first_rb = 1;
}else{
if (cc->tdd_Config && N_RB_UL == 100) {
ra->msg3_first_rb = 3;
} else {
ra->msg3_first_rb = 2;
}
}
ra->msg3_nb_rb = 1;
uint16_t rballoc = mac_computeRIV(N_RB_UL, ra->msg3_first_rb, ra->msg3_nb_rb); // first PRB only for UL Grant
rar[1] |= (rballoc >> 7) & 7; // Hopping = 0 (bit 3), 3 MSBs of rballoc
......@@ -80,6 +89,7 @@ fill_rar(const module_id_t module_idP,
ra->msg3_TPC = 3;
ra->msg3_ULdelay = 0;
ra->msg3_cqireq = 0;
ra->msg3_round = 0;
rar[2] |= ((ra->msg3_mcs & 0x8) >> 3); // mcs 10
rar[3] =
(((ra->msg3_mcs & 0x7) << 5)) | ((ra->msg3_TPC & 7) << 2) |
......
......@@ -45,6 +45,7 @@ configure_pdcp_req (struct pdcp_entity *pdcpP, void *rlcP, uint8_t rlc_sap_typeP
mem_block *mb;
mb = get_free_mem_block (sizeof (struct cpdcp_primitive), __func__);
if(mb==NULL) return;
((struct cpdcp_primitive *) mb->data)->type = CPDCP_CONFIG_REQ;
((struct cpdcp_primitive *) mb->data)->primitive.config_req.rlc_sap = rlcP;
((struct cpdcp_primitive *) mb->data)->primitive.config_req.rlc_type_sap = rlc_sap_typeP;
......
......@@ -509,6 +509,7 @@ rlc_am_rx (
default:
LOG_E(RLC, PROTOCOL_RLC_AM_CTXT_FMT" TX UNKNOWN PROTOCOL STATE 0x%02X\n", PROTOCOL_RLC_AM_CTXT_ARGS(ctxt_pP, rlc), rlc->protocol_state);
list_free (&data_indP.data);
}
}
......@@ -551,7 +552,9 @@ rlc_am_mac_status_indication (
rlc->last_absolute_subframe_status_indication = PROTOCOL_CTXT_TIME_MILLI_SECONDS(ctxt_pP);
rlc->nb_bytes_requested_by_mac = tb_sizeP;
if (tb_sizeP > 0) {
rlc->nb_bytes_requested_by_mac = tb_sizeP;
}
status_resp.buffer_occupancy_in_bytes = rlc_am_get_buffer_occupancy_in_bytes(ctxt_pP, rlc);
......@@ -585,7 +588,6 @@ rlc_am_mac_status_indication (
sdu_size = ((rlc_am_tx_sdu_management_t *) (rlc->input_sdus[rlc->current_sdu_index].mem_block->data))->sdu_size;
sdu_remaining_size = ((rlc_am_tx_sdu_management_t *) (rlc->input_sdus[rlc->current_sdu_index].mem_block->data))->sdu_remaining_size;
status_resp.head_sdu_remaining_size_to_send = sdu_remaining_size;
if (sdu_size == sdu_remaining_size) {
......
......@@ -42,8 +42,17 @@ void rlc_am_free_in_sdu(
{
if (index_in_bufferP <= RLC_AM_SDU_CONTROL_BUFFER_SIZE) {
/* BugFix: SDU shall have been already freed during initial PDU segmentation or concatenation !! */
//Assertion(eNB)_PRAN_DesignDocument_annex No.761
if(rlcP->input_sdus[index_in_bufferP].mem_block != NULL)
{
LOG_E(RLC, "RLC AM Tx SDU Conf: Data Part is not empty index=%d LcId=%d\n",
index_in_bufferP,rlcP->channel_id);
return;
}
/*
AssertFatal(rlcP->input_sdus[index_in_bufferP].mem_block == NULL, "RLC AM Tx SDU Conf: Data Part is not empty index=%d LcId=%d\n",
index_in_bufferP,rlcP->channel_id);
*/
/*
if (rlcP->input_sdus[index_in_bufferP].mem_block != NULL) {
free_mem_block(rlcP->input_sdus[index_in_bufferP].mem_block, __func__);
......@@ -121,8 +130,13 @@ rlc_am_pdu_sdu_data_cnf(
for (pdu_sdu_index = 0; pdu_sdu_index < rlc_pP->tx_data_pdu_buffer[snP % RLC_AM_WINDOW_SIZE].nb_sdus; pdu_sdu_index++) {
sdu_index = rlc_pP->tx_data_pdu_buffer[snP % RLC_AM_WINDOW_SIZE].sdus_index[pdu_sdu_index];
assert(sdu_index >= 0);
assert(sdu_index < RLC_AM_SDU_CONTROL_BUFFER_SIZE);
//assert(sdu_index >= 0);
//assert(sdu_index < RLC_AM_SDU_CONTROL_BUFFER_SIZE);
if(sdu_index < 0 || sdu_index >= RLC_AM_SDU_CONTROL_BUFFER_SIZE) {
LOG_E(RLC, "sdu_index error. sdu_index %d, pdu_sdu_index %d\n", sdu_index, pdu_sdu_index);
continue;
}
rlc_pP->input_sdus[sdu_index].nb_pdus_ack += 1;
if ((rlc_pP->input_sdus[sdu_index].nb_pdus_ack == rlc_pP->input_sdus[sdu_index].nb_pdus) &&
......
......@@ -57,7 +57,12 @@ rlc_am_reassembly (
if (rlc_pP->output_sdu_in_construction == NULL) {
rlc_pP->output_sdu_in_construction = get_free_mem_block (RLC_SDU_MAX_SIZE, __func__);
rlc_pP->output_sdu_size_to_write = 0;
assert(rlc_pP->output_sdu_in_construction != NULL);
//assert(rlc_pP->output_sdu_in_construction != NULL);
if(rlc_pP->output_sdu_in_construction == NULL) {
LOG_E(RLC, PROTOCOL_RLC_AM_CTXT_FMT"[REASSEMBLY PAYLOAD] output_sdu_in_construction is NULL\n",
PROTOCOL_RLC_AM_CTXT_ARGS(ctxt_pP,rlc_pP));
return;
}
}
if (rlc_pP->output_sdu_in_construction != NULL) {
......@@ -198,10 +203,16 @@ rlc_am_send_sdu (
PROTOCOL_RLC_AM_CTXT_ARGS(ctxt_pP,rlc_pP));
//msg("[RLC_AM][MOD %d] Freeing mem_block ...\n", rlc_pP->module_id);
//free_mem_block (rlc_pP->output_sdu_in_construction, __func__);
//Assertion(eNB)_PRAN_DesignDocument_annex No.764
LOG_E(RLC, PROTOCOL_RLC_AM_CTXT_FMT" SEND SDU REQUESTED %d bytes\n",
PROTOCOL_RLC_AM_CTXT_ARGS(ctxt_pP,rlc_pP),
rlc_pP->output_sdu_size_to_write);
/*
AssertFatal(3==4,
PROTOCOL_RLC_AM_CTXT_FMT" SEND SDU REQUESTED %d bytes",
PROTOCOL_RLC_AM_CTXT_ARGS(ctxt_pP,rlc_pP),
rlc_pP->output_sdu_size_to_write);
*/
}
rlc_pP->output_sdu_size_to_write = 0;
......@@ -270,7 +281,9 @@ rlc_am_reassemble_pdu(
break;
default:
assert(0 != 0);
//Assertion(eNB)_PRAN_DesignDocument_annex No.1428
LOG_E(RLC, "RLC_E_FIXED_PART_DATA_FIELD_FOLLOW error pdu_info->fi[%d]\n", pdu_info->fi);
// assert(0 != 0);
}
} else {
switch (pdu_info->fi) {
......@@ -386,7 +399,9 @@ rlc_am_reassemble_pdu(
break;
default:
assert(1 != 1);
//Assertion(eNB)_PRAN_DesignDocument_annex No.1429
LOG_E(RLC, "not RLC_E_FIXED_PART_DATA_FIELD_FOLLOW error pdu_info->fi[%d]\n", pdu_info->fi);
// assert(1 != 1);
}
}
......
......@@ -47,9 +47,15 @@ rlc_am_get_data_pdu_infos(
pdu_info_pP->d_c = header_pP->b1 >> 7;
pdu_info_pP->num_li = 0;
//Assertion(eNB)_PRAN_DesignDocument_annex No.766
if(pdu_info_pP->d_c == 0)
{
LOG_E(RLC, "RLC AM Rx PDU Data D/C Header Error LcId=%d\n", rlc_pP->channel_id);
return -2;
}
/*
AssertFatal (pdu_info_pP->d_c != 0, "RLC AM Rx PDU Data D/C Header Error LcId=%d\n", rlc_pP->channel_id);
*/
pdu_info_pP->rf = (header_pP->b1 >> 6) & 0x01;
pdu_info_pP->p = (header_pP->b1 >> 5) & 0x01;
pdu_info_pP->fi = (header_pP->b1 >> 3) & 0x03;
......@@ -264,9 +270,17 @@ rlc_am_receive_routing (
rlc_pP->stat_rx_control_pdu += 1;
rlc_am_receive_process_control_pdu (ctxt_pP, rlc_pP, tb_p, &first_byte_p, &tb_size_in_bytes);
// Test if remaining bytes not processed (up to know, highest probability is bug in MAC)
//Assertion(eNB)_PRAN_DesignDocument_annex No.767
if(tb_size_in_bytes != 0)
{
LOG_E(RLC, "Remaining %d bytes following a control PDU\n",
tb_size_in_bytes);
}
/*
AssertFatal( tb_size_in_bytes == 0,
"Remaining %d bytes following a control PDU",
tb_size_in_bytes);
*/
}
LOG_D(RLC, PROTOCOL_RLC_AM_CTXT_FMT"[RX ROUTING] VR(R)=%03d VR(MR)=%03d\n",
......@@ -396,14 +410,20 @@ rlc_am_receive_process_data_pdu (
}
if (pdu_info_p->sn == rlc_pP->vr_r) {
mem_block_t* cursor_p = rlc_pP->receiver_buffer.head;
rlc_am_rx_pdu_management_t * pdu_cursor_mgnt_p = (rlc_am_rx_pdu_management_t *) (cursor_p->data);
if( (((rlc_am_rx_pdu_management_t*)(tb_pP->data))->all_segments_received) == (pdu_cursor_mgnt_p->all_segments_received)){
if (((rlc_am_rx_pdu_management_t*)(tb_pP->data))->all_segments_received) {
rlc_am_rx_update_vr_r(ctxt_pP, rlc_pP, tb_pP);
rlc_pP->vr_mr = (rlc_pP->vr_r + RLC_AM_WINDOW_SIZE) & RLC_AM_SN_MASK;
}
reassemble = rlc_am_rx_check_vr_reassemble(ctxt_pP, rlc_pP);
//TODO : optimization : check whether a reassembly is needed by looking at LI, FI, SO, etc...
}else{
LOG_E(RLC, "BAD all_segments_received!!! discard buffer!!!\n");
/* Discard received block if out of window, duplicate or header error */
free_mem_block (tb_pP, __func__);
}
}
//FNA: fix check VrX out of receiving window
......
......@@ -299,7 +299,12 @@ void rlc_am_segment_10 (
pdu_mngt_p->sdus_index[pdu_mngt_p->nb_sdus++] = sdu_buffer_index;
sdu_mngt_p->pdus_index[sdu_mngt_p->nb_pdus++] = rlc_pP->vt_s % RLC_AM_PDU_RETRANSMISSION_BUFFER_SIZE;
assert(sdu_mngt_p->nb_pdus < RLC_AM_MAX_SDU_FRAGMENTS);
//assert(sdu_mngt_p->nb_pdus < RLC_AM_MAX_SDU_FRAGMENTS);
if(sdu_mngt_p->nb_pdus >= RLC_AM_MAX_SDU_FRAGMENTS) {
LOG_E(RLC,PROTOCOL_RLC_AM_CTXT_FMT"[SEGMENT] loop error. %d %d\n",
PROTOCOL_RLC_AM_CTXT_ARGS(ctxt_pP,rlc_pP), sdu_mngt_p->nb_pdus, RLC_AM_MAX_SDU_FRAGMENTS);
break;
}
sdu_buffer_index = (sdu_buffer_index + 1) % RLC_AM_SDU_CONTROL_BUFFER_SIZE;
}
......@@ -353,6 +358,8 @@ void rlc_am_segment_10 (
PROTOCOL_RLC_AM_CTXT_ARGS(ctxt_pP,rlc_pP),
pdu_remaining_size);
//msg ("[FRAME %05d][%s][RLC_AM][MOD %u/%u][RB %u][SEGMENT] pdu_mem_p %p pdu_p %p pdu_p->data %p data %p data_sdu_p %p pdu_remaining_size %d\n", rlc_pP->module_id, rlc_pP->rb_id, ctxt_pP->frame, pdu_mem_p, pdu_p, pdu_p->data, data, data_sdu_p,pdu_remaining_size);
rlc_am_mui.rrc_mui[rlc_am_mui.rrc_mui_num] = sdu_mngt_p->mui;
rlc_am_mui.rrc_mui_num++;
memcpy(data, data_sdu_p, pdu_remaining_size);
pdu_mngt_p->payload_size += pdu_remaining_size;
......@@ -371,6 +378,9 @@ void rlc_am_segment_10 (
LOG_T(RLC, PROTOCOL_RLC_AM_CTXT_FMT"[SEGMENT] Exactly Filling remaining PDU with %d remaining bytes of SDU\n",
PROTOCOL_RLC_AM_CTXT_ARGS(ctxt_pP,rlc_pP),
pdu_remaining_size);
rlc_am_mui.rrc_mui[rlc_am_mui.rrc_mui_num] = sdu_mngt_p->mui;
rlc_am_mui.rrc_mui_num++;
memcpy(data, data_sdu_p, pdu_remaining_size);
pdu_mngt_p->payload_size += pdu_remaining_size;
......@@ -387,6 +397,8 @@ void rlc_am_segment_10 (
continue_fill_pdu_with_sdu = 0;
pdu_remaining_size = 0;
} else if ((sdu_mngt_p->sdu_remaining_size + (li_length_in_bytes ^ 3)) < pdu_remaining_size ) {
rlc_am_mui.rrc_mui[rlc_am_mui.rrc_mui_num] = sdu_mngt_p->mui;
rlc_am_mui.rrc_mui_num++;
if (fill_num_li == (RLC_AM_MAX_SDU_IN_PDU - 1)) {
LOG_T(RLC, PROTOCOL_RLC_AM_CTXT_FMT"[SEGMENT] [SIZE %d] REACHING RLC_AM_MAX_SDU_IN_PDU LIs -> STOP SEGMENTATION FOR THIS PDU SDU\n",
PROTOCOL_RLC_AM_CTXT_ARGS(ctxt_pP,rlc_pP),
......@@ -462,11 +474,14 @@ void rlc_am_segment_10 (
rlc_pP->current_sdu_index = (rlc_pP->current_sdu_index + 1) % RLC_AM_SDU_CONTROL_BUFFER_SIZE;
}
} else {
LOG_T(RLC, PROTOCOL_RLC_AM_CTXT_FMT"[SEGMENT] Filling PDU with %d all remaining bytes of SDU and reduce TB size by %d bytes\n",
LOG_E(RLC, PROTOCOL_RLC_AM_CTXT_FMT"[SEGMENT] Filling PDU with %d all remaining bytes of SDU and reduce TB size by %d bytes\n",
PROTOCOL_RLC_AM_CTXT_ARGS(ctxt_pP,rlc_pP),
sdu_mngt_p->sdu_remaining_size,
pdu_remaining_size - sdu_mngt_p->sdu_remaining_size);
assert(1!=1);
//assert(1!=1);
rlc_am_mui.rrc_mui[rlc_am_mui.rrc_mui_num] = sdu_mngt_p->mui;
rlc_am_mui.rrc_mui_num++;
memcpy(data, data_sdu_p, sdu_mngt_p->sdu_remaining_size);
pdu_mngt_p->payload_size += sdu_mngt_p->sdu_remaining_size;
pdu_remaining_size = pdu_remaining_size - sdu_mngt_p->sdu_remaining_size;
......@@ -520,7 +535,11 @@ void rlc_am_segment_10 (
pdu_tb_req_p->data_ptr = (unsigned char*)pdu_p;
pdu_tb_req_p->tb_size = data_pdu_size - pdu_remaining_size;
//#warning "why 3000: changed to RLC_SDU_MAX_SIZE "
assert(pdu_tb_req_p->tb_size < RLC_SDU_MAX_SIZE );
//assert(pdu_tb_req_p->tb_size < RLC_SDU_MAX_SIZE );
if(pdu_tb_req_p->tb_size >= RLC_SDU_MAX_SIZE) {
LOG_E(RLC, PROTOCOL_RLC_AM_CTXT_FMT"[SEGMENT] tb_size error. %d, %d\n",
PROTOCOL_RLC_AM_CTXT_ARGS(ctxt_pP,rlc_pP),pdu_tb_req_p->tb_size, RLC_SDU_MAX_SIZE);
}
rlc_am_pdu_polling(ctxt_pP, rlc_pP, pdu_p, pdu_mngt_p->payload_size,true);
//list_add_tail_eurecom (pdu_mem_p, &rlc_pP->segmentation_pdu_list);
......
......@@ -534,7 +534,7 @@ void rlc_am_v9_3_0_test_send_sdu(rlc_am_entity_t *am_txP, int sdu_indexP)
assert(g_send_id_write_index[am_txP->rb_id] < TEST_MAX_SEND_SDU);
} else {
printf("Out of memory error\n");
exit(-1);
// exit(-1);
}
}
//-----------------------------------------------------------------------------
......@@ -577,7 +577,7 @@ void rlc_am_v9_3_0_test_mac_rlc_loop (struct mac_data_ind *data_indP, struct ma
data_indP->no_tb += 1;
} else {
printf("Out of memory error\n");
exit(-1);
// exit(-1);
}
} else {
printf("[RLC-LOOP] DROPPING 1 TB\n");
......
......@@ -87,9 +87,16 @@ rlc_am_check_timer_poll_retransmit(
/* Look for the first retransmittable PDU starting from vtS - 1 */
while (sn != sn_end) {
tx_data_pdu_buffer_p = &rlc_pP->tx_data_pdu_buffer[sn % RLC_AM_WINDOW_SIZE];
AssertFatal (tx_data_pdu_buffer_p->mem_block != NULL, "RLC AM Tpoll Retx expiry sn=%d ack=%d is empty vtA=%d vtS=%d LcId=%d\n",
sn, tx_data_pdu_buffer_p->flags.ack,rlc_pP->vt_a,rlc_pP->vt_s,rlc_pP->channel_id);
tx_data_pdu_buffer_p = &rlc_pP->tx_data_pdu_buffer[sn % RLC_AM_WINDOW_SIZE];
//AssertFatal (tx_data_pdu_buffer_p->mem_block != NULL, "RLC AM Tpoll Retx expiry sn=%d ack=%d is empty vtA=%d vtS=%d LcId=%d\n",
// sn, tx_data_pdu_buffer_p->flags.ack,rlc_pP->vt_a,rlc_pP->vt_s,rlc_pP->channel_id);
if(tx_data_pdu_buffer_p->mem_block == NULL){
LOG_E(RLC, "RLC AM Tpoll Retx expiry sn=%d ack=%d is empty vtA=%d vtS=%d LcId=%d\n",
sn, tx_data_pdu_buffer_p->flags.ack,rlc_pP->vt_a,rlc_pP->vt_s,rlc_pP->channel_id);
sn = RLC_AM_PREV_SN(sn);
continue;
}
if ((tx_data_pdu_buffer_p->flags.ack == 0) && (tx_data_pdu_buffer_p->flags.max_retransmit == 0)) {
tx_data_pdu_buffer_p->flags.retransmit = 1;
tx_data_pdu_buffer_p->retx_payload_size = tx_data_pdu_buffer_p->payload_size;
......
......@@ -70,7 +70,12 @@ rlc_am_check_timer_reordering(
PROTOCOL_RLC_AM_MSC_ARGS(ctxt_pP,rlc_pP));
#endif
AssertFatal (rlc_pP->vr_x != RLC_SN_UNDEFINED, "RLC AM TReordering Expiry vrX not defined LcId=%d\n", rlc_pP->channel_id);
//AssertFatal (rlc_pP->vr_x != RLC_SN_UNDEFINED, "RLC AM TReordering Expiry vrX not defined LcId=%d\n", rlc_pP->channel_id);
if(rlc_pP->vr_x == RLC_SN_UNDEFINED){
LOG_E(RLC, "RLC AM TReordering Expiry vrX not defined LcId=%d\n", rlc_pP->channel_id);
return;
}
rlc_pP->t_reordering.running = 0;
rlc_pP->t_reordering.timed_out = 1;
......@@ -81,8 +86,12 @@ rlc_am_check_timer_reordering(
cursor = rlc_pP->receiver_buffer.head;
rlc_usn_t vr_ms_new = rlc_pP->vr_x;
AssertFatal (cursor != NULL, "RLC AM TReordering Expiry Rx PDU list empty LcId=%d\n", rlc_pP->channel_id);
//AssertFatal (cursor != NULL, "RLC AM TReordering Expiry Rx PDU list empty LcId=%d\n", rlc_pP->channel_id);
if(cursor == NULL){
LOG_E(RLC, "RLC AM TReordering Expiry Rx PDU list empty LcId=%d\n", rlc_pP->channel_id);
return;
}
/* go to memblock up to vrX*/
pdu_info = &((rlc_am_rx_pdu_management_t*)(cursor->data))->pdu_info;
while ((cursor != NULL) && (RLC_AM_DIFF_SN(pdu_info->sn,rlc_pP->vr_r) < RLC_AM_DIFF_SN(vr_ms_new,rlc_pP->vr_r))) {
......
......@@ -83,6 +83,7 @@ void rlc_tm_init (
if ((rlcP->input_sdus_alloc == NULL) && (rlcP->size_input_sdus_buffer > 0)) {
rlcP->input_sdus_alloc = get_free_mem_block (rlcP->size_input_sdus_buffer * sizeof (void *), __func__);
if(rlcP->input_sdus_alloc == NULL) return;
rlcP->input_sdus = (mem_block_t **) (rlcP->input_sdus_alloc->data);
memset (rlcP->input_sdus, 0, rlcP->size_input_sdus_buffer * sizeof (void *));
}
......
......@@ -421,6 +421,7 @@ rlc_um_rx (const protocol_ctxt_t* const ctxt_pP, void *argP, struct mac_data_ind
LOG_E(RLC, PROTOCOL_RLC_UM_CTXT_FMT" TX UNKNOWN PROTOCOL STATE %02X hex\n",
PROTOCOL_RLC_UM_CTXT_ARGS(ctxt_pP,l_rlc_p),
l_rlc_p->protocol_state);
list_free (&data_indP.data);
}
}
......@@ -567,7 +568,13 @@ rlc_um_mac_data_request (const protocol_ctxt_t* const ctxt_pP, void *rlc_pP,cons
l_rlc_p->stat_tx_data_pdu += 1;
l_rlc_p->stat_tx_data_bytes += tb_size_in_bytes;
AssertFatal( tb_size_in_bytes > 0 , "RLC UM PDU LENGTH %d", tb_size_in_bytes);
//AssertFatal( tb_size_in_bytes > 0 , "RLC UM PDU LENGTH %d", tb_size_in_bytes);
if(tb_size_in_bytes <= 0) {
LOG_E(RLC, "RLC UM PDU LENGTH %d\n", tb_size_in_bytes);
tb_p = tb_p->next;
continue;
}
#if TRACE_RLC_UM_PDU || MESSAGE_CHART_GENERATOR
rlc_um_get_pdu_infos(ctxt_pP, l_rlc_p,(rlc_um_pdu_sn_10_t*) ((struct mac_tb_req*) (tb_p->data))->data_ptr, tb_size_in_bytes, &pdu_info, l_rlc_p->rx_sn_length);
#endif
......
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