Commit c0716be8 authored by Laurent Thomas's avatar Laurent Thomas

Merge branch 'integration_2022_wk08' of...

Merge branch 'integration_2022_wk08' of https://gitlab.eurecom.fr/oai/openairinterface5g into integration_2022_wk08
parents cc2883cc fbaabce4
......@@ -231,7 +231,6 @@ uint32_t nr_get_code_rate(uint8_t Imcs, uint8_t table_idx) {
}
}
void get_coreset_rballoc(uint8_t *FreqDomainResource,int *n_rb,int *rb_offset) {
uint8_t count=0, start=0, start_set=0;
......@@ -483,6 +482,7 @@ int get_nr_table_idx(int nr_bandP, uint8_t scs_index) {
return i;
}
int get_subband_size(int NPRB,int size) {
// implements table 5.2.1.4-2 from 36.214
//
......
......@@ -444,7 +444,7 @@ typedef struct {
uint8_t pucch_resource_id;
uint8_t pdsch_to_harq_feedback_time_ind;
uint8_t n_dmrs_cdm_groups;
uint8_t dmrs_ports[10];
uint16_t dmrs_ports;
uint8_t n_front_load_symb;
uint8_t tci_state;
fapi_nr_dl_srs_config_t srs_config;
......
......@@ -124,32 +124,32 @@ int nr_phy_init_RU(RU_t *ru) {
ru->num_gNB,NUMBER_OF_gNB_MAX);
LOG_I(PHY,"[INIT] %s() ru->num_gNB:%d \n", __FUNCTION__, ru->num_gNB);
if (ru->do_precoding == 1) {
if (ru->do_precoding == 1) {
int beam_count = 0;
if (ru->nb_tx>1) {//Enable beamforming when nb_tx > 1
for (p=0;p<ru->nb_log_antennas;p++) {
//if ((fp->L_ssb >> (63-p)) & 0x01)//64 bit-map with the MSB @2⁶³ corresponds to SSB ssb_index 0
beam_count++;
}
AssertFatal(ru->nb_bfw==(beam_count*ru->nb_tx),"Number of beam weights from config file is %d while the expected number is %d",ru->nb_bfw,(beam_count*ru->nb_tx));
for (i=0; i<ru->num_gNB; i++) {
int l_ind = 0;
for (p=0;p<ru->nb_log_antennas;p++) {
for (i=0; i<ru->num_gNB; i++) {
int l_ind = 0;
for (p=0;p<ru->nb_log_antennas;p++) {
//if ((fp->L_ssb >> (63-p)) & 0x01) {
ru->beam_weights[i][p] = (int32_t **)malloc16_clear(ru->nb_tx*sizeof(int32_t*));
for (j=0; j<ru->nb_tx; j++) {
ru->beam_weights[i][p][j] = (int32_t *)malloc16_clear(fp->ofdm_symbol_size*sizeof(int32_t));
AssertFatal(ru->bw_list[i],"ru->bw_list[%d] is null\n",i);
for (re=0; re<fp->ofdm_symbol_size; re++)
ru->beam_weights[i][p][j][re] = ru->bw_list[i][l_ind];
//printf("Beam Weight %08x for beam %d and tx %d\n",ru->bw_list[i][l_ind],p,j);
l_ind++;
} // for j
ru->beam_weights[i][p] = (int32_t **)malloc16_clear(ru->nb_tx*sizeof(int32_t*));
for (j=0; j<ru->nb_tx; j++) {
ru->beam_weights[i][p][j] = (int32_t *)malloc16_clear(fp->ofdm_symbol_size*sizeof(int32_t));
AssertFatal(ru->bw_list[i],"ru->bw_list[%d] is null\n",i);
for (re=0; re<fp->ofdm_symbol_size; re++)
ru->beam_weights[i][p][j][re] = ru->bw_list[i][l_ind];
//printf("Beam Weight %08x for beam %d and tx %d\n",ru->bw_list[i][l_ind],p,j);
l_ind++;
} // for j
//}
} // for p
} //for i
} // for p
} //for i
}
ru->common.beam_id = (uint8_t**)malloc16_clear(ru->nb_tx*sizeof(uint8_t*));
......
This diff is collapsed.
......@@ -328,8 +328,8 @@ void nr_processULSegment(void* arg) {
rv_index,
ulsch_harq->new_rx,
E,
ulsch_harq->F,
Kr-ulsch_harq->F-2*(p_decoderParms->Z))==-1) {
ulsch_harq->F,
Kr-ulsch_harq->F-2*(p_decoderParms->Z))==-1) {
stop_meas(&phy_vars_gNB->ulsch_rate_unmatching_stats);
......
......@@ -272,6 +272,8 @@ typedef struct {
uint8_t dmrsConfigType;
// Number of DMRS CDM groups with no data
uint8_t n_dmrs_cdm_groups;
/// DMRS ports bitmap
uint16_t dmrs_ports;
/// Starting Symbol number
uint16_t start_symbol;
/// Current subband PMI allocation
......
......@@ -88,7 +88,7 @@ void nr_common_signal_procedures (PHY_VARS_gNB *gNB,int frame,int slot,nfapi_nr_
nr_generate_pss(&txdataF[0][txdataF_offset], AMP, ssb_start_symbol, cfg, fp);
nr_generate_sss(&txdataF[0][txdataF_offset], AMP, ssb_start_symbol, cfg, fp);
if (cfg->carrier_config.num_tx_ant.value <= 4)
if (fp->Lmax == 4)
nr_generate_pbch_dmrs(gNB->nr_gold_pbch_dmrs[n_hf][ssb_index&7],&txdataF[0][txdataF_offset], AMP, ssb_start_symbol, cfg, fp);
else
nr_generate_pbch_dmrs(gNB->nr_gold_pbch_dmrs[0][ssb_index&7],&txdataF[0][txdataF_offset], AMP, ssb_start_symbol, cfg, fp);
......@@ -189,7 +189,7 @@ void phy_procedures_gNB_TX(processingData_L1tx_t *msgTx,
//apply the OFDM symbol rotation here
for (aa=0; aa<cfg->carrier_config.num_tx_ant.value; aa++) {
apply_nr_rotation(fp,(int16_t*) &gNB->common_vars.txdataF[aa][txdataF_offset],slot,0,fp->Ncp==EXTENDED?12:14,fp->ofdm_symbol_size);
apply_nr_rotation(fp,(int16_t*) &gNB->common_vars.txdataF[aa][txdataF_offset],slot,0,fp->Ncp==EXTENDED?12:14,fp->ofdm_symbol_size);
}
VCD_SIGNAL_DUMPER_DUMP_FUNCTION_BY_NAME(VCD_SIGNAL_DUMPER_FUNCTIONS_PHY_PROCEDURES_gNB_TX+offset,0);
......
......@@ -284,13 +284,14 @@ int8_t nr_ue_scheduled_response(nr_scheduled_response_t *scheduled_response){
dlsch0_harq->dlDmrsSymbPos = dlsch_config_pdu->dlDmrsSymbPos;
dlsch0_harq->dmrsConfigType = dlsch_config_pdu->dmrsConfigType;
dlsch0_harq->n_dmrs_cdm_groups = dlsch_config_pdu->n_dmrs_cdm_groups;
dlsch0_harq->dmrs_ports = dlsch_config_pdu->dmrs_ports;
dlsch0_harq->mcs = dlsch_config_pdu->mcs;
dlsch0_harq->rvidx = dlsch_config_pdu->rv;
dlsch0->g_pucch = dlsch_config_pdu->accumulated_delta_PUCCH;
//get nrOfLayers from DCI info
uint8_t Nl = 0;
for (i = 0; i < 4; i++) {
if (dlsch_config_pdu->dmrs_ports[i] >= i) Nl += 1;
for (i = 0; i < 12; i++) { // max 12 ports
if ((dlsch_config_pdu->dmrs_ports>>i)&0x01) Nl += 1;
}
dlsch0_harq->Nl = Nl;
dlsch0_harq->mcs_table=dlsch_config_pdu->mcs_table;
......@@ -308,7 +309,8 @@ int8_t nr_ue_scheduled_response(nr_scheduled_response_t *scheduled_response){
dlsch0_harq->nEpreRatioOfPDSCHToPTRS = dlsch_config_pdu->nEpreRatioOfPDSCHToPTRS;
dlsch0_harq->PTRSReOffset = dlsch_config_pdu->PTRSReOffset;
dlsch0_harq->pduBitmap = dlsch_config_pdu->pduBitmap;
LOG_D(MAC, ">>>> \tdlsch0->g_pucch = %d\tdlsch0_harq.mcs = %d\n", dlsch0->g_pucch, dlsch0_harq->mcs);
LOG_D(MAC, ">>>> \tdlsch0->g_pucch = %d\tdlsch0_harq.mcs = %d\n",
dlsch0->g_pucch, dlsch0_harq->mcs);
}
}
}
......
......@@ -561,23 +561,23 @@ int nr_ue_pdsch_procedures(PHY_VARS_NR_UE *ue, UE_nr_rxtx_proc_t *proc, int gNB_
uint16_t s1 = dlsch0_harq->nb_symbols;
bool is_SI = dlsch0->rnti_type == _SI_RNTI_;
LOG_D(PHY,"[UE %d] PDSCH type %d active in nr_slot_rx %d, harq_pid %d (%d), rb_start %d, nb_rb %d, symbol_start %d, nb_symbols %d, DMRS mask %x\n",
ue->Mod_id,pdsch,nr_slot_rx,harq_pid,dlsch0_harq->status,pdsch_start_rb,pdsch_nb_rb,s0,s1,dlsch0_harq->dlDmrsSymbPos);
LOG_D(PHY,"[UE %d] PDSCH type %d active in nr_slot_rx %d, harq_pid %d (%d), rb_start %d, nb_rb %d, symbol_start %d, nb_symbols %d, DMRS mask %x, Nl %d\n",
ue->Mod_id,pdsch,nr_slot_rx,harq_pid,dlsch0_harq->status,pdsch_start_rb,pdsch_nb_rb,s0,s1,dlsch0_harq->dlDmrsSymbPos, dlsch0_harq->Nl);
for (m = s0; m < (s0 +s1); m++) {
if (dlsch0_harq->dlDmrsSymbPos & (1 << m)) {
for (uint8_t aatx=0; aatx<dlsch0_harq->Nl; aatx++) {//for MIMO Config: it shall loop over no_layers
LOG_D(PHY,"PDSCH Channel estimation gNB id %d, PDSCH antenna port %d, slot %d, symbol %d\n",0,aatx,nr_slot_rx,m);
nr_pdsch_channel_estimation(ue,
proc,
gNB_id,
is_SI,
nr_slot_rx,
aatx /*p*/,
get_dmrs_port(aatx,dlsch0_harq->dmrs_ports),
m,
BWPStart,
ue->frame_parms.first_carrier_offset+(BWPStart + pdsch_start_rb)*12,
pdsch_nb_rb);
LOG_D(PHY,"PDSCH Channel estimation gNB id %d, PDSCH antenna port %d, slot %d, symbol %d\n",0,aatx,nr_slot_rx,m);
#if 0
///LOG_M: the channel estimation
int nr_frame_rx = proc->frame_rx;
......@@ -1528,7 +1528,6 @@ int phy_procedures_nrUE_RX(PHY_VARS_NR_UE *ue,
// do procedures for C-RNTI
int ret_pdsch = 0;
if (ue->dlsch[proc->thread_id][gNB_id][0]->active == 1) {
VCD_SIGNAL_DUMPER_DUMP_FUNCTION_BY_NAME(VCD_SIGNAL_DUMPER_FUNCTIONS_PDSCH_PROC_C, VCD_FUNCTION_IN);
ret_pdsch = nr_ue_pdsch_procedures(ue,
proc,
......
......@@ -276,17 +276,13 @@ void nr_dlsim_preprocessor(module_id_t module_id,
NR_pdsch_semi_static_t *ps = &sched_ctrl->pdsch_semi_static;
ps->nrOfLayers = g_nrOfLayers;
int dci_format = sched_ctrl->search_space && sched_ctrl->search_space->searchSpaceType->choice.ue_Specific->dci_Formats ?
NR_DL_DCI_FORMAT_1_1 : NR_DL_DCI_FORMAT_1_0;
nr_set_pdsch_semi_static(scc,
UE_info->CellGroup[0],
sched_ctrl->active_bwp,
NULL,
/* tda = */ 2,
dci_format,
g_nrOfLayers,
sched_ctrl,
ps);
NR_sched_pdsch_t *sched_pdsch = &sched_ctrl->sched_pdsch;
......@@ -782,7 +778,8 @@ int main(int argc, char **argv)
prepare_scd(scd);
fill_default_secondaryCellGroup(scc, scd, secondaryCellGroup, 0, 1, n_tx, 6, 0, 0, 0, 0);
fill_default_secondaryCellGroup(scc, scd, secondaryCellGroup, 0, 1, n_tx, 6, 0, 0, 0);
/* RRC parameter validation for secondaryCellGroup */
fix_scd(scd);
......@@ -1221,7 +1218,7 @@ int main(int argc, char **argv)
nr_ue_dcireq(&dcireq); //to be replaced with function pointer later
nr_ue_scheduled_response(&scheduled_response);
phy_procedures_nrUE_RX(UE,
&UE_proc,
0,
......
......@@ -725,7 +725,7 @@ int main(int argc, char **argv)
prepare_scd(scd);
fill_default_secondaryCellGroup(scc, scd, secondaryCellGroup, 0, 1, n_tx, 0, 0, 0, 0, 0);
fill_default_secondaryCellGroup(scc, scd, secondaryCellGroup, 0, 1, n_tx, 0, 0, 0, 0);
// xer_fprint(stdout, &asn_DEF_NR_CellGroupConfig, (const void*)secondaryCellGroup);
......
......@@ -2328,11 +2328,6 @@ static inline uint8_t get_table_idx(uint8_t mcs_table, uint8_t dci_format, uint8
}
/* returns the total DMRS symbols in a slot*/
uint8_t get_num_dmrs_symbols(NR_PDSCH_Config_t *pdsch_Config,int dmrs_TypeA_Position,int NrOfSymbols, int startSymbol, int mappingtype){
return get_num_dmrs(fill_dmrs_mask(pdsch_Config,dmrs_TypeA_Position,NrOfSymbols, startSymbol, mappingtype));
}
// Table 5.1.2.2.1-1 38.214
uint8_t getRBGSize(uint16_t bwp_size, long rbg_size_config) {
......@@ -3115,9 +3110,9 @@ int is_nr_UL_slot(NR_TDD_UL_DL_ConfigCommon_t *tdd_UL_DL_ConfigurationCommon, sl
else return(slot_in_period >= slots1+tdd_UL_DL_ConfigurationCommon->pattern2->nrofDownlinkSlots ? 1 : 0);
}
int16_t fill_dmrs_mask(NR_PDSCH_Config_t *pdsch_Config,int dmrs_TypeA_Position,int NrOfSymbols, int startSymbol, int mappingtype_fromDCI) {
int16_t fill_dmrs_mask(NR_PDSCH_Config_t *pdsch_Config,int dmrs_TypeA_Position,int NrOfSymbols, int startSymbol, int mappingtype_fromDCI, int length) {
int l0;int dmrs_AdditionalPosition = 0;int maxLength = 0;
int l0;int dmrs_AdditionalPosition = 0;
NR_DMRS_DownlinkConfig_t *dmrs_config = NULL;
LOG_D(MAC, "NrofSymbols:%d, startSymbol:%d, mappingtype:%d, dmrs_TypeA_Position:%d\n", NrOfSymbols, startSymbol, mappingtype_fromDCI, dmrs_TypeA_Position);
......@@ -3129,7 +3124,6 @@ int16_t fill_dmrs_mask(NR_PDSCH_Config_t *pdsch_Config,int dmrs_TypeA_Position,i
// in case of DCI FORMAT 1_0 or dedicated pdsch config not received additionposition = pos2, len1 should be used
// referred to section 5.1.6.2 in 38.214
dmrs_AdditionalPosition = 2;
maxLength = 1;
if (pdsch_Config != NULL) {
if (mappingtype_fromDCI == typeA) { // Type A
......@@ -3144,8 +3138,7 @@ int16_t fill_dmrs_mask(NR_PDSCH_Config_t *pdsch_Config,int dmrs_TypeA_Position,i
AssertFatal(dmrs_config != NULL," DMRS configs not present in PDSCH DMRS Downlink config\n");
// default values of maxlength = len2, additionalposition is pos2
if (dmrs_config->maxLength != NULL) maxLength = 2;
// default values of additionalposition is pos2
if (dmrs_config->dmrs_AdditionalPosition != NULL) dmrs_AdditionalPosition = *dmrs_config->dmrs_AdditionalPosition;
}
......@@ -3160,11 +3153,6 @@ int16_t fill_dmrs_mask(NR_PDSCH_Config_t *pdsch_Config,int dmrs_TypeA_Position,i
// For TypeB, ld is the duration of the scheduled PDSCH resources
ld = (mappingtype_fromDCI == typeA) ? (NrOfSymbols + startSymbol) : NrOfSymbols;
// Section 7.4.1.1.2 in Spec 38.211
//For PDSCH Mapping typeB, if PDSCH duration ld <=4, only single symbol DMRS is supported
if (mappingtype_fromDCI == typeB && ld <= 4)
maxLength = 1;
AssertFatal(ld > 2 && ld < 15,"Illegal NrOfSymbols according to Table 5.1.2.1-1 Spec 38.214 %d\n",ld);
AssertFatal((NrOfSymbols + startSymbol) < 15,"Illegal S+L according to Table 5.1.2.1-1 Spec 38.214 S:%d L:%d\n",startSymbol, NrOfSymbols);
......@@ -3181,7 +3169,8 @@ int16_t fill_dmrs_mask(NR_PDSCH_Config_t *pdsch_Config,int dmrs_TypeA_Position,i
}
if (maxLength == 1) {
// number of front loaded symbols
if (length == 1) {
row = ld - 2;
l_prime = table_7_4_1_1_2_3_pdsch_dmrs_positions_l[row][column];
l0 = 1 << l0;
......@@ -3192,7 +3181,7 @@ int16_t fill_dmrs_mask(NR_PDSCH_Config_t *pdsch_Config,int dmrs_TypeA_Position,i
l0 = 1<<l0 | 1<<(l0+1);
}
LOG_D(MAC, "l0:%d, ld:%d,row:%d, column:%d, addpos:%d, maxlen:%d\n", l0, ld, row, column, dmrs_AdditionalPosition, maxLength);
LOG_D(MAC, "l0:%d, ld:%d,row:%d, column:%d, addpos:%d, maxlen:%d\n", l0, ld, row, column, dmrs_AdditionalPosition, length);
AssertFatal(l_prime>=0,"ERROR in configuration.Check Time Domain allocation of this Grant. l_prime < 1. row:%d, column:%d\n", row, column);
l_prime = (mappingtype_fromDCI == typeA) ? (l_prime | l0) : (l_prime << startSymbol);
......
......@@ -41,7 +41,7 @@ uint64_t from_nrarfcn(int nr_bandP, uint8_t scs_index, uint32_t dl_nrarfcn);
uint32_t to_nrarfcn(int nr_bandP, uint64_t dl_CarrierFreq, uint8_t scs_index, uint32_t bw);
int16_t fill_dmrs_mask(NR_PDSCH_Config_t *pdsch_Config,int dmrs_TypeA_Position,int NrOfSymbols,int startSymbol,int mappingtype_fromDCI);
int16_t fill_dmrs_mask(NR_PDSCH_Config_t *pdsch_Config,int dmrs_TypeA_Position,int NrOfSymbols,int startSymbol,int mappingtype_fromDCI,int length);
int is_nr_DL_slot(NR_TDD_UL_DL_ConfigCommon_t *tdd_UL_DL_ConfigurationCommon,slot_t slotP);
......@@ -177,8 +177,6 @@ bool set_ul_ptrs_values(NR_PTRS_UplinkConfig_t *ul_ptrs_config,
uint8_t *reOffset, uint8_t *maxNumPorts, uint8_t *ulPower,
uint8_t NrOfSymbols);
uint8_t get_num_dmrs_symbols(NR_PDSCH_Config_t *pdsch_Config,int dmrs_TypeA_Position,int NrOfSymbols,int startSymbol,int mappingtype);
/* \brief Set the transform precoding according to 6.1.3 of 3GPP TS 38.214 version 16.3.0 Release 16
@param *pusch_config, pointer to pusch config
@param *ubwp pointer to uplink bwp
......
......@@ -57,12 +57,12 @@ extern const uint8_t table_7_3_1_1_2_21[19][4];
extern const uint8_t table_7_3_1_1_2_22[6][5];
extern const uint8_t table_7_3_1_1_2_23[5][6];
extern const uint8_t table_7_3_2_3_3_1[12][5];
extern const uint8_t table_7_3_2_3_3_2_oneCodeword[31][6];
extern const uint8_t table_7_3_2_3_3_2_oneCodeword[31][10];
extern const uint8_t table_7_3_2_3_3_2_twoCodeword[4][10];
extern const uint8_t table_7_3_2_3_3_3_oneCodeword[24][5];
extern const uint8_t table_7_3_2_3_3_3_oneCodeword[24][7];
extern const uint8_t table_7_3_2_3_3_3_twoCodeword[2][7];
extern const uint8_t table_7_3_2_3_3_4_oneCodeword[58][6];
extern const uint8_t table_7_3_2_3_3_4_twoCodeword[6][10];
extern const uint8_t table_7_3_2_3_3_4_oneCodeword[58][14];
extern const uint8_t table_7_3_2_3_3_4_twoCodeword[6][14];
extern const uint16_t table_7_2_1[16];
......
......@@ -257,161 +257,161 @@ const uint8_t table_7_3_1_1_2_23[5][6] = {
};
const uint8_t table_7_3_2_3_3_1[12][5] = {
{1,0,0,0,0},
{1,1,0,0,0},
{1,0,1,0,0},
{2,0,0,0,0},
{1,1,1,0,0},
{2,1,0,0,0},
{2,2,0,0,0},
{2,3,0,0,0},
{2,0,1,0,0},
{2,2,3,0,0},
{2,0,1,2,0},
{2,0,1,2,3},
{2,0,2,0,0}
{2,0,0,1,0},
{2,0,0,0,1},
{2,1,1,0,0},
{2,0,0,1,1},
{2,1,1,1,0},
{2,1,1,1,1},
{2,1,0,1,0}
};
const uint8_t table_7_3_2_3_3_2_oneCodeword[31][6] = {
{1,0,0,0,0,1},
{1,1,0,0,0,1},
{1,0,1,0,0,1},
{2,0,0,0,0,1},
{2,1,0,0,0,1},
{2,2,0,0,0,1},
{2,3,0,0,0,1},
{2,0,1,0,0,1},
{2,2,3,0,0,1},
{2,0,1,2,0,1},
{2,0,1,2,3,1},
{2,0,2,0,0,1},
{2,0,0,0,0,2},
{2,1,0,0,0,2},
{2,2,0,0,0,2},
{2,3,0,0,0,2},
{2,4,0,0,0,2},
{2,5,0,0,0,2},
{2,6,0,0,0,2},
{2,7,0,0,0,2},
{2,0,1,0,0,2},
{2,2,3,0,0,2},
{2,4,5,0,0,2},
{2,6,7,0,0,2},
{2,0,4,0,0,2},
{2,2,6,0,0,2},
{2,0,1,4,0,2},
{2,2,3,6,0,2},
{2,0,1,4,5,2},
{2,2,3,6,7,2},
{2,0,2,4,6,2}
const uint8_t table_7_3_2_3_3_2_oneCodeword[31][10] = {
{1,1,0,0,0,0,0,0,0,1},
{1,0,1,0,0,0,0,0,0,1},
{1,1,1,0,0,0,0,0,0,1},
{2,1,0,0,0,0,0,0,0,1},
{2,0,1,0,0,0,0,0,0,1},
{2,0,0,1,0,0,0,0,0,1},
{2,0,0,0,1,0,0,0,0,1},
{2,1,1,0,0,0,0,0,0,1},
{2,0,0,1,1,0,0,0,0,1},
{2,1,1,1,0,0,0,0,0,1},
{2,1,1,1,1,0,0,0,0,1},
{2,1,0,1,0,0,0,0,0,1},
{2,1,0,0,0,0,0,0,0,2},
{2,0,1,0,0,0,0,0,0,2},
{2,0,0,1,0,0,0,0,0,2},
{2,0,0,0,1,0,0,0,0,2},
{2,0,0,0,0,1,0,0,0,2},
{2,0,0,0,0,0,1,0,0,2},
{2,0,0,0,0,0,0,1,0,2},
{2,0,0,0,0,0,0,0,1,2},
{2,1,1,0,0,0,0,0,0,2},
{2,0,0,1,1,0,0,0,0,2},
{2,0,0,0,0,1,1,0,0,2},
{2,0,0,0,0,0,0,1,1,2},
{2,1,0,0,0,1,0,0,0,2},
{2,0,0,1,0,0,0,1,0,2},
{2,1,1,0,0,1,0,0,0,2},
{2,0,0,1,1,0,0,1,0,2},
{2,1,1,0,0,1,1,0,0,2},
{2,0,0,1,1,0,0,1,1,2},
{2,1,0,1,0,1,0,1,0,2}
};
const uint8_t table_7_3_2_3_3_2_twoCodeword[4][10] = {
{2,0,1,2,3,4,0,0,0,2},
{2,0,1,2,3,4,6,0,0,2},
{2,0,1,2,3,4,5,6,0,2},
{2,0,1,2,3,4,5,6,7,2}
{2,1,1,1,1,1,0,0,0,2},
{2,1,1,1,1,1,0,1,0,2},
{2,1,1,1,1,1,1,1,0,2},
{2,1,1,1,1,1,1,1,1,2}
};
const uint8_t table_7_3_2_3_3_3_oneCodeword[24][5] = {
{1,0,0,0,0},
{1,1,0,0,0},
{1,0,1,0,0},
{2,0,0,0,0},
{2,1,0,0,0},
{2,2,0,0,0},
{2,3,0,0,0},
{2,0,1,0,0},
{2,2,3,0,0},
{2,0,1,2,0},
{2,0,1,2,3},
{3,0,0,0,0},
{3,1,0,0,0},
{3,2,0,0,0},
{3,3,0,0,0},
{3,4,0,0,0},
{3,5,0,0,0},
{3,0,1,0,0},
{3,2,3,0,0},
{3,4,5,0,0},
{3,0,1,2,0},
{3,3,4,5,0},
{3,0,1,2,3},
{2,0,2,0,0}
const uint8_t table_7_3_2_3_3_3_oneCodeword[24][7] = {
{1,1,0,0,0,0,0},
{1,0,1,0,0,0,0},
{1,1,1,0,0,0,0},
{2,1,0,0,0,0,0},
{2,0,1,0,0,0,0},
{2,0,0,1,0,0,0},
{2,0,0,0,1,0,0},
{2,1,1,0,0,0,0},
{2,0,0,1,1,0,0},
{2,1,1,1,0,0,0},
{2,1,1,1,1,0,0},
{3,1,0,0,0,0,0},
{3,0,1,0,0,0,0},
{3,0,0,1,0,0,0},
{3,0,0,0,1,0,0},
{3,0,0,0,0,1,0},
{3,0,0,0,0,0,1},
{3,1,1,0,0,0,0},
{3,0,0,1,1,0,0},
{3,0,0,0,0,1,1},
{3,1,1,1,0,0,0},
{3,0,0,0,1,1,1},
{3,1,1,1,1,0,0},
{3,1,0,1,0,0,0}
};
const uint8_t table_7_3_2_3_3_3_twoCodeword[2][7] = {
{3,0,1,2,3,4,0},
{3,0,1,2,3,4,5}
{3,1,1,1,1,1,0},
{3,1,1,1,1,1,1}
};
const uint8_t table_7_3_2_3_3_4_oneCodeword[58][6] = {
{1,0,0,0,0,1},
{1,1,0,0,0,1},
{1,0,1,0,0,1},
{2,0,0,0,0,1},
{2,1,0,0,0,1},
{2,2,0,0,0,1},
{2,3,0,0,0,1},
{2,0,1,0,0,1},
{2,2,3,0,0,1},
{2,0,1,2,0,1},
{2,0,1,2,3,1},
{3,0,0,0,0,1},
{3,1,0,0,0,1},
{3,2,0,0,0,1},
{3,3,0,0,0,1},
{3,4,0,0,0,1},
{3,5,0,0,0,1},
{3,0,1,0,0,1},
{3,2,3,0,0,1},
{3,4,5,0,0,1},
{3,0,1,2,0,1},
{3,3,4,5,0,1},
{3,0,1,2,3,1},
{2,0,2,0,0,1},
{3,0,0,0,0,2},
{3,1,0,0,0,2},
{3,2,0,0,0,2},
{3,3,0,0,0,2},
{3,4,0,0,0,2},
{3,5,0,0,0,2},
{3,6,0,0,0,2},
{3,7,0,0,0,2},
{3,8,0,0,0,2},
{3,9,0,0,0,2},
{3,10,0,0,0,2},
{3,11,0,0,0,2},
{3,0,1,0,0,2},
{3,2,3,0,0,2},
{3,4,5,0,0,2},
{3,6,7,0,0,2},
{3,8,9,0,0,2},
{3,10,11,0,0,2},
{3,0,1,6,0,2},
{3,2,3,8,0,2},
{3,4,5,10,0,2},
{3,0,1,6,7,2},
{3,2,3,8,9,2},
{3,4,5,10,11,2},
{1,0,0,0,0,2},
{1,1,0,0,0,2},
{1,6,0,0,0,2},
{1,7,0,0,0,2},
{1,0,1,0,0,2},
{1,6,7,0,0,2},
{2,0,1,0,0,2},
{2,2,3,0,0,2},
{2,6,7,0,0,2},
{2,8,9,0,0,2}
const uint8_t table_7_3_2_3_3_4_oneCodeword[58][14] = {
{1,1,0,0,0,0,0,0,0,0,0,0,0,1},
{1,0,1,0,0,0,0,0,0,0,0,0,0,1},
{1,1,1,0,0,0,0,0,0,0,0,0,0,1},
{2,1,0,0,0,0,0,0,0,0,0,0,0,1},
{2,0,1,0,0,0,0,0,0,0,0,0,0,1},
{2,0,0,1,0,0,0,0,0,0,0,0,0,1},
{2,0,0,0,1,0,0,0,0,0,0,0,0,1},
{2,1,1,0,0,0,0,0,0,0,0,0,0,1},
{2,0,0,1,1,0,0,0,0,0,0,0,0,1},
{2,1,1,1,0,0,0,0,0,0,0,0,0,1},
{2,1,1,1,1,0,0,0,0,0,0,0,0,1},
{3,1,0,0,0,0,0,0,0,0,0,0,0,1},
{3,0,1,0,0,0,0,0,0,0,0,0,0,1},
{3,0,0,1,0,0,0,0,0,0,0,0,0,1},
{3,0,0,0,1,0,0,0,0,0,0,0,0,1},
{3,0,0,0,0,1,0,0,0,0,0,0,0,1},
{3,0,0,0,0,0,1,0,0,0,0,0,0,1},
{3,1,1,0,0,0,0,0,0,0,0,0,0,1},
{3,0,0,1,1,0,0,0,0,0,0,0,0,1},
{3,0,0,0,0,1,1,0,0,0,0,0,0,1},
{3,1,1,1,0,0,0,0,0,0,0,0,0,1},
{3,0,0,0,1,1,1,0,0,0,0,0,0,1},
{3,1,1,1,1,0,0,0,0,0,0,0,0,1},
{2,1,0,1,0,0,0,0,0,0,0,0,0,1},
{3,1,0,0,0,0,0,0,0,0,0,0,0,2},
{3,0,1,0,0,0,0,0,0,0,0,0,0,2},
{3,0,0,1,0,0,0,0,0,0,0,0,0,2},
{3,0,0,0,1,0,0,0,0,0,0,0,0,2},
{3,0,0,0,0,1,0,0,0,0,0,0,0,2},
{3,0,0,0,0,0,1,0,0,0,0,0,0,2},
{3,0,0,0,0,0,0,1,0,0,0,0,0,2},
{3,0,0,0,0,0,0,0,1,0,0,0,0,2},
{3,0,0,0,0,0,0,0,0,1,0,0,0,2},
{3,0,0,0,0,0,0,0,0,0,1,0,0,2},
{3,0,0,0,0,0,0,0,0,0,0,1,0,2},
{3,0,0,0,0,0,0,0,0,0,0,0,1,2},
{3,1,1,0,0,0,0,0,0,0,0,0,0,2},
{3,0,0,1,1,0,0,0,0,0,0,0,0,2},
{3,0,0,0,0,1,1,0,0,0,0,0,0,2},
{3,0,0,0,0,0,0,1,1,0,0,0,0,2},
{3,0,0,0,0,0,0,0,0,1,1,0,0,2},
{3,0,0,0,0,0,0,0,0,0,0,1,1,2},
{3,1,1,0,0,0,0,1,0,0,0,0,0,2},
{3,0,0,1,1,0,0,0,0,1,0,0,0,2},
{3,0,0,0,0,1,1,0,0,0,0,1,0,2},
{3,1,1,0,0,0,0,1,1,0,0,0,0,2},
{3,0,0,1,1,0,0,0,0,1,1,0,0,2},
{3,0,0,0,0,1,1,0,0,0,0,1,1,2},
{1,1,0,0,0,0,0,0,0,0,0,0,0,2},
{1,0,1,0,0,0,0,0,0,0,0,0,0,2},
{1,0,0,0,0,0,0,1,0,0,0,0,0,2},
{1,0,0,0,0,0,0,0,1,0,0,0,0,2},
{1,1,1,0,0,0,0,0,0,0,0,0,0,2},
{1,0,0,0,0,0,0,1,1,0,0,0,0,2},
{2,1,1,0,0,0,0,0,0,0,0,0,0,2},
{2,0,0,1,1,0,0,0,0,0,0,0,0,2},
{2,0,0,0,0,0,0,1,1,0,0,0,0,2},
{2,0,0,0,0,0,0,0,0,1,1,0,0,2}
};
const uint8_t table_7_3_2_3_3_4_twoCodeword[6][10] = {
{3,0,1,2,3,4,0,0,0,1},
{3,0,1,2,3,4,5,0,0,1},
{2,0,1,2,3,6,0,0,0,2},
{2,0,1,2,3,6,8,0,0,2},
{2,0,1,2,3,6,7,8,0,2},
{2,0,1,2,3,6,7,8,9,2}
const uint8_t table_7_3_2_3_3_4_twoCodeword[6][14] = {
{3,1,1,1,1,1,0,0,0,0,0,0,0,1},
{3,1,1,1,1,1,1,0,0,0,0,0,0,1},
{2,1,1,1,1,0,0,1,0,0,0,0,0,2},
{2,1,1,1,1,0,0,1,0,1,0,0,0,2},
{2,1,1,1,1,0,0,1,1,1,0,0,0,2},
{2,1,1,1,1,0,0,1,1,1,1,0,0,2},
};
// table 7.2-1 TS 38.321
......
......@@ -365,8 +365,9 @@ void config_common(int Mod_idP, int ssb_SubcarrierOffset, int pdsch_AntennaPorts
cfg->ssb_table.ssb_mask_list[1].ssb_mask.tl.tag = NFAPI_NR_CONFIG_SSB_MASK_TAG;
cfg->num_tlv+=2;
// logical antenna ports
cfg->carrier_config.num_tx_ant.value = pdsch_AntennaPorts;
AssertFatal(pdsch_AntennaPorts > 0 && pdsch_AntennaPorts < 13, "pdsch_AntennaPorts in 1...12\n");
AssertFatal(pdsch_AntennaPorts > 0 && pdsch_AntennaPorts < 33, "pdsch_AntennaPorts in 1...32\n");
cfg->carrier_config.num_tx_ant.tl.tag = NFAPI_NR_CONFIG_NUM_TX_ANT_TAG;
int num_ssb=0;
......
......@@ -1360,7 +1360,7 @@ void nr_generate_Msg2(module_id_t module_idP, int CC_id, frame_t frameP, sub_fra
nr_mac->common_channels->ServingCellConfigCommon->dmrs_TypeA_Position,
nrOfSymbols,
startSymbolIndex,
mappingtype);
mappingtype, 1);
int x_Overhead = 0;
uint8_t tb_scaling = 0;
......@@ -1609,7 +1609,7 @@ void nr_generate_Msg4(module_id_t module_idP, int CC_id, frame_t frameP, sub_fra
scc->dmrs_TypeA_Position,
nrOfSymbols,
startSymbolIndex,
mappingtype);
mappingtype, 1);
uint16_t N_DMRS_SLOT = get_num_dmrs(dlDmrsSymbPos);
......
......@@ -388,7 +388,6 @@ uint32_t schedule_control_sib1(module_id_t module_id,
// Calculate number of PRB_DMRS
uint8_t N_PRB_DMRS = gNB_mac->sched_ctrlCommon->pdsch_semi_static.numDmrsCdmGrpsNoData * 6;
uint16_t dmrs_length = get_num_dmrs(dlDmrsSymbPos);
LOG_D(MAC,"dlDmrsSymbPos %x\n",dlDmrsSymbPos);
int rbSize = 0;
uint32_t TBS = 0;
......@@ -621,8 +620,7 @@ void schedule_nr_sib1(module_id_t module_idP, frame_t frameP, sub_frame_t slotP)
// TODO: There are exceptions to this in table 5.1.2.1.1-4,5 (Default time domain allocation tables B, C)
int mappingtype = (startSymbolIndex <= 3)? typeA: typeB;
uint16_t dlDmrsSymbPos = fill_dmrs_mask(NULL, gNB_mac->common_channels->ServingCellConfigCommon->dmrs_TypeA_Position, nrOfSymbols, startSymbolIndex, mappingtype);
uint16_t dlDmrsSymbPos = fill_dmrs_mask(NULL, gNB_mac->common_channels->ServingCellConfigCommon->dmrs_TypeA_Position, nrOfSymbols, startSymbolIndex, mappingtype, 1);
// Configure sched_ctrlCommon for SIB1
uint32_t TBS = schedule_control_sib1(module_idP, CC_id,
......
......@@ -563,7 +563,7 @@ bool allocate_dl_retransmission(module_id_t module_id,
int rbStart = 0; // start wrt BWPstart
NR_pdsch_semi_static_t *ps = &sched_ctrl->pdsch_semi_static;
const long f = (sched_ctrl->active_bwp ||bwpd) ? sched_ctrl->search_space->searchSpaceType->choice.ue_Specific->dci_Formats : 0;
int rbSize = 0;
const int tda = RC.nrmac[module_id]->preferred_dl_tda[sched_ctrl->active_bwp ? sched_ctrl->active_bwp->bwp_Id : 0][slot];
AssertFatal(tda>=0,"Unable to find PDSCH time domain allocation in list\n");
......@@ -587,23 +587,25 @@ bool allocate_dl_retransmission(module_id_t module_id,
/* check whether we need to switch the TDA allocation since the last
* (re-)transmission */
if (ps->time_domain_allocation != tda)
nr_set_pdsch_semi_static(scc, cg, sched_ctrl->active_bwp, bwpd, tda, f, ps);
nr_set_pdsch_semi_static(scc, UE_info->CellGroup[UE_id], sched_ctrl->active_bwp, bwpd, tda, ps->nrOfLayers, sched_ctrl, ps);
} else {
/* the retransmission will use a different time domain allocation, check
* that we have enough resources */
NR_pdsch_semi_static_t temp_ps;
temp_ps.nrOfLayers = 1;
nr_set_pdsch_semi_static(scc, cg, sched_ctrl->active_bwp, bwpd, tda, f, &temp_ps);
NR_pdsch_semi_static_t temp_ps = *ps;
nr_set_pdsch_semi_static(scc, UE_info->CellGroup[UE_id], sched_ctrl->active_bwp, bwpd, tda, ps->nrOfLayers, sched_ctrl, &temp_ps);
while (rbStart < bwpSize &&
!(rballoc_mask[rbStart]&SL_to_bitmap(temp_ps.startSymbolIndex, temp_ps.nrOfSymbols)))
rbStart++;
while (rbStart + rbSize < bwpSize &&
(rballoc_mask[rbStart + rbSize]&SL_to_bitmap(temp_ps.startSymbolIndex, temp_ps.nrOfSymbols)))
rbSize++;
uint32_t new_tbs;
uint16_t new_rbSize;
bool success = nr_find_nb_rb(retInfo->Qm,
retInfo->R,
temp_ps.nrOfLayers,
temp_ps.nrOfSymbols,
temp_ps.N_PRB_DMRS * temp_ps.N_DMRS_SLOT,
retInfo->tb_size,
......@@ -702,6 +704,7 @@ void pf_dl(module_id_t module_id,
float coeff_ue[MAX_MOBILES_PER_GNB];
// UEs that could be scheduled
int ue_array[MAX_MOBILES_PER_GNB];
int layers[MAX_MOBILES_PER_GNB];
NR_list_t UE_sched = { .head = -1, .next = ue_array, .tail = -1, .len = MAX_MOBILES_PER_GNB };
/* Loop UE_info->list to check retransmission */
......@@ -714,6 +717,8 @@ void pf_dl(module_id_t module_id,
/* get the PID of a HARQ process awaiting retrnasmission, or -1 otherwise */
sched_pdsch->dl_harq_pid = sched_ctrl->retrans_dl_harq.head;
layers[UE_id] = ps->nrOfLayers; // initialization of layers to the previous value in the strcuture
/* Calculate Throughput */
const float a = 0.0005f; // corresponds to 200ms window
const uint32_t b = UE_info->mac_stats[UE_id].dlsch_current_bytes;
......@@ -737,9 +742,19 @@ void pf_dl(module_id_t module_id,
continue;
/* Calculate coeff */
ps->nrOfLayers = 1;
set_dl_mcs(sched_pdsch,sched_ctrl,&mac->dl_max_mcs,ps->mcsTableIdx);
sched_pdsch->mcs = get_mcs_from_bler(module_id, /* CC_id = */ 0, frame, slot, UE_id);
uint32_t tbs = pf_tbs[ps->mcsTableIdx][sched_pdsch->mcs];
layers[UE_id] = set_dl_nrOfLayers(sched_ctrl);
const uint8_t Qm = nr_get_Qm_dl(sched_pdsch->mcs, ps->mcsTableIdx);
const uint16_t R = nr_get_code_rate_dl(sched_pdsch->mcs, ps->mcsTableIdx);
uint32_t tbs = nr_compute_tbs(Qm,
R,
1, /* rbSize */
10, /* hypothetical number of slots */
0, /* N_PRB_DMRS * N_DMRS_SLOT */
0 /* N_PRB_oh, 0 for initialBWP */,
0 /* tb_scaling */,
layers[UE_id]) >> 3;
coeff_ue[UE_id] = (float) tbs / thr_ue[UE_id];
LOG_D(NR_MAC,"b %d, thr_ue[%d] %f, tbs %d, coeff_ue[%d] %f\n",
b, UE_id, thr_ue[UE_id], tbs, UE_id, coeff_ue[UE_id]);
......@@ -842,9 +857,10 @@ void pf_dl(module_id_t module_id,
AssertFatal(tda>=0,"Unable to find PDSCH time domain allocation in list\n");
NR_sched_pdsch_t *sched_pdsch = &sched_ctrl->sched_pdsch;
NR_pdsch_semi_static_t *ps = &sched_ctrl->pdsch_semi_static;
const long f = (sched_ctrl->active_bwp || bwpd) ? sched_ctrl->search_space->searchSpaceType->choice.ue_Specific->dci_Formats : 0;
if (ps->time_domain_allocation != tda)
nr_set_pdsch_semi_static(scc, UE_info->CellGroup[UE_id], sched_ctrl->active_bwp, bwpd, tda, f, ps);
if (ps->nrOfLayers != layers[UE_id] ||
ps->time_domain_allocation != tda)
nr_set_pdsch_semi_static(scc, UE_info->CellGroup[UE_id], sched_ctrl->active_bwp, bwpd, tda, layers[UE_id], sched_ctrl, ps);
const uint16_t slbitmap = SL_to_bitmap(ps->startSymbolIndex, ps->nrOfSymbols);
// Freq-demain allocation
......@@ -865,6 +881,7 @@ void pf_dl(module_id_t module_id,
const int oh = 3 + 2 * (frame == (sched_ctrl->ta_frame + 10) % 1024);
nr_find_nb_rb(sched_pdsch->Qm,
sched_pdsch->R,
ps->nrOfLayers,
ps->nrOfSymbols,
ps->N_PRB_DMRS * ps->N_DMRS_SLOT,
sched_ctrl->num_total_bytes + oh,
......@@ -1048,8 +1065,7 @@ void nr_schedule_ue_spec(module_id_t module_id,
harq->is_waiting = true;
UE_info->mac_stats[UE_id].dlsch_rounds[harq->round]++;
LOG_D(NR_MAC,
"%4d.%2d [DLSCH/PDSCH/PUCCH] UE %d RNTI %04x DCI L %d start %3d RBs %3d startSymbol %2d nb_symbol %2d dmrspos %x MCS %2d TBS %4d HARQ PID %2d round %d RV %d NDI %d dl_data_to_ULACK %d (%d.%d) PUCCH allocation %d TPC %d\n",
LOG_D(NR_MAC,"%4d.%2d [DLSCH/PDSCH/PUCCH] UE %d RNTI %04x DCI L %d start %3d RBs %3d startSymbol %2d nb_symbol %2d dmrspos %x MCS %2d nrOfLayers %d TBS %4d HARQ PID %2d round %d RV %d NDI %d dl_data_to_ULACK %d (%d.%d) PUCCH allocation %d TPC %d\n",
frame,
slot,
UE_id,
......@@ -1061,6 +1077,7 @@ void nr_schedule_ue_spec(module_id_t module_id,
ps->nrOfSymbols,
ps->dl_dmrs_symb_pos,
sched_pdsch->mcs,
nrOfLayers,
TBS,
current_harq_pid,
harq->round,
......
......@@ -165,7 +165,7 @@ void nr_schedule_css_dlsch_phytest(module_id_t module_idP,
scc->dmrs_TypeA_Position,
NrOfSymbols,
StartSymbolIndex,
mappingtype);
mappingtype, 1);
/*
AssertFatal(k0==0,"k0 is not zero for Initial DL BWP TimeDomain Alloc\n");
......@@ -278,12 +278,11 @@ void nr_preprocessor_phytest(module_id_t module_id,
UE_id);
NR_UE_sched_ctrl_t *sched_ctrl = &UE_info->UE_sched_ctrl[UE_id];
const int tda = sched_ctrl->active_bwp ? RC.nrmac[module_id]->preferred_dl_tda[sched_ctrl->active_bwp->bwp_Id][slot] : 1;
const long f = sched_ctrl->active_bwp ? sched_ctrl->search_space->searchSpaceType->choice.ue_Specific->dci_Formats : 0;
NR_pdsch_semi_static_t *ps = &sched_ctrl->pdsch_semi_static;
ps->nrOfLayers = target_dl_Nl;
if (ps->time_domain_allocation != tda)
nr_set_pdsch_semi_static(
scc, UE_info->CellGroup[UE_id], sched_ctrl->active_bwp, NULL, tda, f, ps);
if (ps->time_domain_allocation != tda || ps->nrOfLayers != target_dl_Nl)
nr_set_pdsch_semi_static(scc, UE_info->CellGroup[UE_id], sched_ctrl->active_bwp, NULL, tda, target_dl_Nl, sched_ctrl, ps);
/* find largest unallocated chunk */
const int bwpSize = NRRIV2BW(sched_ctrl->active_bwp->bwp_Common->genericParameters.locationAndBandwidth, MAX_BWP_SIZE);
......@@ -520,12 +519,14 @@ bool nr_ul_preprocessor_phytest(module_id_t module_id, frame_t frame, sub_frame_
sched_ctrl->coreset,
Y);
if (sched_ctrl->cce_index < 0) {
if (CCEIndex < 0) {
LOG_E(MAC, "%s(): CCE list not empty, couldn't schedule PUSCH\n", __func__);
nr_mac->pdcch_cand[cid]--;
return false;
}
sched_ctrl->cce_index = CCEIndex;
const int mcs = target_ul_mcs;
NR_sched_pusch_t *sched_pusch = &sched_ctrl->sched_pusch;
sched_pusch->mcs = mcs;
......
......@@ -720,7 +720,7 @@ void nr_rx_sdu(const module_id_t gnb_mod_idP,
UE_info->UE_sched_ctrl[UE_id].pusch_consecutive_dtx_cnt++;
UE_info->mac_stats[UE_id].ulsch_DTX++;
}
if (UE_info->UE_sched_ctrl[UE_id].pusch_consecutive_dtx_cnt >= pusch_failure_thres) {
if (!get_softmodem_params()->phy_test && UE_info->UE_sched_ctrl[UE_id].pusch_consecutive_dtx_cnt >= pusch_failure_thres) {
LOG_W(NR_MAC,"Detected UL Failure on PUSCH after %d PUSCH DTX, stopping scheduling\n",
UE_info->UE_sched_ctrl[UE_id].pusch_consecutive_dtx_cnt);
UE_info->UE_sched_ctrl[UE_id].ul_failure = 1;
......@@ -1010,6 +1010,7 @@ bool allocate_ul_retransmission(module_id_t module_id,
uint16_t new_rbSize;
bool success = nr_find_nb_rb(retInfo->Qm,
retInfo->R,
1, // layers
temp_ps.nrOfSymbols,
temp_ps.N_PRB_DMRS * temp_ps.num_dmrs_symb,
retInfo->tb_size,
......@@ -1355,6 +1356,7 @@ void pf_ul(module_id_t module_id,
uint32_t TBS = 0;
nr_find_nb_rb(sched_pusch->Qm,
sched_pusch->R,
1, // layers
ps->nrOfSymbols,
ps->N_PRB_DMRS * ps->num_dmrs_symb,
B,
......
......@@ -245,7 +245,7 @@ void nr_configure_pucch(nfapi_nr_pucch_pdu_t* pucch_pdu,
uint16_t O_csi,
uint16_t O_ack,
uint8_t O_sr,
int r_pucch);
int r_pucch);
void find_search_space(int ss_type,
NR_BWP_Downlink_t *bwp,
......@@ -310,7 +310,8 @@ void nr_set_pdsch_semi_static(const NR_ServingCellConfigCommon_t *scc,
const NR_BWP_Downlink_t *bwp,
const NR_BWP_DownlinkDedicated_t *bwpd0,
int tda,
const long dci_format,
uint8_t layers,
NR_UE_sched_ctrl_t *sched_ctrl,
NR_pdsch_semi_static_t *ps);
void nr_set_pusch_semi_static(const NR_ServingCellConfigCommon_t *scc,
......@@ -454,6 +455,13 @@ void find_SSB_and_RO_available(module_id_t module_idP);
void set_dl_dmrs_ports(NR_pdsch_semi_static_t *ps);
void set_dl_mcs(NR_sched_pdsch_t *sched_pdsch,
NR_UE_sched_ctrl_t *sched_ctrl,
uint8_t *target_mcs,
uint8_t mcs_table_idx);
uint8_t set_dl_nrOfLayers(NR_UE_sched_ctrl_t *sched_ctrl);
void calculate_preferred_dl_tda(module_id_t module_id, const NR_BWP_Downlink_t *bwp);
void calculate_preferred_ul_tda(module_id_t module_id, const NR_BWP_Uplink_t *ubwp);
......@@ -461,6 +469,7 @@ bool find_free_CCE(module_id_t module_id, sub_frame_t slot, int UE_id);
bool nr_find_nb_rb(uint16_t Qm,
uint16_t R,
uint8_t nrOfLayers,
uint16_t nb_symb_sch,
uint16_t nb_dmrs_prb,
uint32_t bytes,
......
......@@ -391,7 +391,8 @@ typedef struct NR_sched_srs {
typedef struct NR_pdsch_semi_static {
int time_domain_allocation;
uint8_t numDmrsCdmGrpsNoData;
uint8_t frontloaded_symb;
int mapping_type;
int startSymbolIndex;
int nrOfSymbols;
uint8_t nrOfLayers;
......@@ -477,6 +478,7 @@ struct CRI_RI_LI_PMI_CQI {
uint8_t pmi_x2;
uint8_t wb_cqi_1tb;
uint8_t wb_cqi_2tb;
uint8_t cqi_table;
};
typedef struct CRI_SSB_RSRP {
......@@ -487,11 +489,8 @@ typedef struct CRI_SSB_RSRP {
} CRI_SSB_RSRP_t;
struct CSI_Report {
NR_CSI_Report_Config_PR present;
union Config_CSI_Report {
struct CRI_RI_LI_PMI_CQI cri_ri_li_pmi_cqi_report;
struct CRI_SSB_RSRP ssb_cri_report;
} choice;
struct CRI_RI_LI_PMI_CQI cri_ri_li_pmi_cqi_report;
struct CRI_SSB_RSRP ssb_cri_report;
};
#define MAX_SR_BITLEN 8
......@@ -504,12 +503,13 @@ typedef struct {
}L1_RSRP_bitlen_t;
typedef struct{
uint8_t ri_restriction;
uint8_t cri_bitlen;
uint8_t ri_bitlen;
uint8_t li_bitlen;
uint8_t pmi_x1_bitlen;
uint8_t pmi_x2_bitlen;
uint8_t cqi_bitlen;
uint8_t li_bitlen[8];
uint8_t pmi_x1_bitlen[8];
uint8_t pmi_x2_bitlen[8];
uint8_t cqi_bitlen[8];
} CSI_Meas_bitlen_t;
typedef struct nr_csi_report {
......@@ -618,9 +618,9 @@ typedef struct {
int pusch_consecutive_dtx_cnt;
int pucch_consecutive_dtx_cnt;
int ul_failure;
struct CSI_Report CSI_report[MAX_CSI_REPORTS];
struct CSI_Report CSI_report;
bool SR;
bool set_mcs;
/// information about every HARQ process
NR_UE_harq_t harq_processes[NR_MAX_NB_HARQ_PROCESSES];
/// HARQ processes that are free
......@@ -673,7 +673,6 @@ typedef struct {
NR_mac_stats_t mac_stats[MAX_MOBILES_PER_GNB];
NR_list_t list;
int num_UEs;
bool active[MAX_MOBILES_PER_GNB];
rnti_t rnti[MAX_MOBILES_PER_GNB];
NR_CellGroupConfig_t *CellGroup[MAX_MOBILES_PER_GNB];
......
......@@ -1103,7 +1103,7 @@ boolean_t nr_rrc_pdcp_config_asn1_req(
if (kRRCint != NULL) {
/* todo */
}
if (drb2release_list != NULL) {
// TODO
}
......
......@@ -361,10 +361,10 @@ int8_t nr_mac_rrc_data_ind(const module_id_t module_idP,
}
void nr_mac_gNB_rrc_ul_failure(const module_id_t Mod_instP,
const int CC_idP,
const frame_t frameP,
const sub_frame_t subframeP,
const rnti_t rntiP) {
const int CC_idP,
const frame_t frameP,
const sub_frame_t subframeP,
const rnti_t rntiP) {
struct rrc_gNB_ue_context_s *ue_context_p = NULL;
ue_context_p = rrc_gNB_get_ue_context(
RC.nrrrc[Mod_instP],
......
......@@ -458,7 +458,6 @@ typedef struct {
NR_CellGroupConfig_t *secondaryCellGroup[MAX_NR_RRC_UE_CONTEXTS];
NR_SRB_INFO SI;
NR_SRB_INFO Srb0;
int initial_csi_index[MAX_NR_RRC_UE_CONTEXTS];
int p_gNB;
} rrc_gNB_carrier_data_t;
......
......@@ -82,10 +82,13 @@ void fill_default_secondaryCellGroup(NR_ServingCellConfigCommon_t *servingcellco
int minRXTXTIMEpdsch,
int do_csirs,
int do_srs,
int initial_csi_index,
int uid);
void config_csirs(NR_ServingCellConfigCommon_t *servingcellconfigcommon, NR_CSI_MeasConfig_t *csi_MeasConfig, int dl_antenna_ports, int do_csirs);
void config_csirs(NR_ServingCellConfigCommon_t *servingcellconfigcommon,
NR_CSI_MeasConfig_t *csi_MeasConfig,
int dl_antenna_ports,
int curr_bwp,
int do_csirs);
void fill_default_reconfig(NR_ServingCellConfigCommon_t *servingcellconfigcommon,
NR_ServingCellConfig_t *servingcellconfigdedicated,
......@@ -95,7 +98,6 @@ void fill_default_reconfig(NR_ServingCellConfigCommon_t *servingcellconfigcommon
int minRXTXTIMEpdsch,
int do_csirs,
int do_srs,
int initial_csi_index,
int uid);
void fill_default_rbconfig(NR_RadioBearerConfig_t *rbconfig,
......
......@@ -3257,20 +3257,20 @@ void nr_rrc_subframe_process(protocol_ctxt_t *const ctxt_pP, const int CC_id) {
RB_FOREACH(ue_context_p, rrc_nr_ue_tree_s, &(RC.nrrrc[ctxt_pP->module_id]->rrc_ue_head)) {
ctxt_pP->rnti = ue_context_p->ue_id_rnti;
if (fd) {
if (ue_context_p->ue_context.Initialue_identity_5g_s_TMSI.presence == TRUE) {
fprintf(fd,"NR RRC UE rnti %x: S-TMSI %x failure timer %d/8\n",
if (fd) {
if (ue_context_p->ue_context.Initialue_identity_5g_s_TMSI.presence == TRUE) {
fprintf(fd,"NR RRC UE rnti %x: S-TMSI %x failure timer %d/8\n",
ue_context_p->ue_id_rnti,
ue_context_p->ue_context.Initialue_identity_5g_s_TMSI.fiveg_tmsi,
ue_context_p->ue_context.ul_failure_timer);
} else {
fprintf(fd,"NR RRC UE rnti %x failure timer %d/8\n",
} else {
fprintf(fd,"NR RRC UE rnti %x failure timer %d/8\n",
ue_context_p->ue_id_rnti,
ue_context_p->ue_context.ul_failure_timer);
}
}
if (ue_context_p->ue_context.UE_Capability_nr) {
fprintf(fd,"NR RRC UE cap: BW DL %x. BW UL %x, 256 QAM DL %s, 256 QAM UL %s, DL MIMO Layers %d UL MIMO Layers (CB) %d UL MIMO Layers (nonCB) %d\n",
if (ue_context_p->ue_context.UE_Capability_nr) {
fprintf(fd,"NR RRC UE cap: BW DL %x. BW UL %x, 256 QAM DL %s, 256 QAM UL %s, DL MIMO Layers %d UL MIMO Layers (CB) %d UL MIMO Layers (nonCB) %d\n",
get_dl_bw_mask(RC.nrrrc[0],ue_context_p->ue_context.UE_Capability_nr),
get_ul_bw_mask(RC.nrrrc[0],ue_context_p->ue_context.UE_Capability_nr),
is_dl_256QAM_supported(RC.nrrrc[0],ue_context_p->ue_context.UE_Capability_nr) == 1 ? "yes" : "no",
......@@ -3278,7 +3278,7 @@ void nr_rrc_subframe_process(protocol_ctxt_t *const ctxt_pP, const int CC_id) {
get_dl_mimo_layers(RC.nrrrc[0],ue_context_p->ue_context.UE_Capability_nr),
get_ul_mimo_layersCB(RC.nrrrc[0],ue_context_p->ue_context.UE_Capability_nr),
get_ul_mimo_layers(RC.nrrrc[0],ue_context_p->ue_context.UE_Capability_nr));
}
}
}
if (ue_context_p->ue_context.ul_failure_timer > 0) {
ue_context_p->ue_context.ul_failure_timer++;
......@@ -3339,6 +3339,7 @@ void nr_rrc_subframe_process(protocol_ctxt_t *const ctxt_pP, const int CC_id) {
if (fd) fclose(fd);
/* send a tick to x2ap */
if (is_x2ap_enabled()){
msg = itti_alloc_new_message(TASK_RRC_ENB, 0, X2AP_SUBFRAME_PROCESS);
......
......@@ -177,7 +177,6 @@ void rrc_add_nsa_user(gNB_RRC_INST *rrc,struct rrc_gNB_ue_context_s *ue_context_
ue_context_p->ue_context.reconfig->criticalExtensions.present = NR_RRCReconfiguration__criticalExtensions_PR_rrcReconfiguration;
NR_RRCReconfiguration_IEs_t *reconfig_ies=calloc(1,sizeof(NR_RRCReconfiguration_IEs_t));
ue_context_p->ue_context.reconfig->criticalExtensions.choice.rrcReconfiguration = reconfig_ies;
carrier->initial_csi_index[ue_context_p->local_uid + 1] = 0;
ue_context_p->ue_context.rb_config = calloc(1,sizeof(NR_RRCReconfiguration_t));
if (get_softmodem_params()->phy_test == 1 || get_softmodem_params()->do_ra == 1 || get_softmodem_params()->sa == 1){
fill_default_rbconfig(ue_context_p->ue_context.rb_config,
......@@ -270,7 +269,6 @@ void rrc_add_nsa_user(gNB_RRC_INST *rrc,struct rrc_gNB_ue_context_s *ue_context_
carrier->minRXTXTIME,
carrier->do_CSIRS,
carrier->do_SRS,
carrier->initial_csi_index[ue_context_p->local_uid + 1],
ue_context_p->local_uid);
} else {
fill_default_reconfig(carrier->servingcellconfigcommon,
......@@ -281,7 +279,6 @@ void rrc_add_nsa_user(gNB_RRC_INST *rrc,struct rrc_gNB_ue_context_s *ue_context_
carrier->minRXTXTIME,
carrier->do_CSIRS,
carrier->do_SRS,
carrier->initial_csi_index[ue_context_p->local_uid + 1],
ue_context_p->local_uid);
}
ue_context_p->ue_id_rnti = ue_context_p->ue_context.secondaryCellGroup->spCellConfig->reconfigurationWithSync->newUE_Identity;
......
......@@ -58,8 +58,8 @@ void fill_default_secondaryCellGroup(NR_ServingCellConfigCommon_t *servingcellco
int minRXTXTIME,
int do_csirs,
int do_srs,
int initial_csi_index,
int uid) {
AssertFatal(servingcellconfigcommon!=NULL,"servingcellconfigcommon is null\n");
AssertFatal(secondaryCellGroup!=NULL,"secondaryCellGroup is null\n");
......@@ -560,7 +560,9 @@ void fill_default_secondaryCellGroup(NR_ServingCellConfigCommon_t *servingcellco
}
bwp->bwp_Dedicated->pdsch_Config->choice.setup->dataScramblingIdentityPDSCH = NULL;
if (dl_antenna_ports > 1)// for MIMO, we use DMRS Config Type 2
if ((get_softmodem_params()->do_ra ||
get_softmodem_params()->phy_test) &&
dl_antenna_ports > 1) // for MIMO, we use DMRS Config Type 2 but only with OAI UE
bwp->bwp_Dedicated->pdsch_Config->choice.setup->dmrs_DownlinkForPDSCH_MappingTypeA->choice.setup->dmrs_Type=calloc(1,sizeof(*bwp->bwp_Dedicated->pdsch_Config->choice.setup->dmrs_DownlinkForPDSCH_MappingTypeA->choice.setup->dmrs_Type));
else
bwp->bwp_Dedicated->pdsch_Config->choice.setup->dmrs_DownlinkForPDSCH_MappingTypeA->choice.setup->dmrs_Type=NULL;
......@@ -1056,7 +1058,7 @@ void fill_default_secondaryCellGroup(NR_ServingCellConfigCommon_t *servingcellco
pdsch_servingcellconfig->pucch_Cell= NULL;
pdsch_servingcellconfig->ext1=calloc(1,sizeof(*pdsch_servingcellconfig->ext1));
pdsch_servingcellconfig->ext1->maxMIMO_Layers = calloc(1,sizeof(*pdsch_servingcellconfig->ext1->maxMIMO_Layers));
*pdsch_servingcellconfig->ext1->maxMIMO_Layers = 2;
*pdsch_servingcellconfig->ext1->maxMIMO_Layers = dl_antenna_ports;
pdsch_servingcellconfig->ext1->processingType2Enabled = NULL;
secondaryCellGroup->spCellConfig->spCellConfigDedicated->csi_MeasConfig=NULL;
......@@ -1077,7 +1079,7 @@ void fill_default_secondaryCellGroup(NR_ServingCellConfigCommon_t *servingcellco
imres0->csi_IM_ResourceElementPattern->choice.pattern1->symbolLocation_p1 = 6;
imres0->freqBand = calloc(1,sizeof(*imres0->freqBand));
imres0->freqBand->startingRB = 0;
imres0->freqBand->nrofRBs = 108;
imres0->freqBand->nrofRBs = ((curr_bwp>>2)+(curr_bwp%4>0))<<2;
imres0->periodicityAndOffset = calloc(1,sizeof(*imres0->periodicityAndOffset));
imres0->periodicityAndOffset->present = NR_CSI_ResourcePeriodicityAndOffset_PR_slots320;
imres0->periodicityAndOffset->choice.slots320 = 0;
......@@ -1096,7 +1098,6 @@ void fill_default_secondaryCellGroup(NR_ServingCellConfigCommon_t *servingcellco
}
csi_MeasConfig->csi_IM_ResourceToReleaseList = NULL;
csi_MeasConfig->csi_IM_ResourceSetToAddModList = NULL;
csi_MeasConfig->csi_IM_ResourceSetToReleaseList = NULL;
if (do_csirs) {
......@@ -1116,7 +1117,7 @@ void fill_default_secondaryCellGroup(NR_ServingCellConfigCommon_t *servingcellco
csi_MeasConfig->nzp_CSI_RS_ResourceSetToReleaseList = NULL;
config_csirs(servingcellconfigcommon, csi_MeasConfig,dl_antenna_ports,do_csirs);
config_csirs(servingcellconfigcommon, csi_MeasConfig,dl_antenna_ports,curr_bwp,do_csirs);
csi_MeasConfig->csi_SSB_ResourceSetToAddModList = calloc(1,sizeof(*csi_MeasConfig->csi_SSB_ResourceSetToAddModList));
csi_MeasConfig->csi_SSB_ResourceSetToReleaseList = NULL;
......@@ -1171,6 +1172,8 @@ void fill_default_secondaryCellGroup(NR_ServingCellConfigCommon_t *servingcellco
NR_CSI_IM_ResourceSetId_t *csiim00 = calloc(1,sizeof(*csiim00));
*csiim00 = 0;
ASN_SEQUENCE_ADD(&csires2->csi_RS_ResourceSetList.choice.csi_IM_ResourceSetList->list,csiim00);
csires2->bwp_Id = 1;
csires2->resourceType = NR_CSI_ResourceConfig__resourceType_periodic;
ASN_SEQUENCE_ADD(&csi_MeasConfig->csi_ResourceConfigToAddModList->list,csires2);
}
......@@ -1315,7 +1318,11 @@ void fill_default_secondaryCellGroup(NR_ServingCellConfigCommon_t *servingcellco
}
void config_csirs(NR_ServingCellConfigCommon_t *servingcellconfigcommon, NR_CSI_MeasConfig_t *csi_MeasConfig, int dl_antenna_ports, int do_csirs) {
void config_csirs(NR_ServingCellConfigCommon_t *servingcellconfigcommon,
NR_CSI_MeasConfig_t *csi_MeasConfig,
int dl_antenna_ports,
int curr_bwp,
int do_csirs) {
if (do_csirs) {
csi_MeasConfig->nzp_CSI_RS_ResourceToAddModList = calloc(1,sizeof(*csi_MeasConfig->nzp_CSI_RS_ResourceToAddModList));
......@@ -1350,7 +1357,7 @@ void config_csirs(NR_ServingCellConfigCommon_t *servingcellconfigcommon, NR_CSI_
resourceMapping.density.present = NR_CSI_RS_ResourceMapping__density_PR_one;
resourceMapping.density.choice.one = (NULL_t)0;
resourceMapping.freqBand.startingRB = 0;
resourceMapping.freqBand.nrofRBs = 108;
resourceMapping.freqBand.nrofRBs = ((curr_bwp>>2)+(curr_bwp%4>0))<<2;
nzpcsi0->resourceMapping = resourceMapping;
nzpcsi0->powerControlOffset = 0;
nzpcsi0->powerControlOffsetSS=calloc(1,sizeof(*nzpcsi0->powerControlOffsetSS));
......@@ -1375,7 +1382,6 @@ void fill_default_reconfig(NR_ServingCellConfigCommon_t *servingcellconfigcommon
int minRXTXTIME,
int do_csirs,
int do_srs,
int initial_csi_index,
int uid) {
AssertFatal(servingcellconfigcommon!=NULL,"servingcellconfigcommon is null\n");
AssertFatal(reconfig!=NULL,"reconfig is null\n");
......@@ -1392,7 +1398,6 @@ void fill_default_reconfig(NR_ServingCellConfigCommon_t *servingcellconfigcommon
minRXTXTIME,
do_csirs,
do_srs,
initial_csi_index,
uid);
xer_fprint(stdout, &asn_DEF_NR_CellGroupConfig, (const void*)secondaryCellGroup);
......
......@@ -648,57 +648,56 @@ static int trx_usrp_read(openair0_device *device, openair0_timestamp *ptimestamp
AssertFatal(1==0,"Shouldn't be here\n");
}
samples_received=0;
while (samples_received != nsamps) {
samples_received=0;
while (samples_received != nsamps) {
if (cc>1) {
if (cc>1) {
// receive multiple channels (e.g. RF A and RF B)
std::vector<void *> buff_ptrs;
for (int i=0; i<cc; i++) buff_ptrs.push_back(buff_tmp[i]+samples_received);
std::vector<void *> buff_ptrs;
samples_received += s->rx_stream->recv(buff_ptrs, nsamps, s->rx_md);
} else {
for (int i=0; i<cc; i++) buff_ptrs.push_back(buff_tmp[i]+samples_received);
samples_received += s->rx_stream->recv(buff_ptrs, nsamps, s->rx_md);
} else {
// receive a single channel (e.g. from connector RF A)
samples_received += s->rx_stream->recv((void*)((int32_t*)buff_tmp[0]+samples_received),
nsamps-samples_received, s->rx_md);
}
if ((s->wait_for_first_pps == 0) && (s->rx_md.error_code!=uhd::rx_metadata_t::ERROR_CODE_NONE))
break;
samples_received += s->rx_stream->recv((void*)((int32_t*)buff_tmp[0]+samples_received),
nsamps-samples_received, s->rx_md);
}
if ((s->wait_for_first_pps == 0) && (s->rx_md.error_code!=uhd::rx_metadata_t::ERROR_CODE_NONE))
break;
if ((s->wait_for_first_pps == 1) && (samples_received != nsamps)) {
printf("sleep...\n"); //usleep(100);
}
if ((s->wait_for_first_pps == 1) && (samples_received != nsamps)) {
printf("sleep...\n"); //usleep(100);
}
if (samples_received == nsamps) s->wait_for_first_pps=0;
}
if (samples_received == nsamps) s->wait_for_first_pps=0;
// bring RX data into 12 LSBs for softmodem RX
for (int i=0; i<cc; i++) {
for (int j=0; j<nsamps2; j++) {
// bring RX data into 12 LSBs for softmodem RX
for (int i=0; i<cc; i++) {
for (int j=0; j<nsamps2; j++) {
#if defined(__x86_64__) || defined(__i386__)
#ifdef __AVX2__
// FK: in some cases the buffer might not be 32 byte aligned, so we cannot use avx2
// FK: in some cases the buffer might not be 32 byte aligned, so we cannot use avx2
if ((((uintptr_t) buff[i])&0x1F)==0) {
((__m256i *)buff[i])[j] = _mm256_srai_epi16(buff_tmp[i][j],rxshift);
} else {
((__m128i *)buff[i])[2*j] = _mm_srai_epi16(((__m128i *)buff_tmp[i])[2*j],rxshift);
((__m128i *)buff[i])[2*j+1] = _mm_srai_epi16(((__m128i *)buff_tmp[i])[2*j+1],rxshift);
}
if ((((uintptr_t) buff[i])&0x1F)==0) {
((__m256i *)buff[i])[j] = _mm256_srai_epi16(buff_tmp[i][j],rxshift);
} else {
((__m128i *)buff[i])[2*j] = _mm_srai_epi16(((__m128i *)buff_tmp[i])[2*j],rxshift);
((__m128i *)buff[i])[2*j+1] = _mm_srai_epi16(((__m128i *)buff_tmp[i])[2*j+1],rxshift);
}
#else
((__m128i *)buff[i])[j] = _mm_srai_epi16(buff_tmp[i][j],rxshift);
((__m128i *)buff[i])[j] = _mm_srai_epi16(buff_tmp[i][j],rxshift);
#endif
#elif defined(__arm__)
((int16x8_t *)buff[i])[j] = vshrq_n_s16(buff_tmp[i][j],rxshift);
((int16x8_t *)buff[i])[j] = vshrq_n_s16(buff_tmp[i][j],rxshift);
#endif
}
}
}
if (samples_received < nsamps) {
LOG_E(HW,"[recv] received %d samples out of %d\n",samples_received,nsamps);
}
if (samples_received < nsamps) {
LOG_E(HW,"[recv] received %d samples out of %d\n",samples_received,nsamps);
}
if ( s->rx_md.error_code != uhd::rx_metadata_t::ERROR_CODE_NONE)
LOG_E(HW, "%s\n", s->rx_md.to_pp_string(true).c_str());
......
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