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lizhongxiao
OpenXG-RAN
Commits
a7d72715
Commit
a7d72715
authored
Dec 04, 2021
by
francescomani
Browse files
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Browse Files
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Plain Diff
addressing review comments and some other changes
parent
4a267459
Changes
4
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Showing
4 changed files
with
22 additions
and
26 deletions
+22
-26
openair1/SCHED_NR_UE/fapi_nr_ue_l1.c
openair1/SCHED_NR_UE/fapi_nr_ue_l1.c
+2
-2
openair2/LAYER2/NR_MAC_UE/nr_ue_scheduler.c
openair2/LAYER2/NR_MAC_UE/nr_ue_scheduler.c
+12
-17
openair2/LAYER2/NR_MAC_gNB/gNB_scheduler_primitives.c
openair2/LAYER2/NR_MAC_gNB/gNB_scheduler_primitives.c
+2
-1
openair2/RRC/NR/rrc_gNB_reconfig.c
openair2/RRC/NR/rrc_gNB_reconfig.c
+6
-6
No files found.
openair1/SCHED_NR_UE/fapi_nr_ue_l1.c
View file @
a7d72715
...
@@ -50,7 +50,7 @@ void configure_dlsch(NR_UE_DLSCH_t *dlsch0,
...
@@ -50,7 +50,7 @@ void configure_dlsch(NR_UE_DLSCH_t *dlsch0,
fapi_nr_dl_config_dlsch_pdu_rel15_t
*
dlsch_config_pdu
,
fapi_nr_dl_config_dlsch_pdu_rel15_t
*
dlsch_config_pdu
,
int
rnti
)
{
int
rnti
)
{
uint8_t
current_harq_pid
=
dlsch_config_pdu
->
harq_process_nbr
;
const
uint8_t
current_harq_pid
=
dlsch_config_pdu
->
harq_process_nbr
;
dlsch0
->
current_harq_pid
=
current_harq_pid
;
dlsch0
->
current_harq_pid
=
current_harq_pid
;
dlsch0
->
active
=
1
;
dlsch0
->
active
=
1
;
dlsch0
->
rnti
=
rnti
;
dlsch0
->
rnti
=
rnti
;
...
@@ -126,7 +126,7 @@ int8_t nr_ue_scheduled_response(nr_scheduled_response_t *scheduled_response){
...
@@ -126,7 +126,7 @@ int8_t nr_ue_scheduled_response(nr_scheduled_response_t *scheduled_response){
switch
(
dl_config
->
dl_config_list
[
i
].
pdu_type
)
{
switch
(
dl_config
->
dl_config_list
[
i
].
pdu_type
)
{
case
FAPI_NR_DL_CONFIG_TYPE_DCI
:
case
FAPI_NR_DL_CONFIG_TYPE_DCI
:
pdcch_config
=
&
dl_config
->
dl_config_list
[
i
].
dci_config_pdu
.
dci_config_rel15
;
pdcch_config
=
&
dl_config
->
dl_config_list
[
i
].
dci_config_pdu
.
dci_config_rel15
;
memcpy
(
(
void
*
)
&
pdcch_vars
->
pdcch_config
[
pdcch_vars
->
nb_search_space
],(
void
*
)
pdcch_config
,
sizeof
(
*
pdcch_config
));
memcpy
(
&
pdcch_vars
->
pdcch_config
[
pdcch_vars
->
nb_search_space
],
pdcch_config
,
sizeof
(
*
pdcch_config
));
pdcch_vars
->
nb_search_space
=
pdcch_vars
->
nb_search_space
+
1
;
pdcch_vars
->
nb_search_space
=
pdcch_vars
->
nb_search_space
+
1
;
pdcch_vars
->
sfn
=
scheduled_response
->
frame
;
pdcch_vars
->
sfn
=
scheduled_response
->
frame
;
pdcch_vars
->
slot
=
slot
;
pdcch_vars
->
slot
=
slot
;
...
...
openair2/LAYER2/NR_MAC_UE/nr_ue_scheduler.c
View file @
a7d72715
...
@@ -2212,14 +2212,11 @@ void nr_schedule_csi_for_im(NR_UE_MAC_INST_t *mac, int frame, int slot) {
...
@@ -2212,14 +2212,11 @@ void nr_schedule_csi_for_im(NR_UE_MAC_INST_t *mac, int frame, int slot) {
csi_period_offset
(
NULL
,
imcsi
->
periodicityAndOffset
,
&
period
,
&
offset
);
csi_period_offset
(
NULL
,
imcsi
->
periodicityAndOffset
,
&
period
,
&
offset
);
if
((
frame
*
nr_slots_per_frame
[
mu
]
+
slot
-
offset
)
%
period
==
0
)
{
if
((
frame
*
nr_slots_per_frame
[
mu
]
+
slot
-
offset
)
%
period
==
0
)
{
fapi_nr_dl_config_csiim_pdu_rel15_t
*
csiim_config_pdu
=
&
dl_config
->
dl_config_list
[
dl_config
->
number_pdus
].
csiim_config_pdu
.
csiim_config_rel15
;
fapi_nr_dl_config_csiim_pdu_rel15_t
*
csiim_config_pdu
=
&
dl_config
->
dl_config_list
[
dl_config
->
number_pdus
].
csiim_config_pdu
.
csiim_config_rel15
;
if
(
mac
->
DLbwp
[
dl_bwp_id
-
1
]){
const
NR_BWP_Downlink_t
*
dlbwp
=
mac
->
DLbwp
[
dl_bwp_id
-
1
];
csiim_config_pdu
->
bwp_size
=
NRRIV2BW
(
mac
->
DLbwp
[
dl_bwp_id
-
1
]
->
bwp_Common
->
genericParameters
.
locationAndBandwidth
,
MAX_BWP_SIZE
);
const
int
locationAndBandwidth
=
dlbwp
!=
NULL
?
dlbwp
->
bwp_Common
->
genericParameters
.
locationAndBandwidth
:
csiim_config_pdu
->
bwp_start
=
NRRIV2PRBOFFSET
(
mac
->
DLbwp
[
dl_bwp_id
-
1
]
->
bwp_Common
->
genericParameters
.
locationAndBandwidth
,
MAX_BWP_SIZE
);
mac
->
scc_SIB
->
downlinkConfigCommon
.
initialDownlinkBWP
.
genericParameters
.
locationAndBandwidth
;
}
csiim_config_pdu
->
bwp_size
=
NRRIV2BW
(
locationAndBandwidth
,
MAX_BWP_SIZE
);
else
{
csiim_config_pdu
->
bwp_start
=
NRRIV2PRBOFFSET
(
locationAndBandwidth
,
MAX_BWP_SIZE
);
csiim_config_pdu
->
bwp_size
=
NRRIV2BW
(
mac
->
scc_SIB
->
downlinkConfigCommon
.
initialDownlinkBWP
.
genericParameters
.
locationAndBandwidth
,
MAX_BWP_SIZE
);
csiim_config_pdu
->
bwp_start
=
NRRIV2PRBOFFSET
(
mac
->
scc_SIB
->
downlinkConfigCommon
.
initialDownlinkBWP
.
genericParameters
.
locationAndBandwidth
,
MAX_BWP_SIZE
);
}
csiim_config_pdu
->
subcarrier_spacing
=
mu
;
csiim_config_pdu
->
subcarrier_spacing
=
mu
;
csiim_config_pdu
->
start_rb
=
imcsi
->
freqBand
->
startingRB
;
csiim_config_pdu
->
start_rb
=
imcsi
->
freqBand
->
startingRB
;
csiim_config_pdu
->
nr_of_rbs
=
imcsi
->
freqBand
->
nrofRBs
;
csiim_config_pdu
->
nr_of_rbs
=
imcsi
->
freqBand
->
nrofRBs
;
...
@@ -2280,14 +2277,11 @@ void nr_schedule_csirs_reception(NR_UE_MAC_INST_t *mac, int frame, int slot) {
...
@@ -2280,14 +2277,11 @@ void nr_schedule_csirs_reception(NR_UE_MAC_INST_t *mac, int frame, int slot) {
NR_CSI_RS_ResourceMapping_t
resourceMapping
=
nzpcsi
->
resourceMapping
;
NR_CSI_RS_ResourceMapping_t
resourceMapping
=
nzpcsi
->
resourceMapping
;
if
(
mac
->
DLbwp
[
dl_bwp_id
-
1
]){
const
NR_BWP_Downlink_t
*
dlbwp
=
mac
->
DLbwp
[
dl_bwp_id
-
1
];
csirs_config_pdu
->
bwp_size
=
NRRIV2BW
(
mac
->
DLbwp
[
dl_bwp_id
-
1
]
->
bwp_Common
->
genericParameters
.
locationAndBandwidth
,
MAX_BWP_SIZE
);
const
int
locationAndBandwidth
=
dlbwp
!=
NULL
?
dlbwp
->
bwp_Common
->
genericParameters
.
locationAndBandwidth
:
csirs_config_pdu
->
bwp_start
=
NRRIV2PRBOFFSET
(
mac
->
DLbwp
[
dl_bwp_id
-
1
]
->
bwp_Common
->
genericParameters
.
locationAndBandwidth
,
MAX_BWP_SIZE
);
mac
->
scc_SIB
->
downlinkConfigCommon
.
initialDownlinkBWP
.
genericParameters
.
locationAndBandwidth
;
}
csirs_config_pdu
->
bwp_size
=
NRRIV2BW
(
locationAndBandwidth
,
MAX_BWP_SIZE
);
else
{
csirs_config_pdu
->
bwp_start
=
NRRIV2PRBOFFSET
(
locationAndBandwidth
,
MAX_BWP_SIZE
);
csirs_config_pdu
->
bwp_size
=
NRRIV2BW
(
mac
->
scc_SIB
->
downlinkConfigCommon
.
initialDownlinkBWP
.
genericParameters
.
locationAndBandwidth
,
MAX_BWP_SIZE
);
csirs_config_pdu
->
bwp_start
=
NRRIV2PRBOFFSET
(
mac
->
scc_SIB
->
downlinkConfigCommon
.
initialDownlinkBWP
.
genericParameters
.
locationAndBandwidth
,
MAX_BWP_SIZE
);
}
csirs_config_pdu
->
subcarrier_spacing
=
mu
;
csirs_config_pdu
->
subcarrier_spacing
=
mu
;
csirs_config_pdu
->
start_rb
=
resourceMapping
.
freqBand
.
startingRB
;
csirs_config_pdu
->
start_rb
=
resourceMapping
.
freqBand
.
startingRB
;
csirs_config_pdu
->
nr_of_rbs
=
resourceMapping
.
freqBand
.
nrofRBs
;
csirs_config_pdu
->
nr_of_rbs
=
resourceMapping
.
freqBand
.
nrofRBs
;
...
@@ -2309,7 +2303,7 @@ void nr_schedule_csirs_reception(NR_UE_MAC_INST_t *mac, int frame, int slot) {
...
@@ -2309,7 +2303,7 @@ void nr_schedule_csirs_reception(NR_UE_MAC_INST_t *mac, int frame, int slot) {
case
NR_CSI_RS_ResourceMapping__frequencyDomainAllocation_PR_row2
:
case
NR_CSI_RS_ResourceMapping__frequencyDomainAllocation_PR_row2
:
csirs_config_pdu
->
row
=
2
;
csirs_config_pdu
->
row
=
2
;
csirs_config_pdu
->
freq_domain
=
(((
resourceMapping
.
frequencyDomainAllocation
.
choice
.
row2
.
buf
[
1
]
>>
4
)
&
0x0f
)
|
csirs_config_pdu
->
freq_domain
=
(((
resourceMapping
.
frequencyDomainAllocation
.
choice
.
row2
.
buf
[
1
]
>>
4
)
&
0x0f
)
|
((
resourceMapping
.
frequencyDomainAllocation
.
choice
.
row2
.
buf
[
0
]
<<
8
)
&
0xff0
));
((
resourceMapping
.
frequencyDomainAllocation
.
choice
.
row2
.
buf
[
0
]
<<
4
)
&
0xff0
));
break
;
break
;
case
NR_CSI_RS_ResourceMapping__frequencyDomainAllocation_PR_row4
:
case
NR_CSI_RS_ResourceMapping__frequencyDomainAllocation_PR_row4
:
csirs_config_pdu
->
row
=
4
;
csirs_config_pdu
->
row
=
4
;
...
@@ -2320,6 +2314,7 @@ void nr_schedule_csirs_reception(NR_UE_MAC_INST_t *mac, int frame, int slot) {
...
@@ -2320,6 +2314,7 @@ void nr_schedule_csirs_reception(NR_UE_MAC_INST_t *mac, int frame, int slot) {
// determining the row of table 7.4.1.5.3-1 in 38.211
// determining the row of table 7.4.1.5.3-1 in 38.211
switch
(
resourceMapping
.
nrofPorts
){
switch
(
resourceMapping
.
nrofPorts
){
case
NR_CSI_RS_ResourceMapping__nrofPorts_p1
:
case
NR_CSI_RS_ResourceMapping__nrofPorts_p1
:
AssertFatal
(
1
==
0
,
"Resource with 1 CSI port shouldn't be within other rows
\n
"
);
break
;
break
;
case
NR_CSI_RS_ResourceMapping__nrofPorts_p2
:
case
NR_CSI_RS_ResourceMapping__nrofPorts_p2
:
csirs_config_pdu
->
row
=
3
;
csirs_config_pdu
->
row
=
3
;
...
...
openair2/LAYER2/NR_MAC_gNB/gNB_scheduler_primitives.c
View file @
a7d72715
...
@@ -2273,7 +2273,7 @@ void nr_csirs_scheduling(int Mod_idP,
...
@@ -2273,7 +2273,7 @@ void nr_csirs_scheduling(int Mod_idP,
case
NR_CSI_RS_ResourceMapping__frequencyDomainAllocation_PR_row2
:
case
NR_CSI_RS_ResourceMapping__frequencyDomainAllocation_PR_row2
:
csirs_pdu_rel15
->
row
=
2
;
csirs_pdu_rel15
->
row
=
2
;
csirs_pdu_rel15
->
freq_domain
=
(((
resourceMapping
.
frequencyDomainAllocation
.
choice
.
row2
.
buf
[
1
]
>>
4
)
&
0x0f
)
|
csirs_pdu_rel15
->
freq_domain
=
(((
resourceMapping
.
frequencyDomainAllocation
.
choice
.
row2
.
buf
[
1
]
>>
4
)
&
0x0f
)
|
((
resourceMapping
.
frequencyDomainAllocation
.
choice
.
row2
.
buf
[
0
]
<<
8
)
&
0xff0
));
((
resourceMapping
.
frequencyDomainAllocation
.
choice
.
row2
.
buf
[
0
]
<<
4
)
&
0xff0
));
for
(
int
rb
=
csirs_pdu_rel15
->
start_rb
;
rb
<
(
csirs_pdu_rel15
->
start_rb
+
csirs_pdu_rel15
->
nr_of_rbs
);
rb
++
)
for
(
int
rb
=
csirs_pdu_rel15
->
start_rb
;
rb
<
(
csirs_pdu_rel15
->
start_rb
+
csirs_pdu_rel15
->
nr_of_rbs
);
rb
++
)
vrb_map
[
rb
+
csirs_pdu_rel15
->
bwp_start
]
|=
(
1
<<
csirs_pdu_rel15
->
symb_l0
);
vrb_map
[
rb
+
csirs_pdu_rel15
->
bwp_start
]
|=
(
1
<<
csirs_pdu_rel15
->
symb_l0
);
break
;
break
;
...
@@ -2288,6 +2288,7 @@ void nr_csirs_scheduling(int Mod_idP,
...
@@ -2288,6 +2288,7 @@ void nr_csirs_scheduling(int Mod_idP,
// determining the row of table 7.4.1.5.3-1 in 38.211
// determining the row of table 7.4.1.5.3-1 in 38.211
switch
(
resourceMapping
.
nrofPorts
){
switch
(
resourceMapping
.
nrofPorts
){
case
NR_CSI_RS_ResourceMapping__nrofPorts_p1
:
case
NR_CSI_RS_ResourceMapping__nrofPorts_p1
:
AssertFatal
(
1
==
0
,
"Resource with 1 CSI port shouldn't be within other rows
\n
"
);
break
;
break
;
case
NR_CSI_RS_ResourceMapping__nrofPorts_p2
:
case
NR_CSI_RS_ResourceMapping__nrofPorts_p2
:
csirs_pdu_rel15
->
row
=
3
;
csirs_pdu_rel15
->
row
=
3
;
...
...
openair2/RRC/NR/rrc_gNB_reconfig.c
View file @
a7d72715
...
@@ -1304,17 +1304,17 @@ void config_csirs(NR_ServingCellConfigCommon_t *servingcellconfigcommon, NR_CSI_
...
@@ -1304,17 +1304,17 @@ void config_csirs(NR_ServingCellConfigCommon_t *servingcellconfigcommon, NR_CSI_
resourceMapping
.
frequencyDomainAllocation
.
choice
.
row2
.
buf
=
calloc
(
2
,
sizeof
(
uint8_t
));
resourceMapping
.
frequencyDomainAllocation
.
choice
.
row2
.
buf
=
calloc
(
2
,
sizeof
(
uint8_t
));
resourceMapping
.
frequencyDomainAllocation
.
choice
.
row2
.
size
=
2
;
resourceMapping
.
frequencyDomainAllocation
.
choice
.
row2
.
size
=
2
;
resourceMapping
.
frequencyDomainAllocation
.
choice
.
row2
.
bits_unused
=
4
;
resourceMapping
.
frequencyDomainAllocation
.
choice
.
row2
.
bits_unused
=
4
;
resourceMapping
.
frequencyDomainAllocation
.
choice
.
row2
.
buf
[
0
]
=
0
;
resourceMapping
.
frequencyDomainAllocation
.
choice
.
row2
.
buf
[
0
]
=
0
;
resourceMapping
.
frequencyDomainAllocation
.
choice
.
row2
.
buf
[
1
]
=
16
;
resourceMapping
.
frequencyDomainAllocation
.
choice
.
row2
.
buf
[
1
]
=
16
;
resourceMapping
.
nrofPorts
=
NR_CSI_RS_ResourceMapping__nrofPorts_p1
;
resourceMapping
.
nrofPorts
=
NR_CSI_RS_ResourceMapping__nrofPorts_p1
;
resourceMapping
.
cdm_Type
=
NR_CSI_RS_ResourceMapping__cdm_Type_noCDM
;
resourceMapping
.
cdm_Type
=
NR_CSI_RS_ResourceMapping__cdm_Type_noCDM
;
break
;
break
;
case
2
:
case
2
:
resourceMapping
.
frequencyDomainAllocation
.
present
=
NR_CSI_RS_ResourceMapping__frequencyDomainAllocation_PR_other
;
resourceMapping
.
frequencyDomainAllocation
.
present
=
NR_CSI_RS_ResourceMapping__frequencyDomainAllocation_PR_other
;
resourceMapping
.
frequencyDomainAllocation
.
choice
.
row2
.
buf
=
calloc
(
2
,
sizeof
(
uint8_t
));
resourceMapping
.
frequencyDomainAllocation
.
choice
.
other
.
buf
=
calloc
(
2
,
sizeof
(
uint8_t
));
resourceMapping
.
frequencyDomainAllocation
.
choice
.
row2
.
size
=
1
;
resourceMapping
.
frequencyDomainAllocation
.
choice
.
other
.
size
=
1
;
resourceMapping
.
frequencyDomainAllocation
.
choice
.
row2
.
bits_unused
=
2
;
resourceMapping
.
frequencyDomainAllocation
.
choice
.
other
.
bits_unused
=
2
;
resourceMapping
.
frequencyDomainAllocation
.
choice
.
row2
.
buf
[
0
]
=
4
;
resourceMapping
.
frequencyDomainAllocation
.
choice
.
other
.
buf
[
0
]
=
4
;
resourceMapping
.
nrofPorts
=
NR_CSI_RS_ResourceMapping__nrofPorts_p2
;
resourceMapping
.
nrofPorts
=
NR_CSI_RS_ResourceMapping__nrofPorts_p2
;
resourceMapping
.
cdm_Type
=
NR_CSI_RS_ResourceMapping__cdm_Type_fd_CDM2
;
resourceMapping
.
cdm_Type
=
NR_CSI_RS_ResourceMapping__cdm_Type_fd_CDM2
;
break
;
break
;
...
...
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