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lizhongxiao
OpenXG-RAN
Commits
e39ad834
Commit
e39ad834
authored
Feb 04, 2022
by
luis_pereira87
Browse files
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Fix dci size for formats 1_0 and 0_0 and improve procedures when using Coreset0
parent
b069dcd3
Changes
9
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9 changed files
with
62 additions
and
26 deletions
+62
-26
openair2/LAYER2/NR_MAC_COMMON/nr_mac_common.c
openair2/LAYER2/NR_MAC_COMMON/nr_mac_common.c
+13
-2
openair2/LAYER2/NR_MAC_COMMON/nr_mac_common.h
openair2/LAYER2/NR_MAC_COMMON/nr_mac_common.h
+2
-1
openair2/LAYER2/NR_MAC_UE/nr_ue_dci_configuration.c
openair2/LAYER2/NR_MAC_UE/nr_ue_dci_configuration.c
+4
-4
openair2/LAYER2/NR_MAC_gNB/gNB_scheduler_RA.c
openair2/LAYER2/NR_MAC_gNB/gNB_scheduler_RA.c
+6
-3
openair2/LAYER2/NR_MAC_gNB/gNB_scheduler_bch.c
openair2/LAYER2/NR_MAC_gNB/gNB_scheduler_bch.c
+2
-1
openair2/LAYER2/NR_MAC_gNB/gNB_scheduler_dlsch.c
openair2/LAYER2/NR_MAC_gNB/gNB_scheduler_dlsch.c
+27
-10
openair2/LAYER2/NR_MAC_gNB/gNB_scheduler_primitives.c
openair2/LAYER2/NR_MAC_gNB/gNB_scheduler_primitives.c
+4
-3
openair2/LAYER2/NR_MAC_gNB/gNB_scheduler_ulsch.c
openair2/LAYER2/NR_MAC_gNB/gNB_scheduler_ulsch.c
+2
-1
openair2/LAYER2/NR_MAC_gNB/mac_proto.h
openair2/LAYER2/NR_MAC_gNB/mac_proto.h
+2
-1
No files found.
openair2/LAYER2/NR_MAC_COMMON/nr_mac_common.c
View file @
e39ad834
...
...
@@ -2538,7 +2538,8 @@ uint16_t nr_dci_size(const NR_BWP_DownlinkCommon_t *initialDownlinkBWP,
nr_dci_format_t
format
,
nr_rnti_type_t
rnti_type
,
uint16_t
N_RB
,
int
bwp_id
)
{
int
bwp_id
,
uint16_t
cset0_bwp_size
)
{
uint16_t
size
=
0
;
uint16_t
numRBG
=
0
;
...
...
@@ -2588,7 +2589,9 @@ uint16_t nr_dci_size(const NR_BWP_DownlinkCommon_t *initialDownlinkBWP,
/// fixed: Format identifier 1, Hop flag 1, MCS 5, NDI 1, RV 2, HARQ PID 4, PUSCH TPC 2 Time Domain assgnmt 4 --20
size
+=
20
;
size
+=
(
uint8_t
)
ceil
(
log2
(
(
N_RB
*
(
N_RB
+
1
))
>>
1
)
);
// Freq domain assignment -- hopping scenario to be updated
size
+=
nr_dci_size
(
initialDownlinkBWP
,
initialUplinkBWP
,
cg
,
dci_pdu
,
NR_DL_DCI_FORMAT_1_0
,
rnti_type
,
N_RB
,
bwp_id
)
-
size
;
// Padding to match 1_0 size
int
dci_10_size
=
nr_dci_size
(
initialDownlinkBWP
,
initialUplinkBWP
,
cg
,
dci_pdu
,
NR_DL_DCI_FORMAT_1_0
,
rnti_type
,
N_RB
,
bwp_id
,
cset0_bwp_size
);
AssertFatal
(
dci_10_size
>=
size
,
"NR_UL_DCI_FORMAT_0_0 size is bigger than NR_DL_DCI_FORMAT_1_0! 3GPP TS 38.212 Section 7.3.1.0: DCI size alignment is not fully implemented"
);
size
+=
dci_10_size
-
size
;
// Padding to match 1_0 size
// UL/SUL indicator assumed to be 0
break
;
...
...
@@ -2805,6 +2808,14 @@ uint16_t nr_dci_size(const NR_BWP_DownlinkCommon_t *initialDownlinkBWP,
case
NR_DL_DCI_FORMAT_1_0
:
/// fixed: Format identifier 1, VRB2PRB 1, MCS 5, NDI 1, RV 2, HARQ PID 4, DAI 2, PUCCH TPC 2, PUCCH RInd 3, PDSCH to HARQ TInd 3 Time Domain assgnmt 4 -- 28
// 3GPP TS 38.212 Section 7.3.1.0: DCI size alignment
// Size of DCI format 1_0 is given by the size of CORESET 0 if CORESET 0 is configured for the cell and the size
// of initial DL bandwidth part if CORESET 0 is not configured for the cell
if
(
cset0_bwp_size
>
0
)
{
N_RB
=
cset0_bwp_size
;
}
size
=
28
;
size
+=
(
uint8_t
)
ceil
(
log2
(
(
N_RB
*
(
N_RB
+
1
))
>>
1
)
);
// Freq domain assignment
...
...
openair2/LAYER2/NR_MAC_COMMON/nr_mac_common.h
View file @
e39ad834
...
...
@@ -54,7 +54,8 @@ uint16_t nr_dci_size(const NR_BWP_DownlinkCommon_t *initialDLBWP,
nr_dci_format_t
format
,
nr_rnti_type_t
rnti_type
,
uint16_t
N_RB
,
int
bwp_id
);
int
bwp_id
,
uint16_t
cset0_bwp_size
);
void
find_aggregation_candidates
(
uint8_t
*
aggregation_level
,
uint8_t
*
nr_of_candidates
,
...
...
openair2/LAYER2/NR_MAC_UE/nr_ue_dci_configuration.c
View file @
e39ad834
...
...
@@ -169,7 +169,7 @@ void config_dci_pdu(NR_UE_MAC_INST_t *mac, fapi_nr_dl_config_dci_dl_pdu_rel15_t
rel15
->
SubcarrierSpacing
=
bwp_Common
->
genericParameters
.
subcarrierSpacing
;
}
for
(
int
i
=
0
;
i
<
rel15
->
num_dci_options
;
i
++
)
{
rel15
->
dci_length_options
[
i
]
=
nr_dci_size
(
initialDownlinkBWP
,
initialUplinkBWP
,
mac
->
cg
,
&
mac
->
def_dci_pdu_rel15
[
rel15
->
dci_format_options
[
i
]],
rel15
->
dci_format_options
[
i
],
NR_RNTI_C
,
rel15
->
BWPSize
,
bwp_id
);
rel15
->
dci_length_options
[
i
]
=
nr_dci_size
(
initialDownlinkBWP
,
initialUplinkBWP
,
mac
->
cg
,
&
mac
->
def_dci_pdu_rel15
[
rel15
->
dci_format_options
[
i
]],
rel15
->
dci_format_options
[
i
],
NR_RNTI_C
,
rel15
->
BWPSize
,
bwp_id
,
mac
->
type0_PDCCH_CSS_config
.
num_rbs
);
}
break
;
case
NR_RNTI_RA
:
...
...
@@ -185,7 +185,7 @@ void config_dci_pdu(NR_UE_MAC_INST_t *mac, fapi_nr_dl_config_dci_dl_pdu_rel15_t
rel15
->
BWPStart
=
NRRIV2PRBOFFSET
(
bwp_Common
->
genericParameters
.
locationAndBandwidth
,
MAX_BWP_SIZE
);
}
rel15
->
SubcarrierSpacing
=
initialDownlinkBWP
->
genericParameters
.
subcarrierSpacing
;
rel15
->
dci_length_options
[
0
]
=
nr_dci_size
(
initialDownlinkBWP
,
initialUplinkBWP
,
mac
->
cg
,
&
mac
->
def_dci_pdu_rel15
[
rel15
->
dci_format_options
[
0
]],
rel15
->
dci_format_options
[
0
],
NR_RNTI_RA
,
rel15
->
BWPSize
,
bwp_id
);
rel15
->
dci_length_options
[
0
]
=
nr_dci_size
(
initialDownlinkBWP
,
initialUplinkBWP
,
mac
->
cg
,
&
mac
->
def_dci_pdu_rel15
[
rel15
->
dci_format_options
[
0
]],
rel15
->
dci_format_options
[
0
],
NR_RNTI_RA
,
rel15
->
BWPSize
,
bwp_id
,
mac
->
type0_PDCCH_CSS_config
.
num_rbs
);
break
;
case
NR_RNTI_P
:
break
;
...
...
@@ -200,7 +200,7 @@ void config_dci_pdu(NR_UE_MAC_INST_t *mac, fapi_nr_dl_config_dci_dl_pdu_rel15_t
rel15
->
BWPStart
=
mac
->
type0_PDCCH_CSS_config
.
cset_start_rb
;
rel15
->
SubcarrierSpacing
=
initialDownlinkBWP
->
genericParameters
.
subcarrierSpacing
;
for
(
int
i
=
0
;
i
<
rel15
->
num_dci_options
;
i
++
)
{
rel15
->
dci_length_options
[
i
]
=
nr_dci_size
(
initialDownlinkBWP
,
initialUplinkBWP
,
mac
->
cg
,
&
mac
->
def_dci_pdu_rel15
[
rel15
->
dci_format_options
[
i
]],
rel15
->
dci_format_options
[
i
],
NR_RNTI_TC
,
rel15
->
BWPSize
,
bwp_id
);
rel15
->
dci_length_options
[
i
]
=
nr_dci_size
(
initialDownlinkBWP
,
initialUplinkBWP
,
mac
->
cg
,
&
mac
->
def_dci_pdu_rel15
[
rel15
->
dci_format_options
[
i
]],
rel15
->
dci_format_options
[
i
],
NR_RNTI_TC
,
rel15
->
BWPSize
,
bwp_id
,
mac
->
type0_PDCCH_CSS_config
.
num_rbs
);
}
break
;
case
NR_RNTI_SP_CSI
:
...
...
@@ -223,7 +223,7 @@ void config_dci_pdu(NR_UE_MAC_INST_t *mac, fapi_nr_dl_config_dci_dl_pdu_rel15_t
rel15
->
SubcarrierSpacing
=
mac
->
mib
->
subCarrierSpacingCommon
+
2
;
for
(
int
i
=
0
;
i
<
rel15
->
num_dci_options
;
i
++
)
{
rel15
->
dci_length_options
[
i
]
=
nr_dci_size
(
initialDownlinkBWP
,
initialUplinkBWP
,
mac
->
cg
,
&
mac
->
def_dci_pdu_rel15
[
rel15
->
dci_format_options
[
i
]],
rel15
->
dci_format_options
[
i
],
NR_RNTI_SI
,
rel15
->
BWPSize
,
0
);
rel15
->
dci_length_options
[
i
]
=
nr_dci_size
(
initialDownlinkBWP
,
initialUplinkBWP
,
mac
->
cg
,
&
mac
->
def_dci_pdu_rel15
[
rel15
->
dci_format_options
[
i
]],
rel15
->
dci_format_options
[
i
],
NR_RNTI_SI
,
rel15
->
BWPSize
,
0
,
mac
->
type0_PDCCH_CSS_config
.
num_rbs
);
}
break
;
case
NR_RNTI_SFI
:
...
...
openair2/LAYER2/NR_MAC_gNB/gNB_scheduler_RA.c
View file @
e39ad834
...
...
@@ -846,7 +846,8 @@ void nr_generate_Msg3_retransmission(module_id_t module_idP, int CC_id, frame_t
NR_UL_DCI_FORMAT_0_0
,
NR_RNTI_TC
,
pusch_pdu
->
bwp_size
,
ra
->
bwp_id
);
ra
->
bwp_id
,
nr_mac
->
cset0_bwp_size
);
// Mark the corresponding RBs as used
for
(
int
rb
=
0
;
rb
<
ra
->
msg3_nb_rb
;
rb
++
)
{
...
...
@@ -1359,7 +1360,8 @@ void nr_generate_Msg2(module_id_t module_idP, int CC_id, frame_t frameP, sub_fra
NR_DL_DCI_FORMAT_1_0
,
NR_RNTI_RA
,
BWPSize
,
bwpid
);
bwpid
,
nr_mac
->
cset0_bwp_size
);
// DL TX request
nfapi_nr_pdu_t
*
tx_req
=
&
nr_mac
->
TX_req
[
CC_id
].
pdu_list
[
nr_mac
->
TX_req
[
CC_id
].
Number_of_PDUs
];
...
...
@@ -1732,7 +1734,8 @@ void nr_generate_Msg4(module_id_t module_idP, int CC_id, frame_t frameP, sub_fra
NR_DL_DCI_FORMAT_1_0
,
NR_RNTI_TC
,
pdsch_pdu_rel15
->
BWPSize
,
bwpid
);
bwpid
,
nr_mac
->
cset0_bwp_size
);
// Add padding header and zero rest out if there is space left
if
(
ra
->
mac_pdu_length
<
harq
->
tb_size
)
{
...
...
openair2/LAYER2/NR_MAC_gNB/gNB_scheduler_bch.c
View file @
e39ad834
...
...
@@ -535,7 +535,8 @@ void nr_fill_nfapi_dl_sib1_pdu(int Mod_idP,
dci_format
,
rnti_type
,
pdsch_pdu_rel15
->
BWPSize
,
0
);
0
,
gNB_mac
->
cset0_bwp_size
);
LOG_D
(
MAC
,
"BWPSize: %i
\n
"
,
pdcch_pdu_rel15
->
BWPSize
);
LOG_D
(
MAC
,
"BWPStart: %i
\n
"
,
pdcch_pdu_rel15
->
BWPStart
);
...
...
openair2/LAYER2/NR_MAC_gNB/gNB_scheduler_dlsch.c
View file @
e39ad834
...
...
@@ -565,7 +565,8 @@ bool allocate_dl_retransmission(module_id_t module_id,
genericParameters
=
&
sib1
->
servingCellConfigCommon
->
downlinkConfigCommon
.
initialDownlinkBWP
.
genericParameters
;
}
const
uint16_t
bwpSize
=
NRRIV2BW
(
genericParameters
->
locationAndBandwidth
,
MAX_BWP_SIZE
);
const
int
coresetid
=
(
sched_ctrl
->
active_bwp
||
bwpd
)
?
sched_ctrl
->
coreset
->
controlResourceSetId
:
RC
.
nrmac
[
module_id
]
->
sched_ctrlCommon
->
coreset
->
controlResourceSetId
;
const
uint16_t
bwpSize
=
coresetid
==
0
?
RC
.
nrmac
[
module_id
]
->
cset0_bwp_size
:
NRRIV2BW
(
genericParameters
->
locationAndBandwidth
,
MAX_BWP_SIZE
);
int
rbStart
=
0
;
// start wrt BWPstart
NR_pdsch_semi_static_t
*
ps
=
&
sched_ctrl
->
pdsch_semi_static
;
...
...
@@ -775,7 +776,8 @@ void pf_dl(module_id_t module_id,
genericParameters
=
&
sib1
->
servingCellConfigCommon
->
downlinkConfigCommon
.
initialDownlinkBWP
.
genericParameters
;
}
const
uint16_t
bwpSize
=
NRRIV2BW
(
genericParameters
->
locationAndBandwidth
,
MAX_BWP_SIZE
);
const
int
coresetid
=
(
sched_ctrl
->
active_bwp
||
bwpd
)
?
sched_ctrl
->
coreset
->
controlResourceSetId
:
RC
.
nrmac
[
module_id
]
->
sched_ctrlCommon
->
coreset
->
controlResourceSetId
;
const
uint16_t
bwpSize
=
coresetid
==
0
?
RC
.
nrmac
[
module_id
]
->
cset0_bwp_size
:
NRRIV2BW
(
genericParameters
->
locationAndBandwidth
,
MAX_BWP_SIZE
);
int
rbStart
=
0
;
// start wrt BWPstart
if
(
sched_ctrl
->
available_dl_harq
.
head
<
0
)
{
...
...
@@ -884,8 +886,16 @@ void nr_fr1_dlsch_preprocessor(module_id_t module_id, frame_t frame, sub_frame_t
genericParameters
=
&
sib1
->
servingCellConfigCommon
->
downlinkConfigCommon
.
initialDownlinkBWP
.
genericParameters
;
}
const
uint16_t
bwpSize
=
NRRIV2BW
(
genericParameters
->
locationAndBandwidth
,
MAX_BWP_SIZE
);
const
uint16_t
BWPStart
=
NRRIV2PRBOFFSET
(
genericParameters
->
locationAndBandwidth
,
MAX_BWP_SIZE
);
NR_BWP_DownlinkDedicated_t
*
bwpd
=
UE_info
->
CellGroup
[
UE_id
]
&&
UE_info
->
CellGroup
[
UE_id
]
->
spCellConfig
&&
UE_info
->
CellGroup
[
UE_id
]
->
spCellConfig
->
spCellConfigDedicated
?
UE_info
->
CellGroup
[
UE_id
]
->
spCellConfig
->
spCellConfigDedicated
->
initialDownlinkBWP
:
NULL
;
const
int
coresetid
=
(
sched_ctrl
->
active_bwp
||
bwpd
)
?
sched_ctrl
->
coreset
->
controlResourceSetId
:
RC
.
nrmac
[
module_id
]
->
sched_ctrlCommon
->
coreset
->
controlResourceSetId
;
const
uint16_t
bwpSize
=
coresetid
==
0
?
RC
.
nrmac
[
module_id
]
->
cset0_bwp_size
:
NRRIV2BW
(
genericParameters
->
locationAndBandwidth
,
MAX_BWP_SIZE
);
const
uint16_t
BWPStart
=
coresetid
==
0
?
RC
.
nrmac
[
module_id
]
->
cset0_bwp_start
:
NRRIV2PRBOFFSET
(
genericParameters
->
locationAndBandwidth
,
MAX_BWP_SIZE
);
uint16_t
*
vrb_map
=
RC
.
nrmac
[
module_id
]
->
common_channels
[
CC_id
].
vrb_map
;
uint8_t
rballoc_mask
[
bwpSize
];
...
...
@@ -1060,6 +1070,8 @@ void nr_schedule_ue_spec(module_id_t module_id,
genericParameters
=
&
sib1
->
servingCellConfigCommon
->
downlinkConfigCommon
.
initialDownlinkBWP
.
genericParameters
;
}
NR_SearchSpace_t
*
ss
=
(
bwp
||
bwpd
)
?
sched_ctrl
->
search_space
:
gNB_mac
->
sched_ctrlCommon
->
search_space
;
const
int
bwpid
=
bwp
?
bwp
->
bwp_Id
:
0
;
const
int
coresetid
=
(
bwp
||
bwpd
)
?
sched_ctrl
->
coreset
->
controlResourceSetId
:
gNB_mac
->
sched_ctrlCommon
->
coreset
->
controlResourceSetId
;
nfapi_nr_dl_tti_pdcch_pdu_rel15_t
*
pdcch_pdu
=
gNB_mac
->
pdcch_pdu_idx
[
CC_id
][
bwpid
][
coresetid
];
...
...
@@ -1072,7 +1084,6 @@ void nr_schedule_ue_spec(module_id_t module_id,
dl_req
->
nPDUs
+=
1
;
pdcch_pdu
=
&
dl_tti_pdcch_pdu
->
pdcch_pdu
.
pdcch_pdu_rel15
;
LOG_D
(
NR_MAC
,
"Trying to configure DL pdcch for UE %d, bwp %d, cs %d
\n
"
,
UE_id
,
bwpid
,
coresetid
);
NR_SearchSpace_t
*
ss
=
(
bwp
||
bwpd
)
?
sched_ctrl
->
search_space
:
gNB_mac
->
sched_ctrlCommon
->
search_space
;
NR_ControlResourceSet_t
*
coreset
=
(
bwp
||
bwpd
)
?
sched_ctrl
->
coreset
:
gNB_mac
->
sched_ctrlCommon
->
coreset
;
nr_configure_pdcch
(
gNB_mac
,
pdcch_pdu
,
ss
,
coreset
,
scc
,
genericParameters
,
NULL
);
gNB_mac
->
pdcch_pdu_idx
[
CC_id
][
bwpid
][
coresetid
]
=
pdcch_pdu
;
...
...
@@ -1093,8 +1104,14 @@ void nr_schedule_ue_spec(module_id_t module_id,
const
int
pduindex
=
gNB_mac
->
pdu_index
[
CC_id
]
++
;
pdsch_pdu
->
pduIndex
=
pduindex
;
pdsch_pdu
->
BWPSize
=
NRRIV2BW
(
genericParameters
->
locationAndBandwidth
,
MAX_BWP_SIZE
);
pdsch_pdu
->
BWPStart
=
NRRIV2PRBOFFSET
(
genericParameters
->
locationAndBandwidth
,
MAX_BWP_SIZE
);
if
(
coresetid
==
0
)
{
pdsch_pdu
->
BWPSize
=
gNB_mac
->
cset0_bwp_size
;
pdsch_pdu
->
BWPStart
=
gNB_mac
->
cset0_bwp_start
;
}
else
{
pdsch_pdu
->
BWPSize
=
NRRIV2BW
(
genericParameters
->
locationAndBandwidth
,
MAX_BWP_SIZE
);
pdsch_pdu
->
BWPStart
=
NRRIV2PRBOFFSET
(
genericParameters
->
locationAndBandwidth
,
MAX_BWP_SIZE
);
}
pdsch_pdu
->
SubcarrierSpacing
=
genericParameters
->
subcarrierSpacing
;
pdsch_pdu
->
CyclicPrefix
=
genericParameters
->
cyclicPrefix
?
*
genericParameters
->
cyclicPrefix
:
0
;
...
...
@@ -1223,8 +1240,7 @@ void nr_schedule_ue_spec(module_id_t module_id,
dci_payload
.
tpc
,
pucch
->
timing_indicator
);
int
dci_format
=
sched_ctrl
->
search_space
&&
sched_ctrl
->
search_space
->
searchSpaceType
&&
sched_ctrl
->
search_space
->
searchSpaceType
->
present
==
NR_SearchSpace__searchSpaceType_PR_ue_Specific
?
int
dci_format
=
ss
&&
ss
->
searchSpaceType
&&
ss
->
searchSpaceType
->
present
==
NR_SearchSpace__searchSpaceType_PR_ue_Specific
?
NR_DL_DCI_FORMAT_1_1
:
NR_DL_DCI_FORMAT_1_0
;
const
int
rnti_type
=
NR_RNTI_C
;
...
...
@@ -1236,7 +1252,8 @@ void nr_schedule_ue_spec(module_id_t module_id,
dci_format
,
rnti_type
,
pdsch_pdu
->
BWPSize
,
bwp
?
bwp
->
bwp_Id
:
0
);
bwp
?
bwp
->
bwp_Id
:
0
,
gNB_mac
->
cset0_bwp_size
);
LOG_D
(
NR_MAC
,
"coreset params: FreqDomainResource %llx, start_symbol %d n_symb %d
\n
"
,
...
...
openair2/LAYER2/NR_MAC_gNB/gNB_scheduler_primitives.c
View file @
e39ad834
...
...
@@ -1218,12 +1218,13 @@ void fill_dci_pdu_rel15(const NR_ServingCellConfigCommon_t *scc,
int
dci_format
,
int
rnti_type
,
int
N_RB
,
int
bwp_id
)
{
int
bwp_id
,
uint16_t
cset0_bwp_size
)
{
uint8_t
fsize
=
0
,
pos
=
0
;
uint64_t
*
dci_pdu
=
(
uint64_t
*
)
pdcch_dci_pdu
->
Payload
;
*
dci_pdu
=
0
;
int
dci_size
=
nr_dci_size
(
scc
->
downlinkConfigCommon
->
initialDownlinkBWP
,
scc
->
uplinkConfigCommon
->
initialUplinkBWP
,
CellGroup
,
dci_pdu_rel15
,
dci_format
,
rnti_type
,
N_RB
,
bwp_id
);
int
dci_size
=
nr_dci_size
(
scc
->
downlinkConfigCommon
->
initialDownlinkBWP
,
scc
->
uplinkConfigCommon
->
initialUplinkBWP
,
CellGroup
,
dci_pdu_rel15
,
dci_format
,
rnti_type
,
N_RB
,
bwp_id
,
cset0_bwp_size
);
pdcch_dci_pdu
->
PayloadSizeBits
=
dci_size
;
AssertFatal
(
dci_size
<=
64
,
"DCI sizes above 64 bits not yet supported"
);
if
(
dci_format
==
NR_DL_DCI_FORMAT_1_1
||
dci_format
==
NR_UL_DCI_FORMAT_0_1
)
...
...
@@ -1567,7 +1568,7 @@ void fill_dci_pdu_rel15(const NR_ServingCellConfigCommon_t *scc,
pos
+=
4
;
*
dci_pdu
|=
((
uint64_t
)
dci_pdu_rel15
->
harq_pid
&
0xf
)
<<
(
dci_size
-
pos
);
// Padding bits
for
(
int
a
=
pos
;
a
<
32
;
a
++
)
for
(
int
a
=
pos
;
a
<
dci_size
;
a
++
)
*
dci_pdu
|=
((
uint64_t
)
dci_pdu_rel15
->
padding
&
1
)
<<
(
dci_size
-
pos
++
);
// UL/SUL indicator – 1 bit
/* commented for now (RK): need to get this from BWP descriptor
...
...
openair2/LAYER2/NR_MAC_gNB/gNB_scheduler_ulsch.c
View file @
e39ad834
...
...
@@ -1824,7 +1824,8 @@ void nr_schedule_ulsch(module_id_t module_id, frame_t frame, sub_frame_t slot)
ps
->
dci_format
,
rnti_types
[
0
],
pusch_pdu
->
bwp_size
,
bwpid
);
bwpid
,
nr_mac
->
cset0_bwp_size
);
memset
(
sched_pusch
,
0
,
sizeof
(
*
sched_pusch
));
}
...
...
openair2/LAYER2/NR_MAC_gNB/mac_proto.h
View file @
e39ad834
...
...
@@ -266,7 +266,8 @@ void fill_dci_pdu_rel15(const NR_ServingCellConfigCommon_t *scc,
int
dci_formats
,
int
rnti_types
,
int
N_RB
,
int
bwp_id
);
int
bwp_id
,
uint16_t
cset0_bwp_size
);
void
prepare_dci
(
const
NR_CellGroupConfig_t
*
CellGroup
,
dci_pdu_rel15_t
*
dci_pdu_rel15
,
...
...
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