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- 23 Jan, 2023 1 commit
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francescomani authored
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- 23 Nov, 2022 1 commit
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francescomani authored
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- 16 Aug, 2022 1 commit
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francescomani authored
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- 04 Aug, 2022 1 commit
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Sagar Parsawar authored
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- 20 Jul, 2022 1 commit
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laurent authored
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- 08 Apr, 2022 1 commit
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Laurent Thomas authored
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- 07 Apr, 2022 1 commit
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Thomas Schlichter authored
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- 24 Mar, 2022 1 commit
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Laurent THOMAS authored
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- 20 Mar, 2022 1 commit
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francescomani authored
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- 02 Mar, 2022 1 commit
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francescomani authored
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- 25 Feb, 2022 1 commit
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Thomas Schlichter authored
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- 24 Feb, 2022 1 commit
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francescomani authored
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- 22 Feb, 2022 1 commit
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rmagueta authored
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- 18 Feb, 2022 1 commit
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francescomani authored
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- 08 Feb, 2022 1 commit
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francescomani authored
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- 03 Feb, 2022 1 commit
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francescomani authored
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- 31 Jan, 2022 1 commit
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francescomani authored
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- 28 Jan, 2022 2 commits
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Robert Schmidt authored
Uses optimized scrambling if not UCI on PUSCH, or unoptimized to put placeholder bits otherwise.
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Sakthivel Velumani authored
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- 25 Jan, 2022 1 commit
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sfn authored
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- 17 Jan, 2022 1 commit
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francescomani authored
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- 12 Jan, 2022 1 commit
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Sakthivel Velumani authored
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- 05 Jan, 2022 1 commit
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luis_pereira87 authored
This reverts commit 29268d0a.
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- 24 Dec, 2021 1 commit
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Luis Pereira authored
This reverts commit 96554bef
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- 29 Nov, 2021 1 commit
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sfn authored
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- 16 Nov, 2021 1 commit
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francescomani authored
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- 15 Nov, 2021 1 commit
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francescomani authored
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- 14 Nov, 2021 1 commit
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Raymond Knopp authored
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- 12 Nov, 2021 1 commit
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matzakos authored
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- 10 Nov, 2021 1 commit
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Raymond Knopp authored
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- 09 Nov, 2021 2 commits
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Raymond Knopp authored
shuted 128-bit SIMD for the moment in nr_pdsch.c resource mapping, because of alignment issues. Use 64-bit SIMD instead for now. To be updated.
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Raymond Knopp authored
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- 31 Oct, 2021 2 commits
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Raymond Knopp authored
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Raymond Knopp authored
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- 27 Oct, 2021 2 commits
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Raymond Knopp authored
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Raymond Knopp authored
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- 05 Oct, 2021 1 commit
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Raymond Knopp authored
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- 27 Sep, 2021 1 commit
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francescomani authored
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- 22 Aug, 2021 1 commit
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francescomani authored
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- 05 Aug, 2021 1 commit
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Sakthivel Velumani authored
A second thread message is created for L1 tx processing and pushed into the threaPool. The message contain the nfapi rel15 PDUs for SSB, PDCCH and PDSCH. The memory of these PDUs are reused for subsequent slots. Need to fix the nfapi mode VNF PNF implementation to adapt to this memory scheme.
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