phy_procedures_lte_eNb.c 102 KB
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/*
 * Licensed to the OpenAirInterface (OAI) Software Alliance under one or more
 * contributor license agreements.  See the NOTICE file distributed with
 * this work for additional information regarding copyright ownership.
 * The OpenAirInterface Software Alliance licenses this file to You under
 * the OAI Public License, Version 1.0  (the "License"); you may not use this file
 * except in compliance with the License.
 * You may obtain a copy of the License at
 *
 *      http://www.openairinterface.org/?page_id=698
 *
 * Unless required by applicable law or agreed to in writing, software
 * distributed under the License is distributed on an "AS IS" BASIS,
 * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
 * See the License for the specific language governing permissions and
 * limitations under the License.
 *-------------------------------------------------------------------------------
 * For more information about the OpenAirInterface (OAI) Software Alliance:
 *      contact@openairinterface.org
 */
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/*! \file phy_procedures_lte_eNB.c
 * \brief Implementation of eNB procedures from 36.213 LTE specifications
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 * \author R. Knopp, F. Kaltenberger, N. Nikaein, X. Foukas
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 * \date 2011
 * \version 0.1
 * \company Eurecom
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 * \email: knopp@eurecom.fr,florian.kaltenberger@eurecom.fr,navid.nikaein@eurecom.fr, x.foukas@sms.ed.ac.uk
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 * \note
 * \warning
 */

#include "PHY/defs.h"
#include "PHY/extern.h"
#include "SCHED/defs.h"
#include "SCHED/extern.h"
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#include "nfapi_interface.h"
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#include "PHY/LTE_TRANSPORT/if4_tools.h"
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#include "PHY/LTE_TRANSPORT/if5_tools.h"
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//#define DEBUG_PHY_PROC (Already defined in cmake)
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//#define DEBUG_ULSCH

#include "LAYER2/MAC/extern.h"
#include "LAYER2/MAC/defs.h"
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#include "UTIL/LOG/log.h"
#include "UTIL/LOG/vcd_signal_dumper.h"

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#include "T.h"

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#include "assertions.h"
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#include "msc.h"
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#include <time.h>

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#if defined(ENABLE_ITTI)
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#   include "intertask_interface.h"
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#endif

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#if defined(FLEXRAN_AGENT_SB_IF)
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//Agent-related headers
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#include "ENB_APP/flexran_agent_extern.h"
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#include "ENB_APP/CONTROL_MODULES/MAC/flexran_agent_mac.h"
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#include "LAYER2/MAC/flexran_agent_mac_proto.h"
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#endif
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#define NS_PER_SLOT 500000

#define PUCCH 1

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void exit_fun(const char* s);

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extern int exit_openair;
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struct timespec start_fh, start_fh_prev;
int start_fh_sf, start_fh_prev_sf;
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// Fix per CC openair rf/if device update
// extern openair0_device openair0;
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unsigned char dlsch_input_buffer[2700] __attribute__ ((aligned(32)));
int eNB_sync_buffer0[640*6] __attribute__ ((aligned(32)));
int eNB_sync_buffer1[640*6] __attribute__ ((aligned(32)));
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int *eNB_sync_buffer[2] = {eNB_sync_buffer0, eNB_sync_buffer1};

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extern uint16_t hundred_times_log10_NPRB[100];
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unsigned int max_peak_val;
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int max_sync_pos;
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int harq_pid_updated[NUMBER_OF_UE_MAX][8] = {{0}};
int harq_pid_round[NUMBER_OF_UE_MAX][8] = {{0}};

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//DCI_ALLOC_t dci_alloc[8];

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uint8_t is_SR_subframe(PHY_VARS_eNB *eNB,eNB_rxtx_proc_t *proc,uint8_t UE_id)
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{
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  const int subframe = proc->subframe_rx;
  const int frame = proc->frame_rx;
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  LOG_D(PHY,"[eNB %d][SR %x] Frame %d subframe %d Checking for SR TXOp(sr_ConfigIndex %d)\n",
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        eNB->Mod_id,eNB->ulsch[UE_id]->rnti,frame,subframe,
        eNB->scheduling_request_config[UE_id].sr_ConfigIndex);
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  if (eNB->scheduling_request_config[UE_id].sr_ConfigIndex <= 4) {        // 5 ms SR period
    if ((subframe%5) == eNB->scheduling_request_config[UE_id].sr_ConfigIndex)
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      return(1);
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  } else if (eNB->scheduling_request_config[UE_id].sr_ConfigIndex <= 14) { // 10 ms SR period
    if (subframe==(eNB->scheduling_request_config[UE_id].sr_ConfigIndex-5))
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      return(1);
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  } else if (eNB->scheduling_request_config[UE_id].sr_ConfigIndex <= 34) { // 20 ms SR period
    if ((10*(frame&1)+subframe) == (eNB->scheduling_request_config[UE_id].sr_ConfigIndex-15))
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      return(1);
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  } else if (eNB->scheduling_request_config[UE_id].sr_ConfigIndex <= 74) { // 40 ms SR period
    if ((10*(frame&3)+subframe) == (eNB->scheduling_request_config[UE_id].sr_ConfigIndex-35))
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      return(1);
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  } else if (eNB->scheduling_request_config[UE_id].sr_ConfigIndex <= 154) { // 80 ms SR period
    if ((10*(frame&7)+subframe) == (eNB->scheduling_request_config[UE_id].sr_ConfigIndex-75))
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      return(1);
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  }

  return(0);
}
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int32_t add_ue(int16_t rnti, PHY_VARS_eNB *eNB)
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{
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  uint8_t i;
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  LOG_D(PHY,"[eNB %d/%d] Adding UE with rnti %x\n",
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        eNB->Mod_id,
        eNB->CC_id,
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        (uint16_t)rnti);
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  for (i=0; i<NUMBER_OF_UE_MAX; i++) {
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    if ((eNB->dlsch[i]==NULL) || (eNB->ulsch[i]==NULL)) {
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      MSC_LOG_EVENT(MSC_PHY_ENB, "0 Failed add ue %"PRIx16" (ENOMEM)", rnti);
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      LOG_E(PHY,"Can't add UE, not enough memory allocated\n");
      return(-1);
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    } else {
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      if (eNB->UE_stats[i].crnti==0) {
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        MSC_LOG_EVENT(MSC_PHY_ENB, "0 Add ue %"PRIx16" ", rnti);
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        LOG_D(PHY,"UE_id %d associated with rnti %x\n",i, (uint16_t)rnti);
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        eNB->dlsch[i][0]->rnti = rnti;
        eNB->ulsch[i]->rnti = rnti;
        eNB->UE_stats[i].crnti = rnti;
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	eNB->UE_stats[i].Po_PUCCH1_below = 0;
	eNB->UE_stats[i].Po_PUCCH1_above = (int32_t)pow(10.0,.1*(eNB->frame_parms.ul_power_control_config_common.p0_NominalPUCCH+eNB->rx_total_gain_dB));
	eNB->UE_stats[i].Po_PUCCH        = (int32_t)pow(10.0,.1*(eNB->frame_parms.ul_power_control_config_common.p0_NominalPUCCH+eNB->rx_total_gain_dB));
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	LOG_D(PHY,"Initializing Po_PUCCH: p0_NominalPUCCH %d, gain %d => %d\n",
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	      eNB->frame_parms.ul_power_control_config_common.p0_NominalPUCCH,
	      eNB->rx_total_gain_dB,
	      eNB->UE_stats[i].Po_PUCCH);
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        return(i);
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      }
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    }
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  }
  return(-1);
}

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int mac_phy_remove_ue(module_id_t Mod_idP,rnti_t rntiP) {
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  uint8_t i;
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  int CC_id;
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  PHY_VARS_eNB *eNB;
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  for (CC_id=0;CC_id<MAX_NUM_CCs;CC_id++) {
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    eNB = RC.eNB[Mod_idP][CC_id];
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    for (i=0; i<NUMBER_OF_UE_MAX; i++) {
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      if ((eNB->dlsch[i]==NULL) || (eNB->ulsch[i]==NULL)) {
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	MSC_LOG_EVENT(MSC_PHY_ENB, "0 Failed remove ue %"PRIx16" (ENOMEM)", rntiP);
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	LOG_E(PHY,"Can't remove UE, not enough memory allocated\n");
	return(-1);
      } else {
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	if (eNB->UE_stats[i].crnti==rntiP) {
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	  MSC_LOG_EVENT(MSC_PHY_ENB, "0 Removed ue %"PRIx16" ", rntiP);
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	  LOG_D(PHY,"eNB %d removing UE %d with rnti %x\n",eNB->Mod_id,i,rntiP);

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	  //LOG_D(PHY,("[PHY] UE_id %d\n",i);
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	  clean_eNb_dlsch(eNB->dlsch[i][0]);
	  clean_eNb_ulsch(eNB->ulsch[i]);
	  //eNB->UE_stats[i].crnti = 0;
	  memset(&eNB->UE_stats[i],0,sizeof(LTE_eNB_UE_stats));
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	  //  mac_exit_wrapper("Removing UE");
	  
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	  return(i);
	}
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      }
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    }
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  }
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  MSC_LOG_EVENT(MSC_PHY_ENB, "0 Failed remove ue %"PRIx16" (not found)", rntiP);
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  return(-1);
}

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/*
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int8_t find_next_ue_index(PHY_VARS_eNB *eNB)
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{
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  uint8_t i;
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  for (i=0; i<NUMBER_OF_UE_MAX; i++) {
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    if (eNB->UE_stats[i].crnti==0) {
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	(eNB->dlsch[i][0]->rnti==0))
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      LOG_D(PHY,"Next free UE id is %d\n",i);
      return(i);
    }
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  }
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  return(-1);
}
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*/
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/*
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int get_ue_active_harq_pid(const uint8_t Mod_id,const uint8_t CC_id,const uint16_t rnti, const int frame, const uint8_t subframe,uint8_t *harq_pid,uint8_t *round,const uint8_t harq_flag)
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{
  LTE_eNB_DLSCH_t *DLSCH_ptr;
  LTE_eNB_ULSCH_t *ULSCH_ptr;
  uint8_t ulsch_subframe,ulsch_frame;
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  int i;
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  int8_t UE_id = find_ue(rnti,RC.eNB[Mod_id][CC_id]);
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  if (UE_id==-1) {
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    LOG_D(PHY,"Cannot find UE with rnti %x (Mod_id %d, CC_id %d)\n",rnti, Mod_id, CC_id);
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    *round=0;
    return(-1);
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  }

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  if ((harq_flag == openair_harq_DL) || (harq_flag == openair_harq_RA))  {// this is a DL request

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    DLSCH_ptr = RC.eNB[Mod_id][CC_id]->dlsch[(uint32_t)UE_id][0];
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    if (harq_flag == openair_harq_RA) {
      if (DLSCH_ptr->harq_processes[0] != NULL) {
	*harq_pid = 0;
	*round = DLSCH_ptr->harq_processes[0]->round;
	return 0;
      } else {
	return -1;
      }
    }

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    // let's go synchronous for the moment - maybe we can change at some point
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    i = (frame * 10 + subframe) % 8;
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    if (DLSCH_ptr->harq_processes[i]->status == ACTIVE) {
      *harq_pid = i;
      *round = DLSCH_ptr->harq_processes[i]->round;
    } else if (DLSCH_ptr->harq_processes[i]->status == SCH_IDLE) {
      *harq_pid = i;
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      *round = 0;
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    } else {
      printf("%s:%d: bad state for harq process - PLEASE REPORT!!\n", __FILE__, __LINE__);
      abort();
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    }
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  } else { // This is a UL request
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    ULSCH_ptr = RC.eNB[Mod_id][CC_id]->ulsch[(uint32_t)UE_id];
    ulsch_subframe = pdcch_alloc2ul_subframe(&RC.eNB[Mod_id][CC_id]->frame_parms,subframe);
    ulsch_frame    = pdcch_alloc2ul_frame(&RC.eNB[Mod_id][CC_id]->frame_parms,frame,subframe);
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    // Note this is for TDD configuration 3,4,5 only
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    *harq_pid = subframe2harq_pid(&RC.eNB[Mod_id][CC_id]->frame_parms,
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                                  ulsch_frame,
                                  ulsch_subframe);
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    *round    = ULSCH_ptr->harq_processes[*harq_pid]->round;
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    LOG_T(PHY,"[eNB %d][PUSCH %d] Frame %d subframe %d Checking HARQ, round %d\n",Mod_id,*harq_pid,frame,subframe,*round);
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  }
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  return(0);
}
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*/
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int16_t get_target_pusch_rx_power(const module_id_t module_idP, const uint8_t CC_id)
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{
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  return RC.eNB[module_idP][CC_id]->frame_parms.ul_power_control_config_common.p0_NominalPUSCH;
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}

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int16_t get_target_pucch_rx_power(const module_id_t module_idP, const uint8_t CC_id)
{
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  return RC.eNB[module_idP][CC_id]->frame_parms.ul_power_control_config_common.p0_NominalPUCCH;
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}

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void phy_procedures_eNB_S_RX(PHY_VARS_eNB *eNB,eNB_rxtx_proc_t *proc,relaying_type_t r_type)
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{
  UNUSED(r_type);
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  int subframe = proc->subframe_rx;
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#ifdef DEBUG_PHY_PROC
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  LOG_D(PHY,"[eNB %d] Frame %d: Doing phy_procedures_eNB_S_RX(%d)\n", eNB->Mod_id,proc->frame_rx, subframe);
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#endif
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  lte_eNB_I0_measurements(eNB,
			  subframe,
			  0,
			  eNB->first_run_I0_measurements);
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}

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#define AMP_OVER_SQRT2 ((AMP*ONE_OVER_SQRT2_Q15)>>15)
#define AMP_OVER_2 (AMP>>1)
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int QPSK[4]= {AMP_OVER_SQRT2|(AMP_OVER_SQRT2<<16),AMP_OVER_SQRT2|((65536-AMP_OVER_SQRT2)<<16),((65536-AMP_OVER_SQRT2)<<16)|AMP_OVER_SQRT2,((65536-AMP_OVER_SQRT2)<<16)|(65536-AMP_OVER_SQRT2)};
int QPSK2[4]= {AMP_OVER_2|(AMP_OVER_2<<16),AMP_OVER_2|((65536-AMP_OVER_2)<<16),((65536-AMP_OVER_2)<<16)|AMP_OVER_2,((65536-AMP_OVER_2)<<16)|(65536-AMP_OVER_2)};
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unsigned int taus(void);
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void pmch_procedures(PHY_VARS_eNB *eNB,eNB_rxtx_proc_t *proc,PHY_VARS_RN *rn,relaying_type_t r_type) {
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#if defined(Rel10) || defined(Rel14)
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  MCH_PDU *mch_pduP;
  MCH_PDU  mch_pdu;
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  //  uint8_t sync_area=255;
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#endif
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  int subframe = proc->subframe_tx;
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  // This is DL-Cell spec pilots in Control region
  generate_pilots_slot(eNB,
		       eNB->common_vars.txdataF,
		       AMP,
		       subframe<<1,1);

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#if defined(Rel10) || defined(Rel14)
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  // if mcch is active, send regardless of the node type: eNB or RN
  // when mcch is active, MAC sched does not allow MCCH and MTCH multiplexing
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  /*
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  mch_pduP = mac_xface->get_mch_sdu(eNB->Mod_id,
				    eNB->CC_id,
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				    proc->frame_tx,
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				    subframe);
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  */
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  switch (r_type) {
  case no_relay:
    if ((mch_pduP->Pdu_size > 0) && (mch_pduP->sync_area == 0)) // TEST: only transmit mcch for sync area 0
      LOG_I(PHY,"[eNB%"PRIu8"] Frame %d subframe %d : Got MCH pdu for MBSFN (MCS %"PRIu8", TBS %d) \n",
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	    eNB->Mod_id,proc->frame_tx,subframe,mch_pduP->mcs,
	    eNB->dlsch_MCH->harq_processes[0]->TBS>>3);
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    else {
      LOG_D(PHY,"[DeNB %"PRIu8"] Frame %d subframe %d : Do not transmit MCH pdu for MBSFN sync area %"PRIu8" (%s)\n",
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	    eNB->Mod_id,proc->frame_tx,subframe,mch_pduP->sync_area,
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	    (mch_pduP->Pdu_size == 0)? "Empty MCH PDU":"Let RN transmit for the moment");
      mch_pduP = NULL;
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    }
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    break;
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  case multicast_relay:
    if ((mch_pduP->Pdu_size > 0) && ((mch_pduP->mcch_active == 1) || mch_pduP->msi_active==1)) {
      LOG_I(PHY,"[RN %"PRIu8"] Frame %d subframe %d: Got the MCH PDU for MBSFN  sync area %"PRIu8" (MCS %"PRIu8", TBS %"PRIu16")\n",
	    rn->Mod_id,rn->frame, subframe,
	    mch_pduP->sync_area,mch_pduP->mcs,mch_pduP->Pdu_size);
    } else if (rn->mch_avtive[subframe%5] == 1) { // SF2 -> SF7, SF3 -> SF8
      mch_pduP= &mch_pdu;
      memcpy(&mch_pduP->payload, // could be a simple copy
	     rn->dlsch_rn_MCH[subframe%5]->harq_processes[0]->b,
	     rn->dlsch_rn_MCH[subframe%5]->harq_processes[0]->TBS>>3);
      mch_pduP->Pdu_size = (uint16_t) (rn->dlsch_rn_MCH[subframe%5]->harq_processes[0]->TBS>>3);
      mch_pduP->mcs = rn->dlsch_rn_MCH[subframe%5]->harq_processes[0]->mcs;
      LOG_I(PHY,"[RN %"PRIu8"] Frame %d subframe %d: Forward the MCH PDU for MBSFN received on SF %d sync area %"PRIu8" (MCS %"PRIu8", TBS %"PRIu16")\n",
	    rn->Mod_id,rn->frame, subframe,subframe%5,
	    rn->sync_area[subframe%5],mch_pduP->mcs,mch_pduP->Pdu_size);
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    } else {
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      mch_pduP=NULL;
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    }
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    rn->mch_avtive[subframe]=0;
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    break;
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  default:
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    LOG_W(PHY,"[eNB %"PRIu8"] Frame %d subframe %d: unknown relaying type %d \n",
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	  eNB->Mod_id,proc->frame_tx,subframe,r_type);
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    mch_pduP=NULL;
    break;
  }// switch
  
  if (mch_pduP) {
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    fill_eNB_dlsch_MCH(eNB,mch_pduP->mcs,1,0);
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    // Generate PMCH
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    generate_mch(eNB,proc,(uint8_t*)mch_pduP->payload);
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  } else {
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    LOG_D(PHY,"[eNB/RN] Frame %d subframe %d: MCH not generated \n",proc->frame_tx,subframe);
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  }
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#endif
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}
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void common_signal_procedures (PHY_VARS_eNB *eNB,eNB_rxtx_proc_t *proc) {
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  LTE_DL_FRAME_PARMS *fp=&eNB->frame_parms;
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  int **txdataF = eNB->common_vars.txdataF;
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  uint8_t *pbch_pdu=&eNB->pbch_pdu[0];
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  int subframe = proc->subframe_tx;
  int frame = proc->frame_tx;
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  LOG_D(PHY,"common_signal_procedures: frame %d, subframe %d\n",frame,subframe); 

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  // generate Cell-Specific Reference Signals for both slots
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  VCD_SIGNAL_DUMPER_DUMP_FUNCTION_BY_NAME(VCD_SIGNAL_DUMPER_FUNCTIONS_PHY_ENB_RS_TX,1);
  generate_pilots_slot(eNB,
		       txdataF,
		       AMP,
		       subframe<<1,0);
  // check that 2nd slot is for DL
  if (subframe_select(fp,subframe) == SF_DL)
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    generate_pilots_slot(eNB,
			 txdataF,
			 AMP,
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			 (subframe<<1)+1,0);
  
  VCD_SIGNAL_DUMPER_DUMP_FUNCTION_BY_NAME(VCD_SIGNAL_DUMPER_FUNCTIONS_PHY_ENB_RS_TX,0);
      
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  // First half of PSS/SSS (FDD, slot 0)
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  if (subframe == 0) {
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    if (fp->frame_type == FDD) {
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      generate_pss(txdataF,
		   AMP,
		   fp,
		   (fp->Ncp==NORMAL) ? 6 : 5,
		   0);
      generate_sss(txdataF,
		   AMP,
		   fp,
		   (fp->Ncp==NORMAL) ? 5 : 4,
		   0);
      
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    }
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    /// First half of SSS (TDD, slot 1)
    
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    if (fp->frame_type == TDD) {
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      generate_sss(txdataF,
		   AMP,
		   fp,
		   (fp->Ncp==NORMAL) ? 6 : 5,
		   1);
    }
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    // generate PBCH (Physical Broadcast CHannel) info

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    /// generate PBCH
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    if ((frame&3)==0) {
      AssertFatal(eNB->pbch_configured==1,"PBCH was not configured by MAC\n");
      eNB->pbch_configured=0;
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    }
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    generate_pbch(&eNB->pbch,
		  txdataF,
		  AMP,
		  fp,
		  pbch_pdu,
		  frame&3);
  
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  }
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  else if ((subframe == 1) &&
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	   (fp->frame_type == TDD)){
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    generate_pss(txdataF,
		 AMP,
		 fp,
		 2,
		 2);
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  }
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  // Second half of PSS/SSS (FDD, slot 10)
  else if ((subframe == 5) && 
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	   (fp->frame_type == FDD)) {
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    generate_pss(txdataF,
		 AMP,
		 &eNB->frame_parms,
		 (fp->Ncp==NORMAL) ? 6 : 5,
		 10);
    generate_sss(txdataF,
		 AMP,
		 &eNB->frame_parms,
		 (fp->Ncp==NORMAL) ? 5 : 4,
		 10);
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  }
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  //  Second-half of SSS (TDD, slot 11)
  else if ((subframe == 5) &&
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	   (fp->frame_type == TDD)) {
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    generate_sss(txdataF,
		 AMP,
		 fp,
		 (fp->Ncp==NORMAL) ? 6 : 5,
		 11);
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  }
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  // Second half of PSS (TDD, slot 12)
  else if ((subframe == 6) &&
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	   (fp->frame_type == TDD)) { 
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    generate_pss(txdataF,
		 AMP,
		 fp,
		 2,
		 12);
  }
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}
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/*
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void generate_eNB_dlsch_params(PHY_VARS_eNB *eNB,eNB_rxtx_proc_t *proc,DCI_ALLOC_t *dci_alloc,const int UE_id) {
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  LTE_DL_FRAME_PARMS *fp=&eNB->frame_parms;
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  int frame = proc->frame_tx;
  int subframe = proc->subframe_tx;
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  // if we have SI_RNTI, configure dlsch parameters and CCE index
  if (dci_alloc->rnti == SI_RNTI) {
    LOG_D(PHY,"Generating dlsch params for SI_RNTI\n");
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    generate_eNB_dlsch_params_from_dci(frame,
				       subframe,
				       &dci_alloc->dci_pdu[0],
				       dci_alloc->rnti,
				       dci_alloc->format,
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				       &eNB->dlsch_SI,
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				       fp,
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				       NULL,
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				       SI_RNTI,
				       0,
				       P_RNTI,
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				       eNB->UE_stats[0].DL_pmi_single,
				       0);
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    LOG_I(PHY,"frame %d, subframe %d : SI with mcs %d\n",frame,subframe,eNB->dlsch_SI->harq_processes[0]->mcs);
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    eNB->dlsch_SI->nCCE[subframe] = dci_alloc->firstCCE;
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    LOG_I(PHY,"[eNB %"PRIu8"] Frame %d subframe %d : CCE resource for common DCI (SI)  => %"PRIu8", aggregation %d\n",eNB->Mod_id,frame,subframe,
	  eNB->dlsch_SI->nCCE[subframe],1<<dci_alloc->L);
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  } else if (dci_alloc->ra_flag == 1) {  // This is format 1A allocation for RA
    // configure dlsch parameters and CCE index
    LOG_D(PHY,"Generating dlsch params for RA_RNTI\n");    
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    generate_eNB_dlsch_params_from_dci(frame,
				       subframe,
				       &dci_alloc->dci_pdu[0],
				       dci_alloc->rnti,
				       dci_alloc->format,
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				       &eNB->dlsch_ra,
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				       fp,
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				       NULL,
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				       SI_RNTI,
				       dci_alloc->rnti,
				       P_RNTI,
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				       eNB->UE_stats[0].DL_pmi_single,
				       0);
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    eNB->dlsch_ra->nCCE[subframe] = dci_alloc->firstCCE;
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    LOG_I(PHY,"[eNB %"PRIu8"] Frame %d subframe %d : CCE resource for common DCI (RA)  => %"PRIu8" length %d bits\n",eNB->Mod_id,frame,subframe,
	  eNB->dlsch_ra->nCCE[subframe],
	  dci_alloc->dci_length);
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  }
  
  else if ((dci_alloc->format != format0)&&
	   (dci_alloc->format != format3)&&
	   (dci_alloc->format != format3A)&&
	   (dci_alloc->format != format4)){ // this is a normal DLSCH allocation
    
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    if (UE_id>=0) {
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      LOG_I(PHY,"Generating dlsch params for RNTI %x\n",dci_alloc->rnti);      
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      generate_eNB_dlsch_params_from_dci(frame,
					 subframe,
					 &dci_alloc->dci_pdu[0],
					 dci_alloc->rnti,
					 dci_alloc->format,
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					 eNB->dlsch[(uint8_t)UE_id],
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					 fp,
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					 &eNB->pdsch_config_dedicated[UE_id],
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					 SI_RNTI,
					 0,
					 P_RNTI,
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					 eNB->UE_stats[(uint8_t)UE_id].DL_pmi_single,
					 eNB->transmission_mode[(uint8_t)UE_id]<7?0:eNB->transmission_mode[(uint8_t)UE_id]);
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      LOG_D(PHY,"[eNB %"PRIu8"][PDSCH %"PRIx16"/%"PRIu8"] Frame %d subframe %d: Generated dlsch params\n",
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	    eNB->Mod_id,dci_alloc->rnti,eNB->dlsch[(uint8_t)UE_id][0]->current_harq_pid,frame,subframe);
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      T(T_ENB_PHY_DLSCH_UE_DCI, T_INT(eNB->Mod_id), T_INT(frame), T_INT(subframe), T_INT(UE_id),
        T_INT(dci_alloc->rnti), T_INT(dci_alloc->format),
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        T_INT(dci_alloc->harq_pid),
        T_INT(eNB->dlsch[(int)UE_id][0]->harq_processes[dci_alloc->harq_pid]->mcs),
        T_INT(eNB->dlsch[(int)UE_id][0]->harq_processes[dci_alloc->harq_pid]->TBS));
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      eNB->dlsch[(uint8_t)UE_id][0]->nCCE[subframe] = dci_alloc->firstCCE;
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      LOG_I(PHY,"[eNB %"PRIu8"] Frame %d subframe %d : CCE resource for ue DCI (PDSCH %"PRIx16")  => %"PRIu8" length %d bits\n",eNB->Mod_id,frame,subframe,
	    dci_alloc->rnti,eNB->dlsch[(uint8_t)UE_id][0]->nCCE[subframe],dci_alloc->dci_length);
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      LOG_D(PHY,"[eNB %"PRIu8"][DCI][PDSCH %"PRIx16"] Frame %d subframe %d UE_id %"PRId8" Generated DCI format %d, aggregation %d\n",
	    eNB->Mod_id, dci_alloc->rnti,
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	    frame, subframe,UE_id,
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	    dci_alloc->format,
	    1<<dci_alloc->L);
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    } else {
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      LOG_D(PHY,"[eNB %"PRIu8"][PDSCH] Frame %d : No UE_id with corresponding rnti %"PRIx16", dropping DLSCH\n",
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	    eNB->Mod_id,frame,dci_alloc->rnti);
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    }
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  }
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}
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void generate_eNB_ulsch_params(PHY_VARS_eNB *eNB,eNB_rxtx_proc_t *proc,DCI_ALLOC_t *dci_alloc,const int UE_id) {
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  int harq_pid;
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  LTE_DL_FRAME_PARMS *fp=&eNB->frame_parms;
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  int frame = proc->frame_tx;
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  int subframe = proc->subframe_tx;
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//  uint16_t srsPeriodicity=0;
//  uint16_t srsOffset=0;
//  uint16_t srsConfigIndex=0;
//  uint16_t do_srs=0;
  
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  uint16_t is_srs_pos=0;
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  LOG_I(PHY,
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	"[eNB %"PRIu8"][PUSCH %"PRIu8"] Frame %d subframe %d UL Frame %"PRIu32", UL Subframe %"PRIu8", Generated ULSCH (format0) DCI (rnti %"PRIx16", dci %"PRIx8"), aggregation %d\n",
	eNB->Mod_id,
	subframe2harq_pid(fp,
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			  pdcch_alloc2ul_frame(fp,frame,subframe),
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			  pdcch_alloc2ul_subframe(fp,subframe)),
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	frame,
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	subframe,
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	pdcch_alloc2ul_frame(fp,frame,subframe),
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	pdcch_alloc2ul_subframe(fp,subframe),
	dci_alloc->rnti,
	dci_alloc->dci_pdu[0],
	1<<dci_alloc->L);
  
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  is_srs_pos = is_srs_occasion_common(fp,pdcch_alloc2ul_frame(fp,frame,subframe),pdcch_alloc2ul_subframe(fp,subframe));
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//if (is_srs_pos && eNB->soundingrs_ul_config_dedicated[UE_id].srsConfigDedicatedSetup) {
//    srsConfigIndex = eNB->soundingrs_ul_config_dedicated[UE_id].srs_ConfigIndex;
//    compute_srs_pos(fp->frame_type, srsConfigIndex, &srsPeriodicity, &srsOffset);
//    if ((((10*pdcch_alloc2ul_frame(fp,frame,subframe)+pdcch_alloc2ul_subframe(fp,subframe)) % srsPeriodicity) == srsOffset)) {
//     do_srs = 1;
//    }
//  }
//      LOG_D(PHY,"frame %d (%d), subframe %d (%d), UE_id %d: is_srs_pos %d, do_SRS %d, index %d, period %d, offset %d \n",
//	    frame,pdcch_alloc2ul_frame(fp,frame,subframe),subframe,pdcch_alloc2ul_subframe(fp,subframe),
//	    UE_id,is_srs_pos,do_srs,srsConfigIndex,srsPeriodicity,srsOffset);
//  
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  generate_eNB_ulsch_params_from_dci(eNB,
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				     proc,
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				     &dci_alloc->dci_pdu[0],
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				     dci_alloc->rnti,
				     format0,
				     UE_id,
				     SI_RNTI,
				     0,
				     P_RNTI,
				     CBA_RNTI,
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				     is_srs_pos);  
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  LOG_T(PHY,"[eNB %"PRIu8"] Frame %d subframe %d : CCE resources for UE spec DCI (PUSCH %"PRIx16") => %d\n",
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	eNB->Mod_id,frame,subframe,dci_alloc->rnti,
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	dci_alloc->firstCCE);
  
  // get the hard_pid for this subframe 
  harq_pid = subframe2harq_pid(fp,
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			       pdcch_alloc2ul_frame(fp,frame,subframe),
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			       pdcch_alloc2ul_subframe(fp,subframe));
  
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  AssertFatal(harq_pid!=255,"[eNB %"PRIu8"] Frame %d: Bad harq_pid for ULSCH allocation\n",eNB->Mod_id,frame);

  eNB->ulsch[(uint32_t)UE_id]->harq_processes[harq_pid]->subframe_scheduling_flag = 1;
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  T(T_ENB_PHY_ULSCH_UE_DCI, T_INT(eNB->Mod_id), T_INT(frame), T_INT(subframe), T_INT(UE_id),
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    T_INT(dci_alloc->rnti), T_INT(harq_pid),
    T_INT(eNB->ulsch[(uint32_t)UE_id]->harq_processes[harq_pid]->mcs),
    T_INT(eNB->ulsch[(uint32_t)UE_id]->harq_processes[harq_pid]->round),
    T_INT(eNB->ulsch[(uint32_t)UE_id]->harq_processes[harq_pid]->first_rb),
    T_INT(eNB->ulsch[(uint32_t)UE_id]->harq_processes[harq_pid]->nb_rb),
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    T_INT(eNB->ulsch[(uint32_t)UE_id]->harq_processes[harq_pid]->TBS),
    T_INT(dci_alloc->L),
    T_INT(dci_alloc->firstCCE));
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}
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*/
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void pdsch_procedures(PHY_VARS_eNB *eNB,
		      eNB_rxtx_proc_t *proc,
		      int harq_pid,
		      LTE_eNB_DLSCH_t *dlsch, 
		      LTE_eNB_DLSCH_t *dlsch1,
		      LTE_eNB_UE_stats *ue_stats,
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		      int ra_flag) {
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  int frame=proc->frame_tx;
  int subframe=proc->subframe_tx;
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  LTE_DL_eNB_HARQ_t *dlsch_harq=dlsch->harq_processes[harq_pid];
  int input_buffer_length = dlsch_harq->TBS/8;
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  LTE_DL_FRAME_PARMS *fp=&eNB->frame_parms;
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  int i;
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  if (frame < 20) {
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    LOG_D(PHY,
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	  "[eNB %"PRIu8"][PDSCH %"PRIx16"/%"PRIu8"] Frame %d, subframe %d: Generating PDSCH/DLSCH with input size = %"PRIu16", pdsch_start %d, G %d, nb_rb %"PRIu16", rb0 %x, rb1 %x, TBS %"PRIu16", pmi_alloc %"PRIx64", rv %"PRIu8" (round %"PRIu8")\n",
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	  eNB->Mod_id, dlsch->rnti,harq_pid,
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	  frame, subframe, input_buffer_length, dlsch_harq->pdsch_start,
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	  get_G(fp,
		dlsch_harq->nb_rb,
		dlsch_harq->rb_alloc,
		dlsch_harq->Qm,
		dlsch_harq->Nl,
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		dlsch_harq->pdsch_start,
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		frame,
		subframe,
		dlsch_harq->mimo_mode==TM7?7:0),
	  dlsch_harq->nb_rb,
	  dlsch_harq->rb_alloc[0],
	  dlsch_harq->rb_alloc[1],
	  dlsch_harq->TBS,
	  pmi2hex_2Ar1(dlsch_harq->pmi_alloc),
	  dlsch_harq->rvidx,
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	  dlsch_harq->round);
  }    
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#if defined(MESSAGE_CHART_GENERATOR_PHY)
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  MSC_LOG_TX_MESSAGE(
		     MSC_PHY_ENB,MSC_PHY_UE,
		     NULL,0,
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		     "%05u:%02u PDSCH/DLSCH input size = %"PRIu16", G %d, nb_rb %"PRIu16", TBS %"PRIu16", pmi_alloc %"PRIx16", rv %"PRIu8" (round %"PRIu8")",
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		     frame, subframe,
		     input_buffer_length,
		     get_G(fp,
			   dlsch_harq->nb_rb,
			   dlsch_harq->rb_alloc,
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			   dlsch_harq->Qm,
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			   dlsch_harq->Nl,
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			   dlsch_harq->pdsch_start,
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			   frame,
			   subframe,
			   dlsch_harq->mimo_mode==TM7?7:0),
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		     dlsch_harq->nb_rb,
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		     dlsch_harq->TBS,
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		     pmi2hex_2Ar1(dlsch_harq->pmi_alloc),
		     dlsch_harq->rvidx,
		     dlsch_harq->round);
#endif
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  if (ue_stats) ue_stats->dlsch_sliding_cnt++;
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  if (dlsch_harq->round == 0) {
    if (ue_stats)
      ue_stats->dlsch_trials[harq_pid][0]++;
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  } else {
    ue_stats->dlsch_trials[harq_pid][dlsch_harq->round]++;
#ifdef DEBUG_PHY_PROC
#ifdef DEBUG_DLSCH
    LOG_D(PHY,"[eNB] This DLSCH is a retransmission\n");
#endif
#endif
  }
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  LOG_D(PHY,"Generating DLSCH/PDSCH %d\n",ra_flag);
  // 36-212
  start_meas(&eNB->dlsch_encoding_stats);
  eNB->te(eNB,
	  dlsch_harq->pdu,
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	  dlsch_harq->pdsch_start,
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	  dlsch,
	  frame,subframe,
	  &eNB->dlsch_rate_matching_stats,
	  &eNB->dlsch_turbo_encoding_stats,
	  &eNB->dlsch_interleaving_stats);
  stop_meas(&eNB->dlsch_encoding_stats);
  // 36-211
  start_meas(&eNB->dlsch_scrambling_stats);
  dlsch_scrambling(fp,
		   0,
		   dlsch,
		   harq_pid,
		   get_G(fp,
			 dlsch_harq->nb_rb,
			 dlsch_harq->rb_alloc,
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			 dlsch_harq->Qm,
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			 dlsch_harq->Nl,
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			 dlsch_harq->pdsch_start,
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			 frame,subframe,
			 0),
		   0,
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		   frame,
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		   subframe<<1);
  stop_meas(&eNB->dlsch_scrambling_stats);
  
  start_meas(&eNB->dlsch_modulation_stats);
  
  
  dlsch_modulation(eNB,
		   eNB->common_vars.txdataF,
		   AMP,
		   subframe,
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		   dlsch_harq->pdsch_start,
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		   dlsch,
		   dlsch1);
  
  stop_meas(&eNB->dlsch_modulation_stats);
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  dlsch->active = 0;
}
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void handle_nfapi_dci_dl_pdu(PHY_VARS_eNB *eNB,eNB_rxtx_proc_t *proc,nfapi_dl_config_request_pdu_t *dl_config_pdu);
void handle_nfapi_dci_dl_pdu(PHY_VARS_eNB *eNB,  
			     eNB_rxtx_proc_t *proc,
			     nfapi_dl_config_request_pdu_t *dl_config_pdu) {
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  int idx                         = proc->subframe_tx&1;  
  LTE_eNB_PDCCH *pdcch_vars       = &eNB->pdcch_vars[idx];
  nfapi_dl_config_dci_dl_pdu *pdu = &dl_config_pdu->dci_dl_pdu;
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  LOG_D(PHY,"Frame %d, Subframe %d: DCI processing\n",proc->frame_tx,proc->subframe_tx);
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  // copy dci configuration into eNB structure
  fill_dci_and_dlsch(eNB,proc,&pdcch_vars->dci_alloc[pdcch_vars->num_dci],pdu);
}
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void handle_nfapi_mpdcch_pdu(PHY_VARS_eNB *eNB,eNB_rxtx_proc_t *proc,nfapi_dl_config_request_pdu_t *dl_config_pdu);
void handle_nfapi_mpdcch_pdu(PHY_VARS_eNB *eNB,  
			     eNB_rxtx_proc_t *proc,
			     nfapi_dl_config_request_pdu_t *dl_config_pdu) {

  int idx                         = proc->subframe_tx&1;  
  LTE_eNB_MPDCCH *mpdcch_vars     = &eNB->mpdcch_vars[idx];
  nfapi_dl_config_mpdcch_pdu *pdu = &dl_config_pdu->mpdcch_pdu;

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  LOG_D(PHY,"Frame %d, Subframe %d: MDCI processing\n",proc->frame_tx,proc->subframe_tx);
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  // copy dci configuration into eNB structure
  fill_mdci_and_dlsch(eNB,proc,&mpdcch_vars->mdci_alloc[mpdcch_vars->num_dci],pdu);
}

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void handle_nfapi_hi_dci0_dci_pdu(PHY_VARS_eNB *eNB,eNB_rxtx_proc_t *proc,
				  nfapi_hi_dci0_request_pdu_t *hi_dci0_config_pdu);
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void handle_nfapi_hi_dci0_dci_pdu(PHY_VARS_eNB *eNB,eNB_rxtx_proc_t *proc,  
				  nfapi_hi_dci0_request_pdu_t *hi_dci0_config_pdu) {
  
  int idx                         = proc->subframe_tx&1;
  LTE_eNB_PDCCH *pdcch_vars       = &eNB->pdcch_vars[idx];
  nfapi_hi_dci0_dci_pdu *pdu      = &hi_dci0_config_pdu->dci_pdu;
  // copy dci configuration in to eNB structure
  fill_dci_and_ulsch(eNB,proc,&pdcch_vars->dci_alloc[pdcch_vars->num_dci],pdu);
}
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void handle_nfapi_hi_dci0_hi_pdu(PHY_VARS_eNB *eNB,eNB_rxtx_proc_t *proc,
				 nfapi_hi_dci0_request_pdu_t *hi_dci0_config_pdu);


void handle_nfapi_hi_dci0_hi_pdu(PHY_VARS_eNB *eNB,eNB_rxtx_proc_t *proc,  
				 nfapi_hi_dci0_request_pdu_t *hi_dci0_config_pdu) {
  
  nfapi_hi_dci0_hi_pdu *pdu      = &hi_dci0_config_pdu->hi_pdu;
  // copy dci configuration in to eNB structure
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  LOG_D(PHY,"Received HI PDU which value %d (rbstart %d,cshift %d)\n",
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	hi_dci0_config_pdu->hi_pdu.hi_pdu_rel8.hi_value,
	hi_dci0_config_pdu->hi_pdu.hi_pdu_rel8.resource_block_start,
	hi_dci0_config_pdu->hi_pdu.hi_pdu_rel8.cyclic_shift_2_for_drms);
}
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handle_nfapi_bch_pdu(PHY_VARS_eNB *eNB,eNB_rxtx_proc_t *proc,  
		     nfapi_dl_config_request_pdu_t *dl_config_pdu,
		     uint8_t *sdu) {
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  nfapi_dl_config_bch_pdu_rel8_t *rel8 = &dl_config_pdu->bch_pdu.bch_pdu_rel8;
  
  AssertFatal(rel8->length == 3, "BCH PDU has length %d != 3\n",rel8->length);
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  LOG_D(PHY,"bch_pdu: %x,%x,%x\n",sdu[0],sdu[1],sdu[2]);
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  eNB->pbch_pdu[0] = sdu[2];
  eNB->pbch_pdu[1] = sdu[1];
  eNB->pbch_pdu[2] = sdu[0];
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  // adjust transmit amplitude here based on NFAPI info
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}

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#ifdef Rel14
extern uint32_t localRIV2alloc_LUT6[32];
extern uint32_t localRIV2alloc_LUT25[512];
extern uint32_t localRIV2alloc_LUT50_0[1600];
extern uint32_t localRIV2alloc_LUT50_1[1600];
extern uint32_t localRIV2alloc_LUT100_0[6000];
extern uint32_t localRIV2alloc_LUT100_1[6000];
extern uint32_t localRIV2alloc_LUT100_2[6000];
extern uint32_t localRIV2alloc_LUT100_3[6000];
#endif

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handle_nfapi_dlsch_pdu(PHY_VARS_eNB *eNB,eNB_rxtx_proc_t *proc,  
		       nfapi_dl_config_request_pdu_t *dl_config_pdu,
		       uint8_t codeword_index,
		       uint8_t *sdu) {

  nfapi_dl_config_dlsch_pdu_rel8_t *rel8 = &dl_config_pdu->dlsch_pdu.dlsch_pdu_rel8;
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#ifndef Rel8
  nfapi_dl_config_dlsch_pdu_rel10_t *rel10 = &dl_config_pdu->dlsch_pdu.dlsch_pdu_rel10;
#endif
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#ifdef Rel14
  nfapi_dl_config_dlsch_pdu_rel13_t *rel13 = &dl_config_pdu->dlsch_pdu.dlsch_pdu_rel13;
#endif
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  LTE_eNB_DLSCH_t *dlsch0=NULL,*dlsch1=NULL;
  LTE_DL_eNB_HARQ_t *dlsch0_harq=NULL,*dlsch1_harq=NULL;
  int UE_id;
  int harq_pid;
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  UE_id = find_dlsch(rel8->rnti,eNB,SEARCH_EXIST_OR_FREE);
  AssertFatal(UE_id!=-1,"no free or exiting dlsch_context\n");
  AssertFatal(UE_id<NUMBER_OF_UE_MAX,"returned UE_id %d >= %d(NUMBER_OF_UE_MAX)\n",UE_id,NUMBER_OF_UE_MAX);
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  dlsch0 = eNB->dlsch[UE_id][0];
  dlsch1 = eNB->dlsch[UE_id][1];
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#ifdef Rel14
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  if ((rel13->pdsch_payload_type < 2) && (rel13->ue_type>0)) dlsch0->harq_ids[proc->subframe_tx] = 0;
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#endif

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  harq_pid        = dlsch0->harq_ids[proc->subframe_tx];
  AssertFatal((harq_pid>=0) && (harq_pid<8),"harq_pid %d not in 0...7\n",harq_pid);
  dlsch0_harq     = dlsch0->harq_processes[harq_pid];
  dlsch1_harq     = dlsch1->harq_processes[harq_pid];
  AssertFatal(dlsch0_harq!=NULL,"dlsch_harq is null\n");

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  dlsch0_harq->pdsch_start = eNB->pdcch_vars[proc->subframe_tx & 1].num_pdcch_symbols;

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  LOG_D(PHY,"NFAPI: frame %d, subframe %d: programming dlsch, rnti %x, UE_id %d, harq_pid %d\n",
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    proc->frame_tx,proc->subframe_tx,rel8->rnti,UE_id,harq_pid);
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  if (codeword_index == 0) dlsch0_harq->pdu                    = sdu;
  else                     dlsch1_harq->pdu                    = sdu;

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#ifdef Rel14
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  dlsch0->sib1_br_flag=0;
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  if ((rel13->pdsch_payload_type <2) && (rel13->ue_type>0)) { // this is a BR/CE UE and SIB1-BR/SI-BR
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    dlsch0->rnti             = 0xFFFF;
    dlsch0->Kmimo            = 1;
    dlsch0->Mdlharq          = 4; 
    dlsch0->Nsoft            = 25344;
    dlsch0->i0               = rel13->initial_transmission_sf_io;
    dlsch0_harq->pdsch_start = rel10->pdsch_start;
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    if (rel13->pdsch_payload_type == 0) dlsch0->sib1_br_flag=1;

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    // configure PDSCH
    switch (eNB->frame_parms.N_RB_DL) {
    case 6:
      dlsch0_harq->rb_alloc[0]      = localRIV2alloc_LUT6[rel8->resource_block_coding];
      break;
    case 15:
      AssertFatal(1==0,"15 PRBs not supported for now\n");
      break;
    case 25:
      dlsch0_harq->rb_alloc[0]      = localRIV2alloc_LUT25[rel8->resource_block_coding];
      break;
    case 50:  
      dlsch0_harq->rb_alloc[0]      = localRIV2alloc_LUT50_0[rel8->resource_block_coding];
      dlsch0_harq->rb_alloc[1]      = localRIV2alloc_LUT50_1[rel8->resource_block_coding];
      break;
    case 75:
      AssertFatal(1==0,"75 PRBs not supported for now\n");
      break;
    case 100:
      dlsch0_harq->rb_alloc[0]      = localRIV2alloc_LUT100_0[rel8->resource_block_coding];
      dlsch0_harq->rb_alloc[1]      = localRIV2alloc_LUT100_1[rel8->resource_block_coding];
      dlsch0_harq->rb_alloc[2]      = localRIV2alloc_LUT100_2[rel8->resource_block_coding];
      dlsch0_harq->rb_alloc[3]      = localRIV2alloc_LUT100_3[rel8->resource_block_coding];
    }

    dlsch0->active                  = 1;
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    dlsch0_harq->nb_rb              = 6; 
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    dlsch0_harq->vrb_type           = LOCALIZED;
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    dlsch0_harq->rvidx              = rel8->redundancy_version;
    dlsch0_harq->Nl                 = 1;
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    dlsch0_harq->mimo_mode          = (eNB->frame_parms.nb_antenna_ports_eNB == 1) ? SISO : ALAMOUTI;
    dlsch0_harq->dl_power_off       = 1;
    dlsch0_harq->round              = 0;
    dlsch0_harq->status             = ACTIVE;
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    dlsch0_harq->TBS                = rel8->length<<3;
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    dlsch0_harq->Qm                 = rel8->modulation;
    dlsch0_harq->codeword           = 0;
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  }
  else {

  }
#endif
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}

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handle_uci_harq_pdu(PHY_VARS_eNB *eNB,eNB_rxtx_proc_t *proc,nfapi_ul_config_request_pdu_t *ul_config_pdu) {

}

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handle_nfapi_ul_pdu(PHY_VARS_eNB *eNB,eNB_rxtx_proc_t *proc,  
		    nfapi_ul_config_request_pdu_t *ul_config_pdu) {

  nfapi_ul_config_ulsch_pdu_rel8_t *rel8 = &ul_config_pdu->ulsch_pdu.ulsch_pdu_rel8;
  int8_t UE_id;
  // check if we have received a dci for this ue and ulsch descriptor is configured
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  if (ul_config_pdu == NFAPI_UL_CONFIG_ULSCH_PDU_TYPE) {
    AssertFatal((UE_id = find_ulsch(rel8->rnti,eNB,SEARCH_EXIST))>=0,
		"No existing UE ULSCH for rnti %x\n",rel8->rnti);
    AssertFatal(eNB->ulsch[UE_id]->harq_mask > 0,
		"ulsch for UE_id %d is not active\n",UE_id);
  }
  else if (ul_config_pdu == NFAPI_UL_CONFIG_UCI_HARQ_PDU_TYPE) {
    AssertFatal((UE_id = find_uci(rel8->rnti,proc->frame_tx,proc->subframe_tx,eNB,SEARCH_EXIST))>=0,
		"No existing UE UCI for rnti %x\n",rel8->rnti);
    handle_uci_harq_pdu(eNB,proc,ul_config_pdu);
  }
  else if (ul_config_pdu == NFAPI_UL_CONFIG_UCI_CQI_PDU_TYPE) {

  }
  else if (ul_config_pdu == NFAPI_UL_CONFIG_UCI_CQI_HARQ_PDU_TYPE) {

  }
  else if (ul_config_pdu == NFAPI_UL_CONFIG_UCI_CQI_SR_PDU_TYPE) {

  }
  else if (ul_config_pdu == NFAPI_UL_CONFIG_UCI_SR_PDU_TYPE) {

  }
  else if (ul_config_pdu == NFAPI_UL_CONFIG_UCI_SR_HARQ_PDU_TYPE) {

  }
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}

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void schedule_response(Sched_Rsp_t *Sched_INFO) {

  PHY_VARS_eNB *eNB;
  eNB_rxtx_proc_t *proc;
  // copy data from L2 interface into L1 structures
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  module_id_t               Mod_id       = Sched_INFO->module_id;
  uint8_t                   CC_id        = Sched_INFO->CC_id;
  nfapi_dl_config_request_t *DL_req      = Sched_INFO->DL_req;
  nfapi_hi_dci0_request_t   *HI_DCI0_req = Sched_INFO->HI_DCI0_req;
  nfapi_ul_config_request_t *UL_req      = Sched_INFO->UL_req;
  nfapi_tx_request_t        *TX_req      = Sched_INFO->TX_req;
  frame_t                   frame        = Sched_INFO->frame;
  sub_frame_t               subframe     = Sched_INFO->subframe;
  LTE_DL_FRAME_PARMS        *fp;
  int                       ul_subframe;
  int                       ul_frame;
  int                       harq_pid;
  LTE_UL_eNB_HARQ_t         *ulsch_harq;
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  AssertFatal(RC.eNB!=NULL,"RC.eNB is null\n");
  AssertFatal(RC.eNB[Mod_id]!=NULL,"RC.eNB[%d] is null\n",Mod_id);
  AssertFatal(RC.eNB[Mod_id][CC_id]!=NULL,"RC.eNB[%d][%d] is null\n",Mod_id,CC_id);

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  eNB         = RC.eNB[Mod_id][CC_id];
  fp          = &eNB->frame_parms;
  proc        = &eNB->proc.proc_rxtx[0];
  ul_subframe = pdcch_alloc2ul_subframe(fp,subframe);
  ul_frame    = pdcch_alloc2ul_frame(fp,frame,subframe);
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  AssertFatal(proc->subframe_tx == subframe, "Current subframe %d != NFAPI subframe %d\n",proc->subframe_tx,subframe);
  AssertFatal(proc->subframe_tx == subframe, "Current frame %d != NFAPI frame %d\n",proc->frame_tx,frame);

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  int8_t UE_id;
  uint8_t number_dl_pdu             = DL_req->dl_config_request_body.number_pdu;
  uint8_t number_hi_dci0_pdu        = HI_DCI0_req->hi_dci0_request_body.number_of_dci+HI_DCI0_req->hi_dci0_request_body.number_of_hi;
  uint8_t number_ul_pdu             = UL_req->ul_config_request_body.number_of_pdus;
  uint8_t number_pdsch_rnti         = DL_req->dl_config_request_body.number_pdsch_rnti;
  uint8_t transmission_power_pcfich = DL_req->dl_config_request_body.transmission_power_pcfich;
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  nfapi_dl_config_request_pdu_t *dl_config_pdu;
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  nfapi_hi_dci0_request_pdu_t   *hi_dci0_req_pdu;
  nfapi_ul_config_request_pdu_t *ul_config_pdu;
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  int i;

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  eNB->pdcch_vars[subframe&1].num_pdcch_symbols = DL_req->dl_config_request_body.number_pdcch_ofdm_symbols;
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  eNB->pdcch_vars[subframe&1].num_dci           = 0;


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  LOG_D(PHY,"NFAPI: received %d dl_pdu, %d tx_req, %d hi_dci0_config_req, %d UL_config \n",
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	number_dl_pdu,TX_req->tx_request_body.number_of_pdus,number_hi_dci0_pdu,number_ul_pdu);

  
  if ((subframe_select(fp,ul_subframe)==SF_UL) ||
      (fp->frame_type == FDD)) {
    harq_pid = subframe2harq_pid(fp,ul_frame,ul_subframe);

    // clear DCI allocation maps for new subframe
    
    for (i=0; i<NUMBER_OF_UE_MAX; i++) {
      if (eNB->ulsch[i]) {
	ulsch_harq = eNB->ulsch[i]->harq_processes[harq_pid];
        ulsch_harq->dci_alloc=0;
        ulsch_harq->rar_alloc=0;
      }
    }
  }
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  for (i=0;i<number_dl_pdu;i++) {
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    dl_config_pdu = &DL_req->dl_config_request_body.dl_config_pdu_list[i];
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    LOG_D(PHY,"NFAPI: dl_pdu %d : type %d\n",i,dl_config_pdu->pdu_type);
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    switch (dl_config_pdu->pdu_type) {
    case NFAPI_DL_CONFIG_DCI_DL_PDU_TYPE:
      handle_nfapi_dci_dl_pdu(eNB,proc,dl_config_pdu);
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      eNB->pdcch_vars[subframe&1].num_dci++;
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      break;
    case NFAPI_DL_CONFIG_BCH_PDU_TYPE:
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      AssertFatal(dl_config_pdu->bch_pdu.bch_pdu_rel8.pdu_index<TX_req->tx_request_body.number_of_pdus,
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		  "bch_pdu_rel8.pdu_index>=TX_req->number_of_pdus (%d>%d)\n",
		  dl_config_pdu->bch_pdu.bch_pdu_rel8.pdu_index,
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		  TX_req->tx_request_body.number_of_pdus);
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      eNB->pbch_configured=1;
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      handle_nfapi_bch_pdu(eNB,proc,dl_config_pdu,
			   TX_req->tx_request_body.tx_pdu_list[dl_config_pdu->bch_pdu.bch_pdu_rel8.pdu_index].segments[0].segment_data);
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      break;
    case NFAPI_DL_CONFIG_MCH_PDU_TYPE:
      //      handle_nfapi_mch_dl_pdu(eNB,dl_config_pdu);
      break;
    case NFAPI_DL_CONFIG_DLSCH_PDU_TYPE:
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      AssertFatal(dl_config_pdu->dlsch_pdu.dlsch_pdu_rel8.pdu_index<TX_req->tx_request_body.number_of_pdus,
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		  "dlsch_pdu_rel8.pdu_index>=TX_req->number_of_pdus (%d>%d)\n",
		  dl_config_pdu->dlsch_pdu.dlsch_pdu_rel8.pdu_index,
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		  TX_req->tx_request_body.number_of_pdus);
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      AssertFatal((dl_config_pdu->dlsch_pdu.dlsch_pdu_rel8.transport_blocks<3) &&
		  (dl_config_pdu->dlsch_pdu.dlsch_pdu_rel8.transport_blocks>0),
		  "dl_config_pdu->dlsch_pdu.dlsch_pdu_rel8.transport_blocks = %d not in [1,2]\n",
		  dl_config_pdu->dlsch_pdu.dlsch_pdu_rel8.transport_blocks);
      handle_nfapi_dlsch_pdu(eNB,proc,dl_config_pdu,
			     dl_config_pdu->dlsch_pdu.dlsch_pdu_rel8.transport_blocks-1,
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			     TX_req->tx_request_body.tx_pdu_list[dl_config_pdu->dlsch_pdu.dlsch_pdu_rel8.pdu_index].segments[0].segment_data);
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      if (dl_config_pdu->dlsch_pdu.dlsch_pdu_rel8.rnti == eNB->preamble_list[0].preamble_rel8.rnti) {// is RAR pdu
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	generate_eNB_ulsch_params_from_rar(eNB,
					   TX_req->tx_request_body.tx_pdu_list[dl_config_pdu->dlsch_pdu.dlsch_pdu_rel8.pdu_index].segments[0].segment_data,
					   frame,
					   subframe);
					   
      }					   
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      break;
    case NFAPI_DL_CONFIG_PCH_PDU_TYPE:
      //      handle_nfapi_pch_pdu(eNB,dl_config_pdu);
      break;
    case NFAPI_DL_CONFIG_PRS_PDU_TYPE:
      //      handle_nfapi_prs_pdu(eNB,dl_config_pdu);
      break;
    case NFAPI_DL_CONFIG_CSI_RS_PDU_TYPE:
      //      handle_nfapi_csi_rs_pdu(eNB,dl_config_pdu);
      break;
    case NFAPI_DL_CONFIG_EPDCCH_DL_PDU_TYPE:
      //      handle_nfapi_epdcch_pdu(eNB,dl_config_pdu);
      break;
    case NFAPI_DL_CONFIG_MPDCCH_PDU_TYPE:
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      handle_nfapi_mpdcch_pdu(eNB,proc,dl_config_pdu);
      eNB->mpdcch_vars[subframe&1].num_dci++; 
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      break;
    }
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  }
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  for (i=0;i<number_hi_dci0_pdu;i++) {
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    hi_dci0_req_pdu = &HI_DCI0_req->hi_dci0_request_body.hi_dci0_pdu_list[i];
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    switch (hi_dci0_req_pdu->pdu_type) {
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    case NFAPI_HI_DCI0_DCI_PDU_TYPE:
      handle_nfapi_hi_dci0_dci_pdu(eNB,proc,hi_dci0_req_pdu);
      eNB->pdcch_vars[subframe&1].num_dci++; 
      break;
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    case NFAPI_HI_DCI0_HI_PDU_TYPE:
      handle_nfapi_hi_dci0_hi_pdu(eNB,proc,hi_dci0_req_pdu);
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      eNB->pdcch_vars[subframe&1].num_dci++; 
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      break;
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    }
  } 
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  for (i=0;i<number_ul_pdu;i++) {
    ul_config_pdu = &UL_req->ul_config_request_body.ul_config_pdu_list[i];
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    LOG_D(PHY,"NFAPI: ul_pdu %d : type %d\n",i,ul_config_pdu->pdu_type);
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    AssertFatal(ul_config_pdu->pdu_type == NFAPI_UL_CONFIG_ULSCH_PDU_TYPE ||
		ul_config_pdu->pdu_type == NFAPI_UL_CONFIG_UCI_HARQ_PDU_TYPE,
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		"Optional UL_PDU type %d not supported\n",ul_config_pdu->pdu_type);
    handle_nfapi_ul_pdu(eNB,proc,ul_config_pdu);
  }
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}
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void phy_procedures_eNB_TX(PHY_VARS_eNB *eNB,
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			   eNB_rxtx_proc_t *proc,
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                           relaying_type_t r_type,
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			   PHY_VARS_RN *rn,
			   int do_meas)
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{
  UNUSED(rn);
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  int frame=proc->frame_tx;
  int subframe=proc->subframe_tx;
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  uint32_t i,j,aa;
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  uint8_t harq_pid;
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  int8_t UE_id=0;
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  uint8_t num_pdcch_symbols=0;
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  uint8_t num_dci=0;
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  uint8_t ul_subframe;
  uint32_t ul_frame;
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  LTE_DL_FRAME_PARMS *fp=&eNB->frame_parms;
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  LTE_UL_eNB_HARQ_t *ulsch_harq;
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  int offset = eNB->CC_id;//proc == &eNB->proc.proc_rxtx[0] ? 0 : 1;
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  if ((fp->frame_type == TDD) && (subframe_select(fp,subframe)==SF_UL)) return;
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  VCD_SIGNAL_DUMPER_DUMP_FUNCTION_BY_NAME(VCD_SIGNAL_DUMPER_FUNCTIONS_PHY_PROCEDURES_ENB_TX+offset,1);
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  if (do_meas==1) start_meas(&eNB->phy_proc_tx);
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  T(T_ENB_PHY_DL_TICK, T_INT(eNB->Mod_id), T_INT(frame), T_INT(subframe));
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  /*
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  for (i=0; i<NUMBER_OF_UE_MAX; i++) {
    // If we've dropped the UE, go back to PRACH mode for this UE
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    if ((frame==0)&&(subframe==0)) {
      if (eNB->UE_stats[i].crnti > 0) {
	LOG_I(PHY,"UE %d : rnti %x\n",i,eNB->UE_stats[i].crnti);
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      }
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    }
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    if (eNB->UE_stats[i].ulsch_consecutive_errors == ULSCH_max_consecutive_errors) {
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      LOG_W(PHY,"[eNB %d, CC %d] frame %d, subframe %d, UE %d: ULSCH consecutive error count reached %u, triggering UL Failure\n",
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            eNB->Mod_id,eNB->CC_id,frame,subframe, i, eNB->UE_stats[i].ulsch_consecutive_errors);
      eNB->UE_stats[i].ulsch_consecutive_errors=0;
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      mac_xface->UL_failure_indication(eNB->Mod_id,
				       eNB->CC_id,
				       frame,
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				       eNB->UE_stats[i].crnti,
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				       subframe);
				       
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    }
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  }
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  // Get scheduling info for next subframe
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  // This is called only for the CC_id = 0 and triggers scheduling for all CC_id's
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  if (eNB->mac_enabled==1) {
    if (eNB->CC_id == 0) {
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      mac_xface->eNB_dlsch_ulsch_scheduler(eNB->Mod_id,0,frame,subframe);//,1);
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    }
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  }
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  */
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  // clear the transmit data array for the current subframe
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  for (aa=0; aa<fp->nb_antenna_ports_eNB; aa++) {      
    memset(&eNB->common_vars.txdataF[aa][subframe*fp->ofdm_symbol_size*(fp->symbols_per_tti)],
	   0,fp->ofdm_symbol_size*(fp->symbols_per_tti)*sizeof(int32_t));
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  }
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  if (is_pmch_subframe(frame,subframe,fp)) {
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    pmch_procedures(eNB,proc,rn,r_type);
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  }
  else {
    // this is not a pmch subframe, so generate PSS/SSS/PBCH
1283
    common_signal_procedures(eNB,proc);
1284
  }
1285

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  // clear existing ulsch dci allocations before applying info from MAC  (this is table
1287
  ul_subframe = pdcch_alloc2ul_subframe(fp,subframe);
1288
  ul_frame = pdcch_alloc2ul_frame(fp,frame,subframe);
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  // clear previous allocation information for all UEs
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  for (i=0; i<NUMBER_OF_UE_MAX; i++) {
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    if (eNB->dlsch[i][0])
      eNB->dlsch[i][0]->subframe_tx[subframe] = 0;
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  }
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  /* save old HARQ information needed for PHICH generation */
  for (i=0; i<NUMBER_OF_UE_MAX; i++) {
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    harq_pid = subframe2harq_pid(fp,ul_frame,ul_subframe);
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    if (eNB->ulsch[i]) {
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      ulsch_harq = eNB->ulsch[i]->harq_processes[harq_pid];

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      /* Store first_rb and n_DMRS for correct PHICH generation below.
       * For PHICH generation we need "old" values of last scheduling
       * for this HARQ process. 'generate_eNB_dlsch_params' below will
       * overwrite first_rb and n_DMRS and 'generate_phich_top', done
       * after 'generate_eNB_dlsch_params', would use the "new" values
       * instead of the "old" ones.
       *
       * This has been tested for FDD only, may be wrong for TDD.
       *
       * TODO: maybe we should restructure the code to be sure it
       *       is done correctly. The main concern is if the code
       *       changes and first_rb and n_DMRS are modified before
       *       we reach here, then the PHICH processing will be wrong,
       *       using wrong first_rb and n_DMRS values to compute
       *       ngroup_PHICH and nseq_PHICH.
       *
       * TODO: check if that works with TDD.
       */
      if ((subframe_select(fp,ul_subframe)==SF_UL) ||
          (fp->frame_type == FDD)) {
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        ulsch_harq->previous_first_rb = ulsch_harq->first_rb;
        ulsch_harq->previous_n_DMRS   = ulsch_harq->n_DMRS;
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      }
    }
  }

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  //  num_pdcch_symbols = DCI_pdu->num_pdcch_symbols;
  num_pdcch_symbols = eNB->pdcch_vars[subframe&1].num_pdcch_symbols;
  num_dci           = eNB->pdcch_vars[subframe&1].num_dci;
  //  LOG_D(PHY,"num_pdcch_symbols %"PRIu8",(dci common %"PRIu8", dci uespec %"PRIu8"\n",num_pdcch_symbols,
  //        DCI_pdu->Num_common_dci,DCI_pdu->Num_ue_spec_dci);
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  LOG_D(PHY,"num_pdcch_symbols %"PRIu8",(number dci %"PRIu8"\n",num_pdcch_symbols,
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	num_dci);
  VCD_SIGNAL_DUMPER_DUMP_VARIABLE_BY_NAME(VCD_SIGNAL_DUMPER_VARIABLES_DCI_INFO,num_pdcch_symbols);
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  VCD_SIGNAL_DUMPER_DUMP_VARIABLE_BY_NAME(VCD_SIGNAL_DUMPER_VARIABLES_DCI_INFO,(frame*10)+subframe);

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  // Apply physicalConfigDedicated if needed
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  // This is for UEs that have received this IE, which changes these DL and UL configuration, we apply after a delay for the eNodeB UL parameters
  phy_config_dedicated_eNB_step2(eNB);
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  if (num_dci > 0)
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    LOG_D(PHY,"[eNB %"PRIu8"] Frame %d, subframe %d: Calling generate_dci_top (pdcch) (num_dci %"PRIu8")\n",eNB->Mod_id,frame, subframe,
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	  num_dci);
    
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  generate_dci_top(num_pdcch_symbols,
		   num_dci,
		   &eNB->pdcch_vars[subframe&1].dci_alloc[0],
		   0,
		   AMP,
		   fp,
		   eNB->common_vars.txdataF,
		   subframe);
  
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  VCD_SIGNAL_DUMPER_DUMP_FUNCTION_BY_NAME(VCD_SIGNAL_DUMPER_FUNCTIONS_PHY_ENB_PDCCH_TX,0);
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  // Now scan UE specific DLSCH
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  LTE_eNB_DLSCH_t *dlsch0,*dlsch1;
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  for (UE_id=0; UE_id<NUMBER_OF_UE_MAX; UE_id++)
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    {
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      dlsch0 = eNB->dlsch[(uint8_t)UE_id][0]; 
      dlsch1 = eNB->dlsch[(uint8_t)UE_id][1]; 
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      if ((dlsch0)&&
	  (dlsch0->rnti>0)&&
	  (dlsch0->active == 1)) {
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	// get harq_pid
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	harq_pid = dlsch0->harq_ids[subframe];
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	AssertFatal(harq_pid>=0,"harq_pid is negative\n");
	// generate pdsch
	pdsch_procedures(eNB,
			 proc,
			 harq_pid,
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			 dlsch0,
			 dlsch1,
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			 &eNB->UE_stats[(uint32_t)UE_id],
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			 0);
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      }
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      else if ((dlsch0)&&
	       (dlsch0->rnti>0)&&
	       (dlsch0->active == 0)) {
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	// clear subframe TX flag since UE is not scheduled for PDSCH in this subframe (so that we don't look for PUCCH later)
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	dlsch0->subframe_tx[subframe]=0;
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      }
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    }
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  // if we have PHICH to generate
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1402
  if (is_phich_subframe(fp,subframe))
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    {
      generate_phich_top(eNB,
			 proc,
			 AMP,
1407
			 0);
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    }
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  /*
  if (frame>=10 && subframe>=9) {
    write_output("/tmp/txsigF0.m","txsF0", &eNB->common_vars.txdataF[0][0][0],120*eNB->frame_parms.ofdm_symbol_size,1,1);
    write_output("/tmp/txsigF1.m","txsF1", &eNB->common_vars.txdataF[0][0][0],120*eNB->frame_parms.ofdm_symbol_size,1,1);
    abort();
  }
  */
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  VCD_SIGNAL_DUMPER_DUMP_FUNCTION_BY_NAME(VCD_SIGNAL_DUMPER_FUNCTIONS_PHY_PROCEDURES_ENB_TX+offset,0);
1419
  if (do_meas==1) stop_meas(&eNB->phy_proc_tx);
1420
  
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}

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void process_Msg3(PHY_VARS_eNB *eNB,eNB_rxtx_proc_t *proc,uint8_t UE_id, uint8_t harq_pid)
1424
{
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  // this prepares the demodulation of the first PUSCH of a new user, containing Msg3
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  int subframe = proc->subframe_rx;
  int frame = proc->frame_rx;
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  LTE_eNB_ULSCH_t *ulsch = eNB->ulsch[UE_id];
  LTE_UL_eNB_HARQ_t *ulsch_harq=ulsch->harq_processes[harq_pid];
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  LOG_D(PHY,"[eNB %d][RAPROC] frame %d : subframe %d : process_Msg3 UE_id %d (active %d, subframe %d, frame %d)\n",
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        eNB->Mod_id,
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        frame,subframe,
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        UE_id,ulsch->Msg3_active,
        ulsch_harq->subframe,
        ulsch_harq->frame);

  ulsch_harq->Msg3_flag = 0;
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  if ((ulsch->Msg3_active == 1) &&
      (ulsch_harq->subframe == subframe) &&
      (ulsch_harq->frame == (uint32_t)frame))   {
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1444
    //    harq_pid = 0;
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    ulsch->Msg3_active = 0;
    ulsch_harq->Msg3_flag = 1;
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    LOG_D(PHY,"[eNB %d][RAPROC] frame %d, subframe %d: Setting subframe_scheduling_flag (Msg3) for UE %d\n",
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          eNB->Mod_id,
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          frame,subframe,UE_id);
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  }
}


// This function retrieves the harq_pid of the corresponding DLSCH process
// and updates the error statistics of the DLSCH based on the received ACK
// info from UE along with the round index.  It also performs the fine-grain
// rate-adaptation based on the error statistics derived from the ACK/NAK process

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void process_HARQ_feedback(uint8_t UE_id,
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                           PHY_VARS_eNB *eNB,
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			   eNB_rxtx_proc_t *proc,
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                           uint8_t pusch_flag,
                           uint8_t *pucch_payload,
                           uint8_t pucch_sel,
                           uint8_t SR_payload)
{
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  LTE_DL_FRAME_PARMS *fp=&eNB->frame_parms;
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  uint8_t dl_harq_pid[8],dlsch_ACK[8],dl_subframe;
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  LTE_eNB_DLSCH_t *dlsch             =  eNB->dlsch[(uint32_t)UE_id][0];
  LTE_eNB_UE_stats *ue_stats         =  &eNB->UE_stats[(uint32_t)UE_id];
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  LTE_DL_eNB_HARQ_t *dlsch_harq_proc;
1474
  uint8_t subframe_m4,M,m;
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  int mp;
  int all_ACKed=1,nb_alloc=0,nb_ACK=0;
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  int frame = proc->frame_rx;
  int subframe = proc->subframe_rx;
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  int harq_pid = subframe2harq_pid( fp,frame,subframe);
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  nfapi_harq_indication_pdu_t *pdu;

1483
  if (fp->frame_type == FDD) { //FDD
1484
    subframe_m4 = (subframe<4) ? subframe+6 : subframe-4;
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    dl_harq_pid[0] = dlsch->harq_ids[subframe_m4];
    M=1;
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1489
    if (pusch_flag == 1) {
1490
      dlsch_ACK[0] = eNB->ulsch[(uint8_t)UE_id]->harq_processes[harq_pid]->o_ACK[0];
1491
      if (dlsch->subframe_tx[subframe_m4]==1)
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	LOG_D(PHY,"[eNB %d] Frame %d: Received ACK/NAK %d on PUSCH for subframe %d\n",eNB->Mod_id,
	      frame,dlsch_ACK[0],subframe_m4);
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    }
    else {
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      dlsch_ACK[0] = pucch_payload[0];
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      LOG_D(PHY,"[eNB %d] Frame %d: Received ACK/NAK %d on PUCCH for subframe %d\n",eNB->Mod_id,
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	    frame,dlsch_ACK[0],subframe_m4);
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      /*
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	if (dlsch_ACK[0]==0)
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	AssertFatal(0,"Exiting on NAK on PUCCH\n");
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      */
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    }
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    // fill ACK/NAK Indication
    pdu = &eNB->UL_INFO.harq_ind.harq_pdu_list[eNB->UL_INFO.harq_ind.number_of_harqs];
    eNB->UL_INFO.harq_ind.number_of_harqs++;    
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#if defined(MESSAGE_CHART_GENERATOR_PHY)
    MSC_LOG_RX_MESSAGE(
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		       MSC_PHY_ENB,MSC_PHY_UE,
		       NULL,0,
		       "%05u:%02u %s received %s  rnti %x harq id %u  tx SF %u",
		       frame,subframe,
		       (pusch_flag == 1)?"PUSCH":"PUCCH",
		       (dlsch_ACK[0])?"ACK":"NACK",
		       dlsch->rnti,
		       dl_harq_pid[0],
		       subframe_m4
		       );
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#endif
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  } else { // TDD Handle M=1,2 cases only

1524
    M=ul_ACK_subframe2_M(fp,
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                         subframe);

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    // Now derive ACK information for TDD
    if (pusch_flag == 1) { // Do PUSCH ACK/NAK first
      // detect missing DAI
      //FK: this code is just a guess
      //RK: not exactly, yes if scheduled from PHICH (i.e. no DCI format 0)
      //    otherwise, it depends on how many of the PDSCH in the set are scheduled, we can leave it like this,
      //    but we have to adapt the code below.  For example, if only one out of 2 are scheduled, only 1 bit o_ACK is used

1535
      dlsch_ACK[0] = eNB->ulsch[(uint8_t)UE_id]->harq_processes[harq_pid]->o_ACK[0];
1536
      dlsch_ACK[1] = (eNB->pucch_config_dedicated[UE_id].tdd_AckNackFeedbackMode == bundling)
1537
	?eNB->ulsch[(uint8_t)UE_id]->harq_processes[harq_pid]->o_ACK[0]:eNB->ulsch[(uint8_t)UE_id]->harq_processes[harq_pid]->o_ACK[1];
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    }
1539

1540

1541
    else {  // PUCCH ACK/NAK
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      if ((SR_payload == 1)&&(pucch_sel!=2)) {  // decode Table 7.3 if multiplexing and SR=1
        nb_ACK = 0;

        if (M == 2) {
          if ((pucch_payload[0] == 1) && (pucch_payload[1] == 1)) // b[0],b[1]
            nb_ACK = 1;
          else if ((pucch_payload[0] == 1) && (pucch_payload[1] == 0))
            nb_ACK = 2;
        } else if (M == 3) {
          if ((pucch_payload[0] == 1) && (pucch_payload[1] == 1))
            nb_ACK = 1;
          else if ((pucch_payload[0] == 1) && (pucch_payload[1] == 0))
            nb_ACK = 2;
          else if ((pucch_payload[0] == 0) && (pucch_payload[1] == 1))
            nb_ACK = 3;
        }
      } else if (pucch_sel == 2) { // bundling or M=1
        dlsch_ACK[0] = pucch_payload[0];
        dlsch_ACK[1] = pucch_payload[0];
      } else { // multiplexing with no SR, this is table 10.1
        if (M==1)
          dlsch_ACK[0] = pucch_payload[0];
        else if (M==2) {
          if (((pucch_sel == 1) && (pucch_payload[0] == 1) && (pucch_payload[1] == 1)) ||
              ((pucch_sel == 0) && (pucch_payload[0] == 0) && (pucch_payload[1] == 1)))
            dlsch_ACK[0] = 1;
          else
            dlsch_ACK[0] = 0;

          if (((pucch_sel == 1) && (pucch_payload[0] == 1) && (pucch_payload[1] == 1)) ||
              ((pucch_sel == 1) && (pucch_payload[0] == 0) && (pucch_payload[1] == 0)))
            dlsch_ACK[1] = 1;
          else
            dlsch_ACK[1] = 0;
        }
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      }
1578
    }
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  }

  // handle case where positive SR was transmitted with multiplexing
  if ((SR_payload == 1)&&(pucch_sel!=2)&&(pusch_flag == 0)) {
1583
    nb_alloc = 0;
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    for (m=0; m<M; m++) {
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      dl_subframe = ul_ACK_subframe2_dl_subframe(fp,
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						 subframe,
						 m);
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      if (dlsch->subframe_tx[dl_subframe]==1)
        nb_alloc++;
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    }
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    if (nb_alloc == nb_ACK)
      all_ACKed = 1;
1596
    else
1597
      all_ACKed = 0;
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  }


1601
  for (m=0,mp=-1; m<M; m++) {
1602

1603
    dl_subframe = ul_ACK_subframe2_dl_subframe(fp,
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					       subframe,
					       m);
1606 1607
    if (dlsch->subframe_tx[dl_subframe]==1) {
      if (pusch_flag == 1)
1608
        mp++;
1609
      else
1610
        mp = m;
1611

1612
      dl_harq_pid[m]     = dlsch->harq_ids[dl_subframe];
1613
      harq_pid_updated[UE_id][dl_harq_pid[m]] = 1;
1614

1615
      if ((pucch_sel != 2)&&(pusch_flag == 0)) { // multiplexing
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        if ((SR_payload == 1)&&(all_ACKed == 1))
          dlsch_ACK[m] = 1;
        else
          dlsch_ACK[m] = 0;
1620
      }
1621

1622
      if (dl_harq_pid[m]<dlsch->Mdlharq) {
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        dlsch_harq_proc = dlsch->harq_processes[dl_harq_pid[m]];
#ifdef DEBUG_PHY_PROC
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        LOG_D(PHY,"[eNB %d][PDSCH %x/%d] subframe %d, status %d, round %d (rv %d, TBS %d)\n",eNB->Mod_id,
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              dlsch->rnti,dl_harq_pid[m],dl_subframe,
              dlsch_harq_proc->status,dlsch_harq_proc->round,
              dlsch->harq_processes[dl_harq_pid[m]]->rvidx,
              dlsch->harq_processes[dl_harq_pid[m]]->TBS);

        if (dlsch_harq_proc->status==DISABLED)
          LOG_E(PHY,"dlsch_harq_proc is disabled? \n");

1634
#endif
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        if ((dl_harq_pid[m]<dlsch->Mdlharq) &&
            (dlsch_harq_proc->status == ACTIVE)) {
          // dl_harq_pid of DLSCH is still active

          if ( dlsch_ACK[mp]==0) {
            // Received NAK
#ifdef DEBUG_PHY_PROC
1643
            LOG_D(PHY,"[eNB %d][PDSCH %x/%d] M = %d, m= %d, mp=%d NAK Received in round %d, requesting retransmission\n",eNB->Mod_id,
1644
                  dlsch->rnti,dl_harq_pid[m],M,m,mp,dlsch_harq_proc->round);
1645
#endif
1646

1647
            T(T_ENB_PHY_DLSCH_UE_NACK, T_INT(eNB->Mod_id), T_INT(frame), T_INT(subframe), T_INT(UE_id), T_INT(dlsch->rnti),
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              T_INT(dl_harq_pid[m]));
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            if (dlsch_harq_proc->round == 0)
              ue_stats->dlsch_NAK_round0++;

            ue_stats->dlsch_NAK[dl_harq_pid[m]][dlsch_harq_proc->round]++;


            // then Increment DLSCH round index
            dlsch_harq_proc->round++;

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1660
            if (dlsch_harq_proc->round == dlsch->Mlimit) {
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              // This was the last round for DLSCH so reset round and increment l2_error counter
#ifdef DEBUG_PHY_PROC
1663
              LOG_W(PHY,"[eNB %d][PDSCH %x/%d] DLSCH retransmissions exhausted, dropping packet\n",eNB->Mod_id,
1664
                    dlsch->rnti,dl_harq_pid[m]);
1665
#endif
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#if defined(MESSAGE_CHART_GENERATOR_PHY)
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              MSC_LOG_EVENT(MSC_PHY_ENB, "0 HARQ DLSCH Failed RNTI %"PRIx16" round %u",
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                            dlsch->rnti,
                            dlsch_harq_proc->round);
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#endif
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              dlsch_harq_proc->round = 0;
              ue_stats->dlsch_l2_errors[dl_harq_pid[m]]++;
              dlsch_harq_proc->status = SCH_IDLE;
              dlsch->harq_ids[dl_subframe] = dlsch->Mdlharq;
            }
          } else {
#ifdef DEBUG_PHY_PROC
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            LOG_D(PHY,"[eNB %d][PDSCH %x/%d] ACK Received in round %d, resetting process\n",eNB->Mod_id,
1680
                  dlsch->rnti,dl_harq_pid[m],dlsch_harq_proc->round);
1681
#endif
1682

1683
            T(T_ENB_PHY_DLSCH_UE_ACK, T_INT(eNB->Mod_id), T_INT(frame), T_INT(subframe), T_INT(UE_id), T_INT(dlsch->rnti),
1684
              T_INT(dl_harq_pid[m]));
1685

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            ue_stats->dlsch_ACK[dl_harq_pid[m]][dlsch_harq_proc->round]++;

            // Received ACK so set round to 0 and set dlsch_harq_pid IDLE
            dlsch_harq_proc->round  = 0;
            dlsch_harq_proc->status = SCH_IDLE;
            dlsch->harq_ids[dl_subframe] = dlsch->Mdlharq;

            ue_stats->total_TBS = ue_stats->total_TBS +
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	      eNB->dlsch[(uint8_t)UE_id][0]->harq_processes[dl_harq_pid[m]]->TBS;
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            /*
              ue_stats->total_transmitted_bits = ue_stats->total_transmitted_bits +
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              eNB->dlsch[(uint8_t)UE_id][0]->harq_processes[dl_harq_pid[m]]->TBS;
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            */
          }
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          // Do fine-grain rate-adaptation for DLSCH
          if (ue_stats->dlsch_NAK_round0 > dlsch->error_threshold) {
            if (ue_stats->dlsch_mcs_offset == 1)
              ue_stats->dlsch_mcs_offset=0;
            else
              ue_stats->dlsch_mcs_offset=-1;
          }

#ifdef DEBUG_PHY_PROC
          LOG_D(PHY,"[process_HARQ_feedback] Frame %d Setting round to %d for pid %d (subframe %d)\n",frame,
                dlsch_harq_proc->round,dl_harq_pid[m],subframe);
1712
#endif
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	  harq_pid_round[UE_id][dl_harq_pid[m]] = dlsch_harq_proc->round;
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          // Clear NAK stats and adjust mcs offset
          // after measurement window timer expires
          if (ue_stats->dlsch_sliding_cnt == dlsch->ra_window_size) {
            if ((ue_stats->dlsch_mcs_offset == 0) && (ue_stats->dlsch_NAK_round0 < 2))
              ue_stats->dlsch_mcs_offset = 1;

            if ((ue_stats->dlsch_mcs_offset == 1) && (ue_stats->dlsch_NAK_round0 > 2))
              ue_stats->dlsch_mcs_offset = 0;

            if ((ue_stats->dlsch_mcs_offset == 0) && (ue_stats->dlsch_NAK_round0 > 2))
              ue_stats->dlsch_mcs_offset = -1;

            if ((ue_stats->dlsch_mcs_offset == -1) && (ue_stats->dlsch_NAK_round0 < 2))
              ue_stats->dlsch_mcs_offset = 0;

            ue_stats->dlsch_NAK_round0 = 0;
            ue_stats->dlsch_sliding_cnt = 0;
          }
        }
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      }
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    }
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  }
}

1738
void get_n1_pucch_eNB(PHY_VARS_eNB *eNB,
1739
		      eNB_rxtx_proc_t *proc,
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                      uint8_t UE_id,
                      int16_t *n1_pucch0,
                      int16_t *n1_pucch1,
                      int16_t *n1_pucch2,
                      int16_t *n1_pucch3)
{
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  LTE_DL_FRAME_PARMS *frame_parms=&eNB->frame_parms;
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  uint8_t nCCE0,nCCE1;
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  int sf;
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  int frame = proc->frame_rx;
  int subframe = proc->subframe_rx;
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  if (frame_parms->frame_type == FDD ) {
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    sf = (subframe<4) ? (subframe+6) : (subframe-4);
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    if (eNB->dlsch[(uint32_t)UE_id][0]->subframe_tx[sf]>0) {
      *n1_pucch0 = frame_parms->pucch_config_common.n1PUCCH_AN + eNB->dlsch[(uint32_t)UE_id][0]->nCCE[sf];
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      *n1_pucch1 = -1;
1759
    } else {
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      *n1_pucch0 = -1;
      *n1_pucch1 = -1;
    }
1763
  } else {
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    switch (frame_parms->tdd_config) {
    case 1:  // DL:S:UL:UL:DL:DL:S:UL:UL:DL
      if (subframe == 2) {  // ACK subframes 5 and 6
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        /*  if (eNB->dlsch[(uint32_t)UE_id][0]->subframe_tx[6]>0) {
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	    nCCE1 = eNB->dlsch[(uint32_t)UE_id][0]->nCCE[6];
	    *n1_pucch1 = get_Np(frame_parms->N_RB_DL,nCCE1,1) + nCCE1 + frame_parms->pucch_config_common.n1PUCCH_AN;
	    }
	    else
	    *n1_pucch1 = -1;*/
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        if (eNB->dlsch[(uint32_t)UE_id][0]->subframe_tx[5]>0) {
          nCCE0 = eNB->dlsch[(uint32_t)UE_id][0]->nCCE[5];
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          *n1_pucch0 = get_Np(frame_parms->N_RB_DL,nCCE0,0) + nCCE0+ frame_parms->pucch_config_common.n1PUCCH_AN;
        } else
          *n1_pucch0 = -1;

        *n1_pucch1 = -1;
      } else if (subframe == 3) { // ACK subframe 9

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        if (eNB->dlsch[(uint32_t)UE_id][0]->subframe_tx[9]>0) {
          nCCE0 = eNB->dlsch[(uint32_t)UE_id][0]->nCCE[9];
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          *n1_pucch0 = get_Np(frame_parms->N_RB_DL,nCCE0,0) + nCCE0 +frame_parms->pucch_config_common.n1PUCCH_AN;
        } else
          *n1_pucch0 = -1;

        *n1_pucch1 = -1;

      } else if (subframe == 7) { // ACK subframes 0 and 1
        //harq_ack[0].nCCE;
        //harq_ack[1].nCCE;
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        if (eNB->dlsch[(uint32_t)UE_id][0]->subframe_tx[0]>0) {
          nCCE0 = eNB->dlsch[(uint32_t)UE_id][0]->nCCE[0];
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          *n1_pucch0 = get_Np(frame_parms->N_RB_DL,nCCE0,0) + nCCE0 + frame_parms->pucch_config_common.n1PUCCH_AN;
        } else
          *n1_pucch0 = -1;

        *n1_pucch1 = -1;
      } else if (subframe == 8) { // ACK subframes 4
        //harq_ack[4].nCCE;
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        if (eNB->dlsch[(uint32_t)UE_id][0]->subframe_tx[4]>0) {
          nCCE0 = eNB->dlsch[(uint32_t)UE_id][0]->nCCE[4];
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          *n1_pucch0 = get_Np(frame_parms->N_RB_DL,nCCE0,0) + nCCE0 + frame_parms->pucch_config_common.n1PUCCH_AN;
        } else
          *n1_pucch0 = -1;

        *n1_pucch1 = -1;
      } else {
        LOG_D(PHY,"[eNB %d] frame %d: phy_procedures_lte.c: get_n1pucch, illegal subframe %d for tdd_config %d\n",
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              eNB->Mod_id,
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              frame,
              subframe,frame_parms->tdd_config);
        return;
1817
      }
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      break;
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    case 3:  // DL:S:UL:UL:UL:DL:DL:DL:DL:DL
      if (subframe == 2) {  // ACK subframes 5,6 and 1 (S in frame-2), forget about n-11 for the moment (S-subframe)
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        if (eNB->dlsch[(uint32_t)UE_id][0]->subframe_tx[6]>0) {
          nCCE1 = eNB->dlsch[(uint32_t)UE_id][0]->nCCE[6];
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          *n1_pucch1 = get_Np(frame_parms->N_RB_DL,nCCE1,1) + nCCE1 + frame_parms->pucch_config_common.n1PUCCH_AN;
        } else
          *n1_pucch1 = -1;

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        if (eNB->dlsch[(uint32_t)UE_id][0]->subframe_tx[5]>0) {
          nCCE0 = eNB->dlsch[(uint32_t)UE_id][0]->nCCE[5];
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          *n1_pucch0 = get_Np(frame_parms->N_RB_DL,nCCE0,0) + nCCE0+ frame_parms->pucch_config_common.n1PUCCH_AN;
        } else
          *n1_pucch0 = -1;
      } else if (subframe == 3) { // ACK subframes 7 and 8
        LOG_D(PHY,"get_n1_pucch_eNB : subframe 3, subframe_tx[7] %d, subframe_tx[8] %d\n",
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              eNB->dlsch[(uint32_t)UE_id][0]->subframe_tx[7],eNB->dlsch[(uint32_t)UE_id][0]->subframe_tx[8]);
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        if (eNB->dlsch[(uint32_t)UE_id][0]->subframe_tx[8]>0) {
          nCCE1 = eNB->dlsch[(uint32_t)UE_id][0]->nCCE[8];
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          *n1_pucch1 = get_Np(frame_parms->N_RB_DL,nCCE1,1) + nCCE1 + frame_parms->pucch_config_common.n1PUCCH_AN;
          LOG_D(PHY,"nCCE1 %d, n1_pucch1 %d\n",nCCE1,*n1_pucch1);
        } else
          *n1_pucch1 = -1;

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        if (eNB->dlsch[(uint32_t)UE_id][0]->subframe_tx[7]>0) {
          nCCE0 = eNB->dlsch[(uint32_t)UE_id][0]->nCCE[7];
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          *n1_pucch0 = get_Np(frame_parms->N_RB_DL,nCCE0,0) + nCCE0 +frame_parms->pucch_config_common.n1PUCCH_AN;
          LOG_D(PHY,"nCCE0 %d, n1_pucch0 %d\n",nCCE0,*n1_pucch0);
        } else
          *n1_pucch0 = -1;
      } else if (subframe == 4) { // ACK subframes 9 and 0
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        if (eNB->dlsch[(uint32_t)UE_id][0]->subframe_tx[0]>0) {
          nCCE1 = eNB->dlsch[(uint32_t)UE_id][0]->nCCE[0];
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          *n1_pucch1 = get_Np(frame_parms->N_RB_DL,nCCE1,1) + nCCE1 + frame_parms->pucch_config_common.n1PUCCH_AN;
        } else
          *n1_pucch1 = -1;

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        if (eNB->dlsch[(uint32_t)UE_id][0]->subframe_tx[9]>0) {
          nCCE0 = eNB->dlsch[(uint32_t)UE_id][0]->nCCE[9];
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          *n1_pucch0 = get_Np(frame_parms->N_RB_DL,nCCE0,0) + nCCE0 +frame_parms->pucch_config_common.n1PUCCH_AN;
        } else
          *n1_pucch0 = -1;
      } else {
        LOG_D(PHY,"[eNB %d] Frame %d: phy_procedures_lte.c: get_n1pucch, illegal subframe %d for tdd_config %d\n",
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              eNB->Mod_id,frame,subframe,frame_parms->tdd_config);
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        return;
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      }
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      break;
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    }  // switch tdd_config

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    // Don't handle the case M>2
    *n1_pucch2 = -1;
    *n1_pucch3 = -1;
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  }
}

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void prach_procedures(PHY_VARS_eNB *eNB,
#ifdef Rel14
		      int br_flag
#endif
		      ) {
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  LTE_DL_FRAME_PARMS *fp=&eNB->frame_parms;
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  uint16_t max_preamble[4],max_preamble_energy[4],max_preamble_delay[4];
1886
  uint16_t i;
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  int frame,subframe;
#ifdef Rel14
  if (br_flag==1) {
    subframe = eNB->proc.subframe_prach_br;
    frame = eNB->proc.frame_prach_br;
  }
  else
#endif
    {
      subframe = eNB->proc.subframe_prach;
      frame = eNB->proc.frame_prach;
    }
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  uint8_t CC_id = eNB->CC_id;
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  RU_t *ru;
  int aa=0;
  int ru_aa;
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  LTE_eNB_PRACH *prach_vars;
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  VCD_SIGNAL_DUMPER_DUMP_FUNCTION_BY_NAME(VCD_SIGNAL_DUMPER_FUNCTIONS_PHY_ENB_PRACH_RX,1);
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  for (i=0;i<eNB->num_RU;i++) {
    ru=eNB->RU_list[i];
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    for (ru_aa=0,aa=0;ru_aa<ru->nb_rx;ru_aa++,aa++) {
      eNB->prach_vars.rxsigF[aa] = eNB->RU_list[i]->prach_rxsigF[ru_aa];
#ifdef Rel14
      int ce_level;

      if (br_flag==1)
	for (ce_level=0;ce_level<4;ce_level++) eNB->prach_vars_br.rxsigF[aa] = eNB->RU_list[i]->prach_rxsigF_br[ce_level][ru_aa];
#endif
    }
1919
  }
1920

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1921 1922
  if ((frame&1023) < 20) LOG_I(PHY,"Frame %d, subframe %d: Running rx_prach (br_flag %d)\n",
			       frame,subframe,br_flag);
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  rx_prach(eNB,
	   eNB->RU_list[0],
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	   &max_preamble[0],
	   &max_preamble_energy[0],
	   &max_preamble_delay[0],
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	   frame,
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	   0
#ifdef Rel14
	   ,br_flag
#endif
	   );
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1935
  //#ifdef DEBUG_PHY_PROC
1936
  LOG_D(PHY,"[RAPROC] Frame %d, subframe %d : Most likely preamble %d, energy %d dB delay %d\n",
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        frame,subframe,
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	max_preamble[0],
        max_preamble_energy[0],
        max_preamble_delay[0]);
1941
  //#endif
1942

1943 1944
#ifdef Rel14
  if (br_flag==1) {
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    prach_vars = &eNB->prach_vars_br;
    int prach_mask;
      
    prach_mask = is_prach_subframe(&eNB->frame_parms,eNB->proc.frame_prach_br,eNB->proc.subframe_prach_br);
    
    eNB->UL_INFO.rach_ind_br.preamble_list                              = eNB->preamble_list_br;
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    for (int ind=0,ce_level=0;ce_level<4;ce_level++) {
      if ((prach_mask&(1<<(1+ce_level)) > 0) && // prach is active and CE level has finished its repetitions
	  (eNB->prach_vars_br.repetition_number[ce_level]==
	   eNB->frame_parms.prach_emtc_config_common.prach_ConfigInfo.prach_numRepetitionPerPreambleAttempt[ce_level])) {
	if (max_preamble_energy[ind] > 580) {
	  eNB->UL_INFO.rach_ind_br.number_of_preambles++;
	  
	  eNB->preamble_list_br[ind].preamble_rel8.timing_advance        = max_preamble_delay[ind];//
	  eNB->preamble_list_br[ind].preamble_rel8.preamble              = max_preamble[ind];
	  // note: fid is implicitly 0 here, this is the rule for eMTC RA-RNTI from 36.321, Section 5.1.4
	  eNB->preamble_list_br[ind].preamble_rel8.rnti                  = 1+subframe+(eNB->prach_vars_br.first_frame[ce_level]%40);  
	  eNB->preamble_list_br[ind].instance_length                     = 0; //don't know exactly what this is
	  eNB->preamble_list_br[ind].preamble_rel13.rach_resource_type   = 1+ce_level;  // CE Level
	}
	ind++;
      }
    } // ce_level
  }
  else
#endif
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    {
      if (max_preamble_energy[0] > 580) {

	LOG_D(PHY,"[eNB %d/%d][RAPROC] Frame %d, subframe %d Initiating RA procedure with preamble %d, energy %d.%d dB, delay %d\n",
	      eNB->Mod_id,
	      eNB->CC_id,
	      frame,
	      subframe,
	      max_preamble[0],
	      max_preamble_energy[0]/10,
	      max_preamble_energy[0]%10,
	      max_preamble_delay[0]);
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1987 1988 1989 1990 1991 1992 1993 1994 1995 1996 1997 1998 1999 2000 2001 2002 2003 2004 2005 2006 2007 2008 2009
	    T(T_ENB_PHY_INITIATE_RA_PROCEDURE, T_INT(eNB->Mod_id), T_INT(frame), T_INT(subframe), 0,
	      T_INT(max_preamble[0]), T_INT(max_preamble_energy[0]), T_INT(max_preamble_delay[0]));
	    
	    if (eNB->mac_enabled==1) {
	      
	      prach_vars = &eNB->prach_vars;
	      
	      
	      pthread_mutex_lock(&eNB->UL_INFO_mutex);
	      
	      eNB->UL_INFO.rach_ind.number_of_preambles                 = 1;
	      eNB->UL_INFO.rach_ind.preamble_list                       = eNB->preamble_list;
	      
	      eNB->preamble_list[0].preamble_rel8.timing_advance        = max_preamble_delay[0];
	      eNB->preamble_list[0].preamble_rel8.preamble              = max_preamble[0];
	      eNB->preamble_list[0].preamble_rel8.rnti                  = 1+subframe;  // note: fid is implicitly 0 here
	      eNB->preamble_list[0].preamble_rel13.rach_resource_type   = 0;
	      eNB->preamble_list[0].instance_length                     = 0; //don't know exactly what this is
	    
	      pthread_mutex_unlock(&eNB->UL_INFO_mutex);
	    }
      } // max_preamble_energy > 580
    } // else br_flag
2010
      /*
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	mac_xface->initiate_ra_proc(eNB->Mod_id,
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	eNB->CC_id,
	frame,
	preamble_max,
	preamble_delay_list[preamble_max]*update_TA/update_TA2,
	0,subframe,0);*/
      
    
    /*  } else {
    MSC_LOG_EVENT(MSC_PHY_ENB, "0 RA Failed add user, too many");
    LOG_I(PHY,"[eNB %d][RAPROC] frame %d, subframe %d: Unable to add user, max user count reached\n",
	  eNB->Mod_id,frame, subframe);
	  }*/
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2025
  VCD_SIGNAL_DUMPER_DUMP_FUNCTION_BY_NAME(VCD_SIGNAL_DUMPER_FUNCTIONS_PHY_ENB_PRACH_RX,0);
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}

2028
void pucch_procedures(PHY_VARS_eNB *eNB,eNB_rxtx_proc_t *proc,int UE_id,int harq_pid,uint8_t do_srs)
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{
2030
  LTE_DL_FRAME_PARMS *fp=&eNB->frame_parms;
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  uint8_t SR_payload = 0,*pucch_payload=NULL,pucch_payload0[2]= {0,0},pucch_payload1[2]= {0,0};
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  int16_t n1_pucch0 = -1, n1_pucch1 = -1, n1_pucch2 = -1, n1_pucch3 = -1;
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  uint8_t do_SR = 0;
  uint8_t pucch_sel = 0;
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  int32_t metric0=0,metric1=0,metric0_SR=0;
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  ANFBmode_t bundling_flag;
  PUCCH_FMT_t format;
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  const int subframe = proc->subframe_rx;
  const int frame = proc->frame_rx;
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2041 2042
  if ((eNB->dlsch[UE_id][0]) &&
      (eNB->dlsch[UE_id][0]->rnti>0) &&
2043 2044
      (eNB->ulsch[UE_id]->harq_processes[harq_pid]->frame != frame) &&
      (eNB->ulsch[UE_id]->harq_processes[harq_pid]->subframe != subframe)) {
2045

2046
    // check SR availability
2047 2048
    do_SR = is_SR_subframe(eNB,proc,UE_id);
    //      do_SR = 0;
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2049

2050 2051
    // Now ACK/NAK
    // First check subframe_tx flag for earlier subframes
2052

2053
    get_n1_pucch_eNB(eNB,
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                     proc,
                     UE_id,
                     &n1_pucch0,
                     &n1_pucch1,
                     &n1_pucch2,
                     &n1_pucch3);

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    LOG_D(PHY,"[eNB %d][PDSCH %x] Frame %d, subframe %d Checking for PUCCH (%d,%d,%d,%d) SR %d\n",
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          eNB->Mod_id,eNB->dlsch[UE_id][0]->rnti,
          frame,subframe,
          n1_pucch0,n1_pucch1,n1_pucch2,n1_pucch3,do_SR);

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    if ((n1_pucch0==-1) && (n1_pucch1==-1) && (do_SR==0)) {  // no TX PDSCH that have to be checked and no SR for this UE_id
    } else {
      // otherwise we have some PUCCH detection to do
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      // Null out PUCCH PRBs for noise measurement
      switch(fp->N_RB_UL) {
      case 6:
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        eNB->rb_mask_ul[0] |= (0x1 | (1<<5)); //position 5
        break;
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      case 15:
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        eNB->rb_mask_ul[0] |= (0x1 | (1<<14)); // position 14
        break;
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      case 25:
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        eNB->rb_mask_ul[0] |= (0x1 | (1<<24)); // position 24
        break;
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      case 50:
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        eNB->rb_mask_ul[0] |= 0x1;
        eNB->rb_mask_ul[1] |= (1<<17); // position 49 (49-32)
        break;
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      case 75:
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        eNB->rb_mask_ul[0] |= 0x1;
        eNB->rb_mask_ul[2] |= (1<<10); // position 74 (74-64)
        break;
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      case 100:
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        eNB->rb_mask_ul[0] |= 0x1;
        eNB->rb_mask_ul[3] |= (1<<3); // position 99 (99-96)
        break;
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      default:
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        LOG_E(PHY,"Unknown number for N_RB_UL %d\n",fp->N_RB_UL);
        break;
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      }
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2098
      if (do_SR == 1) {
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        eNB->UE_stats[UE_id].sr_total++;


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	metric0_SR = rx_pucch(eNB,
			      pucch_format1,
			      UE_id,
			      eNB->scheduling_request_config[UE_id].sr_PUCCH_ResourceIndex,
			      0, // n2_pucch
			      do_srs, // shortened format
			      &SR_payload,
			      frame,
			      subframe,
			      PUCCH1_THRES);
	LOG_D(PHY,"[eNB %d][SR %x] Frame %d subframe %d Checking SR is %d (SR n1pucch is %d)\n",
	      eNB->Mod_id,
	      eNB->ulsch[UE_id]->rnti,
	      frame,
	      subframe,
	      SR_payload,
	      eNB->scheduling_request_config[UE_id].sr_PUCCH_ResourceIndex);
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      }// do_SR==1
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      if ((n1_pucch0==-1) && (n1_pucch1==-1)) { // just check for SR
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      } else if (fp->frame_type==FDD) { // FDD
        // if SR was detected, use the n1_pucch from SR, else use n1_pucch0
        //          n1_pucch0 = (SR_payload==1) ? eNB->scheduling_request_config[UE_id].sr_PUCCH_ResourceIndex:n1_pucch0;

        LOG_D(PHY,"Demodulating PUCCH for ACK/NAK: n1_pucch0 %d (%d), SR_payload %d\n",n1_pucch0,eNB->scheduling_request_config[UE_id].sr_PUCCH_ResourceIndex,SR_payload);

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	metric0 = rx_pucch(eNB,
			   pucch_format1a,
			   UE_id,
			   (uint16_t)n1_pucch0,
			   0, //n2_pucch
			   do_srs, // shortened format
			   pucch_payload0,
			   frame,
			   subframe,
			   PUCCH1a_THRES);
        
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        /* cancel SR detection if reception on n1_pucch0 is better than on SR PUCCH resource index */
        if (do_SR && metric0 > metric0_SR) SR_payload = 0;

        if (do_SR && metric0 <= metric0_SR) {
          /* when transmitting ACK/NACK on SR PUCCH resource index, SR payload is always 1 */
          SR_payload = 1;

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	  metric0=rx_pucch(eNB,
			   pucch_format1a,
			   UE_id,
			   eNB->scheduling_request_config[UE_id].sr_PUCCH_ResourceIndex,
			   0, //n2_pucch
			   do_srs, // shortened format
			   pucch_payload0,
			   frame,
			   subframe,
			   PUCCH1a_THRES);
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        }

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#ifdef DEBUG_PHY_PROC
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        LOG_D(PHY,"[eNB %d][PDSCH %x] Frame %d subframe %d pucch1a (FDD) payload %d (metric %d)\n",
            eNB->Mod_id,
            eNB->dlsch[UE_id][0]->rnti,
            frame,subframe,
            pucch_payload0[0],metric0);
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#endif
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        process_HARQ_feedback(UE_id,eNB,proc,
                            0,// pusch_flag
                            pucch_payload0,
                            2,
                            SR_payload);
      } // FDD
      else {  //TDD
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        bundling_flag = eNB->pucch_config_dedicated[UE_id].tdd_AckNackFeedbackMode;
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        // fix later for 2 TB case and format1b
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        if ((fp->frame_type==FDD) ||
          (bundling_flag==bundling)    ||
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          ((fp->frame_type==TDD)&&(fp->tdd_config==1)&&((subframe!=2)&&(subframe!=7)))) {
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          format = pucch_format1a;
        } else {
          format = pucch_format1b;
        }
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        // if SR was detected, use the n1_pucch from SR
        if (SR_payload==1) {
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#ifdef DEBUG_PHY_PROC
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          LOG_D(PHY,"[eNB %d][PDSCH %x] Frame %d subframe %d Checking ACK/NAK (%d,%d,%d,%d) format %d with SR\n",eNB->Mod_id,
                eNB->dlsch[UE_id][0]->rnti,
                frame,subframe,
                n1_pucch0,n1_pucch1,n1_pucch2,n1_pucch3,format);
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#endif
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	  metric0 = rx_pucch(eNB,
			     format,
			     UE_id,
			     eNB->scheduling_request_config[UE_id].sr_PUCCH_ResourceIndex,
			     0, //n2_pucch
			     do_srs, // shortened format
			     pucch_payload0,
			     frame,
			     subframe,
			     PUCCH1a_THRES);
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        } else { //using n1_pucch0/n1_pucch1 resources
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#ifdef DEBUG_PHY_PROC
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          LOG_D(PHY,"[eNB %d][PDSCH %x] Frame %d subframe %d Checking ACK/NAK (%d,%d,%d,%d) format %d\n",eNB->Mod_id,
                eNB->dlsch[UE_id][0]->rnti,
                frame,subframe,
                n1_pucch0,n1_pucch1,n1_pucch2,n1_pucch3,format);
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#endif
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          metric0=0;
          metric1=0;

          // Check n1_pucch0 metric
          if (n1_pucch0 != -1) {
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	    metric0 = rx_pucch(eNB,
			       format,
			       UE_id,
			       (uint16_t)n1_pucch0,
			       0, // n2_pucch
			       do_srs, // shortened format
			       pucch_payload0,
			       frame,
			       subframe,
			       PUCCH1a_THRES);
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          }
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          // Check n1_pucch1 metric
          if (n1_pucch1 != -1) {
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	    metric1 = rx_pucch(eNB,
			       format,
			       UE_id,
			       (uint16_t)n1_pucch1,
			       0, //n2_pucch
			       do_srs, // shortened format
			       pucch_payload1,
			       frame,
			       subframe,
			       PUCCH1a_THRES);
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          }
        }
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        if (SR_payload == 1) {
          pucch_payload = pucch_payload0;
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          if (bundling_flag == bundling)
            pucch_sel = 2;
        } else if (bundling_flag == multiplexing) { // multiplexing + no SR
          pucch_payload = (metric1>metric0) ? pucch_payload1 : pucch_payload0;
          pucch_sel     = (metric1>metric0) ? 1 : 0;
        } else { // bundling + no SR
          if (n1_pucch1 != -1)
            pucch_payload = pucch_payload1;
          else if (n1_pucch0 != -1)
            pucch_payload = pucch_payload0;
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          pucch_sel = 2;  // indicate that this is a bundled ACK/NAK
        }
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#ifdef DEBUG_PHY_PROC
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        LOG_D(PHY,"[eNB %d][PDSCH %x] Frame %d subframe %d ACK/NAK metric 0 %d, metric 1 %d, sel %d, (%d,%d)\n",eNB->Mod_id,
              eNB->dlsch[UE_id][0]->rnti,
              frame,subframe,
              metric0,metric1,pucch_sel,pucch_payload[0],pucch_payload[1]);
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#endif
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        process_HARQ_feedback(UE_id,eNB,proc,
                              0,// pusch_flag
                              pucch_payload,
                              pucch_sel,
                              SR_payload);
      } // TDD
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    }
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    if (SR_payload == 1) {
      LOG_D(PHY,"[eNB %d][SR %x] Frame %d subframe %d Got SR for PUSCH, transmitting to MAC\n",eNB->Mod_id,
            eNB->ulsch[UE_id]->rnti,frame,subframe);
      eNB->UE_stats[UE_id].sr_received++;

      if (eNB->first_sr[UE_id] == 1) { // this is the first request for uplink after Connection Setup, so clear HARQ process 0 use for Msg4
        eNB->first_sr[UE_id] = 0;
        eNB->dlsch[UE_id][0]->harq_processes[0]->round=0;
        eNB->dlsch[UE_id][0]->harq_processes[0]->status=SCH_IDLE;
        LOG_D(PHY,"[eNB %d][SR %x] Frame %d subframe %d First SR\n",
              eNB->Mod_id,
              eNB->ulsch[UE_id]->rnti,frame,subframe);
      }

      if (eNB->mac_enabled==1) {
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	/*
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        mac_xface->SR_indication(eNB->Mod_id,
                                 eNB->CC_id,
                                 frame,
                                 eNB->dlsch[UE_id][0]->rnti,subframe);
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	*/

	// fill eNB->UL_info with SR indications
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      }
    }
  }
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}
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extern int oai_exit;

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extern void *td_thread(void*);

void init_td_thread(PHY_VARS_eNB *eNB,pthread_attr_t *attr_td) {
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  eNB_proc_t *proc = &eNB->proc;

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  proc->tdp.eNB = eNB;
  proc->instance_cnt_td         = -1;
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  pthread_mutex_init( &proc->mutex_td, NULL);
  pthread_cond_init( &proc->cond_td, NULL);
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  pthread_create(&proc->pthread_td, attr_td, td_thread, (void*)&proc->tdp);

}

extern void *te_thread(void*);

void init_te_thread(PHY_VARS_eNB *eNB,pthread_attr_t *attr_te) {

  eNB_proc_t *proc = &eNB->proc;

  proc->tep.eNB = eNB;
  proc->instance_cnt_te         = -1;
    
  pthread_mutex_init( &proc->mutex_te, NULL);
  pthread_cond_init( &proc->cond_te, NULL);

  printf("Creating te_thread\n");
  pthread_create(&proc->pthread_te, attr_te, te_thread, (void*)&proc->tep);
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}

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/*
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void phy_procedures_eNB_common_RX(PHY_VARS_eNB *eNB,eNB_rxtx_proc_t *proc){
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  //  eNB_proc_t *proc       = &eNB->proc;
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  LTE_DL_FRAME_PARMS *fp = &eNB->frame_parms;
  const int subframe     = proc->subframe_rx;
  const int frame        = proc->frame_rx;
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  int offset             = (eNB->single_thread_flag==1) ? 0 : (subframe&1);
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  VCD_SIGNAL_DUMPER_DUMP_VARIABLE_BY_NAME( VCD_SIGNAL_DUMPER_VARIABLES_FRAME_NUMBER_RX0_ENB+offset, proc->frame_rx );
  VCD_SIGNAL_DUMPER_DUMP_VARIABLE_BY_NAME( VCD_SIGNAL_DUMPER_VARIABLES_SUBFRAME_NUMBER_RX0_ENB+offset, proc->subframe_rx );
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  if ((fp->frame_type == TDD) && (subframe_select(fp,subframe)!=SF_UL)) {

    if (eNB->node_function == NGFI_RRU_IF4p5) {
      /// **** in TDD during DL send_IF4 of ULTICK to RCC **** ///
      send_IF4p5(eNB, proc->frame_rx, proc->subframe_rx, IF4p5_PULTICK, 0);
    }    
    return;
  }
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  VCD_SIGNAL_DUMPER_DUMP_FUNCTION_BY_NAME( VCD_SIGNAL_DUMPER_FUNCTIONS_PHY_PROCEDURES_ENB_RX_COMMON+offset, 1 ); 
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  start_meas(&eNB->phy_proc_rx);
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  LOG_D(PHY,"[eNB %d] Frame %d: Doing phy_procedures_eNB_common_RX(%d)\n",eNB->Mod_id,frame,subframe);
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  if (eNB->fep) eNB->fep(eNB,proc);
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  VCD_SIGNAL_DUMPER_DUMP_FUNCTION_BY_NAME( VCD_SIGNAL_DUMPER_FUNCTIONS_PHY_PROCEDURES_ENB_RX_COMMON+offset, 0 );
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}

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*/
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void fill_rx_indication(PHY_VARS_eNB *eNB,int UE_id,int frame,int subframe) {

  nfapi_rx_indication_pdu_t *pdu;

  int timing_advance_update;
  int sync_pos;

  uint32_t harq_pid = subframe2harq_pid(&eNB->frame_parms,
					frame,subframe);

  pthread_mutex_lock(&eNB->UL_INFO_mutex);
  pdu                                    = &eNB->UL_INFO.rx_ind.rx_pdu_list[eNB->UL_INFO.rx_ind.number_of_pdus];

  //  pdu->rx_ue_information.handle          = eNB->ulsch[UE_id]->handle;
  pdu->rx_ue_information.rnti            = eNB->ulsch[UE_id]->rnti;
  pdu->rx_indication_rel8.length         = eNB->ulsch[UE_id]->harq_processes[harq_pid]->TBS>>3;
  pdu->rx_indication_rel8.offset         = 0;  // filled in at the end of the UL_INFO formation
  pdu->data                              = eNB->ulsch[UE_id]->harq_processes[harq_pid]->b;  
  // estimate timing advance for MAC
  sync_pos                               = lte_est_timing_advance_pusch(eNB,UE_id);
  timing_advance_update                  = sync_pos - eNB->frame_parms.nb_prefix_samples/4; //to check
  switch (eNB->frame_parms.N_RB_DL) {
  case 6:
    pdu->rx_indication_rel8.timing_advance = timing_advance_update;  
    break;
  case 15:
    pdu->rx_indication_rel8.timing_advance = timing_advance_update/2;  
    break;
  case 25:
    pdu->rx_indication_rel8.timing_advance = timing_advance_update/4;  
    break;
  case 50:
    pdu->rx_indication_rel8.timing_advance = timing_advance_update/8;  
    break;
  case 75:
    pdu->rx_indication_rel8.timing_advance = timing_advance_update/12;  
    break;
  case 100:
    pdu->rx_indication_rel8.timing_advance = timing_advance_update/16;  
    break;
  }
  // put timing advance command in 0..63 range
  pdu->rx_indication_rel8.timing_advance += 31;
  if (pdu->rx_indication_rel8.timing_advance < 0)  pdu->rx_indication_rel8.timing_advance = 0;
  if (pdu->rx_indication_rel8.timing_advance > 63) pdu->rx_indication_rel8.timing_advance = 63;

  // estimate UL_CQI for MAC (from antenna port 0 only)
  int SNRtimes10 = dB_fixed_times10(eNB->pusch_vars[UE_id]->ulsch_power[0]) - 200;//(10*eNB->measurements.n0_power_dB[0]);

  if      (SNRtimes10 < -640) pdu->rx_indication_rel8.ul_cqi=0;
  else if (SNRtimes10 >  635) pdu->rx_indication_rel8.ul_cqi=255;
  else                        pdu->rx_indication_rel8.ul_cqi=(640+SNRtimes10)/5;

  eNB->UL_INFO.rx_ind.number_of_pdus++;
  pthread_mutex_unlock(&eNB->UL_INFO_mutex);

}

void fill_crc_indication(PHY_VARS_eNB *eNB,int UE_id,int frame,int subframe,uint8_t crc_flag) {

  pthread_mutex_lock(&eNB->UL_INFO_mutex);
  nfapi_crc_indication_pdu_t *pdu =   &eNB->UL_INFO.crc_ind.crc_pdu_list[eNB->UL_INFO.crc_ind.number_of_crcs];

  pdu->instance_length                                = 0; // don't know what to do with this
  //  pdu->rx_ue_information.handle                       = handle;
  pdu->rx_ue_information.rnti                         = eNB->ulsch[UE_id]->rnti;
  pdu->crc_indication_rel8.crc_flag                   = crc_flag;
  pthread_mutex_unlock(&eNB->UL_INFO_mutex);

  eNB->UL_INFO.crc_ind.number_of_crcs++;
  pthread_mutex_unlock(&eNB->UL_INFO_mutex);
}

void update_harq_scheduling(LTE_DL_FRAME_PARMS *fp,LTE_UL_eNB_HARQ_t *ulsch_harq,int frame,int subframe) {
  if (fp->frame_type == FDD) {
    ulsch_harq->frame    += (ulsch_harq->subframe>1) ? 1 : 0;
    ulsch_harq->subframe  = (ulsch_harq->subframe + 8)%10;
  }
  else ulsch_harq->frame++;
}


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void phy_procedures_eNB_uespec_RX(PHY_VARS_eNB *eNB,eNB_rxtx_proc_t *proc,const relaying_type_t r_type)
2461
{
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  //RX processing for ue-specific resources (i
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  UNUSED(r_type);
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  uint32_t ret=0,i,j,k;
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  uint32_t harq_pid, harq_idx, round;
  uint8_t nPRS;
  int sync_pos;
  uint16_t rnti=0;
  uint8_t access_mode;
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  LTE_DL_FRAME_PARMS *fp=&eNB->frame_parms;
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  LTE_eNB_ULSCH_t *ulsch;
  LTE_UL_eNB_HARQ_t *ulsch_harq;
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  const int subframe = proc->subframe_rx;
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  const int frame    = proc->frame_rx;
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  int offset         = eNB->CC_id;//(proc == &eNB->proc.proc_rxtx[0]) ? 0 : 1;
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  uint16_t srsPeriodicity;
  uint16_t srsOffset;
  uint16_t do_srs=0;
  uint16_t is_srs_pos=0;

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  T(T_ENB_PHY_UL_TICK, T_INT(eNB->Mod_id), T_INT(frame), T_INT(subframe));

  T(T_ENB_PHY_INPUT_SIGNAL, T_INT(eNB->Mod_id), T_INT(frame), T_INT(subframe), T_INT(0),
    T_BUFFER(&eNB->common_vars.rxdata[0][0][subframe*eNB->frame_parms.samples_per_tti],
             eNB->frame_parms.samples_per_tti * 4));
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2489
  if ((fp->frame_type == TDD) && (subframe_select(fp,subframe)!=SF_UL)) return;
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  VCD_SIGNAL_DUMPER_DUMP_FUNCTION_BY_NAME( VCD_SIGNAL_DUMPER_FUNCTIONS_PHY_PROCEDURES_ENB_RX_UESPEC+offset, 1 );
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2493
#ifdef DEBUG_PHY_PROC
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  LOG_D(PHY,"[eNB %d] Frame %d: Doing phy_procedures_eNB_uespec_RX(%d)\n",eNB->Mod_id,frame, subframe);
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#endif
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  eNB->rb_mask_ul[0]=0;
  eNB->rb_mask_ul[1]=0;
  eNB->rb_mask_ul[2]=0;
  eNB->rb_mask_ul[3]=0;
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  eNB->UL_INFO.rx_ind.number_of_pdus  = 0;
  eNB->UL_INFO.crc_ind.number_of_crcs = 0;

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  // Check for active processes in current subframe
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  harq_pid = subframe2harq_pid(fp,
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                               frame,subframe);
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  is_srs_pos = is_srs_occasion_common(fp,frame,subframe);
  
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  for (i=0; i<NUMBER_OF_UE_MAX; i++) {
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    ulsch = eNB->ulsch[i];
    ulsch_harq = ulsch->harq_processes[harq_pid];

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    // Do SRS processing 
    // check if there is SRS and we have to use shortened format
    // TODO: check for exceptions in transmission of SRS together with ACK/NACK
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    do_srs=0;
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    if (is_srs_pos && eNB->soundingrs_ul_config_dedicated[i].srsConfigDedicatedSetup ) {
      compute_srs_pos(fp->frame_type, eNB->soundingrs_ul_config_dedicated[i].srs_ConfigIndex, &srsPeriodicity, &srsOffset);
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      if (((10*frame+subframe) % srsPeriodicity) == srsOffset) {
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	do_srs = 1;
      }
    }

    if (do_srs==1) {
      if (lte_srs_channel_estimation(fp,
				     &eNB->common_vars,
				     &eNB->srs_vars[i],
				     &eNB->soundingrs_ul_config_dedicated[i],
				     subframe,
				     0/*eNB_id*/)) {
	LOG_E(PHY,"problem processing SRS\n");
      }
    }
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    // Do PUCCH processing 

    pucch_procedures(eNB,proc,i,harq_pid, do_srs);

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2544
    // check for Msg3
2545
    if (eNB->mac_enabled==1) {
2546
      //      if (eNB->UE_stats[i].mode == RA_RESPONSE) {
2547
	process_Msg3(eNB,proc,i,harq_pid);
2548
	//      }
2549
    }
2550 2551


2552 2553 2554
    eNB->pusch_stats_rb[i][(frame*10)+subframe] = -63;
    eNB->pusch_stats_round[i][(frame*10)+subframe] = 0;
    eNB->pusch_stats_mcs[i][(frame*10)+subframe] = -63;
2555

2556 2557 2558
    if ((ulsch) &&
        (eNB->ulsch[i]->rnti>0) &&
        (ulsch_harq->status = ACTIVE))
2559
      LOG_D(PHY,"Frame %d Subframe UE %d/%x active: scheduled for (%d,%d)\n",
2560 2561
	    frame,i,eNB->ulsch[i]->rnti,ulsch_harq->frame,ulsch_harq->subframe);
    if ((ulsch) &&
2562
        (eNB->ulsch[i]->rnti>0) &&
2563 2564 2565
        (ulsch_harq->status = ACTIVE) &&
        (ulsch_harq->subframe==subframe)&&
        (ulsch_harq->frame==frame)) {
2566
      // UE is has ULSCH scheduling
2567
      round = ulsch_harq->round;
2568
 
2569
      for (int rb=0;
2570
           rb<=ulsch_harq->nb_rb;
2571
	   rb++) {
2572
	int rb2 = rb+ulsch_harq->first_rb;
2573
	eNB->rb_mask_ul[rb2>>5] |= (1<<(rb2&31));
2574
      }
2575 2576


2577
      if (ulsch_harq->Msg3_flag == 1) {
2578
        LOG_D(PHY,"[eNB %d] frame %d, subframe %d: Scheduling ULSCH Reception for Msg3 in Sector %d\n",
2579
              eNB->Mod_id,
2580 2581
              frame,
              subframe,
2582
              eNB->UE_stats[i].sector);
2583 2584
	VCD_SIGNAL_DUMPER_DUMP_FUNCTION_BY_NAME(VCD_SIGNAL_DUMPER_FUNCTIONS_PHY_ENB_ULSCH_MSG3,1);
      } else {
2585

2586
        LOG_D(PHY,"[eNB %d] frame %d, subframe %d: Scheduling ULSCH Reception for UE %d Mode %s\n",
2587
              eNB->Mod_id,
2588 2589 2590
              frame,
              subframe,
              i,
2591
              mode_string[eNB->UE_stats[i].mode]);
2592
      }
2593

2594

2595
      nPRS = fp->pusch_config_common.ul_ReferenceSignalsPUSCH.nPRS[subframe<<1];
2596

2597
      ulsch->cyclicShift = (ulsch_harq->n_DMRS2 + fp->pusch_config_common.ul_ReferenceSignalsPUSCH.cyclicShift +
2598
				    nPRS)%12;
2599

2600
      if (fp->frame_type == FDD ) {
2601
        int sf = (subframe<4) ? (subframe+6) : (subframe-4);
2602

2603
        if (eNB->dlsch[i][0]->subframe_tx[sf]>0) { // we have downlink transmission
2604
          ulsch_harq->O_ACK = 1;
2605
        } else {
2606
          ulsch_harq->O_ACK = 0;
2607
        }
2608
      }
2609

2610
      LOG_D(PHY,
2611
            "[eNB %d][PUSCH %d] Frame %d Subframe %d Demodulating PUSCH: dci_alloc %d, rar_alloc %d, round %d, first_rb %d, nb_rb %d, mcs %d, TBS %d, rv %d, cyclic_shift %d (n_DMRS2 %d, cyclicShift_common %d, nprs %d), O_ACK %d \n",
2612
            eNB->Mod_id,harq_pid,frame,subframe,
2613 2614 2615 2616 2617 2618 2619 2620
            ulsch_harq->dci_alloc,
            ulsch_harq->rar_alloc,
            ulsch_harq->round,
            ulsch_harq->first_rb,
            ulsch_harq->nb_rb,
            ulsch_harq->mcs,
            ulsch_harq->TBS,
            ulsch_harq->rvidx,
2621
            eNB->ulsch[i]->cyclicShift,
2622
            ulsch_harq->n_DMRS2,
2623
            fp->pusch_config_common.ul_ReferenceSignalsPUSCH.cyclicShift,
2624
            nPRS,
2625 2626 2627 2628
            ulsch_harq->O_ACK);
      eNB->pusch_stats_rb[i][(frame*10)+subframe] = ulsch_harq->nb_rb;
      eNB->pusch_stats_round[i][(frame*10)+subframe] = ulsch_harq->round;
      eNB->pusch_stats_mcs[i][(frame*10)+subframe] = ulsch_harq->mcs;
2629
      start_meas(&eNB->ulsch_demodulation_stats);
2630

2631 2632 2633
      rx_ulsch(eNB,proc,
	       i);
      
2634

2635
      stop_meas(&eNB->ulsch_demodulation_stats);
2636

2637

2638
      start_meas(&eNB->ulsch_decoding_stats);
2639

2640 2641 2642
      ret = ulsch_decoding(eNB,proc,
			   i,
			   0, // control_only_flag
2643 2644
			   ulsch_harq->V_UL_DAI,
			   ulsch_harq->nb_rb>20 ? 1 : 0);
2645
      
2646 2647


2648
      stop_meas(&eNB->ulsch_decoding_stats);
2649

2650
      LOG_D(PHY,"[eNB %d][PUSCH %d] frame %d subframe %d RNTI %x RX power (%d,%d) RSSI (%d,%d) N0 (%d,%d) dB ACK (%d,%d), decoding iter %d\n",
2651
            eNB->Mod_id,harq_pid,
2652
            frame,subframe,
2653
            ulsch->rnti,
2654 2655 2656 2657
            dB_fixed(eNB->pusch_vars[i]->ulsch_power[0]),
            dB_fixed(eNB->pusch_vars[i]->ulsch_power[1]),
            eNB->UE_stats[i].UL_rssi[0],
            eNB->UE_stats[i].UL_rssi[1],
2658 2659 2660 2661
            20,//eNB->measurements.n0_power_dB[0],
            20,//eNB->measurements.n0_power_dB[1],
            ulsch_harq->o_ACK[0],
            ulsch_harq->o_ACK[1],
2662
            ret);
2663

2664

2665
      //compute the expected ULSCH RX power (for the stats)
2666
      eNB->ulsch[(uint32_t)i]->harq_processes[harq_pid]->delta_TF =
2667
        get_hundred_times_delta_IF_eNB(eNB,i,harq_pid, 0); // 0 means bw_factor is not considered
2668

2669
      eNB->UE_stats[i].ulsch_decoding_attempts[harq_pid][ulsch_harq->round]++;
2670 2671
#ifdef DEBUG_PHY_PROC
      LOG_D(PHY,"[eNB %d][PUSCH %d] frame %d subframe %d UE %d harq_pid %d Clearing subframe_scheduling_flag\n",
2672
            eNB->Mod_id,harq_pid,frame,subframe,i,harq_pid);
2673
#endif
2674

2675
      if (ulsch_harq->cqi_crc_status == 1) {
2676
#ifdef DEBUG_PHY_PROC
2677
        //if (((frame%10) == 0) || (frame < 50))
2678
        print_CQI(ulsch_harq->o,ulsch_harq->uci_format,0,fp->N_RB_DL);
2679
#endif
2680 2681
        extract_CQI(ulsch_harq->o,
                    ulsch_harq->uci_format,
2682
                    &eNB->UE_stats[i],
2683
                    fp->N_RB_DL,
2684
                    &rnti, &access_mode);
2685
        eNB->UE_stats[i].rank = ulsch_harq->o_RI[0];
2686

2687
      }
2688

2689
      if (ulsch_harq->Msg3_flag == 1)
2690
	VCD_SIGNAL_DUMPER_DUMP_FUNCTION_BY_NAME(VCD_SIGNAL_DUMPER_FUNCTIONS_PHY_ENB_ULSCH_MSG3,0);
2691

2692
      if (ret == (1+MAX_TURBO_ITERATIONS)) {
2693
        T(T_ENB_PHY_ULSCH_UE_NACK, T_INT(eNB->Mod_id), T_INT(frame), T_INT(subframe), T_INT(i), T_INT(ulsch->rnti),
2694
          T_INT(harq_pid));
2695

2696 2697 2698 2699
        eNB->UE_stats[i].ulsch_round_errors[harq_pid][ulsch_harq->round]++;
        ulsch_harq->phich_active = 1;
        ulsch_harq->phich_ACK = 0;
        ulsch_harq->round++;
2700

2701
	update_harq_scheduling(fp,ulsch_harq,frame,subframe);
2702

2703
	fill_crc_indication(eNB,i,frame,subframe,1); // indicate NAK to MAC
2704

2705 2706 2707 2708 2709
        LOG_D(PHY,"[eNB][PUSCH %d] Increasing to round %d\n",harq_pid,ulsch_harq->round);

        if (ulsch_harq->Msg3_flag == 1) {

          LOG_I(PHY,"[eNB %d/%d][RAPROC] frame %d, subframe %d, UE %d: Error receiving ULSCH (Msg3), round %d\n",
2710 2711
                eNB->Mod_id,
                eNB->CC_id,
2712
                frame,subframe, i,
2713 2714 2715
                ulsch_harq->round-1);

	  
2716
	  LOG_D(PHY,"[eNB %d][PUSCH %d] frame %d subframe %d RNTI %x RX power (%d,%d) RSSI (%d,%d) N0 (%d,%d) dB ACK (%d,%d), decoding iter %d\n",
2717
		eNB->Mod_id,harq_pid,
2718
		frame,subframe,
2719
		ulsch->rnti,
2720 2721 2722 2723
		dB_fixed(eNB->pusch_vars[i]->ulsch_power[0]),
		dB_fixed(eNB->pusch_vars[i]->ulsch_power[1]),
		eNB->UE_stats[i].UL_rssi[0],
		eNB->UE_stats[i].UL_rssi[1],
2724 2725
		eNB->measurements.n0_power_dB[0],
		eNB->measurements.n0_power_dB[1],
2726 2727
		ulsch_harq->o_ACK[0],
		ulsch_harq->o_ACK[1],
2728 2729 2730
		ret);
          LOG_D(PHY,"[eNB] Frame %d, Subframe %d: Msg3 in error, i = %d \n", frame,subframe,i);
        } // This is Msg3 error
2731

2732 2733
        else { //normal ULSCH
          LOG_D(PHY,"[eNB %d][PUSCH %d] frame %d subframe %d UE %d Error receiving ULSCH, round %d/%d (ACK %d,%d)\n",
2734
                eNB->Mod_id,harq_pid,
2735
                frame,subframe, i,
2736 2737 2738 2739
                ulsch_harq->round-1,
                ulsch->Mlimit,
                ulsch_harq->o_ACK[0],
                ulsch_harq->o_ACK[1]);
2740 2741 2742

#if defined(MESSAGE_CHART_GENERATOR_PHY)
          MSC_LOG_RX_DISCARDED_MESSAGE(
2743 2744 2745 2746
				       MSC_PHY_ENB,MSC_PHY_UE,
				       NULL,0,
				       "%05u:%02u ULSCH received rnti %x harq id %u round %d",
				       frame,subframe,
2747 2748
				       ulsch->rnti,harq_pid,
				       ulsch_harq->round-1
2749
				       );
2750
#endif
2751

2752
          if (ulsch_harq->round== ulsch->Mlimit) {
2753
            LOG_D(PHY,"[eNB %d][PUSCH %d] frame %d subframe %d UE %d ULSCH Mlimit %d reached\n",
2754
                  eNB->Mod_id,harq_pid,
2755
                  frame,subframe, i,
2756
                  ulsch->Mlimit);
2757
	    
2758 2759
            ulsch_harq->round=0;
            ulsch_harq->phich_active=0;
2760 2761
            eNB->UE_stats[i].ulsch_errors[harq_pid]++;
            eNB->UE_stats[i].ulsch_consecutive_errors++;
2762 2763 2764
	    
	  }
	}
2765 2766
      }  // ulsch in error
      else {
2767
	
2768

2769 2770 2771
	fill_crc_indication(eNB,i,frame,subframe,0); // indicate ACK to MAC
	fill_rx_indication(eNB,i,frame,subframe);    // indicate SDU to MAC
        T(T_ENB_PHY_ULSCH_UE_ACK, T_INT(eNB->Mod_id), T_INT(frame), T_INT(subframe), T_INT(i), T_INT(ulsch->rnti),
2772 2773
          T_INT(harq_pid));

2774
        if (ulsch_harq->Msg3_flag == 1) {
2775
	  LOG_D(PHY,"[eNB %d][PUSCH %d] Frame %d subframe %d ULSCH received, setting round to 0, PHICH ACK\n",
2776
		eNB->Mod_id,harq_pid,
2777 2778
		frame,subframe);
	  LOG_D(PHY,"[eNB %d][PUSCH %d] frame %d subframe %d RNTI %x RX power (%d,%d) RSSI (%d,%d) N0 (%d,%d) dB ACK (%d,%d), decoding iter %d\n",
2779
		eNB->Mod_id,harq_pid,
2780
		frame,subframe,
2781
		ulsch->rnti,
2782 2783 2784 2785
		dB_fixed(eNB->pusch_vars[i]->ulsch_power[0]),
		dB_fixed(eNB->pusch_vars[i]->ulsch_power[1]),
		eNB->UE_stats[i].UL_rssi[0],
		eNB->UE_stats[i].UL_rssi[1],
2786 2787
		eNB->measurements.n0_power_dB[0],
		eNB->measurements.n0_power_dB[1],
2788 2789
		ulsch_harq->o_ACK[0],
		ulsch_harq->o_ACK[1],
2790 2791 2792 2793
		ret);
	}
#if defined(MESSAGE_CHART_GENERATOR_PHY)
        MSC_LOG_RX_MESSAGE(
2794 2795 2796 2797
			   MSC_PHY_ENB,MSC_PHY_UE,
			   NULL,0,
			   "%05u:%02u ULSCH received rnti %x harq id %u",
			   frame,subframe,
2798
			   ulsch->rnti,harq_pid
2799
			   );
2800
#endif
2801
        for (j=0; j<fp->nb_antennas_rx; j++)
2802
          //this is the RSSI per RB
2803
          eNB->UE_stats[i].UL_rssi[j] =
2804
	    
2805
            dB_fixed(eNB->pusch_vars[i]->ulsch_power[j]*
2806
                     (ulsch_harq->nb_rb*12)/
2807
                     fp->ofdm_symbol_size) -
2808
            eNB->rx_total_gain_dB -
2809
            hundred_times_log10_NPRB[ulsch_harq->nb_rb-1]/100 -
2810
            get_hundred_times_delta_IF_eNB(eNB,i,harq_pid, 0)/100;
2811
	    
2812 2813 2814
        ulsch_harq->phich_active = 1;
        ulsch_harq->phich_ACK = 1;
        ulsch_harq->round = 0;
2815
        eNB->UE_stats[i].ulsch_consecutive_errors = 0;
2816

2817
        if (ulsch_harq->Msg3_flag == 1) {
2818
	  if (eNB->mac_enabled==1) {
2819

2820
	    LOG_I(PHY,"[eNB %d][RAPROC] Frame %d Terminating ra_proc for harq %d, UE %d\n",
2821
		  eNB->Mod_id,
2822
		  frame,harq_pid,i);
2823 2824 2825
	    if (eNB->mac_enabled) {
	      // Fill UL info
	    }
2826
	    // one-shot msg3 detection by MAC: empty PDU (e.g. CRNTI)
2827
	    if (ulsch_harq->Msg3_flag == 0 ) {
2828 2829
	      eNB->UE_stats[i].mode = PRACH;
	      eNB->ulsch[(uint32_t)i]->Msg3_active = 0;
2830 2831 2832
	    } // Msg3_flag == 0
	    
	  } // mac_enabled==1
2833

2834
          eNB->UE_stats[i].mode = PUSCH;
2835
          ulsch_harq->Msg3_flag = 0;
2836

2837
	  LOG_D(PHY,"[eNB %d][RAPROC] Frame %d : RX Subframe %d Setting UE %d mode to PUSCH\n",eNB->Mod_id,frame,subframe,i);
2838

2839
          for (k=0; k<8; k++) { //harq_processes
2840 2841 2842 2843
            for (j=0; j<eNB->dlsch[i][0]->Mlimit; j++) {
              eNB->UE_stats[i].dlsch_NAK[k][j]=0;
              eNB->UE_stats[i].dlsch_ACK[k][j]=0;
              eNB->UE_stats[i].dlsch_trials[k][j]=0;
2844
            }
2845

2846 2847 2848
            eNB->UE_stats[i].dlsch_l2_errors[k]=0;
            eNB->UE_stats[i].ulsch_errors[k]=0;
            eNB->UE_stats[i].ulsch_consecutive_errors=0;
2849

2850
            for (j=0; j<ulsch->Mlimit; j++) {
2851 2852 2853 2854
              eNB->UE_stats[i].ulsch_decoding_attempts[k][j]=0;
              eNB->UE_stats[i].ulsch_decoding_attempts_last[k][j]=0;
              eNB->UE_stats[i].ulsch_round_errors[k][j]=0;
              eNB->UE_stats[i].ulsch_round_fer[k][j]=0;
2855
            }
2856 2857
          }

2858 2859 2860
          eNB->UE_stats[i].dlsch_sliding_cnt=0;
          eNB->UE_stats[i].dlsch_NAK_round0=0;
          eNB->UE_stats[i].dlsch_mcs_offset=0;
2861 2862 2863
        } // Msg3_flag==1
	else {  // Msg3_flag == 0

2864
#ifdef DEBUG_PHY_PROC
2865 2866
#ifdef DEBUG_ULSCH
          LOG_D(PHY,"[eNB] Frame %d, Subframe %d : ULSCH SDU (RX harq_pid %d) %d bytes:",frame,subframe,
2867
                harq_pid,ulsch_harq->TBS>>3);
2868

2869
          for (j=0; j<ulsch_harq->TBS>>3; j++)
2870
            LOG_T(PHY,"%x.",eNB->ulsch[i]->harq_processes[harq_pid]->b[j]);
2871 2872 2873

          LOG_T(PHY,"\n");
#endif
2874
#endif
2875

2876
        } // Msg3_flag == 0
2877

2878
        
2879

2880 2881
#ifdef DEBUG_PHY_PROC
        LOG_D(PHY,"[eNB %d] frame %d, subframe %d: user %d: timing advance = %d\n",
2882
              eNB->Mod_id,
2883 2884
              frame, subframe,
              i,
2885
              eNB->UE_stats[i].timing_advance_update);
2886
#endif
2887 2888


2889 2890 2891
      }  // ulsch not in error

      // process HARQ feedback
2892
#ifdef DEBUG_PHY_PROC
2893
      LOG_D(PHY,"[eNB %d][PDSCH %x] Frame %d subframe %d, Processing HARQ feedback for UE %d (after PUSCH)\n",eNB->Mod_id,
2894
            eNB->dlsch[i][0]->rnti,
2895 2896
            frame,subframe,
            i);
2897
#endif
2898
      process_HARQ_feedback(i,
2899
                            eNB,proc,
2900 2901 2902 2903 2904 2905 2906
                            1, // pusch_flag
                            0,
                            0,
                            0);

#ifdef DEBUG_PHY_PROC
      LOG_D(PHY,"[eNB %d] Frame %d subframe %d, sect %d: received ULSCH harq_pid %d for UE %d, ret = %d, CQI CRC Status %d, ACK %d,%d, ulsch_errors %d/%d\n",
2907
            eNB->Mod_id,frame,subframe,
2908
            eNB->UE_stats[i].sector,
2909 2910 2911
            harq_pid,
            i,
            ret,
2912 2913 2914 2915 2916
            eNB->ulsch[i]->harq_processes[harq_pid]->cqi_crc_status,
            eNB->ulsch[i]->harq_processes[harq_pid]->o_ACK[0],
            eNB->ulsch[i]->harq_processes[harq_pid]->o_ACK[1],
            eNB->UE_stats[i].ulsch_errors[harq_pid],
            eNB->UE_stats[i].ulsch_decoding_attempts[harq_pid][0]);
2917 2918 2919 2920
#endif
      
      // dump stats to VCD
      if (i==0) {
2921 2922 2923
	VCD_SIGNAL_DUMPER_DUMP_VARIABLE_BY_NAME(VCD_SIGNAL_DUMPER_VARIABLES_UE0_MCS0+harq_pid,eNB->pusch_stats_mcs[0][(frame*10)+subframe]);
	VCD_SIGNAL_DUMPER_DUMP_VARIABLE_BY_NAME(VCD_SIGNAL_DUMPER_VARIABLES_UE0_RB0+harq_pid,eNB->pusch_stats_rb[0][(frame*10)+subframe]);
	VCD_SIGNAL_DUMPER_DUMP_VARIABLE_BY_NAME(VCD_SIGNAL_DUMPER_VARIABLES_UE0_ROUND0+harq_pid,eNB->pusch_stats_round[0][(frame*10)+subframe]);
2924
	VCD_SIGNAL_DUMPER_DUMP_VARIABLE_BY_NAME(VCD_SIGNAL_DUMPER_VARIABLES_UE0_RSSI0+harq_pid,dB_fixed(eNB->pusch_vars[0]->ulsch_power[0]));
2925 2926
	VCD_SIGNAL_DUMPER_DUMP_VARIABLE_BY_NAME(VCD_SIGNAL_DUMPER_VARIABLES_UE0_RES0+harq_pid,ret);
	VCD_SIGNAL_DUMPER_DUMP_VARIABLE_BY_NAME(VCD_SIGNAL_DUMPER_VARIABLES_UE0_SFN0+harq_pid,(frame*10)+subframe);
Lionel Gauthier's avatar
Lionel Gauthier committed
2927
      }
2928
    } // ulsch[0] && ulsch[0]->rnti>0 && ulsch[0]->subframe_scheduling_flag == 1
2929 2930


2931
    // update ULSCH statistics for tracing
2932
    if ((frame % 100 == 0) && (subframe == 4)) {
2933
      for (harq_idx=0; harq_idx<8; harq_idx++) {
2934
        for (round=0; round<ulsch->Mlimit; round++) {
2935 2936 2937 2938 2939 2940 2941
          if ((eNB->UE_stats[i].ulsch_decoding_attempts[harq_idx][round] -
               eNB->UE_stats[i].ulsch_decoding_attempts_last[harq_idx][round]) != 0) {
            eNB->UE_stats[i].ulsch_round_fer[harq_idx][round] =
              (100*(eNB->UE_stats[i].ulsch_round_errors[harq_idx][round] -
                    eNB->UE_stats[i].ulsch_round_errors_last[harq_idx][round]))/
              (eNB->UE_stats[i].ulsch_decoding_attempts[harq_idx][round] -
               eNB->UE_stats[i].ulsch_decoding_attempts_last[harq_idx][round]);
2942
          } else {
2943
            eNB->UE_stats[i].ulsch_round_fer[harq_idx][round] = 0;
2944 2945
          }

2946 2947 2948 2949
          eNB->UE_stats[i].ulsch_decoding_attempts_last[harq_idx][round] =
            eNB->UE_stats[i].ulsch_decoding_attempts[harq_idx][round];
          eNB->UE_stats[i].ulsch_round_errors_last[harq_idx][round] =
            eNB->UE_stats[i].ulsch_round_errors[harq_idx][round];
2950
        }
2951 2952
      }
    }
2953

Florian Kaltenberger's avatar
Florian Kaltenberger committed
2954
    if ((frame % 100 == 0) && (subframe==4)) {
2955
      eNB->UE_stats[i].dlsch_bitrate = (eNB->UE_stats[i].total_TBS -
2956
					eNB->UE_stats[i].total_TBS_last);
2957

2958
      eNB->UE_stats[i].total_TBS_last = eNB->UE_stats[i].total_TBS;
2959
    }
2960

2961 2962
  } // loop i=0 ... NUMBER_OF_UE_MAX-1

2963 2964 2965 2966 2967 2968
  lte_eNB_I0_measurements(eNB,
			  subframe,
			  0,
			  eNB->first_run_I0_measurements);
  eNB->first_run_I0_measurements = 0;
  
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2971
  //}
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#if defined(FLEXRAN_AGENT_SB_IF)
#ifndef DISABLE_SF_TRIGGER
  //Send subframe trigger to the controller
  if (mac_agent_registered[eNB->Mod_id]) {
    agent_mac_xface[eNB->Mod_id]->flexran_agent_send_sf_trigger(eNB->Mod_id);
  }
#endif
#endif

Raymond Knopp's avatar
Raymond Knopp committed
2982
  VCD_SIGNAL_DUMPER_DUMP_FUNCTION_BY_NAME( VCD_SIGNAL_DUMPER_FUNCTIONS_PHY_PROCEDURES_ENB_RX_UESPEC+offset, 0 );
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  stop_meas(&eNB->phy_proc_rx);
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}

#undef DEBUG_PHY_PROC

Cedric Roux's avatar
Cedric Roux committed
2990
#if defined(Rel10) || defined(Rel14)
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int phy_procedures_RN_eNB_TX(unsigned char last_slot, unsigned char next_slot, relaying_type_t r_type)
{

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  int do_proc=0;// do nothing
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  switch(r_type) {
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  case no_relay:
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    do_proc= no_relay; // perform the normal eNB operation
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    break;
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  case multicast_relay:
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    if (((next_slot >>1) < 6) || ((next_slot >>1) > 8))
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      do_proc = 0; // do nothing
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    else // SF#6, SF#7 and SF#8
      do_proc = multicast_relay; // do PHY procedures eNB TX

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    break;
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  default: // should'not be here
    LOG_W(PHY,"Not supported relay type %d, do nothing\n", r_type);
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    do_proc=0;
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    break;
  }
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  return do_proc;
}
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#endif