Merge remote-tracking branch 'origin/develop' into x2

 Conflicts:
	openair2/LAYER2/MAC/config.c
	openair2/LAYER2/MAC/eNB_scheduler_ulsch.c
	openair2/RRC/LTE/MESSAGES/asn1_msg.c
	openair2/RRC/LTE/rrc_defs.h

cmake_targets/CMakeLists.txt

@@ -1372,6 +1372,8 @@ set (MAC_SRC_UE
 set (ENB_APP_SRC
   ${OPENAIR2_DIR}/ENB_APP/enb_app.c
   ${OPENAIR2_DIR}/ENB_APP/enb_config.c
+  ${OPENAIR2_DIR}/ENB_APP/enb_config_SL.c
+  ${OPENAIR2_DIR}/ENB_APP/enb_config_eMTC.c
   ${OPENAIR2_DIR}/ENB_APP/RRC_config_tools.c
   )
 

openair1/PHY/CODING/crc_byte.c

@@ -32,21 +32,6 @@
 
 #include "PHY/types.h"
 
-// For initialization && verification purposes, bit by bit implementation with any polynomial
-// The first bit is in the MSB of each byte
-
-// Reference 38.212 V15.1.1 Section 5.1 (36-212 v8.6.0 , pp 8-9)
-// The highest degree is set by default
-/** 1000 0110 0100 1100 1111 1011  D^24 + D^23 + D^18 + D^17 + D^14 + D^11 + D^10 + D^7 + D^6 + D^5 + D^4 + D^3 + D + 1 */
-static const uint32_t poly24a = 0x864cfb00;
-/** 1000 0000 0000 0000 0110 0011  D^24 + D^23 + D^6 + D^5 + D + 1 */
-static const uint32_t poly24b = 0x80006300;
-/** 0001 0000 0010 0001            D^16 + D^12 + D^5 + 1 */
-static const uint32_t poly16  = 0x10210000;
-/** 1000 0000 1111                 D^12 + D^11 + D^3 + D^2 + D + 1 */
-static const uint32_t poly12  = 0x80F00000;
-/** 1001 1011                      D^8  + D^7  + D^4 + D^3 + D + 1 */
-static const uint32_t poly8   = 0x9B000000;
 
 // The following arrays are generated with the function 'crcTableInit'
 /** Encoding table for CRC 24A */
@@ -96,6 +81,24 @@ uint32_t crcbit (uint8_t * inputptr, int32_t octetlen, uint32_t poly)
 // CRC table initialization
 
 /*
+  RK: Note that this should be brought back and use crcTableInit instead of static declaration
+      Commented out to remove warning
+  // For initialization && verification purposes, bit by bit implementation with any polynomial
+  // The first bit is in the MSB of each byte
+
+ // Reference 38.212 V15.1.1 Section 5.1 (36-212 v8.6.0 , pp 8-9)
+// The highest degree is set by default
+// 1000 0110 0100 1100 1111 1011  D^24 + D^23 + D^18 + D^17 + D^14 + D^11 + D^10 + D^7 + D^6 + D^5 + D^4 + D^3 + D + 1 
+static const uint32_t poly24a = 0x864cfb00;
+// 1000 0000 0000 0000 0110 0011  D^24 + D^23 + D^6 + D^5 + D + 1 
+static const uint32_t poly24b = 0x80006300;
+// 0001 0000 0010 0001            D^16 + D^12 + D^5 + 1 
+static const uint32_t poly16  = 0x10210000;
+// 1000 0000 1111                 D^12 + D^11 + D^3 + D^2 + D + 1 
+static const uint32_t poly12  = 0x80F00000;
+// 1001 1011                      D^8  + D^7  + D^4 + D^3 + D + 1 
+static const uint32_t poly8   = 0x9B000000;
+ 
 void crcTableInit (void)
 {
     uint8_t c = 0;

openair1/PHY/CODING/lte_rate_matching.c

@@ -492,7 +492,7 @@ uint32_t lte_rate_matching_turbo(uint32_t RTC,
   Gp = G/Nl/Qm;
   GpmodC = Gp%C;
 #ifdef RM_DEBUG
-  printf("lte_rate_matching_turbo: Ncb %d, Kw %d, Nir/C %d, rvidx %d, G %d, Qm %d, Nl%d, r %d\n",Ncb,3*(RTC<<5),Nir/C,rvidx, G, Qm,Nl,r);
+  LOG_D(PHY,"lte_rate_matching_turbo: Ncb %d, Kw %d, Nir/C %d, rvidx %d, G %d, Qm %d, Nl%d, r %d\n",Ncb,3*(RTC<<5),Nir/C,rvidx, G, Qm,Nl,r);
 #endif
 
   if (r < (C-(GpmodC)))

openair1/PHY/LTE_ESTIMATION/lte_ul_channel_estimation.c

@@ -46,12 +46,12 @@ int32_t lte_ul_channel_estimation(PHY_VARS_eNB *eNB,
   int32_t **ul_ch_estimates_time=  pusch_vars->drs_ch_estimates_time;
   int32_t **rxdataF_ext=  pusch_vars->rxdataF_ext;
   int subframe = proc->subframe_rx;
-  uint8_t harq_pid = subframe2harq_pid(frame_parms,proc->frame_rx,subframe);
+  uint8_t harq_pid; 
   int16_t delta_phase = 0;
   int16_t *ru1 = ru_90;
   int16_t *ru2 = ru_90;
   int16_t current_phase1,current_phase2;
-  uint16_t N_rb_alloc = eNB->ulsch[UE_id]->harq_processes[harq_pid]->nb_rb;
+
   uint16_t aa,Msc_RS,Msc_RS_idx;
   uint16_t * Msc_idx_ptr;
   int k,pilot_pos1 = 3 - frame_parms->Ncp, pilot_pos2 = 10 - 2*frame_parms->Ncp;
@@ -65,7 +65,7 @@ int32_t lte_ul_channel_estimation(PHY_VARS_eNB *eNB,
   uint32_t alpha_ind;
   uint32_t u=frame_parms->pusch_config_common.ul_ReferenceSignalsPUSCH.grouphop[Ns+(subframe<<1)];
   uint32_t v=frame_parms->pusch_config_common.ul_ReferenceSignalsPUSCH.seqhop[Ns+(subframe<<1)];
-  int32_t tmp_estimates[N_rb_alloc*12] __attribute__((aligned(16)));
+
 
   int symbol_offset,i;
 
@@ -83,7 +83,19 @@ int32_t lte_ul_channel_estimation(PHY_VARS_eNB *eNB,
   int32x4_t mmtmp0,mmtmp1,mmtmp_re,mmtmp_im;
 #endif
 
-int32_t temp_in_ifft_0[2048*2] __attribute__((aligned(32)));
+  int32_t temp_in_ifft_0[2048*2] __attribute__((aligned(32)));
+
+
+#ifdef Rel14
+  if (eNB->ulsch[UE_id]->ue_type > 0) harq_pid = 0;
+  else
+#endif
+    {
+      harq_pid = subframe2harq_pid(frame_parms,proc->frame_rx,subframe);
+    }
+
+  uint16_t N_rb_alloc = eNB->ulsch[UE_id]->harq_processes[harq_pid]->nb_rb;
+  int32_t tmp_estimates[N_rb_alloc*12] __attribute__((aligned(16)));
 
   Msc_RS = N_rb_alloc*12;
 

openair1/PHY/LTE_TRANSPORT/dci.c

@@ -98,43 +98,25 @@ void dci_encoding(uint8_t *a,
 #endif
   RCC = sub_block_interleaving_cc(D,d+96,w);
 
-#ifdef DEBUG_DCI_ENCODING
-  printf("Doing DCI rate matching for %d channel bits, RCC %d, e %p\n",E,RCC,e);
-#endif
+  //#ifdef DEBUG_DCI_ENCODING
+  if (E>1000) printf("Doing DCI rate matching for %d channel bits, RCC %d, e %p\n",E,RCC,e);
+  //#endif
   lte_rate_matching_cc(RCC,E,w,e);
 
 
+
 }
 
 
 uint8_t *generate_dci0(uint8_t *dci,
                        uint8_t *e,
                        uint8_t DCI_LENGTH,
-                       uint8_t aggregation_level,
+		       uint16_t coded_bits,
                        uint16_t rnti)
 {
 
-  uint16_t coded_bits;
   uint8_t dci_flip[8];
 
-  AssertFatal((aggregation_level==1) ||
-	      (aggregation_level==2) ||
-	      (aggregation_level==4) ||
-	      (aggregation_level==8)
-#if (LTE_RRC_VERSION >= MAKE_VERSION(14, 0, 0)) // Added for EPDCCH/MPDCCH
-	      ||
-	      (aggregation_level==16) ||
-	      (aggregation_level==24) ||
-	      (aggregation_level==32)
-#endif
-	      ,
-	      "generate_dci FATAL, illegal aggregation_level %d\n",aggregation_level);
-
-
-  coded_bits = 72 * aggregation_level;
-
-
-
   #ifdef DEBUG_DCI_ENCODING
   for (int i=0;i<1+((DCI_LENGTH+16)/8);i++)
     printf("i %d : %x\n",i,dci[i]);
@@ -387,7 +369,7 @@ uint8_t generate_dci_top(uint8_t num_pdcch_symbols,
           e_ptr = generate_dci0(dci_alloc[i].dci_pdu,
                                 e+(72*dci_alloc[i].firstCCE),
                                 dci_alloc[i].dci_length,
-                                dci_alloc[i].L,
+                                72*dci_alloc[i].L,
                                 dci_alloc[i].rnti);
         }
       }

openair1/PHY/LTE_TRANSPORT/dci_tools_common.c

@@ -283,29 +283,33 @@ uint16_t get_nCCE_mac(uint8_t Mod_id,uint8_t CC_id,int num_pdcch_symbols,int sub
 }
 
 
-void conv_eMTC_rballoc(uint16_t resource_block_coding,
-		       uint32_t N_RB_DL,
-		       uint32_t *rb_alloc) {
-
-
-  int narrowband = resource_block_coding>>5;
-  int RIV        = resource_block_coding&31;
-  int N_NB_DL    = N_RB_DL/6;
-  int i0         = (N_RB_DL>>1) - (3*N_NB_DL);
-  int first_rb   = (6*narrowband)+i0;
-  int alloc      = localRIV2alloc_LUT6[RIV];
-  int ind        = first_rb>>5;
-  int ind_mod    = first_rb&31;
-
-  if (((N_RB_DL&1) > 0) && (narrowband>=(N_NB_DL>>1))) first_rb++;
-  rb_alloc[0]                        = 0;
-  rb_alloc[1]                        = 0;
-  rb_alloc[2]                        = 0;
-  rb_alloc[3]                        = 0;
-  rb_alloc[ind]                      = alloc<<ind_mod;
-  if (ind_mod > 26)  rb_alloc[ind+1] = alloc>>(6-(ind_mod-26));
+void conv_eMTC_rballoc (uint16_t resource_block_coding, uint32_t N_RB_DL, uint32_t * rb_alloc)
+{
+
+
+  int             RIV = resource_block_coding&31;
+  int             narrowband = resource_block_coding>>5;
+  int             N_NB_DL = N_RB_DL / 6;
+  int             i0 = (N_RB_DL >> 1) - (3 * N_NB_DL);
+  int             first_rb = (6 * narrowband) + i0;
+  int             alloc = localRIV2alloc_LUT6[RIV];
+  int             ind = first_rb >> 5;
+  int             ind_mod = first_rb & 31;
+
+  AssertFatal(RIV<32,"RIV is %d > 31\n",RIV);
+
+  if (((N_RB_DL & 1) > 0) && (narrowband >= (N_NB_DL >> 1)))
+    first_rb++;
+  rb_alloc[0] = 0;
+  rb_alloc[1] = 0;
+  rb_alloc[2] = 0;
+  rb_alloc[3] = 0;
+  rb_alloc[ind] = alloc << ind_mod;
+  if (ind_mod > 26)
+    rb_alloc[ind + 1] = alloc >> (6 - (ind_mod - 26));
 }
 
+
 void conv_rballoc(uint8_t ra_header,uint32_t rb_alloc,uint32_t N_RB_DL,uint32_t *rb_alloc2)
 {
 

openair1/PHY/LTE_TRANSPORT/dlsch_coding.c

@@ -615,6 +615,7 @@ int dlsch_encoding_all(PHY_VARS_eNB *eNB,
 		}
 	}
 
+
     if(get_thread_worker_conf() == WORKER_ENABLE)
     {
       if(C >= 8)//one main three worker

openair1/PHY/LTE_TRANSPORT/dlsch_scrambling.c

@@ -52,7 +52,6 @@ void dlsch_scrambling(LTE_DL_FRAME_PARMS *frame_parms,
 {
 
   int n;
-
   //  uint8_t reset;
   uint32_t x1, x2, s=0;
   uint8_t *dlsch_e=dlsch->harq_processes[harq_pid]->e;

openair1/PHY/LTE_TRANSPORT/if4_tools.c

@@ -150,6 +150,7 @@ void send_IF4p5(RU_t *ru, int frame, int subframe, uint16_t packet_type) {
 
 	for (element_id=0; element_id<db_halflength; element_id+=8) {
 	  i = (uint16_t*) &rx0[element_id];
+
           d = (uint16_t*) &data_block[element_id];
           d[0] = ((uint16_t) lin2alaw_if4p5[i[0]])  | ((uint16_t)(lin2alaw_if4p5[i[1]]<<8));
           d[1] = ((uint16_t) lin2alaw_if4p5[i[2]])  | ((uint16_t)(lin2alaw_if4p5[i[3]]<<8));

openair1/PHY/LTE_TRANSPORT/mdci.h

@@ -59,7 +59,9 @@ struct DCI6_0A_5MHz {
   /// Modulation and Coding Scheme and Redundancy Version
   uint32_t mcs:4;
   /// RB Assignment (ceil(log2(floor(N_RB_UL/6))) + 5 bits)
-  uint32_t rballoc:7;
+  uint32_t rballoc:5;
+  /// narrowband index log2(floor(N_RB_DL/6))) bits
+  uint32_t narrowband:2;
   /// Hopping flag
   uint32_t hopping:1;
   /// type = 0 => DCI Format 0, type = 1 => DCI Format 1A
@@ -92,7 +94,9 @@ struct DCI6_1A_5MHz {
   /// Modulation and Coding Scheme and Redundancy Version
   uint32_t mcs:4;
   /// Resource block assignment (assignment flag = 0 for 5 MHz, ceil(log2(floor(N_RB_DL/6)))+5)
-  uint32_t rballoc:7;
+  uint32_t rballoc:5;
+  /// narrowband index log2(floor(N_RB_DL/6))) bits
+  uint32_t narrowband:2;
   /// Frequency hopping flag
   uint32_t hopping:1;
   /// 0/1A differentiator
@@ -125,7 +129,9 @@ struct DCI6_0A_10MHz {
   /// Modulation and Coding Scheme and Redundancy Version
   uint32_t mcs:4;
   /// RB Assignment (ceil(log2(floor(N_RB_UL/6))) + 5 bits)
-  uint32_t rballoc:8;
+  uint32_t rballoc:5;
+  /// narrowband index log2(floor(N_RB_DL/6))) bits
+  uint32_t narrowband:3;
   /// Hopping flag
   uint32_t hopping:1;
   /// type = 0 => DCI Format 0, type = 1 => DCI Format 1A
@@ -138,7 +144,7 @@ typedef struct DCI6_0A_10MHz DCI6_0A_10MHz_t;
 /// basic DCI Format Type 6-1A (10 MHz, FDD primary carrier,  24 bits, 5 bit format, TM!=9,TM!=6, no scheduling enhancement)
 struct DCI6_1A_10MHz {
   /// padding to fill 32-bit word
-  uint32_t padding:4;
+  uint32_t padding:3;
   /// DCI subframe repetition number 
   uint32_t dci_rep:2;
   /// HARQ-ACK resource offset
@@ -157,8 +163,10 @@ struct DCI6_1A_10MHz {
   uint32_t rep:2;
   /// Modulation and Coding Scheme and Redundancy Version
   uint32_t mcs:4;
-  /// Resource block assignment (assignment flag = 0 for 10 MHz, ceil(log2(floor(N_RB_DL/6)))+5)
-  uint32_t rballoc:8;
+  /// Resource block assignment
+  uint32_t rballoc:5;
+  /// narrowband index log2(floor(N_RB_DL/6))) bits
+  uint32_t narrowband:3;
   /// Frequency hopping flag
   uint32_t hopping:1;
   /// 0/1A differentiator
@@ -191,7 +199,9 @@ struct DCI6_0A_20MHz {
   /// Modulation and Coding Scheme and Redundancy Version
   uint32_t mcs:4;
   /// RB Assignment (ceil(log2(floor(N_RB_UL/6))) + 5 bits)
-  uint32_t rballoc:9;
+  uint32_t rballoc:5;
+  /// narrowband index log2(floor(N_RB_DL/6))) bits
+  uint32_t narrowband:4;
   /// Hopping flag
   uint32_t hopping:1;
   /// type = 0 => DCI Format 0, type = 1 => DCI Format 1A
@@ -224,7 +234,9 @@ struct DCI6_1A_20MHz {
   /// Modulation and Coding Scheme and Redundancy Version
   uint32_t mcs:4;
   /// Resource block assignment (assignment flag = 0 for 20 MHz, ceil(log2(floor(N_RB_DL/6)))+5)
-  uint32_t rballoc:9;
+  uint32_t rballoc:5;
+  /// narrowband index log2(floor(N_RB_DL/6))) bits
+  uint32_t narrowband:4;
   /// Frequency hopping flag
   uint32_t hopping:1;
   /// 0/1A differentiator

openair1/PHY/LTE_TRANSPORT/prach.c

@@ -34,6 +34,7 @@
 #include "PHY/phy_extern.h"
 //#include "prach.h"
 #include "PHY/LTE_TRANSPORT/if4_tools.h"
+
 #include "SCHED/sched_eNB.h"
 #include "common/utils/LOG/vcd_signal_dumper.h"
 #include "prach_extern.h"

openair1/PHY/LTE_TRANSPORT/pucch.c

@@ -718,7 +718,11 @@ uint32_t rx_pucch(PHY_VARS_eNB *eNB,
 		  uint8_t *payload,
 		  int     frame,
 		  uint8_t subframe,
-		  uint8_t pucch1_thres)
+		  uint8_t pucch1_thres
+#ifdef Rel14
+		  ,uint8_t br_flag
+#endif
+		  )
 {
 
 
@@ -727,7 +731,8 @@ uint32_t rx_pucch(PHY_VARS_eNB *eNB,
   LTE_DL_FRAME_PARMS *frame_parms                    = &eNB->frame_parms;
   //  PUCCH_CONFIG_DEDICATED *pucch_config_dedicated = &eNB->pucch_config_dedicated[UE_id];
 
-  int8_t sigma2_dB                                   = 20;//eNB->measurements.n0_subband_power_tot_dB[0]-10;
+  int8_t sigma2_dB                                   = max(eNB->measurements.n0_subband_power_tot_dB[0],
+                                                           eNB->measurements.n0_subband_power_tot_dB[eNB->frame_parms.N_RB_UL-1]);
 
   uint32_t u,v,n,aa;
   uint32_t z[12*14];
@@ -984,14 +989,25 @@ uint32_t rx_pucch(PHY_VARS_eNB *eNB,
 
     //for (j=0,l=0;l<(nsymb-1);l++) {
     for (j=0,l=0; l<nsymb; l++) {
-      if ((l<(nsymb>>1)) && ((m&1) == 0))
-        re_offset = (m*6) + frame_parms->first_carrier_offset;
-      else if ((l<(nsymb>>1)) && ((m&1) == 1))
-        re_offset = frame_parms->first_carrier_offset + (frame_parms->N_RB_DL - (m>>1) - 1)*12;
-      else if ((m&1) == 0)
-        re_offset = frame_parms->first_carrier_offset + (frame_parms->N_RB_DL - (m>>1) - 1)*12;
+#ifdef Rel14
+      if (br_flag > 0 ) {
+        if ((m&1) == 0)
+          re_offset = (m*6) + frame_parms->first_carrier_offset;
+	else
+	  re_offset = frame_parms->first_carrier_offset + (frame_parms->N_RB_DL - (m>>1) - 1)*12;
+      }
       else
-        re_offset = ((m-1)*6) + frame_parms->first_carrier_offset;
+#endif
+      {
+        if ((l<(nsymb>>1)) && ((m&1) == 0))
+          re_offset = (m*6) + frame_parms->first_carrier_offset;
+        else if ((l<(nsymb>>1)) && ((m&1) == 1))
+          re_offset = frame_parms->first_carrier_offset + (frame_parms->N_RB_DL - (m>>1) - 1)*12;
+        else if ((m&1) == 0)
+          re_offset = frame_parms->first_carrier_offset + (frame_parms->N_RB_DL - (m>>1) - 1)*12;
+        else
+          re_offset = ((m-1)*6) + frame_parms->first_carrier_offset;
+      }
 
       if (re_offset > frame_parms->ofdm_symbol_size)
         re_offset -= (frame_parms->ofdm_symbol_size);
@@ -1302,7 +1318,7 @@ uint32_t rx_pucch(PHY_VARS_eNB *eNB,
 #endif
 	  }
 	  
-      
+	  
 
 #ifdef DEBUG_PUCCH_RX
           printf("[eNB] PUCCH subframe %d chest1[%d][%d] => (%d,%d)\n",subframe,aa,re,

openair1/PHY/LTE_TRANSPORT/transport_eNB.h

@@ -50,6 +50,7 @@
 
 
 
+
 typedef struct {
   /// Status Flag indicating for this DLSCH (idle,active,disabled)
   SCH_status_t status;
@@ -443,6 +444,10 @@ typedef struct {
 } LTE_eNB_UE_stats;
 
 typedef struct {
+#if (LTE_RRC_VERSION >= MAKE_VERSION(14, 0, 0))
+  /// UE type (normal, CEModeA, CEModeB)
+  uint8_t ue_type;
+#endif
   /// HARQ process mask, indicates which processes are currently active
   uint16_t harq_mask;
   /// Pointers to 8 HARQ processes for the ULSCH

openair1/PHY/impl_defs_lte.h

@@ -68,4 +68,5 @@ typedef struct {
   int32_t **tdd_calib_coeffs;
 } RU_COMMON;
 
+
 #endif