Commit 3d60e953 authored by Remi Hardy's avatar Remi Hardy

Merge branch 'integration_2020_wk45_2' into 'develop'

Integration 2020 wk45 (2) comprising:

MR937:Nr dl sched fixes  
-restore old phytest scheduler behavior
-correct TA scheduling
-correct SSB
-shorten interface of `nr_fill_nfapi_dl_pdu()`
-Track RB allocation on symbol basis (bitmap)
-add a `remove_nr_ue_list()`, could be used instead of MR !934

MR910:5G SA NAS messages 
- 5G SA nass messages and a simple unitary test code
 
MR927:Nr rrc configuration fr2
- introduces some bug fixes for FR2 that might also have an impact on FR1.
parents 7f70174c 3917b1ae
dev 1 256_QAM_demod 512-dataplane-bug-in-l2nfapi_nos1 FR2_NSA Fix_SA_SIB1 NR-PHY-MAC-IF-multi-UE NRPRACH_highSpeed_saankhya NRUE_usedlschparallel NR_10MHz NR_2port_CSIRS NR_CSIRS_tomerge NR_DLUL_PF NR_DLUL_PF_4UL NR_DLUL_PF_rebased NR_DL_MIMO NR_F1C_F1U_extensions NR_FAPI_beamindex_SSB_RO NR_FAPI_beamindex_SSB_RO_SEMPROJ NR_FDD_FIX NR_FR2_RA NR_FR2_RRC_SSB NR_FR2_initsync_fixes NR_MAC_Multi_Rach_GlobalEdge NR_MAC_Multi_Rach_GlobalEdge-old NR_MAC_SSB NR_MAC_TCI_UCI_GlobalEdge NR_MCS_BLER NR_PUCCH_MultiUE NR_RA_cleanup NR_SA_F1AP_5GRECORDS NR_SA_F1AP_5GRECORDS-USIM NR_SA_F1AP_5GRECORDS-wf-0623 NR_SA_F1AP_5GRECORDS_lts NR_SA_F1AP_RFSIMULATOR NR_SA_F1AP_RFSIMULATOR2 NR_SA_F1AP_RFSIMULATOR2_SRB NR_SA_F1AP_RFSIMULATOR3 NR_SA_F1AP_RFSIMULATOR3_tmp NR_SA_F1AP_RFSIMULATOR3_wf NR_SA_F1AP_RFSIMULATOR_w5GCN NR_SA_F1AP_dev NR_SA_NGAP_RRC_wk42 NR_SA_itti_sim_wk48 NR_SA_itti_sim_wk48_hs NR_SA_itti_sim_wk48_hs1 NR_SA_w5GCN_new_gtpu NR_SCHED_HARQ NR_SCHED_PDCCH_PUCCH_HARQ NR_SCHED_PDCCH_PUCCH_HARQ_rebased NR_SCHED_fixes NR_SRB_Config NR_UE_CONFIG_REQ_FIXES NR_UE_PUCCH_bugfixes NR_UE_SA NR_UE_dlsch_bugfix NR_UE_enable_parallelization NR_UE_rework_test NR_UE_reworking_UCI_procedures NR_UE_stability_fixes NR_UL_SCFDMA_100MHz NR_UL_scheduler NR_UL_scheduler_rebased NR_Wireshark NR_beam_simulation NR_cleanup_PUCCH_resources NR_gNB_initial_MIB_fix NR_mac_uci_functions_rework NR_multiplexing_HARQ_CSI_PUCCH NR_phytest_bugfixes NR_reworking_UL_antennaports NR_scheduling_CSIRS NR_scheduling_request NR_scheduling_request2 NR_scheduling_request3 PBCHNRTCFIX RFquality Saankhya_NRPRACH_HighSpeed Test_SA_5GREC add-dmrs-test add-ru-docker-image avxllr bandwidth-testing bch-fixes-bitmap benetel_config_file_fix benetel_dpdk20 benetel_driver_uldl_pf_merge benetel_driver_update benetel_fixes benetel_phase_rotation bsr-fix bugfix-free-ra-process bugfix-nr-ldpc-post-processing bugfix-nr-ldpc-size-typo bugfix-nr-pdcp-sn-size bugfix-nr-rate-matching-assertion bugfix-nr-t-reordering bugfix-x2-SgNBAdditionRequest bugfix_gnb_rt_stats_html bupt-sa-merge ci-deploy-asterix ci-deploy-docker-compose ci-fix-module-ul-iperf ci-new-docker-pipeline ci-reduce-nb-vms ci-test ci-ul-iperf-from-trf-container ci_benetel_longrun_limits ci_benetel_test ci_fix_iperf_for_module ci_hotfix_module_ue_ip_address ci_improve_module_ctl ci_nsa_benetel ci_nsa_fixes ci_nsa_pipes_improve ci_nsa_test_integration_2021_wk19 ci_nsa_traces ci_nsa_uplink ci_phytest ci_quectel_support ci_sa_rfsim_test ci_solve_ul_for_module ci_test_5GREC ci_test_nsa_fix_quectel_nic ci_test_nsa_on_develop ci_test_ra_fr2 ci_testinfra_as_code ci_vm_resource_fix cleanup_softmodem_main constant_power debug-UL-5GRECORDS debug_UL_signal detached-w16-test develop develop-CBRA-v3 develop-CCE develop-NR_SA_F1AP_5GRECORDS develop-NR_SA_F1AP_5GRECORDS-abs develop-NR_SA_F1AP_5GRECORDS-hs develop-NR_SA_F1AP_5GRECORDS-hs1 develop-NR_SA_F1AP_5GRECORDS-lts develop-NR_SA_F1AP_5GRECORDS-lts-wf develop-NR_SA_F1AP_5GRECORDS-v3 develop-NR_SA_F1AP_5GRECORDS_100M develop-NR_SA_F1AP_5GRECORDS_LDPC_FPGA develop-NR_SA_F1AP_5GRECORDS_lfq_0607 develop-SA-CBRA develop-SA-CBRA-CUDU develop-SA-CBRA-Msg5 develop-SA-CBRA-lts develop-SA-CBRA-ulsch-lts develop-SA-RA develop-SnT develop-aw2sori develop-oriecpriupdates develop-sib1 develop-sib1-local develop-sib1-lts develop-sib1-update develop-sib1-update-test1 develop-sib1-update-ue develop-wf-du develop_stable disable_CSI_measrep dlsch_parallel docker-improvements-2021-april docker-no-cache-option dongzhanyi-zte-develop1 enhance-rfsim episys-merge episys/nsa_baseline episys/nsa_development fedora-gen-kernel-fix fft_bench_hotfix fix-check fix-compile fix-itti-segv fix-nr-pdcp-timer fix-nr-rlc-range-nack fix-physim-deploy fix-quectel fix-realtime fix-retransmission-rbg fix-x2-without-gnb fix_NR_DLUL_PF fix_NR_DLUL_PF_benchmark fix_coreset_dmrs_idx fix_do_ra_data fix_nr_ulsim fix_pdsch_low_prb fix_rb_corruption fix_reestablishment fixes-CE-RLC-PDU-size fixgtpu flexran-repair-mme-mgmt flexran-rtc-repo-is-public fujitsu_lte_contribution git-dashboard gnb-freerun-txru gnb-n300-fixes gnb-only-test gnb-realtime-hotfix gnb-realtime-quickfix gnb-threadpool hack-bch-no-sched-sf-0 hack-exit-gnb-when-no-enb-nsa harq-hotfix hotfix-minor-remove-nr-rlc-cppcheck-error hotfix-nr-rlc-tick integ-w13-test-rt-issue integration_2020_wk15 integration_2020_wk46 integration_2020_wk46_2 integration_2020_wk47 integration_2020_wk48 integration_2020_wk48_2 integration_2020_wk49 integration_2020_wk50 integration_2020_wk50_1 integration_2020_wk51 integration_2020_wk51_2 integration_2021_wk02 integration_2021_wk02_wMR988 integration_2021_wk04 integration_2021_wk05 integration_2021_wk06 integration_2021_wk06_MR978 integration_2021_wk06_b integration_2021_wk06_c integration_2021_wk08 integration_2021_wk08_2 integration_2021_wk08_MR963 integration_2021_wk09 integration_2021_wk09_b integration_2021_wk10 integration_2021_wk10_b integration_2021_wk11 integration_2021_wk12 integration_2021_wk12_b integration_2021_wk13_a integration_2021_wk13_b integration_2021_wk13_b_fix_tdas integration_2021_wk13_b_fixed integration_2021_wk13_c integration_2021_wk14_a integration_2021_wk15_a integration_2021_wk16 integration_2021_wk17_a integration_2021_wk17_b integration_2021_wk18_a integration_2021_wk18_b integration_2021_wk19 integration_2021_wk20_a integration_2021_wk22 integration_2021_wk23 integration_2021_wk27 integration_w5GC_CBRA_test inter-RRU-final itti-enhancement ldpc_offload_t1 ldpc_short_codeword_fixes lte-ulsch-bugfix lte_uplink_improvement mac-fixes-wk45_2 migrate-cpp-check-container migrate-vm-pipeline-to-bionic minor-fix-doc-basic-sim mosaic5g-oai-ran mosaic5g-oai-sim msg4_phy_0303_lfq multiple_ssb_sib1_bugfix nasmesh_kernel_5.8 new-gtpu nfapi_nr_arch_mod nfapi_nr_develop nfapi_nr_develop_new ngap-wf-1120 ngap-wf-1120-srb ngap-wf-1120-srb-gtp ngap-wf-1120-srb-gtp-hs ngap-wf-1120-srb-gtp-hs1 ngap-wf-1120-srb-gtp-hs2 ngap-wf-1120-srb-gtp-yhz ngap-wf-1203-yunsdr ngap_lfq_1120 ngap_merge nr-bsr-fix nr-dl-mimo-2layer nr-dmrs-fixes nr-pdcp-benchmarking nr-pdcp-improvements nr-pdcp-nea2-security nr-pdcp-nia2-integrity nr-pdcp-small-bugfixes nr-pdcp-srb-integrity nr-ra-fix nr-stats-print nrPBCHTCFix nrPbchTcFix nrUE nrUE-hs nrUE-upper-layer nr_bsr nr_dl_dmrs_type2 nr_dl_pf nr_dl_ul_ptrs nr_fdd_if_fix nr_improve_chanest nr_power_measurement_fixes nr_prach_fr2 nr_ue_pdcp_fix nr_ue_tti_cleanup nr_ul_pf nr_ul_scfdma oai-sim oairu oairu-dockerfile-support oc-docker-october-improvements openxg/develop phy-asan-fixes physim-build-deploy physim-deploy-handle-error-cases prb_based_dl_channel_estimation ptrs_rrc_config pusch-mthread-scaling-fix pusch-retrans-fix-ue recursive-cmake remove_nos1_hack_pdcp remove_x2_gnb_hardcoding repair-TA rh-ci-add-ue-parallelization rh_ci_add_runtime_stats rh_ci_add_uldlharq_stats rh_ci_fix_autoterminate rh_ci_fr1_update rh_ci_gsheet_rt_monitoring rh_ci_nsa2jenkins rh_ci_nsa_test_n310 rh_ci_phy_test_improve rh_ci_ra_fr2 rh_ci_test_benetel rh_ci_test_nsa rh_ci_test_nsa_wk16 rh_ci_test_nsa_wk17_b rh_ci_test_nsa_wk17b rh_ci_test_rfsim_sa rh_ci_ue_parallel rh_fr1_newjenkins rh_fr1_update rh_gnb_compile_fix rh_wk50_debug rlc-v2-bugfix-status-reporting rlc-v2-tick rohan_ulsim2RxFix rrc-enb-phy-testmode s1-subnormal_rewrite s1_subnormal s1_subnormal-robert sa-demo sa-demo-hs sa-merge-rrc-srb sa-msg4 sa-msg4-rrc sa-msg4-rrc-yihz sa-msg4-rrc-yihz-hs sa_rrc_yihz sanitize-address sanitize-v1 sanitize-v1-tmp sarma_pvnp_oai scs_60_iisc sim-channels small-config-change small_nr_bugfixes t-gnb-tracer test-5GREC test-nsa-benetel test-panos test_nsa_gtpu_fix test_rt-fix_phy-test ue-dci-false-detection ue-fixes ue-pdsch-pusch-parallel ue-race-fix ue_beam_selection ul-freq-iq-samps-to-file usrp_stop_cleanly usrp_x400 wf-sa-rrc wf_testc wireshark-T-hack-ueid wireshark-log-scheduling-requests wk11-with-phytest x2_handle_sctp_shutdown xiangwab xiangwan xw2 yihongzheng_srb 2021.wk14_a 2021.wk13_d 2021.wk13_c 2021.w27 2021.w26 2021.w25 2021.w24 2021.w23 2021.w22 2021.w20 2021.w19 2021.w18_b 2021.w18_a 2021.w17_b 2021.w16 2021.w15 2021.w14 2021.w13_a 2021.w12 2021.w11 2021.w10 2021.w09 2021.w08 2021.w06 2021.w05 2021.w04 2021.w02 2020.w51_2 2020.w51 2020.w50 2020.w49 2020.w48_2 2020.w48 2020.w47 2020.w46_2 2020.w46 2020.w45_2 benetel_phase_rotation benetel_gnb_rel_2.0 benetel_gnb_rel_1.0 benetel_enb_rel_2.0 benetel_enb_rel_1.0
No related merge requests found
......@@ -59,7 +59,7 @@ if [ $# -eq 0 ]
then
echo " ---- Checking the whole repository ----"
echo ""
NB_FILES_TO_FORMAT=`astyle --dry-run --options=ci-scripts/astyle-options.txt --recursive *.c *.h | grep -c Formatted `
NB_FILES_TO_FORMAT=`astyle --dry-run --options=ci-scripts/astyle-options.txt --recursive *.c *.h | grep -c Formatted || true`
echo "Nb Files that do NOT follow OAI rules: $NB_FILES_TO_FORMAT"
echo $NB_FILES_TO_FORMAT > ./oai_rules_result.txt
......@@ -67,17 +67,17 @@ then
awk '/#[ \t]*ifndef/ { gsub("^.*ifndef *",""); if (names[$1]!="") print "files with same {define ", FILENAME, names[$1]; names[$1]=FILENAME } /#[ \t]*define/ { gsub("^.*define *",""); if(names[$1]!=FILENAME) print "error in declaration", FILENAME, $1, names[$1]; nextfile }' `find openair* common targets executables -name *.h |grep -v LFDS` > header-files-w-incorrect-define.txt
# Testing if explicit GNU GPL license banner
egrep -irl --exclude-dir=.git --include=*.cpp --include=*.c --include=*.h "General Public License" . > files-w-gnu-gpl-license-banner.txt
egrep -irl --exclude-dir=.git --include=*.cpp --include=*.c --include=*.h "General Public License" . | egrep -v "openair3/NAS/COMMON/milenage.h" > files-w-gnu-gpl-license-banner.txt
# Looking at exotic/suspect banner
LIST_OF_FILES_W_BANNER=`egrep -irl --exclude-dir=.git --include=*.cpp --include=*.c --include=*.h "Copyright|copyleft" .`
if [ -f ./files-w-suspect-banner.txt ]; then rm -f ./files-w-suspect-banner.txt; fi
for FILE in $LIST_OF_FILES_W_BANNER
do
IS_NFAPI=`echo $FILE | egrep -c "nfapi/open-nFAPI|nfapi/oai_integration/vendor_ext"`
IS_OAI_LICENCE_PRESENT=`egrep -c "OAI Public License" $FILE`
IS_BSD_LICENCE_PRESENT=`egrep -c "the terms of the BSD Licence" $FILE`
IS_EXCEPTION=`echo $FILE | egrep -c "common/utils/collection/tree.h|common/utils/collection/queue.h|common/utils/itti_analyzer/common/queue.h|openair3/UTILS/tree.h|openair3/UTILS/queue.h|openair3/GTPV1-U/nw-gtpv1u|openair2/UTIL/OPT/ws_"`
IS_NFAPI=`echo $FILE | egrep -c "nfapi/open-nFAPI|nfapi/oai_integration/vendor_ext" || true`
IS_OAI_LICENCE_PRESENT=`egrep -c "OAI Public License" $FILE || true`
IS_BSD_LICENCE_PRESENT=`egrep -c "the terms of the BSD Licence" $FILE || true`
IS_EXCEPTION=`echo $FILE | egrep -c "common/utils/collection/tree.h|common/utils/collection/queue.h|common/utils/itti_analyzer/common/queue.h|openair3/UTILS/tree.h|openair3/UTILS/queue.h|openair3/GTPV1-U/nw-gtpv1u|openair2/UTIL/OPT/ws_|openair3/NAS/COMMON/milenage.h" || true`
if [ $IS_OAI_LICENCE_PRESENT -eq 0 ] && [ $IS_BSD_LICENCE_PRESENT -eq 0 ]
then
if [ $IS_NFAPI -eq 0 ] && [ $IS_EXCEPTION -eq 0 ]
......@@ -178,7 +178,7 @@ do
EXT="${filename##*.}"
if [ $EXT = "c" ] || [ $EXT = "h" ] || [ $EXT = "cpp" ] || [ $EXT = "hpp" ]
then
TO_FORMAT=`astyle --dry-run --options=ci-scripts/astyle-options.txt $FULLFILE | grep -c Formatted `
TO_FORMAT=`astyle --dry-run --options=ci-scripts/astyle-options.txt $FULLFILE | grep -c Formatted || true`
NB_TO_FORMAT=$((NB_TO_FORMAT + TO_FORMAT))
if [ $TO_FORMAT -ne 0 ]
then
......@@ -186,15 +186,19 @@ do
echo $FULLFILE >> ./oai_rules_result_list.txt
fi
# Testing if explicit GNU GPL license banner
egrep -i "General Public License" $FULLFILE >> files-w-gnu-gpl-license-banner.txt
GNU_EXCEPTION=`echo $FULLFILE | egrep -c "openair3/NAS/COMMON/milenage.h" || true`
if [ $GNU_EXCEPTION -eq 0 ]
then
egrep -il "General Public License" $FULLFILE >> files-w-gnu-gpl-license-banner.txt
fi
# Looking at exotic/suspect banner
IS_BANNER=`egrep -i -c "Copyright|copyleft" $FULLFILE`
IS_BANNER=`egrep -i -c "Copyright|copyleft" $FULLFILE || true`
if [ $IS_BANNER -ne 0 ]
then
IS_NFAPI=`echo $FULLFILE | egrep -c "nfapi/open-nFAPI|nfapi/oai_integration/vendor_ext"`
IS_OAI_LICENCE_PRESENT=`egrep -c "OAI Public License" $FULLFILE`
IS_BSD_LICENCE_PRESENT=`egrep -c "the terms of the BSD Licence" $FULLFILE`
IS_EXCEPTION=`echo $FULLFILE | egrep -c "common/utils/collection/tree.h|common/utils/collection/queue.h|common/utils/itti_analyzer/common/queue.h|openair3/UTILS/tree.h|openair3/UTILS/queue.h|openair3/GTPV1-U/nw-gtpv1u|openair2/UTIL/OPT/ws_"`
IS_NFAPI=`echo $FULLFILE | egrep -c "nfapi/open-nFAPI|nfapi/oai_integration/vendor_ext" || true`
IS_OAI_LICENCE_PRESENT=`egrep -c "OAI Public License" $FULLFILE || true`
IS_BSD_LICENCE_PRESENT=`egrep -c "the terms of the BSD Licence" $FULLFILE || true`
IS_EXCEPTION=`echo $FULLFILE | egrep -c "common/utils/collection/tree.h|common/utils/collection/queue.h|common/utils/itti_analyzer/common/queue.h|openair3/UTILS/tree.h|openair3/UTILS/queue.h|openair3/GTPV1-U/nw-gtpv1u|openair2/UTIL/OPT/ws_|openair3/NAS/COMMON/milenage.h" || true`
if [ $IS_OAI_LICENCE_PRESENT -eq 0 ] && [ $IS_BSD_LICENCE_PRESENT -eq 0 ]
then
if [ $IS_NFAPI -eq 0 ] && [ $IS_EXCEPTION -eq 0 ]
......
......@@ -291,3 +291,6 @@ THREAD_STRUCT = (
rrc_log_verbosity ="medium";
};
uicc: {
opc = "testopc";
};
This diff is collapsed.
......@@ -483,11 +483,6 @@ function main() {
echo_info "Flags for Deadline scheduler: $DEADLINE_SCHEDULER_FLAG_USER"
echo_info "Flags for CPU Affinity: $CPU_AFFINITY_FLAG_USER"
if [ -n "$UHD_IMAGES_DIR" ] && [ -z "$INSTALL_EXTERNAL" ]; then
echo_error "UHD images download settings will not be applied without -I present"
exit
fi
#######################################################
# Setting and printing OAI envs, we should check here #
#######################################################
......
This diff is collapsed.
......@@ -397,18 +397,21 @@ int32_t write_file_matlab(const char *fname, const char *vname, void *data, int
/* define variable only used in LOG macro's */
# define LOG_VAR(A,B) A B
# else /* T_TRACER: remove all debugging and tracing messages, except errors */
# define LOG_I(c, x...) do {logRecord_mt(__FILE__, __FUNCTION__, __LINE__,c, OAILOG_INFO, x) ; } while(0)/* */
# define LOG_W(c, x...) do {logRecord_mt(__FILE__, __FUNCTION__, __LINE__,c, OAILOG_WARNING, x) ; } while(0)/* */
# define LOG_E(c, x...) do {logRecord_mt(__FILE__, __FUNCTION__, __LINE__,c, OAILOG_ERR, x) ; } while(0)/* */
# define LOG_D(c, x...) do {logRecord_mt(__FILE__, __FUNCTION__, __LINE__,c, OAILOG_DEBUG, x) ; } while(0)/* */
# define LOG_T(c, x...) /* */
# define LOG_DUMPMSG(c, b, s, x...) /* */
# define LOG_E(c, x...) do { if( g_log->log_component[c].level >= OAILOG_ERR ) logRecord_mt(__FILE__, __FUNCTION__, __LINE__,c, OAILOG_ERR, x) ;} while (0)
# define LOG_W(c, x...) do { if( g_log->log_component[c].level >= OAILOG_WARNING) logRecord_mt(__FILE__, __FUNCTION__, __LINE__,c, OAILOG_WARNING, x) ;} while (0)
# define LOG_I(c, x...) do { if( g_log->log_component[c].level >= OAILOG_INFO ) logRecord_mt(__FILE__, __FUNCTION__, __LINE__,c, OAILOG_INFO, x) ;} while (0)
# define LOG_D(c, x...) do { if( g_log->log_component[c].level >= OAILOG_DEBUG ) logRecord_mt(__FILE__, __FUNCTION__, __LINE__,c, OAILOG_DEBUG, x) ;} while (0)
# define LOG_T(c, x...) do { if( g_log->log_component[c].level >= OAILOG_TRACE ) logRecord_mt(__FILE__, __FUNCTION__, __LINE__,c, OAILOG_TRACE, x) ;} while (0)
# define VLOG(c,l, f, args) do { if( g_log->log_component[c].level >= l ) vlogRecord_mt(__FILE__, __FUNCTION__, __LINE__,c, l, f, args) ; } while (0)
# define nfapi_log(FILE, FNC, LN, COMP, LVL, FMT...)
# define LOG_DEBUGFLAG(D) ( 0 )
# define LOG_DUMPFLAG(D) ( 0 )
# define LOG_DEBUGFLAG(D) (g_log->dump_mask & D)
# define LOG_DUMPFLAG(D) (g_log->debug_mask & D)
# define LOG_DUMPMSG(c, f, b, s, x...) do { if(g_log->dump_mask & f) log_dump(c, b, s, LOG_DUMP_CHAR, x) ;} while (0) /* */
# define LOG_M(file, vector, data, len, dec, format) do { write_file_matlab(file, vector, data, len, dec, format);} while(0)
# define LOG_VAR(A,B)
# define LOG_VAR(A,B) A B
# endif /* T_TRACER */
/* avoid warnings for variables only used in LOG macro's but set outside debug section */
#define GCC_NOTUSED __attribute__((unused))
......
......@@ -814,6 +814,7 @@ static inline unsigned long long int vcd_get_time(void)
return (long long unsigned int)((time.tv_nsec - g_time_start.tv_nsec)) +
((long long unsigned int)time.tv_sec - (long long unsigned int)g_time_start.tv_sec) * 1000000000UL;
#endif
return 0;
}
void vcd_signal_dumper_create_header(void)
......
......@@ -601,11 +601,19 @@ extern int ouput_vcd;
#else /* T_TRACER */
#if ENABLE_VCD
#define VCD_SIGNAL_DUMPER_INIT(aRgUmEnT) vcd_signal_dumper_init(aRgUmEnT)
#define VCD_SIGNAL_DUMPER_CLOSE() vcd_signal_dumper_close()
#define VCD_SIGNAL_DUMPER_CREATE_HEADER() vcd_signal_dumper_create_header()
#define VCD_SIGNAL_DUMPER_DUMP_VARIABLE_BY_NAME(vAr1,vAr2) vcd_signal_dumper_dump_variable_by_name(vAr1,vAr2)
#define VCD_SIGNAL_DUMPER_DUMP_FUNCTION_BY_NAME(vAr1,vAr2) vcd_signal_dumper_dump_function_by_name(vAr1,vAr2)
#else
#define VCD_SIGNAL_DUMPER_INIT(aRgUmEnT)
#define VCD_SIGNAL_DUMPER_CLOSE()
#define VCD_SIGNAL_DUMPER_CREATE_HEADER()
#define VCD_SIGNAL_DUMPER_DUMP_VARIABLE_BY_NAME(vAr1,vAr2)
#define VCD_SIGNAL_DUMPER_DUMP_FUNCTION_BY_NAME(vAr1,vAr2)
#endif
#endif /* T_TRACER */
......
This diff is collapsed.
This diff is collapsed.
<style type="text/css" rel="stylesheet">
body {
font-family: "Helvetica Neue", Helvetica, Arial, sans-serif;
font-size: 13px;
line-height: 18px;
color: #fff;
background-color: #110F14;
}
h2 { margin-left: 20px; }
h3 { margin-left: 40px; }
h4 { margin-left: 60px; }
.func2 { margin-left: 20px; }
.func3 { margin-left: 40px; }
.func4 { margin-left: 60px; }
</style>
This tuto for 5G gNB NAS design
{: .text-center}
# source files
executables/ocp-gnb.c: a main loop to create a debuggable gNB, see document SW_archi.md
openair2/RRC/NR/nr_ngap_gNB.c: skeleton for interface with NGAP
openair3/NAS/COMMON/milenage.h: a simple milenage implementation, depend only on crypto library
openair3/NAS/COMMON/NR_NAS_defs.h: messages defined for NAS implemented in C: C struct, C enums and automatic conversion to labels for debug messages
openair3/NAS/COMMON/nr_common.c: 5G NAS common code between gNB and UE
openair3/UICC/usim_interface.c: UICC simulation for USIM messages
openair3/NAS/NR_UE/ue_process_nas.c: NAS code for UE
openair3/NAS/gNB/network_process_nas.c: NAS code for gNB running without 5GC
openair3/TEST/test5Gnas.c: unitary testing of NAS messages: encodes+decode a standard network entry, mixing code from UE and 5GC (or gNB in noCore)
# USIM simulation
A new USIM simulation, that parameters are in regular OAI config files
## To open the USIM
init_uicc() takes a parameter: the name of the block in the config file
In case we run several UEs in one process, the variable section name allows to make several UEs configurations in one config file.
The NAS implementation uses this possibility.
# UE side
UEprocessNAS() is the entry for all messages.
It decodes the message type and call the specific function for each messgae
## Identityrequest + IdentityResponse
When the UE receives the request, it stores the 5GC request parameters in the UE context ( UE->uicc pointer)
It calls "scheduleNAS", that would trigger a answer (seeing general archtecture, it will probly be a itti message to future RRC or NGAP thread).
When the scheduler wants to encode the answer, it calls identityResponse()
The UE search for a section in the config file called "uicc"
it encodes the NAS answer with the IMSI, as a 4G compatible authentication.
A future release would encode 5G SUPI as native 5G UICC.
## Authenticationrequest + authenticationResponse
When the UE receives the request, it stores the 5GC request parameters in the UE context ( UE->uicc pointer)
It calls "scheduleNAS", that would trigger a answer (seeing general archtecture, it will probly be a itti message to future RRC or NGAP thread).
When the scheduler wants to encode the answer, it calls authenticationResponse()
The UE search for a section in the config file called "uicc"
It uses the Milenage parameters of this section to encode a milenage response
A future release would encode 5G new authentication cyphering functions.
## SecurityModeCommand + securityModeComplete
When the UE receives the request it will:
Selected NAS security algorithms: store it for future encoding
Replayed UE security capabilities: check if it is equal to UE capabilities it sent to the 5GC
IMEISV request: to implement
ngKSI: Key set Indicator, similator to 4G to select a ciphering keys set
When the scheduler wants to encode the answer, it calls registrationComplete()
## registrationComplete
To be defined in UE, this NAS message is done after RRC sequence completes
# gNB side
gNB NGAP thread receives the NAS message from PHY layers
In normal mode, it send it to the core network with no decoding.
Here after, the gNB mode "noCore" processing in gNB: NGAP calls the entry function: processNAS() instead of forwarding the packet to the 5GC
## RRCModeComplete + Identityrequest
When the gNB completes RRC attach, it sends a first message to NGAP thread.
Normal processing sends NGAP initial UE message, in noCore mode, it should call: identityRequest() that encode the NAS identity request inside the gNB.
The gNB NGAP thread then should call the piece of code that forward the message to the UE as when it receives a NAS message from 5GC.
## All NAS coming from UE
When NGAP thread receives a NAS message from lower layers, it encapsulates it to forward it to the 5GC. In "noCore" mode it calls processNAS().
This function stores in the gNB the NAS data, then it should encode the next message (identity, authentication, security mode) or do nothing (registration complete).
<div class="panel panel-info">
**Note**
{: .panel-heading}
<div class="panel-body">
</div>
</div>
<style type="text/css" rel="stylesheet">
body {
font-family: "Helvetica Neue", Helvetica, Arial, sans-serif;
font-size: 13px;
line-height: 18px;
color: #fff;
background-color: #110F14;
}
h2 { margin-left: 20px; }
h3 { margin-left: 40px; }
h4 { margin-left: 60px; }
.func2 { margin-left: 20px; }
.func3 { margin-left: 40px; }
.func4 { margin-left: 60px; }
</style>
This tuto for 5G gNB design, with Open Cells main
{: .text-center}
# Top file: executables/ocp-gnb.c
the function main() initializes the data from configuration file
# The main thread is in ru_thread()
The infinite loop:
## rx_rf()
Collect radio signal samples from RF board
all SDR processing is triggered by I/Q sample reception and it's date (timestamp)
TX I/Q samples will have a date in the future, compared to RX timestamp
called for each 5G NR slot
it blocks until data is available
the internal time comes from the RF board sampling numbers
(each sample has a incremental number representing a very accurate timing)
raw incoming data is in buffer called "rxdata"
We derivate frame number, slot number, ... from the RX timestamp
{: .func2}
## nr_fep_full()
"front end processing" of uplink signal
performs DFT on the signal
same function (duplicates): phy_procedures_gNB_common_RX()
it computes the buffer rxdataF (for frequency) from rxdata (samples over time)
rxdataF is the rxdata in frequency domain, phase aligned
{: .func3}
## gNB_top()
only compute frame numbre, slot number, ...
{: .func3}
## ocp_rxtx()
main processing for both UL and DL
start by calling oai_subframe_ind() that trigger processing in pnf_p7_subframe_ind() purpose ???
all the context is in the passed structure UL_INFO
the context is not very clear: there is a mutex on it,
but not actual coherency (see below handle_nr_rach() assumes data is up-to-date)
The first part (in NR_UL_indication, uses the data computed by the lower part (phy_procedures_gNB_uespec_RX), but for the **previous** slot
Then, phy_procedures_gNB_uespec_RX will hereafter replace the data for the next run
This is very tricky and not thread safe at all.
{: .func3}
### NR_UL_indication()
This block processes data already decoded and stored in structures behind UL_INFO
{: .func4}
* handle_nr_rach()
process data from RACH primary detection
if the input is a UE RACH detection
{: .func4}
* nr_schedule_msg2()
{: .func4}
* handle_nr_uci()
????
{: .func4}
* handle_nr_ulsch()
handles ulsch data prepared by nr_fill_indication()
{: .func4}
* gNB_dlsch_ulsch_scheduler ()
the **scheduler** is called here, see dedicated chapter
{: .func4}
* NR_Schedule_response()
process as per the scheduler decided
{: .func4}
### L1_nr_prach_procedures()
????
{: .func4}
### phy_procedures_gNB_uespec_RX()
* nr_decode_pucch0()
actual CCH channel decoding form rxdataF (rx data in frequency domain)
populates UL_INFO.uci_ind, actual uci data is in gNB->pucch
{: .func4}
* nr_rx_pusch()
{: .func4}
* extracts data from rxdataF (frequency transformed received data)
{: .func4}
* nr_pusch_channel_estimation()
{: .func4}
* nr_ulsch_extract_rbs_single()
{: .func4}
* nr_ulsch_scale_channel()
{: .func4}
* nr_ulsch_channel_level()
{: .func4}
* nr_ulsch_channel_compensation()
{: .func4}
* nr_ulsch_compute_llr()
this function creates the "likelyhood ratios"
{: .func4}
* nr_ulsch_procedures()
{: .func4}
* actual ULsch decoding
{: .func4}
* nr_ulsch_unscrambling()
{: .func4}
* nr_ulsch_decoding()
{: .func4}
* nr_fill_indication()
populate the data for the next call to "NR_UL_indication()"
it would be better to call **NR_UL_indication()** now instead of before (on previous slot)
{: .func4}
### phy_procedures_gNB_TX()
* nr_common_signal_procedures()
generate common signals
{: .func4}
* nr_generate_dci_top()
generate DCI: the scheduling informtion for each UE in both DL and UL
{: .func4}
* nr_generate_pdsch()
generate DL shared channel (user data)
{: .func4}
### nr_feptx_prec()
tx precoding
{: .func3}
### nr_feptx0
do the inverse DFT
{: .func3}
### tx_rf()
send radio signal samples to the RF board
the samples numbers are the future time for these samples emission on-air
{: .func3}
# Scheduler
The scheduler is called by the chain: nr_ul_indication()=>gNB_dlsch_ulsch_scheduler()
It calls sub functions to process each physical channel (rach, ...)
The scheduler uses and internal map of used RB: vrb_map and vrb_map_UL, so each specific channel scheduler can see the already filled RB in each subframe (the function gNB_dlsch_ulsch_scheduler() clears these two arrays when it starts)
The scheduler also calls "run_pdcp()", as this is not a autonomous thread, it needs to be called here to update traffic requests (DL) and to propagate waiting UL to upper layers
After calling run_pdcp, it updates "rlc" time data but it doesn't actually process rlc
it sends a iiti message to activate the thread for RRC, the answer will be asynchronous in ????
Calls schedule_nr_mib() that calls mac_rrc_nr_data_req() to fill MIB,
Calls each channel allocation: schedule SI, schedule_ul, schedule_dl, ...
this is a major entry for "phy-test" mode: in this mode, the allocation is fixed
all these channels goes to mac_rrc_nr_data_req() to get the data to transmit
nr_schedule_ue_spec() is called
* calls nr_simple_dlsch_preprocessor()=> mac_rlc_status_ind() mac_rlc_status_ind() locks and checks directly inside rlc data the quantity of waiting data. So, the scheduler can allocate RBs
* calls nr_update_pucch_scheduling()
* get_pdsch_to_harq_feedback() to schedule retransmission in DL
Calls nr_fill_nfapi_dl_pdu() to actually populate what should be done by the lower layers to make the Tx subframe
# RRC
RRC is a regular thread with itti loop on queue: TASK_RRC_GNB
it receives it's configuration in message NRRRC_CONFIGURATION_REQ, then real time mesages for all events: S1/NGAP events, X2AP messages and RRC_SUBFRAME_PROCESS
RRC_SUBFRAME_PROCESS message is send each subframe
how does it communicate to scheduler ?
# RLC
RLC code is new implementation, not using OAI mechanisms: it is implmented directly on pthreads, ignoring OAI common functions.
It runs a thread waiting incoming data, but it is mainly running inside calling thread.
It is a library, running in thread RRC (except on itti message: F1AP_UL_RRC_MESSAGE for F1).
# NGAP
NGAP would be a itti thread as is S1AP (+twin thread SCTP that is almost void processing)?
About all messages are exchanged with RRC thread
# GTP
Gtp + UDP are two twin threads performing the data plane interface to the core network
The design is hybrid: thread and inside other threads calls. It should at least be protected by a mutex.
## GTP thread
Gtp thread has a itti interface: queue TASK_GTPV1_U
The interface is about full definition: control messages (create/delet GTP tunnels) and data messages (user plane UL and DL).
PDCP layer push to the GTP queue (outside UDP thread that do almost nothing and work only with GTP thread) is to push a UL packet.
## GTP thread running code from other layers
gtp thread calls directly pdcp_data_req(), so it runs inside it's context internal pdcp structures updates
## inside other threads
gtpv1u_create_s1u_tunnel(), delete tunnel, ... functions are called inside the other threads, without mutex.
<div class="panel panel-info">
**Note**
{: .panel-heading}
<div class="panel-body">
</div>
</div>
......@@ -435,7 +435,7 @@ void pusch_procedures_tosplit(uint8_t *bufferZone, int bufSize, PHY_VARS_eNB *eN
if ((ulsch) &&
(ulsch->rnti>0) &&
(ulsch_harq->status == ACTIVE) &&
((ulsch_harq->frame == frame) || (ulsch_harq->repetition_number >1) ) &&
((ulsch_harq->frame == frame) || (ulsch_harq->repetition_number >1) ) &&
((ulsch_harq->subframe == subframe) || (ulsch_harq->repetition_number >1) ) &&
(ulsch_harq->handled == 0)) {
// UE has ULSCH scheduling
......@@ -1520,7 +1520,7 @@ void *cu_fs6(void *arg) {
remoteIP[i]=0;
break;
}
AssertFatal(createUDPsock(NULL, CU_PORT, remoteIP, port_def, &sockFS6), "");
L1_rxtx_proc_t L1proc= {0};
// We pick the global thread pool from the legacy code global vars
......
This diff is collapsed.
......@@ -266,7 +266,7 @@ static inline int rxtx(PHY_VARS_gNB *gNB, int frame_rx, int slot_rx, int frame_t
// run PHY TX procedures the one after the other for all CCs to avoid race conditions
// (may be relaxed in the future for performance reasons)
// *****************************************
if (tx_slot_type == NR_DOWNLINK_SLOT || tx_slot_type == NR_MIXED_SLOT) {
if(get_thread_parallel_conf() != PARALLEL_RU_L1_TRX_SPLIT) {
......
......@@ -623,6 +623,7 @@ void rx_rf(RU_t *ru,int *frame,int *slot) {
unsigned int rxs;
int i;
uint32_t samples_per_slot = fp->get_samples_per_slot(*slot,fp);
uint32_t samples_per_slot_prev ;
openair0_timestamp ts,old_ts;
AssertFatal(*slot<fp->slots_per_frame && *slot>=0, "slot %d is illegal (%d)\n",*slot,fp->slots_per_frame);
......@@ -658,16 +659,16 @@ void rx_rf(RU_t *ru,int *frame,int *slot) {
ru->ts_offset = proc->timestamp_rx;
proc->timestamp_rx = 0;
} else {
if (proc->timestamp_rx - old_ts != fp->get_samples_per_slot((*slot-1)%fp->slots_per_frame,fp)) {
LOG_D(PHY,"rx_rf: rfdevice timing drift of %"PRId64" samples (ts_off %"PRId64")\n",proc->timestamp_rx - old_ts - samples_per_slot,ru->ts_offset);
ru->ts_offset += (proc->timestamp_rx - old_ts - samples_per_slot);
samples_per_slot_prev = fp->get_samples_per_slot((*slot-1)%fp->slots_per_frame,fp);
if (proc->timestamp_rx - old_ts != samples_per_slot_prev) {
LOG_D(PHY,"rx_rf: rfdevice timing drift of %"PRId64" samples (ts_off %"PRId64")\n",proc->timestamp_rx - old_ts - samples_per_slot_prev,ru->ts_offset);
ru->ts_offset += (proc->timestamp_rx - old_ts - samples_per_slot_prev);
proc->timestamp_rx = ts-ru->ts_offset;
}
}
proc->frame_rx = (proc->timestamp_rx / (fp->samples_per_subframe*10))&1023;
uint32_t idx_sf = proc->timestamp_rx / fp->samples_per_subframe;
proc->tti_rx = (idx_sf * fp->slots_per_subframe + (int)round((float)(proc->timestamp_rx % fp->samples_per_subframe) / fp->samples_per_slot0))%(fp->slots_per_frame);
proc->tti_rx = fp->get_slot_from_timestamp(proc->timestamp_rx,fp);
// synchronize first reception to frame 0 subframe 0
LOG_D(PHY,"RU %d/%d TS %llu (off %d), frame %d, slot %d.%d / %d\n",
ru->idx,
......@@ -688,7 +689,7 @@ void rx_rf(RU_t *ru,int *frame,int *slot) {
}
if (proc->frame_rx != *frame) {
LOG_E(PHY,"Received Timestamp (%llu) doesn't correspond to the time we think it is (proc->frame_rx %d frame %d)\n",(long long unsigned int)proc->timestamp_rx,proc->frame_rx,*frame);
LOG_E(PHY,"Received Timestamp (%llu) doesn't correspond to the time we think it is (proc->frame_rx %d frame %d, proc->tti_rx %d, slot %d)\n",(long long unsigned int)proc->timestamp_rx,proc->frame_rx,*frame,proc->tti_rx,*slot);
exit_fun("Exiting");
}
} else {
......@@ -758,7 +759,7 @@ void tx_rf(RU_t *ru,int frame,int slot, uint64_t timestamp) {
// the beam index is written in bits 8-10 of the flags
// bit 11 enables the gpio programming
int beam=0;
if (slot==0) beam = 11; //3 for boresight & 8 to enable
//if (slot==0) beam = 11; //3 for boresight & 8 to enable
/*
if (slot==0 || slot==40) beam=0&8;
if (slot==10 || slot==50) beam=1&8;
......
......@@ -956,7 +956,7 @@ if(!IS_SOFTMODEM_NOS1)
// once all RUs are ready initialize the rest of the gNBs ((dependence on final RU parameters after configuration)
printf("ALL RUs ready - init gNBs\n");
if(IS_SOFTMODEM_DOFORMS) {
sleep(1);
scopeParms_t p;
p.argc=&argc;
p.argv=argv;
......
......@@ -180,6 +180,13 @@ static void UE_synch(void *arg) {
UE->is_synchronized = 0;
if (UE->UE_scan == 0) {
// Overwrite DL frequency (for FR2 testing)
if (downlink_frequency[0][0]!=0){
UE->frame_parms.dl_CarrierFreq = downlink_frequency[0][0];
UE->frame_parms.ul_CarrierFreq = downlink_frequency[0][0];
}
LOG_I( PHY, "[SCHED][UE] Check absolute frequency DL %"PRIu64", UL %"PRIu64" (oai_exit %d, rx_num_channels %d)\n",
UE->frame_parms.dl_CarrierFreq, UE->frame_parms.ul_CarrierFreq,
oai_exit, openair0_cfg[0].rx_num_channels);
......
......@@ -685,13 +685,7 @@ int main( int argc, char **argv ) {
fapi_nr_config_request_t *nrUE_config = &UE[CC_id]->nrUE_config;
nr_init_frame_parms_ue(frame_parms[CC_id],nrUE_config,NORMAL);
// Overwrite DL frequency (for FR2 testing)
if (downlink_frequency[0][0]!=0) {
frame_parms[CC_id]->dl_CarrierFreq = downlink_frequency[0][0];
frame_parms[CC_id]->ul_CarrierFreq = downlink_frequency[0][0];
}
init_symbol_rotation(frame_parms[CC_id],frame_parms[CC_id]->dl_CarrierFreq);
init_nr_ue_vars(UE[CC_id],frame_parms[CC_id],0,abstraction_flag);
......@@ -751,8 +745,14 @@ int main( int argc, char **argv ) {
UE[CC_id]->N_TA_offset = (int)(N_TA_offset * factor);
LOG_I(PHY,"UE %d Setting N_TA_offset to %d samples (factor %f, UL Freq %lu, N_RB %d)\n", UE[CC_id]->Mod_id, UE[CC_id]->N_TA_offset, factor, UE[CC_id]->frame_parms.ul_CarrierFreq, N_RB);
}
}
// Overwrite DL frequency (for FR2 testing)
if (downlink_frequency[0][0]!=0){
frame_parms[CC_id]->dl_CarrierFreq = downlink_frequency[0][0];
if (frame_parms[CC_id]->frame_type == TDD)
frame_parms[CC_id]->ul_CarrierFreq = downlink_frequency[0][0];
}
}
// printf("tx_max_power = %d -> amp %d\n",tx_max_power[0],get_tx_amp(tx_max_poHwer,tx_max_power));
init_openair0();
// init UE_PF_PO and mutex lock
......
This diff is collapsed.
......@@ -720,9 +720,6 @@ int pnf_phy_hi_dci0_req(L1_rxtx_proc_t *proc, nfapi_pnf_p7_config_t *pnf_p7, nfa
}
int pnf_phy_dl_config_req(L1_rxtx_proc_t *proc, nfapi_pnf_p7_config_t *pnf_p7, nfapi_dl_config_request_t *req) {
if (RC.ru == 0) {
return -1;
}
if (RC.eNB == 0) {
return -2;
......@@ -847,9 +844,6 @@ int pnf_phy_ul_config_req(L1_rxtx_proc_t *proc, nfapi_pnf_p7_config_t *pnf_p7, n
req->ul_config_request_body.srs_present
);
if (RC.ru == 0) {
return -1;
}
if (RC.eNB == 0) {
return -2;
......
......@@ -233,6 +233,20 @@ uint32_t get_samples_per_slot(int slot, NR_DL_FRAME_PARMS* fp)
return samp_count;
}
uint32_t get_slot_from_timestamp(openair0_timestamp timestamp_rx, NR_DL_FRAME_PARMS* fp)
{
uint32_t slot_idx = 0;
int samples_till_the_slot = 0;
timestamp_rx = timestamp_rx%fp->samples_per_frame;
while (timestamp_rx > samples_till_the_slot) {
samples_till_the_slot += fp->get_samples_per_slot(slot_idx,fp);
slot_idx++;
}
return slot_idx;
}
uint32_t get_samples_slot_timestamp(int slot, NR_DL_FRAME_PARMS* fp, uint8_t sl_ahead)
{
uint32_t samp_count = 0;
......@@ -289,6 +303,7 @@ int nr_init_frame_parms(nfapi_nr_config_request_scf_t* cfg,
(fp->nb_prefix_samples + fp->ofdm_symbol_size) * (fp->symbols_per_slot * fp->slots_per_subframe - 2);
fp->get_samples_per_slot = &get_samples_per_slot;
fp->get_samples_slot_timestamp = &get_samples_slot_timestamp;
fp->get_slot_from_timestamp = &get_slot_from_timestamp;
fp->samples_per_frame = 10 * fp->samples_per_subframe;
fp->freq_range = (fp->dl_CarrierFreq < 6e9)? nr_FR1 : nr_FR2;
......
......@@ -2242,16 +2242,12 @@ int dlsch_modulation(PHY_VARS_eNB* phy_vars_eNB,
MIMO_mode_t mimo_mode = -1;
uint8_t mprime=0,Ns;
int8_t lprime=-1;
int aa=0;
#ifdef DEBUG_DLSCH_MODULATION
uint8_t Nl0; //= dlsch0_harq->Nl;
uint8_t Nl1;
#endif
int ru_id;
RU_t *ru;
int eNB_id;
if ((dlsch0 != NULL) && (dlsch1 != NULL)){
......@@ -2432,11 +2428,13 @@ int dlsch_modulation(PHY_VARS_eNB* phy_vars_eNB,
}
// mapping ue specific beamforming weights from UE specified DLSCH structure to RU beam weights for the eNB
for (ru_id=0;ru_id<RC.nb_RU;ru_id++) {
/*
for (int ru_id=0;ru_id<RC.nb_RU;ru_id++) {
RU_t *ru;
ru = RC.ru[ru_id];
for (eNB_id=0;eNB_id<ru->num_eNB;eNB_id++){
for (int eNB_id=0;eNB_id<ru->num_eNB;eNB_id++){
if (phy_vars_eNB == ru->eNB_list[eNB_id]) {
for (aa=0;aa<ru->nb_tx;aa++){
for (int aa=0;aa<ru->nb_tx;aa++){
LOG_I(PHY,"ru_id:%d eNB_id:%d aa:%d memcpy(ru->beam_weights, dlsch0->ue_spec_bf_weights[ru_id][0],)\n", ru_id, eNB_id, aa);
memcpy(ru->beam_weights[eNB_id][5][aa],
dlsch0->ue_spec_bf_weights[ru_id][0],
......@@ -2445,6 +2443,7 @@ int dlsch_modulation(PHY_VARS_eNB* phy_vars_eNB,
}
}
}
*/
}
......
......@@ -506,10 +506,10 @@ void init_symbol_rotation(NR_DL_FRAME_PARMS *fp,uint64_t CarrierFreq) {
const int nsymb = fp->symbols_per_slot * fp->slots_per_frame/10;
const double Tc=(1/480e3/4096);
const double Nu=2048*64*.5;
const double Nu=2048*64*(1/(float)(1<<fp->numerology_index));
const double f0= (double)CarrierFreq;
const double Ncp0=16*64 + (144*64*.5);
const double Ncp1=(144*64*.5);
const double Ncp0=16*64 + (144*64*(1/(float)(1<<fp->numerology_index)));
const double Ncp1=(144*64*(1/(float)(1<<fp->numerology_index)));
double tl=0,poff,exp_re,exp_im;
double Ncp,Ncpm1=Ncp0;
......
......@@ -483,13 +483,20 @@ int nr_slot_fep_ul(NR_DL_FRAME_PARMS *frame_parms,
dft(dftsize,(int16_t *)&tmp_dft_in,
(int16_t *)&rxdataF[symbol * frame_parms->ofdm_symbol_size], 1);
}
else
dft(dftsize,(int16_t *)&rxdata[rxdata_offset-sample_offset],
else {
//dft(dftsize,(int16_t *)&rxdata[rxdata_offset-sample_offset],
// (int16_t *)&rxdataF[symbol * frame_parms->ofdm_symbol_size], 1);
memcpy((void *)tmp_dft_in,
(void *) &rxdata[rxdata_offset-sample_offset],
(frame_parms->ofdm_symbol_size)*sizeof(int));
dft(dftsize,(int16_t *)&tmp_dft_in,
(int16_t *)&rxdataF[symbol * frame_parms->ofdm_symbol_size], 1);
}
// clear DC carrier from OFDM symbols
rxdataF[symbol * frame_parms->ofdm_symbol_size] = 0;
int symb_offset = (Ns%frame_parms->slots_per_subframe)*frame_parms->symbols_per_slot;
uint32_t rot2 = ((uint32_t*)frame_parms->symbol_rotation)[symbol+symb_offset];
((int16_t*)&rot2)[1]=-((int16_t*)&rot2)[1];
......@@ -499,5 +506,6 @@ int nr_slot_fep_ul(NR_DL_FRAME_PARMS *frame_parms,
(int16_t *)&rxdataF[frame_parms->ofdm_symbol_size*symbol],
frame_parms->ofdm_symbol_size,
15);
return(0);
}
......@@ -684,14 +684,14 @@ int nr_rx_pdsch(PHY_VARS_NR_UE *ue,
pdsch_vars[eNB_id]->llr_offset[symbol] = len*dlsch0_harq->Qm + llr_offset_symbol;
/*LOG_I(PHY,"compute LLRs [symbol %d] NbRB %d Qm %d LLRs-Length %d LLR-Offset %d @LLR Buff %x @LLR Buff(symb) %x\n",
LOG_D(PHY,"compute LLRs [symbol %d] NbRB %d Qm %d LLRs-Length %d LLR-Offset %d energy %d\n",
symbol,
nb_rb,dlsch0_harq->Qm,
pdsch_vars[eNB_id]->llr_length[symbol],
pdsch_vars[eNB_id]->llr_offset[symbol],
(int16_t*)pdsch_vars[eNB_id]->llr[0],
pllr_symbol_cw0);*/
signal_energy(pdsch_vars[eNB_id]->rxdataF_comp0[0], 7*2*frame_parms->N_RB_DL*12));
/*printf("compute LLRs [symbol %d] NbRB %d Qm %d LLRs-Length %d LLR-Offset %d @LLR Buff %p @LLR Buff(symb) %p\n",
symbol,
nb_rb,dlsch0_harq->Qm,
......
......@@ -36,7 +36,7 @@
#include "PHY/LTE_REFSIG/lte_refsig.h"
#include "PHY/INIT/phy_init.h"
//#define DEBUG_PBCH 1
//#define DEBUG_PBCH
//#define DEBUG_PBCH_ENCODING
#ifdef OPENAIR2
......@@ -61,7 +61,8 @@ uint16_t nr_pbch_extract(int **rxdataF,
int nushiftmod4 = frame_parms->nushift;
unsigned int rx_offset = frame_parms->first_carrier_offset + frame_parms->ssb_start_subcarrier; //and
if (rx_offset>= frame_parms->ofdm_symbol_size) rx_offset-=frame_parms->ofdm_symbol_size;
// if (rx_offset>= frame_parms->ofdm_symbol_size) rx_offset-=frame_parms->ofdm_symbol_size;
rx_offset=(rx_offset)%(frame_parms->ofdm_symbol_size);
AssertFatal(symbol>=1 && symbol<5,
"symbol %d illegal for PBCH extraction\n",
......@@ -103,8 +104,8 @@ uint16_t nr_pbch_extract(int **rxdataF,
j++;
}
//rx_offset=(rx_offset+1)&(frame_parms->ofdm_symbol_size-1);
rx_offset = (rx_offset >= frame_parms->ofdm_symbol_size) ? (rx_offset - frame_parms->ofdm_symbol_size + 1) : (rx_offset+1);
rx_offset=(rx_offset+1)%(frame_parms->ofdm_symbol_size);
//rx_offset = (rx_offset >= frame_parms->ofdm_symbol_size) ? (rx_offset - frame_parms->ofdm_symbol_size + 1) : (rx_offset+1);
}
rxF_ext+=9;
......@@ -126,12 +127,14 @@ uint16_t nr_pbch_extract(int **rxdataF,
j++;
}
//rx_offset=(rx_offset+1)&(frame_parms->ofdm_symbol_size-1);
rx_offset = (rx_offset >= frame_parms->ofdm_symbol_size) ? (rx_offset - frame_parms->ofdm_symbol_size + 1) : (rx_offset+1);
rx_offset=(rx_offset+1)%(frame_parms->ofdm_symbol_size);
//rx_offset = (rx_offset >= frame_parms->ofdm_symbol_size) ? (rx_offset - frame_parms->ofdm_symbol_size + 1) : (rx_offset+1);
}
rxF_ext+=9;
} else rx_offset = (rx_offset >= frame_parms->ofdm_symbol_size) ? (rx_offset - frame_parms->ofdm_symbol_size + 12) : (rx_offset+12);//rx_offset = (rx_offset+12)&(frame_parms->ofdm_symbol_size-1);
} else{ //rx_offset = (rx_offset >= frame_parms->ofdm_symbol_size) ? (rx_offset - frame_parms->ofdm_symbol_size + 12) : (rx_offset+12);
rx_offset = (rx_offset+12)%(frame_parms->ofdm_symbol_size);
}
}
}
......
......@@ -97,7 +97,7 @@ static void *scope_thread_eNB(void *arg) {
}
}
sleep(1);
usleep(100*1000);
}
// printf("%s",stats_buffer);
......
This diff is collapsed.
......@@ -32,7 +32,9 @@
#ifndef __PHY_DEFS_NB_IOT__H__
#define __PHY_DEFS_NB_IOT__H__
#ifndef _GNU_SOURCE
#define _GNU_SOURCE
#endif
#include <stdio.h>
#include <stdlib.h>
#include <malloc.h>
......
......@@ -236,6 +236,7 @@ typedef struct {
typedef struct NR_DL_FRAME_PARMS NR_DL_FRAME_PARMS;
typedef uint32_t (*get_samples_per_slot_t)(int slot, NR_DL_FRAME_PARMS* fp);
typedef uint32_t (*get_slot_from_timestamp_t)(openair0_timestamp timestamp_rx, NR_DL_FRAME_PARMS* fp);
typedef uint32_t (*get_samples_slot_timestamp_t)(int slot, NR_DL_FRAME_PARMS* fp, uint8_t sl_ahead);
......@@ -292,6 +293,8 @@ struct NR_DL_FRAME_PARMS {
uint32_t samples_per_subframe;
/// Number of samples in current slot
get_samples_per_slot_t get_samples_per_slot;
/// slot calculation from timestamp
get_slot_from_timestamp_t get_slot_from_timestamp;
/// Number of samples before slot
get_samples_slot_timestamp_t get_samples_slot_timestamp;
/// Number of samples in 0th and center slot of a subframe
......
......@@ -380,7 +380,8 @@ void nr_fill_indication(PHY_VARS_gNB *gNB, int frame, int slot_rx, int ULSCH_id,
case 245: timing_advance_update /= 32; break;
case 273: timing_advance_update /= 32; break;
case 66: timing_advance_update /= 12; break;
default: abort();
case 32: timing_advance_update /= 12; break;
default: AssertFatal(0==1,"No case defined for PRB %d to calculate timing_advance_update\n",gNB->frame_parms.N_RB_DL);
}
// put timing advance command in 0..63 range
......
......@@ -388,6 +388,7 @@ void set_tx_harq_id(NR_UE_ULSCH_t *ulsch, int harq_pid, int slot_tx);
int get_tx_harq_id(NR_UE_ULSCH_t *ulsch, int slot_tx);
int is_pbch_in_slot(fapi_nr_config_request_t *config, int frame, int slot, NR_DL_FRAME_PARMS *fp);
int is_ssb_in_slot(fapi_nr_config_request_t *config, int frame, int slot, NR_DL_FRAME_PARMS *fp);
/*@}*/
......
......@@ -356,6 +356,16 @@ void nr_ue_pbch_procedures(uint8_t gNB_id,
} else {
LOG_E(PHY,"[UE %d] frame %d, nr_tti_rx %d, Error decoding PBCH!\n",
ue->Mod_id,frame_rx, nr_tti_rx);
/*FILE *fd;
if ((fd = fopen("rxsig_frame0.dat","w")) != NULL) {
fwrite((void *)&ue->common_vars.rxdata[0][0],
sizeof(int32_t),
ue->frame_parms.samples_per_frame,
fd);
LOG_I(PHY,"Dummping Frame ... bye bye \n");
fclose(fd);
exit(0);
}*/
/*
write_output("rxsig0.m","rxs0", ue->common_vars.rxdata[0],ue->frame_parms.samples_per_subframe,1,1);
......@@ -1614,6 +1624,59 @@ void *UE_thread_slot1_dl_processing(void *arg) {
}
#endif
int is_ssb_in_slot(fapi_nr_config_request_t *config, int frame, int slot, NR_DL_FRAME_PARMS *fp)
{
int mu = fp->numerology_index;
//uint8_t half_frame_index = fp->half_frame_bit;
//uint8_t i_ssb = fp->ssb_index;
uint8_t Lmax = fp->Lmax;
if (!(frame%(1<<(config->ssb_table.ssb_period-1)))){
if(Lmax <= 8) {
if(slot <=3 && (((config->ssb_table.ssb_mask_list[0].ssb_mask << 2*slot)&0x80000000) == 0x80000000 || ((config->ssb_table.ssb_mask_list[0].ssb_mask << (2*slot +1))&0x80000000) == 0x80000000))
return 1;
else return 0;
}
else if(Lmax == 64) {
if (mu == NR_MU_3){
if (slot>=0 && slot <= 7){
if(((config->ssb_table.ssb_mask_list[0].ssb_mask << 2*slot)&0x80000000) == 0x80000000 || ((config->ssb_table.ssb_mask_list[0].ssb_mask << (2*slot +1))&0x80000000) == 0x80000000)
return 1;
else return 0;
}
else if (slot>=10 && slot <=17){
if(((config->ssb_table.ssb_mask_list[0].ssb_mask << 2*(slot-2))&0x80000000) == 0x80000000 || ((config->ssb_table.ssb_mask_list[0].ssb_mask << (2*(slot-2) +1))&0x80000000) == 0x80000000)
return 1;
else return 0;
}
else if (slot>=20 && slot <=27){
if(((config->ssb_table.ssb_mask_list[1].ssb_mask << 2*(slot-20))&0x80000000) == 0x80000000 || ((config->ssb_table.ssb_mask_list[1].ssb_mask << (2*(slot-20) +1))&0x80000000) == 0x80000000)
return 1;
else return 0;
}
else if (slot>=30 && slot <=37){
if(((config->ssb_table.ssb_mask_list[1].ssb_mask << 2*(slot-22))&0x80000000) == 0x80000000 || ((config->ssb_table.ssb_mask_list[1].ssb_mask << (2*(slot-22) +1))&0x80000000) == 0x80000000)
return 1;
else return 0;
}
else return 0;
}
else if (mu == NR_MU_4) {
AssertFatal(0==1, "not implemented for mu = %d yet\n", mu);
}
else AssertFatal(0==1, "Invalid numerology index %d for the synchronization block\n", mu);
}
else AssertFatal(0==1, "Invalid Lmax %u for the synchronization block\n", Lmax);
}
else return 0;
}
int is_pbch_in_slot(fapi_nr_config_request_t *config, int frame, int slot, NR_DL_FRAME_PARMS *fp) {
......@@ -1644,6 +1707,7 @@ int phy_procedures_nrUE_RX(PHY_VARS_NR_UE *ue,
int frame_rx = proc->frame_rx;
int nr_tti_rx = proc->nr_tti_rx;
int slot_pbch;
//int slot_ssb;
NR_UE_PDCCH *pdcch_vars = ue->pdcch_vars[ue->current_thread_id[nr_tti_rx]][0];
fapi_nr_config_request_t *cfg = &ue->nrUE_config;
......@@ -1669,6 +1733,7 @@ int phy_procedures_nrUE_RX(PHY_VARS_NR_UE *ue,
get_coreset_rballoc(pdcch_vars->pdcch_config[0].coreset.frequency_domain_resource,&coreset_nb_rb,&coreset_start_rb);
slot_pbch = is_pbch_in_slot(cfg, frame_rx, nr_tti_rx, fp);
//slot_ssb = is_ssb_in_slot(cfg, frame_rx, nr_tti_rx, fp);
// looking for pbch only in slot where it is supposed to be
if ((ue->decode_MIB == 1) && slot_pbch)
......
static int cmpdouble(const void *p1, const void *p2) {
return *(double *)p1 > *(double *)p2;
}
double median(varArray_t *input) {
return *(double *)((uint8_t *)(input+1)+(input->size/2)*input->atomSize);
}
......
......@@ -79,6 +79,9 @@ int n_tx_dropped = 0; /*!< \brief initial max process time for tx */
int n_rx_dropped = 0; /*!< \brief initial max process time for rx */
double DS_TDL = .03;
static int cmpdouble(const void *p1, const void *p2) {
return *(double *)p1 > *(double *)p2;
}
int emulate_rf = 0;
int split73=0;
......
......@@ -80,6 +80,9 @@ double t_tx_min = 1000000000; /*!< \brief initial min process time for tx */
double t_rx_min = 1000000000; /*!< \brief initial min process time for tx */
int n_tx_dropped = 0; /*!< \brief initial max process time for tx */
int n_rx_dropped = 0; /*!< \brief initial max process time for rx */
static int cmpdouble(const void *p1, const void *p2) {
return *(double *)p1 > *(double *)p2;
}
int split73=0;
......@@ -345,7 +348,7 @@ int main(int argc, char **argv) {
unsigned short input_buffer_length;
unsigned int ret;
unsigned int coded_bits_per_codeword,nsymb;
unsigned int tx_lev=0,tx_lev_dB,trials,errs[4]= {0,0,0,0},round_trials[4]= {0,0,0,0};
unsigned int tx_lev=0,tx_lev_dB,trials,errs[5]= {0,0,0,0,0},round_trials[4]= {0,0,0,0};
FILE *bler_fd=NULL;
char bler_fname[512];
FILE *time_meas_fd=NULL;
......
......@@ -66,8 +66,9 @@
#define inMicroS(a) (((double)(a))/(cpu_freq_GHz*1000.0))
#include "SIMULATION/LTE_PHY/common_sim.h"
#include <openair2/LAYER2/MAC/mac_vars.h>
#include <openair2/RRC/LTE/rrc_vars.h>
unsigned char NB_eNB_INST=0;
LCHAN_DESC DCCH_LCHAN_DESC,DTCH_DL_LCHAN_DESC,DTCH_UL_LCHAN_DESC;
rlc_info_t Rlc_info_um,Rlc_info_am_config;
......@@ -81,7 +82,6 @@ double cpuf;
int sf_ahead=4 ;
int sl_ahead=0;
uint8_t nfapi_mode = 0;
uint16_t NB_UE_INST = 1;
uint64_t downlink_frequency[MAX_NUM_CCs][4];
// dummy functions
......@@ -150,6 +150,42 @@ int is_x2ap_enabled(void)
openair0_config_t openair0_cfg[MAX_CARDS];
/* specific dlsim DL preprocessor: uses rbStart/rbSize/mcs from command line of
dlsim, does not search for CCE/PUCCH occasion but simply sets to 0 */
int g_mcsIndex = -1, g_rbStart = -1, g_rbSize = -1;
void nr_dlsim_preprocessor(module_id_t module_id,
frame_t frame,
sub_frame_t slot,
int num_slots_per_tdd) {
NR_UE_info_t *UE_info = &RC.nrmac[module_id]->UE_info;
AssertFatal(UE_info->num_UEs == 1, "can have only a single UE\n");
NR_UE_sched_ctrl_t *sched_ctrl = &UE_info->UE_sched_ctrl[0];
/* manually set free CCE to 0 */
const int target_ss = NR_SearchSpace__searchSpaceType_PR_ue_Specific;
sched_ctrl->search_space = get_searchspace(sched_ctrl->active_bwp, target_ss);
uint8_t nr_of_candidates;
find_aggregation_candidates(&sched_ctrl->aggregation_level,
&nr_of_candidates,
sched_ctrl->search_space);
sched_ctrl->coreset = get_coreset(
sched_ctrl->active_bwp, sched_ctrl->search_space, 1 /* dedicated */);
sched_ctrl->cce_index = 0;
/* set "any" value for PUCCH (simulator evaluates PDSCH only) */
sched_ctrl->pucch_sched_idx = 0;
sched_ctrl->pucch_occ_idx = 0;
sched_ctrl->rbStart = g_rbStart;
sched_ctrl->rbSize = g_rbSize;
sched_ctrl->mcs = g_mcsIndex;
sched_ctrl->time_domain_allocation = 2;
sched_ctrl->mcsTableIdx = 0;
AssertFatal(sched_ctrl->rbStart >= 0, "invalid rbStart %d\n", sched_ctrl->rbStart);
AssertFatal(sched_ctrl->rbSize > 0, "invalid rbSize %d\n", sched_ctrl->rbSize);
AssertFatal(sched_ctrl->mcs >= 0, "invalid sched_ctrl->mcs %d\n", sched_ctrl->mcs);
sched_ctrl->numDmrsCdmGrpsNoData = 1;
}
int main(int argc, char **argv)
......@@ -194,11 +230,10 @@ int main(int argc, char **argv)
SCM_t channel_model=AWGN;//Rayleigh1_anticorr;
NB_UE_INST = 1;
//double pbch_sinr;
//int pbch_tx_ant;
int N_RB_DL=106,mu=1;
nfapi_nr_dl_tti_pdsch_pdu_rel15_t dlsch_config;
NR_sched_pucch pucch_sched;
//unsigned char frame_type = 0;
......@@ -227,7 +262,6 @@ int main(int argc, char **argv)
randominit(0);
int mcsIndex_set=0,rbStart_set=0,rbSize_set=0;
int print_perf = 0;
FILE *scg_fd=NULL;
......@@ -393,18 +427,15 @@ int main(int argc, char **argv)
case 'a':
dlsch_config.rbStart = atoi(optarg);
rbStart_set=1;
g_rbStart = atoi(optarg);
break;
case 'b':
dlsch_config.rbSize = atoi(optarg);
rbSize_set=1;
g_rbSize = atoi(optarg);
break;
case 'e':
dlsch_config.mcsIndex[0] = atoi(optarg);
mcsIndex_set=1;
g_mcsIndex = atoi(optarg);
break;
case 'm':
......@@ -483,6 +514,7 @@ int main(int argc, char **argv)
RC.nb_nr_mac_CC[i] = 1;
mac_top_init_gNB();
gNB_mac = RC.nrmac[0];
gNB_mac->pre_processor_dl = nr_dlsim_preprocessor;
gNB_RRC_INST rrc;
memset((void*)&rrc,0,sizeof(rrc));
......@@ -560,6 +592,12 @@ int main(int argc, char **argv)
// nr_phy_config_request_sim(gNB,N_RB_DL,N_RB_DL,mu,Nid_cell,SSB_positions);
// call MAC to configure common parameters
/* rrc_mac_config_req_gNB() has created one user, so set the scheduling
* parameters from command line in global variables that will be picked up by
* scheduling preprocessor */
if (g_mcsIndex < 0) g_mcsIndex = 9;
if (g_rbStart < 0) g_rbStart=0;
if (g_rbSize < 0) g_rbSize = N_RB_DL - g_rbStart;
double fs,bw;
......@@ -687,11 +725,6 @@ int main(int argc, char **argv)
AssertFatal(input_fd==NULL,"Not ready for input signal file\n");
gNB->pbch_configured = 1;
gNB->ssb_pdu.ssb_pdu_rel15.bchPayload=0x001234;
if (mcsIndex_set==0) dlsch_config.mcsIndex[0]=9;
if (rbStart_set==0) dlsch_config.rbStart=0;
if (rbSize_set==0) dlsch_config.rbSize=N_RB_DL-dlsch_config.rbStart;
//Configure UE
rrc.carrier.MIB = (uint8_t*) malloc(4);
......@@ -788,8 +821,14 @@ int main(int argc, char **argv)
for (int i=0; i<MAX_NUM_CORESET; i++)
gNB_mac->UE_info.num_pdcch_cand[0][i] = 0;
if (css_flag == 0) nr_schedule_uss_dlsch_phytest(0,frame,slot,&pucch_sched,&dlsch_config);
else nr_schedule_css_dlsch_phytest(0,frame,slot);
if (css_flag == 0) {
const uint8_t slots_per_frame[5] = {10, 20, 40, 80, 160};
const NR_TDD_UL_DL_Pattern_t *tdd_pattern = &scc->tdd_UL_DL_ConfigurationCommon->pattern1;
const int num_slots_per_tdd = slots_per_frame[*scc->ssbSubcarrierSpacing] >> (7 - tdd_pattern->dl_UL_TransmissionPeriodicity);
nr_schedule_ue_spec(0, frame, slot, num_slots_per_tdd);
} else {
nr_schedule_css_dlsch_phytest(0,frame,slot);
}
Sched_INFO.module_id = 0;
Sched_INFO.CC_id = 0;
Sched_INFO.frame = frame;
......@@ -986,7 +1025,7 @@ int main(int argc, char **argv)
if (print_perf==1) {
printf("\ngNB TX function statistics (per %d us slot, NPRB %d, mcs %d, TBS %d, Kr %d (Zc %d))\n",
1000>>*scc->ssbSubcarrierSpacing,dlsch_config.rbSize,dlsch_config.mcsIndex[0],
1000>>*scc->ssbSubcarrierSpacing, g_rbSize, g_mcsIndex,
gNB->dlsch[0][0]->harq_processes[0]->pdsch_pdu.pdsch_pdu_rel15.TBSize[0]<<3,
gNB->dlsch[0][0]->harq_processes[0]->K,
gNB->dlsch[0][0]->harq_processes[0]->K/((gNB->dlsch[0][0]->harq_processes[0]->pdsch_pdu.pdsch_pdu_rel15.TBSize[0]<<3)>3824?22:10));
......
......@@ -46,6 +46,7 @@
#include "openair1/SIMULATION/RF/rf.h"
#include "openair1/SIMULATION/NR_PHY/nr_unitary_defs.h"
#include "openair1/SIMULATION/NR_PHY/nr_dummy_functions.c"
#include "openair1/PHY/MODULATION/nr_modulation.h"
//#define DEBUG_NR_PBCHSIM
......
......@@ -45,11 +45,13 @@
#include "PHY/NR_UE_TRANSPORT/nr_transport_proto_ue.h"
#include "nr_unitary_defs.h"
#include "OCG_vars.h"
#include <openair2/LAYER2/MAC/mac_vars.h>
#include <openair2/RRC/LTE/rrc_vars.h>
#define NR_PRACH_DEBUG 1
#define PRACH_WRITE_OUTPUT_DEBUG 1
unsigned char NB_eNB_INST=0;
LCHAN_DESC DCCH_LCHAN_DESC,DTCH_DL_LCHAN_DESC,DTCH_UL_LCHAN_DESC;
rlc_info_t Rlc_info_um,Rlc_info_am_config;
......@@ -59,7 +61,6 @@ RAN_CONTEXT_t RC;
RU_t *ru;
double cpuf;
extern uint16_t prach_root_sequence_map0_3[838];
uint16_t NB_UE_INST=1;
openair0_config_t openair0_cfg[MAX_CARDS];
uint8_t nfapi_mode=0;
int sl_ahead = 0;
......@@ -124,6 +125,7 @@ int main(int argc, char **argv){
uint8_t config_period;
int prachOccasion = 0;
double DS_TDL = .03;
NB_UE_INST=1;
// int8_t interf1=-19,interf2=-19;
// uint8_t abstraction_flag=0,calibration_flag=0;
......
......@@ -60,9 +60,11 @@
#define inMicroS(a) (((double)(a))/(cpu_freq_GHz*1000.0))
#include "SIMULATION/LTE_PHY/common_sim.h"
#include <openair2/LAYER2/MAC/mac_vars.h>
#include <openair2/RRC/LTE/rrc_vars.h>
//#define DEBUG_ULSIM
unsigned char NB_eNB_INST=0;
LCHAN_DESC DCCH_LCHAN_DESC,DTCH_DL_LCHAN_DESC,DTCH_UL_LCHAN_DESC;
rlc_info_t Rlc_info_um,Rlc_info_am_config;
......@@ -75,7 +77,6 @@ int sf_ahead=4 ;
int sl_ahead=0;
double cpuf;
uint8_t nfapi_mode = 0;
uint16_t NB_UE_INST = 1;
uint64_t downlink_frequency[MAX_NUM_CCs][4];
......@@ -164,6 +165,7 @@ int main(int argc, char **argv)
uint16_t N_RB_DL = 106, N_RB_UL = 106, mu = 1;
double tx_gain=1.0;
double N0=30;
NB_UE_INST = 1;
//unsigned char frame_type = 0;
NR_DL_FRAME_PARMS *frame_parms;
......
......@@ -56,6 +56,8 @@
#include "flexran.pb-c.h"
#include "flexran_agent_mac.h"
#include <dlfcn.h>
#include <openair2/LAYER2/MAC/mac.h>
#include "T.h"
......
......@@ -1736,13 +1736,23 @@ uint32_t to_nrarfcn(int nr_bandP,
(long long unsigned int)(nr_bandtable[i].dl_max - bw_kHz));
int deltaFglobal = 60;
uint32_t N_REF_Offs = 2016667;
uint64_t F_REF_Offs_khz = 24250080;
if (dl_CarrierFreq < 3e9) deltaFglobal = 15;
if (dl_CarrierFreq < 24.25e9) deltaFglobal = 5;
if (dl_CarrierFreq < 24.25e9) {
deltaFglobal = 15;
N_REF_Offs = 600000;
F_REF_Offs_khz = 3000000;
}
if (dl_CarrierFreq < 3e9) {
deltaFglobal = 5;
N_REF_Offs = 0;
F_REF_Offs_khz = 0;
}
// This is equation before Table 5.4.2.1-1 in 38101-1-f30
// F_REF=F_REF_Offs + deltaF_Global(N_REF-NREF_REF_Offs)
nrarfcn = (((dl_CarrierFreq_by_1k - nr_bandtable[i].dl_min)/deltaFglobal)+nr_bandtable[i].N_OFFs_DL);
nrarfcn = (((dl_CarrierFreq_by_1k - F_REF_Offs_khz)/deltaFglobal)+N_REF_Offs);
delta_arfcn = nrarfcn - nr_bandtable[i].N_OFFs_DL;
if(delta_arfcn%(nr_bandtable[i].step_size)!=0)
......@@ -1759,13 +1769,21 @@ uint64_t from_nrarfcn(int nr_bandP,
{
int i;
int deltaFglobal = 5;
uint32_t N_REF_Offs = 0;
uint64_t F_REF_Offs_khz = 0;
int scs_khz = 15<<scs_index;
uint32_t delta_arfcn;
if (dl_nrarfcn > 599999 && dl_nrarfcn < 2016667)
deltaFglobal = 15;
if (dl_nrarfcn > 2016666 && dl_nrarfcn < 3279166)
if (dl_nrarfcn > 599999 && dl_nrarfcn < 2016667) {
deltaFglobal = 15;
N_REF_Offs = 600000;
F_REF_Offs_khz = 3000000;
}
if (dl_nrarfcn > 2016666 && dl_nrarfcn < 3279166) {
deltaFglobal = 60;
N_REF_Offs = 2016667;
F_REF_Offs_khz = 24250080;
}
AssertFatal(nr_bandP <= 261, "nr_band %d > 260\n", nr_bandP);
for (i = 0; i < NR_BANDTABLE_SIZE && nr_bandtable[i].band != nr_bandP; i++);
......@@ -1779,14 +1797,11 @@ uint64_t from_nrarfcn(int nr_bandP,
if(delta_arfcn%(nr_bandtable[i].step_size)!=0)
AssertFatal(1==0,"dl_nrarfcn %u is not on the raster for step size %lu",dl_nrarfcn,nr_bandtable[i].step_size);
LOG_I(PHY,"Computing dl_frequency (pointA %llu => %llu (dlmin %llu, nr_bandtable[%d].N_OFFs_DL %llu))\n",
LOG_I(PHY,"Computing dl_frequency (arfcn %llu => %llu)\n",
(unsigned long long)dl_nrarfcn,
(unsigned long long)(1000*(nr_bandtable[i].dl_min + (dl_nrarfcn - nr_bandtable[i].N_OFFs_DL) * deltaFglobal)),
(unsigned long long)nr_bandtable[i].dl_min,
i,
(unsigned long long)nr_bandtable[i].N_OFFs_DL);
(unsigned long long)(1000*(F_REF_Offs_khz + (dl_nrarfcn - N_REF_Offs) * deltaFglobal)));
return 1000*(nr_bandtable[i].dl_min + (dl_nrarfcn - nr_bandtable[i].N_OFFs_DL) * deltaFglobal);
return 1000*(F_REF_Offs_khz + (dl_nrarfcn - N_REF_Offs) * deltaFglobal);
}
......
......@@ -3900,7 +3900,6 @@ void nr_ue_send_sdu(module_id_t module_idP,
#endif
*/
/*
#if defined(ENABLE_MAC_PAYLOAD_DEBUG)
LOG_T(MAC, "[UE %d] First 32 bytes of DLSCH : \n", module_idP);
for (i = 0; i < 32; i++) {
......@@ -3908,7 +3907,6 @@ void nr_ue_send_sdu(module_id_t module_idP,
}
LOG_T(MAC, "\n");
#endif
*/
// Processing MAC PDU
// it parses MAC CEs subheaders, MAC CEs, SDU subheaderds and SDUs
......@@ -4563,6 +4561,7 @@ void nr_ue_process_mac_pdu(module_id_t module_idP,
LOG_D(MAC, "[UE] LCID %d, PDU length %d\n", ((NR_MAC_SUBHEADER_FIXED *)pdu_ptr)->LCID, pdu_len);
//#endif
LOG_D(MAC, "[UE] LCID %d, PDU length %d\n", rx_lcid, pdu_len);
switch(rx_lcid){
// MAC CE
......
......@@ -128,7 +128,7 @@ void config_common(int Mod_idP, int pdsch_AntennaPorts, NR_ServingCellConfigComm
uint16_t band;
int32_t offset;
get_band((uint64_t)(cfg->carrier_config.dl_frequency.value)*1000,
get_band(((uint64_t)cfg->carrier_config.dl_frequency.value)*1000,
&band,
&offset,
&frame_type);
......
......@@ -403,6 +403,8 @@ void gNB_dlsch_ulsch_scheduler(module_id_t module_idP,
protocol_ctxt_t ctxt;
PROTOCOL_CTXT_SET_BY_MODULE_ID(&ctxt, module_idP, ENB_FLAG_YES, NOT_A_RNTI, frame, slot,module_idP);
int nb_periods_per_frame;
const int UE_id = 0;
const int bwp_id = 1;
......@@ -411,9 +413,47 @@ void gNB_dlsch_ulsch_scheduler(module_id_t module_idP,
NR_UE_sched_ctrl_t *ue_sched_ctl = &UE_info->UE_sched_ctrl[UE_id];
NR_COMMON_channels_t *cc = gNB->common_channels;
NR_ServingCellConfigCommon_t *scc = cc->ServingCellConfigCommon;
NR_TDD_UL_DL_Pattern_t *tdd_pattern = &scc->tdd_UL_DL_ConfigurationCommon->pattern1;
const int num_slots_per_tdd = slots_per_frame[*scc->ssbSubcarrierSpacing] >> (7 - tdd_pattern->dl_UL_TransmissionPeriodicity);
switch(scc->tdd_UL_DL_ConfigurationCommon->pattern1.dl_UL_TransmissionPeriodicity) {
case 0:
nb_periods_per_frame = 20; // 10ms/0p5ms
break;
case 1:
nb_periods_per_frame = 16; // 10ms/0p625ms
break;
case 2:
nb_periods_per_frame = 10; // 10ms/1ms
break;
case 3:
nb_periods_per_frame = 8; // 10ms/1p25ms
break;
case 4:
nb_periods_per_frame = 5; // 10ms/2ms
break;
case 5:
nb_periods_per_frame = 4; // 10ms/2p5ms
break;
case 6:
nb_periods_per_frame = 2; // 10ms/5ms
break;
case 7:
nb_periods_per_frame = 1; // 10ms/10ms
break;
default:
AssertFatal(1==0,"Undefined tdd period %d\n", scc->tdd_UL_DL_ConfigurationCommon->pattern1.dl_UL_TransmissionPeriodicity);
}
int num_slots_per_tdd = (slots_per_frame[*scc->ssbSubcarrierSpacing])/nb_periods_per_frame;
const int nr_ulmix_slots = tdd_pattern->nrofUplinkSlots + (tdd_pattern->nrofUplinkSymbols!=0);
start_meas(&RC.nrmac[module_idP]->eNB_scheduler);
......@@ -438,18 +478,18 @@ void gNB_dlsch_ulsch_scheduler(module_id_t module_idP,
//mbsfn_status[CC_id] = 0;
// clear vrb_maps
memset(cc[CC_id].vrb_map, 0, 275);
memset(cc[CC_id].vrb_map_UL, 0, 275);
memset(cc[CC_id].vrb_map, 0, sizeof(uint16_t) * 275);
memset(cc[CC_id].vrb_map_UL, 0, sizeof(uint16_t) * 275);
clear_nr_nfapi_information(RC.nrmac[module_idP], CC_id, frame, slot);
}
if ((slot == 0) && (frame & 127) == 0) dump_mac_stats(RC.nrmac[module_idP]);
// This schedules MIB
if((slot == 0) && (frame & 7) == 0){
schedule_nr_mib(module_idP, frame, slot);
}
schedule_nr_mib(module_idP, frame, slot, slots_per_frame[*scc->ssbSubcarrierSpacing]);
// This schedule PRACH if we are not in phy_test mode
if (get_softmodem_params()->phy_test == 0)
......@@ -468,40 +508,30 @@ void gNB_dlsch_ulsch_scheduler(module_id_t module_idP,
if (get_softmodem_params()->phy_test == 0) {
nr_schedule_RA(module_idP, frame, slot);
nr_schedule_reception_msg3(module_idP, 0, frame, slot);
}
if (UE_info->active[UE_id]) {
// TbD once RACH is available, start ta_timer when UE is connected
if (ue_sched_ctl->ta_timer)
ue_sched_ctl->ta_timer--;
if (ue_sched_ctl->ta_timer == 0) {
ue_sched_ctl->ta_apply = true;
/* if time is up, then set the timer to not send it for 5 frames
// regardless of the TA value */
ue_sched_ctl->ta_timer = 100;
}
}
// This schedules the DCI for Uplink and subsequently PUSCH
// The decision about whether to schedule is done for each UE independently
// inside
if (UE_info->active[UE_id] && slot < 10) {
int tda = 1; // time domain assignment hardcoded for now
schedule_fapi_ul_pdu(module_idP, frame, slot, num_slots_per_tdd, nr_ulmix_slots, tda, ulsch_in_slot_bitmap);
nr_schedule_pusch(module_idP, UE_id, num_slots_per_tdd, nr_ulmix_slots, frame, slot);
}
if (UE_info->active[UE_id]
&& (is_xlsch_in_slot(dlsch_in_slot_bitmap, slot % num_slots_per_tdd))
&& slot < 10) {
ue_sched_ctl->current_harq_pid = slot % num_slots_per_tdd;
//int pucch_sched;
//nr_update_pucch_scheduling(module_idP, UE_id, frame, slot, num_slots_per_tdd,&pucch_sched);
//nr_schedule_uss_dlsch_phytest(module_idP, frame, slot, &UE_info->UE_sched_ctrl[UE_id].sched_pucch[pucch_sched], NULL);
nr_schedule_ue_spec(module_idP, frame, slot, num_slots_per_tdd);
ue_sched_ctl->ta_apply = false;
}
if (UE_info->active[UE_id])
nr_schedule_pucch(module_idP, UE_id, nr_ulmix_slots, frame, slot);
......
......@@ -438,9 +438,11 @@ void nr_initiate_ra_proc(module_id_t module_idP,
break;
}
}
if (!pr_found) {
LOG_E(MAC, "[gNB %d][RAPROC] FAILURE: preamble %d does not correspond to any of the ones in rach_ConfigDedicated\n",
module_idP, preamble_index);
return; // if the PRACH preamble does not correspond to any of the ones sent through RRC abort RA proc
}
// This should be handled differently when we use the initialBWP for RA
......@@ -926,7 +928,7 @@ void nr_generate_Msg2(module_id_t module_idP,
T_BUFFER(&cc[CC_id].RAR_pdu.payload[0], tx_req->TLVs[0].length));
/* mark the corresponding RBs as used */
uint8_t *vrb_map = cc[CC_id].vrb_map;
uint16_t *vrb_map = cc[CC_id].vrb_map;
for (int rb = 0; rb < pdsch_pdu_rel15->rbSize; rb++)
vrb_map[rb + pdsch_pdu_rel15->rbStart] = 1;
}
......
This diff is collapsed.
......@@ -82,6 +82,11 @@ void mac_top_init_gNB(void)
RC.nrmac[i]->ul_handle = 0;
if (get_softmodem_params()->phy_test)
RC.nrmac[i]->pre_processor_dl = nr_preprocessor_phytest;
else
RC.nrmac[i]->pre_processor_dl = nr_simple_dlsch_preprocessor;
}//END for (i = 0; i < RC.nb_nr_macrlc_inst; i++)
AssertFatal(rlc_module_init(1) == 0,"Could not initialize RLC layer\n");
......
This diff is collapsed.
This diff is collapsed.
This diff is collapsed.
This diff is collapsed.
This diff is collapsed.
This diff is collapsed.
This diff is collapsed.
This diff is collapsed.
This diff is collapsed.
This diff is collapsed.
This diff is collapsed.
This diff is collapsed.
This diff is collapsed.
This diff is collapsed.
This diff is collapsed.
This diff is collapsed.
This diff is collapsed.
This diff is collapsed.
This diff is collapsed.
This diff is collapsed.
This diff is collapsed.
This diff is collapsed.
This diff is collapsed.
Markdown is supported
0%
or
You are about to add 0 people to the discussion. Proceed with caution.
Finish editing this message first!
Please register or to comment